woops fix missing SPI param

This commit is contained in:
ladyada 2023-12-17 02:41:15 -05:00
parent 75b1046247
commit a3b0330fbf

View file

@ -27,40 +27,40 @@
#endif #endif
// 1.54" Monochrome displays with 200x200 pixels and SSD1681 chipset // 1.54" Monochrome displays with 200x200 pixels and SSD1681 chipset
// ThinkInk_154_Mono_D67 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_154_Mono_D67 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 1.54" Monochrome displays with 200x200 pixels and SSD1608 chipset // 1.54" Monochrome displays with 200x200 pixels and SSD1608 chipset
// ThinkInk_154_Mono_D27 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_154_Mono_D27 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 1.54" Monochrome displays with 152x152 pixels and UC8151D chipset // 1.54" Monochrome displays with 152x152 pixels and UC8151D chipset
// ThinkInk_154_Mono_M10 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_154_Mono_M10 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 2.13" Monochrome displays with 250x122 pixels and SSD1675 chipset // 2.13" Monochrome displays with 250x122 pixels and SSD1675 chipset
ThinkInk_213_Mono_B72 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); ThinkInk_213_Mono_B72 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 2.13" Monochrome displays with 250x122 pixels and SSD1675B chipset // 2.13" Monochrome displays with 250x122 pixels and SSD1675B chipset
// ThinkInk_213_Mono_B73 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_213_Mono_B73 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 2.13" Monochrome displays with 250x122 pixels and SSD1680 chipset // 2.13" Monochrome displays with 250x122 pixels and SSD1680 chipset
// ThinkInk_213_Mono_BN display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_213_Mono_BN display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// ThinkInk_213_Mono_B74 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_213_Mono_B74 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 2.13" Monochrome displays with 212x104 pixels and UC8151D chipset // 2.13" Monochrome displays with 212x104 pixels and UC8151D chipset
// ThinkInk_213_Mono_M21 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_213_Mono_M21 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 2.9" 4-level Grayscale (use mono) displays with 296x128 pixels and IL0373 // 2.9" 4-level Grayscale (use mono) displays with 296x128 pixels and IL0373
// chipset // chipset
// ThinkInk_290_Grayscale4_T5 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, // ThinkInk_290_Grayscale4_T5 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS,
// EPD_BUSY); // EPD_BUSY, EPD_SPI);
// 2.9" Monochrome displays with 296x128 pixels and UC8151D chipset // 2.9" Monochrome displays with 296x128 pixels and UC8151D chipset
// ThinkInk_290_Mono_M06 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_290_Mono_M06 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 4.2" Monochrome displays with 400x300 pixels and SSD1619 chipset // 4.2" Monochrome displays with 400x300 pixels and SSD1619 chipset
// ThinkInk_420_Mono_BN display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_420_Mono_BN display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 4.2" Monochrome displays with 400x300 pixels and UC8276 chipset // 4.2" Monochrome displays with 400x300 pixels and UC8276 chipset
// ThinkInk_420_Mono_M06 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY); // ThinkInk_420_Mono_M06 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
void setup() { void setup() {
Serial.begin(115200); Serial.begin(115200);