updated examples

This commit is contained in:
ladyada 2025-07-08 11:25:23 -04:00
parent 13b24818d6
commit dfa6cff692
3 changed files with 8 additions and 7 deletions

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@ -38,7 +38,7 @@
ThinkInk_213_Grayscale4_MFGN display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY,
EPD_SPI);
// 2.66" Grayscale Featherwing or Breakout (SSD1680)
// 2.66" Monochrome display with 296x152 pixels and SSD1680 chipset
// ThinkInk_266_Grayscale4_MFGN display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY,
// EPD_SPI);

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@ -44,12 +44,17 @@ ThinkInk_213_Mono_B72 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_
// 2.13" Monochrome displays with 250x122 pixels and SSD1680 chipset
// ThinkInk_213_Mono_BN display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// ThinkInk_213_Mono_B74 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// The GDEY0213B74 is like the B74 above but is not 'shifted down' by 8 pixels
// ThinkInk_213_Mono_GDEY0213B74 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 2.13" Monochrome displays with 212x104 pixels and UC8151D chipset
// ThinkInk_213_Mono_M21 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY, EPD_SPI);
// 2.66" Monochrome display with 296x152 pixels and SSD1680 chipset
// ThinkInk_266_Grayscale4_MFGN display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS, EPD_BUSY,
// EPD_SPI);
// 2.9" 4-level Grayscale (use mono) displays with 296x128 pixels and IL0373
// chipset
// ThinkInk_290_Grayscale4_T5 display(EPD_DC, EPD_RESET, EPD_CS, SRAM_CS,

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@ -53,12 +53,8 @@ static const uint8_t ti_266mfgn_monofull_init_code[] {
SSD1680_SET_RAMYCOUNT, 2, 0, 0,
SSD1680_WRITE_BORDER, 1, 0x05, // border color
//0x3F, 1, 0x22, // End of LUT normal
//SSD1680_GATE_VOLTAGE, 1, 0x17, // Set gate voltage
//SSD1680_SOURCE_VOLTAGE, 3, 0x41, 0x00, 0x32, // Set source voltage
//SSD1680_WRITE_VCOM, 1, 0x36, // Vcom Voltage
SSD1680_DISP_CTRL2, 1, 0x20, // Load LUT from OTP (default mono)
SSD1680_DISP_CTRL2, 1, 0x20, // read LUT?
SSD1680_TEMP_CONTROL, 1, 0x80, // read temp
0xFE
};