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philb-new-
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69f26bbc7f | ||
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d72a7838b8 |
2 changed files with 32 additions and 5 deletions
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@ -137,7 +137,7 @@ void setup(void) {
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// Set up the colors of the bouncy balls.
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ballcolor[0] = matrix.color565(0, 20, 0); // Dark green
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ballcolor[1] = matrix.color565(0, 0, 20); // Dark blue
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ballcolor[2] = matrix.color565(20, 0, 0); // ark red
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ballcolor[2] = matrix.color565(20, 0, 0); // Dark red
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}
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// LOOP - RUNS REPEATEDLY AFTER SETUP --------------------------------------
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@ -21,14 +21,18 @@
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#include "driver/timer.h"
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#ifdef CONFIG_IDF_TARGET_ESP32C3
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#define _PM_portOutRegister(pin) (volatile uint32_t *)&GPIO.out
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#define _PM_portSetRegister(pin) (volatile uint32_t *)&GPIO.out_w1ts
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#define _PM_portClearRegister(pin) (volatile uint32_t *)&GPIO.out_w1tc
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#else
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#define _PM_portOutRegister(pin) \
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(volatile uint32_t *)((pin < 32) ? &GPIO.out : &GPIO.out1.val)
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#define _PM_portSetRegister(pin) \
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(volatile uint32_t *)((pin < 32) ? &GPIO.out_w1ts : &GPIO.out1_w1ts.val)
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#define _PM_portClearRegister(pin) \
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(volatile uint32_t *)((pin < 32) ? &GPIO.out_w1tc : &GPIO.out1_w1tc.val)
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#endif
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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#define _PM_byteOffset(pin) ((pin & 31) / 8)
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@ -47,17 +51,35 @@ void *_PM_protoPtr = NULL;
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#if defined(ARDUINO) // COMPILING FOR ARDUINO ------------------------------
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// Not sure yet if 32-bit IO is required on the C3, but is definitely the
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// case on S2. Seems probable and there's little harm in going that way
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// (one extra shift instruction per RGB out, and the sync'd GPIO writes
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// might be blocking anyway and no loss). 'Classic' ESP32 still allows
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// byte/word GPIO access, was fun while it lasted.
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#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
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#define _PM_STRICT_32BIT_IO
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#endif
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// ESP32 requires a custom PEW declaration (issues one set of RGB color bits
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// followed by clock pulse). Turns out the bit set/clear registers are not
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// actually atomic. If two writes are made in quick succession, the second
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// has no effect. One option is NOPs, other is to write a 0 (no effect) to
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// the opposing register (set vs clear) to synchronize the next write.
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#ifdef _PM_STRICT_32BIT_IO
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#define PEW \
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*set = (*data++) << shift; /* Set RGB data high */ \
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*clear_full = 0; /* ESP32 MUST sync before 2nd 'set' */ \
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*set = clock; /* Set clock high */ \
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*clear_full = rgbclock; /* Clear RGB data + clock */ \
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///< Bitbang one set of RGB data bits to matrix
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#else
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#define PEW \
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*set = *data++; /* Set RGB data high */ \
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*clear_full = 0; /* ESP32 MUST sync before 2nd 'set' */ \
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*set_full = clock; /* Set clock high */ \
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*clear_full = rgbclock; /* Clear RGB data + clock */ \
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///< Bitbang one set of RGB data bits to matrix
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#endif
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#define _PM_timerNum 0 // Timer #0 (can be 0-3)
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@ -189,8 +211,13 @@ IRAM_ATTR void _PM_timerStart(void *tptr, uint32_t period) {
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IRAM_ATTR uint32_t _PM_timerGetCount(void *tptr) {
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timer_index_t *timer = (timer_index_t *)tptr;
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timer->hw->hw_timer[timer->idx].update.update = 1;
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return timer->hw->hw_timer[timer->idx].cnt_low;
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#ifdef CONFIG_IDF_TARGET_ESP32S3
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timer->hw->hw_timer[timer->idx].update.tn_update = 1;
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return timer->hw->hw_timer[timer->idx].lo.tn_lo;
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#else
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timer->hw->hw_timer[timer->idx].update.tx_update = 1;
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return timer->hw->hw_timer[timer->idx].lo.tx_lo;
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#endif
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}
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// Disable timer and return current count value.
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