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more ci fix

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hathach 2024-05-02 16:53:30 +07:00
parent 2bcdd3b5d7
commit f174dddf6b
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GPG key ID: 26FAB84F615C3C52
2 changed files with 18 additions and 16 deletions
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3
src/arduino/ports/esp32/tusb_config_esp32.h
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@ -89,7 +89,10 @@ extern "C" {
//--------------------------------------------------------------------
// Enable host stack with MAX3421E (host shield)
#ifndef CFG_TUH_ENABLED
#define CFG_TUH_ENABLED 1
#endif
#define CFG_TUH_MAX_SPEED OPT_MODE_FULL_SPEED
#define CFG_TUH_MAX3421 1

31
src/portable/analog/max3421/hcd_max3421.c
View file

@ -47,26 +47,25 @@
#ifndef TUSB_VERSION_NUMBER
#define TUSB_VERSION_NUMBER (TUSB_VERSION_MAJOR << 24 | TUSB_VERSION_MINOR << 16 | TUSB_VERSION_REVISION << 8 | TUSB_VERSION_BUILD)
#endif
#endif
#if TUSB_VERSION_NUMBER < 0x0160003
// ConfigID for tuh_configure()
enum {
TUH_CFGID_MAX3421 = 200,
};
#if TUSB_VERSION_NUMBER < 0x0160003
// ConfigID for tuh_configure()
enum {
TUH_CFGID_MAX3421 = 200,
};
typedef struct {
uint8_t max_nak; // max NAK per endpoint per frame
uint8_t cpuctl; // R16: CPU Control Register
uint8_t pinctl; // R17: Pin Control Register. FDUPSPI bit is ignored
} tuh_configure_max3421_t;
typedef struct {
uint8_t max_nak; // max NAK per endpoint per frame
uint8_t cpuctl; // R16: CPU Control Register
uint8_t pinctl; // R17: Pin Control Register. FDUPSPI bit is ignored
} tuh_configure_max3421_t;
typedef union {
// For TUH_CFGID_RPI_PIO_USB_CONFIGURATION use pio_usb_configuration_t
typedef union {
// For TUH_CFGID_RPI_PIO_USB_CONFIGURATION use pio_usb_configuration_t
tuh_configure_max3421_t max3421;
} tuh_configure_param_t;
tuh_configure_max3421_t max3421;
} tuh_configure_param_t;
#endif
#endif
//--------------------------------------------------------------------+