From 09f867e86d2b2160928f88f1d9538f0d8aebdcb3 Mon Sep 17 00:00:00 2001
From: Sandeep Mistry <s.mistry@arduino.cc>
Date: Thu, 22 Mar 2018 15:19:32 -0400
Subject: [PATCH] I2S: Use 8 MHz oscillator source if 48MHz divider does not
 fit in 8 bits

---
 libraries/I2S/src/I2S.cpp | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/libraries/I2S/src/I2S.cpp b/libraries/I2S/src/I2S.cpp
index 97690e0f..9f86a413 100644
--- a/libraries/I2S/src/I2S.cpp
+++ b/libraries/I2S/src/I2S.cpp
@@ -398,15 +398,24 @@ void I2SClass::onReceive(void(*function)(void))
 
 void I2SClass::enableClock(int divider)
 {
+  int div = SystemCoreClock / divider;
+  int src = GCLK_GENCTRL_SRC_DFLL48M_Val;
+
+  if (div > 255) {
+    // divider is too big, use 8 MHz oscillator instead
+    div = 8000000 / divider;
+    src = GCLK_GENCTRL_SRC_OSC8M_Val;
+  }
+
   // configure the clock divider
   while (GCLK->STATUS.bit.SYNCBUSY);
   GCLK->GENDIV.bit.ID = _clockGenerator;
-  GCLK->GENDIV.bit.DIV = SystemCoreClock / divider;
+  GCLK->GENDIV.bit.DIV = div;
 
   // use the DFLL as the source
   while (GCLK->STATUS.bit.SYNCBUSY);
   GCLK->GENCTRL.bit.ID = _clockGenerator;
-  GCLK->GENCTRL.bit.SRC = GCLK_GENCTRL_SRC_DFLL48M_Val;
+  GCLK->GENCTRL.bit.SRC = src;
   GCLK->GENCTRL.bit.IDC = 1;
   GCLK->GENCTRL.bit.GENEN = 1;