Erased error messages and added some comments
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354e636bb0
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1b88629942
3 changed files with 83 additions and 69 deletions
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@ -170,6 +170,7 @@ int I2SClass::begin(int mode, long sampleRate, int bitsPerSample, bool driveCloc
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pinPeripheral(_sdPin, PIO_COM);
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#endif
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/*
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// Test what pins are being used
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Serial.println("_sdPin: " + String(_sdPin));
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Serial.println("_sckPin: " + String(_sckPin));
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Serial.println("_fsPin: " + String(_fsPin));
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@ -339,7 +340,7 @@ int I2SClass::availableForWrite()
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return space;
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}
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/*/ ---
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// New, just for testing, blocking read
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void I2SClass::read(int32_t *left, int32_t *right)
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{
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if (_state != I2S_STATE_RECEIVER)
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@ -347,13 +348,14 @@ void I2SClass::read(int32_t *left, int32_t *right)
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i2sd.read(left, right);
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}
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// ---*/
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//
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int I2SClass::read(void* buffer, size_t size)
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{
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if (_state != I2S_STATE_RECEIVER) {
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enableReceiver();
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}
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// Testing registers if they match AdafruitZeroI2S configuration
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// i2sd.printRegisters();
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// while(true);
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@ -445,12 +447,12 @@ void I2SClass::onReceive(void(*function)(void))
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_onReceive = function;
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}
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void I2SClass::enableClock(int divider)
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void I2SClass::enableClock(int divider/*, int mck_mult*/)
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{
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#if defined(__SAMD51__)
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// divider = sampleRate * numChannels * _bitsPerSample (44100 * 2 * 32)
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uint32_t mckFreq = (divider / 2 / _bitsPerSample) * 256; // (fs_freq * mck_mult)
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uint32_t mckFreq = (divider / 2 / _bitsPerSample) * 256; // (fs_freq * mck_mult), assumes 2 channels and mck_mult = 256
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uint32_t sckFreq = divider; // (fs_freq * I2S_NUM_SLOTS * bitsPerSample)
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uint32_t gclkval = GCLK_PCHCTRL_GEN_GCLK1_Val;
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@ -465,11 +467,13 @@ void I2SClass::enableClock(int divider)
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gclkFreq = 12000000; // 120Mhz
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}
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/*
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Serial.println ("divider: " + String(divider));
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Serial.println ("divider: " + String(divider));
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Serial.println ("mckoutdiv: " + String(mckoutdiv));
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Serial.println ("mckdiv: " + String(mckdiv));
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Serial.println ("mckdiv: " + String(mckdiv));
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*/
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//while (GCLK->SYNCBUSY.reg);
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// if this is not configured I2S won't work at all.
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GCLK->PCHCTRL[I2S_GCLK_ID_0].reg = gclkval | GCLK_PCHCTRL_CHEN;
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GCLK->PCHCTRL[I2S_GCLK_ID_1].reg = gclkval | GCLK_PCHCTRL_CHEN;
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@ -480,54 +484,55 @@ Serial.println ("divider: " + String(divider));
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#else // SAMD21
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int div = SystemCoreClock / divider;
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int src = GCLK_GENCTRL_SRC_DFLL48M_Val; // <--- ERROR SAMD51
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int src = GCLK_GENCTRL_SRC_DFLL48M_Val;
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if (div > 255) {
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// divider is too big, use 8 MHz oscillator instead
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div = 8000000 / divider;
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src = GCLK_GENCTRL_SRC_OSC8M_Val; // <--- ERROR SAMD51
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src = GCLK_GENCTRL_SRC_OSC8M_Val;
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}
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// configure the clock divider
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while (GCLK->STATUS.bit.SYNCBUSY); // <--- ERROR SAMD51
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GCLK->GENDIV.bit.ID = _clockGenerator; // <--- ERROR SAMD51
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GCLK->GENDIV.bit.DIV = div; // <--- ERROR SAMD51
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while (GCLK->STATUS.bit.SYNCBUSY);
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GCLK->GENDIV.bit.ID = _clockGenerator;
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GCLK->GENDIV.bit.DIV = div;
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// use the DFLL as the source
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while (GCLK->STATUS.bit.SYNCBUSY); // <--- ERROR SAMD51
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GCLK->GENCTRL.bit.ID = _clockGenerator; // <--- ERROR SAMD51
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GCLK->GENCTRL.bit.SRC = src; // <--- ERROR SAMD51
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GCLK->GENCTRL.bit.IDC = 1; // <--- ERROR SAMD51
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GCLK->GENCTRL.bit.GENEN = 1; // <--- ERROR SAMD51
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while (GCLK->STATUS.bit.SYNCBUSY);
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GCLK->GENCTRL.bit.ID = _clockGenerator;
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GCLK->GENCTRL.bit.SRC = src;
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GCLK->GENCTRL.bit.IDC = 1;
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GCLK->GENCTRL.bit.GENEN = 1;
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// enable
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while (GCLK->STATUS.bit.SYNCBUSY); // <--- ERROR SAMD51
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GCLK->CLKCTRL.bit.ID = i2sd.glckId(_deviceIndex); // <--- ERROR SAMD51
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GCLK->CLKCTRL.bit.GEN = _clockGenerator; // <--- ERROR SAMD51
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GCLK->CLKCTRL.bit.CLKEN = 1; // <--- ERROR SAMD51
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while (GCLK->STATUS.bit.SYNCBUSY);
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GCLK->CLKCTRL.bit.ID = i2sd.glckId(_deviceIndex);
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GCLK->CLKCTRL.bit.GEN = _clockGenerator;
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GCLK->CLKCTRL.bit.CLKEN = 1;
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while (GCLK->STATUS.bit.SYNCBUSY); // <--- ERROR SAMD51
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while (GCLK->STATUS.bit.SYNCBUSY);
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#endif
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}
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void I2SClass::disableClock()
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{
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#if defined(__SAMD51__)
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// Need to be tested if works
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//GCLK->PCHCTRL[I2S_GCLK_ID_0].reg = GCLK_PCHCTRL_RESETVALUE;
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//GCLK->PCHCTRL[I2S_GCLK_ID_1].reg = GCLK_PCHCTRL_RESETVALUE;
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#else // SAMD21
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while (GCLK->STATUS.bit.SYNCBUSY); // <--- ERROR SAMD51
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GCLK->GENCTRL.bit.ID = _clockGenerator; // <--- ERROR SAMD51
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GCLK->GENCTRL.bit.SRC = GCLK_GENCTRL_SRC_DFLL48M_Val; // <--- ERROR SAMD51
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GCLK->GENCTRL.bit.IDC = 1; // <--- ERROR SAMD51
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GCLK->GENCTRL.bit.GENEN = 0; // <--- ERROR SAMD51
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while (GCLK->STATUS.bit.SYNCBUSY);
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GCLK->GENCTRL.bit.ID = _clockGenerator;
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GCLK->GENCTRL.bit.SRC = GCLK_GENCTRL_SRC_DFLL48M_Val;
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GCLK->GENCTRL.bit.IDC = 1;
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GCLK->GENCTRL.bit.GENEN = 0;
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while (GCLK->STATUS.bit.SYNCBUSY); // <--- ERROR SAMD51
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GCLK->CLKCTRL.bit.ID = i2sd.glckId(_deviceIndex); // <--- ERROR SAMD51
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GCLK->CLKCTRL.bit.GEN = _clockGenerator; // <--- ERROR SAMD51
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GCLK->CLKCTRL.bit.CLKEN = 0; // <--- ERROR SAMD51
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while (GCLK->STATUS.bit.SYNCBUSY);
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GCLK->CLKCTRL.bit.ID = i2sd.glckId(_deviceIndex);
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GCLK->CLKCTRL.bit.GEN = _clockGenerator;
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GCLK->CLKCTRL.bit.CLKEN = 0;
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while (GCLK->STATUS.bit.SYNCBUSY); // <--- ERROR SAMD51
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while (GCLK->STATUS.bit.SYNCBUSY);
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#endif
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}
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@ -628,7 +633,8 @@ void I2SClass::onDmaTransferComplete(int channel)
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#if defined(__SAMD51__)
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// If you want to use this class as output on SAMD51, you can redefine this on arduino's setup function as:
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// I2S = I2SClass(I2S_DEVICE, I2S_CLOCK_GENERATOR, PIN_I2S_SDO, PIN_I2S_SCK, PIN_I2S_FS);
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#if I2S_INTERFACES_COUNT > 0
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I2SClass I2S(I2S_DEVICE, I2S_CLOCK_GENERATOR, PIN_I2S_SDI, PIN_I2S_SCK, PIN_I2S_FS);
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#endif
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@ -53,7 +53,7 @@ public:
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virtual int availableForWrite();
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//void read(int32_t *left, int32_t *right);
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void read(int32_t *left, int32_t *right); // this function is NOT available on Standard Arduino's I2S API, just for testing
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int read(void* buffer, size_t size);
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size_t write(int);
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@ -20,8 +20,6 @@
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#include <Arduino.h>
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//void printRegisters ();
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class I2SDevice_SAMD51 {
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public:
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@ -50,7 +48,7 @@ public:
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inline int glckId(int index) {
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return (index == 0) ? I2S_GCLK_ID_0 : I2S_GCLK_ID_1;
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}
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// New for SAMD51, taken from Adafrui Zero I2S Library ----
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// --- New for SAMD51, taken from Adafrui Zero I2S Library ----
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inline void setMasterClockOutputDivisionFactor(int index, uint8_t mckoutdiv) {
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// printRegisters();
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// Serial.println ("index: " + String(index));
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@ -75,29 +73,30 @@ public:
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i2s.CLKCTRL[index].reg |= I2S_CLKCTRL_FSWIDTH(fswidth);
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}
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inline void setTxMode(int index, int bitsPersample) {
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//while(i2s.SYNCBUSY.reg); // wait for sync
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// added bitsPerSample parameter
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inline void setTxMode(int index, int bitsPerSample) {
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// Previously used here:
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//i2s.RXCTRL.bit.SERMODE = 0x01;
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//i2s.TXCTRL.reg &= ~(0x03); //TODO: why is this not in CMSIS...
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//i2s.TXCTRL.reg &= ~(0x03); //TODO: why is this not in CMSIS... <- I think Atmel's datasheet has an errata, it has no sense to set this serializer as RX
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//i2s.TXCTRL.reg |= 0x01;
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uint8_t wordSize = 0;
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switch (bitsPersample)
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{
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case 8:
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wordSize = I2S_TXCTRL_DATASIZE_8_Val;
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break;
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case 16:
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wordSize = I2S_TXCTRL_DATASIZE_16_Val;
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break;
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case 24:
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wordSize = I2S_TXCTRL_DATASIZE_24_Val;
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break;
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case 32:
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wordSize = I2S_TXCTRL_DATASIZE_32_Val;
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break;
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}
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switch (bitsPerSample)
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{
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case 8:
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wordSize = I2S_TXCTRL_DATASIZE_8_Val;
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break;
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case 16:
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wordSize = I2S_TXCTRL_DATASIZE_16_Val;
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break;
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case 24:
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wordSize = I2S_TXCTRL_DATASIZE_24_Val;
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break;
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case 32:
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wordSize = I2S_TXCTRL_DATASIZE_32_Val;
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break;
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}
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i2s.TXCTRL.reg &= I2S_TXCTRL_RESETVALUE;
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i2s.TXCTRL.reg = I2S_TXCTRL_DMA_SINGLE |
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@ -112,15 +111,16 @@ public:
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// printRegisters();
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// while(true);
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}
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// added bitsPerSample parameter
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inline void setRxMode(int index, int bitsPerSample) {
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inline void setRxMode(int index, int bitsPersample) {
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//i2s.RXCTRL.bit.SERMODE = 0x00;
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//i2s.TXCTRL.reg &= ~(0x03); //TODO: why is this not in CMSIS...
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//i2s.TXCTRL.reg |= 0x00;
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//i2s.RXCTRL.bit.SERMODE = 0x00;
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//i2s.TXCTRL.reg &= ~(0x03); //TODO: why is this not in CMSIS...
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//i2s.TXCTRL.reg |= 0x00;
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uint8_t wordSize = 0;
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switch (bitsPersample)
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switch (bitsPerSample)
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{
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case 8:
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wordSize = I2S_RXCTRL_DATASIZE_8_Val;
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@ -136,20 +136,23 @@ public:
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break;
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}
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//while(i2s.SYNCBUSY.reg); // wait for sync
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i2s.RXCTRL.reg &= I2S_RXCTRL_RESETVALUE;
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i2s.RXCTRL.reg = I2S_RXCTRL_DMA_SINGLE | //I2S_RXCTRL_DMA_MULTIPLE | <- CASCA
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i2s.RXCTRL.reg = I2S_RXCTRL_DMA_SINGLE | //I2S_RXCTRL_DMA_MULTIPLE | <- IT HANGS
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I2S_RXCTRL_MONO_STEREO |
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I2S_RXCTRL_BITREV_MSBIT |
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I2S_RXCTRL_EXTEND_ZERO |
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I2S_RXCTRL_EXTEND_ZERO | // ZERO fills with ONEs and ONE fills with ZEROs, CMSIS errata?
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I2S_RXCTRL_WORDADJ_RIGHT |
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I2S_RXCTRL_DATASIZE(wordSize) |
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I2S_RXCTRL_SLOTADJ_RIGHT |
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I2S_RXCTRL_CLKSEL_CLK0 |
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I2S_RXCTRL_SERMODE_RX;
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// printRegisters();
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// while(true);
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}
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// end new-----
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// -----
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inline void setSerialClockSelectMasterClockDiv(int index) {
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i2s.CLKCTRL[index].bit.SCKSEL = I2S_CLKCTRL_SCKSEL_MCKDIV_Val;
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}
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@ -268,16 +271,19 @@ public:
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}
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}
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// this should be explitted or filtered with "bool txrx"
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inline void enableSerializer(int index) {
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i2s.CTRLA.bit.RXEN = 1;
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i2s.CTRLA.bit.TXEN = 1;
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}
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// this should be explitted or filtered with "bool txrx"
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inline void disableSerializer(int index) {
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i2s.CTRLA.bit.RXEN = 0;
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i2s.CTRLA.bit.TXEN = 0;
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i2s.CTRLA.bit.TXEN = 0;
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}
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// this is also new, dmaTriggerSource also depends on serializer furthermore clock source index
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// rx = 0, tx = 1
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inline int dmaTriggerSource(int index, bool txrx = 0) {
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if (txrx) {
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@ -317,7 +323,7 @@ public:
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inline int rxReady(int index) {
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return (index == 0) ? i2s.INTFLAG.bit.RXRDY0 :i2s.INTFLAG.bit.RXRDY1;
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}
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// ---
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// for blocking read ---
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inline void read(int32_t *left, int32_t *right) {
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// printRegisters ();
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while( (!i2s.INTFLAG.bit.RXRDY0) || i2s.SYNCBUSY.bit.RXDATA );
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@ -355,8 +361,10 @@ public:
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return (void*)&i2s.RXDATA.reg;
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}
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// BOOOM, This is my arduino's embeded debugger xD
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inline void printRegisters()
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{
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{
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// MCLK_APBAMASK
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Serial.println ("SAMD51_MCLK Main Clock (APBA Mask)");
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Serial.println ("(32-bit) MCLK->APBAMASK: 0x" + String(MCLK->APBAMASK.reg, HEX) + "\t, 0b" + String(MCLK->APBAMASK.reg, BIN));
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