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EXPERIMENTAL: add fpga bitstream to Vidor binary

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This commit is contained in:
Martino Facchin 2018-04-13 18:02:23 +02:00
parent 1b0e383c53
commit 73af72d220
2 changed files with 7 additions and 1 deletions
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2
boards.txt
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@ -288,7 +288,7 @@ mkrvidor.pid.1=0x0056
mkrvidor.upload.tool=bossac
mkrvidor.upload.protocol=sam-ba
mkrvidor.upload.maximum_size=262144
mkrvidor.upload.maximum_size=1048576
mkrvidor.upload.use_1200bps_touch=true
mkrvidor.upload.wait_for_upload_port=true
mkrvidor.upload.native_usb=true

6
variants/mkrvidor/linker_scripts/gcc/flash_with_bootloader.ld
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@ -25,6 +25,7 @@
*/
MEMORY
{
FLASH_FPGA (rx) : ORIGIN = 0x00040000, LENGTH = 0x00100000
FLASH (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000-0x2000 /* First 8KB used by bootloader */
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
}
@ -141,6 +142,11 @@ SECTIONS
} > FLASH
*/
.text :
{
KEEP(*(.fpga_bitstream))
} > FLASH_FPGA
__etext = .;
.data : AT (__etext)