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288 changed files with 2158 additions and 21305 deletions
95
.github/ISSUE_TEMPLATE/bug_report.yml
vendored
95
.github/ISSUE_TEMPLATE/bug_report.yml
vendored
|
|
@ -1,95 +0,0 @@
|
|||
name: Bug Report
|
||||
description: Report a problem
|
||||
labels: 'Bug'
|
||||
body:
|
||||
- type: markdown
|
||||
attributes:
|
||||
value: |
|
||||
Thanks for taking the time to fill out this bug report!
|
||||
It's okay to leave some blank if it doesn't apply to your problem.
|
||||
|
||||
- type: dropdown
|
||||
attributes:
|
||||
label: Operating System
|
||||
options:
|
||||
- Linux
|
||||
- MacOS
|
||||
- RaspberryPi OS
|
||||
- Windows 7
|
||||
- Windows 10
|
||||
- Windows 11
|
||||
- Others
|
||||
validations:
|
||||
required: true
|
||||
|
||||
- type: input
|
||||
attributes:
|
||||
label: Arduino IDE version
|
||||
placeholder: e.g Arduino 1.8.15
|
||||
validations:
|
||||
required: true
|
||||
|
||||
- type: input
|
||||
attributes:
|
||||
label: Board
|
||||
placeholder: e.g Metro M4 Express
|
||||
validations:
|
||||
required: true
|
||||
|
||||
- type: input
|
||||
attributes:
|
||||
label: ArduinoCore version
|
||||
description: Can be found under "Board Manager" menu
|
||||
validations:
|
||||
required: true
|
||||
|
||||
- type: textarea
|
||||
attributes:
|
||||
label: Sketch as ATTACHED TXT
|
||||
placeholder: |
|
||||
e.g examples/MassStorage/msc_ramdisk.
|
||||
If it is custom sketch, please provide it as **ATTACHED** files or link to it.
|
||||
Pasting raw long code that hurts readability can get your issue **closed**
|
||||
validations:
|
||||
required: true
|
||||
|
||||
- type: textarea
|
||||
attributes:
|
||||
label: Compiled Log as ATTACHED TXT
|
||||
placeholder: |
|
||||
Compiled log from Arduino IDE as **ATTACHED** txt.
|
||||
Pasting raw long log that hurts readability can get your issue **closed**
|
||||
validations:
|
||||
required: true
|
||||
|
||||
- type: textarea
|
||||
attributes:
|
||||
label: What happened ?
|
||||
placeholder: A clear and concise description of what the bug is.
|
||||
validations:
|
||||
required: true
|
||||
|
||||
- type: textarea
|
||||
attributes:
|
||||
label: How to reproduce ?
|
||||
placeholder: |
|
||||
1. Go to '...'
|
||||
2. Click on '....'
|
||||
3. See error
|
||||
validations:
|
||||
required: true
|
||||
|
||||
- type: textarea
|
||||
attributes:
|
||||
label: Debug Log as ATTACHED TXT
|
||||
placeholder: |
|
||||
Debug log where the issue occurred as attached txt file, best with comments to explain the actual events.
|
||||
validations:
|
||||
required: false
|
||||
|
||||
- type: textarea
|
||||
attributes:
|
||||
label: Screenshots
|
||||
description: If applicable, add screenshots to help explain your problem.
|
||||
validations:
|
||||
required: false
|
||||
5
.github/ISSUE_TEMPLATE/config.yml
vendored
5
.github/ISSUE_TEMPLATE/config.yml
vendored
|
|
@ -1,5 +0,0 @@
|
|||
blank_issues_enabled: false
|
||||
contact_links:
|
||||
- name: Adafruit Support Forum
|
||||
url: https://forums.adafruit.com
|
||||
about: If you have other questions or need help, post it here.
|
||||
20
.github/ISSUE_TEMPLATE/feature_request.md
vendored
20
.github/ISSUE_TEMPLATE/feature_request.md
vendored
|
|
@ -1,20 +0,0 @@
|
|||
---
|
||||
name: Feature request
|
||||
about: Suggest an idea for this project
|
||||
title: ''
|
||||
labels: Feature
|
||||
assignees: ''
|
||||
|
||||
---
|
||||
|
||||
**Is your feature request related to a problem? Please describe.**
|
||||
A clear and concise description of what the problem is. Ex. I'm always frustrated when [...]
|
||||
|
||||
**Describe the solution you'd like**
|
||||
A clear and concise description of what you want to happen.
|
||||
|
||||
**Describe alternatives you've considered**
|
||||
A clear and concise description of any alternative solutions or features you've considered.
|
||||
|
||||
**Additional context**
|
||||
Add any other context or screenshots about the feature request here.
|
||||
61
.github/workflows/githubci.yml
vendored
61
.github/workflows/githubci.yml
vendored
|
|
@ -1,61 +0,0 @@
|
|||
name: Build
|
||||
|
||||
on: [pull_request, push]
|
||||
|
||||
jobs:
|
||||
build:
|
||||
strategy:
|
||||
fail-fast: false
|
||||
matrix:
|
||||
board:
|
||||
# Alphabetical order
|
||||
- 'circuitplayground_m0'
|
||||
- 'feather_m4_can'
|
||||
- 'hallowing'
|
||||
- 'hallowing_m4'
|
||||
- 'metro_m0'
|
||||
- 'metro_m4'
|
||||
- 'pybadge_m4'
|
||||
- 'pygamer_m4'
|
||||
- 'pyportal_m4'
|
||||
- 'pyportal_m4_titano'
|
||||
# with TinyUSB
|
||||
- 'metro_m0:usbstack=tinyusb'
|
||||
- 'metro_m4:speed=120,usbstack=tinyusb'
|
||||
|
||||
runs-on: ubuntu-latest
|
||||
|
||||
steps:
|
||||
- name: Checkout code
|
||||
uses: actions/checkout@v4
|
||||
with:
|
||||
submodules: 'true'
|
||||
|
||||
- name: Install Arduino CLI and Tools
|
||||
run: |
|
||||
# make all our directories we need for files and libraries
|
||||
mkdir $HOME/.arduino15
|
||||
mkdir $HOME/.arduino15/packages
|
||||
mkdir $HOME/Arduino
|
||||
mkdir $HOME/Arduino/libraries
|
||||
curl -fsSL https://raw.githubusercontent.com/arduino/arduino-cli/master/install.sh | sh
|
||||
echo "$GITHUB_WORKSPACE/bin" >> $GITHUB_PATH
|
||||
|
||||
- name: Install BSP and Libraries
|
||||
env:
|
||||
BSP_URL: https://adafruit.github.io/arduino-board-index/package_adafruit_index.json
|
||||
BSP_PATH: .arduino15/packages/adafruit/hardware/samd
|
||||
run: |
|
||||
arduino-cli config init
|
||||
arduino-cli core update-index
|
||||
arduino-cli core update-index --additional-urls $BSP_URL
|
||||
arduino-cli core install arduino:samd --additional-urls $BSP_URL
|
||||
arduino-cli core install adafruit:samd --additional-urls $BSP_URL
|
||||
# Replace release BSP with our code
|
||||
BSP_VERSION=`eval ls $HOME/$BSP_PATH`
|
||||
rm -r $HOME/$BSP_PATH/*
|
||||
ln -s $GITHUB_WORKSPACE $HOME/$BSP_PATH/$BSP_VERSION
|
||||
arduino-cli lib install "Adafruit NeoPixel" "Adafruit seesaw Library" "Adafruit SPIFlash" "FlashStorage" "MIDI Library" "SD" "SdFat - Adafruit Fork"
|
||||
|
||||
- name: Build examples
|
||||
run: python3 tools/build_all.py ${{ matrix.board }}
|
||||
3
.gitignore
vendored
3
.gitignore
vendored
|
|
@ -2,5 +2,4 @@
|
|||
*.atsuo
|
||||
|
||||
bootloaders/*/build/
|
||||
*~
|
||||
/libraries/**/build/
|
||||
*~
|
||||
6
.gitmodules
vendored
6
.gitmodules
vendored
|
|
@ -1,6 +0,0 @@
|
|||
[submodule "libraries/Adafruit_TinyUSB_Arduino"]
|
||||
path = libraries/Adafruit_TinyUSB_Arduino
|
||||
url = https://github.com/adafruit/Adafruit_TinyUSB_Arduino.git
|
||||
[submodule "libraries/Adafruit_ZeroDMA"]
|
||||
path = libraries/Adafruit_ZeroDMA
|
||||
url = https://github.com/adafruit/Adafruit_ZeroDMA
|
||||
|
|
@ -1,7 +1,5 @@
|
|||
# Arduino Core for SAMD21 and SAMD51 CPU
|
||||
|
||||
[](https://github.com/adafruit/ArduinoCore-samd/actions)
|
||||
|
||||
This repository contains the source code and configuration files of the Arduino Core
|
||||
for Atmel's SAMD21 and SAMD51 processor (used on the Arduino/Genuino Zero, MKR1000 and MKRZero boards).
|
||||
|
||||
|
|
|
|||
2164
boards.txt
2164
boards.txt
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|
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@ -218,11 +218,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -218,11 +218,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -218,11 +218,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -218,11 +218,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -222,11 +222,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -222,11 +222,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -222,11 +222,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -222,11 +222,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -226,11 +226,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -226,11 +226,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -226,11 +226,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -226,11 +226,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
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|
@ -218,11 +218,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -218,11 +218,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -218,11 +218,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -218,11 +218,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -222,11 +222,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -222,11 +222,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -222,11 +222,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -222,11 +222,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -226,11 +226,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -226,11 +226,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -226,11 +226,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -226,11 +226,7 @@ void I2S_Handler ( void );
|
|||
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
|
||||
*/
|
||||
|
||||
#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
|
||||
#error "Little Endian is already defined, but to different value than expected?!"
|
||||
#else
|
||||
#define LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#define LITTLE_ENDIAN 1
|
||||
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
|
||||
#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
|
||||
|
|
|
|||
|
|
@ -46,6 +46,7 @@ extern "C"{
|
|||
|
||||
// Include Atmel headers
|
||||
#include "sam.h"
|
||||
|
||||
#include "wiring_constants.h"
|
||||
|
||||
#define clockCyclesPerMicrosecond() ( SystemCoreClock / 1000000L )
|
||||
|
|
@ -96,33 +97,8 @@ void loop( void ) ;
|
|||
#undef abs
|
||||
#endif // abs
|
||||
|
||||
#ifdef __cplusplus
|
||||
template<class T, class L>
|
||||
auto min(const T& a, const L& b) -> decltype((b < a) ? b : a)
|
||||
{
|
||||
return (b < a) ? b : a;
|
||||
}
|
||||
|
||||
template<class T, class L>
|
||||
auto max(const T& a, const L& b) -> decltype((b < a) ? b : a)
|
||||
{
|
||||
return (a < b) ? b : a;
|
||||
}
|
||||
#else
|
||||
#ifndef min
|
||||
#define min(a,b) \
|
||||
({ __typeof__ (a) _a = (a); \
|
||||
__typeof__ (b) _b = (b); \
|
||||
_a < _b ? _a : _b; })
|
||||
#endif
|
||||
#ifndef max
|
||||
#define max(a,b) \
|
||||
({ __typeof__ (a) _a = (a); \
|
||||
__typeof__ (b) _b = (b); \
|
||||
_a > _b ? _a : _b; })
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define min(a,b) ((a)<(b)?(a):(b))
|
||||
#define max(a,b) ((a)>(b)?(a):(b))
|
||||
#define abs(x) ((x)>0?(x):-(x))
|
||||
#define constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt)))
|
||||
#define round(x) ((x)>=0?(long)((x)+0.5):(long)((x)-0.5))
|
||||
|
|
@ -148,15 +124,10 @@ void loop( void ) ;
|
|||
#define digitalPinToInterrupt(P) ( P )
|
||||
#endif
|
||||
|
||||
// USB
|
||||
#ifdef USE_TINYUSB
|
||||
// Needed for declaring Serial
|
||||
#include "Adafruit_USBD_CDC.h"
|
||||
#else
|
||||
#include "USB/USBDesc.h"
|
||||
#include "USB/USBCore.h"
|
||||
#include "USB/USBAPI.h"
|
||||
#include "USB/USB_host.h"
|
||||
#endif
|
||||
// USB Device
|
||||
#include "USB/USBDesc.h"
|
||||
#include "USB/USBCore.h"
|
||||
#include "USB/USBAPI.h"
|
||||
#include "USB/USB_host.h"
|
||||
|
||||
#endif // Arduino_h
|
||||
|
|
|
|||
|
|
@ -94,28 +94,6 @@ size_t Print::print(unsigned long n, int base)
|
|||
else return printNumber(n, base);
|
||||
}
|
||||
|
||||
size_t Print::print(long long n, int base)
|
||||
{
|
||||
if (base == 0) {
|
||||
return write(n);
|
||||
} else if (base == 10) {
|
||||
if (n < 0) {
|
||||
int t = print('-');
|
||||
n = -n;
|
||||
return printULLNumber(n, 10) + t;
|
||||
}
|
||||
return printULLNumber(n, 10);
|
||||
} else {
|
||||
return printULLNumber(n, base);
|
||||
}
|
||||
}
|
||||
|
||||
size_t Print::print(unsigned long long n, int base)
|
||||
{
|
||||
if (base == 0) return write(n);
|
||||
else return printULLNumber(n, base);
|
||||
}
|
||||
|
||||
size_t Print::print(double n, int digits)
|
||||
{
|
||||
return printFloat(n, digits);
|
||||
|
|
@ -194,20 +172,6 @@ size_t Print::println(unsigned long num, int base)
|
|||
return n;
|
||||
}
|
||||
|
||||
size_t Print::println(long long num, int base)
|
||||
{
|
||||
size_t n = print(num, base);
|
||||
n += println();
|
||||
return n;
|
||||
}
|
||||
|
||||
size_t Print::println(unsigned long long num, int base)
|
||||
{
|
||||
size_t n = print(num, base);
|
||||
n += println();
|
||||
return n;
|
||||
}
|
||||
|
||||
size_t Print::println(double num, int digits)
|
||||
{
|
||||
size_t n = print(num, digits);
|
||||
|
|
@ -254,81 +218,6 @@ size_t Print::printNumber(unsigned long n, uint8_t base)
|
|||
return write(str);
|
||||
}
|
||||
|
||||
// REFERENCE IMPLEMENTATION FOR ULL
|
||||
// size_t Print::printULLNumber(unsigned long long n, uint8_t base)
|
||||
// {
|
||||
// // if limited to base 10 and 16 the bufsize can be smaller
|
||||
// char buf[65];
|
||||
// char *str = &buf[64];
|
||||
|
||||
// *str = '\0';
|
||||
|
||||
// // prevent crash if called with base == 1
|
||||
// if (base < 2) base = 10;
|
||||
|
||||
// do {
|
||||
// unsigned long long t = n / base;
|
||||
// char c = n - t * base; // faster than c = n%base;
|
||||
// n = t;
|
||||
// *--str = c < 10 ? c + '0' : c + 'A' - 10;
|
||||
// } while(n);
|
||||
|
||||
// return write(str);
|
||||
// }
|
||||
|
||||
// FAST IMPLEMENTATION FOR ULL
|
||||
size_t Print::printULLNumber(unsigned long long n64, uint8_t base)
|
||||
{
|
||||
// if limited to base 10 and 16 the bufsize can be 20
|
||||
char buf[64];
|
||||
uint8_t i = 0;
|
||||
uint8_t innerLoops = 0;
|
||||
|
||||
// prevent crash if called with base == 1
|
||||
if (base < 2) base = 10;
|
||||
|
||||
// process chunks that fit in "16 bit math".
|
||||
uint16_t top = 0xFFFF / base;
|
||||
uint16_t th16 = 1;
|
||||
while (th16 < top)
|
||||
{
|
||||
th16 *= base;
|
||||
innerLoops++;
|
||||
}
|
||||
|
||||
while (n64 > th16)
|
||||
{
|
||||
// 64 bit math part
|
||||
uint64_t q = n64 / th16;
|
||||
uint16_t r = n64 - q*th16;
|
||||
n64 = q;
|
||||
|
||||
// 16 bit math loop to do remainder. (note buffer is filled reverse)
|
||||
for (uint8_t j=0; j < innerLoops; j++)
|
||||
{
|
||||
uint16_t qq = r/base;
|
||||
buf[i++] = r - qq*base;
|
||||
r = qq;
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t n16 = n64;
|
||||
while (n16 > 0)
|
||||
{
|
||||
uint16_t qq = n16/base;
|
||||
buf[i++] = n16 - qq*base;
|
||||
n16 = qq;
|
||||
}
|
||||
|
||||
size_t bytes = i;
|
||||
for (; i > 0; i--)
|
||||
write((char) (buf[i - 1] < 10 ?
|
||||
'0' + buf[i - 1] :
|
||||
'A' + buf[i - 1] - 10));
|
||||
|
||||
return bytes;
|
||||
}
|
||||
|
||||
size_t Print::printFloat(double number, uint8_t digits)
|
||||
{
|
||||
size_t n = 0;
|
||||
|
|
@ -373,4 +262,3 @@ size_t Print::printFloat(double number, uint8_t digits)
|
|||
|
||||
return n;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -37,7 +37,6 @@ class Print
|
|||
private:
|
||||
int write_error;
|
||||
size_t printNumber(unsigned long, uint8_t);
|
||||
size_t printULLNumber(unsigned long long, uint8_t);
|
||||
size_t printFloat(double, uint8_t);
|
||||
protected:
|
||||
void setWriteError(int err = 1) { write_error = err; }
|
||||
|
|
@ -70,8 +69,6 @@ class Print
|
|||
size_t print(unsigned int, int = DEC);
|
||||
size_t print(long, int = DEC);
|
||||
size_t print(unsigned long, int = DEC);
|
||||
size_t print(long long, int = DEC);
|
||||
size_t print(unsigned long long, int = DEC);
|
||||
size_t print(double, int = 2);
|
||||
size_t print(const Printable&);
|
||||
|
||||
|
|
@ -84,8 +81,6 @@ class Print
|
|||
size_t println(unsigned int, int = DEC);
|
||||
size_t println(long, int = DEC);
|
||||
size_t println(unsigned long, int = DEC);
|
||||
size_t println(long long, int = DEC);
|
||||
size_t println(unsigned long long, int = DEC);
|
||||
size_t println(double, int = 2);
|
||||
size_t println(const Printable&);
|
||||
size_t println(void);
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
#if (ARDUINO_SAMD_VARIANT_COMPLIANCE >= 10610)
|
||||
|
||||
extern const uint32_t __text_start__;
|
||||
#define APP_START ((uint32_t)(&__text_start__) + 4)
|
||||
#define APP_START ((volatile uint32_t)(&__text_start__) + 4)
|
||||
|
||||
#else
|
||||
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@
|
|||
// location from which to read.
|
||||
|
||||
#ifndef SERIAL_BUFFER_SIZE
|
||||
#define SERIAL_BUFFER_SIZE 350
|
||||
#define SERIAL_BUFFER_SIZE 256
|
||||
#endif
|
||||
|
||||
template <int N>
|
||||
|
|
|
|||
|
|
@ -537,18 +537,8 @@ bool SERCOM::startTransmissionWIRE(uint8_t address, SercomWireReadWriteFlag flag
|
|||
// 7-bits address + 1-bits R/W
|
||||
address = (address << 0x1ul) | flag;
|
||||
|
||||
// If another master owns the bus or the last bus owner has not properly
|
||||
// sent a stop, return failure early. This will prevent some misbehaved
|
||||
// devices from deadlocking here at the cost of the caller being responsible
|
||||
// for retrying the failed transmission. See SercomWireBusState for the
|
||||
// possible bus states.
|
||||
if(!isBusOwnerWIRE())
|
||||
{
|
||||
if( isBusBusyWIRE() || (isArbLostWIRE() && !isBusIdleWIRE()) || isBusUnknownWIRE() )
|
||||
{
|
||||
return false;
|
||||
}
|
||||
}
|
||||
// Wait idle or owner bus mode
|
||||
while ( !isBusIdleWIRE() && !isBusOwnerWIRE() );
|
||||
|
||||
// Send start and address
|
||||
sercom->I2CM.ADDR.bit.ADDR = address;
|
||||
|
|
@ -556,35 +546,29 @@ bool SERCOM::startTransmissionWIRE(uint8_t address, SercomWireReadWriteFlag flag
|
|||
// Address Transmitted
|
||||
if ( flag == WIRE_WRITE_FLAG ) // Write mode
|
||||
{
|
||||
while( !sercom->I2CM.INTFLAG.bit.MB ) {
|
||||
while( !sercom->I2CM.INTFLAG.bit.MB )
|
||||
{
|
||||
// Wait transmission complete
|
||||
|
||||
// If certain errors occur, the MB bit may never be set (RFTM: SAMD21 sec:28.10.6; SAMD51 sec:36.10.7).
|
||||
// The data transfer errors that can occur (including BUSERR) are all
|
||||
// rolled up into INTFLAG.bit.ERROR from STATUS.reg
|
||||
if (sercom->I2CM.INTFLAG.bit.ERROR) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
}
|
||||
else // Read mode
|
||||
{
|
||||
while( !sercom->I2CM.INTFLAG.bit.SB ) {
|
||||
while( !sercom->I2CM.INTFLAG.bit.SB )
|
||||
{
|
||||
// If the slave NACKS the address, the MB bit will be set.
|
||||
// In that case, send a stop condition and return false.
|
||||
if (sercom->I2CM.INTFLAG.bit.MB) {
|
||||
sercom->I2CM.CTRLB.bit.CMD = 3; // Stop condition
|
||||
return false;
|
||||
}
|
||||
// Wait transmission complete
|
||||
|
||||
// If the slave NACKS the address, the MB bit will be set.
|
||||
// A variety of errors in the STATUS register can set the ERROR bit in the INTFLAG register
|
||||
// In that case, send a stop condition and return false.
|
||||
if (sercom->I2CM.INTFLAG.bit.MB || sercom->I2CM.INTFLAG.bit.ERROR) {
|
||||
sercom->I2CM.CTRLB.bit.CMD = 3; // Stop condition
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
// Clean the 'Slave on Bus' flag, for further usage.
|
||||
//sercom->I2CM.INTFLAG.bit.SB = 0x1ul;
|
||||
}
|
||||
|
||||
|
||||
//ACK received (0: ACK, 1: NACK)
|
||||
if(sercom->I2CM.STATUS.bit.RXNACK)
|
||||
{
|
||||
|
|
@ -603,11 +587,10 @@ bool SERCOM::sendDataMasterWIRE(uint8_t data)
|
|||
|
||||
//Wait transmission successful
|
||||
while(!sercom->I2CM.INTFLAG.bit.MB) {
|
||||
// If a data transfer error occurs, the MB bit may never be set.
|
||||
// Check the error bit and bail if it's set.
|
||||
// The data transfer errors that can occur (including BUSERR) are all
|
||||
// rolled up into INTFLAG.bit.ERROR from STATUS.reg
|
||||
if (sercom->I2CM.INTFLAG.bit.ERROR) {
|
||||
|
||||
// If a bus error occurs, the MB bit may never be set.
|
||||
// Check the bus error bit and bail if it's set.
|
||||
if (sercom->I2CM.STATUS.bit.BUSERR) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
|
@ -651,21 +634,6 @@ bool SERCOM::isBusOwnerWIRE( void )
|
|||
return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_OWNER_STATE;
|
||||
}
|
||||
|
||||
bool SERCOM::isBusUnknownWIRE( void )
|
||||
{
|
||||
return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_UNKNOWN_STATE;
|
||||
}
|
||||
|
||||
bool SERCOM::isArbLostWIRE( void )
|
||||
{
|
||||
return sercom->I2CM.STATUS.bit.ARBLOST == 1;
|
||||
}
|
||||
|
||||
bool SERCOM::isBusBusyWIRE( void )
|
||||
{
|
||||
return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_BUSY_STATE;
|
||||
}
|
||||
|
||||
bool SERCOM::isDataReadyWIRE( void )
|
||||
{
|
||||
return sercom->I2CS.INTFLAG.bit.DRDY;
|
||||
|
|
@ -708,17 +676,9 @@ uint8_t SERCOM::readDataWIRE( void )
|
|||
{
|
||||
if(isMasterWIRE())
|
||||
{
|
||||
while (sercom->I2CM.INTFLAG.bit.SB == 0) {
|
||||
while( sercom->I2CM.INTFLAG.bit.SB == 0 )
|
||||
{
|
||||
// Waiting complete receive
|
||||
// A variety of errors in the STATUS register can set the ERROR bit in the INTFLAG register
|
||||
// In that case, send a stop condition and return false.
|
||||
// readDataWIRE should really be able to indicate an error (which would never be used
|
||||
// because the readDataWIRE callers (in Wire.cpp) should have checked availableWIRE() first and timed it
|
||||
// out if the data never showed up
|
||||
if (sercom->I2CM.INTFLAG.bit.MB || sercom->I2CM.INTFLAG.bit.ERROR) {
|
||||
sercom->I2CM.CTRLB.bit.CMD = 3; // Stop condition
|
||||
return 0xFF;
|
||||
}
|
||||
}
|
||||
|
||||
return sercom->I2CM.DATA.bit.DATA ;
|
||||
|
|
|
|||
|
|
@ -225,9 +225,6 @@ class SERCOM
|
|||
bool isSlaveWIRE( void ) ;
|
||||
bool isBusIdleWIRE( void ) ;
|
||||
bool isBusOwnerWIRE( void ) ;
|
||||
bool isBusUnknownWIRE( void ) ;
|
||||
bool isArbLostWIRE( void );
|
||||
bool isBusBusyWIRE( void );
|
||||
bool isDataReadyWIRE( void ) ;
|
||||
bool isStopDetectedWIRE( void ) ;
|
||||
bool isRestartDetectedWIRE( void ) ;
|
||||
|
|
@ -248,7 +245,7 @@ class SERCOM
|
|||
uint32_t getFreqRef(void) { return freqRef; };
|
||||
#else
|
||||
// The equivalent SAMD21 dummy functions...
|
||||
void setClockSource(int8_t idx, SercomClockSource src, bool core) { (void)idx; (void)src; (void)core; };
|
||||
void setClockSource(int8_t idx, SercomClockSource src, bool core) { };
|
||||
SercomClockSource getClockSource(void) { return SERCOM_CLOCK_SOURCE_FCPU; };
|
||||
uint32_t getFreqRef(void) { return F_CPU; };
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -35,7 +35,6 @@ int Stream::timedRead()
|
|||
do {
|
||||
c = read();
|
||||
if (c >= 0) return c;
|
||||
yield(); // running TinyUSB task
|
||||
} while(millis() - _startMillis < _timeout);
|
||||
return -1; // -1 indicates timeout
|
||||
}
|
||||
|
|
@ -48,7 +47,6 @@ int Stream::timedPeek()
|
|||
do {
|
||||
c = peek();
|
||||
if (c >= 0) return c;
|
||||
yield(); // running TinyUSB task
|
||||
} while(millis() - _startMillis < _timeout);
|
||||
return -1; // -1 indicates timeout
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,6 +20,12 @@
|
|||
#include "Tone.h"
|
||||
#include "variant.h"
|
||||
|
||||
#if defined(__SAMD51__)
|
||||
#define WAIT_TC16_REGS_SYNC(x) while(x->COUNT16.SYNCBUSY.bit.ENABLE);
|
||||
#else
|
||||
#define WAIT_TC16_REGS_SYNC(x) while(x->COUNT16.STATUS.bit.SYNCBUSY);
|
||||
#endif
|
||||
|
||||
uint32_t toneMaxFrequency = F_CPU / 2;
|
||||
uint32_t lastOutputPin = 0xFFFFFFFF;
|
||||
|
||||
|
|
@ -31,24 +37,22 @@ volatile bool toneIsActive = false;
|
|||
volatile bool firstTimeRunning = false;
|
||||
|
||||
#if defined(__SAMD51__)
|
||||
#define TONE_TC TC0
|
||||
#define TONE_TC_IRQn TC0_IRQn
|
||||
#define TONE_TC_GCLK_ID TC0_GCLK_ID
|
||||
#define Tone_Handler TC0_Handler
|
||||
|
||||
#define WAIT_TC16_REGS_SYNC(x) while(x->COUNT16.SYNCBUSY.bit.ENABLE);
|
||||
|
||||
#define TONE_TC TC3
|
||||
#define TONE_TC_IRQn TC3_IRQn
|
||||
#define TONE_TC_GCLK_ID TC3_GCLK_ID
|
||||
#else
|
||||
#define TONE_TC TC5
|
||||
#define TONE_TC_IRQn TC5_IRQn
|
||||
#define Tone_Handler TC5_Handler
|
||||
|
||||
#define WAIT_TC16_REGS_SYNC(x) while(x->COUNT16.STATUS.bit.SYNCBUSY);
|
||||
#define TONE_TC TC5
|
||||
#define TONE_TC_IRQn TC5_IRQn
|
||||
#endif
|
||||
|
||||
#define TONE_TC_TOP 0xFFFF
|
||||
#define TONE_TC_CHANNEL 0
|
||||
|
||||
#if defined(__SAMD51__)
|
||||
void TC2_Handler (void) __attribute__ ((weak, alias("Tone_Handler")));
|
||||
#else
|
||||
void TC5_Handler (void) __attribute__ ((weak, alias("Tone_Handler")));
|
||||
#endif
|
||||
|
||||
static inline void resetTC (Tc* TCx)
|
||||
{
|
||||
// Disable TCx
|
||||
|
|
@ -68,14 +72,6 @@ void toneAccurateClock (uint32_t accurateSystemCoreClockFrequency)
|
|||
|
||||
void tone (uint32_t outputPin, uint32_t frequency, uint32_t duration)
|
||||
{
|
||||
|
||||
// Avoid divide by zero error by calling 'noTone' instead
|
||||
if (frequency == 0)
|
||||
{
|
||||
noTone(outputPin);
|
||||
return;
|
||||
}
|
||||
|
||||
// Configure interrupt request
|
||||
NVIC_DisableIRQ(TONE_TC_IRQn);
|
||||
NVIC_ClearPendingIRQ(TONE_TC_IRQn);
|
||||
|
|
@ -84,16 +80,19 @@ void tone (uint32_t outputPin, uint32_t frequency, uint32_t duration)
|
|||
{
|
||||
firstTimeRunning = true;
|
||||
|
||||
NVIC_SetPriority(TONE_TC_IRQn, 5);
|
||||
NVIC_SetPriority(TONE_TC_IRQn, 0);
|
||||
|
||||
#if defined(__SAMD51__)
|
||||
GCLK->PCHCTRL[TONE_TC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
|
||||
GCLK->PCHCTRL[TONE_TC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
|
||||
#else
|
||||
// Enable GCLK for TC4 and TC5 (timer counter input clock)
|
||||
GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID(GCM_TC4_TC5));
|
||||
while (GCLK->STATUS.bit.SYNCBUSY);
|
||||
#endif
|
||||
}
|
||||
|
||||
//if it's a rest, set to 1Hz (below audio range)
|
||||
frequency = (frequency > 0 ? frequency : 1);
|
||||
|
||||
if (toneIsActive && (outputPin != lastOutputPin))
|
||||
noTone(lastOutputPin);
|
||||
|
|
@ -180,19 +179,9 @@ void tone (uint32_t outputPin, uint32_t frequency, uint32_t duration)
|
|||
|
||||
void noTone (uint32_t outputPin)
|
||||
{
|
||||
/* 'tone' need to run at least once in order to enable GCLK for
|
||||
* the timers used for the tone-functionality. If 'noTone' is called
|
||||
* without ever calling 'tone' before then 'WAIT_TC16_REGS_SYNC(TCx)'
|
||||
* will wait infinitely. The variable 'firstTimeRunning' is set the
|
||||
* 1st time 'tone' is set so it can be used to detect wether or not
|
||||
* 'tone' has been called before.
|
||||
*/
|
||||
if(firstTimeRunning)
|
||||
{
|
||||
resetTC(TONE_TC);
|
||||
digitalWrite(outputPin, LOW);
|
||||
toneIsActive = false;
|
||||
}
|
||||
resetTC(TONE_TC);
|
||||
digitalWrite(outputPin, LOW);
|
||||
toneIsActive = false;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
|
|
@ -16,8 +16,6 @@
|
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef USE_TINYUSB
|
||||
|
||||
#include <Arduino.h>
|
||||
#include <Reset.h> // Needed for auto-reset with 1200bps port touch
|
||||
|
||||
|
|
@ -259,52 +257,6 @@ Serial_::operator bool()
|
|||
return result;
|
||||
}
|
||||
|
||||
int32_t Serial_::readBreak() {
|
||||
uint8_t enableInterrupts = ((__get_PRIMASK() & 0x1) == 0);
|
||||
|
||||
// disable interrupts,
|
||||
// to avoid clearing a breakValue that might occur
|
||||
// while processing the current break value
|
||||
__disable_irq();
|
||||
|
||||
int32_t ret = breakValue;
|
||||
|
||||
breakValue = -1;
|
||||
|
||||
if (enableInterrupts) {
|
||||
// re-enable the interrupts
|
||||
__enable_irq();
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
unsigned long Serial_::baud() {
|
||||
return _usbLineInfo.dwDTERate;
|
||||
}
|
||||
|
||||
uint8_t Serial_::stopbits() {
|
||||
return _usbLineInfo.bCharFormat;
|
||||
}
|
||||
|
||||
uint8_t Serial_::paritytype() {
|
||||
return _usbLineInfo.bParityType;
|
||||
}
|
||||
|
||||
uint8_t Serial_::numbits() {
|
||||
return _usbLineInfo.bDataBits;
|
||||
}
|
||||
|
||||
bool Serial_::dtr() {
|
||||
return _usbLineInfo.lineState & 0x1;
|
||||
}
|
||||
|
||||
bool Serial_::rts() {
|
||||
return _usbLineInfo.lineState & 0x2;
|
||||
}
|
||||
|
||||
Serial_ Serial(USBDevice);
|
||||
|
||||
#endif
|
||||
|
||||
#endif // USE_TINYUSB
|
||||
|
|
|
|||
|
|
@ -17,8 +17,6 @@
|
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef USE_TINYUSB
|
||||
|
||||
#include "USBAPI.h"
|
||||
#include "USBDesc.h"
|
||||
#include "USBCore.h"
|
||||
|
|
@ -115,6 +113,4 @@ PluggableUSB_::PluggableUSB_() : lastIf(CDC_ACM_INTERFACE + CDC_INTERFACE_COUNT)
|
|||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif // USE_TINYUSB
|
||||
#endif
|
||||
|
|
@ -5,7 +5,6 @@
|
|||
* Author: deanm
|
||||
*/
|
||||
|
||||
#ifndef USE_TINYUSB
|
||||
|
||||
#include "SAMD21_USBDevice.h"
|
||||
|
||||
|
|
@ -37,5 +36,3 @@ void USBDevice_SAMD21G18x::calibrate() {
|
|||
usb.PADCAL.bit.TRANSP = pad_transp;
|
||||
usb.PADCAL.bit.TRIM = pad_trim;
|
||||
}
|
||||
|
||||
#endif // USE_TINYUSB
|
||||
|
|
|
|||
|
|
@ -85,7 +85,7 @@ public:
|
|||
uint32_t sendControl(int /* ep */, const void *data, uint32_t len) { return sendControl(data, len); }
|
||||
uint32_t recvControl(void *data, uint32_t len);
|
||||
uint32_t sendConfiguration(uint32_t maxlen);
|
||||
bool sendStringDescriptor(const uint8_t *string, uint32_t maxlen);
|
||||
bool sendStringDescriptor(const uint8_t *string, uint8_t maxlen);
|
||||
void initControl(int end);
|
||||
uint8_t SendInterfaces(uint32_t* total);
|
||||
void packMessages(bool val);
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
License along with this library; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#ifndef USE_TINYUSB
|
||||
|
||||
#if defined(USBCON)
|
||||
|
||||
#include <Arduino.h>
|
||||
|
|
@ -110,12 +110,12 @@ static EPHandler *epHandlers[7] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL};
|
|||
// Send a USB descriptor string. The string is stored as a
|
||||
// plain ASCII string but is sent out as UTF-16 with the
|
||||
// correct 2-byte prefix
|
||||
bool USBDeviceClass::sendStringDescriptor(const uint8_t *string, uint32_t maxlen)
|
||||
bool USBDeviceClass::sendStringDescriptor(const uint8_t *string, uint8_t maxlen)
|
||||
{
|
||||
if (maxlen < 2)
|
||||
return false;
|
||||
|
||||
uint8_t* buffer = (uint8_t*)malloc(maxlen);
|
||||
uint8_t buffer[maxlen];
|
||||
buffer[0] = strlen((const char*)string) * 2 + 2;
|
||||
buffer[1] = 0x03;
|
||||
|
||||
|
|
@ -126,9 +126,7 @@ bool USBDeviceClass::sendStringDescriptor(const uint8_t *string, uint32_t maxlen
|
|||
buffer[i] = 0;
|
||||
}
|
||||
|
||||
bool ret = USBDevice.sendControl(buffer, i);
|
||||
free(buffer);
|
||||
return ret;
|
||||
return USBDevice.sendControl(buffer, i);
|
||||
}
|
||||
|
||||
bool _dry_run = false;
|
||||
|
|
@ -246,25 +244,26 @@ bool USBDeviceClass::sendDescriptor(USBSetup &setup)
|
|||
}
|
||||
else if (setup.wValueL == ISERIAL) {
|
||||
#ifdef PLUGGABLE_USB_ENABLED
|
||||
#ifdef __SAMD51__
|
||||
#define SERIAL_NUMBER_WORD_0 *(volatile uint32_t*)(0x008061FC)
|
||||
#define SERIAL_NUMBER_WORD_1 *(volatile uint32_t*)(0x00806010)
|
||||
#define SERIAL_NUMBER_WORD_2 *(volatile uint32_t*)(0x00806014)
|
||||
#define SERIAL_NUMBER_WORD_3 *(volatile uint32_t*)(0x00806018)
|
||||
#else // samd21
|
||||
#if defined(__SAMD51__)
|
||||
char name[ISERIAL_MAX_LEN];
|
||||
PluggableUSB().getShortName(name);
|
||||
return sendStringDescriptor((uint8_t*)name, setup.wLength);
|
||||
#else
|
||||
// from section 9.3.3 of the datasheet
|
||||
#define SERIAL_NUMBER_WORD_0 *(volatile uint32_t*)(0x0080A00C)
|
||||
#define SERIAL_NUMBER_WORD_1 *(volatile uint32_t*)(0x0080A040)
|
||||
#define SERIAL_NUMBER_WORD_2 *(volatile uint32_t*)(0x0080A044)
|
||||
#define SERIAL_NUMBER_WORD_3 *(volatile uint32_t*)(0x0080A048)
|
||||
#endif
|
||||
|
||||
char name[ISERIAL_MAX_LEN];
|
||||
utox8(SERIAL_NUMBER_WORD_0, &name[0]);
|
||||
utox8(SERIAL_NUMBER_WORD_1, &name[8]);
|
||||
utox8(SERIAL_NUMBER_WORD_2, &name[16]);
|
||||
utox8(SERIAL_NUMBER_WORD_3, &name[24]);
|
||||
name[32] = '\0';
|
||||
|
||||
PluggableUSB().getShortName(&name[32]);
|
||||
return sendStringDescriptor((uint8_t*)name, setup.wLength);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
else {
|
||||
|
|
@ -879,7 +878,6 @@ bool USBDeviceClass::handleStandardSetup(USBSetup &setup)
|
|||
sendZlp(0);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
|
||||
case SET_ADDRESS:
|
||||
setAddress(setup.wValueL);
|
||||
|
|
@ -1041,4 +1039,3 @@ void USBDeviceClass::ISRHandler()
|
|||
USBDeviceClass USBDevice;
|
||||
|
||||
#endif
|
||||
#endif // USE_TINYUSB
|
||||
|
|
|
|||
|
|
@ -17,7 +17,6 @@
|
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef USE_TINYUSB
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
|
|
@ -554,5 +553,3 @@ uint32_t UHD_Pipe_Is_Transfer_Complete(uint32_t ul_pipe, uint32_t ul_token_type)
|
|||
// }
|
||||
|
||||
#endif // HOST_DEFINED
|
||||
|
||||
#endif // USE_TINYUSB
|
||||
|
|
|
|||
|
|
@ -250,9 +250,8 @@ void detachInterrupt(uint32_t pin)
|
|||
* External Interrupt Controller NVIC Interrupt Handler
|
||||
*/
|
||||
#if defined(__SAMD51__)
|
||||
void InterruptHandler(uint32_t unused_i)
|
||||
void InterruptHandler(uint32_t i)
|
||||
{
|
||||
(void)unused_i;
|
||||
// Calling the routine directly from -here- takes about 1us
|
||||
// Depending on where you are in the list it will take longer
|
||||
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ extern "C" {
|
|||
#define FALLING 3
|
||||
#define RISING 4
|
||||
|
||||
//#define DEFAULT 1
|
||||
#define DEFAULT 1
|
||||
#define EXTERNAL 0
|
||||
|
||||
typedef void (*voidFuncPtr)(void);
|
||||
|
|
|
|||
|
|
@ -693,21 +693,12 @@ void String::remove(unsigned int index){
|
|||
}
|
||||
|
||||
void String::remove(unsigned int index, unsigned int count){
|
||||
// removes characters from the middle of a string.
|
||||
if (count <= 0) { return; } // exit if nothing to remove
|
||||
if (index >= len) { return; } // ensure start is within string length; thus, ensures (len-index >= 1)
|
||||
if (count > len - index) { // ensure characters to remove is no larger than total length remaining
|
||||
count = len - index;
|
||||
}
|
||||
char *writeTo = buffer + index;
|
||||
char *copyFrom = buffer + index + count;
|
||||
if (index >= len) { return; }
|
||||
if (count <= 0) { return; }
|
||||
if (count > len - index) { count = len - index; }
|
||||
char *writeTo = buffer + index;
|
||||
len = len - count;
|
||||
|
||||
// strncpy() cannot be used with overlapping buffers, so copy one char at a time
|
||||
unsigned int charactersToMove = len - index; // yes, uses post-adjusted length
|
||||
for (unsigned int i = 0; i < charactersToMove; i++, writeTo++, copyFrom++) {
|
||||
*writeTo = *copyFrom;
|
||||
}
|
||||
strncpy(writeTo, buffer + index + count,len - index);
|
||||
buffer[len] = 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -57,8 +57,6 @@ typedef enum _EAnalogChannel
|
|||
ADC_Channel19=19,
|
||||
DAC_Channel0,
|
||||
DAC_Channel1,
|
||||
ADC_Channel_Bandgap=0x1B,
|
||||
ADC_Channel_PTAT=0x1C,
|
||||
} EAnalogChannel ;
|
||||
|
||||
#if defined(__SAMD51__)
|
||||
|
|
@ -90,7 +88,7 @@ typedef enum _ETCChannel
|
|||
TC3_CH0 = (6<<8)|(0),
|
||||
TC3_CH1 = (6<<8)|(1),
|
||||
} ETCChannel ;
|
||||
#elif defined(__SAMD51J19A__) || defined(__SAMD51J20A__) || defined(__SAME51J19A__)
|
||||
#elif defined(__SAMD51J19A__) || defined(__SAMD51J20A__)
|
||||
|
||||
typedef enum _ETCChannel
|
||||
{
|
||||
|
|
@ -101,16 +99,10 @@ typedef enum _ETCChannel
|
|||
TCC0_CH3 = (0<<8)|(3),
|
||||
TCC0_CH4 = (0<<8)|(4),
|
||||
TCC0_CH5 = (0<<8)|(5),
|
||||
TCC0_CH6 = (0<<8)|(6),
|
||||
TCC0_CH7 = (0<<8)|(7),
|
||||
TCC1_CH0 = (1<<8)|(0),
|
||||
TCC1_CH1 = (1<<8)|(1),
|
||||
TCC1_CH2 = (1<<8)|(2),
|
||||
TCC1_CH3 = (1<<8)|(3),
|
||||
TCC1_CH4 = (1<<8)|(4),
|
||||
TCC1_CH5 = (1<<8)|(5),
|
||||
TCC1_CH6 = (1<<8)|(6),
|
||||
TCC1_CH7 = (1<<8)|(7),
|
||||
TCC2_CH0 = (2<<8)|(0),
|
||||
TCC2_CH1 = (2<<8)|(1),
|
||||
TCC2_CH2 = (2<<8)|(2),
|
||||
|
|
@ -130,13 +122,9 @@ typedef enum _ETCChannel
|
|||
TC4_CH1 = (9<<8)|(1),
|
||||
TC5_CH0 = (10<<8)|(0),
|
||||
TC5_CH1 = (10<<8)|(1),
|
||||
TC6_CH0 = (11<<8)|(0),
|
||||
TC6_CH1 = (11<<8)|(1),
|
||||
TC7_CH0 = (12<<8)|(0),
|
||||
TC7_CH1 = (12<<8)|(1),
|
||||
} ETCChannel ;
|
||||
|
||||
#elif defined(__SAME53N20A__) || defined(__SAME53N19A__) || defined(__SAME54P20A__) || defined(__SAME54P19A__) || defined(__SAME54N20A__) || defined(__SAME54N19A__) || defined(__SAMD51P20A__) || defined(__SAMD51P19A__) || defined(__SAMD51N20A__) || defined(__SAMD51N19A__) || defined(__SAME51N20A__) || defined(__SAME51N19A__)
|
||||
#elif defined(__SAMD51P19A__) || defined(__SAMD51P20A__)
|
||||
|
||||
typedef enum _ETCChannel
|
||||
{
|
||||
|
|
@ -210,12 +198,6 @@ typedef enum _ETCChannel
|
|||
TC4_CH1 = (4<<8)|(1),
|
||||
TC5_CH0 = (5<<8)|(0),
|
||||
TC5_CH1 = (5<<8)|(1),
|
||||
#if defined (__SAMD21J18A__)
|
||||
TC6_CH0 = (6<<8)|(0),
|
||||
TC6_CH1 = (6<<8)|(1),
|
||||
TC7_CH0 = (7<<8)|(0),
|
||||
TC7_CH1 = (7<<8)|(1),
|
||||
#endif // __SAMD21J18A__
|
||||
} ETCChannel ;
|
||||
|
||||
// Definitions for PWM channels
|
||||
|
|
|
|||
|
|
@ -25,14 +25,8 @@
|
|||
#ifndef _IO_H_
|
||||
#define _IO_H_
|
||||
|
||||
#ifdef __SAMD51__
|
||||
#define RAMSTART (HSRAM_ADDR)
|
||||
#define RAMSIZE (HSRAM_SIZE)
|
||||
#else
|
||||
#define RAMSTART (HMCRAMC0_ADDR)
|
||||
#define RAMSIZE (HMCRAMC0_SIZE)
|
||||
#endif
|
||||
|
||||
#define RAMSTART (HMCRAMC0_ADDR)
|
||||
#define RAMSIZE (HMCRAMC0_SIZE)
|
||||
#define RAMEND (RAMSTART + RAMSIZE - 1)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -127,13 +127,10 @@ void SERCOM7_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Han
|
|||
void SERCOM7_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM7_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM7_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void CAN0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void CAN1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void USB_0_Handler ( void ) __attribute__ ((weak));
|
||||
void USB_1_Handler ( void ) __attribute__ ((weak));
|
||||
void USB_2_Handler ( void ) __attribute__ ((weak));
|
||||
void USB_3_Handler ( void ) __attribute__ ((weak));
|
||||
void GMAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TCC0_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TCC0_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TCC0_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
|
|
@ -196,7 +193,6 @@ extern uint32_t __bss_end__;
|
|||
extern uint32_t __StackTop;
|
||||
|
||||
/* Exception Table */
|
||||
__attribute__ ((used))
|
||||
__attribute__ ((section(".isr_vector"))) const DeviceVectors exception_table =
|
||||
{
|
||||
/* Configure Initial Stack Pointer, using linker-generated symbols */
|
||||
|
|
@ -298,13 +294,13 @@ __attribute__ ((section(".isr_vector"))) const DeviceVectors exception_table =
|
|||
(void*) SERCOM7_1_Handler, /* 75 Serial Communication Interface 7 IRQ 1 */
|
||||
(void*) SERCOM7_2_Handler, /* 76 Serial Communication Interface 7 IRQ 2 */
|
||||
(void*) SERCOM7_3_Handler, /* 77 Serial Communication Interface 7 IRQ 3 */
|
||||
(void*) CAN0_Handler, /* 78 Control Area Network 0 (SAM E5x) */
|
||||
(void*) CAN1_Handler, /* 79 Control Area Network 0 (SAM E5x) */
|
||||
(void*) (0UL),
|
||||
(void*) (0UL),
|
||||
(void*) USB_0_Handler, /* 80 Universal Serial Bus IRQ 0 */
|
||||
(void*) USB_1_Handler, /* 81 Universal Serial Bus IRQ 1 */
|
||||
(void*) USB_2_Handler, /* 82 Universal Serial Bus IRQ 2 */
|
||||
(void*) USB_3_Handler, /* 83 Universal Serial Bus IRQ 3 */
|
||||
(void*) GMAC_Handler, /* 84 Ethernet MAC */
|
||||
(void*) (0UL),
|
||||
(void*) TCC0_0_Handler, /* 85 Timer Counter Control 0 IRQ 0 */
|
||||
(void*) TCC0_1_Handler, /* 86 Timer Counter Control 0 IRQ 1 */
|
||||
(void*) TCC0_2_Handler, /* 87 Timer Counter Control 0 IRQ 2 */
|
||||
|
|
@ -408,7 +404,6 @@ extern uint32_t __bss_end__;
|
|||
extern uint32_t __StackTop;
|
||||
|
||||
/* Exception Table */
|
||||
__attribute__ ((used))
|
||||
__attribute__ ((section(".isr_vector"))) const DeviceVectors exception_table =
|
||||
{
|
||||
/* Configure Initial Stack Pointer, using linker-generated symbols */
|
||||
|
|
|
|||
|
|
@ -117,17 +117,6 @@ void SysTick_DefaultHandler(void)
|
|||
tickReset();
|
||||
}
|
||||
|
||||
#if defined(USE_TINYUSB)
|
||||
|
||||
// run TinyUSB background task when yield()
|
||||
void yield(void)
|
||||
{
|
||||
TinyUSB_Device_Task();
|
||||
TinyUSB_Device_FlushCDC();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -28,7 +28,6 @@
|
|||
static void __empty() {
|
||||
// Empty
|
||||
}
|
||||
|
||||
void yield(void) __attribute__ ((weak, alias("__empty")));
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -39,10 +39,7 @@ int main( void )
|
|||
initVariant();
|
||||
|
||||
delay(1);
|
||||
|
||||
#if defined(USE_TINYUSB)
|
||||
TinyUSB_Device_Init(0);
|
||||
#elif defined(USBCON)
|
||||
#if defined(USBCON)
|
||||
USBDevice.init();
|
||||
USBDevice.attach();
|
||||
#endif
|
||||
|
|
@ -52,8 +49,6 @@ int main( void )
|
|||
for (;;)
|
||||
{
|
||||
loop();
|
||||
yield(); // yield run usb background task
|
||||
|
||||
if (serialEventRun) serialEventRun();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -164,19 +164,18 @@ void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
|
|||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
int32_t diff;
|
||||
uint32_t diffCrnt = 0;
|
||||
int32_t diff, diffCrnt = 0;
|
||||
uint32_t maxDiff = 0;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
diff = pIn[i] - pOut[i];
|
||||
diffCrnt = (uint32_t)( (diff > 0) ? diff : -diff );
|
||||
diff = pIn[i] - pOut[i];
|
||||
diffCrnt = (diff > 0) ? diff : -diff;
|
||||
|
||||
if(diffCrnt > maxDiff)
|
||||
{
|
||||
maxDiff = diffCrnt;
|
||||
}
|
||||
if(diffCrnt > maxDiff)
|
||||
{
|
||||
maxDiff = diffCrnt;
|
||||
}
|
||||
}
|
||||
|
||||
return(maxDiff);
|
||||
|
|
@ -193,19 +192,18 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
|
|||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
int32_t diff;
|
||||
uint32_t diffCrnt = 0;
|
||||
int32_t diff, diffCrnt = 0;
|
||||
uint32_t maxDiff = 0;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
diff = pIn[i] - pOut[i];
|
||||
diffCrnt = (uint32_t)( (diff > 0) ? diff : -diff );
|
||||
diff = pIn[i] - pOut[i];
|
||||
diffCrnt = (diff > 0) ? diff : -diff;
|
||||
|
||||
if(diffCrnt > maxDiff)
|
||||
{
|
||||
maxDiff = diffCrnt;
|
||||
}
|
||||
if(diffCrnt > maxDiff)
|
||||
{
|
||||
maxDiff = diffCrnt;
|
||||
}
|
||||
}
|
||||
|
||||
return(maxDiff);
|
||||
|
|
|
|||
|
|
@ -41,10 +41,10 @@ uint32_t pulseIn(uint32_t pin, uint32_t state, uint32_t timeout)
|
|||
* No assembly required, no conversion of loop counts to times (which is
|
||||
* worrisome in the presence of cache.)
|
||||
*/
|
||||
const volatile uint32_t *port = &(PORT->Group[p.ulPort].IN.reg);
|
||||
volatile uint32_t *port = &(PORT->Group[p.ulPort].IN.reg);
|
||||
uint32_t usCallStart; // microseconds at start of call, for timeout.
|
||||
uint32_t usPulseStart; // microseconds at start of measured pulse.
|
||||
usCallStart = usPulseStart = micros();
|
||||
usCallStart = micros();
|
||||
// wait for any previous pulse to end
|
||||
while ((*port & bit) == stateMask) {
|
||||
if (micros() - usCallStart > timeout)
|
||||
|
|
|
|||
|
|
@ -63,7 +63,7 @@ void SystemInit( void )
|
|||
* 1) Enable XOSC32K clock (External on-board 32.768Hz oscillator)
|
||||
*/
|
||||
|
||||
OSC32KCTRL->XOSC32K.reg = OSC32KCTRL_XOSC32K_ENABLE | OSC32KCTRL_XOSC32K_EN1K | OSC32KCTRL_XOSC32K_EN32K | OSC32KCTRL_XOSC32K_CGM_XT | OSC32KCTRL_XOSC32K_XTALEN;
|
||||
OSC32KCTRL->XOSC32K.reg = OSC32KCTRL_XOSC32K_ENABLE | OSC32KCTRL_XOSC32K_EN32K | OSC32KCTRL_XOSC32K_EN32K | OSC32KCTRL_XOSC32K_CGM_XT | OSC32KCTRL_XOSC32K_XTALEN;
|
||||
|
||||
while( (OSC32KCTRL->STATUS.reg & OSC32KCTRL_STATUS_XOSC32KRDY) == 0 ){
|
||||
/* Wait for oscillator to be ready */
|
||||
|
|
@ -261,47 +261,6 @@ void SystemInit( void )
|
|||
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
|
||||
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
|
||||
|
||||
/* ----------------------------------------------------------------------------------------------
|
||||
* 5) Load AC factory calibration values
|
||||
*/
|
||||
|
||||
uint32_t bias0 = (*((uint32_t *)AC_FUSES_BIAS0_ADDR) & AC_FUSES_BIAS0_Msk) >> AC_FUSES_BIAS0_Pos;
|
||||
AC->CALIB.reg = AC_CALIB_BIAS0(bias0);
|
||||
|
||||
/* ----------------------------------------------------------------------------------------------
|
||||
* 6) Load ADC factory calibration values
|
||||
*/
|
||||
|
||||
// ADC0 Bias Calibration
|
||||
uint32_t biascomp = (*((uint32_t *)ADC0_FUSES_BIASCOMP_ADDR) & ADC0_FUSES_BIASCOMP_Msk) >> ADC0_FUSES_BIASCOMP_Pos;
|
||||
uint32_t biasr2r = (*((uint32_t *)ADC0_FUSES_BIASR2R_ADDR) & ADC0_FUSES_BIASR2R_Msk) >> ADC0_FUSES_BIASR2R_Pos;
|
||||
uint32_t biasref = (*((uint32_t *)ADC0_FUSES_BIASREFBUF_ADDR) & ADC0_FUSES_BIASREFBUF_Msk) >> ADC0_FUSES_BIASREFBUF_Pos;
|
||||
|
||||
ADC0->CALIB.reg = ADC_CALIB_BIASREFBUF(biasref)
|
||||
| ADC_CALIB_BIASR2R(biasr2r)
|
||||
| ADC_CALIB_BIASCOMP(biascomp);
|
||||
|
||||
// ADC1 Bias Calibration
|
||||
biascomp = (*((uint32_t *)ADC1_FUSES_BIASCOMP_ADDR) & ADC1_FUSES_BIASCOMP_Msk) >> ADC1_FUSES_BIASCOMP_Pos;
|
||||
biasr2r = (*((uint32_t *)ADC1_FUSES_BIASR2R_ADDR) & ADC1_FUSES_BIASR2R_Msk) >> ADC1_FUSES_BIASR2R_Pos;
|
||||
biasref = (*((uint32_t *)ADC1_FUSES_BIASREFBUF_ADDR) & ADC1_FUSES_BIASREFBUF_Msk) >> ADC1_FUSES_BIASREFBUF_Pos;
|
||||
|
||||
ADC1->CALIB.reg = ADC_CALIB_BIASREFBUF(biasref)
|
||||
| ADC_CALIB_BIASR2R(biasr2r)
|
||||
| ADC_CALIB_BIASCOMP(biascomp);
|
||||
|
||||
/* ----------------------------------------------------------------------------------------------
|
||||
* 7) Load USB factory calibration values
|
||||
*/
|
||||
|
||||
//USB Calibration
|
||||
uint32_t usbtransn = (*((uint32_t *)USB_FUSES_TRANSN_ADDR) & USB_FUSES_TRANSN_Msk) >> USB_FUSES_TRANSN_Pos;
|
||||
uint32_t usbtransp = (*((uint32_t *)USB_FUSES_TRANSP_ADDR) & USB_FUSES_TRANSP_Msk) >> USB_FUSES_TRANSP_Pos;
|
||||
uint32_t usbtrim = (*((uint32_t *)USB_FUSES_TRIM_ADDR) & USB_FUSES_TRIM_Msk) >> USB_FUSES_TRIM_Pos;
|
||||
USB->DEVICE.PADCAL.reg = USB_PADCAL_TRIM(usbtrim)
|
||||
| USB_PADCAL_TRANSN(usbtransn)
|
||||
| USB_PADCAL_TRANSP(usbtransp);
|
||||
|
||||
//*************** END SAMD51 *************************//
|
||||
|
||||
#else
|
||||
|
|
@ -577,3 +536,4 @@ void SystemInit( void )
|
|||
NVMCTRL->CTRLB.bit.MANW = 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -92,7 +92,7 @@ void init( void )
|
|||
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0 | PM_APBCMASK_SERCOM1 | PM_APBCMASK_SERCOM2 | PM_APBCMASK_SERCOM3 | PM_APBCMASK_SERCOM4 | PM_APBCMASK_SERCOM5 ;
|
||||
|
||||
// Clock TC/TCC for Pulse and Analog
|
||||
PM->APBCMASK.reg |= PM_APBCMASK_TCC0 | PM_APBCMASK_TCC1 | PM_APBCMASK_TCC2 | PM_APBCMASK_TC3 | PM_APBCMASK_TC4 | PM_APBCMASK_TC5 | PM_APBCMASK_TC6 | PM_APBCMASK_TC7;
|
||||
PM->APBCMASK.reg |= PM_APBCMASK_TCC0 | PM_APBCMASK_TCC1 | PM_APBCMASK_TCC2 | PM_APBCMASK_TC3 | PM_APBCMASK_TC4 | PM_APBCMASK_TC5 ;
|
||||
|
||||
// ATSAMR, for example, doesn't have a DAC
|
||||
#ifdef PM_APBCMASK_DAC
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ static int _writeResolution = 12;
|
|||
static int _dacResolution = 12;
|
||||
#else
|
||||
static int _writeResolution = 8;
|
||||
//static int _dacResolution = 10;
|
||||
static int _dacResolution = 10;
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -280,8 +280,8 @@ uint32_t analogRead(uint32_t pin)
|
|||
#ifdef DAC
|
||||
|
||||
#if defined(__SAMD51__)
|
||||
if (pin == PIN_DAC0 || pin == PIN_DAC1) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
|
||||
uint8_t channel = (pin == PIN_DAC0 ? 0 : 1);
|
||||
if (pin == A0 || pin == A1) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
|
||||
uint8_t channel = (pin == PIN_A0 ? 0 : 1);
|
||||
|
||||
if(dacEnabled[channel]){
|
||||
dacEnabled[channel] = false;
|
||||
|
|
@ -298,7 +298,7 @@ uint32_t analogRead(uint32_t pin)
|
|||
|
||||
while (DAC->SYNCBUSY.bit.ENABLE);
|
||||
#else
|
||||
if (pin == PIN_DAC0) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
|
||||
if (pin == A0) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
|
||||
syncDAC();
|
||||
|
||||
DAC->CTRLA.bit.ENABLE = 0x00; // Disable DAC
|
||||
|
|
@ -375,9 +375,6 @@ uint32_t analogRead(uint32_t pin)
|
|||
syncADC();
|
||||
ADC->SWTRIG.bit.START = 1;
|
||||
|
||||
// Waiting for the 1st conversion to complete
|
||||
while (ADC->INTFLAG.bit.RESRDY == 0);
|
||||
|
||||
// Clear the Data Ready flag
|
||||
ADC->INTFLAG.reg = ADC_INTFLAG_RESRDY;
|
||||
|
||||
|
|
@ -413,9 +410,9 @@ void analogWrite(uint32_t pin, uint32_t value)
|
|||
{
|
||||
// DAC handling code
|
||||
#if defined(__SAMD51__)
|
||||
if (pin == PIN_DAC0 || pin == PIN_DAC1) { // 2 DACs on A0 (PA02) and A1 (PA05)
|
||||
if (pin == PIN_A0 || pin == PIN_A1) { // 2 DACs on A0 (PA02) and A1 (PA05)
|
||||
#else
|
||||
if (pin == PIN_DAC0) { // Only 1 DAC on A0 (PA02)
|
||||
if (pin == PIN_A0) { // Only 1 DAC on A0 (PA02)
|
||||
#endif
|
||||
|
||||
#if defined(__SAMD51__)
|
||||
|
|
@ -423,7 +420,7 @@ void analogWrite(uint32_t pin, uint32_t value)
|
|||
value = mapResolution(value, _writeResolution, _dacResolution);
|
||||
|
||||
|
||||
uint8_t channel = (pin == PIN_DAC0 ? 0 : 1);
|
||||
uint8_t channel = (pin == PIN_A0 ? 0 : 1);
|
||||
|
||||
pinPeripheral(pin, PIO_ANALOG);
|
||||
|
||||
|
|
|
|||
|
|
@ -30,48 +30,44 @@ void pinMode( uint32_t ulPin, uint32_t ulMode )
|
|||
return ;
|
||||
}
|
||||
|
||||
EPortType port = g_APinDescription[ulPin].ulPort;
|
||||
uint32_t pin = g_APinDescription[ulPin].ulPin;
|
||||
uint32_t pinMask = (1ul << pin);
|
||||
|
||||
// Set pin mode according to chapter '22.6.3 I/O Pin Configuration'
|
||||
switch ( ulMode )
|
||||
{
|
||||
case INPUT:
|
||||
// Set pin to input mode
|
||||
PORT->Group[port].PINCFG[pin].reg = (uint8_t) (PORT_PINCFG_INEN);
|
||||
PORT->Group[port].DIRCLR.reg = pinMask;
|
||||
break;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
|
||||
break ;
|
||||
|
||||
case INPUT_PULLUP:
|
||||
// Set pin to input mode with pull-up resistor enabled
|
||||
PORT->Group[port].PINCFG[pin].reg = (uint8_t) (PORT_PINCFG_INEN | PORT_PINCFG_PULLEN);
|
||||
PORT->Group[port].DIRCLR.reg = pinMask;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
|
||||
|
||||
// Enable pull level (cf '22.6.3.2 Input Configuration' and '22.8.7 Data Output Value Set')
|
||||
PORT->Group[port].OUTSET.reg = pinMask;
|
||||
break;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].OUTSET.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
|
||||
break ;
|
||||
|
||||
case INPUT_PULLDOWN:
|
||||
// Set pin to input mode with pull-down resistor enabled
|
||||
PORT->Group[port].PINCFG[pin].reg = (uint8_t) (PORT_PINCFG_INEN | PORT_PINCFG_PULLEN);
|
||||
PORT->Group[port].DIRCLR.reg = pinMask;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
|
||||
|
||||
// Enable pull level (cf '22.6.3.2 Input Configuration' and '22.8.6 Data Output Value Clear')
|
||||
PORT->Group[port].OUTCLR.reg = pinMask;
|
||||
break;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].OUTCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
|
||||
break ;
|
||||
|
||||
case OUTPUT:
|
||||
// enable input, to support reading back values, with pullups disabled
|
||||
PORT->Group[port].PINCFG[pin].reg = (uint8_t) (PORT_PINCFG_INEN | PORT_PINCFG_DRVSTR);
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
|
||||
|
||||
// Set pin to output mode
|
||||
PORT->Group[port].DIRSET.reg = pinMask;
|
||||
break;
|
||||
PORT->Group[g_APinDescription[ulPin].ulPort].DIRSET.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
|
||||
break ;
|
||||
|
||||
default:
|
||||
// do nothing
|
||||
break;
|
||||
break ;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -25,8 +25,6 @@
|
|||
|
||||
#include "WVariant.h"
|
||||
|
||||
typedef int PinStatus;
|
||||
|
||||
/**
|
||||
* \brief Configures the specified pin to behave either as an input or an output. See the description of digital pins for details.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1 +0,0 @@
|
|||
Subproject commit c953968c468218d8968138b5ed8482fa565373df
|
||||
|
|
@ -1 +0,0 @@
|
|||
Subproject commit acc5dadb458b2c329757a61dc4f18dda945a0c36
|
||||
654
libraries/Adafruit_ZeroDMA/Adafruit_ZeroDMA.cpp
Normal file
654
libraries/Adafruit_ZeroDMA/Adafruit_ZeroDMA.cpp
Normal file
|
|
@ -0,0 +1,654 @@
|
|||
#include <Adafruit_ZeroDMA.h>
|
||||
#include <malloc.h> // memalign() function
|
||||
|
||||
#include "utility/dma.h"
|
||||
static volatile uint32_t _channelMask = 0; // Bitmask of allocated channels
|
||||
|
||||
// DMA descriptor list entry point (and writeback buffer) per channel
|
||||
__attribute__((__aligned__(16))) static DmacDescriptor // 128 bit alignment
|
||||
_descriptor[DMAC_CH_NUM] SECTION_DMAC_DESCRIPTOR,
|
||||
_writeback[DMAC_CH_NUM] SECTION_DMAC_DESCRIPTOR;
|
||||
|
||||
// Pointer to ZeroDMA object for each channel is needed for the
|
||||
// ISR (in C, outside of class context) to access callbacks.
|
||||
static Adafruit_ZeroDMA *_dmaPtr[DMAC_CH_NUM] = { 0 }; // Init to NULL
|
||||
|
||||
// Adapted from ASF3 interrupt_sam_nvic.c:
|
||||
|
||||
static volatile unsigned long cpu_irq_critical_section_counter = 0;
|
||||
static volatile unsigned char cpu_irq_prev_interrupt_state = 0;
|
||||
|
||||
static void cpu_irq_enter_critical(void) {
|
||||
if(!cpu_irq_critical_section_counter) {
|
||||
if(__get_PRIMASK() == 0) { // IRQ enabled?
|
||||
__disable_irq(); // Disable it
|
||||
__DMB();
|
||||
cpu_irq_prev_interrupt_state = 1;
|
||||
} else {
|
||||
// Make sure the to save the prev state as false
|
||||
cpu_irq_prev_interrupt_state = 0;
|
||||
}
|
||||
}
|
||||
|
||||
cpu_irq_critical_section_counter++;
|
||||
}
|
||||
|
||||
static void cpu_irq_leave_critical(void) {
|
||||
// Check if the user is trying to leave a critical section
|
||||
// when not in a critical section
|
||||
if(cpu_irq_critical_section_counter > 0) {
|
||||
cpu_irq_critical_section_counter--;
|
||||
|
||||
// Only enable global interrupts when the counter
|
||||
// reaches 0 and the state of the global interrupt flag
|
||||
// was enabled when entering critical state */
|
||||
if((!cpu_irq_critical_section_counter) &&
|
||||
cpu_irq_prev_interrupt_state) {
|
||||
__DMB();
|
||||
__enable_irq();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// CONSTRUCTOR -------------------------------------------------------------
|
||||
|
||||
// Constructor initializes Adafruit_ZeroDMA basics but does NOT allocate a
|
||||
// DMA channel (that's done in allocate()) or start a job (that's done in
|
||||
// startJob()). This is because constructors in a global context are called
|
||||
// before a sketch's setup() function, which may have some other hardware
|
||||
// initialization of its own, don't want it clobbering us.
|
||||
Adafruit_ZeroDMA::Adafruit_ZeroDMA(void) {
|
||||
channel = 0xFF; // Channel not yet allocated
|
||||
jobStatus = DMA_STATUS_OK;
|
||||
hasDescriptors = false; // No descriptors allocated yet
|
||||
loopFlag = false;
|
||||
peripheralTrigger = 0; // Software trigger only by default
|
||||
triggerAction = DMA_TRIGGER_ACTON_TRANSACTION;
|
||||
memset(callback, 0, sizeof(callback));
|
||||
}
|
||||
|
||||
// TODO: add destructor? Should stop job, delete descriptors, free channel.
|
||||
|
||||
// INTERRUPT SERVICE ROUTINE -----------------------------------------------
|
||||
|
||||
// This is a C function that exists outside the Adafruit_ZeroDMA context.
|
||||
// DMA channel number is determined from the INTPEND register, from this
|
||||
// we get a ZeroDMA object pointer through the _dmaPtr[] array.
|
||||
// (It's done this way because jobStatus and callback[] are protected
|
||||
// elements in the ZeroDMA object -- we can't touch them in C, but the
|
||||
// next function after this, being part of the ZeroDMA class, can.)
|
||||
|
||||
#ifdef __SAMD51__
|
||||
void DMAC_0_Handler(void) {
|
||||
#else
|
||||
void DMAC_Handler(void) {
|
||||
#endif
|
||||
cpu_irq_enter_critical();
|
||||
|
||||
uint8_t channel = DMAC->INTPEND.bit.ID; // Channel # causing interrupt
|
||||
if(channel < DMAC_CH_NUM) {
|
||||
Adafruit_ZeroDMA *dma;
|
||||
if((dma = _dmaPtr[channel])) { // -> Channel's ZeroDMA object
|
||||
#ifdef __SAMD51__
|
||||
// Call IRQ handler with channel #
|
||||
dma->_IRQhandler(channel);
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel;
|
||||
// Call IRQ handler with interrupt flag(s)
|
||||
dma->_IRQhandler(DMAC->CHINTFLAG.reg);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
|
||||
#ifdef __SAMD51__
|
||||
void DMAC_1_Handler(void) __attribute__((weak, alias("DMAC_0_Handler")));
|
||||
void DMAC_2_Handler(void) __attribute__((weak, alias("DMAC_0_Handler")));
|
||||
void DMAC_3_Handler(void) __attribute__((weak, alias("DMAC_0_Handler")));
|
||||
void DMAC_4_Handler(void) __attribute__((weak, alias("DMAC_0_Handler")));
|
||||
#endif
|
||||
|
||||
void Adafruit_ZeroDMA::_IRQhandler(uint8_t flags) {
|
||||
#ifdef __SAMD51__
|
||||
// 'flags' is initially passed in as channel number,
|
||||
// from which we look up the actual interrupt flags...
|
||||
flags = DMAC->Channel[flags].CHINTFLAG.reg;
|
||||
#endif
|
||||
if(flags & DMAC_CHINTENCLR_TERR) {
|
||||
// Clear error flag
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHINTFLAG.reg = DMAC_CHINTENCLR_TERR;
|
||||
#else
|
||||
DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_TERR;
|
||||
#endif
|
||||
jobStatus = DMA_STATUS_ERR_IO;
|
||||
if(callback[DMA_CALLBACK_TRANSFER_ERROR]) {
|
||||
callback[DMA_CALLBACK_TRANSFER_ERROR](this);
|
||||
}
|
||||
} else if(flags & DMAC_CHINTENCLR_TCMPL) {
|
||||
// Clear transfer complete flag
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHINTFLAG.reg = DMAC_CHINTENCLR_TCMPL;
|
||||
#else
|
||||
DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_TCMPL;
|
||||
#endif
|
||||
jobStatus = DMA_STATUS_OK;
|
||||
if(callback[DMA_CALLBACK_TRANSFER_DONE]) {
|
||||
callback[DMA_CALLBACK_TRANSFER_DONE](this);
|
||||
}
|
||||
} else if(flags & DMAC_CHINTENCLR_SUSP) {
|
||||
// Clear channel suspend flag
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHINTFLAG.reg = DMAC_CHINTENCLR_SUSP;
|
||||
#else
|
||||
DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_SUSP;
|
||||
#endif
|
||||
jobStatus = DMA_STATUS_SUSPEND;
|
||||
if(callback[DMA_CALLBACK_CHANNEL_SUSPEND]) {
|
||||
callback[DMA_CALLBACK_CHANNEL_SUSPEND](this);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// DMA CHANNEL FUNCTIONS ---------------------------------------------------
|
||||
|
||||
// Allocates channel for ZeroDMA object
|
||||
ZeroDMAstatus Adafruit_ZeroDMA::allocate(void) {
|
||||
|
||||
if(channel < DMAC_CH_NUM) return DMA_STATUS_OK; // Already alloc'd!
|
||||
|
||||
// Find index of first free DMA channel. As currently written,
|
||||
// this "does not play well with others" as it assumes _channelMask
|
||||
// is the final arbiter of channels in use (this is true only within
|
||||
// this library -- but other DMA-driven code may have allocated its
|
||||
// own channel(s) elsewhere, sometimes with an equally broken
|
||||
// approach). A possible alternate approach, I haven't tested this
|
||||
// yet, might be to loop through each channel, set DMAC->CHID.bit.ID
|
||||
// and then test whether CHCTRLA.bit.ENABLE is set? But for now...
|
||||
for(channel=0; (channel < DMAC_CH_NUM) &&
|
||||
(_channelMask & (1 << channel)); channel++);
|
||||
// Doesn't help that code later does a software reset of the DMA
|
||||
// controller, which would blow out other DMA-using libraries
|
||||
// anyway (or they're just as likely to blow out this one).
|
||||
// I think it's just an all-or-nothing affair...use one library
|
||||
// for DMA everything, never mix and match.
|
||||
|
||||
if(channel >= DMAC_CH_NUM) { // No free channel!
|
||||
return DMA_STATUS_ERR_NOT_FOUND;
|
||||
}
|
||||
|
||||
cpu_irq_enter_critical();
|
||||
|
||||
if(!_channelMask) { // No channels allocated yet; initialize DMA!
|
||||
#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21)
|
||||
PM->AHBMASK.bit.DMAC_ = 1;
|
||||
#elif defined(__SAMD51__)
|
||||
MCLK->AHBMASK.bit.DMAC_ = 1; // Initialize DMA clocks
|
||||
#else
|
||||
PM->AHBMASK.bit.DMAC_ = 1; // Initialize DMA clocks
|
||||
PM->APBBMASK.bit.DMAC_ = 1;
|
||||
#endif
|
||||
DMAC->CTRL.bit.DMAENABLE = 0; // Disable DMA controller
|
||||
DMAC->CTRL.bit.SWRST = 1; // Perform software reset
|
||||
|
||||
// Initialize descriptor list addresses
|
||||
DMAC->BASEADDR.bit.BASEADDR = (uint32_t)_descriptor;
|
||||
DMAC->WRBADDR.bit.WRBADDR = (uint32_t)_writeback;
|
||||
memset(_descriptor, 0, sizeof(_descriptor));
|
||||
memset(_writeback , 0, sizeof(_writeback));
|
||||
|
||||
// Re-enable DMA controller with all priority levels
|
||||
DMAC->CTRL.reg = DMAC_CTRL_DMAENABLE | DMAC_CTRL_LVLEN(0xF);
|
||||
|
||||
// Enable DMA interrupt at lowest priority
|
||||
#ifdef __SAMD51__
|
||||
IRQn_Type irqs[] = { DMAC_0_IRQn, DMAC_1_IRQn, DMAC_2_IRQn,
|
||||
DMAC_3_IRQn, DMAC_4_IRQn };
|
||||
for(uint8_t i=0; i<(sizeof irqs / sizeof irqs[0]); i++) {
|
||||
NVIC_EnableIRQ(irqs[i]);
|
||||
NVIC_SetPriority(irqs[i], (1<<__NVIC_PRIO_BITS)-1);
|
||||
}
|
||||
#else
|
||||
NVIC_EnableIRQ(DMAC_IRQn);
|
||||
NVIC_SetPriority(DMAC_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
|
||||
#endif
|
||||
}
|
||||
|
||||
_channelMask |= 1 << channel; // Mark channel as allocated
|
||||
_dmaPtr[channel] = this; // Channel-index-to-object pointer
|
||||
|
||||
// Reset the allocated channel
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHCTRLA.bit.ENABLE = 0;
|
||||
DMAC->Channel[channel].CHCTRLA.bit.SWRST = 1;
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel;
|
||||
DMAC->CHCTRLA.bit.ENABLE = 0;
|
||||
DMAC->CHCTRLA.bit.SWRST = 1;
|
||||
#endif
|
||||
|
||||
// Clear software trigger
|
||||
DMAC->SWTRIGCTRL.reg &= ~(1 << channel);
|
||||
|
||||
// Configure default behaviors
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHPRILVL.bit.PRILVL = 0;
|
||||
DMAC->Channel[channel].CHCTRLA.bit.TRIGSRC = peripheralTrigger;
|
||||
DMAC->Channel[channel].CHCTRLA.bit.TRIGACT = triggerAction;
|
||||
DMAC->Channel[channel].CHCTRLA.bit.BURSTLEN =
|
||||
DMAC_CHCTRLA_BURSTLEN_SINGLE_Val; // Single-beat burst length
|
||||
#else
|
||||
DMAC->CHCTRLB.bit.LVL = 0;
|
||||
DMAC->CHCTRLB.bit.TRIGSRC = peripheralTrigger;
|
||||
DMAC->CHCTRLB.bit.TRIGACT = triggerAction;
|
||||
#endif
|
||||
|
||||
cpu_irq_leave_critical();
|
||||
|
||||
return DMA_STATUS_OK;
|
||||
}
|
||||
|
||||
void Adafruit_ZeroDMA::setPriority(dma_priority pri) const {
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHPRILVL.bit.PRILVL = pri;
|
||||
#else
|
||||
DMAC->CHCTRLB.bit.LVL = pri;
|
||||
#endif
|
||||
}
|
||||
|
||||
// Deallocate DMA channel
|
||||
// TODO: should this delete/deallocate the descriptor list?
|
||||
ZeroDMAstatus Adafruit_ZeroDMA::free(void) {
|
||||
|
||||
ZeroDMAstatus status = DMA_STATUS_OK;
|
||||
|
||||
cpu_irq_enter_critical(); // jobStatus is volatile
|
||||
|
||||
if(jobStatus == DMA_STATUS_BUSY) {
|
||||
status = DMA_STATUS_BUSY; // Can't leave when busy
|
||||
} else if((channel < DMAC_CH_NUM) && (_channelMask & (1 << channel))) {
|
||||
// Valid in-use channel; release it
|
||||
_channelMask &= ~(1 << channel); // Clear bit
|
||||
if(!_channelMask) { // No more channels in use?
|
||||
#ifdef __SAMD51__
|
||||
NVIC_DisableIRQ(DMAC_0_IRQn); // Disable DMA interrupt
|
||||
DMAC->CTRL.bit.DMAENABLE = 0; // Disable DMA
|
||||
MCLK->AHBMASK.bit.DMAC_ = 0; // Disable DMA clock
|
||||
#else
|
||||
NVIC_DisableIRQ(DMAC_IRQn); // Disable DMA interrupt
|
||||
DMAC->CTRL.bit.DMAENABLE = 0; // Disable DMA
|
||||
PM->APBBMASK.bit.DMAC_ = 0; // Disable DMA clocks
|
||||
PM->AHBMASK.bit.DMAC_ = 0;
|
||||
#endif
|
||||
}
|
||||
_dmaPtr[channel] = NULL;
|
||||
channel = 0xFF;
|
||||
} else {
|
||||
status = DMA_STATUS_ERR_NOT_INITIALIZED; // Channel not in use
|
||||
}
|
||||
|
||||
cpu_irq_leave_critical();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
// Start DMA transfer job. Channel and descriptors should be allocated
|
||||
// before calling this.
|
||||
ZeroDMAstatus Adafruit_ZeroDMA::startJob(void) {
|
||||
ZeroDMAstatus status = DMA_STATUS_OK;
|
||||
|
||||
cpu_irq_enter_critical(); // Job status is volatile
|
||||
|
||||
if(jobStatus == DMA_STATUS_BUSY) {
|
||||
status = DMA_STATUS_BUSY; // Resource is busy
|
||||
} else if(channel >= DMAC_CH_NUM) {
|
||||
status = DMA_STATUS_ERR_NOT_INITIALIZED; // Channel not in use
|
||||
} else if(!hasDescriptors || (_descriptor[channel].BTCNT.reg <= 0)) {
|
||||
status = DMA_STATUS_ERR_INVALID_ARG; // Bad transfer size
|
||||
} else {
|
||||
uint8_t i, interruptMask = 0;
|
||||
for(i=0; i<DMA_CALLBACK_N; i++) {
|
||||
if(callback[i]) interruptMask |= (1 << i);
|
||||
}
|
||||
jobStatus = DMA_STATUS_BUSY;
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHINTENSET.reg =
|
||||
DMAC_CHINTENSET_MASK & interruptMask;
|
||||
DMAC->Channel[channel].CHINTENCLR.reg =
|
||||
DMAC_CHINTENCLR_MASK & ~interruptMask;
|
||||
DMAC->Channel[channel].CHCTRLA.bit.ENABLE = 1;
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel;
|
||||
DMAC->CHINTENSET.reg = DMAC_CHINTENSET_MASK & interruptMask;
|
||||
DMAC->CHINTENCLR.reg = DMAC_CHINTENCLR_MASK & ~interruptMask;
|
||||
DMAC->CHCTRLA.bit.ENABLE = 1; // Enable the transfer channel
|
||||
#endif
|
||||
}
|
||||
|
||||
cpu_irq_leave_critical();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
// Set and enable callback function for ZeroDMA object. This can be called
|
||||
// before or after channel and/or descriptors are allocated, but needs
|
||||
// to be called before job is started.
|
||||
void Adafruit_ZeroDMA::setCallback(
|
||||
void (*cb)(Adafruit_ZeroDMA *), dma_callback_type type) {
|
||||
callback[type] = cb;
|
||||
}
|
||||
|
||||
// Suspend/resume don't quite do what I thought -- avoid using for now.
|
||||
void Adafruit_ZeroDMA::suspend(void) const {
|
||||
cpu_irq_enter_critical();
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHCTRLB.reg |= DMAC_CHCTRLB_CMD_SUSPEND;
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel;
|
||||
DMAC->CHCTRLB.reg |= DMAC_CHCTRLB_CMD_SUSPEND;
|
||||
#endif
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
|
||||
#define MAX_JOB_RESUME_COUNT 10000
|
||||
void Adafruit_ZeroDMA::resume(void) {
|
||||
cpu_irq_enter_critical(); // jobStatus is volatile
|
||||
if(jobStatus == DMA_STATUS_SUSPEND) {
|
||||
int count;
|
||||
uint32_t bitMask = 1 << channel;
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHCTRLB.reg |= DMAC_CHCTRLB_CMD_RESUME;
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel;
|
||||
DMAC->CHCTRLB.reg |= DMAC_CHCTRLB_CMD_RESUME;
|
||||
#endif
|
||||
|
||||
for(count = 0; (count < MAX_JOB_RESUME_COUNT) &&
|
||||
!(DMAC->BUSYCH.reg & bitMask); count++);
|
||||
|
||||
jobStatus = (count < MAX_JOB_RESUME_COUNT) ?
|
||||
DMA_STATUS_BUSY : DMA_STATUS_ERR_TIMEOUT;
|
||||
}
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
|
||||
// Abort is OK though.
|
||||
void Adafruit_ZeroDMA::abort(void) {
|
||||
if(channel <= DMAC_CH_NUM) {
|
||||
cpu_irq_enter_critical();
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHCTRLA.reg = 0; // Disable channel
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel; // Select channel
|
||||
DMAC->CHCTRLA.reg = 0; // Disable
|
||||
#endif
|
||||
jobStatus = DMA_STATUS_ABORTED;
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
}
|
||||
|
||||
// Set DMA peripheral trigger.
|
||||
// This can be done before or after channel is allocated.
|
||||
void Adafruit_ZeroDMA::setTrigger(uint8_t trigger) {
|
||||
peripheralTrigger = trigger; // Save value for allocate()
|
||||
|
||||
// If channel already allocated, configure peripheral trigger
|
||||
// (old lib required configure before alloc -- either way OK now)
|
||||
if(channel < DMAC_CH_NUM) {
|
||||
cpu_irq_enter_critical();
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHCTRLA.bit.TRIGSRC = trigger;
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel;
|
||||
DMAC->CHCTRLB.bit.TRIGSRC = trigger;
|
||||
#endif
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
}
|
||||
|
||||
// Set DMA trigger action.
|
||||
// This can be done before or after channel is allocated.
|
||||
void Adafruit_ZeroDMA::setAction(dma_transfer_trigger_action action) {
|
||||
triggerAction = action; // Save value for allocate()
|
||||
|
||||
// If channel already allocated, configure trigger action
|
||||
// (old lib required configure before alloc -- either way OK now)
|
||||
if(channel < DMAC_CH_NUM) {
|
||||
cpu_irq_enter_critical();
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHCTRLA.bit.TRIGACT = action;
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel;
|
||||
DMAC->CHCTRLB.bit.TRIGACT = action;
|
||||
#endif
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
}
|
||||
|
||||
// Issue software trigger. Channel must be allocated & descriptors added!
|
||||
void Adafruit_ZeroDMA::trigger(void) const {
|
||||
if((channel <= DMAC_CH_NUM) & hasDescriptors) {
|
||||
DMAC->SWTRIGCTRL.reg |= (1 << channel);
|
||||
}
|
||||
}
|
||||
|
||||
// Returns true if DMA transfer in progress.
|
||||
bool Adafruit_ZeroDMA::isActive(void) const {
|
||||
return _writeback[channel].BTCTRL.bit.VALID;
|
||||
}
|
||||
|
||||
// DMA DESCRIPTOR FUNCTIONS ------------------------------------------------
|
||||
|
||||
// Allocates a new DMA descriptor (if needed) and appends it to the
|
||||
// channel's descriptor list. Returns pointer to DmacDescriptor,
|
||||
// or NULL on various errors. You'll want to keep the pointer for
|
||||
// later if you need to modify or free the descriptor.
|
||||
// Channel must be allocated first!
|
||||
DmacDescriptor *Adafruit_ZeroDMA::addDescriptor(
|
||||
void *src,
|
||||
void *dst,
|
||||
uint32_t count,
|
||||
dma_beat_size size,
|
||||
bool srcInc,
|
||||
bool dstInc,
|
||||
uint32_t stepSize,
|
||||
bool stepSel) {
|
||||
|
||||
// Channel must be allocated first
|
||||
if(channel >= DMAC_CH_NUM) return NULL;
|
||||
|
||||
// Can't do while job's busy
|
||||
if(jobStatus == DMA_STATUS_BUSY) return NULL;
|
||||
|
||||
DmacDescriptor *desc;
|
||||
|
||||
// Scan descriptor list to find last entry. If an entry's
|
||||
// DESCADDR value is 0, that's the end of the list and it's
|
||||
// currently un-looped. If the DESCADDR value is the same
|
||||
// as the first entry, that's the end of the list and it's
|
||||
// looped. Either way, set the last entry's DESCADDR value
|
||||
// to the new descriptor, and the descriptor's own DESCADDR
|
||||
// will be set later either to 0 or the list head.
|
||||
if(hasDescriptors) {
|
||||
// DMA descriptors must be 128-bit (16 byte) aligned.
|
||||
// memalign() is considered 'obsolete' but it's replacements
|
||||
// (aligned_alloc() or posix_memalign()) are not currently
|
||||
// available in the version of ARM GCC in use, but this is,
|
||||
// so here we are.
|
||||
if(!(desc = (DmacDescriptor *)memalign(16, sizeof(DmacDescriptor)))) {
|
||||
return NULL;
|
||||
}
|
||||
DmacDescriptor *prev = &_descriptor[channel];
|
||||
while(prev->DESCADDR.reg &&
|
||||
(prev->DESCADDR.reg != (uint32_t)&_descriptor[channel])) {
|
||||
prev = (DmacDescriptor *)prev->DESCADDR.reg;
|
||||
}
|
||||
prev->DESCADDR.reg = (uint32_t)desc;
|
||||
} else {
|
||||
desc = &_descriptor[channel];
|
||||
}
|
||||
hasDescriptors = true;
|
||||
|
||||
uint8_t bytesPerBeat; // Beat transfer size IN BYTES
|
||||
switch(size) {
|
||||
default: bytesPerBeat = 1; break;
|
||||
case DMA_BEAT_SIZE_HWORD: bytesPerBeat = 2; break;
|
||||
case DMA_BEAT_SIZE_WORD: bytesPerBeat = 4; break;
|
||||
}
|
||||
|
||||
desc->BTCTRL.bit.VALID = true;
|
||||
desc->BTCTRL.bit.EVOSEL = DMA_EVENT_OUTPUT_DISABLE;
|
||||
desc->BTCTRL.bit.BLOCKACT = DMA_BLOCK_ACTION_NOACT;
|
||||
desc->BTCTRL.bit.BEATSIZE = size;
|
||||
desc->BTCTRL.bit.SRCINC = srcInc;
|
||||
desc->BTCTRL.bit.DSTINC = dstInc;
|
||||
desc->BTCTRL.bit.STEPSEL = stepSel;
|
||||
desc->BTCTRL.bit.STEPSIZE = stepSize;
|
||||
desc->BTCNT.reg = count;
|
||||
desc->SRCADDR.reg = (uint32_t)src;
|
||||
|
||||
if(srcInc) {
|
||||
if(stepSel) {
|
||||
desc->SRCADDR.reg += bytesPerBeat * count * (1 << stepSize);
|
||||
} else {
|
||||
desc->SRCADDR.reg += bytesPerBeat * count;
|
||||
}
|
||||
}
|
||||
|
||||
desc->DSTADDR.reg = (uint32_t)dst;
|
||||
|
||||
if(dstInc) {
|
||||
if(!stepSel) {
|
||||
desc->DSTADDR.reg += bytesPerBeat * count * (1 << stepSize);
|
||||
} else {
|
||||
desc->DSTADDR.reg += bytesPerBeat * count;
|
||||
}
|
||||
}
|
||||
|
||||
desc->DESCADDR.reg = loopFlag ? (uint32_t)&_descriptor[channel] : 0;
|
||||
|
||||
return desc;
|
||||
}
|
||||
|
||||
// Modify DMA descriptor with a new source address, destination address &
|
||||
// block transfer count. All other attributes (including increment enables,
|
||||
// etc.) are unchanged. Mostly for changing the data being pushed to a
|
||||
// peripheral (DAC, SPI, whatev.)
|
||||
void Adafruit_ZeroDMA::changeDescriptor(DmacDescriptor *desc,
|
||||
void *src, void *dst, uint32_t count) {
|
||||
|
||||
uint8_t bytesPerBeat; // Beat transfer size IN BYTES
|
||||
switch(desc->BTCTRL.bit.BEATSIZE) {
|
||||
default: bytesPerBeat = 1; break;
|
||||
case DMA_BEAT_SIZE_HWORD: bytesPerBeat = 2; break;
|
||||
case DMA_BEAT_SIZE_WORD: bytesPerBeat = 4; break;
|
||||
}
|
||||
|
||||
if(count) desc->BTCNT.reg = count;
|
||||
|
||||
if(src) {
|
||||
desc->SRCADDR.reg = (uint32_t)src;
|
||||
if(desc->BTCTRL.bit.SRCINC) {
|
||||
if(desc->BTCTRL.bit.STEPSEL) {
|
||||
desc->SRCADDR.reg += desc->BTCNT.reg *
|
||||
bytesPerBeat * (1 << desc->BTCTRL.bit.STEPSIZE);
|
||||
} else {
|
||||
desc->SRCADDR.reg += desc->BTCNT.reg * bytesPerBeat;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(dst) {
|
||||
desc->DSTADDR.reg = (uint32_t)dst;
|
||||
if(desc->BTCTRL.bit.DSTINC) {
|
||||
if(!desc->BTCTRL.bit.STEPSEL) {
|
||||
desc->DSTADDR.reg += desc->BTCNT.reg *
|
||||
bytesPerBeat * (1 << desc->BTCTRL.bit.STEPSIZE);
|
||||
} else {
|
||||
desc->DSTADDR.reg += desc->BTCNT.reg * bytesPerBeat;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// I think this code is here by accident -- disabling for now.
|
||||
#if 0
|
||||
cpu_irq_enter_critical();
|
||||
jobStatus = DMA_STATUS_OK;
|
||||
#ifdef __SAMD51__
|
||||
DMAC->Channel[channel].CHCTRLA.bit.ENABLE = 1;
|
||||
#else
|
||||
DMAC->CHID.bit.ID = channel;
|
||||
DMAC->CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
|
||||
#endif
|
||||
cpu_irq_leave_critical();
|
||||
#endif
|
||||
}
|
||||
|
||||
// TODO: delete descriptor, delete whole descriptor chain
|
||||
|
||||
// Select whether channel's descriptor list should repeat or not.
|
||||
// This can be done before or after channel & any descriptors are allocated.
|
||||
void Adafruit_ZeroDMA::loop(boolean flag) {
|
||||
// The loop selection is 'sticky' -- that is, you can enable or
|
||||
// disable looping before a descriptor list is built, or after
|
||||
// the fact. This requires some extra steps in the library code
|
||||
// but avoids a must-do-in-X-order constraint on user.
|
||||
loopFlag = flag;
|
||||
|
||||
if(hasDescriptors) { // Descriptor list already started?
|
||||
// Scan descriptor list to find last entry. If an entry's
|
||||
// DESCADDR value is 0, that's the end of the list and it's
|
||||
// currently un-looped. If the DESCADDR value is the same
|
||||
// as the first entry, that's the end of the list and it's
|
||||
// already looped.
|
||||
DmacDescriptor *desc = &_descriptor[channel];
|
||||
while(desc->DESCADDR.reg &&
|
||||
(desc->DESCADDR.reg != (uint32_t)&_descriptor[channel])) {
|
||||
desc = (DmacDescriptor *)desc->DESCADDR.reg;
|
||||
}
|
||||
// Loop or unloop descriptor list as appropriate
|
||||
desc->DESCADDR.reg = loopFlag ? (uint32_t)&_descriptor[channel] : 0;
|
||||
}
|
||||
}
|
||||
|
||||
// MISCELLANY --------------------------------------------------------------
|
||||
|
||||
void Adafruit_ZeroDMA::printStatus(ZeroDMAstatus s) const {
|
||||
if(s == DMA_STATUS_JOBSTATUS) s = jobStatus;
|
||||
Serial.print("Status: ");
|
||||
switch(s) {
|
||||
case DMA_STATUS_OK:
|
||||
Serial.println("OK");
|
||||
break;
|
||||
case DMA_STATUS_ERR_NOT_FOUND:
|
||||
Serial.println("NOT FOUND");
|
||||
break;
|
||||
case DMA_STATUS_ERR_NOT_INITIALIZED:
|
||||
Serial.println("NOT INITIALIZED");
|
||||
break;
|
||||
case DMA_STATUS_ERR_INVALID_ARG:
|
||||
Serial.println("INVALID ARGUMENT");
|
||||
break;
|
||||
case DMA_STATUS_ERR_IO:
|
||||
Serial.println("IO ERROR");
|
||||
break;
|
||||
case DMA_STATUS_ERR_TIMEOUT:
|
||||
Serial.println("TIMEOUT");
|
||||
break;
|
||||
case DMA_STATUS_BUSY:
|
||||
Serial.println("BUSY");
|
||||
break;
|
||||
case DMA_STATUS_SUSPEND:
|
||||
Serial.println("SUSPENDED");
|
||||
break;
|
||||
case DMA_STATUS_ABORTED:
|
||||
Serial.println("ABORTED");
|
||||
break;
|
||||
default:
|
||||
Serial.print("Unknown 0x");
|
||||
Serial.println((int)s);
|
||||
break;
|
||||
}
|
||||
}
|
||||
66
libraries/Adafruit_ZeroDMA/Adafruit_ZeroDMA.h
Normal file
66
libraries/Adafruit_ZeroDMA/Adafruit_ZeroDMA.h
Normal file
|
|
@ -0,0 +1,66 @@
|
|||
#ifndef _ADAFRUIT_ZERODMA_H_
|
||||
#define _ADAFRUIT_ZERODMA_H_
|
||||
|
||||
#include "Arduino.h"
|
||||
#include "utility/dma.h"
|
||||
|
||||
// Status codes returned by some DMA functions and/or held in
|
||||
// a channel's jobStatus variable.
|
||||
enum ZeroDMAstatus {
|
||||
DMA_STATUS_OK = 0,
|
||||
DMA_STATUS_ERR_NOT_FOUND,
|
||||
DMA_STATUS_ERR_NOT_INITIALIZED,
|
||||
DMA_STATUS_ERR_INVALID_ARG,
|
||||
DMA_STATUS_ERR_IO,
|
||||
DMA_STATUS_ERR_TIMEOUT,
|
||||
DMA_STATUS_BUSY,
|
||||
DMA_STATUS_SUSPEND,
|
||||
DMA_STATUS_ABORTED,
|
||||
DMA_STATUS_JOBSTATUS = -1 // For printStatus() function
|
||||
};
|
||||
|
||||
class Adafruit_ZeroDMA {
|
||||
public:
|
||||
Adafruit_ZeroDMA(void);
|
||||
|
||||
// DMA channel functions
|
||||
ZeroDMAstatus allocate(void), // Allocates DMA channel
|
||||
startJob(void),
|
||||
free(void); // Deallocates DMA channel
|
||||
void trigger(void) const,
|
||||
setTrigger(uint8_t trigger),
|
||||
setAction(dma_transfer_trigger_action action),
|
||||
setCallback(void (*callback)(Adafruit_ZeroDMA *) = NULL,
|
||||
dma_callback_type type = DMA_CALLBACK_TRANSFER_DONE),
|
||||
loop(boolean flag),
|
||||
suspend(void) const,
|
||||
resume(void),
|
||||
abort(void),
|
||||
setPriority(dma_priority pri) const,
|
||||
printStatus(ZeroDMAstatus s = DMA_STATUS_JOBSTATUS) const;
|
||||
uint8_t getChannel(void) const { return channel; }
|
||||
|
||||
// DMA descriptor functions
|
||||
DmacDescriptor *addDescriptor(void *src, void *dst, uint32_t count = 0,
|
||||
dma_beat_size size = DMA_BEAT_SIZE_BYTE,
|
||||
bool srcInc = true, bool dstInc = true,
|
||||
uint32_t stepSize = DMA_ADDRESS_INCREMENT_STEP_SIZE_1,
|
||||
bool stepSel = DMA_STEPSEL_DST);
|
||||
void changeDescriptor(DmacDescriptor *d, void *src = NULL,
|
||||
void *dst = NULL, uint32_t count = 0);
|
||||
bool isActive(void) const;
|
||||
|
||||
void _IRQhandler(uint8_t flags); // DO NOT TOUCH
|
||||
|
||||
|
||||
protected:
|
||||
uint8_t channel;
|
||||
volatile enum ZeroDMAstatus jobStatus;
|
||||
bool hasDescriptors;
|
||||
bool loopFlag;
|
||||
uint8_t peripheralTrigger;
|
||||
dma_transfer_trigger_action triggerAction;
|
||||
void (*callback[DMA_CALLBACK_N])(Adafruit_ZeroDMA *);
|
||||
};
|
||||
|
||||
#endif // _ADAFRUIT_ZERODMA_H_
|
||||
22
libraries/Adafruit_ZeroDMA/LICENSE
Normal file
22
libraries/Adafruit_ZeroDMA/LICENSE
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
The MIT License (MIT)
|
||||
|
||||
Copyright (c) 2016 Adafruit Industries
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in all
|
||||
copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
SOFTWARE.
|
||||
|
||||
6
libraries/Adafruit_ZeroDMA/README.md
Normal file
6
libraries/Adafruit_ZeroDMA/README.md
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
# Adafruit_ZeroDMA
|
||||
DMA helper/wrapped for ATSAMD21 such as Arduino Zero & Feather M0
|
||||
|
||||
Current version of this library no longer requires Adafruit_ASFcore as a prerequisite. However...IT BREAKS COMPATIBILITY WITH PRIOR VERSIONS. Function names, calling sequence and return types/values have changed. See examples!
|
||||
|
||||
Item(s) in 'utility' directory are much pared-down derivatives of Atmel ASFcore 3 files. Please keep their original copyright and license intact when editing.
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
// Simple ZeroDMA example -- an equivalent to the memcpy() function.
|
||||
// Decause it uses DMA, unlike memcpy(), your code could be doing other
|
||||
// things simultaneously while the copy operation runs.
|
||||
|
||||
#include <Adafruit_ZeroDMA.h>
|
||||
#include "utility/dma.h"
|
||||
|
||||
Adafruit_ZeroDMA myDMA;
|
||||
ZeroDMAstatus stat; // DMA status codes returned by some functions
|
||||
|
||||
// The memory we'll be moving:
|
||||
#define DATA_LENGTH 1024
|
||||
uint8_t source_memory[DATA_LENGTH],
|
||||
destination_memory[DATA_LENGTH];
|
||||
|
||||
volatile bool transfer_is_done = false; // Done yet?
|
||||
|
||||
// Callback for end-of-DMA-transfer
|
||||
void dma_callback(Adafruit_ZeroDMA *dma) {
|
||||
transfer_is_done = true;
|
||||
}
|
||||
|
||||
void setup() {
|
||||
uint32_t t;
|
||||
pinMode(LED_BUILTIN, OUTPUT); // Onboard LED can be used for precise
|
||||
digitalWrite(LED_BUILTIN, LOW); // benchmarking with an oscilloscope
|
||||
Serial.begin(115200);
|
||||
while(!Serial); // Wait for Serial monitor before continuing
|
||||
|
||||
Serial.println("DMA test: memory copy");
|
||||
|
||||
Serial.print("Allocating DMA channel...");
|
||||
stat = myDMA.allocate();
|
||||
myDMA.printStatus(stat);
|
||||
|
||||
Serial.println("Setting up transfer");
|
||||
myDMA.addDescriptor(source_memory, destination_memory, DATA_LENGTH);
|
||||
|
||||
Serial.println("Adding callback");
|
||||
// register_callback() can optionally take a second argument
|
||||
// (callback type), default is DMA_CALLBACK_TRANSFER_DONE
|
||||
myDMA.setCallback(dma_callback);
|
||||
|
||||
// Fill the source buffer with incrementing bytes, dest buf with 0's
|
||||
for(uint32_t i=0; i<DATA_LENGTH; i++) source_memory[i] = i;
|
||||
memset(destination_memory, 0, DATA_LENGTH);
|
||||
|
||||
// Show the destination buffer is empty before transfer
|
||||
Serial.println("Destination buffer before transfer:");
|
||||
dump();
|
||||
|
||||
Serial.println("Starting transfer job");
|
||||
stat = myDMA.startJob();
|
||||
myDMA.printStatus(stat);
|
||||
|
||||
Serial.println("Triggering DMA transfer...");
|
||||
t = micros();
|
||||
digitalWrite(LED_BUILTIN, HIGH);
|
||||
myDMA.trigger();
|
||||
|
||||
// Your code could do other things here while copy happens!
|
||||
|
||||
while(!transfer_is_done); // Chill until DMA transfer completes
|
||||
|
||||
digitalWrite(LED_BUILTIN, LOW);
|
||||
t = micros() - t; // Elapsed time
|
||||
|
||||
Serial.print("Done! ");
|
||||
Serial.print(t);
|
||||
Serial.println(" microseconds");
|
||||
|
||||
Serial.println("Destination buffer after transfer:");
|
||||
dump();
|
||||
|
||||
// Now repeat the same operation, but 'manually' using memcpy() (not DMA):
|
||||
t = micros();
|
||||
digitalWrite(LED_BUILTIN, HIGH);
|
||||
memcpy(destination_memory, source_memory, DATA_LENGTH);
|
||||
digitalWrite(LED_BUILTIN, LOW);
|
||||
t = micros() - t; // Elapsed time
|
||||
Serial.print("Same operation without DMA: ");
|
||||
Serial.print(t);
|
||||
Serial.println(" microseconds");
|
||||
}
|
||||
|
||||
// Show contents of destination_memory[] array
|
||||
void dump() {
|
||||
for(uint32_t i=0; i<DATA_LENGTH; i++) {
|
||||
Serial.print(destination_memory[i], HEX); Serial.print(' ');
|
||||
if ((i & 15) == 15) Serial.println();
|
||||
}
|
||||
}
|
||||
|
||||
void loop() { }
|
||||
|
|
@ -0,0 +1,97 @@
|
|||
// DMA-based SPI buffer write. This is transmit-only as written, i.e.
|
||||
// not equivalent to Arduino's SPI.transfer() which both sends and
|
||||
// receives a single byte or word. Also, this is single-buffered to
|
||||
// demonstrate a simple SPI write case. See zerodma_spi2.ino for an
|
||||
// example using double buffering (2 buffers alternating fill & transmit).
|
||||
|
||||
#include <SPI.h>
|
||||
#include <Adafruit_ZeroDMA.h>
|
||||
#include "utility/dma.h"
|
||||
|
||||
Adafruit_ZeroDMA myDMA;
|
||||
ZeroDMAstatus stat; // DMA status codes returned by some functions
|
||||
|
||||
// The memory we'll be issuing to SPI:
|
||||
#define DATA_LENGTH 2048
|
||||
uint8_t source_memory[DATA_LENGTH];
|
||||
|
||||
volatile bool transfer_is_done = false; // Done yet?
|
||||
|
||||
// Callback for end-of-DMA-transfer
|
||||
void dma_callback(Adafruit_ZeroDMA *dma) {
|
||||
transfer_is_done = true;
|
||||
}
|
||||
|
||||
void setup() {
|
||||
uint32_t t;
|
||||
pinMode(LED_BUILTIN, OUTPUT); // Onboard LED can be used for precise
|
||||
digitalWrite(LED_BUILTIN, LOW); // benchmarking with an oscilloscope
|
||||
Serial.begin(115200);
|
||||
while(!Serial); // Wait for Serial monitor before continuing
|
||||
|
||||
Serial.println("DMA test: SPI data out");
|
||||
|
||||
SPI.begin();
|
||||
|
||||
Serial.println("Configuring DMA trigger");
|
||||
#ifdef __SAMD51__
|
||||
// SERCOM2 is the 'native' SPI SERCOM on Metro M4
|
||||
myDMA.setTrigger(SERCOM2_DMAC_ID_TX);
|
||||
#else
|
||||
// SERCOM4 is the 'native' SPI SERCOM on most M0 boards
|
||||
myDMA.setTrigger(SERCOM4_DMAC_ID_TX);
|
||||
#endif
|
||||
myDMA.setAction(DMA_TRIGGER_ACTON_BEAT);
|
||||
|
||||
Serial.print("Allocating DMA channel...");
|
||||
stat = myDMA.allocate();
|
||||
myDMA.printStatus(stat);
|
||||
|
||||
Serial.println("Setting up transfer");
|
||||
myDMA.addDescriptor(
|
||||
source_memory, // move data from here
|
||||
#ifdef __SAMD51__
|
||||
(void *)(&SERCOM2->SPI.DATA.reg), // to here (M4)
|
||||
#else
|
||||
(void *)(&SERCOM4->SPI.DATA.reg), // to here (M0)
|
||||
#endif
|
||||
DATA_LENGTH, // this many...
|
||||
DMA_BEAT_SIZE_BYTE, // bytes/hword/words
|
||||
true, // increment source addr?
|
||||
false); // increment dest addr?
|
||||
|
||||
Serial.println("Adding callback");
|
||||
// register_callback() can optionally take a second argument
|
||||
// (callback type), default is DMA_CALLBACK_TRANSFER_DONE
|
||||
myDMA.setCallback(dma_callback);
|
||||
|
||||
// Fill the source buffer with incrementing bytes
|
||||
for(uint32_t i=0; i<DATA_LENGTH; i++) source_memory[i] = i;
|
||||
|
||||
// Start SPI transaction at 12 MHz
|
||||
SPI.beginTransaction(SPISettings(12000000, MSBFIRST, SPI_MODE0));
|
||||
|
||||
Serial.println("Starting transfer job");
|
||||
t = micros();
|
||||
digitalWrite(LED_BUILTIN, HIGH);
|
||||
|
||||
// Because we've configured a peripheral trigger (SPI), there's
|
||||
// no need to manually trigger transfer, it starts up on its own.
|
||||
stat = myDMA.startJob();
|
||||
|
||||
// Your code could do other things here while SPI write happens!
|
||||
|
||||
while(!transfer_is_done); // Chill until DMA transfer completes
|
||||
|
||||
digitalWrite(LED_BUILTIN, LOW);
|
||||
t = micros() - t; // Elapsed time
|
||||
|
||||
SPI.endTransaction();
|
||||
myDMA.printStatus(stat); // Results of start_transfer_job()
|
||||
|
||||
Serial.print("Done! ");
|
||||
Serial.print(t);
|
||||
Serial.println(" microseconds");
|
||||
}
|
||||
|
||||
void loop() { }
|
||||
|
|
@ -0,0 +1,103 @@
|
|||
// Double-buffered DMA on auxiliary SPI peripheral on pins 11/12/13.
|
||||
// Continuously alternates between two data buffers...one is filled
|
||||
// with new data as the other is being transmitted.
|
||||
|
||||
#include <SPI.h>
|
||||
#include <Adafruit_ZeroDMA.h>
|
||||
#include "utility/dma.h"
|
||||
#include "wiring_private.h" // pinPeripheral() function
|
||||
|
||||
// Declare our own SPI peripheral 'mySPI' on pins 11/12/13:
|
||||
// (Do not call this SPI1; Arduino Zero and Metro M0 already
|
||||
// have an SPI1 (the EDBG interface) and it won't compile.)
|
||||
SPIClass mySPI(
|
||||
&sercom1, // -> Sercom peripheral
|
||||
34, // MISO pin (also digital pin 12)
|
||||
37, // SCK pin (also digital pin 13)
|
||||
35, // MOSI pin (also digital pin 11)
|
||||
SPI_PAD_0_SCK_1, // TX pad (MOSI, SCK pads)
|
||||
SERCOM_RX_PAD_3); // RX pad (MISO pad)
|
||||
|
||||
Adafruit_ZeroDMA myDMA;
|
||||
ZeroDMAstatus stat; // DMA status codes returned by some functions
|
||||
|
||||
// Data we'll issue to mySPI. There are TWO buffers; one being
|
||||
// filled with new data while the other's being transmitted in
|
||||
// the background.
|
||||
#define DATA_LENGTH 512
|
||||
uint8_t source_memory[2][DATA_LENGTH],
|
||||
buffer_being_filled = 0, // Index of 'filling' buffer
|
||||
buffer_value = 0; // Value of fill
|
||||
|
||||
volatile bool transfer_is_done = true; // Done yet?
|
||||
|
||||
// Callback for end-of-DMA-transfer
|
||||
void dma_callback(Adafruit_ZeroDMA *dma) {
|
||||
transfer_is_done = true;
|
||||
}
|
||||
|
||||
DmacDescriptor *desc; // DMA descriptor address (so we can change contents)
|
||||
|
||||
void setup() {
|
||||
Serial.begin(115200);
|
||||
while(!Serial); // Wait for Serial monitor before continuing
|
||||
|
||||
Serial.println("DMA test: SPI data out");
|
||||
|
||||
mySPI.begin();
|
||||
// Assign pins 11, 12, 13 to SERCOM functionality
|
||||
pinPeripheral(11, PIO_SERCOM);
|
||||
pinPeripheral(12, PIO_SERCOM);
|
||||
pinPeripheral(13, PIO_SERCOM);
|
||||
|
||||
// Configure DMA for SERCOM1 (our 'mySPI' port on 11/12/13)
|
||||
Serial.println("Configuring DMA trigger");
|
||||
myDMA.setTrigger(SERCOM1_DMAC_ID_TX);
|
||||
myDMA.setAction(DMA_TRIGGER_ACTON_BEAT);
|
||||
|
||||
Serial.print("Allocating DMA channel...");
|
||||
stat = myDMA.allocate();
|
||||
myDMA.printStatus(stat);
|
||||
|
||||
desc = myDMA.addDescriptor(
|
||||
source_memory[buffer_being_filled], // move data from here
|
||||
(void *)(&SERCOM1->SPI.DATA.reg), // to here
|
||||
DATA_LENGTH, // this many...
|
||||
DMA_BEAT_SIZE_BYTE, // bytes/hword/words
|
||||
true, // increment source addr?
|
||||
false); // increment dest addr?
|
||||
|
||||
Serial.println("Adding callback");
|
||||
// register_callback() can optionally take a second argument
|
||||
// (callback type), default is DMA_CALLBACK_TRANSFER_DONE
|
||||
myDMA.setCallback(dma_callback);
|
||||
}
|
||||
|
||||
void loop() {
|
||||
// Fill buffer with new data. The other buffer might
|
||||
// still be transmitting in the background via DMA.
|
||||
memset(source_memory[buffer_being_filled], buffer_value, DATA_LENGTH);
|
||||
|
||||
// Wait for prior transfer to complete before starting new one...
|
||||
Serial.print("Waiting on prior transfer...");
|
||||
while(!transfer_is_done) Serial.write('.');
|
||||
mySPI.endTransaction();
|
||||
Serial.println("Done!");
|
||||
|
||||
// Modify the DMA descriptor using the newly-filled buffer as source...
|
||||
myDMA.changeDescriptor(desc, // DMA descriptor address
|
||||
source_memory[buffer_being_filled]); // New src; dst & count don't change
|
||||
|
||||
// Begin new transfer...
|
||||
Serial.println("Starting new transfer job");
|
||||
mySPI.beginTransaction(SPISettings(12000000, MSBFIRST, SPI_MODE0));
|
||||
transfer_is_done = false; // Reset 'done' flag
|
||||
stat = myDMA.startJob(); // Go!
|
||||
myDMA.printStatus(stat);
|
||||
|
||||
// Switch buffer indices so the alternate buffer is filled/xfer'd
|
||||
// on the next pass.
|
||||
buffer_being_filled = 1 - buffer_being_filled;
|
||||
buffer_value++;
|
||||
}
|
||||
|
||||
9
libraries/Adafruit_ZeroDMA/library.properties
Normal file
9
libraries/Adafruit_ZeroDMA/library.properties
Normal file
|
|
@ -0,0 +1,9 @@
|
|||
name=Adafruit Zero DMA Library
|
||||
version=1.0.4
|
||||
author=Adafruit
|
||||
maintainer=Adafruit <info@adafruit.com>
|
||||
sentence=DMA helper/wrapped for ATSAMD21 such as Arduino Zero & Feather M0
|
||||
paragraph=DMA helper/wrapped for ATSAMD21 such as Arduino Zero & Feather M0
|
||||
category=Signal Input/Output
|
||||
url=https://github.com/adafruit/Adafruit_ZeroDMA
|
||||
architectures=samd
|
||||
145
libraries/Adafruit_ZeroDMA/utility/dma.h
Normal file
145
libraries/Adafruit_ZeroDMA/utility/dma.h
Normal file
|
|
@ -0,0 +1,145 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Direct Memory Access Controller Driver
|
||||
*
|
||||
* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef DMA_H_INCLUDED
|
||||
#define DMA_H_INCLUDED
|
||||
|
||||
// THIS IS A PARED-DOWN VERSION OF DMA.H FROM ATMEL ASFCORE 3.
|
||||
// Please keep original copyright and license intact!
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || defined(__DOXYGEN__) || defined(__SAMD51__)
|
||||
#define FEATURE_DMA_CHANNEL_STANDBY
|
||||
#endif
|
||||
|
||||
enum dma_transfer_trigger_action{
|
||||
#ifdef __SAMD51__
|
||||
// SAMD51 has a 'burst' transfer which can be set to one
|
||||
// beat to accomplish same idea as SAMD21's 'beat' transfer.
|
||||
// Trigger name is ACTON_BEAT for backward compatibility.
|
||||
DMA_TRIGGER_ACTON_BLOCK = DMAC_CHCTRLA_TRIGACT_BLOCK_Val,
|
||||
DMA_TRIGGER_ACTON_BEAT = DMAC_CHCTRLA_TRIGACT_BURST_Val,
|
||||
DMA_TRIGGER_ACTON_TRANSACTION = DMAC_CHCTRLA_TRIGACT_TRANSACTION_Val,
|
||||
#else
|
||||
DMA_TRIGGER_ACTON_BLOCK = DMAC_CHCTRLB_TRIGACT_BLOCK_Val,
|
||||
DMA_TRIGGER_ACTON_BEAT = DMAC_CHCTRLB_TRIGACT_BEAT_Val,
|
||||
DMA_TRIGGER_ACTON_TRANSACTION = DMAC_CHCTRLB_TRIGACT_TRANSACTION_Val,
|
||||
#endif
|
||||
};
|
||||
|
||||
enum dma_callback_type {
|
||||
// First item here is for any transfer errors. A transfer error is
|
||||
// flagged if a bus error is detected during an AHB access or when
|
||||
// the DMAC fetches an invalid descriptor
|
||||
DMA_CALLBACK_TRANSFER_ERROR,
|
||||
DMA_CALLBACK_TRANSFER_DONE,
|
||||
DMA_CALLBACK_CHANNEL_SUSPEND,
|
||||
DMA_CALLBACK_N, // Number of available callbacks
|
||||
};
|
||||
|
||||
enum dma_beat_size {
|
||||
DMA_BEAT_SIZE_BYTE = 0, // 8-bit
|
||||
DMA_BEAT_SIZE_HWORD, // 16-bit
|
||||
DMA_BEAT_SIZE_WORD, // 32-bit
|
||||
};
|
||||
|
||||
enum dma_event_output_selection {
|
||||
DMA_EVENT_OUTPUT_DISABLE = 0, // Disable event generation
|
||||
DMA_EVENT_OUTPUT_BLOCK, // Event strobe when block xfer complete
|
||||
DMA_EVENT_OUTPUT_RESERVED,
|
||||
DMA_EVENT_OUTPUT_BEAT, // Event strobe when beat xfer complete
|
||||
};
|
||||
|
||||
enum dma_block_action {
|
||||
DMA_BLOCK_ACTION_NOACT = 0,
|
||||
// Channel in normal operation and sets transfer complete interrupt
|
||||
// flag after block transfer
|
||||
DMA_BLOCK_ACTION_INT,
|
||||
// Trigger channel suspend after block transfer and sets channel
|
||||
// suspend interrupt flag once the channel is suspended
|
||||
DMA_BLOCK_ACTION_SUSPEND,
|
||||
// Sets transfer complete interrupt flag after a block transfer and
|
||||
// trigger channel suspend. The channel suspend interrupt flag will
|
||||
// be set once the channel is suspended.
|
||||
DMA_BLOCK_ACTION_BOTH,
|
||||
};
|
||||
|
||||
// DMA step selection. This bit determines whether the step size setting
|
||||
// is applied to source or destination address.
|
||||
enum dma_step_selection {
|
||||
DMA_STEPSEL_DST = 0,
|
||||
DMA_STEPSEL_SRC,
|
||||
};
|
||||
|
||||
// Address increment step size. These bits select the address increment step
|
||||
// size. The setting apply to source or destination address, depending on
|
||||
// STEPSEL setting.
|
||||
enum dma_address_increment_stepsize {
|
||||
DMA_ADDRESS_INCREMENT_STEP_SIZE_1 = 0, // beat size * 1
|
||||
DMA_ADDRESS_INCREMENT_STEP_SIZE_2, // beat size * 2
|
||||
DMA_ADDRESS_INCREMENT_STEP_SIZE_4, // beat size * 4
|
||||
DMA_ADDRESS_INCREMENT_STEP_SIZE_8, // etc...
|
||||
DMA_ADDRESS_INCREMENT_STEP_SIZE_16,
|
||||
DMA_ADDRESS_INCREMENT_STEP_SIZE_32,
|
||||
DMA_ADDRESS_INCREMENT_STEP_SIZE_64,
|
||||
DMA_ADDRESS_INCREMENT_STEP_SIZE_128,
|
||||
};
|
||||
|
||||
// higher numbers are higher priority
|
||||
enum dma_priority {
|
||||
DMA_PRIORITY_0, // lowest (default)
|
||||
DMA_PRIORITY_1,
|
||||
DMA_PRIORITY_2,
|
||||
DMA_PRIORITY_3, // highest
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // DMA_H_INCLUDED
|
||||
|
|
@ -1 +0,0 @@
|
|||
// fake empty header file to make Arduino IDE happy
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
#include <arm_math.h>
|
||||
|
||||
arm_rfft_fast_instance_f32 plan;
|
||||
|
||||
void setup() {
|
||||
arm_rfft_fast_init_f32(&plan, 256);
|
||||
}
|
||||
|
||||
void loop() {
|
||||
float in[256] = { 0 }, out[256] = { 0 };
|
||||
arm_rfft_fast_f32(&plan, in, out, 0);
|
||||
}
|
||||
|
|
@ -37,12 +37,6 @@ static I2SDevice_SAMD21G18x i2sd(*I2S);
|
|||
|
||||
#include "I2S.h"
|
||||
|
||||
#ifdef USE_TINYUSB
|
||||
// For Serial when selecting TinyUSB
|
||||
#include <Adafruit_TinyUSB.h>
|
||||
#endif
|
||||
|
||||
|
||||
int I2SClass::_beginCount = 0;
|
||||
|
||||
I2SClass::I2SClass(uint8_t deviceIndex, uint8_t clockGenerator, uint8_t sdPin, uint8_t sckPin, uint8_t fsPin) :
|
||||
|
|
|
|||
|
|
@ -19,11 +19,6 @@
|
|||
|
||||
#include "SAMD_AnalogCorrection.h"
|
||||
|
||||
#ifdef USE_TINYUSB
|
||||
// For Serial when selecting TinyUSB
|
||||
#include <Adafruit_TinyUSB.h>
|
||||
#endif
|
||||
|
||||
void analogReadCorrection (int offset, uint16_t gain)
|
||||
{
|
||||
Adc *adc;
|
||||
|
|
|
|||
|
|
@ -22,11 +22,6 @@
|
|||
#include <wiring_private.h>
|
||||
#include <assert.h>
|
||||
|
||||
#ifdef USE_TINYUSB
|
||||
// For Serial when selecting TinyUSB
|
||||
#include <Adafruit_TinyUSB.h>
|
||||
#endif
|
||||
|
||||
#define SPI_IMODE_NONE 0
|
||||
#define SPI_IMODE_EXTINT 1
|
||||
#define SPI_IMODE_GLOBAL 2
|
||||
|
|
@ -51,16 +46,7 @@ SPIClass::SPIClass(SERCOM *p_sercom, uint8_t uc_pinMISO, uint8_t uc_pinSCK, uint
|
|||
|
||||
void SPIClass::begin()
|
||||
{
|
||||
if(!initialized) {
|
||||
interruptMode = SPI_IMODE_NONE;
|
||||
interruptSave = 0;
|
||||
interruptMask = 0;
|
||||
initialized = true;
|
||||
}
|
||||
|
||||
if(!use_dma) {
|
||||
dmaAllocate();
|
||||
}
|
||||
init();
|
||||
|
||||
// PIO init
|
||||
pinPeripheral(_uc_pinMiso, g_APinDescription[_uc_pinMiso].ulPinType);
|
||||
|
|
@ -70,6 +56,16 @@ void SPIClass::begin()
|
|||
config(DEFAULT_SPI_SETTINGS);
|
||||
}
|
||||
|
||||
void SPIClass::init()
|
||||
{
|
||||
if (initialized)
|
||||
return;
|
||||
interruptMode = SPI_IMODE_NONE;
|
||||
interruptSave = 0;
|
||||
interruptMask = 0;
|
||||
initialized = true;
|
||||
}
|
||||
|
||||
void SPIClass::config(SPISettings settings)
|
||||
{
|
||||
_p_sercom->disableSPI();
|
||||
|
|
@ -84,7 +80,6 @@ void SPIClass::end()
|
|||
{
|
||||
_p_sercom->resetSPI();
|
||||
initialized = false;
|
||||
// Add DMA deallocation here
|
||||
}
|
||||
|
||||
#ifndef interruptsStatus
|
||||
|
|
@ -240,239 +235,157 @@ void SPIClass::transfer(void *buf, size_t count)
|
|||
}
|
||||
}
|
||||
|
||||
// DMA-based SPI transfer() function ---------------------------------------
|
||||
|
||||
// IMPORTANT: references to 65535 throughout the DMA code are INTENTIONAL.
|
||||
// DO NOT try to 'fix' by changing to 65536, or large transfers will fail!
|
||||
// The BTCNT value of a DMA descriptor is an unsigned 16-bit value with a
|
||||
// max of 65535. Larger transfers are handled by linked descriptors.
|
||||
|
||||
// Pointer to SPIClass object, one per DMA channel. This allows the
|
||||
// DMA callback (which has to exist outside the class context) to have
|
||||
// a reference back to the originating SPIClass object.
|
||||
// Pointer to SPIClass object, one per DMA channel.
|
||||
static SPIClass *spiPtr[DMAC_CH_NUM] = { 0 }; // Legit inits list to NULL
|
||||
|
||||
void SPIClass::dmaCallback(Adafruit_ZeroDMA *dma) {
|
||||
// dmaCallback() receives an Adafruit_ZeroDMA object. From this we can get
|
||||
// a channel number (0 to DMAC_CH_NUM-1, always unique per ZeroDMA object),
|
||||
// then locate the originating SPIClass object using array lookup, setting
|
||||
// the dma_busy element 'false' to indicate end of transfer. Doesn't matter
|
||||
// if it's a read or write transfer...both channels get pointers to it.
|
||||
// the dma_busy element 'false' to indicate end of transfer.
|
||||
spiPtr[dma->getChannel()]->dma_busy = false;
|
||||
}
|
||||
|
||||
// For read-only and read+write transfers, a callback is assigned only
|
||||
// to the read channel to indicate end-of-transfer, and the write channel's
|
||||
// callback is assigned to this nonsense function (for reasons I'm not
|
||||
// entirely sure of, setting the callback to NULL doesn't work).
|
||||
static void dmaDoNothingCallback(Adafruit_ZeroDMA *dma) { (void)dma; }
|
||||
|
||||
// This could've gone in begin(), but for the sake of organization...
|
||||
void SPIClass::dmaAllocate(void) {
|
||||
// In order to support fully non-blocking SPI transfers, DMA descriptor
|
||||
// lists must be created for the input and/or output data. Rather than
|
||||
// do this dynamically with every transfer, the lists are allocated once
|
||||
// on SPI init. Maximum list size is finite and knowable -- transfers to
|
||||
// or from RAM or from flash memory will never exceed the corresponding
|
||||
// memory size (if they do, you have bigger problems). Descriptors
|
||||
// aren't large and there's usually only a handful to a dozen, so this
|
||||
// isn't an excessive burden in exchange for big non-blocking transfers.
|
||||
uint32_t maxWriteBytes = FLASH_SIZE; // Writes can't exceed all of flash
|
||||
#if defined(__SAMD51__)
|
||||
uint32_t maxReadBytes = HSRAM_SIZE; // Reads can't exceed all of RAM
|
||||
#else
|
||||
uint32_t maxReadBytes = HMCRAMC0_SIZE;
|
||||
#endif
|
||||
if(maxReadBytes > maxWriteBytes) { // I don't think any SAMD devices
|
||||
maxWriteBytes = maxReadBytes; // have RAM > flash, but just in case
|
||||
}
|
||||
|
||||
// VITAL to alloc read channel first, assigns it a higher DMA priority!
|
||||
if(readChannel.allocate() == DMA_STATUS_OK) {
|
||||
if(writeChannel.allocate() == DMA_STATUS_OK) {
|
||||
|
||||
// Both DMA channels (read and write) allocated successfully,
|
||||
// set up transfer triggers and other basics...
|
||||
|
||||
// readChannel callback only needs to be set up once.
|
||||
// Unlike the write callback which may get switched on or off,
|
||||
// read callback stays put. In certain cases the read DMA job
|
||||
// just isn't started and the callback is a non-issue then.
|
||||
readChannel.setTrigger(getDMAC_ID_RX());
|
||||
readChannel.setAction(DMA_TRIGGER_ACTON_BEAT);
|
||||
readChannel.setCallback(dmaCallback);
|
||||
spiPtr[readChannel.getChannel()] = this;
|
||||
|
||||
writeChannel.setTrigger(getDMAC_ID_TX());
|
||||
writeChannel.setAction(DMA_TRIGGER_ACTON_BEAT);
|
||||
spiPtr[writeChannel.getChannel()] = this;
|
||||
|
||||
// One descriptor per channel has already been allocated
|
||||
// in Adafruit_ZeroDMA, this just gets pointers to them...
|
||||
firstReadDescriptor = readChannel.addDescriptor(
|
||||
(void *)getDataRegister(), // Source address (SPI data reg)
|
||||
NULL, // Dest address (set later)
|
||||
0, // Count (set later)
|
||||
DMA_BEAT_SIZE_BYTE, // Bytes/hwords/words
|
||||
false, // Don't increment source address
|
||||
true); // Increment dest address
|
||||
firstWriteDescriptor = writeChannel.addDescriptor(
|
||||
NULL, // Source address (set later)
|
||||
(void *)getDataRegister(), // Dest (SPI data register)
|
||||
0, // Count (set later)
|
||||
DMA_BEAT_SIZE_BYTE, // Bytes/hwords/words
|
||||
true, // Increment source address
|
||||
false); // Don't increment dest address
|
||||
// This is the number of EXTRA descriptors beyond the first.
|
||||
int numReadDescriptors = ((maxReadBytes + 65534) / 65535) - 1;
|
||||
int numWriteDescriptors = ((maxWriteBytes + 65534) / 65535) - 1;
|
||||
int totalDescriptors = numReadDescriptors + numWriteDescriptors;
|
||||
|
||||
if(totalDescriptors <= 0) { // Don't need extra descriptors,
|
||||
use_dma = true; // channels are allocated, we're good.
|
||||
} else { // Else allocate extra descriptor lists...
|
||||
// Although DMA descriptors are technically a linked list, we just
|
||||
// allocate a chunk all at once, and finesse the pointers later.
|
||||
if((extraReadDescriptors = (DmacDescriptor *)malloc(
|
||||
totalDescriptors * sizeof(DmacDescriptor)))) {
|
||||
use_dma = true; // Everything allocated successfully
|
||||
extraWriteDescriptors = &extraReadDescriptors[numReadDescriptors];
|
||||
|
||||
// Initialize descriptors (copy from first ones)
|
||||
// cast to void* to suppress warning: with no trivial copy-assignment [-Wclass-memaccess]
|
||||
for(int i=0; i<numReadDescriptors; i++) {
|
||||
memcpy((void*) &extraReadDescriptors[i], firstReadDescriptor,
|
||||
sizeof(DmacDescriptor));
|
||||
}
|
||||
for(int i=0; i<numWriteDescriptors; i++) {
|
||||
memcpy((void*) &extraWriteDescriptors[i], firstWriteDescriptor,
|
||||
sizeof(DmacDescriptor));
|
||||
}
|
||||
} // end malloc
|
||||
} // end extra descriptor check
|
||||
|
||||
if(use_dma) { // If everything allocated successfully,
|
||||
return; // then we're done here.
|
||||
} // Otherwise clean up interim allocations...
|
||||
writeChannel.free();
|
||||
} // end writeChannel alloc
|
||||
readChannel.free();
|
||||
} // end readChannel alloc
|
||||
|
||||
// NOT FATAL if channel or descriptor allocation fails.
|
||||
// transfer() function will fall back on a manual byte-by-byte loop.
|
||||
}
|
||||
|
||||
void SPIClass::transfer(const void *txbuf, void *rxbuf, size_t count,
|
||||
void SPIClass::transfer(const void* txbuf, void* rxbuf, size_t count,
|
||||
bool block) {
|
||||
|
||||
if((!txbuf && !rxbuf) || !count) { // Validate inputs
|
||||
return;
|
||||
}
|
||||
// OK to assume now that txbuf and/or rxbuf are non-NULL, an if/else is
|
||||
// often sufficient, don't need else-ifs for everything buffer related.
|
||||
|
||||
uint8_t *txbuf8 = (uint8_t *)txbuf; // Must cast to byte size
|
||||
uint8_t *rxbuf8 = (uint8_t *)rxbuf; // for pointer math
|
||||
|
||||
if(use_dma) { // DMA-BASED TRANSFER YAY ----------------------------------
|
||||
|
||||
static const uint8_t dum = 0xFF; // Dummy byte for read-only xfers
|
||||
|
||||
// Set up DMA descriptor lists -----------------------------------------
|
||||
|
||||
DmacDescriptor *rDesc = firstReadDescriptor;
|
||||
DmacDescriptor *wDesc = firstWriteDescriptor;
|
||||
int descIdx = 0; // Index into extra descriptor lists
|
||||
|
||||
while(count) { // Counts down to end of transfer
|
||||
uint32_t bytesThisDescriptor = count;
|
||||
if(bytesThisDescriptor > 65535) { // Limit each descriptor
|
||||
bytesThisDescriptor = 65535; // to 65535 (not 65536) bytes
|
||||
}
|
||||
rDesc->BTCNT.reg = wDesc->BTCNT.reg = bytesThisDescriptor;
|
||||
if(rxbuf) { // Read-only or read+write
|
||||
// Auto-inc addresses in DMA descriptors must point to END of data.
|
||||
// Buf pointers would advance at end of loop anyway, do it now...
|
||||
rxbuf8 += bytesThisDescriptor;
|
||||
rDesc->DSTADDR.reg = (uint32_t)rxbuf8;
|
||||
}
|
||||
if(txbuf) { // Write-only or read+write
|
||||
txbuf8 += bytesThisDescriptor; // Same as above
|
||||
wDesc->SRCADDR.reg = (uint32_t)txbuf8;
|
||||
wDesc->BTCTRL.bit.SRCINC = 1; // Increment source pointer
|
||||
} else { // Read-only requires dummy write
|
||||
wDesc->SRCADDR.reg = (uint32_t)&dum;
|
||||
wDesc->BTCTRL.bit.SRCINC = 0; // Don't increment source pointer
|
||||
}
|
||||
count -= bytesThisDescriptor;
|
||||
if(count) { // Still more data?
|
||||
// Link to next descriptors. Extra descriptors are IN ADDITION
|
||||
// to first, so it's safe and correct that descIdx starts at 0.
|
||||
rDesc->DESCADDR.reg = (uint32_t)&extraReadDescriptors[descIdx];
|
||||
wDesc->DESCADDR.reg = (uint32_t)&extraWriteDescriptors[descIdx];
|
||||
rDesc = &extraReadDescriptors[descIdx]; // Update pointers to
|
||||
wDesc = &extraWriteDescriptors[descIdx]; // next descriptors
|
||||
descIdx++;
|
||||
// A write-only transfer doesn't use the read descriptor list, but
|
||||
// it's quicker to build it (full of nonsense) anyway than to check.
|
||||
} else { // No more data, end descriptor linked lists
|
||||
rDesc->DESCADDR.reg = wDesc->DESCADDR.reg = 0;
|
||||
}
|
||||
}
|
||||
|
||||
// Set up DMA transfer job(s) ------------------------------------------
|
||||
|
||||
if(rxbuf) { // Read+write or read-only
|
||||
// End-of-read callback is already set up, disable write CB, start job
|
||||
writeChannel.setCallback(dmaDoNothingCallback);
|
||||
readChannel.startJob();
|
||||
} else { // Write-only, use end-of-write callback
|
||||
writeChannel.setCallback(dmaCallback);
|
||||
}
|
||||
|
||||
// Run DMA jobs, blocking if requested ---------------------------------
|
||||
|
||||
dma_busy = true;
|
||||
writeChannel.startJob(); // All xfers, even read-only, need write job.
|
||||
if(block) { // If blocking transfer requested,
|
||||
while(dma_busy); // wait for job to finish
|
||||
}
|
||||
|
||||
} else { // NON-DMA FALLBACK ---------------------------------------------
|
||||
|
||||
if(txbuf8) {
|
||||
if(rxbuf8) { // Write + read simultaneously
|
||||
while(count--) {
|
||||
*rxbuf8++ = _p_sercom->transferDataSPI(*txbuf8++);
|
||||
// If receiving data and the RX DMA channel is not yet allocated...
|
||||
if(rxbuf && (readChannel.getChannel() >= DMAC_CH_NUM)) {
|
||||
if(readChannel.allocate() == DMA_STATUS_OK) {
|
||||
readDescriptor =
|
||||
readChannel.addDescriptor(
|
||||
(void *)getDataRegister(), // Source address (SPI data reg)
|
||||
NULL, // Dest address (set later)
|
||||
0, // Count (set later)
|
||||
DMA_BEAT_SIZE_BYTE, // Bytes/hwords/words
|
||||
false, // Don't increment source address
|
||||
true); // Increment dest address
|
||||
readChannel.setTrigger(getDMAC_ID_RX());
|
||||
readChannel.setAction(DMA_TRIGGER_ACTON_BEAT);
|
||||
spiPtr[readChannel.getChannel()] = this;
|
||||
// Since all RX transfers involve a TX, a
|
||||
// separate callback here is not necessary.
|
||||
}
|
||||
} else { // Write only
|
||||
while(count--) {
|
||||
(void)_p_sercom->transferDataSPI(*txbuf8++);
|
||||
}
|
||||
}
|
||||
} else { // Read only
|
||||
while(count--) {
|
||||
*rxbuf8++ = _p_sercom->transferDataSPI(0xFF);
|
||||
}
|
||||
}
|
||||
|
||||
} // end non-DMA
|
||||
// Unlike the rxbuf check above, where a RX DMA channel is allocated
|
||||
// only if receiving data (and channel not previously alloc'd), the
|
||||
// TX DMA channel is always needed, because even RX-only SPI requires
|
||||
// writing dummy bytes to the peripheral.
|
||||
if(writeChannel.getChannel() >= DMAC_CH_NUM) {
|
||||
if(writeChannel.allocate() == DMA_STATUS_OK) {
|
||||
writeDescriptor =
|
||||
writeChannel.addDescriptor(
|
||||
NULL, // Source address (set later)
|
||||
(void *)getDataRegister(), // Dest (SPI data register)
|
||||
0, // Count (set later)
|
||||
DMA_BEAT_SIZE_BYTE, // Bytes/hwords/words
|
||||
true, // Increment source address
|
||||
false); // Don't increment dest address
|
||||
writeChannel.setTrigger(getDMAC_ID_TX());
|
||||
writeChannel.setAction(DMA_TRIGGER_ACTON_BEAT);
|
||||
writeChannel.setCallback(dmaCallback);
|
||||
spiPtr[writeChannel.getChannel()] = this;
|
||||
}
|
||||
}
|
||||
|
||||
if(writeDescriptor && (readDescriptor || !rxbuf)) {
|
||||
static const uint8_t dum = 0xFF; // Dummy byte for read-only xfers
|
||||
|
||||
// Initialize read descriptor dest address to rxbuf
|
||||
if(rxbuf) readDescriptor->DSTADDR.reg = (uint32_t)rxbuf;
|
||||
|
||||
// If reading only, set up writeDescriptor to issue dummy bytes
|
||||
// (set SRCADDR to &dum and SRCINC to 0). Otherwise, set SRCADDR
|
||||
// to txbuf and SRCINC to 1. Only needed once at start.
|
||||
if(rxbuf && !txbuf) {
|
||||
writeDescriptor->SRCADDR.reg = (uint32_t)&dum;
|
||||
writeDescriptor->BTCTRL.bit.SRCINC = 0;
|
||||
} else {
|
||||
writeDescriptor->SRCADDR.reg = (uint32_t)txbuf;
|
||||
writeDescriptor->BTCTRL.bit.SRCINC = 1;
|
||||
}
|
||||
|
||||
while(count > 0) {
|
||||
// Maximum bytes per DMA descriptor is 65,535 (NOT 65,536).
|
||||
// We could set up a descriptor chain, but that gets more
|
||||
// complex. For now, instead, break up long transfers into
|
||||
// chunks of 65,535 bytes max...these transfers are all
|
||||
// blocking, regardless of the "block" argument, except
|
||||
// for the last one which will observe the background request.
|
||||
// The fractional part is done first, so for any "partially
|
||||
// blocking" transfers like these at least it's the largest
|
||||
// single-descriptor transfer possible that occurs in the
|
||||
// background, rather than the tail end.
|
||||
int bytesThisPass;
|
||||
bool blockThisPass;
|
||||
if(count > 65535) { // Too big for 1 descriptor
|
||||
blockThisPass = true;
|
||||
bytesThisPass = count % 65535; // Fractional part
|
||||
if(!bytesThisPass) bytesThisPass = 65535;
|
||||
} else {
|
||||
blockThisPass = block;
|
||||
bytesThisPass = count;
|
||||
}
|
||||
|
||||
// Issue 'bytesThisPass' bytes...
|
||||
if(rxbuf) {
|
||||
// Reading, or reading + writing.
|
||||
// Set up read descriptor.
|
||||
// Src address doesn't change, only dest & count.
|
||||
// DMA needs address set to END of buffer, so
|
||||
// increment the address now, before the transfer.
|
||||
readDescriptor->DSTADDR.reg += bytesThisPass;
|
||||
readDescriptor->BTCNT.reg = bytesThisPass;
|
||||
// Start the RX job BEFORE the TX job!
|
||||
// That's the whole secret sauce to the two-channel transfer.
|
||||
// Nothing will actually happen until the write channel job
|
||||
// is also started.
|
||||
readChannel.startJob();
|
||||
}
|
||||
if(txbuf) {
|
||||
// DMA needs address set to END of buffer, so
|
||||
// increment the address now, before the transfer.
|
||||
writeDescriptor->SRCADDR.reg += bytesThisPass;
|
||||
}
|
||||
writeDescriptor->BTCNT.reg = bytesThisPass;
|
||||
dma_busy = true;
|
||||
writeChannel.startJob();
|
||||
count -= bytesThisPass;
|
||||
if(blockThisPass) {
|
||||
while(dma_busy);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
// Non-DMA fallback.
|
||||
uint8_t *txbuf8 = (uint8_t *)txbuf,
|
||||
*rxbuf8 = (uint8_t *)rxbuf;
|
||||
if(rxbuf8) {
|
||||
if(txbuf8) {
|
||||
// Writing and reading simultaneously
|
||||
while(count--) {
|
||||
*rxbuf8++ = _p_sercom->transferDataSPI(*txbuf8++);
|
||||
}
|
||||
} else {
|
||||
// Reading only
|
||||
while(count--) {
|
||||
*rxbuf8++ = _p_sercom->transferDataSPI(0xFF);
|
||||
}
|
||||
}
|
||||
} else if(txbuf) {
|
||||
// Writing only
|
||||
while(count--) {
|
||||
(void)_p_sercom->transferDataSPI(*txbuf8++);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Waits for a prior in-background DMA transfer to complete.
|
||||
void SPIClass::waitForTransfer(void) {
|
||||
while(dma_busy);
|
||||
while(dma_busy);
|
||||
}
|
||||
|
||||
/* returns the current DMA transfer status to allow non-blocking polling */
|
||||
bool SPIClass::isBusy(void) {
|
||||
return dma_busy;
|
||||
}
|
||||
|
||||
|
||||
// End DMA-based SPI transfer() code ---------------------------------------
|
||||
|
||||
void SPIClass::attachInterrupt() {
|
||||
// Should be enableInterrupt()
|
||||
}
|
||||
|
|
@ -492,12 +405,8 @@ static const struct {
|
|||
{ &SERCOM1->SPI.DATA.reg, SERCOM1_DMAC_ID_TX, SERCOM1_DMAC_ID_RX },
|
||||
{ &SERCOM2->SPI.DATA.reg, SERCOM2_DMAC_ID_TX, SERCOM2_DMAC_ID_RX },
|
||||
{ &SERCOM3->SPI.DATA.reg, SERCOM3_DMAC_ID_TX, SERCOM3_DMAC_ID_RX },
|
||||
#if defined(SERCOM4)
|
||||
{ &SERCOM4->SPI.DATA.reg, SERCOM4_DMAC_ID_TX, SERCOM4_DMAC_ID_RX },
|
||||
#endif
|
||||
#if defined(SERCOM5)
|
||||
{ &SERCOM5->SPI.DATA.reg, SERCOM5_DMAC_ID_TX, SERCOM5_DMAC_ID_RX },
|
||||
#endif
|
||||
#if defined(SERCOM6)
|
||||
{ &SERCOM6->SPI.DATA.reg, SERCOM6_DMAC_ID_TX, SERCOM6_DMAC_ID_RX },
|
||||
#endif
|
||||
|
|
@ -568,3 +477,4 @@ void SPIClass::setClockSource(SercomClockSource clk) {
|
|||
#if SPI_INTERFACES_COUNT > 5
|
||||
SPIClass SPI5(&PERIPH_SPI5, PIN_SPI5_MISO, PIN_SPI5_SCK, PIN_SPI5_MOSI, PAD_SPI5_TX, PAD_SPI5_RX);
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -52,11 +52,9 @@
|
|||
// The datasheet specifies a typical SPI SCK period (tSCK) of 42 ns,
|
||||
// see "Table 36-48. SPI Timing Characteristics and Requirements",
|
||||
// which translates into a maximum SPI clock of 23.8 MHz.
|
||||
// We'll permit use of 24 MHz SPI even though this is slightly out
|
||||
// of spec. Given how clock dividers work, the next "sensible"
|
||||
// threshold would be a substantial drop down to 12 MHz.
|
||||
// Conservatively, the divider is set for a 12 MHz maximum SPI clock.
|
||||
#if !defined(MAX_SPI)
|
||||
#define MAX_SPI 24000000
|
||||
#define MAX_SPI 12000000
|
||||
#endif
|
||||
#define SPI_MIN_CLOCK_DIVIDER (uint8_t)(1 + ((F_CPU - 1) / MAX_SPI))
|
||||
#endif
|
||||
|
|
@ -83,7 +81,7 @@ class SPISettings {
|
|||
#if defined(__SAMD51__)
|
||||
this->clockFreq = clock; // Clipping handled in SERCOM.cpp
|
||||
#else
|
||||
this->clockFreq = clock >= MAX_SPI ? MAX_SPI : clock;
|
||||
this->clockFreq = (clock >= (MAX_SPI * 2 / SPI_MIN_CLOCK_DIVIDER) ? MAX_SPI * 2 / SPI_MIN_CLOCK_DIVIDER : clock);
|
||||
#endif
|
||||
|
||||
this->bitOrder = (bitOrder == MSBFIRST ? MSB_FIRST : LSB_FIRST);
|
||||
|
|
@ -120,7 +118,6 @@ class SPIClass {
|
|||
void transfer(const void* txbuf, void* rxbuf, size_t count,
|
||||
bool block = true);
|
||||
void waitForTransfer(void);
|
||||
bool isBusy(void);
|
||||
|
||||
// Transaction Functions
|
||||
void usingInterrupt(int interruptNumber);
|
||||
|
|
@ -150,10 +147,11 @@ class SPIClass {
|
|||
#else
|
||||
// On SAMD21, this compiles to nothing, so user code doesn't need to
|
||||
// check and conditionally compile lines for different architectures.
|
||||
void setClockSource(SercomClockSource clk) { (void)clk; };
|
||||
void setClockSource(SercomClockSource clk) { };
|
||||
#endif // end __SAMD51__
|
||||
|
||||
private:
|
||||
void init();
|
||||
void config(SPISettings settings);
|
||||
|
||||
SERCOM *_p_sercom;
|
||||
|
|
@ -169,16 +167,12 @@ class SPIClass {
|
|||
char interruptSave;
|
||||
uint32_t interruptMask;
|
||||
|
||||
// transfer(txbuf, rxbuf, count, block) uses DMA when possible
|
||||
Adafruit_ZeroDMA readChannel;
|
||||
Adafruit_ZeroDMA writeChannel;
|
||||
DmacDescriptor *firstReadDescriptor = NULL; // List entry point
|
||||
DmacDescriptor *firstWriteDescriptor = NULL;
|
||||
DmacDescriptor *extraReadDescriptors = NULL; // Add'l descriptors
|
||||
DmacDescriptor *extraWriteDescriptors = NULL;
|
||||
bool use_dma = false; // true on successful alloc
|
||||
volatile bool dma_busy = false;
|
||||
void dmaAllocate(void);
|
||||
// transfer(txbuf, rxbuf, count, block) uses DMA if possible
|
||||
Adafruit_ZeroDMA readChannel,
|
||||
writeChannel;
|
||||
DmacDescriptor *readDescriptor = NULL,
|
||||
*writeDescriptor = NULL;
|
||||
volatile bool dma_busy = false;
|
||||
static void dmaCallback(Adafruit_ZeroDMA *dma);
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,25 +0,0 @@
|
|||
= Servo Library for Arduino =
|
||||
|
||||
This library allows an Arduino board to control RC (hobby) servo motors.
|
||||
|
||||
For more information about this library please visit us at
|
||||
http://www.arduino.cc/en/Reference/Servo
|
||||
|
||||
== License ==
|
||||
|
||||
Copyright (c) 2013 Arduino LLC. All right reserved.
|
||||
Copyright (c) 2009 Michael Margolis. All right reserved.
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with this library; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
/*
|
||||
Controlling a servo position using a potentiometer (variable resistor)
|
||||
by Michal Rinott <http://people.interaction-ivrea.it/m.rinott>
|
||||
|
||||
modified on 8 Nov 2013
|
||||
by Scott Fitzgerald
|
||||
http://www.arduino.cc/en/Tutorial/Knob
|
||||
*/
|
||||
|
||||
#include <Servo.h>
|
||||
|
||||
Servo myservo; // create servo object to control a servo
|
||||
|
||||
int potpin = 0; // analog pin used to connect the potentiometer
|
||||
int val; // variable to read the value from the analog pin
|
||||
|
||||
void setup() {
|
||||
myservo.attach(9); // attaches the servo on pin 9 to the servo object
|
||||
}
|
||||
|
||||
void loop() {
|
||||
val = analogRead(potpin); // reads the value of the potentiometer (value between 0 and 1023)
|
||||
val = map(val, 0, 1023, 0, 180); // scale it to use it with the servo (value between 0 and 180)
|
||||
myservo.write(val); // sets the servo position according to the scaled value
|
||||
delay(15); // waits for the servo to get there
|
||||
}
|
||||
|
||||
|
|
@ -1,32 +0,0 @@
|
|||
/* Sweep
|
||||
by BARRAGAN <http://barraganstudio.com>
|
||||
This example code is in the public domain.
|
||||
|
||||
modified 8 Nov 2013
|
||||
by Scott Fitzgerald
|
||||
http://www.arduino.cc/en/Tutorial/Sweep
|
||||
*/
|
||||
|
||||
#include <Servo.h>
|
||||
|
||||
Servo myservo; // create servo object to control a servo
|
||||
// twelve servo objects can be created on most boards
|
||||
|
||||
int pos = 0; // variable to store the servo position
|
||||
|
||||
void setup() {
|
||||
myservo.attach(9); // attaches the servo on pin 9 to the servo object
|
||||
}
|
||||
|
||||
void loop() {
|
||||
for (pos = 0; pos <= 180; pos += 1) { // goes from 0 degrees to 180 degrees
|
||||
// in steps of 1 degree
|
||||
myservo.write(pos); // tell servo to go to position in variable 'pos'
|
||||
delay(15); // waits 15ms for the servo to reach the position
|
||||
}
|
||||
for (pos = 180; pos >= 0; pos -= 1) { // goes from 180 degrees to 0 degrees
|
||||
myservo.write(pos); // tell servo to go to position in variable 'pos'
|
||||
delay(15); // waits 15ms for the servo to reach the position
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,24 +0,0 @@
|
|||
#######################################
|
||||
# Syntax Coloring Map Servo
|
||||
#######################################
|
||||
|
||||
#######################################
|
||||
# Datatypes (KEYWORD1)
|
||||
#######################################
|
||||
|
||||
Servo KEYWORD1 Servo
|
||||
|
||||
#######################################
|
||||
# Methods and Functions (KEYWORD2)
|
||||
#######################################
|
||||
attach KEYWORD2
|
||||
detach KEYWORD2
|
||||
write KEYWORD2
|
||||
read KEYWORD2
|
||||
attached KEYWORD2
|
||||
writeMicroseconds KEYWORD2
|
||||
readMicroseconds KEYWORD2
|
||||
|
||||
#######################################
|
||||
# Constants (LITERAL1)
|
||||
#######################################
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
name=Servo
|
||||
version=1.1.4
|
||||
author=Michael Margolis, Arduino
|
||||
maintainer=Arduino <info@arduino.cc>
|
||||
sentence=Allows Arduino/Genuino boards to control a variety of servo motors.
|
||||
paragraph=This library can control a great number of servos.<br />It makes careful use of timers: the library can control 12 servos using only 1 timer.<br />On the Arduino Due you can control up to 60 servos.<br />
|
||||
category=Device Control
|
||||
url=http://www.arduino.cc/en/Reference/Servo
|
||||
architectures=avr,megaavr,sam,samd,nrf52,stm32f4
|
||||
|
|
@ -1,121 +0,0 @@
|
|||
/*
|
||||
Servo.h - Interrupt driven Servo library for Arduino using 16 bit timers- Version 2
|
||||
Copyright (c) 2009 Michael Margolis. All right reserved.
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with this library; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
A servo is activated by creating an instance of the Servo class passing
|
||||
the desired pin to the attach() method.
|
||||
The servos are pulsed in the background using the value most recently
|
||||
written using the write() method.
|
||||
|
||||
Note that analogWrite of PWM on pins associated with the timer are
|
||||
disabled when the first servo is attached.
|
||||
Timers are seized as needed in groups of 12 servos - 24 servos use two
|
||||
timers, 48 servos will use four.
|
||||
The sequence used to sieze timers is defined in timers.h
|
||||
|
||||
The methods are:
|
||||
|
||||
Servo - Class for manipulating servo motors connected to Arduino pins.
|
||||
|
||||
attach(pin ) - Attaches a servo motor to an i/o pin.
|
||||
attach(pin, min, max ) - Attaches to a pin setting min and max values in microseconds
|
||||
default min is 544, max is 2400
|
||||
|
||||
write() - Sets the servo angle in degrees. (invalid angle that is valid as pulse in microseconds is treated as microseconds)
|
||||
writeMicroseconds() - Sets the servo pulse width in microseconds
|
||||
read() - Gets the last written servo pulse width as an angle between 0 and 180.
|
||||
readMicroseconds() - Gets the last written servo pulse width in microseconds. (was read_us() in first release)
|
||||
attached() - Returns true if there is a servo attached.
|
||||
detach() - Stops an attached servos from pulsing its i/o pin.
|
||||
*/
|
||||
|
||||
#ifndef Servo_h
|
||||
#define Servo_h
|
||||
|
||||
#include <inttypes.h>
|
||||
|
||||
/*
|
||||
* Defines for 16 bit timers used with Servo library
|
||||
*
|
||||
* If _useTimerX is defined then TimerX is a 16 bit timer on the current board
|
||||
* timer16_Sequence_t enumerates the sequence that the timers should be allocated
|
||||
* _Nbr_16timers indicates how many 16 bit timers are available.
|
||||
*/
|
||||
|
||||
// Architecture specific include
|
||||
#if defined(ARDUINO_ARCH_AVR)
|
||||
#include "avr/ServoTimers.h"
|
||||
#elif defined(ARDUINO_ARCH_SAM)
|
||||
#include "sam/ServoTimers.h"
|
||||
#elif defined(ARDUINO_ARCH_SAMD)
|
||||
#include "samd/ServoTimers.h"
|
||||
#elif defined(ARDUINO_ARCH_STM32F4)
|
||||
#include "stm32f4/ServoTimers.h"
|
||||
#elif defined(ARDUINO_ARCH_NRF52)
|
||||
#include "nrf52/ServoTimers.h"
|
||||
#elif defined(ARDUINO_ARCH_MEGAAVR)
|
||||
#include "megaavr/ServoTimers.h"
|
||||
#else
|
||||
#error "This library only supports boards with an AVR, SAM, SAMD, NRF52 or STM32F4 processor."
|
||||
#endif
|
||||
|
||||
#define Servo_VERSION 2 // software version of this library
|
||||
|
||||
#define MIN_PULSE_WIDTH 544 // the shortest pulse sent to a servo
|
||||
#define MAX_PULSE_WIDTH 2400 // the longest pulse sent to a servo
|
||||
#define DEFAULT_PULSE_WIDTH 1500 // default pulse width when servo is attached
|
||||
#define REFRESH_INTERVAL 20000 // minumim time to refresh servos in microseconds
|
||||
|
||||
#define SERVOS_PER_TIMER 12 // the maximum number of servos controlled by one timer
|
||||
#define MAX_SERVOS (_Nbr_16timers * SERVOS_PER_TIMER)
|
||||
|
||||
#define INVALID_SERVO 255 // flag indicating an invalid servo index
|
||||
|
||||
#if !defined(ARDUINO_ARCH_STM32F4)
|
||||
|
||||
typedef struct {
|
||||
uint8_t nbr :6 ; // a pin number from 0 to 63
|
||||
uint8_t isActive :1 ; // true if this channel is enabled, pin not pulsed if false
|
||||
} ServoPin_t ;
|
||||
|
||||
typedef struct {
|
||||
ServoPin_t Pin;
|
||||
volatile unsigned int ticks;
|
||||
} servo_t;
|
||||
|
||||
class Servo
|
||||
{
|
||||
public:
|
||||
Servo();
|
||||
uint8_t attach(int pin); // attach the given pin to the next free channel, sets pinMode, returns channel number or 0 if failure
|
||||
uint8_t attach(int pin, int min, int max); // as above but also sets min and max values for writes.
|
||||
void detach();
|
||||
void write(int value); // if value is < 200 its treated as an angle, otherwise as pulse width in microseconds
|
||||
void writeMicroseconds(int value); // Write pulse width in microseconds
|
||||
int read(); // returns current pulse width as an angle between 0 and 180 degrees
|
||||
int readMicroseconds(); // returns current pulse width in microseconds for this servo (was read_us() in first release)
|
||||
bool attached(); // return true if this servo is attached, otherwise false
|
||||
private:
|
||||
uint8_t servoIndex; // index into the channel data for this servo
|
||||
int8_t min; // minimum is this value times 4 added to MIN_PULSE_WIDTH
|
||||
int8_t max; // maximum is this value times 4 added to MAX_PULSE_WIDTH
|
||||
};
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
@ -1,318 +0,0 @@
|
|||
/*
|
||||
Servo.cpp - Interrupt driven Servo library for Arduino using 16 bit timers- Version 2
|
||||
Copyright (c) 2009 Michael Margolis. All right reserved.
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with this library; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#if defined(ARDUINO_ARCH_AVR)
|
||||
|
||||
#include <avr/interrupt.h>
|
||||
#include <Arduino.h>
|
||||
|
||||
#include "Servo.h"
|
||||
|
||||
#define usToTicks(_us) (( clockCyclesPerMicrosecond()* _us) / 8) // converts microseconds to tick (assumes prescale of 8) // 12 Aug 2009
|
||||
#define ticksToUs(_ticks) (( (unsigned)_ticks * 8)/ clockCyclesPerMicrosecond() ) // converts from ticks back to microseconds
|
||||
|
||||
|
||||
#define TRIM_DURATION 2 // compensation ticks to trim adjust for digitalWrite delays // 12 August 2009
|
||||
|
||||
//#define NBR_TIMERS (MAX_SERVOS / SERVOS_PER_TIMER)
|
||||
|
||||
static servo_t servos[MAX_SERVOS]; // static array of servo structures
|
||||
static volatile int8_t Channel[_Nbr_16timers ]; // counter for the servo being pulsed for each timer (or -1 if refresh interval)
|
||||
|
||||
uint8_t ServoCount = 0; // the total number of attached servos
|
||||
|
||||
|
||||
// convenience macros
|
||||
#define SERVO_INDEX_TO_TIMER(_servo_nbr) ((timer16_Sequence_t)(_servo_nbr / SERVOS_PER_TIMER)) // returns the timer controlling this servo
|
||||
#define SERVO_INDEX_TO_CHANNEL(_servo_nbr) (_servo_nbr % SERVOS_PER_TIMER) // returns the index of the servo on this timer
|
||||
#define SERVO_INDEX(_timer,_channel) ((_timer*SERVOS_PER_TIMER) + _channel) // macro to access servo index by timer and channel
|
||||
#define SERVO(_timer,_channel) (servos[SERVO_INDEX(_timer,_channel)]) // macro to access servo class by timer and channel
|
||||
|
||||
#define SERVO_MIN() (MIN_PULSE_WIDTH - this->min * 4) // minimum value in uS for this servo
|
||||
#define SERVO_MAX() (MAX_PULSE_WIDTH - this->max * 4) // maximum value in uS for this servo
|
||||
|
||||
/************ static functions common to all instances ***********************/
|
||||
|
||||
static inline void handle_interrupts(timer16_Sequence_t timer, volatile uint16_t *TCNTn, volatile uint16_t* OCRnA)
|
||||
{
|
||||
if( Channel[timer] < 0 )
|
||||
*TCNTn = 0; // channel set to -1 indicated that refresh interval completed so reset the timer
|
||||
else{
|
||||
if( SERVO_INDEX(timer,Channel[timer]) < ServoCount && SERVO(timer,Channel[timer]).Pin.isActive == true )
|
||||
digitalWrite( SERVO(timer,Channel[timer]).Pin.nbr,LOW); // pulse this channel low if activated
|
||||
}
|
||||
|
||||
Channel[timer]++; // increment to the next channel
|
||||
if( SERVO_INDEX(timer,Channel[timer]) < ServoCount && Channel[timer] < SERVOS_PER_TIMER) {
|
||||
*OCRnA = *TCNTn + SERVO(timer,Channel[timer]).ticks;
|
||||
if(SERVO(timer,Channel[timer]).Pin.isActive == true) // check if activated
|
||||
digitalWrite( SERVO(timer,Channel[timer]).Pin.nbr,HIGH); // its an active channel so pulse it high
|
||||
}
|
||||
else {
|
||||
// finished all channels so wait for the refresh period to expire before starting over
|
||||
if( ((unsigned)*TCNTn) + 4 < usToTicks(REFRESH_INTERVAL) ) // allow a few ticks to ensure the next OCR1A not missed
|
||||
*OCRnA = (unsigned int)usToTicks(REFRESH_INTERVAL);
|
||||
else
|
||||
*OCRnA = *TCNTn + 4; // at least REFRESH_INTERVAL has elapsed
|
||||
Channel[timer] = -1; // this will get incremented at the end of the refresh period to start again at the first channel
|
||||
}
|
||||
}
|
||||
|
||||
#ifndef WIRING // Wiring pre-defines signal handlers so don't define any if compiling for the Wiring platform
|
||||
// Interrupt handlers for Arduino
|
||||
#if defined(_useTimer1)
|
||||
SIGNAL (TIMER1_COMPA_vect)
|
||||
{
|
||||
handle_interrupts(_timer1, &TCNT1, &OCR1A);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(_useTimer3)
|
||||
SIGNAL (TIMER3_COMPA_vect)
|
||||
{
|
||||
handle_interrupts(_timer3, &TCNT3, &OCR3A);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(_useTimer4)
|
||||
SIGNAL (TIMER4_COMPA_vect)
|
||||
{
|
||||
handle_interrupts(_timer4, &TCNT4, &OCR4A);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(_useTimer5)
|
||||
SIGNAL (TIMER5_COMPA_vect)
|
||||
{
|
||||
handle_interrupts(_timer5, &TCNT5, &OCR5A);
|
||||
}
|
||||
#endif
|
||||
|
||||
#elif defined WIRING
|
||||
// Interrupt handlers for Wiring
|
||||
#if defined(_useTimer1)
|
||||
void Timer1Service()
|
||||
{
|
||||
handle_interrupts(_timer1, &TCNT1, &OCR1A);
|
||||
}
|
||||
#endif
|
||||
#if defined(_useTimer3)
|
||||
void Timer3Service()
|
||||
{
|
||||
handle_interrupts(_timer3, &TCNT3, &OCR3A);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
static void initISR(timer16_Sequence_t timer)
|
||||
{
|
||||
#if defined (_useTimer1)
|
||||
if(timer == _timer1) {
|
||||
TCCR1A = 0; // normal counting mode
|
||||
TCCR1B = _BV(CS11); // set prescaler of 8
|
||||
TCNT1 = 0; // clear the timer count
|
||||
#if defined(__AVR_ATmega8__)|| defined(__AVR_ATmega128__)
|
||||
TIFR |= _BV(OCF1A); // clear any pending interrupts;
|
||||
TIMSK |= _BV(OCIE1A) ; // enable the output compare interrupt
|
||||
#else
|
||||
// here if not ATmega8 or ATmega128
|
||||
TIFR1 |= _BV(OCF1A); // clear any pending interrupts;
|
||||
TIMSK1 |= _BV(OCIE1A) ; // enable the output compare interrupt
|
||||
#endif
|
||||
#if defined(WIRING)
|
||||
timerAttach(TIMER1OUTCOMPAREA_INT, Timer1Service);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined (_useTimer3)
|
||||
if(timer == _timer3) {
|
||||
TCCR3A = 0; // normal counting mode
|
||||
TCCR3B = _BV(CS31); // set prescaler of 8
|
||||
TCNT3 = 0; // clear the timer count
|
||||
#if defined(__AVR_ATmega128__)
|
||||
TIFR |= _BV(OCF3A); // clear any pending interrupts;
|
||||
ETIMSK |= _BV(OCIE3A); // enable the output compare interrupt
|
||||
#else
|
||||
TIFR3 = _BV(OCF3A); // clear any pending interrupts;
|
||||
TIMSK3 = _BV(OCIE3A) ; // enable the output compare interrupt
|
||||
#endif
|
||||
#if defined(WIRING)
|
||||
timerAttach(TIMER3OUTCOMPAREA_INT, Timer3Service); // for Wiring platform only
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined (_useTimer4)
|
||||
if(timer == _timer4) {
|
||||
TCCR4A = 0; // normal counting mode
|
||||
TCCR4B = _BV(CS41); // set prescaler of 8
|
||||
TCNT4 = 0; // clear the timer count
|
||||
TIFR4 = _BV(OCF4A); // clear any pending interrupts;
|
||||
TIMSK4 = _BV(OCIE4A) ; // enable the output compare interrupt
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined (_useTimer5)
|
||||
if(timer == _timer5) {
|
||||
TCCR5A = 0; // normal counting mode
|
||||
TCCR5B = _BV(CS51); // set prescaler of 8
|
||||
TCNT5 = 0; // clear the timer count
|
||||
TIFR5 = _BV(OCF5A); // clear any pending interrupts;
|
||||
TIMSK5 = _BV(OCIE5A) ; // enable the output compare interrupt
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void finISR(timer16_Sequence_t timer)
|
||||
{
|
||||
//disable use of the given timer
|
||||
#if defined WIRING // Wiring
|
||||
if(timer == _timer1) {
|
||||
#if defined(__AVR_ATmega1281__)||defined(__AVR_ATmega2561__)
|
||||
TIMSK1 &= ~_BV(OCIE1A) ; // disable timer 1 output compare interrupt
|
||||
#else
|
||||
TIMSK &= ~_BV(OCIE1A) ; // disable timer 1 output compare interrupt
|
||||
#endif
|
||||
timerDetach(TIMER1OUTCOMPAREA_INT);
|
||||
}
|
||||
else if(timer == _timer3) {
|
||||
#if defined(__AVR_ATmega1281__)||defined(__AVR_ATmega2561__)
|
||||
TIMSK3 &= ~_BV(OCIE3A); // disable the timer3 output compare A interrupt
|
||||
#else
|
||||
ETIMSK &= ~_BV(OCIE3A); // disable the timer3 output compare A interrupt
|
||||
#endif
|
||||
timerDetach(TIMER3OUTCOMPAREA_INT);
|
||||
}
|
||||
#else
|
||||
//For arduino - in future: call here to a currently undefined function to reset the timer
|
||||
(void) timer; // squash "unused parameter 'timer' [-Wunused-parameter]" warning
|
||||
#endif
|
||||
}
|
||||
|
||||
static boolean isTimerActive(timer16_Sequence_t timer)
|
||||
{
|
||||
// returns true if any servo is active on this timer
|
||||
for(uint8_t channel=0; channel < SERVOS_PER_TIMER; channel++) {
|
||||
if(SERVO(timer,channel).Pin.isActive == true)
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
/****************** end of static functions ******************************/
|
||||
|
||||
Servo::Servo()
|
||||
{
|
||||
if( ServoCount < MAX_SERVOS) {
|
||||
this->servoIndex = ServoCount++; // assign a servo index to this instance
|
||||
servos[this->servoIndex].ticks = usToTicks(DEFAULT_PULSE_WIDTH); // store default values - 12 Aug 2009
|
||||
}
|
||||
else
|
||||
this->servoIndex = INVALID_SERVO ; // too many servos
|
||||
}
|
||||
|
||||
uint8_t Servo::attach(int pin)
|
||||
{
|
||||
return this->attach(pin, MIN_PULSE_WIDTH, MAX_PULSE_WIDTH);
|
||||
}
|
||||
|
||||
uint8_t Servo::attach(int pin, int min, int max)
|
||||
{
|
||||
if(this->servoIndex < MAX_SERVOS ) {
|
||||
pinMode( pin, OUTPUT) ; // set servo pin to output
|
||||
servos[this->servoIndex].Pin.nbr = pin;
|
||||
// todo min/max check: abs(min - MIN_PULSE_WIDTH) /4 < 128
|
||||
this->min = (MIN_PULSE_WIDTH - min)/4; //resolution of min/max is 4 uS
|
||||
this->max = (MAX_PULSE_WIDTH - max)/4;
|
||||
// initialize the timer if it has not already been initialized
|
||||
timer16_Sequence_t timer = SERVO_INDEX_TO_TIMER(servoIndex);
|
||||
if(isTimerActive(timer) == false)
|
||||
initISR(timer);
|
||||
servos[this->servoIndex].Pin.isActive = true; // this must be set after the check for isTimerActive
|
||||
}
|
||||
return this->servoIndex ;
|
||||
}
|
||||
|
||||
void Servo::detach()
|
||||
{
|
||||
servos[this->servoIndex].Pin.isActive = false;
|
||||
timer16_Sequence_t timer = SERVO_INDEX_TO_TIMER(servoIndex);
|
||||
if(isTimerActive(timer) == false) {
|
||||
finISR(timer);
|
||||
}
|
||||
}
|
||||
|
||||
void Servo::write(int value)
|
||||
{
|
||||
if(value < MIN_PULSE_WIDTH)
|
||||
{ // treat values less than 544 as angles in degrees (valid values in microseconds are handled as microseconds)
|
||||
if(value < 0) value = 0;
|
||||
if(value > 180) value = 180;
|
||||
value = map(value, 0, 180, SERVO_MIN(), SERVO_MAX());
|
||||
}
|
||||
this->writeMicroseconds(value);
|
||||
}
|
||||
|
||||
void Servo::writeMicroseconds(int value)
|
||||
{
|
||||
// calculate and store the values for the given channel
|
||||
byte channel = this->servoIndex;
|
||||
if( (channel < MAX_SERVOS) ) // ensure channel is valid
|
||||
{
|
||||
if( value < SERVO_MIN() ) // ensure pulse width is valid
|
||||
value = SERVO_MIN();
|
||||
else if( value > SERVO_MAX() )
|
||||
value = SERVO_MAX();
|
||||
|
||||
value = value - TRIM_DURATION;
|
||||
value = usToTicks(value); // convert to ticks after compensating for interrupt overhead - 12 Aug 2009
|
||||
|
||||
uint8_t oldSREG = SREG;
|
||||
cli();
|
||||
servos[channel].ticks = value;
|
||||
SREG = oldSREG;
|
||||
}
|
||||
}
|
||||
|
||||
int Servo::read() // return the value as degrees
|
||||
{
|
||||
return map( this->readMicroseconds()+1, SERVO_MIN(), SERVO_MAX(), 0, 180);
|
||||
}
|
||||
|
||||
int Servo::readMicroseconds()
|
||||
{
|
||||
unsigned int pulsewidth;
|
||||
if( this->servoIndex != INVALID_SERVO )
|
||||
pulsewidth = ticksToUs(servos[this->servoIndex].ticks) + TRIM_DURATION ; // 12 aug 2009
|
||||
else
|
||||
pulsewidth = 0;
|
||||
|
||||
return pulsewidth;
|
||||
}
|
||||
|
||||
bool Servo::attached()
|
||||
{
|
||||
return servos[this->servoIndex].Pin.isActive ;
|
||||
}
|
||||
|
||||
#endif // ARDUINO_ARCH_AVR
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue