758 lines
17 KiB
C++
758 lines
17 KiB
C++
/*
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Copyright (c) 2014 Arduino. All right reserved.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "SERCOM.h"
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#include "variant.h"
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#include "Arduino.h"
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SERCOM::SERCOM(Sercom* s)
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{
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sercom = s;
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}
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/* =========================
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* ===== Sercom UART
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* =========================
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*/
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void SERCOM::initUART(SercomUartMode mode, SercomUartSampleRate sampleRate, uint32_t baudrate)
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{
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initClockNVIC();
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resetUART();
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//Setting the CTRLA register
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sercom->USART.CTRLA.reg = SERCOM_USART_CTRLA_MODE(mode) |
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SERCOM_USART_CTRLA_SAMPR(sampleRate);
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//Setting the Interrupt register
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sercom->USART.INTENSET.reg = SERCOM_USART_INTENSET_RXC | //Received complete
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SERCOM_USART_INTENSET_ERROR; //All others errors
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if ( mode == UART_INT_CLOCK )
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{
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uint16_t sampleRateValue;
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if (sampleRate == SAMPLE_RATE_x16) {
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sampleRateValue = 16;
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} else {
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sampleRateValue = 8;
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}
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// Asynchronous fractional mode (Table 24-2 in datasheet)
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// BAUD = fref / (sampleRateValue * fbaud)
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// (multiply by 8, to calculate fractional piece)
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#if defined(__SAMD51__)
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uint32_t baudTimes8 = (SERCOM_FREQ_REF * 8) / (sampleRateValue * baudrate);
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#else
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uint32_t baudTimes8 = (SystemCoreClock * 8) / (sampleRateValue * baudrate);
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#endif
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sercom->USART.BAUD.FRAC.FP = (baudTimes8 % 8);
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sercom->USART.BAUD.FRAC.BAUD = (baudTimes8 / 8);
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}
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}
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void SERCOM::initFrame(SercomUartCharSize charSize, SercomDataOrder dataOrder, SercomParityMode parityMode, SercomNumberStopBit nbStopBits)
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{
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//Setting the CTRLA register
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sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_FORM( (parityMode == SERCOM_NO_PARITY ? 0 : 1) ) |
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dataOrder << SERCOM_USART_CTRLA_DORD_Pos;
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//Setting the CTRLB register
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sercom->USART.CTRLB.reg |= SERCOM_USART_CTRLB_CHSIZE(charSize) |
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nbStopBits << SERCOM_USART_CTRLB_SBMODE_Pos |
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(parityMode == SERCOM_NO_PARITY ? 0 : parityMode) << SERCOM_USART_CTRLB_PMODE_Pos; //If no parity use default value
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}
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void SERCOM::initPads(SercomUartTXPad txPad, SercomRXPad rxPad)
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{
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//Setting the CTRLA register
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sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_TXPO(txPad) |
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SERCOM_USART_CTRLA_RXPO(rxPad);
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// Enable Transceiver and Receiver
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sercom->USART.CTRLB.reg |= SERCOM_USART_CTRLB_TXEN | SERCOM_USART_CTRLB_RXEN ;
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}
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void SERCOM::resetUART()
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{
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// Start the Software Reset
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sercom->USART.CTRLA.bit.SWRST = 1 ;
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while ( sercom->USART.CTRLA.bit.SWRST || sercom->USART.SYNCBUSY.bit.SWRST )
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{
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// Wait for both bits Software Reset from CTRLA and SYNCBUSY coming back to 0
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}
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}
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void SERCOM::enableUART()
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{
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//Setting the enable bit to 1
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sercom->USART.CTRLA.bit.ENABLE = 0x1u;
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//Wait for then enable bit from SYNCBUSY is equal to 0;
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while(sercom->USART.SYNCBUSY.bit.ENABLE);
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}
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void SERCOM::flushUART()
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{
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// Skip checking transmission completion if data register is empty
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if(isDataRegisterEmptyUART())
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return;
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// Wait for transmission to complete
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while(!sercom->USART.INTFLAG.bit.TXC);
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}
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void SERCOM::clearStatusUART()
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{
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//Reset (with 0) the STATUS register
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sercom->USART.STATUS.reg = SERCOM_USART_STATUS_RESETVALUE;
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}
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bool SERCOM::availableDataUART()
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{
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//RXC : Receive Complete
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return sercom->USART.INTFLAG.bit.RXC;
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}
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bool SERCOM::isUARTError()
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{
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return sercom->USART.INTFLAG.bit.ERROR;
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}
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void SERCOM::acknowledgeUARTError()
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{
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sercom->USART.INTFLAG.bit.ERROR = 1;
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}
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bool SERCOM::isBufferOverflowErrorUART()
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{
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//BUFOVF : Buffer Overflow
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return sercom->USART.STATUS.bit.BUFOVF;
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}
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bool SERCOM::isFrameErrorUART()
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{
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//FERR : Frame Error
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return sercom->USART.STATUS.bit.FERR;
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}
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bool SERCOM::isParityErrorUART()
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{
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//PERR : Parity Error
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return sercom->USART.STATUS.bit.PERR;
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}
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bool SERCOM::isDataRegisterEmptyUART()
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{
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//DRE : Data Register Empty
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return sercom->USART.INTFLAG.bit.DRE;
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}
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uint8_t SERCOM::readDataUART()
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{
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return sercom->USART.DATA.bit.DATA;
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}
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int SERCOM::writeDataUART(uint8_t data)
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{
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// Wait for data register to be empty
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while(!isDataRegisterEmptyUART());
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//Put data into DATA register
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sercom->USART.DATA.reg = (uint16_t)data;
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return 1;
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}
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/* =========================
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* ===== Sercom SPI
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* =========================
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*/
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void SERCOM::initSPI(SercomSpiTXPad mosi, SercomRXPad miso, SercomSpiCharSize charSize, SercomDataOrder dataOrder)
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{
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resetSPI();
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initClockNVIC();
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#if defined(__SAMD51__)
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sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(0x3) | //master mode
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SERCOM_SPI_CTRLA_DOPO(mosi) |
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SERCOM_SPI_CTRLA_DIPO(miso) |
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dataOrder << SERCOM_SPI_CTRLA_DORD_Pos;
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#else
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//Setting the CTRLA register
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sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE_SPI_MASTER |
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SERCOM_SPI_CTRLA_DOPO(mosi) |
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SERCOM_SPI_CTRLA_DIPO(miso) |
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dataOrder << SERCOM_SPI_CTRLA_DORD_Pos;
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#endif
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//Setting the CTRLB register
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sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(charSize) |
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SERCOM_SPI_CTRLB_RXEN; //Active the SPI receiver.
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while( sercom->SPI.SYNCBUSY.bit.CTRLB == 1 );
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}
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void SERCOM::initSPIClock(SercomSpiClockMode clockMode, uint32_t baudrate)
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{
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//Extract data from clockMode
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int cpha, cpol;
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if((clockMode & (0x1ul)) == 0 )
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cpha = 0;
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else
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cpha = 1;
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if((clockMode & (0x2ul)) == 0)
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cpol = 0;
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else
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cpol = 1;
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//Setting the CTRLA register
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sercom->SPI.CTRLA.reg |= ( cpha << SERCOM_SPI_CTRLA_CPHA_Pos ) |
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( cpol << SERCOM_SPI_CTRLA_CPOL_Pos );
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//Synchronous arithmetic
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sercom->SPI.BAUD.reg = calculateBaudrateSynchronous(baudrate);
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}
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void SERCOM::resetSPI()
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{
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//Setting the Software Reset bit to 1
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sercom->SPI.CTRLA.bit.SWRST = 1;
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//Wait both bits Software Reset from CTRLA and SYNCBUSY are equal to 0
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while(sercom->SPI.CTRLA.bit.SWRST || sercom->SPI.SYNCBUSY.bit.SWRST);
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}
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void SERCOM::enableSPI()
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{
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//Setting the enable bit to 1
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sercom->SPI.CTRLA.bit.ENABLE = 1;
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while(sercom->SPI.SYNCBUSY.bit.ENABLE)
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{
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//Waiting then enable bit from SYNCBUSY is equal to 0;
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}
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}
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void SERCOM::disableSPI()
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{
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while(sercom->SPI.SYNCBUSY.bit.ENABLE)
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{
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//Waiting then enable bit from SYNCBUSY is equal to 0;
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}
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//Setting the enable bit to 0
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sercom->SPI.CTRLA.bit.ENABLE = 0;
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}
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void SERCOM::setDataOrderSPI(SercomDataOrder dataOrder)
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{
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//Register enable-protected
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disableSPI();
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sercom->SPI.CTRLA.bit.DORD = dataOrder;
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enableSPI();
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}
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SercomDataOrder SERCOM::getDataOrderSPI()
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{
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return (sercom->SPI.CTRLA.bit.DORD ? LSB_FIRST : MSB_FIRST);
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}
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void SERCOM::setBaudrateSPI(uint8_t divider)
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{
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//Can't divide by 0
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if(divider == 0)
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return;
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//Register enable-protected
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disableSPI();
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sercom->SPI.BAUD.reg = calculateBaudrateSynchronous( SERCOM_FREQ_REF / divider );
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enableSPI();
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}
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void SERCOM::setClockModeSPI(SercomSpiClockMode clockMode)
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{
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int cpha, cpol;
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if((clockMode & (0x1ul)) == 0)
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cpha = 0;
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else
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cpha = 1;
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if((clockMode & (0x2ul)) == 0)
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cpol = 0;
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else
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cpol = 1;
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//Register enable-protected
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disableSPI();
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sercom->SPI.CTRLA.bit.CPOL = cpol;
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sercom->SPI.CTRLA.bit.CPHA = cpha;
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enableSPI();
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}
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uint8_t SERCOM::transferDataSPI(uint8_t data)
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{
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sercom->SPI.DATA.bit.DATA = data; // Writing data into Data register
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while( sercom->SPI.INTFLAG.bit.RXC == 0 )
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{
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// Waiting Complete Reception
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}
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return sercom->SPI.DATA.bit.DATA; // Reading data
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}
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bool SERCOM::isBufferOverflowErrorSPI()
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{
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return sercom->SPI.STATUS.bit.BUFOVF;
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}
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bool SERCOM::isDataRegisterEmptySPI()
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{
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//DRE : Data Register Empty
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return sercom->SPI.INTFLAG.bit.DRE;
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}
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//bool SERCOM::isTransmitCompleteSPI()
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//{
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// //TXC : Transmit complete
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// return sercom->SPI.INTFLAG.bit.TXC;
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//}
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//
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//bool SERCOM::isReceiveCompleteSPI()
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//{
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// //RXC : Receive complete
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// return sercom->SPI.INTFLAG.bit.RXC;
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//}
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uint8_t SERCOM::calculateBaudrateSynchronous(uint32_t baudrate)
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{
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return SERCOM_FREQ_REF / (2 * baudrate) - 1;
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}
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/* =========================
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* ===== Sercom WIRE
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* =========================
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*/
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void SERCOM::resetWIRE()
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{
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//I2CM OR I2CS, no matter SWRST is the same bit.
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//Setting the Software bit to 1
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sercom->I2CM.CTRLA.bit.SWRST = 1;
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//Wait both bits Software Reset from CTRLA and SYNCBUSY are equal to 0
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while(sercom->I2CM.CTRLA.bit.SWRST || sercom->I2CM.SYNCBUSY.bit.SWRST);
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}
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void SERCOM::enableWIRE()
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{
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// I2C Master and Slave modes share the ENABLE bit function.
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// Enable the I<>C master mode
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sercom->I2CM.CTRLA.bit.ENABLE = 1 ;
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while ( sercom->I2CM.SYNCBUSY.bit.ENABLE != 0 )
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{
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// Waiting the enable bit from SYNCBUSY is equal to 0;
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}
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// Setting bus idle mode
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sercom->I2CM.STATUS.bit.BUSSTATE = 1 ;
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while ( sercom->I2CM.SYNCBUSY.bit.SYSOP != 0 )
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{
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// Wait the SYSOP bit from SYNCBUSY coming back to 0
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}
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}
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void SERCOM::disableWIRE()
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{
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// I2C Master and Slave modes share the ENABLE bit function.
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// Enable the I<>C master mode
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sercom->I2CM.CTRLA.bit.ENABLE = 0 ;
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while ( sercom->I2CM.SYNCBUSY.bit.ENABLE != 0 )
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{
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// Waiting the enable bit from SYNCBUSY is equal to 0;
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}
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}
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void SERCOM::initSlaveWIRE( uint8_t ucAddress )
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{
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// Initialize the peripheral clock and interruption
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initClockNVIC() ;
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resetWIRE() ;
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// Set slave mode
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sercom->I2CS.CTRLA.bit.MODE = I2C_SLAVE_OPERATION ;
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sercom->I2CS.ADDR.reg = SERCOM_I2CS_ADDR_ADDR( ucAddress & 0x7Ful ) | // 0x7F, select only 7 bits
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SERCOM_I2CS_ADDR_ADDRMASK( 0x00ul ) ; // 0x00, only match exact address
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// Set the interrupt register
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sercom->I2CS.INTENSET.reg = SERCOM_I2CS_INTENSET_PREC | // Stop
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SERCOM_I2CS_INTENSET_AMATCH | // Address Match
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SERCOM_I2CS_INTENSET_DRDY ; // Data Ready
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while ( sercom->I2CM.SYNCBUSY.bit.SYSOP != 0 )
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{
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// Wait the SYSOP bit from SYNCBUSY to come back to 0
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}
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}
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void SERCOM::initMasterWIRE( uint32_t baudrate )
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{
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// Initialize the peripheral clock and interruption
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initClockNVIC() ;
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resetWIRE() ;
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// Set master mode and enable SCL Clock Stretch mode (stretch after ACK bit)
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sercom->I2CM.CTRLA.reg = SERCOM_I2CM_CTRLA_MODE( I2C_MASTER_OPERATION )/* |
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SERCOM_I2CM_CTRLA_SCLSM*/ ;
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// Enable Smart mode and Quick Command
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//sercom->I2CM.CTRLB.reg = SERCOM_I2CM_CTRLB_SMEN /*| SERCOM_I2CM_CTRLB_QCEN*/ ;
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// Enable all interrupts
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// sercom->I2CM.INTENSET.reg = SERCOM_I2CM_INTENSET_MB | SERCOM_I2CM_INTENSET_SB | SERCOM_I2CM_INTENSET_ERROR ;
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// Synchronous arithmetic baudrate
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#if defined(__SAMD51__)
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sercom->I2CM.BAUD.bit.BAUD = SERCOM_FREQ_REF / ( 2 * baudrate) - 1 ;
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#else
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sercom->I2CM.BAUD.bit.BAUD = SystemCoreClock / ( 2 * baudrate) - 1 ;
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#endif
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}
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void SERCOM::prepareNackBitWIRE( void )
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{
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if(isMasterWIRE()) {
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// Send a NACK
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sercom->I2CM.CTRLB.bit.ACKACT = 1;
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} else {
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sercom->I2CS.CTRLB.bit.ACKACT = 1;
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}
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}
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void SERCOM::prepareAckBitWIRE( void )
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{
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if(isMasterWIRE()) {
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// Send an ACK
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sercom->I2CM.CTRLB.bit.ACKACT = 0;
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} else {
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sercom->I2CS.CTRLB.bit.ACKACT = 0;
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}
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}
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void SERCOM::prepareCommandBitsWire(uint8_t cmd)
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{
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if(isMasterWIRE()) {
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sercom->I2CM.CTRLB.bit.CMD = cmd;
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while(sercom->I2CM.SYNCBUSY.bit.SYSOP)
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{
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// Waiting for synchronization
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}
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} else {
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sercom->I2CS.CTRLB.bit.CMD = cmd;
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}
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}
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bool SERCOM::startTransmissionWIRE(uint8_t address, SercomWireReadWriteFlag flag)
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{
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// 7-bits address + 1-bits R/W
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address = (address << 0x1ul) | flag;
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// Wait idle or owner bus mode
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while ( !isBusIdleWIRE() && !isBusOwnerWIRE() );
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// Send start and address
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sercom->I2CM.ADDR.bit.ADDR = address;
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// Address Transmitted
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if ( flag == WIRE_WRITE_FLAG ) // Write mode
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{
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while( !sercom->I2CM.INTFLAG.bit.MB )
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{
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// Wait transmission complete
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}
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}
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else // Read mode
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{
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while( !sercom->I2CM.INTFLAG.bit.SB )
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{
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// If the slave NACKS the address, the MB bit will be set.
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// In that case, send a stop condition and return false.
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if (sercom->I2CM.INTFLAG.bit.MB) {
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sercom->I2CM.CTRLB.bit.CMD = 3; // Stop condition
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return false;
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}
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// Wait transmission complete
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}
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// Clean the 'Slave on Bus' flag, for further usage.
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//sercom->I2CM.INTFLAG.bit.SB = 0x1ul;
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}
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//ACK received (0: ACK, 1: NACK)
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if(sercom->I2CM.STATUS.bit.RXNACK)
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{
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return false;
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}
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else
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{
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return true;
|
||
}
|
||
}
|
||
|
||
bool SERCOM::sendDataMasterWIRE(uint8_t data)
|
||
{
|
||
//Send data
|
||
sercom->I2CM.DATA.bit.DATA = data;
|
||
|
||
//Wait transmission successful
|
||
while(!sercom->I2CM.INTFLAG.bit.MB) {
|
||
|
||
// If a bus error occurs, the MB bit may never be set.
|
||
// Check the bus error bit and bail if it's set.
|
||
if (sercom->I2CM.STATUS.bit.BUSERR) {
|
||
return false;
|
||
}
|
||
}
|
||
|
||
//Problems on line? nack received?
|
||
if(sercom->I2CM.STATUS.bit.RXNACK)
|
||
return false;
|
||
else
|
||
return true;
|
||
}
|
||
|
||
bool SERCOM::sendDataSlaveWIRE(uint8_t data)
|
||
{
|
||
//Send data
|
||
sercom->I2CS.DATA.bit.DATA = data;
|
||
|
||
//Problems on line? nack received?
|
||
if(!sercom->I2CS.INTFLAG.bit.DRDY || sercom->I2CS.STATUS.bit.RXNACK)
|
||
return false;
|
||
else
|
||
return true;
|
||
}
|
||
|
||
bool SERCOM::isMasterWIRE( void )
|
||
{
|
||
return sercom->I2CS.CTRLA.bit.MODE == I2C_MASTER_OPERATION;
|
||
}
|
||
|
||
bool SERCOM::isSlaveWIRE( void )
|
||
{
|
||
return sercom->I2CS.CTRLA.bit.MODE == I2C_SLAVE_OPERATION;
|
||
}
|
||
|
||
bool SERCOM::isBusIdleWIRE( void )
|
||
{
|
||
return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_IDLE_STATE;
|
||
}
|
||
|
||
bool SERCOM::isBusOwnerWIRE( void )
|
||
{
|
||
return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_OWNER_STATE;
|
||
}
|
||
|
||
bool SERCOM::isDataReadyWIRE( void )
|
||
{
|
||
return sercom->I2CS.INTFLAG.bit.DRDY;
|
||
}
|
||
|
||
bool SERCOM::isStopDetectedWIRE( void )
|
||
{
|
||
return sercom->I2CS.INTFLAG.bit.PREC;
|
||
}
|
||
|
||
bool SERCOM::isRestartDetectedWIRE( void )
|
||
{
|
||
return sercom->I2CS.STATUS.bit.SR;
|
||
}
|
||
|
||
bool SERCOM::isAddressMatch( void )
|
||
{
|
||
return sercom->I2CS.INTFLAG.bit.AMATCH;
|
||
}
|
||
|
||
bool SERCOM::isMasterReadOperationWIRE( void )
|
||
{
|
||
return sercom->I2CS.STATUS.bit.DIR;
|
||
}
|
||
|
||
bool SERCOM::isRXNackReceivedWIRE( void )
|
||
{
|
||
return sercom->I2CM.STATUS.bit.RXNACK;
|
||
}
|
||
|
||
int SERCOM::availableWIRE( void )
|
||
{
|
||
if(isMasterWIRE())
|
||
return sercom->I2CM.INTFLAG.bit.SB;
|
||
else
|
||
return sercom->I2CS.INTFLAG.bit.DRDY;
|
||
}
|
||
|
||
uint8_t SERCOM::readDataWIRE( void )
|
||
{
|
||
if(isMasterWIRE())
|
||
{
|
||
while( sercom->I2CM.INTFLAG.bit.SB == 0 )
|
||
{
|
||
// Waiting complete receive
|
||
}
|
||
|
||
return sercom->I2CM.DATA.bit.DATA ;
|
||
}
|
||
else
|
||
{
|
||
return sercom->I2CS.DATA.reg ;
|
||
}
|
||
}
|
||
|
||
|
||
void SERCOM::initClockNVIC( void )
|
||
{
|
||
IRQn_Type IdNvic=PendSV_IRQn ; // Dummy init to intercept potential error later
|
||
|
||
#if defined(__SAMD51__)
|
||
uint32_t clk_core;
|
||
uint32_t clk_slow;
|
||
|
||
if(sercom == SERCOM0)
|
||
{
|
||
clk_core = SERCOM0_GCLK_ID_CORE;
|
||
clk_slow = SERCOM0_GCLK_ID_SLOW;
|
||
IdNvic = SERCOM0_0_IRQn;
|
||
}
|
||
else if(sercom == SERCOM1)
|
||
{
|
||
clk_core = SERCOM1_GCLK_ID_CORE;
|
||
clk_slow = SERCOM1_GCLK_ID_SLOW;
|
||
IdNvic = SERCOM1_0_IRQn;
|
||
}
|
||
else if(sercom == SERCOM2)
|
||
{
|
||
clk_core = SERCOM2_GCLK_ID_CORE;
|
||
clk_slow = SERCOM2_GCLK_ID_SLOW;
|
||
IdNvic = SERCOM2_2_IRQn;
|
||
}
|
||
else if(sercom == SERCOM3)
|
||
{
|
||
clk_core = SERCOM3_GCLK_ID_CORE;
|
||
clk_slow = SERCOM3_GCLK_ID_SLOW;
|
||
IdNvic = SERCOM3_0_IRQn;
|
||
}
|
||
else if(sercom == SERCOM4)
|
||
{
|
||
clk_core = SERCOM4_GCLK_ID_CORE;
|
||
clk_slow = SERCOM4_GCLK_ID_SLOW;
|
||
IdNvic = SERCOM4_0_IRQn;
|
||
}
|
||
else if(sercom == SERCOM5)
|
||
{
|
||
clk_core = SERCOM5_GCLK_ID_CORE;
|
||
clk_slow = SERCOM5_GCLK_ID_SLOW;
|
||
IdNvic = SERCOM5_0_IRQn;
|
||
}
|
||
|
||
if ( IdNvic == PendSV_IRQn )
|
||
{
|
||
// We got a problem here
|
||
return ;
|
||
}
|
||
#else
|
||
|
||
uint8_t clockId = 0;
|
||
if(sercom == SERCOM0)
|
||
{
|
||
clockId = GCM_SERCOM0_CORE;
|
||
IdNvic = SERCOM0_IRQn;
|
||
}
|
||
else if(sercom == SERCOM1)
|
||
{
|
||
clockId = GCM_SERCOM1_CORE;
|
||
IdNvic = SERCOM1_IRQn;
|
||
}
|
||
else if(sercom == SERCOM2)
|
||
{
|
||
clockId = GCM_SERCOM2_CORE;
|
||
IdNvic = SERCOM2_IRQn;
|
||
}
|
||
else if(sercom == SERCOM3)
|
||
{
|
||
clockId = GCM_SERCOM3_CORE;
|
||
IdNvic = SERCOM3_IRQn;
|
||
}
|
||
else if(sercom == SERCOM4)
|
||
{
|
||
clockId = GCM_SERCOM4_CORE;
|
||
IdNvic = SERCOM4_IRQn;
|
||
}
|
||
else if(sercom == SERCOM5)
|
||
{
|
||
clockId = GCM_SERCOM5_CORE;
|
||
IdNvic = SERCOM5_IRQn;
|
||
}
|
||
|
||
if ( IdNvic == PendSV_IRQn )
|
||
{
|
||
// We got a problem here
|
||
return ;
|
||
}
|
||
#endif
|
||
|
||
// Setting NVIC
|
||
NVIC_ClearPendingIRQ(IdNvic);
|
||
NVIC_SetPriority (IdNvic, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
|
||
NVIC_EnableIRQ(IdNvic);
|
||
|
||
#if defined(__SAMD51__)
|
||
GCLK->PCHCTRL[clk_core].reg = GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos); //TODO: use 48mhz for now although this should work up to 100mhz
|
||
GCLK->PCHCTRL[clk_slow].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
|
||
|
||
#else
|
||
//Setting clock
|
||
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( clockId ) | // Generic Clock 0 (SERCOMx)
|
||
GCLK_CLKCTRL_GEN_GCLK0 | // Generic Clock Generator 0 is source
|
||
GCLK_CLKCTRL_CLKEN ;
|
||
|
||
while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
|
||
{
|
||
/* Wait for synchronization */
|
||
}
|
||
#endif
|
||
}
|