diff --git a/MCUME_pico2/CMakeLists.txt b/MCUME_pico2/CMakeLists.txt
index d00945f..2a7a516 100644
--- a/MCUME_pico2/CMakeLists.txt
+++ b/MCUME_pico2/CMakeLists.txt
@@ -1,5 +1,8 @@
 cmake_minimum_required(VERSION 3.12)
 
+set(PICO_PLATFORM rp2350)
+set(PICO_BOARD pico2)
+
 # Pull in PICO SDK (must be before project)
 include(pico_sdk_import.cmake)
 
@@ -8,7 +11,7 @@ include(pico_sdk_import.cmake)
 
 #set(TARGET testkeymax)
 #set(TARGET pico20)
-#set(TARGET pico64)
+set(TARGET pico64)
 #set(TARGET pico81)
 #set(TARGET pico800)
 #set(TARGET picospeccy)
@@ -21,7 +24,7 @@ include(pico_sdk_import.cmake)
 #set(TARGET picopce)
 #set(TARGET picosms)
 #set(TARGET picogen)
-set(TARGET picocastaway)
+#set(TARGET picocastaway)
 
 #set(TARGET pico5200)
 
diff --git a/MCUME_pico2/config/platform_config.h b/MCUME_pico2/config/platform_config.h
index c07757c..d4aa284 100644
--- a/MCUME_pico2/config/platform_config.h
+++ b/MCUME_pico2/config/platform_config.h
@@ -7,8 +7,8 @@
 #define INVX           1
 #define HAS_SND        1
 #define USE_VGA        1
-#define HAS_USBHOST    1
-//#define HAS_USBPIO     1
+//#define HAS_USBHOST    1
+#define HAS_USBPIO     1
 
 //#define ILI9341        1
 //#define ST7789         1
diff --git a/MCUME_pico2/display/hdmi_framebuffer.cpp b/MCUME_pico2/display/hdmi_framebuffer.cpp
index 7df75c8..6e6d824 100755
--- a/MCUME_pico2/display/hdmi_framebuffer.cpp
+++ b/MCUME_pico2/display/hdmi_framebuffer.cpp
@@ -337,23 +337,34 @@ void hdmi_framebuffer(hdmi_framebuffer_obj_t *self, uint16_t width, uint16_t hei
     // 250 Mbps, which is very close to the bit clock for 480p 60Hz (252 MHz).
     // If we want the exact rate then we'll have to reconfigure PLLs.
 
+    // HSTX outputs 0 through 7 appear on GPIO 12 through 19.
+#define PIN_CKN (15u)
+#define PIN_CKP (14u)
+#define PIN_D0N (19u)
+#define PIN_D0P (18u)
+#define PIN_D1N (17u)
+#define PIN_D1P (16u)
+#define PIN_D2N (13u)
+#define PIN_D2P (12u)
+
+    constexpr int HSTX_FIRST_PIN = 12;
+    struct { uint8_t clk_p, rgb_p[3]; } pinout =   { PIN_CKP, PIN_D0P, PIN_D1P, PIN_D2P };
 
     // Assign clock pair to two neighbouring pins:
-    hstx_ctrl_hw->bit[2] = HSTX_CTRL_BIT0_CLK_BITS;
-    hstx_ctrl_hw->bit[3] = HSTX_CTRL_BIT0_CLK_BITS | HSTX_CTRL_BIT0_INV_BITS;
+    hstx_ctrl_hw->bit[(pinout.clk_p    ) - HSTX_FIRST_PIN] = HSTX_CTRL_BIT0_CLK_BITS;
+    hstx_ctrl_hw->bit[(pinout.clk_p ^ 1) - HSTX_FIRST_PIN] = HSTX_CTRL_BIT0_CLK_BITS | HSTX_CTRL_BIT0_INV_BITS;
     for (uint lane = 0; lane < 3; ++lane) {
-      // For each TMDS lane, assign it to the correct GPIO pair based on the
-      // desired pinout:
-      static const int lane_to_output_bit[3] = {0, 6, 4};
-      int bit = lane_to_output_bit[lane];
-      // Output even bits during first half of each HSTX cycle, and odd bits
-      // during second half. The shifter advances by two bits each cycle.
-      uint32_t lane_data_sel_bits =
-          (lane * 10    ) << HSTX_CTRL_BIT0_SEL_P_LSB |
-          (lane * 10 + 1) << HSTX_CTRL_BIT0_SEL_N_LSB;
-      // The two halves of each pair get identical data, but one pin is inverted.
-      hstx_ctrl_hw->bit[bit    ] = lane_data_sel_bits;
-      hstx_ctrl_hw->bit[bit + 1] = lane_data_sel_bits | HSTX_CTRL_BIT0_INV_BITS;
+        // For each TMDS lane, assign it to the correct GPIO pair based on the
+        // desired pinout:
+        int bit = pinout.rgb_p[lane];
+        // Output even bits during first half of each HSTX cycle, and odd bits
+        // during second half. The shifter advances by two bits each cycle.
+        uint32_t lane_data_sel_bits =
+            (lane * 10    ) << HSTX_CTRL_BIT0_SEL_P_LSB |
+            (lane * 10 + 1) << HSTX_CTRL_BIT0_SEL_N_LSB;
+        // The two halves of each pair get identical data, but one pin is inverted.
+        hstx_ctrl_hw->bit[(bit    ) - HSTX_FIRST_PIN] = lane_data_sel_bits;
+        hstx_ctrl_hw->bit[(bit ^ 1) - HSTX_FIRST_PIN] = lane_data_sel_bits | HSTX_CTRL_BIT0_INV_BITS;
     }
 
     for (int i = 12; i <= 19; ++i) {