fix(esp32p4): Fix compilation errors (#10371)

* fix(esp32p4): Add missing touchpad definitions

* fix(esp32p4): Add missing target in SPI example

* fix(esp32p4): Start touch driver fix

* fix(esp32p4): Skip touch examples while it is not implemented

* fix(esp32p4): Add missing analog pin definitions

* refactor(formatting): Fix formatting that was broken in P4 PR

* fix(openthread): Add missing targets to skip

* fix(esp32p4): Skip ethernet sketches

* fix(esp32p4): Disable periman test while touch is not implemented

* fix(esp32p4): Disable touch test while touch is not implemented

* fix(esp32p4): Fix UART test

* fix(esp32p4): Skip Wi-Fi test

* fix(esp32): Skip unsupported example

* fix(esp32p4): Fix skip files

* ci(pre-commit): Apply automatic fixes

---------

Co-authored-by: pre-commit-ci-lite[bot] <117423508+pre-commit-ci-lite[bot]@users.noreply.github.com>
This commit is contained in:
Lucas Saavedra Vaz 2024-09-25 17:38:21 -03:00 committed by GitHub
parent 9398d52ddc
commit 4bb287eaf6
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
31 changed files with 497 additions and 470 deletions

View file

@ -361,155 +361,153 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t
if (!i2c->intr_handle) { if (!i2c->intr_handle) {
uint32_t flags = ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED; uint32_t flags = ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED;
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
if (i2c->num == 0) { if (i2c->num == 0) {
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
ret = esp_intr_alloc(ETS_I2C_EXT0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle); ret = esp_intr_alloc(ETS_I2C_EXT0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#else
ret = esp_intr_alloc(ETS_I2C0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#endif
#if SOC_HP_I2C_NUM > 1 #if SOC_HP_I2C_NUM > 1
} else { } else {
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
ret = esp_intr_alloc(ETS_I2C_EXT1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle); ret = esp_intr_alloc(ETS_I2C_EXT1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#else
ret = esp_intr_alloc(ETS_I2C1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#endif #endif
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)
#ifdef CONFIG_IDF_TARGET_ESP32P4
if (i2c->num == 0) {
ret = esp_intr_alloc(ETS_I2C0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#if SOC_I2C_NUM > 1
} else {
ret = esp_intr_alloc(ETS_I2C1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#endif #endif
#endif // #ifdef CONFIG_IDF_TARGET_ESP32P4
}
if (ret != ESP_OK) {
log_e("install interrupt handler Failed=%d", ret);
goto fail;
}
} }
i2c_ll_txfifo_rst(i2c->dev); if (ret != ESP_OK) {
i2c_ll_rxfifo_rst(i2c->dev); log_e("install interrupt handler Failed=%d", ret);
i2c_ll_slave_enable_rx_it(i2c->dev); goto fail;
i2c_ll_set_stretch(i2c->dev, 0x3FF);
i2c_ll_update(i2c->dev);
if (!perimanSetPinBus(sda, ESP32_BUS_TYPE_I2C_SLAVE_SDA, (void *)(i2c->num + 1), i2c->num, -1)
|| !perimanSetPinBus(scl, ESP32_BUS_TYPE_I2C_SLAVE_SCL, (void *)(i2c->num + 1), i2c->num, -1)) {
i2cSlaveDetachBus((void *)(i2c->num + 1));
ret = ESP_FAIL;
} }
I2C_SLAVE_MUTEX_UNLOCK(); }
return ret;
i2c_ll_txfifo_rst(i2c->dev);
i2c_ll_rxfifo_rst(i2c->dev);
i2c_ll_slave_enable_rx_it(i2c->dev);
i2c_ll_set_stretch(i2c->dev, 0x3FF);
i2c_ll_update(i2c->dev);
if (!perimanSetPinBus(sda, ESP32_BUS_TYPE_I2C_SLAVE_SDA, (void *)(i2c->num + 1), i2c->num, -1)
|| !perimanSetPinBus(scl, ESP32_BUS_TYPE_I2C_SLAVE_SCL, (void *)(i2c->num + 1), i2c->num, -1)) {
i2cSlaveDetachBus((void *)(i2c->num + 1));
ret = ESP_FAIL;
}
I2C_SLAVE_MUTEX_UNLOCK();
return ret;
fail: fail:
i2c_slave_free_resources(i2c); i2c_slave_free_resources(i2c);
I2C_SLAVE_MUTEX_UNLOCK(); I2C_SLAVE_MUTEX_UNLOCK();
return ret; return ret;
}
esp_err_t i2cSlaveDeinit(uint8_t num) {
if (num >= SOC_HP_I2C_NUM) {
log_e("Invalid port num: %u", num);
return ESP_ERR_INVALID_ARG;
} }
esp_err_t i2cSlaveDeinit(uint8_t num) { i2c_slave_struct_t *i2c = &_i2c_bus_array[num];
if (num >= SOC_HP_I2C_NUM) {
log_e("Invalid port num: %u", num);
return ESP_ERR_INVALID_ARG;
}
i2c_slave_struct_t *i2c = &_i2c_bus_array[num];
#if !CONFIG_DISABLE_HAL_LOCKS #if !CONFIG_DISABLE_HAL_LOCKS
if (!i2c->lock) { if (!i2c->lock) {
log_e("Lock is not initialized! Did you call i2c_slave_init()?"); log_e("Lock is not initialized! Did you call i2c_slave_init()?");
return ESP_ERR_NO_MEM; return ESP_ERR_NO_MEM;
}
#endif
I2C_SLAVE_MUTEX_LOCK();
int scl = i2c->scl;
int sda = i2c->sda;
i2c_slave_free_resources(i2c);
perimanClearPinBus(scl);
perimanClearPinBus(sda);
I2C_SLAVE_MUTEX_UNLOCK();
return ESP_OK;
} }
size_t i2cSlaveWrite(uint8_t num, const uint8_t *buf, uint32_t len, uint32_t timeout_ms) {
if (num >= SOC_HP_I2C_NUM) {
log_e("Invalid port num: %u", num);
return 0;
}
uint32_t to_queue = 0, to_fifo = 0;
i2c_slave_struct_t *i2c = &_i2c_bus_array[num];
#if !CONFIG_DISABLE_HAL_LOCKS
if (!i2c->lock) {
log_e("Lock is not initialized! Did you call i2c_slave_init()?");
return ESP_ERR_NO_MEM;
}
#endif #endif
if (!i2c->tx_queue) { I2C_SLAVE_MUTEX_LOCK();
return 0; int scl = i2c->scl;
} int sda = i2c->sda;
I2C_SLAVE_MUTEX_LOCK(); i2c_slave_free_resources(i2c);
perimanClearPinBus(scl);
perimanClearPinBus(sda);
I2C_SLAVE_MUTEX_UNLOCK();
return ESP_OK;
}
size_t i2cSlaveWrite(uint8_t num, const uint8_t *buf, uint32_t len, uint32_t timeout_ms) {
if (num >= SOC_HP_I2C_NUM) {
log_e("Invalid port num: %u", num);
return 0;
}
uint32_t to_queue = 0, to_fifo = 0;
i2c_slave_struct_t *i2c = &_i2c_bus_array[num];
#if !CONFIG_DISABLE_HAL_LOCKS
if (!i2c->lock) {
log_e("Lock is not initialized! Did you call i2c_slave_init()?");
return ESP_ERR_NO_MEM;
}
#endif
if (!i2c->tx_queue) {
return 0;
}
I2C_SLAVE_MUTEX_LOCK();
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
i2c_ll_slave_disable_tx_it(i2c->dev); i2c_ll_slave_disable_tx_it(i2c->dev);
uint32_t txfifo_len = 0; uint32_t txfifo_len = 0;
i2c_ll_get_txfifo_len(i2c->dev, &txfifo_len); i2c_ll_get_txfifo_len(i2c->dev, &txfifo_len);
if (txfifo_len < SOC_I2C_FIFO_LEN) { if (txfifo_len < SOC_I2C_FIFO_LEN) {
i2c_ll_txfifo_rst(i2c->dev); i2c_ll_txfifo_rst(i2c->dev);
} }
#endif #endif
i2c_ll_get_txfifo_len(i2c->dev, &to_fifo); i2c_ll_get_txfifo_len(i2c->dev, &to_fifo);
if (to_fifo) { if (to_fifo) {
if (len < to_fifo) { if (len < to_fifo) {
to_fifo = len; to_fifo = len;
}
i2c_ll_write_txfifo(i2c->dev, (uint8_t *)buf, to_fifo);
buf += to_fifo;
len -= to_fifo;
//reset tx_queue
xQueueReset(i2c->tx_queue);
//write the rest of the bytes to the queue
if (len) {
to_queue = uxQueueSpacesAvailable(i2c->tx_queue);
if (len < to_queue) {
to_queue = len;
} }
i2c_ll_write_txfifo(i2c->dev, (uint8_t *)buf, to_fifo); for (size_t i = 0; i < to_queue; i++) {
buf += to_fifo; if (xQueueSend(i2c->tx_queue, &buf[i], timeout_ms / portTICK_PERIOD_MS) != pdTRUE) {
len -= to_fifo; xQueueReset(i2c->tx_queue);
//reset tx_queue to_queue = 0;
xQueueReset(i2c->tx_queue); break;
//write the rest of the bytes to the queue
if (len) {
to_queue = uxQueueSpacesAvailable(i2c->tx_queue);
if (len < to_queue) {
to_queue = len;
}
for (size_t i = 0; i < to_queue; i++) {
if (xQueueSend(i2c->tx_queue, &buf[i], timeout_ms / portTICK_PERIOD_MS) != pdTRUE) {
xQueueReset(i2c->tx_queue);
to_queue = 0;
break;
}
}
//no need to enable TX_EMPTY if tx_queue is empty
if (to_queue) {
i2c_ll_slave_enable_tx_it(i2c->dev);
} }
} }
//no need to enable TX_EMPTY if tx_queue is empty
if (to_queue) {
i2c_ll_slave_enable_tx_it(i2c->dev);
}
} }
I2C_SLAVE_MUTEX_UNLOCK(); }
return to_queue + to_fifo; I2C_SLAVE_MUTEX_UNLOCK();
return to_queue + to_fifo;
}
//=====================================================================================================================
//-------------------------------------- Private Functions ------------------------------------------------------------
//=====================================================================================================================
static void i2c_slave_free_resources(i2c_slave_struct_t *i2c) {
i2c_slave_detach_gpio(i2c);
i2c_ll_set_slave_addr(i2c->dev, 0, false);
i2c_ll_disable_intr_mask(i2c->dev, I2C_LL_INTR_MASK);
i2c_ll_clear_intr_mask(i2c->dev, I2C_LL_INTR_MASK);
if (i2c->intr_handle) {
esp_intr_free(i2c->intr_handle);
i2c->intr_handle = NULL;
} }
//===================================================================================================================== if (i2c->task_handle) {
//-------------------------------------- Private Functions ------------------------------------------------------------ vTaskDelete(i2c->task_handle);
//===================================================================================================================== i2c->task_handle = NULL;
}
static void i2c_slave_free_resources(i2c_slave_struct_t * i2c) {
i2c_slave_detach_gpio(i2c);
i2c_ll_set_slave_addr(i2c->dev, 0, false);
i2c_ll_disable_intr_mask(i2c->dev, I2C_LL_INTR_MASK);
i2c_ll_clear_intr_mask(i2c->dev, I2C_LL_INTR_MASK);
if (i2c->intr_handle) {
esp_intr_free(i2c->intr_handle);
i2c->intr_handle = NULL;
}
if (i2c->task_handle) {
vTaskDelete(i2c->task_handle);
i2c->task_handle = NULL;
}
#if I2C_SLAVE_USE_RX_QUEUE #if I2C_SLAVE_USE_RX_QUEUE
if (i2c->rx_queue) { if (i2c->rx_queue) {
vQueueDelete(i2c->rx_queue); vQueueDelete(i2c->rx_queue);
i2c->rx_queue = NULL; i2c->rx_queue = NULL;
} }
#else #else
if (i2c->rx_ring_buf) { if (i2c->rx_ring_buf) {
vRingbufferDelete(i2c->rx_ring_buf); vRingbufferDelete(i2c->rx_ring_buf);
@ -517,202 +515,202 @@ fail:
} }
#endif #endif
if (i2c->tx_queue) { if (i2c->tx_queue) {
vQueueDelete(i2c->tx_queue); vQueueDelete(i2c->tx_queue);
i2c->tx_queue = NULL; i2c->tx_queue = NULL;
}
if (i2c->event_queue) {
vQueueDelete(i2c->event_queue);
i2c->event_queue = NULL;
}
i2c->rx_data_count = 0;
} }
static bool i2c_slave_set_frequency(i2c_slave_struct_t * i2c, uint32_t clk_speed) { if (i2c->event_queue) {
if (i2c == NULL) { vQueueDelete(i2c->event_queue);
log_e("no control buffer"); i2c->event_queue = NULL;
return false; }
}
if (clk_speed > 1100000UL) {
clk_speed = 1100000UL;
}
// Adjust Fifo thresholds based on frequency i2c->rx_data_count = 0;
uint32_t a = (clk_speed / 50000L) + 2; }
log_d("Fifo thresholds: rx_fifo_full = %d, tx_fifo_empty = %d", SOC_I2C_FIFO_LEN - a, a);
i2c_hal_clk_config_t clk_cal; static bool i2c_slave_set_frequency(i2c_slave_struct_t *i2c, uint32_t clk_speed) {
if (i2c == NULL) {
log_e("no control buffer");
return false;
}
if (clk_speed > 1100000UL) {
clk_speed = 1100000UL;
}
// Adjust Fifo thresholds based on frequency
uint32_t a = (clk_speed / 50000L) + 2;
log_d("Fifo thresholds: rx_fifo_full = %d, tx_fifo_empty = %d", SOC_I2C_FIFO_LEN - a, a);
i2c_hal_clk_config_t clk_cal;
#if SOC_I2C_SUPPORT_APB #if SOC_I2C_SUPPORT_APB
i2c_ll_master_cal_bus_clk(APB_CLK_FREQ, clk_speed, &clk_cal); i2c_ll_master_cal_bus_clk(APB_CLK_FREQ, clk_speed, &clk_cal);
I2C_CLOCK_SRC_ATOMIC() { I2C_CLOCK_SRC_ATOMIC() {
i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_APB); /*!< I2C source clock from APB, 80M*/ i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_APB); /*!< I2C source clock from APB, 80M*/
} }
#elif SOC_I2C_SUPPORT_XTAL #elif SOC_I2C_SUPPORT_XTAL
i2c_ll_master_cal_bus_clk(XTAL_CLK_FREQ, clk_speed, &clk_cal); i2c_ll_master_cal_bus_clk(XTAL_CLK_FREQ, clk_speed, &clk_cal);
I2C_CLOCK_SRC_ATOMIC() { I2C_CLOCK_SRC_ATOMIC() {
i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_XTAL); /*!< I2C source clock from XTAL, 40M */ i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_XTAL); /*!< I2C source clock from XTAL, 40M */
} }
#endif #endif
i2c_ll_set_txfifo_empty_thr(i2c->dev, a); i2c_ll_set_txfifo_empty_thr(i2c->dev, a);
i2c_ll_set_rxfifo_full_thr(i2c->dev, SOC_I2C_FIFO_LEN - a); i2c_ll_set_rxfifo_full_thr(i2c->dev, SOC_I2C_FIFO_LEN - a);
i2c_ll_master_set_bus_timing(i2c->dev, &clk_cal); i2c_ll_master_set_bus_timing(i2c->dev, &clk_cal);
i2c_ll_master_set_filter(i2c->dev, 3); i2c_ll_master_set_filter(i2c->dev, 3);
return true; return true;
} }
static void i2c_slave_delay_us(uint64_t us) { static void i2c_slave_delay_us(uint64_t us) {
uint64_t m = esp_timer_get_time(); uint64_t m = esp_timer_get_time();
if (us) { if (us) {
uint64_t e = (m + us); uint64_t e = (m + us);
if (m > e) { //overflow if (m > e) { //overflow
while ((uint64_t)esp_timer_get_time() > e); while ((uint64_t)esp_timer_get_time() > e);
}
while ((uint64_t)esp_timer_get_time() < e);
} }
while ((uint64_t)esp_timer_get_time() < e);
} }
}
static void i2c_slave_gpio_mode(int8_t pin, gpio_mode_t mode) { static void i2c_slave_gpio_mode(int8_t pin, gpio_mode_t mode) {
gpio_config_t conf = { gpio_config_t conf = {
.pin_bit_mask = 1LL << pin, .mode = mode, .pull_up_en = GPIO_PULLUP_ENABLE, .pull_down_en = GPIO_PULLDOWN_DISABLE, .intr_type = GPIO_INTR_DISABLE .pin_bit_mask = 1LL << pin, .mode = mode, .pull_up_en = GPIO_PULLUP_ENABLE, .pull_down_en = GPIO_PULLDOWN_DISABLE, .intr_type = GPIO_INTR_DISABLE
}; };
gpio_config(&conf); gpio_config(&conf);
}
static bool i2c_slave_check_line_state(int8_t sda, int8_t scl) {
if (sda < 0 || scl < 0) {
return false; //return false since there is nothing to do
} }
// if the bus is not 'clear' try the cycling SCL until SDA goes High or 9 cycles
gpio_set_level(sda, 1);
gpio_set_level(scl, 1);
i2c_slave_gpio_mode(sda, GPIO_MODE_INPUT | GPIO_MODE_DEF_OD);
i2c_slave_gpio_mode(scl, GPIO_MODE_INPUT | GPIO_MODE_DEF_OD);
gpio_set_level(scl, 1);
static bool i2c_slave_check_line_state(int8_t sda, int8_t scl) { if (!gpio_get_level(sda) || !gpio_get_level(scl)) { // bus in busy state
if (sda < 0 || scl < 0) { log_w("invalid state sda(%d)=%d, scl(%d)=%d", sda, gpio_get_level(sda), scl, gpio_get_level(scl));
return false; //return false since there is nothing to do for (uint8_t a = 0; a < 9; a++) {
} i2c_slave_delay_us(5);
// if the bus is not 'clear' try the cycling SCL until SDA goes High or 9 cycles if (gpio_get_level(sda) && gpio_get_level(scl)) { // bus recovered
gpio_set_level(sda, 1); log_w("Recovered after %d Cycles", a);
gpio_set_level(scl, 1); gpio_set_level(sda, 0); // start
i2c_slave_gpio_mode(sda, GPIO_MODE_INPUT | GPIO_MODE_DEF_OD);
i2c_slave_gpio_mode(scl, GPIO_MODE_INPUT | GPIO_MODE_DEF_OD);
gpio_set_level(scl, 1);
if (!gpio_get_level(sda) || !gpio_get_level(scl)) { // bus in busy state
log_w("invalid state sda(%d)=%d, scl(%d)=%d", sda, gpio_get_level(sda), scl, gpio_get_level(scl));
for (uint8_t a = 0; a < 9; a++) {
i2c_slave_delay_us(5); i2c_slave_delay_us(5);
if (gpio_get_level(sda) && gpio_get_level(scl)) { // bus recovered for (uint8_t a = 0; a < 9; a++) {
log_w("Recovered after %d Cycles", a);
gpio_set_level(sda, 0); // start
i2c_slave_delay_us(5);
for (uint8_t a = 0; a < 9; a++) {
gpio_set_level(scl, 1);
i2c_slave_delay_us(5);
gpio_set_level(scl, 0);
i2c_slave_delay_us(5);
}
gpio_set_level(scl, 1); gpio_set_level(scl, 1);
i2c_slave_delay_us(5); i2c_slave_delay_us(5);
gpio_set_level(sda, 1); // stop gpio_set_level(scl, 0);
break; i2c_slave_delay_us(5);
} }
gpio_set_level(scl, 0);
i2c_slave_delay_us(5);
gpio_set_level(scl, 1); gpio_set_level(scl, 1);
} i2c_slave_delay_us(5);
} gpio_set_level(sda, 1); // stop
if (!gpio_get_level(sda) || !gpio_get_level(scl)) { // bus in busy state
log_e("Bus Invalid State, Can't init sda=%d, scl=%d", gpio_get_level(sda), gpio_get_level(scl));
return false; // bus is busy
}
return true;
}
static bool i2c_slave_attach_gpio(i2c_slave_struct_t * i2c, int8_t sda, int8_t scl) {
if (i2c == NULL) {
log_e("no control block");
return false;
}
if ((sda < 0) || (scl < 0)) {
log_e("bad pins sda=%d, scl=%d", sda, scl);
return false;
}
i2c->scl = scl;
gpio_set_level(scl, 1);
i2c_slave_gpio_mode(scl, GPIO_MODE_INPUT_OUTPUT_OD);
gpio_matrix_out(scl, I2C_SCL_IDX(i2c->num), false, false);
gpio_matrix_in(scl, I2C_SCL_IDX(i2c->num), false);
i2c->sda = sda;
gpio_set_level(sda, 1);
i2c_slave_gpio_mode(sda, GPIO_MODE_INPUT_OUTPUT_OD);
gpio_matrix_out(sda, I2C_SDA_IDX(i2c->num), false, false);
gpio_matrix_in(sda, I2C_SDA_IDX(i2c->num), false);
return true;
}
static bool i2c_slave_detach_gpio(i2c_slave_struct_t * i2c) {
if (i2c == NULL) {
log_e("no control Block");
return false;
}
if (i2c->scl >= 0) {
gpio_matrix_out(i2c->scl, 0x100, false, false);
gpio_matrix_in(0x30, I2C_SCL_IDX(i2c->num), false);
i2c_slave_gpio_mode(i2c->scl, GPIO_MODE_INPUT);
i2c->scl = -1; // un attached
}
if (i2c->sda >= 0) {
gpio_matrix_out(i2c->sda, 0x100, false, false);
gpio_matrix_in(0x30, I2C_SDA_IDX(i2c->num), false);
i2c_slave_gpio_mode(i2c->sda, GPIO_MODE_INPUT);
i2c->sda = -1; // un attached
}
return true;
}
static bool i2c_slave_send_event(i2c_slave_struct_t * i2c, i2c_slave_queue_event_t * event) {
bool pxHigherPriorityTaskWoken = false;
if (i2c->event_queue) {
if (xQueueSendFromISR(i2c->event_queue, event, (BaseType_t *const)&pxHigherPriorityTaskWoken) != pdTRUE) {
//log_e("event_queue_full");
}
}
return pxHigherPriorityTaskWoken;
}
static bool i2c_slave_handle_tx_fifo_empty(i2c_slave_struct_t * i2c) {
bool pxHigherPriorityTaskWoken = false;
uint32_t d = 0, moveCnt = 0;
i2c_ll_get_txfifo_len(i2c->dev, &moveCnt);
while (moveCnt > 0) { // read tx queue until Fifo is full or queue is empty
if (xQueueReceiveFromISR(i2c->tx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) == pdTRUE) {
i2c_ll_write_txfifo(i2c->dev, (uint8_t *)&d, 1);
moveCnt--;
} else {
i2c_ll_slave_disable_tx_it(i2c->dev);
break; break;
} }
gpio_set_level(scl, 0);
i2c_slave_delay_us(5);
gpio_set_level(scl, 1);
} }
return pxHigherPriorityTaskWoken;
} }
static bool i2c_slave_handle_rx_fifo_full(i2c_slave_struct_t * i2c, uint32_t len) { if (!gpio_get_level(sda) || !gpio_get_level(scl)) { // bus in busy state
log_e("Bus Invalid State, Can't init sda=%d, scl=%d", gpio_get_level(sda), gpio_get_level(scl));
return false; // bus is busy
}
return true;
}
static bool i2c_slave_attach_gpio(i2c_slave_struct_t *i2c, int8_t sda, int8_t scl) {
if (i2c == NULL) {
log_e("no control block");
return false;
}
if ((sda < 0) || (scl < 0)) {
log_e("bad pins sda=%d, scl=%d", sda, scl);
return false;
}
i2c->scl = scl;
gpio_set_level(scl, 1);
i2c_slave_gpio_mode(scl, GPIO_MODE_INPUT_OUTPUT_OD);
gpio_matrix_out(scl, I2C_SCL_IDX(i2c->num), false, false);
gpio_matrix_in(scl, I2C_SCL_IDX(i2c->num), false);
i2c->sda = sda;
gpio_set_level(sda, 1);
i2c_slave_gpio_mode(sda, GPIO_MODE_INPUT_OUTPUT_OD);
gpio_matrix_out(sda, I2C_SDA_IDX(i2c->num), false, false);
gpio_matrix_in(sda, I2C_SDA_IDX(i2c->num), false);
return true;
}
static bool i2c_slave_detach_gpio(i2c_slave_struct_t *i2c) {
if (i2c == NULL) {
log_e("no control Block");
return false;
}
if (i2c->scl >= 0) {
gpio_matrix_out(i2c->scl, 0x100, false, false);
gpio_matrix_in(0x30, I2C_SCL_IDX(i2c->num), false);
i2c_slave_gpio_mode(i2c->scl, GPIO_MODE_INPUT);
i2c->scl = -1; // un attached
}
if (i2c->sda >= 0) {
gpio_matrix_out(i2c->sda, 0x100, false, false);
gpio_matrix_in(0x30, I2C_SDA_IDX(i2c->num), false);
i2c_slave_gpio_mode(i2c->sda, GPIO_MODE_INPUT);
i2c->sda = -1; // un attached
}
return true;
}
static bool i2c_slave_send_event(i2c_slave_struct_t *i2c, i2c_slave_queue_event_t *event) {
bool pxHigherPriorityTaskWoken = false;
if (i2c->event_queue) {
if (xQueueSendFromISR(i2c->event_queue, event, (BaseType_t *const)&pxHigherPriorityTaskWoken) != pdTRUE) {
//log_e("event_queue_full");
}
}
return pxHigherPriorityTaskWoken;
}
static bool i2c_slave_handle_tx_fifo_empty(i2c_slave_struct_t *i2c) {
bool pxHigherPriorityTaskWoken = false;
uint32_t d = 0, moveCnt = 0;
i2c_ll_get_txfifo_len(i2c->dev, &moveCnt);
while (moveCnt > 0) { // read tx queue until Fifo is full or queue is empty
if (xQueueReceiveFromISR(i2c->tx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) == pdTRUE) {
i2c_ll_write_txfifo(i2c->dev, (uint8_t *)&d, 1);
moveCnt--;
} else {
i2c_ll_slave_disable_tx_it(i2c->dev);
break;
}
}
return pxHigherPriorityTaskWoken;
}
static bool i2c_slave_handle_rx_fifo_full(i2c_slave_struct_t *i2c, uint32_t len) {
#if I2C_SLAVE_USE_RX_QUEUE #if I2C_SLAVE_USE_RX_QUEUE
uint32_t d = 0; uint32_t d = 0;
#else #else
uint8_t data[SOC_I2C_FIFO_LEN]; uint8_t data[SOC_I2C_FIFO_LEN];
#endif #endif
bool pxHigherPriorityTaskWoken = false; bool pxHigherPriorityTaskWoken = false;
#if I2C_SLAVE_USE_RX_QUEUE #if I2C_SLAVE_USE_RX_QUEUE
while (len > 0) { while (len > 0) {
i2c_ll_read_rxfifo(i2c->dev, (uint8_t *)&d, 1); i2c_ll_read_rxfifo(i2c->dev, (uint8_t *)&d, 1);
if (xQueueSendFromISR(i2c->rx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) != pdTRUE) { if (xQueueSendFromISR(i2c->rx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) != pdTRUE) {
log_e("rx_queue_full"); log_e("rx_queue_full");
} else { } else {
i2c->rx_data_count++; i2c->rx_data_count++;
} }
if (--len == 0) { if (--len == 0) {
len = i2c_ll_get_rxfifo_cnt(i2c->dev); len = i2c_ll_get_rxfifo_cnt(i2c->dev);
} }
#else #else
if (len) { if (len) {
i2c_ll_read_rxfifo(i2c->dev, data, len); i2c_ll_read_rxfifo(i2c->dev, data, len);
@ -722,109 +720,109 @@ fail:
i2c->rx_data_count += len; i2c->rx_data_count += len;
} }
#endif #endif
} }
return pxHigherPriorityTaskWoken; return pxHigherPriorityTaskWoken;
}
static void i2c_slave_isr_handler(void *arg) {
bool pxHigherPriorityTaskWoken = false;
i2c_slave_struct_t *i2c = (i2c_slave_struct_t *)arg; // recover data
uint32_t activeInt = 0;
i2c_ll_get_intr_mask(i2c->dev, &activeInt);
i2c_ll_clear_intr_mask(i2c->dev, activeInt);
uint32_t rx_fifo_len = 0;
i2c_ll_get_rxfifo_cnt(i2c->dev, &rx_fifo_len);
bool slave_rw = i2c_ll_slave_rw(i2c->dev);
if (activeInt & I2C_RXFIFO_WM_INT_ENA) { // RX FiFo Full
pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len);
i2c_ll_slave_enable_rx_it(i2c->dev); //is this necessary?
} }
static void i2c_slave_isr_handler(void *arg) { if (activeInt & I2C_TRANS_COMPLETE_INT_ENA) { // STOP
bool pxHigherPriorityTaskWoken = false; if (rx_fifo_len) { //READ RX FIFO
i2c_slave_struct_t *i2c = (i2c_slave_struct_t *)arg; // recover data
uint32_t activeInt = 0;
i2c_ll_get_intr_mask(i2c->dev, &activeInt);
i2c_ll_clear_intr_mask(i2c->dev, activeInt);
uint32_t rx_fifo_len = 0;
i2c_ll_get_rxfifo_cnt(i2c->dev, &rx_fifo_len);
bool slave_rw = i2c_ll_slave_rw(i2c->dev);
if (activeInt & I2C_RXFIFO_WM_INT_ENA) { // RX FiFo Full
pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len); pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len);
i2c_ll_slave_enable_rx_it(i2c->dev); //is this necessary?
} }
if (i2c->rx_data_count) { //WRITE or RepeatedStart
if (activeInt & I2C_TRANS_COMPLETE_INT_ENA) { // STOP //SEND RX Event
if (rx_fifo_len) { //READ RX FIFO i2c_slave_queue_event_t event;
pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len); event.event = I2C_SLAVE_EVT_RX;
} event.stop = !slave_rw;
if (i2c->rx_data_count) { //WRITE or RepeatedStart event.param = i2c->rx_data_count;
//SEND RX Event pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event);
i2c_slave_queue_event_t event; //Zero RX count
event.event = I2C_SLAVE_EVT_RX; i2c->rx_data_count = 0;
event.stop = !slave_rw; }
event.param = i2c->rx_data_count; if (slave_rw) { // READ
pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event);
//Zero RX count
i2c->rx_data_count = 0;
}
if (slave_rw) { // READ
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
if (i2c->dev->status_reg.scl_main_state_last == 6) { if (i2c->dev->status_reg.scl_main_state_last == 6) {
//SEND TX Event //SEND TX Event
i2c_slave_queue_event_t event; i2c_slave_queue_event_t event;
event.event = I2C_SLAVE_EVT_TX; event.event = I2C_SLAVE_EVT_TX;
pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event); pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event);
} }
#else #else
//reset TX data //reset TX data
i2c_ll_txfifo_rst(i2c->dev); i2c_ll_txfifo_rst(i2c->dev);
uint8_t d; uint8_t d;
while (xQueueReceiveFromISR(i2c->tx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) == pdTRUE); //flush partial write while (xQueueReceiveFromISR(i2c->tx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) == pdTRUE); //flush partial write
#endif #endif
}
}
#ifndef CONFIG_IDF_TARGET_ESP32
if (activeInt & I2C_SLAVE_STRETCH_INT_ENA) { // STRETCH
i2c_stretch_cause_t cause = i2c_ll_stretch_cause(i2c->dev);
if (cause == I2C_STRETCH_CAUSE_MASTER_READ) {
//on C3 RX data disappears with repeated start, so we need to get it here
if (rx_fifo_len) {
pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len);
}
//SEND TX Event
i2c_slave_queue_event_t event;
event.event = I2C_SLAVE_EVT_TX;
pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event);
//will clear after execution
} else if (cause == I2C_STRETCH_CAUSE_TX_FIFO_EMPTY) {
pxHigherPriorityTaskWoken |= i2c_slave_handle_tx_fifo_empty(i2c);
i2c_ll_stretch_clr(i2c->dev);
} else if (cause == I2C_STRETCH_CAUSE_RX_FIFO_FULL) {
pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len);
i2c_ll_stretch_clr(i2c->dev);
}
}
#endif
if (activeInt & I2C_TXFIFO_WM_INT_ENA) { // TX FiFo Empty
pxHigherPriorityTaskWoken |= i2c_slave_handle_tx_fifo_empty(i2c);
}
if (pxHigherPriorityTaskWoken) {
portYIELD_FROM_ISR();
} }
} }
static size_t i2c_slave_read_rx(i2c_slave_struct_t * i2c, uint8_t * data, size_t len) { #ifndef CONFIG_IDF_TARGET_ESP32
if (!len) { if (activeInt & I2C_SLAVE_STRETCH_INT_ENA) { // STRETCH
return 0; i2c_stretch_cause_t cause = i2c_ll_stretch_cause(i2c->dev);
if (cause == I2C_STRETCH_CAUSE_MASTER_READ) {
//on C3 RX data disappears with repeated start, so we need to get it here
if (rx_fifo_len) {
pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len);
}
//SEND TX Event
i2c_slave_queue_event_t event;
event.event = I2C_SLAVE_EVT_TX;
pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event);
//will clear after execution
} else if (cause == I2C_STRETCH_CAUSE_TX_FIFO_EMPTY) {
pxHigherPriorityTaskWoken |= i2c_slave_handle_tx_fifo_empty(i2c);
i2c_ll_stretch_clr(i2c->dev);
} else if (cause == I2C_STRETCH_CAUSE_RX_FIFO_FULL) {
pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len);
i2c_ll_stretch_clr(i2c->dev);
} }
}
#endif
if (activeInt & I2C_TXFIFO_WM_INT_ENA) { // TX FiFo Empty
pxHigherPriorityTaskWoken |= i2c_slave_handle_tx_fifo_empty(i2c);
}
if (pxHigherPriorityTaskWoken) {
portYIELD_FROM_ISR();
}
}
static size_t i2c_slave_read_rx(i2c_slave_struct_t *i2c, uint8_t *data, size_t len) {
if (!len) {
return 0;
}
#if I2C_SLAVE_USE_RX_QUEUE #if I2C_SLAVE_USE_RX_QUEUE
uint8_t d = 0; uint8_t d = 0;
BaseType_t res = pdTRUE; BaseType_t res = pdTRUE;
for (size_t i = 0; i < len; i++) { for (size_t i = 0; i < len; i++) {
if (data) { if (data) {
res = xQueueReceive(i2c->rx_queue, &data[i], 0); res = xQueueReceive(i2c->rx_queue, &data[i], 0);
} else { } else {
res = xQueueReceive(i2c->rx_queue, &d, 0); res = xQueueReceive(i2c->rx_queue, &d, 0);
}
if (res != pdTRUE) {
log_e("Read Queue(%u) Failed", i);
len = i;
break;
}
} }
return (data) ? len : 0; if (res != pdTRUE) {
log_e("Read Queue(%u) Failed", i);
len = i;
break;
}
}
return (data) ? len : 0;
#else #else
size_t dlen = 0, to_read = len, so_far = 0, available = 0; size_t dlen = 0, to_read = len, so_far = 0, available = 0;
uint8_t *rx_data = NULL; uint8_t *rx_data = NULL;
@ -851,55 +849,55 @@ fail:
} }
return (data) ? so_far : 0; return (data) ? so_far : 0;
#endif #endif
} }
static void i2c_slave_task(void *pv_args) { static void i2c_slave_task(void *pv_args) {
i2c_slave_struct_t *i2c = (i2c_slave_struct_t *)pv_args; i2c_slave_struct_t *i2c = (i2c_slave_struct_t *)pv_args;
i2c_slave_queue_event_t event; i2c_slave_queue_event_t event;
size_t len = 0; size_t len = 0;
bool stop = false; bool stop = false;
uint8_t *data = NULL; uint8_t *data = NULL;
for (;;) { for (;;) {
if (xQueueReceive(i2c->event_queue, &event, portMAX_DELAY) == pdTRUE) { if (xQueueReceive(i2c->event_queue, &event, portMAX_DELAY) == pdTRUE) {
// Write // Write
if (event.event == I2C_SLAVE_EVT_RX) { if (event.event == I2C_SLAVE_EVT_RX) {
len = event.param; len = event.param;
stop = event.stop; stop = event.stop;
data = (len > 0) ? (uint8_t *)malloc(len) : NULL; data = (len > 0) ? (uint8_t *)malloc(len) : NULL;
if (len && data == NULL) { if (len && data == NULL) {
log_e("Malloc (%u) Failed", len); log_e("Malloc (%u) Failed", len);
}
len = i2c_slave_read_rx(i2c, data, len);
if (i2c->receive_callback) {
i2c->receive_callback(i2c->num, data, len, stop, i2c->arg);
}
free(data);
// Read
} else if (event.event == I2C_SLAVE_EVT_TX) {
if (i2c->request_callback) {
i2c->request_callback(i2c->num, i2c->arg);
}
i2c_ll_stretch_clr(i2c->dev);
} }
len = i2c_slave_read_rx(i2c, data, len);
if (i2c->receive_callback) {
i2c->receive_callback(i2c->num, data, len, stop, i2c->arg);
}
free(data);
// Read
} else if (event.event == I2C_SLAVE_EVT_TX) {
if (i2c->request_callback) {
i2c->request_callback(i2c->num, i2c->arg);
}
i2c_ll_stretch_clr(i2c->dev);
} }
} }
vTaskDelete(NULL);
} }
vTaskDelete(NULL);
}
static bool i2cSlaveDetachBus(void *bus_i2c_num) { static bool i2cSlaveDetachBus(void *bus_i2c_num) {
uint8_t num = (int)bus_i2c_num - 1; uint8_t num = (int)bus_i2c_num - 1;
i2c_slave_struct_t *i2c = &_i2c_bus_array[num]; i2c_slave_struct_t *i2c = &_i2c_bus_array[num];
if (i2c->scl == -1 && i2c->sda == -1) { if (i2c->scl == -1 && i2c->sda == -1) {
return true;
}
esp_err_t err = i2cSlaveDeinit(num);
if (err != ESP_OK) {
log_e("i2cSlaveDeinit failed with error: %d", err);
return false;
}
return true; return true;
} }
esp_err_t err = i2cSlaveDeinit(num);
if (err != ESP_OK) {
log_e("i2cSlaveDeinit failed with error: %d", err);
return false;
}
return true;
}
#endif /* SOC_I2C_SUPPORT_SLAVE */ #endif /* SOC_I2C_SUPPORT_SLAVE */

View file

@ -148,13 +148,15 @@ struct spi_struct_t {
#if CONFIG_DISABLE_HAL_LOCKS #if CONFIG_DISABLE_HAL_LOCKS
#define SPI_MUTEX_LOCK() #define SPI_MUTEX_LOCK()
#define SPI_MUTEX_UNLOCK() #define SPI_MUTEX_UNLOCK()
+ static spi_t _spi_bus_array[] = { // clang-format off
static spi_t _spi_bus_array[] = {
#if CONFIG_IDF_TARGET_ESP32S2 #if CONFIG_IDF_TARGET_ESP32S2
{(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 0, -1, -1, -1, -1}, {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 0, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 1, -1, -1, -1, -1}, {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 1, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 2, -1, -1, -1, -1} {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 2, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4 #elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 1, -1, -1, -1, -1} {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 1, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32C2 #elif CONFIG_IDF_TARGET_ESP32C2
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1} {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32C3 #elif CONFIG_IDF_TARGET_ESP32C3
@ -168,6 +170,7 @@ struct spi_struct_t {
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 3, -1, -1, -1, -1} {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 3, -1, -1, -1, -1}
#endif #endif
}; };
// clang-format on
#else #else
#define SPI_MUTEX_LOCK() \ #define SPI_MUTEX_LOCK() \
do { \ do { \

View file

@ -29,7 +29,7 @@
#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 #if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32
static uint16_t __touchSleepCycles = 0x1000; static uint16_t __touchSleepCycles = 0x1000;
static uint16_t __touchMeasureCycles = 0x1000; static uint16_t __touchMeasureCycles = 0x1000;
#elif SOC_TOUCH_SENSOR_VERSION == 2 // ESP32S2, ESP32S3 #elif SOC_TOUCH_SENSOR_VERSION >= 2 // ESP32S2, ESP32S3, ESP32P4
static uint16_t __touchSleepCycles = TOUCH_PAD_SLEEP_CYCLE_DEFAULT; static uint16_t __touchSleepCycles = TOUCH_PAD_SLEEP_CYCLE_DEFAULT;
static uint16_t __touchMeasureCycles = TOUCH_PAD_MEASURE_CYCLE_DEFAULT; static uint16_t __touchMeasureCycles = TOUCH_PAD_MEASURE_CYCLE_DEFAULT;
#endif #endif

View file

@ -1,5 +1,6 @@
{ {
"targets": { "targets": {
"esp32": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -1,10 +1,7 @@
{ {
"targets": { "targets": {
"esp32": false, "esp32": false,
"esp32c2": false,
"esp32c3": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false, "esp32s2": false
"esp32s3": false
} }
} }

View file

@ -1,9 +1,6 @@
{ {
"targets": { "targets": {
"esp32": false, "esp32": false,
"esp32c3": false,
"esp32c6": false,
"esp32h2": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -1,8 +1,5 @@
{ {
"targets": { "targets": {
"esp32c3": false,
"esp32c6": false,
"esp32h2": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -1,6 +1,5 @@
{ {
"targets": { "targets": {
"esp32c3": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -1,6 +1,5 @@
{ {
"targets": { "targets": {
"esp32h2": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -1,10 +1,6 @@
{ {
"targets": { "targets": {
"esp32": false,
"esp32c2": false,
"esp32c3": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false, "esp32s2": false
"esp32s3": false
} }
} }

View file

@ -1,9 +1,5 @@
{ {
"targets": { "targets": {
"esp32": false,
"esp32c3": false,
"esp32c6": false,
"esp32h2": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -1,8 +1,5 @@
{ {
"targets": { "targets": {
"esp32c3": false,
"esp32c6": false,
"esp32h2": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -1,6 +1,5 @@
{ {
"targets": { "targets": {
"esp32c3": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -1,6 +1,5 @@
{ {
"targets": { "targets": {
"esp32h2": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false
} }

View file

@ -2,6 +2,7 @@
"targets": { "targets": {
"esp32c3": false, "esp32c3": false,
"esp32c6": false, "esp32c6": false,
"esp32h2": false "esp32h2": false,
"esp32p4": false
} }
} }

View file

@ -3,6 +3,7 @@
"esp32c3": false, "esp32c3": false,
"esp32c6": false, "esp32c6": false,
"esp32h2": false, "esp32h2": false,
"esp32p4": false,
"esp32s2": false, "esp32s2": false,
"esp32s3": false "esp32s3": false
} }

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@ -3,6 +3,7 @@
"esp32": false, "esp32": false,
"esp32c3": false, "esp32c3": false,
"esp32c6": false, "esp32c6": false,
"esp32h2": false "esp32h2": false,
"esp32p4": false
} }
} }

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@ -2,6 +2,7 @@
"targets": { "targets": {
"esp32c3": false, "esp32c3": false,
"esp32c6": false, "esp32c6": false,
"esp32h2": false "esp32h2": false,
"esp32p4": false
} }
} }

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@ -2,6 +2,7 @@
"targets": { "targets": {
"esp32c3": false, "esp32c3": false,
"esp32c6": false, "esp32c6": false,
"esp32h2": false "esp32h2": false,
"esp32p4": false
} }
} }

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@ -3,6 +3,7 @@
"esp32c3": false, "esp32c3": false,
"esp32c6": false, "esp32c6": false,
"esp32h2": false, "esp32h2": false,
"esp32p4": false,
"esp32s2": false, "esp32s2": false,
"esp32s3": false "esp32s3": false
} }

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@ -3,6 +3,7 @@
"esp32c3": false, "esp32c3": false,
"esp32c6": false, "esp32c6": false,
"esp32h2": false, "esp32h2": false,
"esp32p4": false,
"esp32s2": false, "esp32s2": false,
"esp32s3": false "esp32s3": false
} }

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@ -1,10 +1,10 @@
{ {
"targets": { "targets": {
"esp32": false, "esp32": false,
"esp32c2": false,
"esp32c3": false, "esp32c3": false,
"esp32c6": false,
"esp32h2": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false,
"esp32s3": false
} }
} }

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@ -1,9 +1,10 @@
{ {
"targets": { "targets": {
"esp32": false,
"esp32c2": false,
"esp32c3": false, "esp32c3": false,
"esp32c6": false,
"esp32h2": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false,
"esp32s3": false
} }
} }

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@ -1,7 +1,10 @@
{ {
"targets": { "targets": {
"esp32": false,
"esp32c2": false,
"esp32c3": false, "esp32c3": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false,
"esp32s3": false
} }
} }

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@ -1,7 +1,10 @@
{ {
"targets": { "targets": {
"esp32h2": false, "esp32": false,
"esp32c2": false,
"esp32c3": false,
"esp32p4": false, "esp32p4": false,
"esp32s2": false "esp32s2": false,
"esp32s3": false
} }
} }

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@ -39,7 +39,7 @@
#define HSPI_SS 15 #define HSPI_SS 15
#endif #endif
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
#define VSPI FSPI #define VSPI FSPI
#endif #endif

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@ -2,5 +2,8 @@
"platforms": { "platforms": {
"qemu": false, "qemu": false,
"wokwi": false "wokwi": false
},
"targets": {
"esp32p4": false
} }
} }

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@ -6,6 +6,7 @@
"targets": { "targets": {
"esp32c3": false, "esp32c3": false,
"esp32c6": false, "esp32c6": false,
"esp32h2": false "esp32h2": false,
"esp32p4": false
} }
} }

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@ -100,7 +100,7 @@ void transmit_and_check_msg(const String msg_append, bool perform_assert = true)
if (perform_assert) { if (perform_assert) {
TEST_ASSERT_EQUAL_STRING(("Hello from Serial1 (UART1) >>> via loopback >>> Serial1 (UART1) " + msg_append).c_str(), recv_msg.c_str()); TEST_ASSERT_EQUAL_STRING(("Hello from Serial1 (UART1) >>> via loopback >>> Serial1 (UART1) " + msg_append).c_str(), recv_msg.c_str());
} }
#elif SOC_UART_HP_NUM == 3 #elif SOC_UART_HP_NUM >= 3
Serial1.print("Hello from Serial1 (UART1) >>> to >>> Serial2 (UART2) " + msg_append); Serial1.print("Hello from Serial1 (UART1) >>> to >>> Serial2 (UART2) " + msg_append);
Serial1.flush(); Serial1.flush();
delay(100); delay(100);
@ -128,7 +128,7 @@ void task_delayed_msg(void *pvParameters) {
#if SOC_UART_HP_NUM == 2 #if SOC_UART_HP_NUM == 2
selected_serial = &Serial; selected_serial = &Serial;
#elif SOC_UART_HP_NUM == 3 #elif SOC_UART_HP_NUM >= 3
selected_serial = &Serial1; selected_serial = &Serial1;
#endif #endif
@ -150,7 +150,7 @@ void setUp(void) {
onReceive_cb(Serial1); onReceive_cb(Serial1);
}); });
uart_internal_loopback(1, RX1); uart_internal_loopback(1, RX1);
#elif SOC_UART_HP_NUM == 3 #elif SOC_UART_HP_NUM >= 3
log_d("Setup internal loop-back between Serial1 (UART1) <<--->> Serial2 (UART2)"); log_d("Setup internal loop-back between Serial1 (UART1) <<--->> Serial2 (UART2)");
Serial1.onReceive([]() { Serial1.onReceive([]() {
@ -225,7 +225,7 @@ void change_baudrate_test(void) {
Serial1.updateBaudRate(9600); Serial1.updateBaudRate(9600);
TEST_ASSERT_UINT_WITHIN(192, 9600, Serial1.baudRate()); TEST_ASSERT_UINT_WITHIN(192, 9600, Serial1.baudRate());
#if SOC_UART_HP_NUM == 3 #if SOC_UART_HP_NUM >= 3
Serial2.updateBaudRate(9600); Serial2.updateBaudRate(9600);
TEST_ASSERT_UINT_WITHIN(192, 9600, Serial2.baudRate()); TEST_ASSERT_UINT_WITHIN(192, 9600, Serial2.baudRate());
#endif #endif
@ -239,7 +239,7 @@ void change_baudrate_test(void) {
//Baudrate error should be within 2% of the target baudrate //Baudrate error should be within 2% of the target baudrate
TEST_ASSERT_UINT_WITHIN(2304, 115200, Serial1.baudRate()); TEST_ASSERT_UINT_WITHIN(2304, 115200, Serial1.baudRate());
#if SOC_UART_HP_NUM == 3 #if SOC_UART_HP_NUM >= 3
TEST_ASSERT_UINT_WITHIN(2304, 115200, Serial2.baudRate()); TEST_ASSERT_UINT_WITHIN(2304, 115200, Serial2.baudRate());
#endif #endif
@ -421,7 +421,7 @@ void change_pins_test(void) {
#if SOC_UART_HP_NUM == 2 #if SOC_UART_HP_NUM == 2
esp_rom_gpio_connect_out_signal(SOC_RX0, SIG_GPIO_OUT_IDX, false, false); esp_rom_gpio_connect_out_signal(SOC_RX0, SIG_GPIO_OUT_IDX, false, false);
#elif SOC_UART_HP_NUM == 3 #elif SOC_UART_HP_NUM >= 3
esp_rom_gpio_connect_out_signal(RX1, SIG_GPIO_OUT_IDX, false, false); esp_rom_gpio_connect_out_signal(RX1, SIG_GPIO_OUT_IDX, false, false);
esp_rom_gpio_connect_out_signal(RX2, SIG_GPIO_OUT_IDX, false, false); esp_rom_gpio_connect_out_signal(RX2, SIG_GPIO_OUT_IDX, false, false);
#endif #endif
@ -432,7 +432,7 @@ void change_pins_test(void) {
Serial1.setPins(NEW_RX1, NEW_TX1); Serial1.setPins(NEW_RX1, NEW_TX1);
TEST_ASSERT_EQUAL(NEW_RX1, uart_get_RxPin(1)); TEST_ASSERT_EQUAL(NEW_RX1, uart_get_RxPin(1));
TEST_ASSERT_EQUAL(NEW_TX1, uart_get_TxPin(1)); TEST_ASSERT_EQUAL(NEW_TX1, uart_get_TxPin(1));
#elif SOC_UART_HP_NUM == 3 #elif SOC_UART_HP_NUM >= 3
Serial1.setPins(RX2, TX2); Serial1.setPins(RX2, TX2);
Serial2.setPins(RX1, TX1); Serial2.setPins(RX1, TX1);
TEST_ASSERT_EQUAL(RX2, uart_get_RxPin(1)); TEST_ASSERT_EQUAL(RX2, uart_get_RxPin(1));
@ -447,7 +447,7 @@ void change_pins_test(void) {
#if SOC_UART_HP_NUM == 2 #if SOC_UART_HP_NUM == 2
uart_internal_loopback(1, NEW_RX1); uart_internal_loopback(1, NEW_RX1);
#elif SOC_UART_HP_NUM == 3 #elif SOC_UART_HP_NUM >= 3
uart_internal_loopback(1, RX1); uart_internal_loopback(1, RX1);
uart_internal_loopback(2, RX2); uart_internal_loopback(2, RX2);
#endif #endif
@ -470,7 +470,7 @@ void auto_baudrate_test(void) {
#if SOC_UART_HP_NUM == 2 #if SOC_UART_HP_NUM == 2
selected_serial = &Serial1; selected_serial = &Serial1;
uart_internal_loopback(0, RX1); uart_internal_loopback(0, RX1);
#elif SOC_UART_HP_NUM == 3 #elif SOC_UART_HP_NUM >= 3
selected_serial = &Serial2; selected_serial = &Serial2;
#endif #endif
@ -504,7 +504,7 @@ void periman_test(void) {
Wire.begin(RX1, TX1); Wire.begin(RX1, TX1);
#if SOC_UART_HP_NUM == 3 #if SOC_UART_HP_NUM >= 3
Wire1.begin(RX2, TX2); Wire1.begin(RX2, TX2);
#endif #endif
@ -518,7 +518,7 @@ void periman_test(void) {
Serial1.setPins(RX1, TX1); Serial1.setPins(RX1, TX1);
#if SOC_UART_HP_NUM == 3 #if SOC_UART_HP_NUM >= 3
Serial2.setPins(RX2, TX2); Serial2.setPins(RX2, TX2);
uart_internal_loopback(1, RX2); uart_internal_loopback(1, RX2);
uart_internal_loopback(2, RX1); uart_internal_loopback(2, RX1);
@ -577,7 +577,7 @@ void setup() {
onReceive_cb(Serial1); onReceive_cb(Serial1);
}); });
uart_internal_loopback(1, RX1); uart_internal_loopback(1, RX1);
#elif SOC_UART_HP_NUM == 3 #elif SOC_UART_HP_NUM >= 3
log_d("Setup internal loop-back between Serial1 (UART1) <<--->> Serial2 (UART2)"); log_d("Setup internal loop-back between Serial1 (UART1) <<--->> Serial2 (UART2)");
Serial1.onReceive([]() { Serial1.onReceive([]() {

View file

@ -22,6 +22,7 @@
"qemu": false "qemu": false
}, },
"targets": { "targets": {
"esp32h2": false "esp32h2": false,
"esp32p4": false
} }
} }

View file

@ -27,4 +27,34 @@ static const uint8_t MOSI = 11;
static const uint8_t MISO = 12; static const uint8_t MISO = 12;
static const uint8_t SCK = 13; static const uint8_t SCK = 13;
static const uint8_t A0 = 16;
static const uint8_t A1 = 17;
static const uint8_t A2 = 18;
static const uint8_t A3 = 19;
static const uint8_t A4 = 20;
static const uint8_t A5 = 21;
static const uint8_t A6 = 22;
static const uint8_t A7 = 23;
static const uint8_t A8 = 49;
static const uint8_t A9 = 50;
static const uint8_t A10 = 51;
static const uint8_t A11 = 52;
static const uint8_t A12 = 53;
static const uint8_t A13 = 54;
static const uint8_t T0 = 2;
static const uint8_t T1 = 3;
static const uint8_t T2 = 4;
static const uint8_t T3 = 5;
static const uint8_t T4 = 6;
static const uint8_t T5 = 7;
static const uint8_t T6 = 8;
static const uint8_t T7 = 9;
static const uint8_t T8 = 10;
static const uint8_t T9 = 11;
static const uint8_t T10 = 12;
static const uint8_t T11 = 13;
static const uint8_t T12 = 14;
static const uint8_t T13 = 15;
#endif /* Pins_Arduino_h */ #endif /* Pins_Arduino_h */