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Create Stamp-S3 pins_arduino.h and Stamp-S3 Board (#7892)

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* m5stack_stamp_s3/pins_arduino.h

* add stamp-s3
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Tinyu 2023-03-31 19:45:33 +08:00 committed by GitHub
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commit 77e7fa58e7
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192
boards.txt
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@ -12118,6 +12118,198 @@ m5stack-coreink.menu.EraseFlash.all.upload.erase_cmd=-e
############################################################## ##############################################################
stamp-s3.name=STAMP-S3
stamp-s3.vid.0=0x303a
stamp-s3.pid.0=0x1001
stamp-s3.bootloader.tool=esptool_py
stamp-s3.bootloader.tool.default=esptool_py
stamp-s3.upload.tool=esptool_py
stamp-s3.upload.tool.default=esptool_py
stamp-s3.upload.tool.network=esp_ota
stamp-s3.upload.maximum_size=1310720
stamp-s3.upload.maximum_data_size=327680
stamp-s3.upload.flags=
stamp-s3.upload.extra_flags=
stamp-s3.upload.use_1200bps_touch=false
stamp-s3.upload.wait_for_upload_port=false
stamp-s3.serial.disableDTR=false
stamp-s3.serial.disableRTS=false
stamp-s3.build.tarch=xtensa
stamp-s3.build.bootloader_addr=0x0
stamp-s3.build.target=esp32s3
stamp-s3.build.mcu=esp32s3
stamp-s3.build.core=esp32
stamp-s3.build.variant=m5stack_stamp_s3
stamp-s3.build.board=STAMP_S3
stamp-s3.build.usb_mode=1
stamp-s3.build.cdc_on_boot=0
stamp-s3.build.msc_on_boot=0
stamp-s3.build.dfu_on_boot=0
stamp-s3.build.f_cpu=240000000L
stamp-s3.build.flash_size=4MB
stamp-s3.build.flash_freq=80m
stamp-s3.build.flash_mode=dio
stamp-s3.build.boot=qio
stamp-s3.build.boot_freq=80m
stamp-s3.build.partitions=default
stamp-s3.build.defines=
stamp-s3.build.loop_core=
stamp-s3.build.event_core=
stamp-s3.build.psram_type=qspi
stamp-s3.build.memory_type={build.boot}_{build.psram_type}
stamp-s3.menu.JTAGAdapter.default=Disabled
stamp-s3.menu.JTAGAdapter.default.build.copy_jtag_files=0
stamp-s3.menu.JTAGAdapter.builtin=Integrated USB JTAG
stamp-s3.menu.JTAGAdapter.builtin.build.openocdscript=esp32s3-builtin.cfg
stamp-s3.menu.JTAGAdapter.builtin.build.copy_jtag_files=1
stamp-s3.menu.JTAGAdapter.external=FTDI Adapter
stamp-s3.menu.JTAGAdapter.external.build.openocdscript=esp32s3-ftdi.cfg
stamp-s3.menu.JTAGAdapter.external.build.copy_jtag_files=1
stamp-s3.menu.JTAGAdapter.bridge=ESP USB Bridge
stamp-s3.menu.JTAGAdapter.bridge.build.openocdscript=esp32s3-bridge.cfg
stamp-s3.menu.JTAGAdapter.bridge.build.copy_jtag_files=1
stamp-s3.menu.PSRAM.disabled=Disabled
stamp-s3.menu.PSRAM.disabled.build.defines=
stamp-s3.menu.PSRAM.disabled.build.psram_type=qspi
stamp-s3.menu.PSRAM.enabled=QSPI PSRAM
stamp-s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
stamp-s3.menu.PSRAM.enabled.build.psram_type=qspi
stamp-s3.menu.PSRAM.opi=OPI PSRAM
stamp-s3.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM
stamp-s3.menu.PSRAM.opi.build.psram_type=opi
stamp-s3.menu.FlashMode.qio=QIO 80MHz
stamp-s3.menu.FlashMode.qio.build.flash_mode=dio
stamp-s3.menu.FlashMode.qio.build.boot=qio
stamp-s3.menu.FlashMode.qio.build.boot_freq=80m
stamp-s3.menu.FlashMode.qio.build.flash_freq=80m
stamp-s3.menu.FlashMode.qio120=QIO 120MHz
stamp-s3.menu.FlashMode.qio120.build.flash_mode=dio
stamp-s3.menu.FlashMode.qio120.build.boot=qio
stamp-s3.menu.FlashMode.qio120.build.boot_freq=120m
stamp-s3.menu.FlashMode.qio120.build.flash_freq=80m
stamp-s3.menu.FlashMode.dio=DIO 80MHz
stamp-s3.menu.FlashMode.dio.build.flash_mode=dio
stamp-s3.menu.FlashMode.dio.build.boot=dio
stamp-s3.menu.FlashMode.dio.build.boot_freq=80m
stamp-s3.menu.FlashMode.dio.build.flash_freq=80m
stamp-s3.menu.FlashMode.opi=OPI 80MHz
stamp-s3.menu.FlashMode.opi.build.flash_mode=dout
stamp-s3.menu.FlashMode.opi.build.boot=opi
stamp-s3.menu.FlashMode.opi.build.boot_freq=80m
stamp-s3.menu.FlashMode.opi.build.flash_freq=80m
stamp-s3.menu.FlashSize.4M=4MB (32Mb)
stamp-s3.menu.FlashSize.4M.build.flash_size=4MB
stamp-s3.menu.FlashSize.8M=8MB (64Mb)
stamp-s3.menu.FlashSize.8M.build.flash_size=8MB
stamp-s3.menu.FlashSize.8M.build.partitions=default_8MB
stamp-s3.menu.FlashSize.16M=16MB (128Mb)
stamp-s3.menu.FlashSize.16M.build.flash_size=16MB
#stamp-s3.menu.FlashSize.32M=32MB (256Mb)
#stamp-s3.menu.FlashSize.32M.build.flash_size=32MB
stamp-s3.menu.LoopCore.1=Core 1
stamp-s3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
stamp-s3.menu.LoopCore.0=Core 0
stamp-s3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
stamp-s3.menu.EventsCore.1=Core 1
stamp-s3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
stamp-s3.menu.EventsCore.0=Core 0
stamp-s3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
stamp-s3.menu.USBMode.hwcdc=Hardware CDC and JTAG
stamp-s3.menu.USBMode.hwcdc.build.usb_mode=1
stamp-s3.menu.USBMode.default=USB-OTG (TinyUSB)
stamp-s3.menu.USBMode.default.build.usb_mode=0
stamp-s3.menu.CDCOnBoot.default=Disabled
stamp-s3.menu.CDCOnBoot.default.build.cdc_on_boot=0
stamp-s3.menu.CDCOnBoot.cdc=Enabled
stamp-s3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
stamp-s3.menu.MSCOnBoot.default=Disabled
stamp-s3.menu.MSCOnBoot.default.build.msc_on_boot=0
stamp-s3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
stamp-s3.menu.MSCOnBoot.msc.build.msc_on_boot=1
stamp-s3.menu.DFUOnBoot.default=Disabled
stamp-s3.menu.DFUOnBoot.default.build.dfu_on_boot=0
stamp-s3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
stamp-s3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
stamp-s3.menu.UploadMode.default=UART0 / Hardware CDC
stamp-s3.menu.UploadMode.default.upload.use_1200bps_touch=false
stamp-s3.menu.UploadMode.default.upload.wait_for_upload_port=false
stamp-s3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
stamp-s3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
stamp-s3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
stamp-s3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
stamp-s3.menu.PartitionScheme.default.build.partitions=default
stamp-s3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
stamp-s3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
stamp-s3.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS)
stamp-s3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
stamp-s3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
stamp-s3.menu.CPUFreq.240=240MHz (WiFi)
stamp-s3.menu.CPUFreq.240.build.f_cpu=240000000L
stamp-s3.menu.CPUFreq.160=160MHz (WiFi)
stamp-s3.menu.CPUFreq.160.build.f_cpu=160000000L
stamp-s3.menu.CPUFreq.80=80MHz (WiFi)
stamp-s3.menu.CPUFreq.80.build.f_cpu=80000000L
stamp-s3.menu.CPUFreq.40=40MHz
stamp-s3.menu.CPUFreq.40.build.f_cpu=40000000L
stamp-s3.menu.CPUFreq.20=20MHz
stamp-s3.menu.CPUFreq.20.build.f_cpu=20000000L
stamp-s3.menu.CPUFreq.10=10MHz
stamp-s3.menu.CPUFreq.10.build.f_cpu=10000000L
stamp-s3.menu.UploadSpeed.921600=921600
stamp-s3.menu.UploadSpeed.921600.upload.speed=921600
stamp-s3.menu.UploadSpeed.115200=115200
stamp-s3.menu.UploadSpeed.115200.upload.speed=115200
stamp-s3.menu.UploadSpeed.256000.windows=256000
stamp-s3.menu.UploadSpeed.256000.upload.speed=256000
stamp-s3.menu.UploadSpeed.230400.windows.upload.speed=256000
stamp-s3.menu.UploadSpeed.230400=230400
stamp-s3.menu.UploadSpeed.230400.upload.speed=230400
stamp-s3.menu.UploadSpeed.460800.linux=460800
stamp-s3.menu.UploadSpeed.460800.macosx=460800
stamp-s3.menu.UploadSpeed.460800.upload.speed=460800
stamp-s3.menu.UploadSpeed.512000.windows=512000
stamp-s3.menu.UploadSpeed.512000.upload.speed=512000
stamp-s3.menu.DebugLevel.none=None
stamp-s3.menu.DebugLevel.none.build.code_debug=0
stamp-s3.menu.DebugLevel.error=Error
stamp-s3.menu.DebugLevel.error.build.code_debug=1
stamp-s3.menu.DebugLevel.warn=Warn
stamp-s3.menu.DebugLevel.warn.build.code_debug=2
stamp-s3.menu.DebugLevel.info=Info
stamp-s3.menu.DebugLevel.info.build.code_debug=3
stamp-s3.menu.DebugLevel.debug=Debug
stamp-s3.menu.DebugLevel.debug.build.code_debug=4
stamp-s3.menu.DebugLevel.verbose=Verbose
stamp-s3.menu.DebugLevel.verbose.build.code_debug=5
stamp-s3.menu.EraseFlash.none=Disabled
stamp-s3.menu.EraseFlash.none.upload.erase_cmd=
stamp-s3.menu.EraseFlash.all=Enabled
stamp-s3.menu.EraseFlash.all.upload.erase_cmd=-e
##############################################################
odroid_esp32.name=ODROID ESP32 odroid_esp32.name=ODROID ESP32
odroid_esp32.bootloader.tool=esptool_py odroid_esp32.bootloader.tool=esptool_py

55
variants/m5stack_stamp_s3/pins_arduino.h Normal file
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@ -0,0 +1,55 @@
#ifndef Pins_Arduino_h
#define Pins_Arduino_h
#include <stdint.h>
#include "soc/soc_caps.h"
#define USB_VID 0x303a
#define USB_PID 0x1001
#define EXTERNAL_NUM_INTERRUPTS 23
#define NUM_DIGITAL_PINS 46
#define NUM_ANALOG_INPUTS 15
#define analogInputToDigitalPin(p) \
(((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
#define digitalPinToInterrupt(p) (((p) < 48) ? (p) : -1)
#define digitalPinHasPWM(p) (p < 46)
static const uint8_t TX = 43;
static const uint8_t RX = 44;
static const uint8_t TXD2 = 1;
static const uint8_t RXD2 = 2;
static const uint8_t SDA = 13;
static const uint8_t SCL = 15;
static const uint8_t G0 = 0;
static const uint8_t G1 = 1;
static const uint8_t G2 = 2;
static const uint8_t G3 = 3;
static const uint8_t G4 = 4;
static const uint8_t G5 = 5;
static const uint8_t G6 = 6;
static const uint8_t G7 = 7;
static const uint8_t G8 = 8;
static const uint8_t G9 = 9;
static const uint8_t G10 = 10;
static const uint8_t G11 = 11;
static const uint8_t G12 = 12;
static const uint8_t G13 = 13;
static const uint8_t G14 = 14;
static const uint8_t G15 = 15;
static const uint8_t G39 = 39;
static const uint8_t G40 = 40;
static const uint8_t G41 = 41;
static const uint8_t G42 = 42;
static const uint8_t G43 = 43;
static const uint8_t G44 = 44;
static const uint8_t G46 = 46;
static const uint8_t ADC1 = 7;
static const uint8_t ADC2 = 8;
#endif /* Pins_Arduino_h */