Merge branch 'espressif:master' into master

This commit is contained in:
Limor "Ladyada" Fried 2021-12-23 12:28:24 -05:00 committed by GitHub
commit ed907b9653
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GPG key ID: 4AEE18F83AFDEB23
5 changed files with 78 additions and 101 deletions

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@ -37,7 +37,13 @@
#include "soc/periph_defs.h"
#include "soc/rtc_io_reg.h"
#define GPIO_FUNC 1
#else
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/ets_sys.h"
#include "esp32c3/rom/gpio.h"
#include "esp_intr_alloc.h"
#include "soc/periph_defs.h"
#define USE_ESP_IDF_GPIO 1
#else
#define USE_ESP_IDF_GPIO 1
#endif
#else // ESP32 Before IDF 4.0
@ -143,6 +149,29 @@ const DRAM_ATTR esp32_gpioMux_t esp32_gpioMux[SOC_GPIO_PIN_COUNT]={
{0xb8, -1, -1, -1},//SCL?
{0xbc, -1, -1, -1},//INPUT ONLY
{0, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32C3
{0x04, -1, 0, -1}, // ADC1_CH0
{0x08, -1, 1, -1}, // ADC1_CH1
{0x0c, -1, 2, -1}, // ADC1_CH2 | FSPIQ
{0x10, -1, 3, -1}, // ADC1_CH3
{0x14, -1, 4, -1}, // MTMS | ADC1_CH4 | FSPIHD
{0x18, -1, 5, -1}, // MTDI | ADC2_CH0 | FSPIWP
{0x1c, -1, -1, -1}, // MTCK | FSPICLK
{0x20, -1, -1, -1}, // MTDO | FSPID
{0x24, -1, -1, -1}, //
{0x28, -1, -1, -1}, //
{0x2c, -1, -1, -1}, // FSPICSO
{0x30, -1, -1, -1}, //
{0x34, -1, -1, -1}, // SPIHD
{0x38, -1, -1, -1}, // SPIWP
{0x3c, -1, -1, -1}, // SPICSO
{0x40, -1, -1, -1}, // SPICLK
{0x44, -1, -1, -1}, // SPID
{0x48, -1, -1, -1}, // SPIQ
{0x4c, -1, -1, -1}, // USB-
{0x50, -1, -1, -1}, // USB+
{0x54, -1, -1, -1}, // U0RXD
{0x58, -1, -1, -1}, // U0TXD
#endif
};
@ -481,4 +510,3 @@ extern int digitalRead(uint8_t pin) __attribute__ ((weak, alias("__digitalRead")
extern void attachInterrupt(uint8_t pin, voidFuncPtr handler, int mode) __attribute__ ((weak, alias("__attachInterrupt")));
extern void attachInterruptArg(uint8_t pin, voidFuncPtrArg handler, void * arg, int mode) __attribute__ ((weak, alias("__attachInterruptArg")));
extern void detachInterrupt(uint8_t pin) __attribute__ ((weak, alias("__detachInterrupt")));

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@ -124,10 +124,6 @@ static rmt_obj_t g_rmt_objects[MAX_CHANNELS] = {
/**
* Internal variables for driver data
*/
static intr_handle_t intr_handle;
static bool periph_enabled = false;
static xSemaphoreHandle g_rmt_block_lock = NULL;
/**
@ -188,21 +184,21 @@ static void _rmtRxTask(void *args) {
rmt_item32_t *data = NULL;
if (!rmt) {
log_e(" -- Inavalid Argument \n");
log_e(" -- Inavalid Argument");
goto err;
}
int channel = rmt->channel;
rmt_get_ringbuf_handle(channel, &rb);
if (!rb) {
log_e(" -- Failed to get RMT ringbuffer handle\n");
log_e(" -- Failed to get RMT ringbuffer handle");
goto err;
}
for(;;) {
data = (rmt_item32_t *) xRingbufferReceive(rb, &rmt_len, portMAX_DELAY);
if (data) {
log_d(" -- Got %d bytes on RX Ringbuffer - CH %d\n", rmt_len, rmt->channel);
log_d(" -- Got %d bytes on RX Ringbuffer - CH %d", rmt_len, rmt->channel);
rmt->rx_completed = true; // used in rmtReceiveCompleted()
// callback
if (rmt->cb) {
@ -390,7 +386,6 @@ bool rmtReadData(rmt_obj_t* rmt, uint32_t* data, size_t size)
if (!rmt) {
return false;
}
int channel = rmt->channel;
rmtReadAsync(rmt, (rmt_data_t*) data, size, NULL, false, 0);
return true;
@ -492,7 +487,7 @@ bool rmtReadAsync(rmt_obj_t* rmt, rmt_data_t* data, size_t size, void* eventFlag
// wait for data if requested so
if (waitForData && eventFlag) {
uint32_t flags = xEventGroupWaitBits(eventFlag, RMT_FLAGS_ALL,
xEventGroupWaitBits(eventFlag, RMT_FLAGS_ALL,
pdTRUE /* clear on exit */, pdFALSE /* wait for all bits */, timeout);
}
return true;
@ -520,9 +515,9 @@ float rmtSetTick(rmt_obj_t* rmt, float tick)
rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
{
int buffers = memsize;
rmt_obj_t* rmt;
size_t i;
size_t j;
rmt_obj_t* rmt = NULL;
size_t i = 0;
size_t j = 0;
// create common block mutex for protecting allocs from multiple threads
if (!g_rmt_block_lock) {
@ -555,7 +550,7 @@ rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
}
if (i == MAX_CHANNELS || i+j > MAX_CHANNELS || j != buffers) {
xSemaphoreGive(g_rmt_block_lock);
log_e("rmInit Failed - not enough channels\n");
log_e("rmInit Failed - not enough channels");
return NULL;
}
@ -591,7 +586,7 @@ rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
esp_err_code = rmt_config(&config);
if (esp_err_code == ESP_OK)
esp_err_code = rmt_driver_install(channel, 0, 0);
log_d(" -- %s RMT - CH %d - %d RAM Blocks - pin %d\n", tx_not_rx?"TX":"RX", channel, buffers, pin);
log_d(" -- %s RMT - CH %d - %d RAM Blocks - pin %d", tx_not_rx?"TX":"RX", channel, buffers, pin);
} else {
rmt_config_t config = RMT_DEFAULT_ARD_CONFIG_RX(pin, channel, buffers);
esp_err_code = rmt_config(&config);
@ -599,7 +594,7 @@ rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
esp_err_code = rmt_driver_install(channel, 1024, 0);
if (esp_err_code == ESP_OK)
esp_err_code = rmt_set_memory_owner(channel, RMT_MEM_OWNER_RX);
log_d(" -- %s RMT - CH %d - %d RAM Blocks - pin %d\n", tx_not_rx?"TX":"RX", channel, buffers, pin);
log_d(" -- %s RMT - CH %d - %d RAM Blocks - pin %d", tx_not_rx?"TX":"RX", channel, buffers, pin);
}
RMT_MUTEX_UNLOCK(channel);

View file

@ -12,38 +12,14 @@
// See the License for the specific language governing permissions and
// limitations under the License.
#include "esp32-hal.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "esp32-hal-matrix.h"
#include "soc/gpio_sd_reg.h"
#include "soc/gpio_sd_struct.h"
#include "soc/soc_caps.h"
#include "driver/sigmadelta.h"
#include "esp_system.h"
#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
#include "esp32/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/ets_sys.h"
#else
#error Target CONFIG_IDF_TARGET is not supported
#endif
#else // ESP32 Before IDF 4.0
#include "rom/ets_sys.h"
#endif
#if CONFIG_DISABLE_HAL_LOCKS
#define SD_MUTEX_LOCK()
#define SD_MUTEX_UNLOCK()
#else
#define SD_MUTEX_LOCK() do {} while (xSemaphoreTake(_sd_sys_lock, portMAX_DELAY) != pdPASS)
#define SD_MUTEX_UNLOCK() xSemaphoreGive(_sd_sys_lock)
xSemaphoreHandle _sd_sys_lock;
#endif
static uint8_t duty_set[SOC_SIGMADELTA_CHANNEL_NUM] = {0};
static uint32_t prescaler_set[SOC_SIGMADELTA_CHANNEL_NUM] = {0};
static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb, uint32_t new_apb){
if(old_apb == new_apb){
@ -51,82 +27,63 @@ static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb
}
uint32_t iarg = (uint32_t)arg;
uint8_t channel = iarg;
if(ev_type == APB_BEFORE_CHANGE){
SIGMADELTA.cg.clk_en = 0;
} else {
if(ev_type == APB_AFTER_CHANGE){
old_apb /= 1000000;
new_apb /= 1000000;
SD_MUTEX_LOCK();
uint32_t old_prescale = SIGMADELTA.channel[channel].prescale + 1;
SIGMADELTA.channel[channel].prescale = ((new_apb * old_prescale) / old_apb) - 1;
SIGMADELTA.cg.clk_en = 0;
SIGMADELTA.cg.clk_en = 1;
SD_MUTEX_UNLOCK();
uint32_t old_prescale = prescaler_set[channel] + 1;
uint32_t new_prescale = ((new_apb * old_prescale) / old_apb) - 1;
sigmadelta_set_prescale(channel,new_prescale);
prescaler_set[channel] = new_prescale;
}
}
uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq) //chan 0-7 freq 1220-312500
uint32_t sigmaDeltaSetup(uint8_t pin, uint8_t channel, uint32_t freq) //chan 0-x according to SOC, freq 1220-312500
{
if(channel > 7) {
if(channel >= SOC_SIGMADELTA_CHANNEL_NUM){
return 0;
}
#if !CONFIG_DISABLE_HAL_LOCKS
static bool tHasStarted = false;
if(!tHasStarted) {
tHasStarted = true;
_sd_sys_lock = xSemaphoreCreateMutex();
}
#endif
uint32_t apb_freq = getApbFrequency();
uint32_t prescale = (apb_freq/(freq*256)) - 1;
if(prescale > 0xFF) {
prescale = 0xFF;
}
SD_MUTEX_LOCK();
#ifndef CONFIG_IDF_TARGET_ESP32
SIGMADELTA.misc.function_clk_en = 1;
#endif
SIGMADELTA.channel[channel].prescale = prescale;
SIGMADELTA.cg.clk_en = 0;
SIGMADELTA.cg.clk_en = 1;
SD_MUTEX_UNLOCK();
sigmadelta_config_t sigmadelta_cfg = {
.channel = channel,
.sigmadelta_prescale = prescale,
.sigmadelta_duty = 0,
.sigmadelta_gpio = pin,
};
sigmadelta_config(&sigmadelta_cfg);
prescaler_set[channel] = prescale;
uint32_t iarg = channel;
addApbChangeCallback((void*)iarg, _on_apb_change);
return apb_freq/((prescale + 1) * 256);
}
void sigmaDeltaWrite(uint8_t channel, uint8_t duty) //chan 0-7 duty 8 bit
void sigmaDeltaWrite(uint8_t channel, uint8_t duty) //chan 0-x according to SOC duty 8 bit
{
if(channel > 7) {
if(channel >= SOC_SIGMADELTA_CHANNEL_NUM){
return;
}
duty -= 128;
SD_MUTEX_LOCK();
SIGMADELTA.channel[channel].duty = duty;
SD_MUTEX_UNLOCK();
duty -= 128;
sigmadelta_set_duty(channel,duty);
duty_set[channel] = duty;
}
uint8_t sigmaDeltaRead(uint8_t channel) //chan 0-7
uint8_t sigmaDeltaRead(uint8_t channel) //chan 0-x according to SOC
{
if(channel > 7) {
if(channel >= SOC_SIGMADELTA_CHANNEL_NUM){
return 0;
}
SD_MUTEX_LOCK();
uint8_t duty = SIGMADELTA.channel[channel].duty + 128;
SD_MUTEX_UNLOCK();
return duty;
}
void sigmaDeltaAttachPin(uint8_t pin, uint8_t channel) //channel 0-7
{
if(channel > 7) {
return;
}
pinMode(pin, OUTPUT);
pinMatrixOutAttach(pin, GPIO_SD0_OUT_IDX + channel, false, false);
return duty_set[channel]+128;
}
void sigmaDeltaDetachPin(uint8_t pin)
{
pinMatrixOutDetach(pin, false, false);
}
}

View file

@ -23,10 +23,9 @@ extern "C" {
#include <stdbool.h>
//channel 0-7 freq 1220-312500 duty 0-255
uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq);
uint32_t sigmaDeltaSetup(uint8_t pin, uint8_t channel, uint32_t freq);
void sigmaDeltaWrite(uint8_t channel, uint8_t duty);
uint8_t sigmaDeltaRead(uint8_t channel);
void sigmaDeltaAttachPin(uint8_t pin, uint8_t channel);
void sigmaDeltaDetachPin(uint8_t pin);

View file

@ -1,9 +1,7 @@
void setup()
{
//setup channel 0 with frequency 312500 Hz
sigmaDeltaSetup(0, 312500);
//attach pin 18 to channel 0
sigmaDeltaAttachPin(18,0);
//setup on pin 18, channel 0 with frequency 312500 Hz
sigmaDeltaSetup(18,0, 312500);
//initialize channel 0 to off
sigmaDeltaWrite(0, 0);
}