diff --git a/boards.txt b/boards.txt index db5eb8378..12587db1e 100755 --- a/boards.txt +++ b/boards.txt @@ -16,6 +16,7 @@ menu.LORAWAN_REGION=LoRaWan Region menu.LoRaWanDebugLevel=LoRaWan Debug Level menu.LoopCore=Arduino Runs On menu.EventsCore=Events Run On +menu.MemoryType=Memory Type ############################################################## ### DO NOT PUT BOARDS ABOVE THE OFFICIAL ESPRESSIF BOARDS! ### @@ -55,9 +56,52 @@ esp32s3.build.flash_mode=dio esp32s3.build.boot=qio esp32s3.build.partitions=default esp32s3.build.defines= -esp32s3.build.extra_libs="-L{compiler.sdk.path}/lib/spiram" esp32s3.build.loop_core= esp32s3.build.event_core= +esp32s3.build.memory_type=qspi_qspi + +esp32s3.menu.MemoryType.default=QSPI Flash and PSRAM +esp32s3.menu.MemoryType.default.build.memory_type=qspi_qspi +esp32s3.menu.MemoryType.qspi_opi=QSPI Flash and OPI PSRAM +esp32s3.menu.MemoryType.qspi_opi.build.memory_type=qspi_opi +esp32s3.menu.MemoryType.opi_opi=OPI Flash and PSRAM +esp32s3.menu.MemoryType.opi_opi.build.memory_type=opi_opi + +esp32s3.menu.PSRAM.disabled=Disabled +esp32s3.menu.PSRAM.disabled.build.defines= +esp32s3.menu.PSRAM.enabled=Enabled +esp32s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM + +esp32s3.menu.FlashMode.qio=QIO +esp32s3.menu.FlashMode.qio.build.flash_mode=dio +esp32s3.menu.FlashMode.qio.build.boot=qio +esp32s3.menu.FlashMode.dio=DIO +esp32s3.menu.FlashMode.dio.build.flash_mode=dio +esp32s3.menu.FlashMode.dio.build.boot=dio +esp32s3.menu.FlashMode.qout=QOUT +esp32s3.menu.FlashMode.qout.build.flash_mode=dout +esp32s3.menu.FlashMode.qout.build.boot=qout +esp32s3.menu.FlashMode.dout=DOUT +esp32s3.menu.FlashMode.dout.build.flash_mode=dout +esp32s3.menu.FlashMode.dout.build.boot=dout +esp32s3.menu.FlashMode.opi=OPI +esp32s3.menu.FlashMode.opi.build.flash_mode=dout +esp32s3.menu.FlashMode.opi.build.boot=opi + +esp32s3.menu.FlashFreq.80=80MHz +esp32s3.menu.FlashFreq.80.build.flash_freq=80m +esp32s3.menu.FlashFreq.40=40MHz +esp32s3.menu.FlashFreq.40.build.flash_freq=40m + +esp32s3.menu.FlashSize.4M=4MB (32Mb) +esp32s3.menu.FlashSize.4M.build.flash_size=4MB +esp32s3.menu.FlashSize.8M=8MB (64Mb) +esp32s3.menu.FlashSize.8M.build.flash_size=8MB +esp32s3.menu.FlashSize.8M.build.partitions=default_8MB +esp32s3.menu.FlashSize.16M=16MB (128Mb) +esp32s3.menu.FlashSize.16M.build.flash_size=16MB +esp32s3.menu.FlashSize.32M=32MB (256Mb) +esp32s3.menu.FlashSize.32M.build.flash_size=32MB esp32s3.menu.LoopCore.1=Core 1 esp32s3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1 @@ -96,16 +140,6 @@ esp32s3.menu.UploadMode.cdc=Internal USB esp32s3.menu.UploadMode.cdc.upload.use_1200bps_touch=true esp32s3.menu.UploadMode.cdc.upload.wait_for_upload_port=true -esp32s3.menu.PSRAM.disabled=Disabled -esp32s3.menu.PSRAM.disabled.build.defines= -esp32s3.menu.PSRAM.disabled.build.extra_libs="-L{compiler.sdk.path}/lib/spiram" -esp32s3.menu.PSRAM.qspi=QSPI -esp32s3.menu.PSRAM.qspi.build.defines=-DBOARD_HAS_PSRAM -esp32s3.menu.PSRAM.qspi.build.extra_libs="-L{compiler.sdk.path}/lib/spiram" -esp32s3.menu.PSRAM.opi=OPI -esp32s3.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM -DCONFIG_SPIRAM_BOOT_INIT -DCONFIG_SPIRAM_MODE_OCT=1 -esp32s3.menu.PSRAM.opi.build.extra_libs="-L{compiler.sdk.path}/lib/opiram" - esp32s3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) esp32s3.menu.PartitionScheme.default.build.partitions=default esp32s3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) @@ -153,35 +187,6 @@ esp32s3.menu.CPUFreq.20.build.f_cpu=20000000L esp32s3.menu.CPUFreq.10=10MHz esp32s3.menu.CPUFreq.10.build.f_cpu=10000000L -esp32s3.menu.FlashMode.qio=QIO -esp32s3.menu.FlashMode.qio.build.flash_mode=dio -esp32s3.menu.FlashMode.qio.build.boot=qio -esp32s3.menu.FlashMode.dio=DIO -esp32s3.menu.FlashMode.dio.build.flash_mode=dio -esp32s3.menu.FlashMode.dio.build.boot=dio -esp32s3.menu.FlashMode.qout=QOUT -esp32s3.menu.FlashMode.qout.build.flash_mode=dout -esp32s3.menu.FlashMode.qout.build.boot=qout -esp32s3.menu.FlashMode.dout=DOUT -esp32s3.menu.FlashMode.dout.build.flash_mode=dout -esp32s3.menu.FlashMode.dout.build.boot=dout - -esp32s3.menu.FlashFreq.80=80MHz -esp32s3.menu.FlashFreq.80.build.flash_freq=80m -esp32s3.menu.FlashFreq.40=40MHz -esp32s3.menu.FlashFreq.40.build.flash_freq=40m - -esp32s3.menu.FlashSize.4M=4MB (32Mb) -esp32s3.menu.FlashSize.4M.build.flash_size=4MB -esp32s3.menu.FlashSize.8M=8MB (64Mb) -esp32s3.menu.FlashSize.8M.build.flash_size=8MB -esp32s3.menu.FlashSize.8M.build.partitions=default_8MB -esp32s3.menu.FlashSize.2M=2MB (16Mb) -esp32s3.menu.FlashSize.2M.build.flash_size=2MB -esp32s3.menu.FlashSize.2M.build.partitions=minimal -esp32s3.menu.FlashSize.16M=16MB (128Mb) -esp32s3.menu.FlashSize.16M.build.flash_size=16MB - esp32s3.menu.UploadSpeed.921600=921600 esp32s3.menu.UploadSpeed.921600.upload.speed=921600 esp32s3.menu.UploadSpeed.115200=115200 @@ -884,8 +889,8 @@ esp32s3box.build.flash_freq=80m esp32s3box.build.flash_mode=dio esp32s3box.build.boot=qio esp32s3box.build.partitions=default -esp32s3box.build.extra_libs="-L{compiler.sdk.path}/lib/opiram" -esp32s3box.build.defines=-DBOARD_HAS_PSRAM -DCONFIG_SPIRAM_BOOT_INIT -DCONFIG_SPIRAM_MODE_OCT=1 +esp32s3box.build.defines=-DBOARD_HAS_PSRAM +esp32s3box.build.memory_type=qspi_opi esp32s3box.build.loop_core=-DARDUINO_RUNNING_CORE=1 esp32s3box.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1 @@ -955,6 +960,118 @@ esp32s3box.menu.DebugLevel.verbose.build.code_debug=5 ############################################################## +esp32s3camlcd.name=ESP32S3 CAM LCD +esp32s3camlcd.vid.0=0x303a +esp32s3camlcd.pid.0=0x1001 + +esp32s3camlcd.upload.tool=esptool_py +esp32s3camlcd.upload.maximum_size=1310720 +esp32s3camlcd.upload.maximum_data_size=327680 +esp32s3camlcd.upload.flags= +esp32s3camlcd.upload.extra_flags= +esp32s3camlcd.upload.use_1200bps_touch=false +esp32s3camlcd.upload.wait_for_upload_port=false + +esp32s3camlcd.serial.disableDTR=false +esp32s3camlcd.serial.disableRTS=false + +esp32s3camlcd.build.tarch=xtensa +esp32s3camlcd.build.bootloader_addr=0x0 +esp32s3camlcd.build.target=esp32s3 +esp32s3camlcd.build.mcu=esp32s3 +esp32s3camlcd.build.core=esp32 +esp32s3camlcd.build.variant=esp32s3camlcd +esp32s3camlcd.build.board=ESP32S3_CAM_LCD + +esp32s3camlcd.build.usb_mode=1 +esp32s3camlcd.build.cdc_on_boot=0 +esp32s3camlcd.build.msc_on_boot=0 +esp32s3camlcd.build.dfu_on_boot=0 +esp32s3camlcd.build.f_cpu=240000000L +esp32s3camlcd.build.flash_size=4MB +esp32s3camlcd.build.flash_freq=80m +esp32s3camlcd.build.flash_mode=dout +esp32s3camlcd.build.boot=opi +esp32s3camlcd.build.partitions=default +esp32s3camlcd.build.defines=-DBOARD_HAS_PSRAM +esp32s3camlcd.build.memory_type=opi_opi +esp32s3camlcd.build.loop_core= +esp32s3camlcd.build.event_core= + +esp32s3camlcd.menu.LoopCore.1=Core 1 +esp32s3camlcd.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1 +esp32s3camlcd.menu.LoopCore.0=Core 0 +esp32s3camlcd.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0 + +esp32s3camlcd.menu.EventsCore.1=Core 1 +esp32s3camlcd.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1 +esp32s3camlcd.menu.EventsCore.0=Core 0 +esp32s3camlcd.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0 + +esp32s3camlcd.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) +esp32s3camlcd.menu.PartitionScheme.default.build.partitions=default +esp32s3camlcd.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) +esp32s3camlcd.menu.PartitionScheme.defaultffat.build.partitions=default_ffat +esp32s3camlcd.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT) +esp32s3camlcd.menu.PartitionScheme.default_8MB.build.partitions=default_8MB +esp32s3camlcd.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 +esp32s3camlcd.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) +esp32s3camlcd.menu.PartitionScheme.minimal.build.partitions=minimal +esp32s3camlcd.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) +esp32s3camlcd.menu.PartitionScheme.no_ota.build.partitions=no_ota +esp32s3camlcd.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +esp32s3camlcd.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) +esp32s3camlcd.menu.PartitionScheme.noota_3g.build.partitions=noota_3g +esp32s3camlcd.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 +esp32s3camlcd.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) +esp32s3camlcd.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat +esp32s3camlcd.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 +esp32s3camlcd.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) +esp32s3camlcd.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat +esp32s3camlcd.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 +esp32s3camlcd.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) +esp32s3camlcd.menu.PartitionScheme.huge_app.build.partitions=huge_app +esp32s3camlcd.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 +esp32s3camlcd.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) +esp32s3camlcd.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +esp32s3camlcd.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +esp32s3camlcd.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT) +esp32s3camlcd.menu.PartitionScheme.fatflash.build.partitions=ffat +esp32s3camlcd.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 +esp32s3camlcd.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS) +esp32s3camlcd.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB +esp32s3camlcd.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 + +esp32s3camlcd.menu.UploadSpeed.921600=921600 +esp32s3camlcd.menu.UploadSpeed.921600.upload.speed=921600 +esp32s3camlcd.menu.UploadSpeed.115200=115200 +esp32s3camlcd.menu.UploadSpeed.115200.upload.speed=115200 +esp32s3camlcd.menu.UploadSpeed.256000.windows=256000 +esp32s3camlcd.menu.UploadSpeed.256000.upload.speed=256000 +esp32s3camlcd.menu.UploadSpeed.230400.windows.upload.speed=256000 +esp32s3camlcd.menu.UploadSpeed.230400=230400 +esp32s3camlcd.menu.UploadSpeed.230400.upload.speed=230400 +esp32s3camlcd.menu.UploadSpeed.460800.linux=460800 +esp32s3camlcd.menu.UploadSpeed.460800.macosx=460800 +esp32s3camlcd.menu.UploadSpeed.460800.upload.speed=460800 +esp32s3camlcd.menu.UploadSpeed.512000.windows=512000 +esp32s3camlcd.menu.UploadSpeed.512000.upload.speed=512000 + +esp32s3camlcd.menu.DebugLevel.none=None +esp32s3camlcd.menu.DebugLevel.none.build.code_debug=0 +esp32s3camlcd.menu.DebugLevel.error=Error +esp32s3camlcd.menu.DebugLevel.error.build.code_debug=1 +esp32s3camlcd.menu.DebugLevel.warn=Warn +esp32s3camlcd.menu.DebugLevel.warn.build.code_debug=2 +esp32s3camlcd.menu.DebugLevel.info=Info +esp32s3camlcd.menu.DebugLevel.info.build.code_debug=3 +esp32s3camlcd.menu.DebugLevel.debug=Debug +esp32s3camlcd.menu.DebugLevel.debug.build.code_debug=4 +esp32s3camlcd.menu.DebugLevel.verbose=Verbose +esp32s3camlcd.menu.DebugLevel.verbose.build.code_debug=5 + +############################################################## + esp32s2usb.name=ESP32S2 Native USB esp32s2usb.vid.0=0x303a esp32s2usb.pid.0=0x0003 diff --git a/platform.txt b/platform.txt index f2f0519ae..bddce002d 100644 --- a/platform.txt +++ b/platform.txt @@ -117,6 +117,7 @@ compiler.elf2hex.extra_flags= compiler.libraries.ldflags= # This can be overriden in boards.txt +build.memory_type=qspi_qspi build.flash_size=4MB build.flash_mode=dio build.boot=qio @@ -165,7 +166,7 @@ recipe.S.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.cpreprocessor.fla recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{archive_file_path}" "{object_file}" ## Combine gc-sections, archives, and objects -recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-Wl,--Map={build.path}/{build.project_name}.map" "-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} {build.extra_flags} -Wl,--start-group {object_files} "{archive_file_path}" {build.extra_libs} {compiler.c.elf.libs} {compiler.libraries.ldflags} -Wl,--end-group -Wl,-EL -o "{build.path}/{build.project_name}.elf" +recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-Wl,--Map={build.path}/{build.project_name}.map" "-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" "-L{compiler.sdk.path}/{build.memory_type}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} {build.extra_flags} -Wl,--start-group {object_files} "{archive_file_path}" {build.extra_libs} {compiler.c.elf.libs} {compiler.libraries.ldflags} -Wl,--end-group -Wl,-EL -o "{build.path}/{build.project_name}.elf" ## Create partitions.bin recipe.objcopy.partitions.bin.pattern={tools.gen_esp32part.cmd} -q "{build.path}/partitions.csv" "{build.path}/{build.project_name}.partitions.bin" diff --git a/tools/platformio-build-esp32.py b/tools/platformio-build-esp32.py index ce15addcf..c4e25d06a 100644 --- a/tools/platformio-build-esp32.py +++ b/tools/platformio-build-esp32.py @@ -290,7 +290,8 @@ env.Append( LIBPATH=[ join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "lib"), - join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "ld") + join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "ld"), + join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "qspi_qspi") ], LIBS=[ diff --git a/tools/platformio-build-esp32c3.py b/tools/platformio-build-esp32c3.py index c42a51e90..ce91352d7 100644 --- a/tools/platformio-build-esp32c3.py +++ b/tools/platformio-build-esp32c3.py @@ -280,7 +280,8 @@ env.Append( LIBPATH=[ join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "lib"), - join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "ld") + join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "ld"), + join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "qspi_qspi") ], LIBS=[ diff --git a/tools/platformio-build-esp32s2.py b/tools/platformio-build-esp32s2.py index 66fe53e5e..bd74257ed 100644 --- a/tools/platformio-build-esp32s2.py +++ b/tools/platformio-build-esp32s2.py @@ -277,7 +277,8 @@ env.Append( LIBPATH=[ join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "lib"), - join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "ld") + join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "ld"), + join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "qspi_qspi") ], LIBS=[ diff --git a/tools/platformio-build-esp32s3.py b/tools/platformio-build-esp32s3.py index 8f85b55be..9e4d87035 100644 --- a/tools/platformio-build-esp32s3.py +++ b/tools/platformio-build-esp32s3.py @@ -294,7 +294,8 @@ env.Append( LIBPATH=[ join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "lib"), - join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "ld") + join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "ld"), + join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "qspi_qspi") ], LIBS=[ diff --git a/tools/sdk/esp32s3/bin/bootloader_opi_80m.bin b/tools/sdk/esp32s3/bin/bootloader_opi_80m.bin new file mode 100644 index 000000000..daf21cf1c Binary files /dev/null and b/tools/sdk/esp32s3/bin/bootloader_opi_80m.bin differ diff --git a/tools/sdk/esp32s3/opi_opi/libbootloader_support.a b/tools/sdk/esp32s3/opi_opi/libbootloader_support.a new file mode 100644 index 000000000..c1b59ff63 Binary files /dev/null and b/tools/sdk/esp32s3/opi_opi/libbootloader_support.a differ diff --git a/tools/sdk/esp32s3/lib/opiram/libesp_hw_support.a b/tools/sdk/esp32s3/opi_opi/libesp_hw_support.a similarity index 100% rename from tools/sdk/esp32s3/lib/opiram/libesp_hw_support.a rename to tools/sdk/esp32s3/opi_opi/libesp_hw_support.a diff --git a/tools/sdk/esp32s3/opi_opi/libesp_system.a b/tools/sdk/esp32s3/opi_opi/libesp_system.a new file mode 100644 index 000000000..56a1177f8 Binary files /dev/null and b/tools/sdk/esp32s3/opi_opi/libesp_system.a differ diff --git a/tools/sdk/esp32s3/lib/libfreertos.a b/tools/sdk/esp32s3/opi_opi/libfreertos.a similarity index 100% rename from tools/sdk/esp32s3/lib/libfreertos.a rename to tools/sdk/esp32s3/opi_opi/libfreertos.a diff --git a/tools/sdk/esp32s3/opi_opi/libspi_flash.a b/tools/sdk/esp32s3/opi_opi/libspi_flash.a new file mode 100644 index 000000000..a4607a4d2 Binary files /dev/null and b/tools/sdk/esp32s3/opi_opi/libspi_flash.a differ diff --git a/tools/sdk/esp32s3/opi_opi/sections.ld b/tools/sdk/esp32s3/opi_opi/sections.ld new file mode 100644 index 000000000..5ff634a02 --- /dev/null +++ b/tools/sdk/esp32s3/opi_opi/sections.ld @@ -0,0 +1,594 @@ +/* Automatically generated file; DO NOT EDIT */ +/* Espressif IoT Development Framework Linker Script */ +/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp_system/ld/esp32s3/sections.ld.in */ + +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Default entry point */ +ENTRY(call_start_cpu0); + +_diram_i_start = 0x40378000; + +SECTIONS +{ + /** + * RTC fast memory holds RTC wake stub code, + * including from any source file named rtc_wake_stub*.c + */ + .rtc.text : + { + . = ALIGN(4); + _rtc_text_start = ABSOLUTE(.); + *(.rtc.entry.text) + + *(.rtc.literal .rtc.text .rtc.text.*) + + *rtc_wake_stub*.*(.literal .text .literal.* .text.*) + _rtc_text_end = ABSOLUTE(.); + } > rtc_iram_seg + + /** + * This section is required to skip rtc.text area because rtc_iram_seg and + * rtc_data_seg are reflect the same address space on different buses. + */ + .rtc.dummy : + { + _rtc_dummy_start = ABSOLUTE(.); + _rtc_fast_start = ABSOLUTE(.); + . = SIZEOF(.rtc.text); + _rtc_dummy_end = ABSOLUTE(.); + } > rtc_data_seg + + /** + * This section located in RTC FAST Memory area. + * It holds data marked with RTC_FAST_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_fast : + { + . = ALIGN(4); + _rtc_force_fast_start = ABSOLUTE(.); + + _coredump_rtc_fast_start = ABSOLUTE(.); + *(.rtc.fast.coredump .rtc.fast.coredump.*) + _coredump_rtc_fast_end = ABSOLUTE(.); + + *(.rtc.force_fast .rtc.force_fast.*) + . = ALIGN(4) ; + _rtc_force_fast_end = ABSOLUTE(.); + } > rtc_data_seg + + /** + * RTC data section holds RTC wake stub + * data/rodata, including from any source file + * named rtc_wake_stub*.c and the data marked with + * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. + * The memory location of the data is dependent on + * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option. + */ + .rtc.data : + { + _rtc_data_start = ABSOLUTE(.); + + _coredump_rtc_start = ABSOLUTE(.); + *(.rtc.coredump .rtc.coredump.*) + _coredump_rtc_end = ABSOLUTE(.); + *(.rtc.data .rtc.data.*) + *(.rtc.rodata .rtc.rodata.*) + + *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*) + _rtc_data_end = ABSOLUTE(.); + } > rtc_data_location + + /* RTC bss, from any source file named rtc_wake_stub*.c */ + .rtc.bss (NOLOAD) : + { + _rtc_bss_start = ABSOLUTE(.); + *rtc_wake_stub*.*(.bss .bss.*) + *rtc_wake_stub*.*(COMMON) + + *(.rtc.bss) + + _rtc_bss_end = ABSOLUTE(.); + } > rtc_data_location + + /** + * This section holds data that should not be initialized at power up + * and will be retained during deep sleep. + * User data marked with RTC_NOINIT_ATTR will be placed + * into this section. See the file "esp_attr.h" for more information. + * The memory location of the data is dependent on CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option. + */ + .rtc_noinit (NOLOAD): + { + . = ALIGN(4); + _rtc_noinit_start = ABSOLUTE(.); + *(.rtc_noinit .rtc_noinit.*) + . = ALIGN(4) ; + _rtc_noinit_end = ABSOLUTE(.); + } > rtc_data_location + + /** + * This section located in RTC SLOW Memory area. + * It holds data marked with RTC_SLOW_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_slow : + { + . = ALIGN(4); + _rtc_force_slow_start = ABSOLUTE(.); + *(.rtc.force_slow .rtc.force_slow.*) + . = ALIGN(4) ; + _rtc_force_slow_end = ABSOLUTE(.); + } > rtc_slow_seg + + /* Get size of rtc slow data based on rtc_data_location alias */ + _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_slow_end - _rtc_data_start) + : (_rtc_force_slow_end - _rtc_force_slow_start); + + _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_fast_end - _rtc_fast_start) + : (_rtc_noinit_end - _rtc_fast_start); + + ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), + "RTC_SLOW segment data does not fit.") + + ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), + "RTC_FAST segment data does not fit.") + + /* Send .iram0 code to iram */ + .iram0.vectors : + { + _iram_start = ABSOLUTE(.); + /* Vectors go to IRAM */ + _vector_table = ABSOLUTE(.); + . = 0x0; + KEEP(*(.WindowVectors.text)); + . = 0x180; + KEEP(*(.Level2InterruptVector.text)); + . = 0x1c0; + KEEP(*(.Level3InterruptVector.text)); + . = 0x200; + KEEP(*(.Level4InterruptVector.text)); + . = 0x240; + KEEP(*(.Level5InterruptVector.text)); + . = 0x280; + KEEP(*(.DebugExceptionVector.text)); + . = 0x2c0; + KEEP(*(.NMIExceptionVector.text)); + . = 0x300; + KEEP(*(.KernelExceptionVector.text)); + . = 0x340; + KEEP(*(.UserExceptionVector.text)); + . = 0x3C0; + KEEP(*(.DoubleExceptionVector.text)); + . = 0x400; + _invalid_pc_placeholder = ABSOLUTE(.); + *(.*Vector.literal) + + *(.UserEnter.literal); + *(.UserEnter.text); + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + _init_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.text : + { + /* Code marked as running out of IRAM */ + _iram_text_start = ABSOLUTE(.); + + *(.iram1 .iram1.*) + *libapp_trace.a:app_trace.*(.literal .literal.* .text .text.*) + *libapp_trace.a:app_trace_util.*(.literal .literal.* .text .text.*) + *libesp_event.a:default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) + *libesp_event.a:esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) + *libesp_hw_support.a:cpu_util.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:opiram_psram.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_clk.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) + *libesp_hw_support.a:rtc_pm.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_sleep.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_time.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_wdt.*(.literal .literal.* .text .text.*) + *libesp_ringbuf.a:(.literal .literal.* .text .text.*) + *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*) + *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort) + *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*) + *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*) + *libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortExitCritical .literal.vPortExitCriticalCompliance .literal.vPortReleaseTaskMPUSettings .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortEnterCriticalTimeout .literal.xPortEnterCriticalTimeoutCompliance .literal.xPortInIsrContext .literal.xPortStartScheduler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortExitCritical .text.vPortExitCriticalCompliance .text.vPortReleaseTaskMPUSettings .text.vPortSetStackWatchpoint .text.vPortStoreTaskMPUSettings .text.vPortYieldOtherCore .text.xPortEnterCriticalTimeout .text.xPortEnterCriticalTimeoutCompliance .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler) + *libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .literal.vApplicationGetIdleTaskMemory .literal.vApplicationGetTimerTaskMemory .literal.xPortCheckValidTCBMem .literal.xPortcheckValidStackMem .text .text.esp_startup_start_app_common .text.vApplicationGetIdleTaskMemory .text.vApplicationGetTimerTaskMemory .text.xPortCheckValidTCBMem .text.xPortcheckValidStackMem) + *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) + *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) + *libgcov.a:(.literal .literal.* .text .text.*) + *libhal.a:cpu_hal.*(.literal .literal.* .text .text.*) + *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:soc_hal.*(.literal .literal.* .text .text.*) + *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) + *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:systimer_hal.*(.literal .literal.* .text .text.*) + *libhal.a:wdt_hal_iram.*(.literal .literal.* .text .text.*) + *libheap.a:heap_tlsf.*(.literal .literal.* .text .text.*) + *libheap.a:multi_heap.*(.literal .literal.* .text .text.*) + *libheap.a:multi_heap_poisoning.*(.literal .literal.* .text .text.*) + *liblog.a:log.*(.literal.esp_log_write .text.esp_log_write) + *liblog.a:log_freertos.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp) + *liblog.a:log_freertos.*(.literal.esp_log_impl_lock .text.esp_log_impl_lock) + *liblog.a:log_freertos.*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout) + *liblog.a:log_freertos.*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock) + *liblog.a:log_freertos.*(.literal.esp_log_timestamp .text.esp_log_timestamp) + *libnewlib.a:abort.*(.literal .literal.* .text .text.*) + *libnewlib.a:assert.*(.literal .literal.* .text .text.*) + *libnewlib.a:heap.*(.literal .literal.* .text .text.*) + *libnewlib.a:stdatomic.*(.literal .literal.* .text .text.*) + *librtc.a:(.literal .literal.* .text .text.*) + *libsoc.a:lldesc.*(.literal .literal.* .text .text.*) + *libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_oct_flash_init.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_timing_tuning.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_timing_config.*(.literal .literal.* .text .text.*) + *libxt_hal.a:(.literal .literal.* .text .text.*) + *libxtensa.a:eri.*(.literal .literal.* .text .text.*) + *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*) + + } > iram0_0_seg + + /** + * This section is required to skip .iram0.text area because iram0_0_seg and + * dram0_0_seg reflect the same address space on different buses. + */ + .dram0.dummy (NOLOAD): + { + . = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0); + } > dram0_0_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + + _esp_system_init_fn_array_start = ABSOLUTE(.); + KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*))) + _esp_system_init_fn_array_end = ABSOLUTE(.); + + *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*) + *(.dram1 .dram1.*) + _coredump_dram_start = ABSOLUTE(.); + *(.dram1.coredump .dram1.coredump.*) + _coredump_dram_end = ABSOLUTE(.); + *libapp_trace.a:app_trace.*(.rodata .rodata.*) + *libapp_trace.a:app_trace_util.*(.rodata .rodata.*) + _bt_data_start = ABSOLUTE(.); + *libbt.a:(.data .data.*) + . = ALIGN(4); + _bt_data_end = ABSOLUTE(.); + _btdm_data_start = ABSOLUTE(.); + *libbtdm_app.a:(.data .data.*) + . = ALIGN(4); + _btdm_data_end = ABSOLUTE(.); + *libesp_hw_support.a:opiram_psram.*(.rodata .rodata.*) + *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*) + *libesp_system.a:esp_err.*(.rodata .rodata.*) + *libesp_system.a:ubsan.*(.rodata .rodata.*) + *libgcc.a:_divsf3.*(.rodata .rodata.*) + *libgcov.a:(.rodata .rodata.*) + *libhal.a:cpu_hal.*(.rodata .rodata.*) + *libhal.a:i2c_hal_iram.*(.rodata .rodata.*) + *libhal.a:ledc_hal_iram.*(.rodata .rodata.*) + *libhal.a:soc_hal.*(.rodata .rodata.*) + *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*) + *libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*) + *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*) + *libhal.a:spi_hal_iram.*(.rodata .rodata.*) + *libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*) + *libhal.a:systimer_hal.*(.rodata .rodata.*) + *libhal.a:wdt_hal_iram.*(.rodata .rodata.*) + *libheap.a:heap_tlsf.*(.rodata .rodata.*) + *libheap.a:multi_heap.*(.rodata .rodata.*) + *libheap.a:multi_heap_poisoning.*(.rodata .rodata.*) + *libnewlib.a:abort.*(.rodata .rodata.*) + *libnewlib.a:assert.*(.rodata .rodata.*) + *libnewlib.a:heap.*(.rodata .rodata.*) + *libnewlib.a:stdatomic.*(.rodata .rodata.*) + _nimble_data_start = ABSOLUTE(.); + *libnimble.a:(.data .data.*) + . = ALIGN(4); + _nimble_data_end = ABSOLUTE(.); + *libphy.a:(.rodata .rodata.*) + *libsoc.a:lldesc.*(.rodata .rodata.*) + *libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_mxic_opi.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_oct_flash_init.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_timing_tuning.*(.rodata .rodata.*) + *libspi_flash.a:spi_timing_config.*(.rodata .rodata.*) + + _data_end = ABSOLUTE(.); + . = ALIGN(4); + } > dram0_0_seg + + /** + * This section holds data that should not be initialized at power up. + * The section located in Internal SRAM memory region. The macro _NOINIT + * can be used as attribute to place data into this section. + * See the "esp_attr.h" file for more information. + */ + .noinit (NOLOAD): + { + . = ALIGN(4); + _noinit_start = ABSOLUTE(.); + *(.noinit .noinit.*) + . = ALIGN(4) ; + _noinit_end = ABSOLUTE(.); + } > dram0_0_seg + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.ext_ram.bss*) + + *(.bss .bss.*) + *(.ext_ram.bss .ext_ram.bss.*) + *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) + *(COMMON) + _bt_bss_start = ABSOLUTE(.); + *libbt.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _bt_bss_end = ABSOLUTE(.); + _btdm_bss_start = ABSOLUTE(.); + *libbtdm_app.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _btdm_bss_end = ABSOLUTE(.); + _nimble_bss_start = ABSOLUTE(.); + *libnimble.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _nimble_bss_end = ABSOLUTE(.); + + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.share.mem) + *(.gnu.linkonce.b.*) + + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } > dram0_0_seg + + ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.") + + .flash.text : + { + _stext = .; + _instruction_reserved_start = ABSOLUTE(.); + _text_start = ABSOLUTE(.); + + *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*) + *(.wifi0iram .wifi0iram.*) + *(.wifiorslpiram .wifiorslpiram.*) + *(.wifirxiram .wifirxiram.*) + *(.wifislpiram .wifislpiram.*) + *(.wifislprxiram .wifislprxiram.*) + *libesp_event.a:default_event_loop.*(.literal.esp_event_handler_instance_register .literal.esp_event_handler_instance_unregister .literal.esp_event_handler_register .literal.esp_event_handler_unregister .literal.esp_event_loop_create_default .literal.esp_event_loop_delete_default .literal.esp_event_post .literal.esp_event_send_to_default_loop .text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop) + *libesp_event.a:esp_event.*(.literal.base_node_add_handler .literal.esp_event_handler_instance_register_with .literal.esp_event_handler_instance_unregister_with .literal.esp_event_handler_register_with .literal.esp_event_handler_register_with_internal .literal.esp_event_handler_unregister_with .literal.esp_event_handler_unregister_with_internal .literal.esp_event_loop_create .literal.esp_event_loop_delete .literal.esp_event_loop_run .literal.esp_event_loop_run_task .literal.esp_event_post_to .literal.handler_instances_add .literal.handler_instances_remove .literal.handler_instances_remove_all$isra$1 .literal.loop_node_add_handler .text .text.base_node_add_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all$isra$1 .text.loop_node_add_handler) + *libesp_hw_support.a:rtc_init.*(.literal.rtc_init .literal.rtc_vddsdio_get_config .text .text.rtc_init .text.rtc_vddsdio_get_config) + *libesp_system.a:esp_system.*(.literal.esp_get_free_heap_size .literal.esp_get_free_internal_heap_size .literal.esp_get_idf_version .literal.esp_get_minimum_free_heap_size .literal.esp_register_shutdown_handler .literal.esp_unregister_shutdown_handler .text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler) + *libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app) + *libfreertos.a:port.*(.literal.esp_startup_start_app_other_cores .text.esp_startup_start_app_other_cores) + *libfreertos.a:port_common.*(.literal.main_task .text.main_task) + *liblog.a:log.*(.literal.esp_log_level_get .literal.esp_log_level_set .literal.esp_log_set_vprintf .literal.esp_log_writev .literal.heap_bubble_down .literal.s_log_level_get_and_unlock .text .text.esp_log_level_get .text.esp_log_level_set .text.esp_log_set_vprintf .text.esp_log_writev .text.heap_bubble_down .text.s_log_level_get_and_unlock) + *liblog.a:log_freertos.*(.literal.esp_log_system_timestamp .text .text.esp_log_system_timestamp) + + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + + /** CPU will try to prefetch up to 16 bytes of + * of instructions. This means that any configuration (e.g. MMU, PMS) must allow + * safe access to up to 16 bytes after the last real instruction, add + * dummy bytes to ensure this + */ + . += _esp_flash_mmap_prefetch_pad_size; + + _text_end = ABSOLUTE(.); + _instruction_reserved_end = ABSOLUTE(.); + _etext = .; + + /** + * Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + _flash_cache_start = ABSOLUTE(0); + } > default_code_seg + + /** + * This dummy section represents the .flash.text section but in default_rodata_seg. + * Thus, it must have its alignement and (at least) its size. + */ + .flash_rodata_dummy (NOLOAD): + { + _flash_rodata_dummy_start = .; + /* Start at the same alignement constraint than .flash.text */ + . = ALIGN(ALIGNOF(.flash.text)); + /* Create an empty gap as big as .flash.text section */ + . = . + SIZEOF(.flash.text); + /* Prepare the alignement of the section above. Few bytes (0x20) must be + * added for the mapping header. */ + . = ALIGN(0x10000) + 0x20; + _rodata_reserved_start = .; + } > default_rodata_seg + + .flash.appdesc : ALIGN(0x10) + { + _rodata_start = ABSOLUTE(.); + + *(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */ + *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */ + + /* Create an empty gap within this section. Thanks to this, the end of this + * section will match .flah.rodata's begin address. Thus, both sections + * will be merged when creating the final bin image. */ + . = ALIGN(ALIGNOF(.flash.rodata)); + } >default_rodata_seg + + .flash.rodata : ALIGN(0x10) + { + _flash_rodata_start = ABSOLUTE(.); + + *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata.*) + *(.rodata_wlog_error .rodata_wlog_error.*) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + . = (. + 3) & ~ 3; + __eh_frame = ABSOLUTE(.); + KEEP(*(.eh_frame)) + . = (. + 7) & ~ 3; + /* C++ constructor and destructor tables */ + /* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */ + __init_array_start = ABSOLUTE(.); + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ + soc_reserved_memory_region_start = ABSOLUTE(.); + KEEP (*(.reserved_memory_address)) + soc_reserved_memory_region_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _thread_local_start = ABSOLUTE(.); + *(.tdata) + *(.tdata.*) + *(.tbss) + *(.tbss.*) + _thread_local_end = ABSOLUTE(.); + _rodata_reserved_end = ABSOLUTE(.); + . = ALIGN(4); + } > default_rodata_seg + + _flash_rodata_align = ALIGNOF(.flash.rodata); + + .flash.rodata_noload (NOLOAD) : + { + . = ALIGN (4); + *(.rodata_wlog_debug .rodata_wlog_debug.*) + *(.rodata_wlog_info .rodata_wlog_info.*) + *(.rodata_wlog_verbose .rodata_wlog_verbose.*) + *(.rodata_wlog_warning .rodata_wlog_warning.*) + } > default_rodata_seg + + /* Marks the end of IRAM code segment */ + .iram0.text_end (NOLOAD) : + { + /* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */ + . += _esp_memprot_prefetch_pad_size; + . = ALIGN(_esp_memprot_align_size); + /* iram_end_test section exists for use by memprot unit tests only */ + *(.iram_end_test) + _iram_text_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.data : + { + . = ALIGN(4); + _iram_data_start = ABSOLUTE(.); + + *(.iram.data .iram.data.*) + _coredump_iram_start = ABSOLUTE(.); + *(.iram.data.coredump .iram.data.coredump.*) + _coredump_iram_end = ABSOLUTE(.); + + _iram_data_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.bss (NOLOAD) : + { + . = ALIGN(4); + _iram_bss_start = ABSOLUTE(.); + + *(.iram.bss .iram.bss.*) + + _iram_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _iram_end = ABSOLUTE(.); + } > iram0_0_seg + + /* Marks the end of data, bss and possibly rodata */ + .dram0.heap_start (NOLOAD) : + { + . = ALIGN (8); + _heap_start = ABSOLUTE(.); + } > dram0_0_seg +} + +ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), + "IRAM0 segment data does not fit.") + +ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") diff --git a/tools/sdk/esp32s3/lib/libbootloader_support.a b/tools/sdk/esp32s3/qspi_opi/libbootloader_support.a similarity index 100% rename from tools/sdk/esp32s3/lib/libbootloader_support.a rename to tools/sdk/esp32s3/qspi_opi/libbootloader_support.a diff --git a/tools/sdk/esp32s3/qspi_opi/libesp_hw_support.a b/tools/sdk/esp32s3/qspi_opi/libesp_hw_support.a new file mode 100644 index 000000000..98669d458 Binary files /dev/null and b/tools/sdk/esp32s3/qspi_opi/libesp_hw_support.a differ diff --git a/tools/sdk/esp32s3/lib/opiram/libesp_system.a b/tools/sdk/esp32s3/qspi_opi/libesp_system.a similarity index 100% rename from tools/sdk/esp32s3/lib/opiram/libesp_system.a rename to tools/sdk/esp32s3/qspi_opi/libesp_system.a diff --git a/tools/sdk/esp32s3/qspi_opi/libfreertos.a b/tools/sdk/esp32s3/qspi_opi/libfreertos.a new file mode 100644 index 000000000..4e7a1aca0 Binary files /dev/null and b/tools/sdk/esp32s3/qspi_opi/libfreertos.a differ diff --git a/tools/sdk/esp32s3/lib/opiram/libspi_flash.a b/tools/sdk/esp32s3/qspi_opi/libspi_flash.a similarity index 100% rename from tools/sdk/esp32s3/lib/opiram/libspi_flash.a rename to tools/sdk/esp32s3/qspi_opi/libspi_flash.a diff --git a/tools/sdk/esp32s3/ld/sections.ld b/tools/sdk/esp32s3/qspi_opi/sections.ld similarity index 100% rename from tools/sdk/esp32s3/ld/sections.ld rename to tools/sdk/esp32s3/qspi_opi/sections.ld diff --git a/tools/sdk/esp32s3/qspi_qspi/libbootloader_support.a b/tools/sdk/esp32s3/qspi_qspi/libbootloader_support.a new file mode 100644 index 000000000..5c337e54a Binary files /dev/null and b/tools/sdk/esp32s3/qspi_qspi/libbootloader_support.a differ diff --git a/tools/sdk/esp32s3/lib/spiram/libesp_hw_support.a b/tools/sdk/esp32s3/qspi_qspi/libesp_hw_support.a similarity index 100% rename from tools/sdk/esp32s3/lib/spiram/libesp_hw_support.a rename to tools/sdk/esp32s3/qspi_qspi/libesp_hw_support.a diff --git a/tools/sdk/esp32s3/lib/spiram/libesp_system.a b/tools/sdk/esp32s3/qspi_qspi/libesp_system.a similarity index 100% rename from tools/sdk/esp32s3/lib/spiram/libesp_system.a rename to tools/sdk/esp32s3/qspi_qspi/libesp_system.a diff --git a/tools/sdk/esp32s3/qspi_qspi/libfreertos.a b/tools/sdk/esp32s3/qspi_qspi/libfreertos.a new file mode 100644 index 000000000..4e7a1aca0 Binary files /dev/null and b/tools/sdk/esp32s3/qspi_qspi/libfreertos.a differ diff --git a/tools/sdk/esp32s3/lib/spiram/libspi_flash.a b/tools/sdk/esp32s3/qspi_qspi/libspi_flash.a similarity index 100% rename from tools/sdk/esp32s3/lib/spiram/libspi_flash.a rename to tools/sdk/esp32s3/qspi_qspi/libspi_flash.a diff --git a/tools/sdk/esp32s3/qspi_qspi/sections.ld b/tools/sdk/esp32s3/qspi_qspi/sections.ld new file mode 100644 index 000000000..a5ce63335 --- /dev/null +++ b/tools/sdk/esp32s3/qspi_qspi/sections.ld @@ -0,0 +1,592 @@ +/* Automatically generated file; DO NOT EDIT */ +/* Espressif IoT Development Framework Linker Script */ +/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp_system/ld/esp32s3/sections.ld.in */ + +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Default entry point */ +ENTRY(call_start_cpu0); + +_diram_i_start = 0x40378000; + +SECTIONS +{ + /** + * RTC fast memory holds RTC wake stub code, + * including from any source file named rtc_wake_stub*.c + */ + .rtc.text : + { + . = ALIGN(4); + _rtc_text_start = ABSOLUTE(.); + *(.rtc.entry.text) + + *(.rtc.literal .rtc.text .rtc.text.*) + + *rtc_wake_stub*.*(.literal .text .literal.* .text.*) + _rtc_text_end = ABSOLUTE(.); + } > rtc_iram_seg + + /** + * This section is required to skip rtc.text area because rtc_iram_seg and + * rtc_data_seg are reflect the same address space on different buses. + */ + .rtc.dummy : + { + _rtc_dummy_start = ABSOLUTE(.); + _rtc_fast_start = ABSOLUTE(.); + . = SIZEOF(.rtc.text); + _rtc_dummy_end = ABSOLUTE(.); + } > rtc_data_seg + + /** + * This section located in RTC FAST Memory area. + * It holds data marked with RTC_FAST_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_fast : + { + . = ALIGN(4); + _rtc_force_fast_start = ABSOLUTE(.); + + _coredump_rtc_fast_start = ABSOLUTE(.); + *(.rtc.fast.coredump .rtc.fast.coredump.*) + _coredump_rtc_fast_end = ABSOLUTE(.); + + *(.rtc.force_fast .rtc.force_fast.*) + . = ALIGN(4) ; + _rtc_force_fast_end = ABSOLUTE(.); + } > rtc_data_seg + + /** + * RTC data section holds RTC wake stub + * data/rodata, including from any source file + * named rtc_wake_stub*.c and the data marked with + * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. + * The memory location of the data is dependent on + * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option. + */ + .rtc.data : + { + _rtc_data_start = ABSOLUTE(.); + + _coredump_rtc_start = ABSOLUTE(.); + *(.rtc.coredump .rtc.coredump.*) + _coredump_rtc_end = ABSOLUTE(.); + *(.rtc.data .rtc.data.*) + *(.rtc.rodata .rtc.rodata.*) + + *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*) + _rtc_data_end = ABSOLUTE(.); + } > rtc_data_location + + /* RTC bss, from any source file named rtc_wake_stub*.c */ + .rtc.bss (NOLOAD) : + { + _rtc_bss_start = ABSOLUTE(.); + *rtc_wake_stub*.*(.bss .bss.*) + *rtc_wake_stub*.*(COMMON) + + *(.rtc.bss) + + _rtc_bss_end = ABSOLUTE(.); + } > rtc_data_location + + /** + * This section holds data that should not be initialized at power up + * and will be retained during deep sleep. + * User data marked with RTC_NOINIT_ATTR will be placed + * into this section. See the file "esp_attr.h" for more information. + * The memory location of the data is dependent on CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option. + */ + .rtc_noinit (NOLOAD): + { + . = ALIGN(4); + _rtc_noinit_start = ABSOLUTE(.); + *(.rtc_noinit .rtc_noinit.*) + . = ALIGN(4) ; + _rtc_noinit_end = ABSOLUTE(.); + } > rtc_data_location + + /** + * This section located in RTC SLOW Memory area. + * It holds data marked with RTC_SLOW_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_slow : + { + . = ALIGN(4); + _rtc_force_slow_start = ABSOLUTE(.); + *(.rtc.force_slow .rtc.force_slow.*) + . = ALIGN(4) ; + _rtc_force_slow_end = ABSOLUTE(.); + } > rtc_slow_seg + + /* Get size of rtc slow data based on rtc_data_location alias */ + _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_slow_end - _rtc_data_start) + : (_rtc_force_slow_end - _rtc_force_slow_start); + + _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_fast_end - _rtc_fast_start) + : (_rtc_noinit_end - _rtc_fast_start); + + ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), + "RTC_SLOW segment data does not fit.") + + ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), + "RTC_FAST segment data does not fit.") + + /* Send .iram0 code to iram */ + .iram0.vectors : + { + _iram_start = ABSOLUTE(.); + /* Vectors go to IRAM */ + _vector_table = ABSOLUTE(.); + . = 0x0; + KEEP(*(.WindowVectors.text)); + . = 0x180; + KEEP(*(.Level2InterruptVector.text)); + . = 0x1c0; + KEEP(*(.Level3InterruptVector.text)); + . = 0x200; + KEEP(*(.Level4InterruptVector.text)); + . = 0x240; + KEEP(*(.Level5InterruptVector.text)); + . = 0x280; + KEEP(*(.DebugExceptionVector.text)); + . = 0x2c0; + KEEP(*(.NMIExceptionVector.text)); + . = 0x300; + KEEP(*(.KernelExceptionVector.text)); + . = 0x340; + KEEP(*(.UserExceptionVector.text)); + . = 0x3C0; + KEEP(*(.DoubleExceptionVector.text)); + . = 0x400; + _invalid_pc_placeholder = ABSOLUTE(.); + *(.*Vector.literal) + + *(.UserEnter.literal); + *(.UserEnter.text); + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + _init_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.text : + { + /* Code marked as running out of IRAM */ + _iram_text_start = ABSOLUTE(.); + + *(.iram1 .iram1.*) + *libapp_trace.a:app_trace.*(.literal .literal.* .text .text.*) + *libapp_trace.a:app_trace_util.*(.literal .literal.* .text .text.*) + *libesp_event.a:default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) + *libesp_event.a:esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) + *libesp_hw_support.a:cpu_util.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_clk.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) + *libesp_hw_support.a:rtc_pm.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_sleep.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_time.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:rtc_wdt.*(.literal .literal.* .text .text.*) + *libesp_hw_support.a:spiram_psram.*(.literal .literal.* .text .text.*) + *libesp_ringbuf.a:(.literal .literal.* .text .text.*) + *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*) + *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort) + *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*) + *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*) + *libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortExitCritical .literal.vPortExitCriticalCompliance .literal.vPortReleaseTaskMPUSettings .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortEnterCriticalTimeout .literal.xPortEnterCriticalTimeoutCompliance .literal.xPortInIsrContext .literal.xPortStartScheduler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortExitCritical .text.vPortExitCriticalCompliance .text.vPortReleaseTaskMPUSettings .text.vPortSetStackWatchpoint .text.vPortStoreTaskMPUSettings .text.vPortYieldOtherCore .text.xPortEnterCriticalTimeout .text.xPortEnterCriticalTimeoutCompliance .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler) + *libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .literal.vApplicationGetIdleTaskMemory .literal.vApplicationGetTimerTaskMemory .literal.xPortCheckValidTCBMem .literal.xPortcheckValidStackMem .text .text.esp_startup_start_app_common .text.vApplicationGetIdleTaskMemory .text.vApplicationGetTimerTaskMemory .text.xPortCheckValidTCBMem .text.xPortcheckValidStackMem) + *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) + *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) + *libgcov.a:(.literal .literal.* .text .text.*) + *libhal.a:cpu_hal.*(.literal .literal.* .text .text.*) + *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:soc_hal.*(.literal .literal.* .text .text.*) + *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) + *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*) + *libhal.a:systimer_hal.*(.literal .literal.* .text .text.*) + *libhal.a:wdt_hal_iram.*(.literal .literal.* .text .text.*) + *libheap.a:heap_tlsf.*(.literal .literal.* .text .text.*) + *libheap.a:multi_heap.*(.literal .literal.* .text .text.*) + *libheap.a:multi_heap_poisoning.*(.literal .literal.* .text .text.*) + *liblog.a:log.*(.literal.esp_log_write .text.esp_log_write) + *liblog.a:log_freertos.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp) + *liblog.a:log_freertos.*(.literal.esp_log_impl_lock .text.esp_log_impl_lock) + *liblog.a:log_freertos.*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout) + *liblog.a:log_freertos.*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock) + *liblog.a:log_freertos.*(.literal.esp_log_timestamp .text.esp_log_timestamp) + *libnewlib.a:abort.*(.literal .literal.* .text .text.*) + *libnewlib.a:assert.*(.literal .literal.* .text .text.*) + *libnewlib.a:heap.*(.literal .literal.* .text .text.*) + *libnewlib.a:stdatomic.*(.literal .literal.* .text .text.*) + *librtc.a:(.literal .literal.* .text .text.*) + *libsoc.a:lldesc.*(.literal .literal.* .text .text.*) + *libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_flash_timing_tuning.*(.literal .literal.* .text .text.*) + *libspi_flash.a:spi_timing_config.*(.literal .literal.* .text .text.*) + *libxt_hal.a:(.literal .literal.* .text .text.*) + *libxtensa.a:eri.*(.literal .literal.* .text .text.*) + *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*) + + } > iram0_0_seg + + /** + * This section is required to skip .iram0.text area because iram0_0_seg and + * dram0_0_seg reflect the same address space on different buses. + */ + .dram0.dummy (NOLOAD): + { + . = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0); + } > dram0_0_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + + _esp_system_init_fn_array_start = ABSOLUTE(.); + KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*))) + _esp_system_init_fn_array_end = ABSOLUTE(.); + + *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*) + *(.dram1 .dram1.*) + _coredump_dram_start = ABSOLUTE(.); + *(.dram1.coredump .dram1.coredump.*) + _coredump_dram_end = ABSOLUTE(.); + *libapp_trace.a:app_trace.*(.rodata .rodata.*) + *libapp_trace.a:app_trace_util.*(.rodata .rodata.*) + _bt_data_start = ABSOLUTE(.); + *libbt.a:(.data .data.*) + . = ALIGN(4); + _bt_data_end = ABSOLUTE(.); + _btdm_data_start = ABSOLUTE(.); + *libbtdm_app.a:(.data .data.*) + . = ALIGN(4); + _btdm_data_end = ABSOLUTE(.); + *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*) + *libesp_hw_support.a:spiram_psram.*(.rodata .rodata.*) + *libesp_system.a:esp_err.*(.rodata .rodata.*) + *libesp_system.a:ubsan.*(.rodata .rodata.*) + *libgcc.a:_divsf3.*(.rodata .rodata.*) + *libgcov.a:(.rodata .rodata.*) + *libhal.a:cpu_hal.*(.rodata .rodata.*) + *libhal.a:i2c_hal_iram.*(.rodata .rodata.*) + *libhal.a:ledc_hal_iram.*(.rodata .rodata.*) + *libhal.a:soc_hal.*(.rodata .rodata.*) + *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*) + *libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*) + *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*) + *libhal.a:spi_hal_iram.*(.rodata .rodata.*) + *libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*) + *libhal.a:systimer_hal.*(.rodata .rodata.*) + *libhal.a:wdt_hal_iram.*(.rodata .rodata.*) + *libheap.a:heap_tlsf.*(.rodata .rodata.*) + *libheap.a:multi_heap.*(.rodata .rodata.*) + *libheap.a:multi_heap_poisoning.*(.rodata .rodata.*) + *libnewlib.a:abort.*(.rodata .rodata.*) + *libnewlib.a:assert.*(.rodata .rodata.*) + *libnewlib.a:heap.*(.rodata .rodata.*) + *libnewlib.a:stdatomic.*(.rodata .rodata.*) + _nimble_data_start = ABSOLUTE(.); + *libnimble.a:(.data .data.*) + . = ALIGN(4); + _nimble_data_end = ABSOLUTE(.); + *libphy.a:(.rodata .rodata.*) + *libsoc.a:lldesc.*(.rodata .rodata.*) + *libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_mxic_opi.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*) + *libspi_flash.a:spi_flash_timing_tuning.*(.rodata .rodata.*) + *libspi_flash.a:spi_timing_config.*(.rodata .rodata.*) + + _data_end = ABSOLUTE(.); + . = ALIGN(4); + } > dram0_0_seg + + /** + * This section holds data that should not be initialized at power up. + * The section located in Internal SRAM memory region. The macro _NOINIT + * can be used as attribute to place data into this section. + * See the "esp_attr.h" file for more information. + */ + .noinit (NOLOAD): + { + . = ALIGN(4); + _noinit_start = ABSOLUTE(.); + *(.noinit .noinit.*) + . = ALIGN(4) ; + _noinit_end = ABSOLUTE(.); + } > dram0_0_seg + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.ext_ram.bss*) + + *(.bss .bss.*) + *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) + *(.ext_ram.bss .ext_ram.bss.*) + *(COMMON) + _bt_bss_start = ABSOLUTE(.); + *libbt.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _bt_bss_end = ABSOLUTE(.); + _btdm_bss_start = ABSOLUTE(.); + *libbtdm_app.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _btdm_bss_end = ABSOLUTE(.); + _nimble_bss_start = ABSOLUTE(.); + *libnimble.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _nimble_bss_end = ABSOLUTE(.); + + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.share.mem) + *(.gnu.linkonce.b.*) + + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } > dram0_0_seg + + ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.") + + .flash.text : + { + _stext = .; + _instruction_reserved_start = ABSOLUTE(.); + _text_start = ABSOLUTE(.); + + *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*) + *(.wifi0iram .wifi0iram.*) + *(.wifiorslpiram .wifiorslpiram.*) + *(.wifirxiram .wifirxiram.*) + *(.wifislpiram .wifislpiram.*) + *(.wifislprxiram .wifislprxiram.*) + *libesp_event.a:default_event_loop.*(.literal.esp_event_handler_instance_register .literal.esp_event_handler_instance_unregister .literal.esp_event_handler_register .literal.esp_event_handler_unregister .literal.esp_event_loop_create_default .literal.esp_event_loop_delete_default .literal.esp_event_post .literal.esp_event_send_to_default_loop .text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop) + *libesp_event.a:esp_event.*(.literal.base_node_add_handler .literal.esp_event_handler_instance_register_with .literal.esp_event_handler_instance_unregister_with .literal.esp_event_handler_register_with .literal.esp_event_handler_register_with_internal .literal.esp_event_handler_unregister_with .literal.esp_event_handler_unregister_with_internal .literal.esp_event_loop_create .literal.esp_event_loop_delete .literal.esp_event_loop_run .literal.esp_event_loop_run_task .literal.esp_event_post_to .literal.handler_instances_add .literal.handler_instances_remove .literal.handler_instances_remove_all$isra$1 .literal.loop_node_add_handler .text .text.base_node_add_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all$isra$1 .text.loop_node_add_handler) + *libesp_hw_support.a:rtc_init.*(.literal.rtc_init .literal.rtc_vddsdio_get_config .text .text.rtc_init .text.rtc_vddsdio_get_config) + *libesp_system.a:esp_system.*(.literal.esp_get_free_heap_size .literal.esp_get_free_internal_heap_size .literal.esp_get_idf_version .literal.esp_get_minimum_free_heap_size .literal.esp_register_shutdown_handler .literal.esp_unregister_shutdown_handler .text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler) + *libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app) + *libfreertos.a:port.*(.literal.esp_startup_start_app_other_cores .text.esp_startup_start_app_other_cores) + *libfreertos.a:port_common.*(.literal.main_task .text.main_task) + *liblog.a:log.*(.literal.esp_log_level_get .literal.esp_log_level_set .literal.esp_log_set_vprintf .literal.esp_log_writev .literal.heap_bubble_down .literal.s_log_level_get_and_unlock .text .text.esp_log_level_get .text.esp_log_level_set .text.esp_log_set_vprintf .text.esp_log_writev .text.heap_bubble_down .text.s_log_level_get_and_unlock) + *liblog.a:log_freertos.*(.literal.esp_log_system_timestamp .text .text.esp_log_system_timestamp) + + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + + /** CPU will try to prefetch up to 16 bytes of + * of instructions. This means that any configuration (e.g. MMU, PMS) must allow + * safe access to up to 16 bytes after the last real instruction, add + * dummy bytes to ensure this + */ + . += _esp_flash_mmap_prefetch_pad_size; + + _text_end = ABSOLUTE(.); + _instruction_reserved_end = ABSOLUTE(.); + _etext = .; + + /** + * Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + _flash_cache_start = ABSOLUTE(0); + } > default_code_seg + + /** + * This dummy section represents the .flash.text section but in default_rodata_seg. + * Thus, it must have its alignement and (at least) its size. + */ + .flash_rodata_dummy (NOLOAD): + { + _flash_rodata_dummy_start = .; + /* Start at the same alignement constraint than .flash.text */ + . = ALIGN(ALIGNOF(.flash.text)); + /* Create an empty gap as big as .flash.text section */ + . = . + SIZEOF(.flash.text); + /* Prepare the alignement of the section above. Few bytes (0x20) must be + * added for the mapping header. */ + . = ALIGN(0x10000) + 0x20; + _rodata_reserved_start = .; + } > default_rodata_seg + + .flash.appdesc : ALIGN(0x10) + { + _rodata_start = ABSOLUTE(.); + + *(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */ + *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */ + + /* Create an empty gap within this section. Thanks to this, the end of this + * section will match .flah.rodata's begin address. Thus, both sections + * will be merged when creating the final bin image. */ + . = ALIGN(ALIGNOF(.flash.rodata)); + } >default_rodata_seg + + .flash.rodata : ALIGN(0x10) + { + _flash_rodata_start = ABSOLUTE(.); + + *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata.*) + *(.rodata_wlog_error .rodata_wlog_error.*) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + . = (. + 3) & ~ 3; + __eh_frame = ABSOLUTE(.); + KEEP(*(.eh_frame)) + . = (. + 7) & ~ 3; + /* C++ constructor and destructor tables */ + /* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */ + __init_array_start = ABSOLUTE(.); + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ + soc_reserved_memory_region_start = ABSOLUTE(.); + KEEP (*(.reserved_memory_address)) + soc_reserved_memory_region_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _thread_local_start = ABSOLUTE(.); + *(.tdata) + *(.tdata.*) + *(.tbss) + *(.tbss.*) + _thread_local_end = ABSOLUTE(.); + _rodata_reserved_end = ABSOLUTE(.); + . = ALIGN(4); + } > default_rodata_seg + + _flash_rodata_align = ALIGNOF(.flash.rodata); + + .flash.rodata_noload (NOLOAD) : + { + . = ALIGN (4); + *(.rodata_wlog_debug .rodata_wlog_debug.*) + *(.rodata_wlog_info .rodata_wlog_info.*) + *(.rodata_wlog_verbose .rodata_wlog_verbose.*) + *(.rodata_wlog_warning .rodata_wlog_warning.*) + } > default_rodata_seg + + /* Marks the end of IRAM code segment */ + .iram0.text_end (NOLOAD) : + { + /* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */ + . += _esp_memprot_prefetch_pad_size; + . = ALIGN(_esp_memprot_align_size); + /* iram_end_test section exists for use by memprot unit tests only */ + *(.iram_end_test) + _iram_text_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.data : + { + . = ALIGN(4); + _iram_data_start = ABSOLUTE(.); + + *(.iram.data .iram.data.*) + _coredump_iram_start = ABSOLUTE(.); + *(.iram.data.coredump .iram.data.coredump.*) + _coredump_iram_end = ABSOLUTE(.); + + _iram_data_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.bss (NOLOAD) : + { + . = ALIGN(4); + _iram_bss_start = ABSOLUTE(.); + + *(.iram.bss .iram.bss.*) + + _iram_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _iram_end = ABSOLUTE(.); + } > iram0_0_seg + + /* Marks the end of data, bss and possibly rodata */ + .dram0.heap_start (NOLOAD) : + { + . = ALIGN (8); + _heap_start = ABSOLUTE(.); + } > dram0_0_seg +} + +ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), + "IRAM0 segment data does not fit.") + +ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") diff --git a/variants/esp32s3camlcd/pins_arduino.h b/variants/esp32s3camlcd/pins_arduino.h new file mode 100644 index 000000000..3f922c7b2 --- /dev/null +++ b/variants/esp32s3camlcd/pins_arduino.h @@ -0,0 +1,71 @@ +#ifndef Pins_Arduino_h +#define Pins_Arduino_h + +#include + +#define USB_VID 0x303a +#define USB_PID 0x1001 + +#define EXTERNAL_NUM_INTERRUPTS 46 +#define NUM_DIGITAL_PINS 48 +#define NUM_ANALOG_INPUTS 20 + +#define analogInputToDigitalPin(p) (((p)<20)?(esp32_adc2gpio[(p)]):-1) +#define digitalPinToInterrupt(p) (((p)<48)?(p):-1) +#define digitalPinHasPWM(p) (p < 46) + +static const uint8_t TX = 43; +static const uint8_t RX = 44; + +static const uint8_t SDA = 17; +static const uint8_t SCL = 18; + +static const uint8_t SS = 10; +static const uint8_t MOSI = 11; +static const uint8_t MISO = 13; +static const uint8_t SCK = 12; + +// Wire1 for Cam and TS +#define I2C_SDA 17 +#define I2C_SCL 18 + +#define PWDN_GPIO_NUM -1 +#define RESET_GPIO_NUM -1 +#define XCLK_GPIO_NUM 40 +#define SIOD_GPIO_NUM 17 +#define SIOC_GPIO_NUM 18 +#define Y9_GPIO_NUM 39 +#define Y8_GPIO_NUM 41 +#define Y7_GPIO_NUM 42 +#define Y6_GPIO_NUM 12 +#define Y5_GPIO_NUM 3 +#define Y4_GPIO_NUM 14 +#define Y3_GPIO_NUM 47 +#define Y2_GPIO_NUM 13 +#define VSYNC_GPIO_NUM 21 +#define HREF_GPIO_NUM 38 +#define PCLK_GPIO_NUM 11 + +#define TFT_FREQ 40000000 +#define TFT_BITS 8 +#define TFT_WIDTH 480 +#define TFT_HEIGHT 320 +#define TFT_WR 4 +#define TFT_DC 2 +#define TFT_D0 45 +#define TFT_D1 16 +#define TFT_D2 15 +#define TFT_D3 10 +#define TFT_D4 8 +#define TFT_D5 7 +#define TFT_D6 6 +#define TFT_D7 5 + +#define SDMMC_CMD 20 +#define SDMMC_CLK 9 +#define SDMMC_DATA 19 + +#define MIC_CLK 0 +#define MIC_DATA 1 + +#endif /* Pins_Arduino_h */