2cb6fbccdb
* feat(i2c): Add method to access the I2C bus handle * feat(wire): Add access method to get the I2C bus number * ci(pre-commit): Apply automatic fixes --------- Co-authored-by: pre-commit-ci-lite[bot] <117423508+pre-commit-ci-lite[bot]@users.noreply.github.com>
452 lines
13 KiB
C
452 lines
13 KiB
C
// Copyright 2015-2025 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "esp32-hal-i2c.h"
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#if SOC_I2C_SUPPORTED
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#include "esp_idf_version.h"
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#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 4, 0)
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#include "esp32-hal.h"
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#if !CONFIG_DISABLE_HAL_LOCKS
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#endif
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#include "esp_attr.h"
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#include "esp_system.h"
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#include "soc/soc_caps.h"
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#include "driver/i2c_master.h"
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#include "esp32-hal-periman.h"
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typedef volatile struct {
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bool initialized;
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uint32_t frequency;
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#if !CONFIG_DISABLE_HAL_LOCKS
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SemaphoreHandle_t lock;
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#endif
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int8_t scl;
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int8_t sda;
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i2c_master_bus_handle_t bus_handle;
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i2c_master_dev_handle_t dev_handles[128];
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} i2c_bus_t;
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static i2c_bus_t bus[SOC_I2C_NUM];
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static bool i2cDetachBus(void *bus_i2c_num) {
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uint8_t i2c_num = (int)bus_i2c_num - 1;
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if (!bus[i2c_num].initialized) {
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return true;
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}
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esp_err_t err = i2cDeinit(i2c_num);
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if (err != ESP_OK) {
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log_e("i2cDeinit failed with error: %d", err);
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return false;
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}
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return true;
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}
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void *i2cBusHandle(uint8_t i2c_num) {
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if (i2c_num >= SOC_I2C_NUM) {
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return NULL;
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}
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return bus[i2c_num].bus_handle;
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}
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bool i2cIsInit(uint8_t i2c_num) {
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if (i2c_num >= SOC_I2C_NUM) {
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return false;
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}
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return bus[i2c_num].initialized;
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}
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esp_err_t i2cInit(uint8_t i2c_num, int8_t sda, int8_t scl, uint32_t frequency) {
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esp_err_t ret = ESP_OK;
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if (i2c_num >= SOC_I2C_NUM) {
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return ESP_ERR_INVALID_ARG;
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}
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#if !CONFIG_DISABLE_HAL_LOCKS
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if (bus[i2c_num].lock == NULL) {
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bus[i2c_num].lock = xSemaphoreCreateMutex();
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if (bus[i2c_num].lock == NULL) {
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log_e("xSemaphoreCreateMutex failed");
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return ESP_ERR_NO_MEM;
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}
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}
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//acquire lock
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if (xSemaphoreTake(bus[i2c_num].lock, portMAX_DELAY) != pdTRUE) {
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log_e("could not acquire lock");
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return ESP_FAIL;
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}
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#endif
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if (bus[i2c_num].initialized) {
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log_e("bus is already initialized");
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ret = ESP_FAIL;
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goto init_fail;
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}
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if (!frequency) {
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frequency = 100000UL;
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} else if (frequency > 1000000UL) {
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frequency = 1000000UL;
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}
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perimanSetBusDeinit(ESP32_BUS_TYPE_I2C_MASTER_SDA, i2cDetachBus);
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perimanSetBusDeinit(ESP32_BUS_TYPE_I2C_MASTER_SCL, i2cDetachBus);
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if (!perimanClearPinBus(sda) || !perimanClearPinBus(scl)) {
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ret = ESP_FAIL;
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goto init_fail;
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}
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log_i("Initializing I2C Master: num=%u sda=%d scl=%d freq=%lu", i2c_num, sda, scl, frequency);
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i2c_master_bus_handle_t bus_handle = NULL;
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i2c_master_bus_config_t bus_config;
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memset(&bus_config, 0, sizeof(i2c_master_bus_config_t));
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bus_config.i2c_port = (i2c_port_num_t)i2c_num;
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bus_config.sda_io_num = (gpio_num_t)sda;
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bus_config.scl_io_num = (gpio_num_t)scl;
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#if SOC_LP_I2C_SUPPORTED
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if (i2c_num >= SOC_HP_I2C_NUM) {
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bus_config.lp_source_clk = LP_I2C_SCLK_DEFAULT;
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} else
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#endif
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{
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bus_config.clk_source = I2C_CLK_SRC_DEFAULT;
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}
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bus_config.glitch_ignore_cnt = 7;
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bus_config.intr_priority = 0; // auto
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bus_config.trans_queue_depth = 0; // only valid in asynchronous transaction, which Arduino does not use
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bus_config.flags.enable_internal_pullup = 1;
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#if SOC_I2C_SUPPORT_SLEEP_RETENTION
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bus_config.flags.allow_pd = 1; // backup/restore the I2C registers before/after entering/exist sleep mode
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#endif
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ret = i2c_new_master_bus(&bus_config, &bus_handle);
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if (ret != ESP_OK) {
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log_e("i2c_new_master_bus failed: [%d] %s", ret, esp_err_to_name(ret));
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} else {
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bus[i2c_num].initialized = true;
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bus[i2c_num].frequency = frequency;
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bus[i2c_num].scl = scl;
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bus[i2c_num].sda = sda;
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bus[i2c_num].bus_handle = bus_handle;
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for (uint8_t i = 0; i < 128; i++) {
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bus[i2c_num].dev_handles[i] = NULL;
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}
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if (!perimanSetPinBus(sda, ESP32_BUS_TYPE_I2C_MASTER_SDA, (void *)(i2c_num + 1), i2c_num, -1)
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|| !perimanSetPinBus(scl, ESP32_BUS_TYPE_I2C_MASTER_SCL, (void *)(i2c_num + 1), i2c_num, -1)) {
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#if !CONFIG_DISABLE_HAL_LOCKS
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//release lock so that i2cDetachBus can execute i2cDeinit
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xSemaphoreGive(bus[i2c_num].lock);
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#endif
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i2cDetachBus((void *)(i2c_num + 1));
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return ESP_FAIL;
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}
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}
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init_fail:
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#if !CONFIG_DISABLE_HAL_LOCKS
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//release lock
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xSemaphoreGive(bus[i2c_num].lock);
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#endif
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return ret;
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}
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esp_err_t i2cDeinit(uint8_t i2c_num) {
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esp_err_t err = ESP_FAIL;
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if (i2c_num >= SOC_I2C_NUM) {
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return ESP_ERR_INVALID_ARG;
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}
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#if !CONFIG_DISABLE_HAL_LOCKS
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//acquire lock
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if (bus[i2c_num].lock == NULL || xSemaphoreTake(bus[i2c_num].lock, portMAX_DELAY) != pdTRUE) {
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log_e("could not acquire lock");
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return err;
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}
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#endif
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if (!bus[i2c_num].initialized) {
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log_e("bus is not initialized");
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} else {
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// remove devices from the bus
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for (uint8_t i = 0; i < 128; i++) {
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if (bus[i2c_num].dev_handles[i] != NULL) {
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err = i2c_master_bus_rm_device(bus[i2c_num].dev_handles[i]);
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bus[i2c_num].dev_handles[i] = NULL;
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if (err != ESP_OK) {
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log_e("i2c_master_bus_rm_device failed: [%d] %s", err, esp_err_to_name(err));
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}
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}
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}
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err = i2c_del_master_bus(bus[i2c_num].bus_handle);
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if (err != ESP_OK) {
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log_e("i2c_del_master_bus failed: [%d] %s", err, esp_err_to_name(err));
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} else {
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bus[i2c_num].initialized = false;
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perimanClearPinBus(bus[i2c_num].scl);
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perimanClearPinBus(bus[i2c_num].sda);
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bus[i2c_num].scl = -1;
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bus[i2c_num].sda = -1;
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bus[i2c_num].bus_handle = NULL;
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}
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}
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#if !CONFIG_DISABLE_HAL_LOCKS
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//release lock
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xSemaphoreGive(bus[i2c_num].lock);
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#endif
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return err;
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}
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static esp_err_t i2cAddDeviceIfNeeded(uint8_t i2c_num, uint16_t address) {
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esp_err_t ret = ESP_OK;
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if (bus[i2c_num].dev_handles[address] == NULL) {
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i2c_master_dev_handle_t dev_handle = NULL;
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i2c_device_config_t dev_config;
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memset(&dev_config, 0, sizeof(i2c_device_config_t));
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dev_config.dev_addr_length = I2C_ADDR_BIT_LEN_7; // Arduino supports only 7bit addresses
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dev_config.device_address = address;
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dev_config.scl_speed_hz = bus[i2c_num].frequency;
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dev_config.scl_wait_us = 0;
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dev_config.flags.disable_ack_check = 0;
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ret = i2c_master_bus_add_device(bus[i2c_num].bus_handle, &dev_config, &dev_handle);
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if (ret != ESP_OK) {
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log_e("i2c_master_bus_add_device failed: [%d] %s", ret, esp_err_to_name(ret));
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} else {
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bus[i2c_num].dev_handles[address] = dev_handle;
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log_v("added device: bus=%u addr=0x%x handle=0x%08x", i2c_num, address, dev_handle);
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}
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}
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return ret;
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}
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esp_err_t i2cWrite(uint8_t i2c_num, uint16_t address, const uint8_t *buff, size_t size, uint32_t timeOutMillis) {
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esp_err_t ret = ESP_FAIL;
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// i2c_cmd_handle_t cmd = NULL;
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if (i2c_num >= SOC_I2C_NUM) {
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return ESP_ERR_INVALID_ARG;
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}
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if (address >= 128) {
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log_e("Only 7bit I2C addresses are supported");
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return ESP_ERR_INVALID_ARG;
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}
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#if !CONFIG_DISABLE_HAL_LOCKS
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//acquire lock
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if (bus[i2c_num].lock == NULL || xSemaphoreTake(bus[i2c_num].lock, portMAX_DELAY) != pdTRUE) {
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log_e("could not acquire lock");
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return ret;
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}
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#endif
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if (!bus[i2c_num].initialized) {
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log_e("bus is not initialized");
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goto end;
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}
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if (size == 0) {
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// Probe device
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ret = i2c_master_probe(bus[i2c_num].bus_handle, address, timeOutMillis);
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if (ret != ESP_OK) {
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log_v("i2c_master_probe failed: [%d] %s", ret, esp_err_to_name(ret));
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}
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} else {
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// writing data to device
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ret = i2cAddDeviceIfNeeded(i2c_num, address);
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if (ret != ESP_OK) {
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goto end;
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}
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log_v("i2c_master_transmit: bus=%u addr=0x%x handle=0x%08x size=%u", i2c_num, address, bus[i2c_num].dev_handles[address], size);
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ret = i2c_master_transmit(bus[i2c_num].dev_handles[address], buff, size, timeOutMillis);
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if (ret != ESP_OK) {
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log_e("i2c_master_transmit failed: [%d] %s", ret, esp_err_to_name(ret));
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goto end;
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}
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// wait for transactions to finish (is it needed with sync transactions?)
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// ret = i2c_master_bus_wait_all_done(bus[i2c_num].bus_handle, timeOutMillis);
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// if (ret != ESP_OK) {
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// log_e("i2c_master_bus_wait_all_done failed: [%d] %s", ret, esp_err_to_name(ret));
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// goto end;
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// }
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}
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end:
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#if !CONFIG_DISABLE_HAL_LOCKS
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//release lock
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xSemaphoreGive(bus[i2c_num].lock);
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#endif
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return ret;
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}
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esp_err_t i2cRead(uint8_t i2c_num, uint16_t address, uint8_t *buff, size_t size, uint32_t timeOutMillis, size_t *readCount) {
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esp_err_t ret = ESP_FAIL;
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*readCount = 0;
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if (i2c_num >= SOC_I2C_NUM) {
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return ESP_ERR_INVALID_ARG;
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}
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#if !CONFIG_DISABLE_HAL_LOCKS
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//acquire lock
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if (bus[i2c_num].lock == NULL || xSemaphoreTake(bus[i2c_num].lock, portMAX_DELAY) != pdTRUE) {
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log_e("could not acquire lock");
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return ret;
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}
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#endif
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if (!bus[i2c_num].initialized) {
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log_e("bus is not initialized");
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goto end;
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}
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ret = i2cAddDeviceIfNeeded(i2c_num, address);
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if (ret != ESP_OK) {
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goto end;
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}
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log_v("i2c_master_receive: bus=%u addr=0x%x handle=0x%08x size=%u", i2c_num, address, bus[i2c_num].dev_handles[address], size);
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ret = i2c_master_receive(bus[i2c_num].dev_handles[address], buff, size, timeOutMillis);
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if (ret != ESP_OK) {
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log_e("i2c_master_receive failed: [%d] %s", ret, esp_err_to_name(ret));
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goto end;
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}
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// wait for transactions to finish (is it needed with sync transactions?)
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// ret = i2c_master_bus_wait_all_done(bus[i2c_num].bus_handle, timeOutMillis);
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// if (ret != ESP_OK) {
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// log_e("i2c_master_bus_wait_all_done failed: [%d] %s", ret, esp_err_to_name(ret));
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// goto end;
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// }
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*readCount = size;
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end:
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#if !CONFIG_DISABLE_HAL_LOCKS
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//release lock
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xSemaphoreGive(bus[i2c_num].lock);
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#endif
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return ret;
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}
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esp_err_t i2cWriteReadNonStop(
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uint8_t i2c_num, uint16_t address, const uint8_t *wbuff, size_t wsize, uint8_t *rbuff, size_t rsize, uint32_t timeOutMillis, size_t *readCount
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) {
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esp_err_t ret = ESP_FAIL;
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*readCount = 0;
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if (i2c_num >= SOC_I2C_NUM) {
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return ESP_ERR_INVALID_ARG;
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}
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#if !CONFIG_DISABLE_HAL_LOCKS
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//acquire lock
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if (bus[i2c_num].lock == NULL || xSemaphoreTake(bus[i2c_num].lock, portMAX_DELAY) != pdTRUE) {
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log_e("could not acquire lock");
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return ret;
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}
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#endif
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if (!bus[i2c_num].initialized) {
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log_e("bus is not initialized");
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goto end;
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}
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ret = i2cAddDeviceIfNeeded(i2c_num, address);
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if (ret != ESP_OK) {
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goto end;
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}
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log_v("i2c_master_transmit_receive: bus=%u addr=0x%x handle=0x%08x write=%u read=%u", i2c_num, address, bus[i2c_num].dev_handles[address], wsize, rsize);
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ret = i2c_master_transmit_receive(bus[i2c_num].dev_handles[address], wbuff, wsize, rbuff, rsize, timeOutMillis);
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if (ret != ESP_OK) {
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log_e("i2c_master_transmit_receive failed: [%d] %s", ret, esp_err_to_name(ret));
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goto end;
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}
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// wait for transactions to finish (is it needed with sync transactions?)
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// ret = i2c_master_bus_wait_all_done(bus[i2c_num].bus_handle, timeOutMillis);
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// if (ret != ESP_OK) {
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// log_e("i2c_master_bus_wait_all_done failed: [%d] %s", ret, esp_err_to_name(ret));
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// goto end;
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// }
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*readCount = rsize;
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end:
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#if !CONFIG_DISABLE_HAL_LOCKS
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//release lock
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xSemaphoreGive(bus[i2c_num].lock);
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#endif
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return ret;
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}
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esp_err_t i2cSetClock(uint8_t i2c_num, uint32_t frequency) {
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esp_err_t ret = ESP_FAIL;
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if (i2c_num >= SOC_I2C_NUM) {
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return ESP_ERR_INVALID_ARG;
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}
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#if !CONFIG_DISABLE_HAL_LOCKS
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//acquire lock
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if (bus[i2c_num].lock == NULL || xSemaphoreTake(bus[i2c_num].lock, portMAX_DELAY) != pdTRUE) {
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log_e("could not acquire lock");
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return ret;
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}
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#endif
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if (!bus[i2c_num].initialized) {
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log_e("bus is not initialized");
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goto end;
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}
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if (bus[i2c_num].frequency == frequency) {
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ret = ESP_OK;
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goto end;
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}
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if (!frequency) {
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frequency = 100000UL;
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} else if (frequency > 1000000UL) {
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frequency = 1000000UL;
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}
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bus[i2c_num].frequency = frequency;
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// loop through devices, remove them and then re-add them with the new frequency
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for (uint8_t i = 0; i < 128; i++) {
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if (bus[i2c_num].dev_handles[i] != NULL) {
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ret = i2c_master_bus_rm_device(bus[i2c_num].dev_handles[i]);
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if (ret != ESP_OK) {
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log_e("i2c_master_bus_rm_device failed: [%d] %s", ret, esp_err_to_name(ret));
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goto end;
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} else {
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bus[i2c_num].dev_handles[i] = NULL;
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ret = i2cAddDeviceIfNeeded(i2c_num, i);
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if (ret != ESP_OK) {
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goto end;
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}
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}
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}
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}
|
|
|
|
end:
|
|
#if !CONFIG_DISABLE_HAL_LOCKS
|
|
//release lock
|
|
xSemaphoreGive(bus[i2c_num].lock);
|
|
#endif
|
|
return ret;
|
|
}
|
|
|
|
esp_err_t i2cGetClock(uint8_t i2c_num, uint32_t *frequency) {
|
|
if (i2c_num >= SOC_I2C_NUM) {
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
if (!bus[i2c_num].initialized) {
|
|
log_e("bus is not initialized");
|
|
return ESP_FAIL;
|
|
}
|
|
*frequency = bus[i2c_num].frequency;
|
|
return ESP_OK;
|
|
}
|
|
|
|
#endif /* ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 4, 0) */
|
|
#endif /* SOC_I2C_SUPPORTED */
|