Overclock to 153.6 MHz (instead of 147.6 MHz) for I²S 48 kHz sample rate (#2708)
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3 changed files with 4 additions and 6 deletions
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@ -71,7 +71,7 @@ sample rate on-the-fly.
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bool setSysClk(int samplerate)
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bool setSysClk(int samplerate)
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Changes the PICO system clock to optimise for the desired samplerate.
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Changes the PICO system clock to optimise for the desired samplerate.
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The clock changes to 147.6 MHz for samplerates that are a multiple of 8 kHz, and 135.6 MHz for multiples of 11.025 kHz.
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The clock changes to 153.6 MHz for samplerates that are a multiple of 8 kHz, and 135.6 MHz for multiples of 11.025 kHz.
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Note that using ``setSysClk()`` may affect the timing of other sysclk-dependent functions.
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Note that using ``setSysClk()`` may affect the timing of other sysclk-dependent functions.
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Should be called before any I2S functions and any other sysclk dependent initialisations.
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Should be called before any I2S functions and any other sysclk dependent initialisations.
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@ -123,12 +123,10 @@ bool I2S::setFrequency(int newFreq) {
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bool I2S::setSysClk(int samplerate) { // optimise sys_clk for desired samplerate
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bool I2S::setSysClk(int samplerate) { // optimise sys_clk for desired samplerate
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if (samplerate % 11025 == 0) {
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if (samplerate % 11025 == 0) {
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set_sys_clock_khz(I2SSYSCLK_44_1, false); // 147.6 unsuccessful - no I2S no USB
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return set_sys_clock_khz(I2SSYSCLK_44_1, false);
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return true;
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}
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}
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if (samplerate % 8000 == 0) {
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if (samplerate % 8000 == 0) {
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set_sys_clock_khz(I2SSYSCLK_8, false);
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return set_sys_clock_khz(I2SSYSCLK_8, false);
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return true;
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}
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}
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return false;
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return false;
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}
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}
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@ -163,5 +163,5 @@ private:
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int _sm, _smMCLK;
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int _sm, _smMCLK;
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static const int I2SSYSCLK_44_1 = 135600; // 44.1, 88.2 kHz sample rates
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static const int I2SSYSCLK_44_1 = 135600; // 44.1, 88.2 kHz sample rates
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static const int I2SSYSCLK_8 = 147600; // 8k, 16, 32, 48, 96, 192 kHz
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static const int I2SSYSCLK_8 = 153600; // 8k, 16, 32, 48, 96, 192 kHz
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};
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};
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