Merge branch 'earlephilhower:master' into master

fix pins for rev C
Remove dead debug code in PIOProgram (#2992 )
2025-06-15 16:20:49 -04:00 · 2025-06-15 14:05:16 -04:00 · 2025-06-12 11:15:12 -07:00 · 2025-06-12 10:54:37 -07:00 · 2025-06-12 08:16:55 -07:00 · 2025-06-01 15:29:48 -04:00
370 changed files with 15476 additions and 3170 deletions
--- a/.github/workflows/pull-request.yml
+++ b/.github/workflows/pull-request.yml
@ -10,7 +10,7 @@ jobs:

 # Consistent style, spelling
  astyle:
-    name: Spelling, Style, Boards, Package
+    name: Spelling, Style, Boards, Package, PIO
    runs-on: ubuntu-latest
    steps:
    - uses: actions/checkout@v4
@ -19,13 +19,8 @@ jobs:
    - name: Run codespell
      uses: codespell-project/actions-codespell@v2
      with:
-        skip: ./ArduinoCore-API,./libraries/ESP8266SdFat,./libraries/Adafruit_TinyUSB_Arduino,./libraries/LittleFS/lib,./tools/pyserial,./pico-sdk,./.github,./docs/i2s.rst,./cores/rp2040/api,./libraries/FreeRTOS,./tools/libbearssl/bearssl,./include,./libraries/WiFi/examples/BearSSL_Server,./ota/uzlib,./libraries/http-parser/lib,./libraries/WebServer/examples/HelloServerBearSSL/HelloServerBearSSL.ino,./libraries/HTTPUpdateServer/examples/SecureBearSSLUpdater/SecureBearSSLUpdater.ino,./.git,./libraries/FatFS/lib/fatfs,./libraries/FatFS/src/diskio.h,./libraries/FatFS/src/ff.cpp,./libraries/FatFS/src/ffconf.h,./libraries/FatFS/src/ffsystem.cpp,./libraries/FatFS/src/ff.h,./libraries/lwIP_WINC1500/src/driver,./libraries/lwIP_WINC1500/src/common,./libraries/lwIP_WINC1500/src/bus_wrapper,./libraries/lwIP_WINC1500/src/spi_flash
-        ignore_words_list: ser,dout,shiftIn,acount
-    - name: Get submodules for following tests
-      run: git submodule update --init
-    - name: Check package references
-      run: |
-        ./tests/ci/pkgrefs_test.sh
+        skip: ./ArduinoCore-API,./libraries/ESP8266SdFat,./libraries/Adafruit_TinyUSB_Arduino,./libraries/LittleFS/lib,./tools/pyserial,./pico-sdk,./.github,./docs/i2s.rst,./cores/rp2040/api,./libraries/FreeRTOS,./tools/libbearssl/bearssl,./include,./libraries/WiFi/examples/BearSSL_Server,./ota/uzlib,./libraries/http-parser/lib,./libraries/WebServer/examples/HelloServerBearSSL/HelloServerBearSSL.ino,./libraries/HTTPUpdateServer/examples/SecureBearSSLUpdater/SecureBearSSLUpdater.ino,./.git,./libraries/FatFS/lib/fatfs,./libraries/FatFS/src/diskio.h,./libraries/FatFS/src/ff.cpp,./libraries/FatFS/src/ffconf.h,./libraries/FatFS/src/ffsystem.cpp,./libraries/FatFS/src/ff.h,./libraries/lwIP_WINC1500/src/driver,./libraries/lwIP_WINC1500/src/common,./libraries/lwIP_WINC1500/src/bus_wrapper,./libraries/lwIP_WINC1500/src/spi_flash,./libraries/WiFi/examples/BearSSL_Validation/certs.h
+        ignore_words_list: ser,dout,shiftIn,acount,froms
    - name: Check boards.txt was not edited after makeboards.py
      run: |
        ./tools/makeboards.py
@ -38,6 +33,15 @@ jobs:
        ./tests/restyle.sh
        # If anything changed, GIT should return an error and fail the test
        git diff --exit-code
+    - name: Check compiled PIO files
+      run: |
+        (cd ./tools && ./get.py)
+        ./tools/makepio.py
+        # If anything changed, GIT should return an error and fail the test
+        git diff -w --exit-code
+    - name: Check package references
+      run: |
+        ./tests/ci/pkgrefs_test.sh

 # Build all examples on linux (core and Arduino IDE)
  build-linux:
@ -196,7 +200,7 @@ jobs:
    name: Mac
    strategy:
      matrix:
-        os: [macOS-12, macOS-14]
+        os: [macOS-13, macOS-14]
    runs-on: ${{ matrix.os }}
    steps:
    - uses: actions/checkout@v4
@ -264,8 +268,8 @@ jobs:
      run: |
        python -m pip install --upgrade pip
        pip install --upgrade platformio
+        rm -rf ~/.platformio/platforms/raspberrypi*
        pio pkg install --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
-        pio pkg update --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
        pio pkg install --global --tool symlink://.
        cp -f /home/runner/work/arduino-pico/arduino-pico/tools/json/*.json /home/runner/.platformio/platforms/raspberrypi/boards/.
    - name: Build Multicore Example
@ -321,8 +325,8 @@ jobs:
      run: |
        python -m pip install --upgrade pip
        pip install --upgrade platformio
+        rm -rf ~/.platformio/platforms/raspberrypi*
        pio pkg install --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
-        pio pkg update --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
        pio pkg install --global --tool symlink://.
        cp -f /home/runner/work/arduino-pico/arduino-pico/tools/json/*.json /home/runner/.platformio/platforms/raspberrypi/boards/.
    - name: Build Every Variant
--- a/.gitignore
+++ b/.gitignore
@ -3,5 +3,10 @@ system
 tools/dist
 docs/_build
 ota/build
-tools/libpico/build
+ota/build-rp2350
+ota/build-rp2350-riscv
+tools/libpico/boot
+tools/libpico/build-rp2040
+tools/libpico/build-rp2350
+tools/libpico/build-rp2350-riscv
 platform.local.txt
--- a/.gitmodules
+++ b/.gitmodules
@ -10,9 +10,6 @@
 [submodule "libraries/LittleFS/lib/littlefs"]
 	path = libraries/LittleFS/lib/littlefs
 	url = https://github.com/littlefs-project/littlefs.git
-[submodule "libraries/SdFat"]
-	path = libraries/ESP8266SdFat
-	url = https://github.com/earlephilhower/ESP8266SdFat.git
 [submodule "libraries/Keyboard"]
 	path = libraries/HID_Keyboard
 	url = https://github.com/earlephilhower/Keyboard.git
@ -49,3 +46,6 @@
 [submodule "libraries/ESPHost"]
 	path = libraries/ESPHost
 	url = https://github.com/Networking-for-Arduino/ESPHost.git
+[submodule "libraries/SdFat"]
+	path = libraries/SdFat
+	url = https://github.com/greiman/SdFat.git
--- a/.readthedocs.yaml
+++ b/.readthedocs.yaml
@ -29,8 +29,8 @@ sphinx:
  # fail_on_warning: true

 # Optionally build your docs in additional formats such as PDF and ePub
-# formats:
-#   - pdf
+formats:
+  - pdf
 #   - epub

 # Optional but recommended, declare the Python requirements required
--- a/2
+++ b/2
@ -1 +1 @@
-Subproject commit ece6e68f29c6f406a4434659bcbcfe558baaa3a9
+Subproject commit 82928635c893189343cf8eb78569f0c4136fded0
--- a/README.md
+++ b/README.md
@ -16,13 +16,16 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Raspberry Pi Pico
 * Raspberry Pi Pico W
 * Raspberry Pi Pico 2
+* Raspberry Pi Pico 2W
 * 0xCB Helios
 * Adafruit Feather RP2040
 * Adafruit Feather RP2040 SCORPIO
+* Adafruit Floppsy RP2040
 * Adafruit ItsyBitsy RP2040
 * Adafruit KB2040
 * Adafruit Macropad RP2040
 * Adafruit Metro RP2040
+* Adafruit Metro RP2350
 * Adafruit QTPy RP2040
 * Adafruit STEMMA Friend RP2040
 * Adafruit Trinkey RP2040 QT
@ -66,14 +69,21 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Melopero Cookie RP2040
 * Melopero Shake RP2040
 * METE HOCA Akana R1
+* Makerbase MKSTHR36
+* Makerbase MKSTHR42
+* MyMakers RP2040
 * Neko Systems BL2040 Mini
-* Olimex RP2040-Pico30
 * Newsan Archi
 * nullbits Bit-C PRO
+* Olimex Pico2XL
+* Olimex Pico2XXL
+* Olimex RP2040-Pico30
 * Pimoroni PGA2040
 * Pimoroni Pico Plus 2
 * Pimoroni Pico Plus 2W
 * Pimoroni Plasma2040
+* Pimoroni Plasma2350
+* Pimoroni Servo2040
 * Pimoroni Tiny2040
 * Pimoroni Tiny2350
 * Pintronix PinMax
@ -88,11 +98,13 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Solder Party RP2040 Stamp
 * Solder Party RP2350 Stamp
 * Solder Party RP2350 Stamp XL
+* SparkFun IoT RedBoard RP2350
 * SparkFun MicroMod RP2040
 * SparkFun ProMicro RP2040
 * SparkFun ProMicro RP2350
 * SparkFun Thing Plus RP2040
 * SparkFun Thing Plus RP2350
+* SparkFun XRP Controller
 * uPesy RP2040 DevKit
 * VCC-GND YD-RP2040
 * Viyalab Mizu RP2040
@ -135,6 +147,8 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * printf (i.e. debug) output over USB serial
 * Transparent use of PSRAM globals and heap (RP2350 only)
 * ARM or RISC-V (Hazard3) support for the RP2350
+* Semihosted serial and file system access
+* GPROF profiling support

 The RP2040 PIO state machines (SMs) are used to generate jitter-free:
 * Servos
@ -142,7 +156,7 @@ The RP2040 PIO state machines (SMs) are used to generate jitter-free:
 * I2S Input
 * I2S Output
 * Software UARTs (Serial ports)
-
+* Software SPIs

 # Installing via Arduino Boards Manager
 ## Windows-specific Notes
--- a/boards.txt
+++ b/boards.txt
--- a/cores/rp2040/Arduino.h
+++ b/cores/rp2040/Arduino.h
@ -27,10 +27,23 @@
 #include "RP2040Version.h"
 #include "api/ArduinoAPI.h"
 #include "api/itoa.h" // ARM toolchain doesn't provide itoa etc, provide them
+#include <pico.h>
+#undef PICO_RP2350A // Set in the RP2350 SDK boards file, overridden in the variant pins_arduino.h
 #include <pins_arduino.h>
 #include <hardware/gpio.h> // Required for the port*Register macros
 #include "debug_internal.h"

+// Chip sanity checking.  SDK uses interesting way of separating 2350A from 2350B, see https://github.com/raspberrypi/pico-sdk/issues/2364
+#if (!defined(PICO_RP2040) && !defined(PICO_RP2350)) || defined(PICO_RP2040) && defined(PICO_RP2350)
+#error Invalid core definition. Either PICO_RP2040 or PICO_RP2350 must be defined.
+#endif
+#if defined(PICO_RP2350) && !defined(PICO_RP2350A)
+#error Invalid RP2350 definition.  Need to set PICO_RP2350A=0/1 for A/B variant
+#endif
+#if defined(PICO_RP2350B)
+#error Do not define PICO_RP2350B.  Use PICO_RP2350A=0 to indicate RP2350B.  See the SDK for more details
+#endif
+
 // Try and make the best of the old Arduino abs() macro.  When in C++, use
 // the sane std::abs() call, but for C code use their macro since stdlib abs()
 // is int but their macro "works" for everything (with potential side effects)
@ -110,7 +123,7 @@ extern bool __isFreeRTOS;
 #endif

 #ifndef PGM_VOID_P
-#define PGM_VOID_P void *
+#define PGM_VOID_P const void *
 #endif

 #ifdef __cplusplus
@ -126,6 +139,7 @@ extern const String emptyString;
 #endif

 #include "SerialUART.h"
+#include "SerialSemi.h"
 #include "RP2040Support.h"
 #include "SerialPIO.h"
 #include "Bootsel.h"
@ -151,10 +165,14 @@ constexpr uint64_t __bitset(const int (&a)[N], size_t i = 0U) {
 #define PSRAM __attribute__((section("\".psram\"")))

 // General GPIO/ADC layout info
-#ifdef PICO_RP2350B
+#if defined(PICO_RP2350) && !PICO_RP2350A
 #define __GPIOCNT 48
 #define __FIRSTANALOGGPIO 40
 #else
 #define __GPIOCNT 30
 #define __FIRSTANALOGGPIO 26
 #endif
+
+#ifdef __cplusplus
+using namespace arduino;
+#endif
--- a/cores/rp2040/AudioOutputBase.h
+++ b/cores/rp2040/AudioOutputBase.h
@ -0,0 +1,21 @@
+// Abstract class for audio output devices to allow easy swapping between output devices
+
+#pragma once
+
+#include <Print.h>
+
+class AudioOutputBase : public Print {
+public:
+    virtual ~AudioOutputBase() { }
+    virtual bool setBuffers(size_t buffers, size_t bufferWords, int32_t silenceSample = 0) = 0;
+    virtual bool setBitsPerSample(int bps) = 0;
+    virtual bool setFrequency(int freq) = 0;
+    virtual bool setStereo(bool stereo = true) = 0;
+    virtual bool begin() = 0;
+    virtual bool end() = 0;
+    virtual bool getUnderflow() = 0;
+    virtual void onTransmit(void(*)(void *), void *) = 0;
+    // From Print
+    virtual size_t write(const uint8_t *buffer, size_t size) = 0;
+    virtual int availableForWrite() = 0;
+};
--- a/cores/rp2040/Bootsel.h
+++ b/cores/rp2040/Bootsel.h
@ -20,10 +20,21 @@

 #pragma once

+/**
+    @brief Wrapper class for polling the BOOTSEL button
+*/
 class __Bootsel {
 public:
    __Bootsel() { }
+    /**
+        @brief Get state of the BOOTSEL pin
+
+        @returns True if BOOTSEL pushed
+    */
    operator bool();
 };

+/**
+    @brief BOOTSEL accessor instance
+*/
 extern __Bootsel BOOTSEL;
--- a/cores/rp2040/IPAddress.h
+++ b/cores/rp2040/IPAddress.h
@ -1 +1,2 @@
 #include "api/IPAddress.h"
+using arduino::IPAddress;
--- a/cores/rp2040/PIOProgram.cpp
+++ b/cores/rp2040/PIOProgram.cpp
@ -33,7 +33,6 @@

 static std::map<const pio_program_t *, int> __pioMap[PIOCNT];
 static bool __pioAllocated[PIOCNT];
-static bool __pioHighGPIO[PIOCNT];
 auto_init_mutex(_pioMutex);

 PIOProgram::PIOProgram(const pio_program_t *pgm) {
@ -54,26 +53,16 @@ bool PIOProgram::prepare(PIO *pio, int *sm, int *offset, int start, int cnt) {
    CoreMutex m(&_pioMutex);
    PIO pi[PIOCNT] = { PIOS };

-#if 0
-    uint usm;
-    uint uoff;
-    auto ret = pio_claim_free_sm_and_add_program_for_gpio_range(_pgm, pio, &usm, &uoff, start, cnt, true);
-    *sm = usm;
-    *offset = uoff;
-    DEBUGV("clain %d\n", ret);
-    return ret;
-#endif
-
-    bool needsHigh = (start + cnt) >= 32;
-    DEBUGV("PIOProgram %p: Searching for high=%d, pins %d-%d\n", _pgm, needsHigh ? 1 : 0, start, start + cnt - 1);
+    uint gpioBaseNeeded = ((start + cnt) >= 32) ? 16 : 0;
+    DEBUGV("PIOProgram %p: Searching for base=%d, pins %d-%d\n", _pgm, gpioBaseNeeded, start, start + cnt - 1);

    // If it's already loaded into PIO IRAM, try and allocate in that specific PIO
    for (int o = 0; o < PIOCNT; o++) {
        auto p = __pioMap[o].find(_pgm);
-        if ((p != __pioMap[o].end()) && (__pioHighGPIO[o] == needsHigh)) {
+        if ((p != __pioMap[o].end()) && (pio_get_gpio_base(pio_get_instance(o)) == gpioBaseNeeded)) {
            int idx = pio_claim_unused_sm(pi[o], false);
            if (idx >= 0) {
-                DEBUGV("PIOProgram %p: Reusing IMEM ON PIO %p(high=%d) for pins %d-%d\n", _pgm, pi[o], __pioHighGPIO[o] ? 1 : 0, start, start + cnt - 1);
+                DEBUGV("PIOProgram %p: Reusing IMEM ON PIO %p(base=%d) for pins %d-%d\n", _pgm, pi[o], pio_get_gpio_base(pio_get_instance(o)), start, start + cnt - 1);
                _pio = pi[o];
                _sm = idx;
                *pio = pi[o];
@ -86,12 +75,12 @@ bool PIOProgram::prepare(PIO *pio, int *sm, int *offset, int start, int cnt) {

    // Not in any PIO IRAM, so try and add
    for (int o = 0; o < PIOCNT; o++) {
-        if (__pioAllocated[o] && (__pioHighGPIO[o] == needsHigh)) {
+        if (__pioAllocated[o] && (pio_get_gpio_base(pio_get_instance(o)) == gpioBaseNeeded)) {
            DEBUGV("PIOProgram: Checking PIO %p\n", pi[o]);
            if (pio_can_add_program(pi[o], _pgm)) {
                int idx = pio_claim_unused_sm(pi[o], false);
                if (idx >= 0) {
-                    DEBUGV("PIOProgram %p: Adding IMEM ON PIO %p(high=%d) for pins %d-%d\n", _pgm, pi[o], __pioHighGPIO[o] ? 1 : 0, start, start + cnt - 1);
+                    DEBUGV("PIOProgram %p: Adding IMEM ON PIO %p(base=%d) for pins %d-%d\n", _pgm, pi[o], pio_get_gpio_base(pio_get_instance(o)), start, start + cnt - 1);
                    int off = pio_add_program(pi[o], _pgm);
                    __pioMap[o].insert({_pgm, off});
                    _pio = pi[o];
@ -123,8 +112,7 @@ bool PIOProgram::prepare(PIO *pio, int *sm, int *offset, int start, int cnt) {
        }
        assert(!__pioAllocated[o]);
        __pioAllocated[o]  = true;
-        __pioHighGPIO[o] = needsHigh;
-        DEBUGV("PIOProgram %p: Allocating new PIO %p(high=%d) for pins %d-%d\n", _pgm, pi[o], __pioHighGPIO[o] ? 1 : 0, start, start + cnt - 1);
+        DEBUGV("PIOProgram %p: Allocating new PIO %p(base=%d) for pins %d-%d\n", _pgm, pi[o], pio_get_gpio_base(pio_get_instance(o)), start, start + cnt - 1);
        __pioMap[o].insert({_pgm, off});
        _pio = pi[o];
        _sm = idx;
--- a/cores/rp2040/RP2040Support.cpp
+++ b/cores/rp2040/RP2040Support.cpp
@ -18,9 +18,11 @@
    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

+#include <Arduino.h>
+#include <pico/runtime.h>
+
 #ifdef PICO_RP2040

-#include <Arduino.h>
 #include <hardware/structs/psm.h>

 extern "C" void boot_double_tap_check();
@ -35,3 +37,17 @@ void RP2040::enableDoubleResetBootloader() {
 }

 #endif
+
+#ifdef __PROFILE
+Stream *__profileFile;
+int __writeProfileCB(const void *data, int len) {
+    return __profileFile->write((const char *)data, len);
+}
+
+#ifdef __PROFILE
+extern "C" void runtime_init_setup_profiling();
+#define PICO_RUNTIME_INIT_PROFILING "11011" // Towards the end, after PSRAM
+PICO_RUNTIME_INIT_FUNC_RUNTIME(runtime_init_setup_profiling, PICO_RUNTIME_INIT_PROFILING);
+#endif
+
+#endif
--- a/cores/rp2040/RP2040Support.h
+++ b/cores/rp2040/RP2040Support.h
@ -18,6 +18,8 @@
    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

+#pragma once
+
 #include <hardware/clocks.h>
 #include <hardware/irq.h>
 #include <hardware/pio.h>
@ -45,6 +47,13 @@

 extern "C" volatile bool __otherCoreIdled;

+extern "C" {
+#ifdef __PROFILE
+    typedef int (*profileWriteCB)(const void *data, int len);
+    extern void _writeProfile(profileWriteCB writeCB);
+#endif
+}
+
 class _MFIFO {
 public:
    _MFIFO() { /* noop */ };
@ -173,14 +182,17 @@ extern "C" void loop1() __attribute__((weak));
 extern "C" bool core1_separate_stack;
 extern "C" uint32_t* core1_separate_stack_address;

+/**
+    @brief RP2040/RP2350 helper function for HW-specific features
+*/
 class RP2040 {
 public:
    RP2040()  { /* noop */ }
    ~RP2040() { /* noop */ }

-    void begin() {
-        _epoch = 0;
-#if !defined(__riscv)
+    void begin(int cpuid) {
+        _epoch[cpuid] = 0;
+#if !defined(__riscv) && !defined(__PROFILE)
        if (!__isFreeRTOS) {
            // Enable SYSTICK exception
            exception_set_exclusive_handler(SYSTICK_EXCEPTION, _SystickHandler);
@ -188,87 +200,148 @@ public:
            systick_hw->rvr = 0x00FFFFFF;
        } else {
 #endif
+            // Only start 1 instance of the PIO SM
+            if (cpuid == 0) {
                int off = 0;
                _ccountPgm = new PIOProgram(&ccount_program);
                _ccountPgm->prepare(&_pio, &_sm, &off);
                ccount_program_init(_pio, _sm, off);
                pio_sm_set_enabled(_pio, _sm, true);
-#if !defined(__riscv)
+            }
+#if !defined(__riscv) && !defined(__PROFILE)
        }
 #endif
    }

-    // Convert from microseconds to PIO clock cycles
+    /**
+        @brief Convert from microseconds to PIO clock cycles
+
+        @returns the PIO cycles for a given microsecond delay
+    */
    static int usToPIOCycles(int us) {
        // Parenthesis needed to guarantee order of operations to avoid 32bit overflow
        return (us * (clock_get_hz(clk_sys) / 1'000'000));
    }

-    // Get current clock frequency
+    /**
+        @brief Gets the active CPU speed (may differ from F_CPU
+
+        @returns CPU frequency in Hz
+    */
    static int f_cpu() {
        return clock_get_hz(clk_sys);
    }

-    // Get current CPU core number
+    /**
+        @brief Get the core ID that is currently executing this code
+
+        @returns 0 for Core 0, 1 for Core 1
+    */
    static int cpuid() {
        return sio_hw->cpuid;
    }

-    // Get CPU cycle count.  Needs to do magic to extens 24b HW to something longer
-    volatile uint64_t _epoch = 0;
+    /**
+        @brief CPU cycle counter epoch (24-bit cycle).  For internal use
+    */
+    volatile uint64_t _epoch[2] = {};
+    /**
+        @brief Get the count of CPU clock cycles since power on.
+
+        @details
+        The 32-bit count will overflow every 4 billion cycles, so consider using ``getCycleCount64`` for
+        longer measurements
+
+        @returns CPU clock cycles since power up
+    */
    inline uint32_t getCycleCount() {
-#if !defined(__riscv)
+#if !defined(__riscv) && !defined(__PROFILE)
+        // Get CPU cycle count.  Needs to do magic to extend 24b HW to something longer
        if (!__isFreeRTOS) {
            uint32_t epoch;
            uint32_t ctr;
            do {
-                epoch = (uint32_t)_epoch;
+                epoch = (uint32_t)_epoch[sio_hw->cpuid];
                ctr = systick_hw->cvr;
-            } while (epoch != (uint32_t)_epoch);
+            } while (epoch != (uint32_t)_epoch[sio_hw->cpuid]);
            return epoch + (1 << 24) - ctr; /* CTR counts down from 1<<24-1 */
        } else {
 #endif
            return ccount_read(_pio, _sm);
-#if !defined(__riscv)
+#if !defined(__riscv) && !defined(__PROFILE)
        }
 #endif
    }
+    /**
+        @brief Get the count of CPU clock cycles since power on as a 64-bit quantrity

+        @returns CPU clock cycles since power up
+    */
    inline uint64_t getCycleCount64() {
-#if !defined(__riscv)
+#if !defined(__riscv) && !defined(__PROFILE)
        if (!__isFreeRTOS) {
            uint64_t epoch;
            uint64_t ctr;
            do {
-                epoch = _epoch;
+                epoch = _epoch[sio_hw->cpuid];
                ctr = systick_hw->cvr;
-            } while (epoch != _epoch);
+            } while (epoch != _epoch[sio_hw->cpuid]);
            return epoch + (1LL << 24) - ctr;
        } else {
 #endif
            return ccount_read(_pio, _sm);
-#if !defined(__riscv)
+#if !defined(__riscv) && !defined(__PROFILE)
        }
 #endif
    }

+    /**
+        @brief Gets total unused heap (dynamic memory)
+
+        @details
+        Note that the allocations of the size of the total free heap may fail due to fragmentation.
+        For example, ``getFreeHeap`` can report 100KB available, but an allocation of 90KB may fail
+        because there may not be a contiguous 90KB space available
+
+        @returns Free heap in bytes
+    */
    inline int getFreeHeap() {
        return getTotalHeap() - getUsedHeap();
    }

+    /**
+        @brief Gets total used heap (dynamic memory)
+
+        @returns Used heap in bytes
+    */
    inline int getUsedHeap() {
        struct mallinfo m = mallinfo();
        return m.uordblks;
    }

+    /**
+        @brief Gets total heap (dynamic memory) compiled into the program
+
+        @returns Total heap size in bytes
+    */
    inline int getTotalHeap() {
        return &__StackLimit  - &__bss_end__;
    }

+    /**
+        @brief On the RP2350, returns the amount of heap (dynamic memory) available in PSRAM
+
+        @returns Total free heap in PSRAM, or 0 if no PSRAM present
+    */
    inline int getFreePSRAMHeap() {
        return getTotalPSRAMHeap() - getUsedPSRAMHeap();
    }

+    /**
+        @brief On the RP2350, returns the total amount of PSRAM heap (dynamic memory) used
+
+        @returns Bytes used in PSRAM, or 0 if no PSRAM present
+    */
    inline int getUsedPSRAMHeap() {
 #if defined(RP2350_PSRAM_CS)
        extern size_t __psram_total_used();
@ -278,6 +351,11 @@ public:
 #endif
    }

+    /**
+        @brief On the RP2350, gets total heap (dynamic memory) compiled into the program
+
+        @returns Total PSRAM heap size in bytes, or 0 if no PSRAM present
+    */
    inline int getTotalPSRAMHeap() {
 #if defined(RP2350_PSRAM_CS)
        extern size_t __psram_total_space();
@ -287,6 +365,11 @@ public:
 #endif
    }

+    /**
+        @brief Gets the current stack pointer in a ARM/RISC-V safe manner
+
+        @returns Current SP
+    */
    inline uint32_t getStackPointer() {
        uint32_t *sp;
 #if defined(__riscv)
@ -297,6 +380,14 @@ public:
        return (uint32_t)sp;
    }

+    /**
+        @brief Calculates approximately how much stack space is still available for the running core.  Handles multiprocessing and separate stacks.
+
+        @details
+        Not valid in FreeRTOS.  Use the FreeRTOS internal functions to access this information.
+
+        @returns Approximation of the amount of stack available for use on the specific core
+    */
    inline int getFreeStack() {
        const unsigned int sp = getStackPointer();
        uint32_t ref = 0x20040000;
@ -310,6 +401,11 @@ public:
        return sp - ref;
    }

+    /**
+        @brief On the RP2350, gets the size of attached PSRAM
+
+        @returns PSRAM size in bytes, or 0 if no PSRAM present
+    */
    inline size_t getPSRAMSize() {
 #if defined(RP2350_PSRAM_CS)
        extern size_t __psram_size;
@ -319,20 +415,48 @@ public:
 #endif
    }

+    /**
+        @brief Freezes the other core in a flash-write-safe state.  Not generally needed by applications
+
+        @details
+        When the external flash chip is erasing or writing, the Pico cannot fetch instructions from it.
+        In this case both the core doing the writing and the other core (if active) need to run from a
+        routine that's contained in RAM.  This call forces the other core into a tight, RAM-based loop
+        safe for this operation.  When flash erase/write is completed, ``resumeOtherCore`` to return
+        it to operation.
+
+        Be sure to disable any interrupts or task switches before calling to avoid deadlocks.
+
+        If the second core is not started, this is a no-op.
+    */
    void idleOtherCore() {
        fifo.idleOtherCore();
    }

+    /**
+        @brief Resumes normal operation of the other core
+    */
    void resumeOtherCore() {
        fifo.resumeOtherCore();
    }

+    /**
+        @brief Hard resets the 2nd core (CORE1).
+
+        @details
+        Because core1 will restart with the heap and global variables not in the same state as
+        power-on, this call may not work as desired and a full CPU reset may be necessary in
+        certain cases.
+    */
    void restartCore1() {
        multicore_reset_core1();
        fifo.clear();
        multicore_launch_core1(main1);
    }

+    /**
+        @brief Warm-reboots the chip in normal mode
+    */
    void reboot() {
        watchdog_reboot(0, 0, 10);
        while (1) {
@ -340,10 +464,16 @@ public:
        }
    }

+    /**
+        @brief Warm-reboots the chip in normal mode
+    */
    inline void restart() {
        reboot();
    }

+    /**
+        @brief Warm-reboots the chip into the USB bootloader mode
+    */
    inline void rebootToBootloader() {
        reset_usb_boot(0, 0);
        while (1) {
@ -355,16 +485,32 @@ public:
    static void enableDoubleResetBootloader();
 #endif

+    /**
+        @brief Starts the hardware watchdog timer.  The CPU will reset if the watchdog is not fed every delay_ms
+
+        @param [in] delay_ms Milliseconds without a wdt_reset before rebooting
+    */
    void wdt_begin(uint32_t delay_ms) {
        watchdog_enable(delay_ms, 1);
    }

+    /**
+        @brief Feeds the watchdog timer, resetting it for another delay_ms countdown
+    */
    void wdt_reset() {
        watchdog_update();
    }

+    /**
+        @brief Best-effort reasons for chip reset
+    */
    enum resetReason_t {UNKNOWN_RESET, PWRON_RESET, RUN_PIN_RESET, SOFT_RESET, WDT_RESET, DEBUG_RESET, GLITCH_RESET, BROWNOUT_RESET};

+    /**
+        @brief Attempts to determine the reason for the last chip reset.  May not always be able to determine accurately
+
+        @returns Reason for reset
+    */
    resetReason_t getResetReason(void) {
        io_rw_32 *WD_reason_reg = (io_rw_32 *)(WATCHDOG_BASE + WATCHDOG_REASON_OFFSET);

@ -418,6 +564,10 @@ public:
        return UNKNOWN_RESET;
    }

+    /**
+        @brief Get unique ID string for the running board
+        @returns String with the unique board ID as determined by the SDK
+    */
    const char *getChipID() {
        static char id[2 * PICO_UNIQUE_BOARD_ID_SIZE_BYTES + 1] = { 0 };
        if (!id[0]) {
@ -428,6 +578,17 @@ public:

 #pragma GCC push_options
 #pragma GCC optimize ("Os")
+    /**
+        @brief Perform a memcpy using a DMA engine for speed
+
+        @details
+        Uses the DMA to copy to and from RAM.  Only works on 4-byte aligned, 4-byte multiple length
+        sources and destination (i.e. word-aligned, word-length).  Falls back to normal memcpy otherwise.
+
+        @param [out] dest Memcpy destination, 4-byte aligned
+        @param [in] src Memcpy source, 4-byte aligned
+        @param [in] n Count in bytes to transfer (should be a multiple of 4 bytes)
+    */
    void *memcpyDMA(void *dest, const void *src, size_t n) {
        // Allocate a DMA channel on 1st call, reuse it every call after
        if (memcpyDMAChannel < 1) {
@ -456,14 +617,32 @@ public:
    }
 #pragma GCC pop_options

-    // Multicore comms FIFO
+    /**
+        @brief Multicore communications FIFO
+    */
    _MFIFO fifo;


+    /**
+        @brief Return a 32-bit from the hardware random number generator
+
+        @returns Random value using appropriate hardware (RP2350 has true RNG, RP2040 has a less true RNG method)
+    */
    uint32_t hwrand32() {
        return get_rand_32();
    }

+    /**
+        @brief Determines if code is running on a Pico or a PicoW
+
+        @details
+        Code compiled for the RP2040 PicoW can run on the RP2040 Pico.  This call lets an application
+        identify if the current device is really a Pico or PicoW and handle appropriately.  For
+        the RP2350, this runtime detection is not available and the call returns whether it was
+        compiled for the CYW43 WiFi driver
+
+        @returns True if running on a PicoW board with CYW43 WiFi chip.
+    */
    bool isPicoW() {
 #if !defined(PICO_CYW43_SUPPORTED)
        return false;
@ -473,10 +652,25 @@ public:
 #endif
    }

+#ifdef __PROFILE
+    void writeProfiling(Stream *f) {
+        extern Stream *__profileFile;
+        extern int __writeProfileCB(const void *data, int len);
+        __profileFile = f;
+        _writeProfile(__writeProfileCB);
+    }
+
+    size_t getProfileMemoryUsage() {
+        extern int __profileMemSize;
+        return (size_t) __profileMemSize;
+    }
+#endif
+
+

 private:
-    static void _SystickHandler() {
-        rp2040._epoch += 1LL << 24;
+    static void __no_inline_not_in_flash_func(_SystickHandler)() {
+        rp2040._epoch[sio_hw->cpuid] += 1LL << 24;
    }
    PIO _pio;
    int _sm;
--- a/cores/rp2040/RP2040Version.h
+++ b/cores/rp2040/RP2040Version.h
@ -1,5 +1,5 @@
 #pragma once
 #define ARDUINO_PICO_MAJOR 4
-#define ARDUINO_PICO_MINOR 2
-#define ARDUINO_PICO_REVISION 1
-#define ARDUINO_PICO_VERSION_STR "4.2.1"
+#define ARDUINO_PICO_MINOR 5
+#define ARDUINO_PICO_REVISION 4
+#define ARDUINO_PICO_VERSION_STR "4.5.4"
--- a/cores/rp2040/SemiFS.h
+++ b/cores/rp2040/SemiFS.h
@ -0,0 +1,297 @@
+/*
+    SemiFS.h - File system wrapper for Semihosting ARM
+    Copyright (c) 2024 Earle F. Philhower, III.  All rights reserved.
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#pragma once
+
+#include "Semihosting.h"
+#include "FS.h"
+#include "FSImpl.h"
+
+using namespace fs;
+
+namespace semifs {
+
+class SemiFSFileImpl;
+class SemiFSConfig : public FSConfig {
+public:
+    static constexpr uint32_t FSId = 0x53454d49;
+    SemiFSConfig() : FSConfig(FSId, false) { }
+};
+
+class SemiFSFileImpl : public FileImpl {
+public:
+    SemiFSFileImpl(int fd, const char *name, bool writable)
+        : _fd(fd), _opened(true), _writable(writable) {
+        _name = std::shared_ptr<char>(new char[strlen(name) + 1], std::default_delete<char[]>());
+        strcpy(_name.get(), name);
+    }
+
+    ~SemiFSFileImpl() override {
+        flush();
+        close();
+    }
+
+    int availableForWrite() override {
+        return 1; // TODO - not implemented? _opened ? _fd->availableSpaceForWrite() : 0;
+    }
+
+    size_t write(const uint8_t *buf, size_t size) override {
+        if (_opened) {
+            uint32_t a[3];
+            a[0] = _fd;
+            a[1] = (uint32_t)buf;
+            a[2] = size;
+            return 0 == Semihost(SEMIHOST_SYS_WRITE, a) ? size : -1;
+        }
+        return -1; // some kind of error
+    }
+
+    int read(uint8_t* buf, size_t size) override {
+        if (_opened) {
+            uint32_t a[3];
+            a[0] = _fd;
+            a[1] = (uint32_t)buf;
+            a[2] = size;
+            int ret = Semihost(SEMIHOST_SYS_READ, a);
+            if (ret == 0) {
+                return size;
+            } else if (ret == (int)size) {
+                return -1;
+            } else {
+                return ret;
+            }
+        }
+        return -1;
+    }
+
+    void flush() override {
+        /* noop */
+    }
+
+    bool seek(uint32_t pos, SeekMode mode) override {
+        if (!_opened || (mode != SeekSet)) {
+            // No seek cur/end in semihost
+            return false;
+        }
+        uint32_t a[2];
+        a[0] = _fd;
+        a[1] = pos;
+        return !Semihost(SEMIHOST_SYS_SEEK, a);
+    }
+
+    size_t position() const override {
+        return 0; // Not available semihost
+    }
+
+    size_t size() const override {
+        if (!_opened) {
+            return 0;
+        }
+        uint32_t a;
+        a = _fd;
+        int ret = Semihost(SEMIHOST_SYS_FLEN, &a);
+        if (ret < 0) {
+            return 0;
+        }
+        return ret;
+    }
+
+    bool truncate(uint32_t size) override {
+        return false; // Not allowed
+    }
+
+    void close() override {
+        if (_opened) {
+            uint32_t a = _fd;
+            Semihost(SEMIHOST_SYS_CLOSE, &a);
+            _opened = false;
+        }
+    }
+
+    const char* name() const override {
+        if (!_opened) {
+            DEBUGV("SemiFSFileImpl::name: file not opened\n");
+            return nullptr;
+        } else {
+            const char *p = _name.get();
+            const char *slash = strrchr(p, '/');
+            // For names w/o any path elements, return directly
+            // If there are slashes, return name after the last slash
+            // (note that strrchr will return the address of the slash,
+            // so need to increment to ckip it)
+            return (slash && slash[1]) ? slash + 1 : p;
+        }
+    }
+
+    const char* fullName() const override {
+        return _opened ? _name.get() : nullptr;
+    }
+
+    bool isFile() const override {
+        return _opened; // Could look at ISTTY but that's not the sense here. Just differentiating between dirs and files
+    }
+
+    bool isDirectory() const override {
+        return false;
+    }
+
+    time_t getLastWrite() override {
+        return getCreationTime(); // TODO - FatFS doesn't seem to report both filetimes
+    }
+
+    time_t getCreationTime() override {
+        time_t ftime = 0;
+        return ftime;
+    }
+
+protected:
+    int                   _fd;
+    std::shared_ptr<char> _name;
+    bool                  _opened;
+    bool                  _writable;
+};
+
+
+class SemiFSImpl : public FSImpl {
+public:
+    SemiFSImpl() {
+        /* noop */
+    }
+
+    FileImplPtr open(const char* path, OpenMode openMode, AccessMode accessMode) override {
+        if (!path || !path[0]) {
+            DEBUGV("SemiFSImpl::open() called with invalid filename\n");
+            return FileImplPtr();
+        }
+        // Mode conversion https://developer.arm.com/documentation/dui0471/m/what-is-semihosting-/sys-open--0x01-?lang=en
+        int mode = 1; // "rb"
+        if (accessMode == AM_READ) {
+            mode = 1; // "rb"
+        } else if (accessMode == AM_WRITE) {
+            if (openMode & OM_APPEND) {
+                mode = 9; // "ab";
+            } else {
+                mode = 5; // "wb";
+            }
+        } else {
+            if (openMode & OM_TRUNCATE) {
+                mode = 7; // "w+b";
+            } else if (openMode & OM_APPEND) {
+                mode = 3; // "r+b"
+            } else {
+                mode = 11; // "a+b";
+            }
+        }
+        uint32_t a[3];
+        a[0] = (uint32_t)path;
+        a[1] = mode;
+        a[2] = strlen(path);
+        int handle = Semihost(SEMIHOST_SYS_OPEN, a);
+        if (handle < 0) {
+            return FileImplPtr();
+        }
+        return std::make_shared<SemiFSFileImpl>(handle, path, (accessMode & AM_WRITE) ? true : false);
+    }
+
+    bool exists(const char* path) override {
+        File f = open(path, OM_DEFAULT, AM_READ);
+        return f ? true : false;
+    }
+
+    DirImplPtr openDir(const char* path) override {
+        // No directories
+        return DirImplPtr();
+    }
+
+    bool rename(const char* pathFrom, const char* pathTo) override {
+        uint32_t a[4];
+        a[0] = (uint32_t)pathFrom;
+        a[1] = strlen(pathFrom);
+        a[2] = (uint32_t)pathTo;
+        a[3] = strlen(pathTo);
+        return !Semihost(SEMIHOST_SYS_RENAME, a);
+    }
+
+    bool info(FSInfo& info) override {
+        // Not available
+        return false;
+    }
+
+    bool remove(const char* path) override {
+        uint32_t a[2];
+        a[0] = (uint32_t)path;
+        a[1] = strlen(path);
+        return !Semihost(SEMIHOST_SYS_REMOVE, a);
+    }
+
+    bool mkdir(const char* path) override {
+        // No mkdir
+        return false;
+    }
+
+    bool rmdir(const char* path) override {
+        // No rmdir
+        return false;
+    }
+
+    bool stat(const char *path, FSStat *st) override {
+        if (!path || !path[0]) {
+            return false;
+        }
+        uint32_t a[3];
+        a[0] = (uint32_t)path;
+        a[1] = 0; // READ
+        a[2] = strlen(path);
+        int fn = Semihost(SEMIHOST_SYS_OPEN, a);
+        if (fn < 0) {
+            return false;
+        }
+        bzero(st, sizeof(*st));
+        a[0] = fn;
+        st->size = Semihost(SEMIHOST_SYS_FLEN, a);
+        a[0] = fn;
+        Semihost(SEMIHOST_SYS_CLOSE, a);
+        return true;
+    }
+
+    bool setConfig(const FSConfig &cfg) override {
+        return true;
+    }
+
+    bool begin() override {
+        /* noop */
+        return true;
+    }
+
+    void end() override {
+        /* noop */
+    }
+
+    bool format() override {
+        return false;
+    }
+};
+
+
+}; // namespace sdfs
+
+#if !defined(NO_GLOBAL_INSTANCES) && !defined(NO_GLOBAL_SEMIFS)
+extern FS SemiFS;
+using semifs::SemiFSConfig;
+#endif
--- a/cores/rp2040/Semihosting.cpp
+++ b/cores/rp2040/Semihosting.cpp
@ -0,0 +1,6 @@
+#include "Semihosting.h"
+#include "SerialSemi.h"
+#include "SemiFS.h"
+
+SerialSemiClass SerialSemi;
+FS SemiFS = FS(FSImplPtr(new semifs::SemiFSImpl()));
--- a/cores/rp2040/Semihosting.h
+++ b/cores/rp2040/Semihosting.h
@ -0,0 +1,113 @@
+/*
+    Semihosting.h - Semihosting for Serial and FS access via GDB
+    Copyright (c) 2024 Earle F. Philhower, III.  All rights reserved.
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#pragma once
+
+// Be sure to only use this library with GDB and to enable the ARM semihosting support
+// (gdb) monitor arm semihosting enable
+
+// Input/output will be handled by OpenOCD
+
+/**
+    @brief Semihosting host API opcodes, from https://developer.arm.com/documentation/dui0471/g/Semihosting/Semihosting-operations?lang=en
+*/
+typedef enum {
+    SEMIHOST_SYS_CLOSE = 0x02,
+    SEMIHOST_SYS_CLOCK = 0x10,
+    SEMIHOST_SYS_ELAPSED = 0x30,
+    SEMIHOST_SYS_ERRNO = 0x13,
+    SEMIHOST_SYS_FLEN = 0x0C,
+    SEMIHOST_SYS_GET_CMDLINE = 0x15,
+    SEMIHOST_SYS_HEAPINFO = 0x16,
+    SEMIHOST_SYS_ISERROR = 0x08,
+    SEMIHOST_SYS_ISTTY = 0x09,
+    SEMIHOST_SYS_OPEN = 0x01,
+    SEMIHOST_SYS_READ = 0x06,
+    SEMIHOST_SYS_READC = 0x07,
+    SEMIHOST_SYS_REMOVE = 0x0E,
+    SEMIHOST_SYS_RENAME = 0x0F,
+    SEMIHOST_SYS_SEEK = 0x0A,
+    SEMIHOST_SYS_SYSTEM = 0x12,
+    SEMIHOST_SYS_TICKFREQ = 0x31,
+    SEMIHOST_SYS_TIME = 0x11,
+    SEMIHOST_SYS_TMPNAM = 0x0D,
+    SEMIHOST_SYS_WRITE = 0x05,
+    SEMIHOST_SYS_WRITEC = 0x03,
+    SEMIHOST_SYS_WRITE0 = 0x04
+} SEMIHOST_OPCODES;
+
+#ifdef __arm__
+
+/**
+    @brief Execute a semihosted request, from https://github.com/ErichStyger/mcuoneclipse/blob/master/Examples/MCUXpresso/FRDM-K22F/FRDM-K22F_Semihosting/source/McuSemihost.c
+
+    @param [in] reason Opcode to execute
+    @param [in] arg Any arguments for the opcode
+    @returns Result of operation
+*/
+static inline int __attribute__((always_inline)) Semihost(int reason, void *arg) {
+    int value;
+    __asm volatile(
+        "mov r0, %[rsn] \n" /* place semihost operation code into R0 */
+        "mov r1, %[arg] \n" /* R1 points to the argument array */
+        "bkpt 0xAB      \n" /* call debugger */
+        "mov %[val], r0 \n" /* debugger has stored result code in R0 */
+
+        : [val] "=r"(value)  /* outputs */
+        : [rsn] "r"(reason), [arg] "r"(arg)   /* inputs */
+        : "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc" /* clobber */
+    );
+    return value; /* return result code, stored in R0 */
+}
+#else
+
+/**
+    @brief Execute a semihosted request, from https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/n-5VQ9PHZ4w/m/KbzH5t9MBgAJ
+
+    @param [in] reason Opcode to execute
+    @param [in] argPack Any arguments for the opcode
+    @returns Result of operation
+*/
+static inline int __attribute__((always_inline)) Semihost(int reason, void *argPack) {
+    register int value asm("a0") = reason;
+    register void *ptr asm("a1") = argPack;
+    asm volatile(
+        // Force 16-byte alignment to make sure that the 3 instructions fall
+        // within the same virtual page.
+        " .balign 16    \n"
+        " .option push \n"
+        // Force non-compressed RISC-V instructions
+        " .option norvc \n"
+        // semihosting e-break sequence
+        " slli x0, x0, 0x1f \n" // # Entry NOP
+        " ebreak \n"			// # Break to debugger
+        " srai x0, x0,  0x7 \n" // # NOP encoding the semihosting call number 7
+        " .option pop \n"
+        /*mark (value) as an output operand*/
+        : "=r"(value) /* Outputs */
+        // The semihosting call number is passed in a0, and the argument in a1.
+        : "0"(value), "r"(ptr) /* Inputs */
+        // The "memory" clobber makes GCC assume that any memory may be arbitrarily read or written by the asm block,
+        //  so will prevent the compiler from reordering loads or stores across it, or from caching memory values in registers across it.
+        //  The "memory" clobber also prevents the compiler from removing the asm block as dead code.
+        : "memory" /* Clobbers */
+    );
+    return value;
+}
+#endif
--- a/cores/rp2040/SerialPIO.cpp
+++ b/cores/rp2040/SerialPIO.cpp
@ -68,13 +68,10 @@ static PIOProgram *_getRxProgram(int bits) {
 }
 // ------------------------------------------------------------------------

-// TODO - this works, but there must be a faster/better way...
-static int _parity(int bits, int data) {
-    int p = 0;
-    for (int b = 0; b < bits; b++) {
-        p ^= (data & (1 << b)) ? 1 : 0;
-    }
-    return p;
+static int __not_in_flash_func(_parity)(int data) {
+    data ^= data >> 4;
+    data &= 0xf;
+    return (0x6996 >> data) & 1;
 }

 // We need to cache generated SerialPIOs so we can add data to them from
@ -98,20 +95,16 @@ void __not_in_flash_func(SerialPIO::_handleIRQ)() {
    }
    while (!pio_sm_is_rx_fifo_empty(_rxPIO, _rxSM)) {
        uint32_t decode = _rxPIO->rxf[_rxSM];
-        decode >>= 33 - _rxBits;
-        uint32_t val = 0;
-        for (int b = 0; b < _bits + 1; b++) {
-            val |= (decode & (1 << (b * 2))) ? 1 << b : 0;
-        }
+        uint32_t val = decode >> (32 - _rxBits - 1);
        if (_parity == UART_PARITY_EVEN) {
-            int p = ::_parity(_bits, val);
+            int p = ::_parity(val);
            int r = (val & (1 << _bits)) ? 1 : 0;
            if (p != r) {
                // TODO - parity error
                continue;
            }
        } else if (_parity == UART_PARITY_ODD) {
-            int p = ::_parity(_bits, val);
+            int p = ::_parity(val);
            int r = (val & (1 << _bits)) ? 1 : 0;
            if (p == r) {
                // TODO - parity error
@ -234,7 +227,7 @@ void SerialPIO::begin(unsigned long baud, uint16_t config) {
        _writer = 0;
        _reader = 0;

-        _rxBits = 2 * (_bits + _stop + (_parity != UART_PARITY_NONE ? 1 : 0) + 1) - 1;
+        _rxBits = _bits + (_parity != UART_PARITY_NONE ? 1 : 0);
        _rxPgm = _getRxProgram(_rxBits);
        int off;
        if (!_rxPgm->prepare(&_rxPIO, &_rxSM, &off, _rx, 1)) {
@ -249,7 +242,7 @@ void SerialPIO::begin(unsigned long baud, uint16_t config) {
        pio_sm_clear_fifos(_rxPIO, _rxSM); // Remove any existing data

        // Put phase divider into OSR w/o using add'l program memory
-        pio_sm_put_blocking(_rxPIO, _rxSM, clock_get_hz(clk_sys) / (_baud * 2) - 7 /* insns in PIO halfbit loop */);
+        pio_sm_put_blocking(_rxPIO, _rxSM, clock_get_hz(clk_sys) / (_baud * 2) - 3);
        pio_sm_exec(_rxPIO, _rxSM, pio_encode_pull(false, false));

        // Join the TX FIFO to the RX one now that we don't need it
@ -378,10 +371,10 @@ size_t SerialPIO::write(uint8_t c) {
    if (_parity == UART_PARITY_NONE) {
        val |= 7 << _bits; // Set 2 stop bits, the HW will only transmit the required number
    } else if (_parity == UART_PARITY_EVEN) {
-        val |= ::_parity(_bits, c) << _bits;
+        val |= ::_parity(c) << _bits;
        val |= 7 << (_bits + 1);
    } else {
-        val |= (1 ^ ::_parity(_bits, c)) << _bits;
+        val |= (1 ^ ::_parity(c)) << _bits;
        val |= 7 << (_bits + 1);
    }
    val <<= 1;  // Start bit = low
--- a/cores/rp2040/SerialPIO.h
+++ b/cores/rp2040/SerialPIO.h
@ -29,7 +29,7 @@

 extern "C" typedef struct uart_inst uart_inst_t;

-class SerialPIO : public HardwareSerial {
+class SerialPIO : public arduino::HardwareSerial {
 public:
    static const pin_size_t NOPIN = 0xff; // Use in constructor to disable RX or TX unit
    SerialPIO(pin_size_t tx, pin_size_t rx, size_t fifoSize = 32);
--- a/cores/rp2040/SerialSemi.h
+++ b/cores/rp2040/SerialSemi.h
@ -0,0 +1,98 @@
+/*
+    SerialSemi.h - Serial port over Semihosting for ARM
+    Copyright (c) 2024 Earle F. Philhower, III.  All rights reserved.
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#pragma once
+
+#include "Semihosting.h"
+
+#include "Arduino.h"
+#include "api/HardwareSerial.h"
+
+class SerialSemiClass : public arduino::HardwareSerial {
+public:
+    SerialSemiClass() {
+        /* noop */
+    }
+
+    ~SerialSemiClass() {
+        /* noop */
+    }
+
+    void begin(unsigned long baudIgnored = 115200) override {
+        (void)baudIgnored;
+    }
+
+    void begin(unsigned long baudIgnored, uint16_t configIgnored) override {
+        (void)baudIgnored;
+        (void)configIgnored;
+    }
+
+    void end() override {
+        /* noop */
+    }
+
+    virtual int peek() override {
+        // Can't really peek on SH, so fake it best we can
+        if (!_peeked) {
+            _peekedChar = read();
+            _peeked = true;
+        }
+        return _peekedChar;
+    }
+
+    virtual int read() override {
+        if (_peeked) {
+            _peeked = false;
+            return _peekedChar;
+        }
+        return Semihost(SEMIHOST_SYS_READC, nullptr);
+    }
+
+    virtual int available() override {
+        // Can't really tell with SH, so always true.  Buyer beware
+        return 1;
+    }
+
+    virtual int availableForWrite() override {
+        // Can't really tell with SH, so always true.  Buyer beware
+        return 1;
+    }
+
+    virtual void flush() override {
+        /* noop */
+    }
+
+    virtual size_t write(uint8_t c) override {
+        int32_t param = c;
+        Semihost(SEMIHOST_SYS_WRITEC, &param);
+        return 1;
+    }
+
+    using Print::write;
+
+    operator bool() override {
+        return true;
+    }
+
+private:
+    bool _peeked = false;
+    uint8_t _peekedChar;
+};
+
+extern SerialSemiClass SerialSemi;
--- a/cores/rp2040/SerialUART.cpp
+++ b/cores/rp2040/SerialUART.cpp
@ -32,15 +32,20 @@ extern void serialEvent1() __attribute__((weak));
 extern void serialEvent2() __attribute__((weak));

 bool SerialUART::setRX(pin_size_t pin) {
-#ifdef PICO_RP2350B
-    constexpr uint64_t valid[2] = { __bitset({1, 13, 17, 29, 33, 45}) /* UART0 */,
-                                    __bitset({5, 9, 21, 25, 37, 41})  /* UART1 */
+#if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
+    constexpr uint64_t valid[2] = { __bitset({1, 3, 13, 15, 17, 19, 29, 31, 33, 35, 45, 47}) /* UART0 */,
+                                    __bitset({5, 7, 9, 11, 21, 23, 25, 27, 37, 39, 41, 43})  /* UART1 */
+                                  };
+#elif defined(PICO_RP2350)
+    constexpr uint64_t valid[2] = { __bitset({1, 3, 13, 15, 17, 19, 29})     /* UART0 */,
+                                    __bitset({5, 7, 9, 11, 21, 23, 25, 27})  /* UART1 */
                                  };
 #else
    constexpr uint64_t valid[2] = { __bitset({1, 13, 17, 29}) /* UART0 */,
                                    __bitset({5, 9, 21, 25})  /* UART1 */
                                  };
 #endif
+
    if ((!_running) && ((1LL << pin) & valid[uart_get_index(_uart)])) {
        _rx = pin;
        return true;
@ -59,9 +64,13 @@ bool SerialUART::setRX(pin_size_t pin) {
 }

 bool SerialUART::setTX(pin_size_t pin) {
-#ifdef PICO_RP2350B
-    constexpr uint64_t valid[2] = { __bitset({0, 12, 16, 28, 32, 44}) /* UART0 */,
-                                    __bitset({4, 8, 20, 24, 36, 40})  /* UART1 */
+#if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
+    constexpr uint64_t valid[2] = { __bitset({0, 2, 12, 14, 16, 18, 28, 30, 32, 34, 44, 46}) /* UART0 */,
+                                    __bitset({4, 6, 8, 10, 20, 22, 24, 26, 36, 38, 40, 42})  /* UART1 */
+                                  };
+#elif defined(PICO_RP2350)
+    constexpr uint64_t valid[2] = { __bitset({0, 2, 12, 14, 16, 18, 28})     /* UART0 */,
+                                    __bitset({4, 6, 8, 10, 20, 22, 24, 26})  /* UART1 */
                                  };
 #else
    constexpr uint64_t valid[2] = { __bitset({0, 12, 16, 28}) /* UART0 */,
@ -86,7 +95,7 @@ bool SerialUART::setTX(pin_size_t pin) {
 }

 bool SerialUART::setRTS(pin_size_t pin) {
-#ifdef PICO_RP2350B
+#if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
    constexpr uint64_t valid[2] = { __bitset({3, 15, 19, 31, 35, 47}) /* UART0 */,
                                    __bitset({7, 11, 23, 27, 39, 43})  /* UART1 */
                                  };
@ -113,7 +122,7 @@ bool SerialUART::setRTS(pin_size_t pin) {
 }

 bool SerialUART::setCTS(pin_size_t pin) {
-#ifdef PICO_RP2350B
+#if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
    constexpr uint64_t valid[2] = { __bitset({2, 14, 18, 30, 34, 46}) /* UART0 */,
                                    __bitset({6, 10, 22, 26, 38, 42})  /* UART1 */
                                  };
@ -170,6 +179,41 @@ SerialUART::SerialUART(uart_inst_t *uart, pin_size_t tx, pin_size_t rx, pin_size
 static void _uart0IRQ();
 static void _uart1IRQ();

+// Does the selected TX/RX need UART_AUX function (rp2350)
+static gpio_function_t __gpioFunction(int pin) {
+    switch (pin) {
+#if defined(PICO_RP2350) && !PICO_RP2350A
+    case 2:
+    case 3:
+    case 6:
+    case 7:
+    case 10:
+    case 11:
+    case 14:
+    case 15:
+    case 18:
+    case 19:
+    case 22:
+    case 23:
+    case 26:
+    case 27:
+    case 30:
+    case 31:
+    case 34:
+    case 35:
+    case 38:
+    case 39:
+    case 42:
+    case 43:
+    case 46:
+    case 47:
+        return GPIO_FUNC_UART_AUX;
+#endif
+    default:
+        return GPIO_FUNC_UART;
+    }
+}
+
 void SerialUART::begin(unsigned long baud, uint16_t config) {
    if (_running) {
        end();
@ -180,9 +224,9 @@ void SerialUART::begin(unsigned long baud, uint16_t config) {

    _fcnTx = gpio_get_function(_tx);
    _fcnRx = gpio_get_function(_rx);
-    gpio_set_function(_tx, GPIO_FUNC_UART);
+    gpio_set_function(_tx, __gpioFunction(_tx));
    gpio_set_outover(_tx, _invertTX ? 1 : 0);
-    gpio_set_function(_rx, GPIO_FUNC_UART);
+    gpio_set_function(_rx, __gpioFunction(_rx));
    gpio_set_inover(_rx, _invertRX ? 1 : 0);
    if (_rts != UART_PIN_NOT_DEFINED) {
        _fcnRts = gpio_get_function(_rts);
--- a/cores/rp2040/SerialUART.h
+++ b/cores/rp2040/SerialUART.h
@ -29,7 +29,7 @@
 extern "C" typedef struct uart_inst uart_inst_t;

 #define UART_PIN_NOT_DEFINED      (255u)
-class SerialUART : public HardwareSerial {
+class SerialUART : public arduino::HardwareSerial {
 public:
    SerialUART(uart_inst_t *uart, pin_size_t tx, pin_size_t rx, pin_size_t rts = UART_PIN_NOT_DEFINED, pin_size_t cts = UART_PIN_NOT_DEFINED);

--- a/cores/rp2040/SerialUSB.h
+++ b/cores/rp2040/SerialUSB.h
@ -24,7 +24,7 @@
 #include "api/HardwareSerial.h"
 #include <stdarg.h>

-class SerialUSB : public HardwareSerial {
+class SerialUSB : public arduino::HardwareSerial {
 public:
    SerialUSB() { }
    void begin(unsigned long baud = 115200) override;
--- a/cores/rp2040/SoftwareSerial.h
+++ b/cores/rp2040/SoftwareSerial.h
@ -22,9 +22,18 @@

 #include "SerialPIO.h"

+/**
+    @brief Implements a UART port using PIO for input and output
+*/
 class SoftwareSerial : public SerialPIO {
 public:
-    // Note the rx/tx pins are swapped in PIO vs SWSerial
+    /**
+        @brief Constructs a PIO-based UART
+
+        @param [in] rx GPIO for RX pin or -1 for transmit-only
+        @param [in] tx GPIO for TX pin or -1 for receive-only
+        @param [in] invert True to invert the receive and transmit lines
+    */
    SoftwareSerial(pin_size_t rx, pin_size_t tx, bool invert = false) : SerialPIO(tx, rx) {
        _invert = invert;
    }
@ -32,18 +41,37 @@ public:
    ~SoftwareSerial() {
    }

+    /**
+        @brief Starts the PIO UART
+
+        @param [in] baud Serial bit rate
+    */
    virtual void begin(unsigned long baud = 115200) override {
        begin(baud, SERIAL_8N1);
    };

+    /**
+        @brief Starts the PIO UART
+
+        @param [in] baud Serial bit rate
+        @param [in] config Start/Stop/Len configuration (i.e. SERIAL_8N1 or SERIAL_7E2)
+    */
    void begin(unsigned long baud, uint16_t config) override {
        setInvertTX(_invert);
        setInvertRX(_invert);
        SerialPIO::begin(baud, config);
    }

+    /**
+        @brief No-op on this core
+    */
    void listen() { /* noop */ }

+    /**
+        @brief No-op on this core
+
+        @returns True always
+    */
    bool isListening() {
        return true;
    }
--- a/cores/rp2040/Tone.cpp
+++ b/cores/rp2040/Tone.cpp
@ -71,10 +71,7 @@ void tone(uint8_t pin, unsigned int frequency, unsigned long duration) {
        return;    // Weird deadlock case
    }

-    int us = 1'000'000 / frequency / 2;
-    if (us < 5) {
-        us = 5;
-    }
+    unsigned int delay = (RP2040::f_cpu() + frequency) / (frequency * 2) - 3; // rounded
    auto entry = _toneMap.find(pin);
    Tone *newTone;
    if (entry == _toneMap.end()) {
@ -99,7 +96,7 @@ void tone(uint8_t pin, unsigned int frequency, unsigned long duration) {
        tone2_program_init(newTone->pio, newTone->sm, newTone->off, pin);
    }
    pio_sm_clear_fifos(newTone->pio, newTone->sm); // Remove any old updates that haven't yet taken effect
-    pio_sm_put_blocking(newTone->pio, newTone->sm, RP2040::usToPIOCycles(us));
+    pio_sm_put_blocking(newTone->pio, newTone->sm, delay);
    pio_sm_exec(newTone->pio, newTone->sm, pio_encode_pull(false, false));
    pio_sm_exec(newTone->pio, newTone->sm, pio_encode_mov(pio_x, pio_osr));
    pio_sm_set_enabled(newTone->pio, newTone->sm, true);
--- a/cores/rp2040/_freertos.h
+++ b/cores/rp2040/_freertos.h
@ -30,32 +30,36 @@ extern bool __isFreeRTOS;
 // FreeRTOS has been set up
 extern volatile bool __freeRTOSinitted;

+#ifdef __cplusplus
 extern "C" {
-    struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */
-    typedef struct QueueDefinition   * QueueHandle_t;
-    typedef QueueHandle_t SemaphoreHandle_t;
-    typedef int32_t BaseType_t;
+#endif // __cplusplus
+struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */
+typedef struct QueueDefinition   * QueueHandle_t;
+typedef QueueHandle_t SemaphoreHandle_t;
+typedef int32_t BaseType_t;

-    extern bool __freertos_check_if_in_isr() __attribute__((weak));
+extern bool __freertos_check_if_in_isr() __attribute__((weak));

-    extern SemaphoreHandle_t __freertos_mutex_create() __attribute__((weak));
-    extern SemaphoreHandle_t _freertos_recursive_mutex_create() __attribute__((weak));
+extern SemaphoreHandle_t __freertos_mutex_create() __attribute__((weak));
+extern SemaphoreHandle_t _freertos_recursive_mutex_create() __attribute__((weak));

-    extern void __freertos_mutex_take(SemaphoreHandle_t mtx) __attribute__((weak));
+extern void __freertos_mutex_take(SemaphoreHandle_t mtx) __attribute__((weak));

-    extern int __freertos_mutex_take_from_isr(SemaphoreHandle_t mtx, BaseType_t* pxHigherPriorityTaskWoken) __attribute__((weak));
-    extern int __freertos_mutex_try_take(SemaphoreHandle_t mtx) __attribute__((weak));
-    extern void __freertos_mutex_give(SemaphoreHandle_t mtx) __attribute__((weak));
-    extern void __freertos_mutex_give_from_isr(SemaphoreHandle_t mtx, BaseType_t* pxHigherPriorityTaskWoken) __attribute__((weak));
+extern int __freertos_mutex_take_from_isr(SemaphoreHandle_t mtx, BaseType_t* pxHigherPriorityTaskWoken) __attribute__((weak));
+extern int __freertos_mutex_try_take(SemaphoreHandle_t mtx) __attribute__((weak));
+extern void __freertos_mutex_give(SemaphoreHandle_t mtx) __attribute__((weak));
+extern void __freertos_mutex_give_from_isr(SemaphoreHandle_t mtx, BaseType_t* pxHigherPriorityTaskWoken) __attribute__((weak));

-    extern void __freertos_recursive_mutex_take(SemaphoreHandle_t mtx) __attribute__((weak));
-    extern int __freertos_recursive_mutex_try_take(SemaphoreHandle_t mtx) __attribute__((weak));
-    extern void __freertos_recursive_mutex_give(SemaphoreHandle_t mtx) __attribute__((weak));
+extern void __freertos_recursive_mutex_take(SemaphoreHandle_t mtx) __attribute__((weak));
+extern int __freertos_recursive_mutex_try_take(SemaphoreHandle_t mtx) __attribute__((weak));
+extern void __freertos_recursive_mutex_give(SemaphoreHandle_t mtx) __attribute__((weak));

-    extern void __freertos_idle_other_core() __attribute__((weak));
-    extern void __freertos_resume_other_core() __attribute__((weak));
+extern void __freertos_idle_other_core() __attribute__((weak));
+extern void __freertos_resume_other_core() __attribute__((weak));

-    extern void __freertos_task_exit_critical() __attribute__((weak));
-    extern void __freertos_task_enter_critical() __attribute__((weak));
+extern void __freertos_task_exit_critical() __attribute__((weak));
+extern void __freertos_task_enter_critical() __attribute__((weak));
+#ifdef __cplusplus
 }
 extern SemaphoreHandle_t __get_freertos_mutex_for_ptr(mutex_t *m, bool recursive = false);
+#endif // __cplusplus
--- a/cores/rp2040/ccount.pio.h
+++ b/cores/rp2040/ccount.pio.h
@ -28,7 +28,7 @@ static const struct pio_program ccount_program = {
    .instructions = ccount_program_instructions,
    .length = 2,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = ccount_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
--- a/cores/rp2040/cyw43_wrappers.h
+++ b/cores/rp2040/cyw43_wrappers.h
@ -23,11 +23,15 @@
 #include <pico/cyw43_driver.h>

 extern bool __isPicoW;
+#ifdef __cplusplus
 extern "C" {
-    void init_cyw43_wifi();
-    void __lockBluetooth();
-    void __unlockBluetooth();
-    void cyw43_pinMode(pin_size_t pin, PinMode mode);
-    void cyw43_digitalWrite(pin_size_t pin, PinStatus val);
-    PinStatus cyw43_digitalRead(pin_size_t pin);
+#endif
+void init_cyw43_wifi();
+void __lockBluetooth();
+void __unlockBluetooth();
+void cyw43_pinMode(pin_size_t pin, PinMode mode);
+void cyw43_digitalWrite(pin_size_t pin, PinStatus val);
+PinStatus cyw43_digitalRead(pin_size_t pin);
+#ifdef __cplusplus
 }
+#endif
--- a/cores/rp2040/flash_wrapper.cpp
+++ b/cores/rp2040/flash_wrapper.cpp
@ -1,95 +0,0 @@
-/*
-    Flash wrappers to protect PSRAM access on the RP2350
-
-    Copyright (c) 2024 Earle F. Philhower, III <earlephilhower@yahoo.com>
-
-    This library is free software; you can redistribute it and/or
-    modify it under the terms of the GNU Lesser General Public
-    License as published by the Free Software Foundation; either
-    version 2.1 of the License, or (at your option) any later version.
-
-    This library is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-    Lesser General Public License for more details.
-
-    You should have received a copy of the GNU Lesser General Public
-    License along with this library; if not, write to the Free Software
-    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-*/
-#include <Arduino.h>
-#include <hardware/flash.h>
-
-#ifdef PICO_RP2350
-#include <hardware/structs/qmi.h>
-#endif
-
-#if defined(PICO_RP2350) && defined(RP2350_PSRAM_CS)
-static void __no_inline_not_in_flash_func(flushcache)() {
-    // From https://forums.raspberrypi.com/viewtopic.php?t=378249#p2263677
-    // Perform clean-by-set/way on all lines
-    for (uint32_t i = 0; i < 2048; ++i) {
-        // Use the upper 16k of the maintenance space (0x1bffc000 through 0x1bffffff):
-        *(volatile uint8_t*)(XIP_SRAM_BASE + (XIP_MAINTENANCE_BASE - XIP_BASE) + i * 8u + 0x1u) = 0;
-    }
-}
-#elif defined(PICO_RP2350)
-static void __no_inline_not_in_flash_func(flushcache)() {
-    // Null
-}
-#endif
-
-
-extern "C" {
-    extern void __real_flash_range_erase(uint32_t flash_offs, size_t count);
-    void __wrap_flash_range_erase(uint32_t flash_offs, size_t count) {
-#ifdef PICO_RP2350
-        auto s = qmi_hw->m[1];
-        flushcache();
-#endif
-        __real_flash_range_erase(flash_offs, count);
-#ifdef PICO_RP2350
-        qmi_hw->m[1] = s;
-        __compiler_memory_barrier();
-#endif
-    }
-
-    extern void __real_flash_range_program(uint32_t flash_offs, const uint8_t *data, size_t count);
-    void __wrap_flash_range_program(uint32_t flash_offs, const uint8_t *data, size_t count) {
-#ifdef PICO_RP2350
-        auto s = qmi_hw->m[1];
-        flushcache();
-#endif
-        __real_flash_range_program(flash_offs, data, count);
-#ifdef PICO_RP2350
-        qmi_hw->m[1] = s;
-        __compiler_memory_barrier();
-#endif
-    }
-
-    extern void __real_flash_get_unique_id(uint8_t *id_out);
-    void __wrap_flash_get_unique_id(uint8_t *id_out) {
-#ifdef PICO_RP2350
-        auto s = qmi_hw->m[1];
-        flushcache();
-#endif
-        __real_flash_get_unique_id(id_out);
-#ifdef PICO_RP2350
-        qmi_hw->m[1] = s;
-        __compiler_memory_barrier();
-#endif
-    }
-
-    extern void __real_flash_do_cmd(const uint8_t *txbuf, uint8_t *rxbuf, size_t count);
-    void __wrap_flash_do_cmd(const uint8_t *txbuf, uint8_t *rxbuf, size_t count) {
-#ifdef PICO_RP2350
-        auto s = qmi_hw->m[1];
-        flushcache();
-#endif
-        __real_flash_do_cmd(txbuf, rxbuf, count);
-#ifdef PICO_RP2350
-        qmi_hw->m[1] = s;
-        __compiler_memory_barrier();
-#endif
-    }
-};
--- a/cores/rp2040/gprof_gmon.c
+++ b/cores/rp2040/gprof_gmon.c
@ -0,0 +1,470 @@
+/*  -
+    Copyright (c) 1983, 1992, 1993
+ 	The Regents of the University of California.  All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+    1. Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in the
+      documentation and/or other materials provided with the distribution.
+    4. Neither the name of the University nor the names of its contributors
+      may be used to endorse or promote products derived from this software
+      without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+    ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+    ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+    FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+    DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+    OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+    LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+    OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+    SUCH DAMAGE.
+*/
+
+// This code is built as a C file because otherwise G++ would add profiling
+// code to the preamble of these functions as well, leading to an infinite
+// loop in the mcount routine.  Because the Arduino IDE can't (easily)
+// apply different compile parameters to different files, we set all C++
+// files to "-pg" but leave all C files uninstrumented.
+
+// Original code and organization taken from https://mcuoneclipse.com/2015/08/23/tutorial-using-gnu-profiling-gprof-with-arm-cortex-m/
+
+#include <Arduino.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+// Frequency of sampling PC
+#ifndef GMON_HZ
+#define GMON_HZ 10000
+#endif
+
+// Fraction of text space to allocate for histogram counters here, 1/2
+#ifndef HISTFRACTION
+#ifdef PICO_RP2350
+#define HISTFRACTION    4 // Every 8 bytes of .text
+#else
+#define HISTFRACTION    8 // Every 16 bytes of .text
+#endif
+#endif
+
+// Fraction of text space to allocate for from hash buckets.
+// The value of HASHFRACTION is based on the minimum number of bytes
+// of separation between two subroutine call points in the object code.
+// Given MIN_SUBR_SEPARATION bytes of separation the value of
+// HASHFRACTION is calculated as:
+//
+//     HASHFRACTION = MIN_SUBR_SEPARATION / (2 * sizeof(short) - 1);
+//
+// For example, on the VAX, the shortest two call sequence is:
+//
+//     calls   $0,(r0)
+//     calls   $0,(r0)
+//
+// which is separated by only three bytes, thus HASHFRACTION is
+// calculated as:
+//
+//     HASHFRACTION = 3 / (2 * 2 - 1) = 1
+//
+// Note that the division above rounds down, thus if MIN_SUBR_FRACTION
+// is less than three, this algorithm will not work!
+//
+// In practice, however, call instructions are rarely at a minimal
+// distance.  Hence, we will define HASHFRACTION to be 2 across all
+// architectures.  This saves a reasonable amount of space for
+// profiling data structures without (in practice) sacrificing
+// any granularity.
+#ifndef HASHFRACTION
+#define HASHFRACTION    2
+#endif
+
+// Percent of text space to allocate for tostructs with a minimum.
+#ifndef ARCDENSITY
+#define ARCDENSITY      2 // This is in percentage, relative to text size!
+#endif
+#define MINARCS          50
+#define MAXARCS          ((1 << (8 * sizeof(HISTCOUNTER))) - 2)
+
+
+
+// Histogram counters are unsigned shorts (according to the kernel)
+typedef uint16_t HISTCOUNTER; //#define HISTCOUNTER unsigned short
+
+// In the original profiler code selfpc and count are full 32 bits each
+// so the structure actually comes to 12 bytes due to padding (with 2
+// bytes wasted per entry).  We don't have that much to spare on the Picos,
+// so limit the recorded address to 16MB (which is the flash address
+// window, anyway) and the counts to 16M (saturating). This saves 4 bytes
+// (33%) per entry at the cost of some logic to expand/pack it.
+struct tostruct {
+    uint8_t selfpc[3]; // Callee address/program counter. The caller address is in froms[] array which points to tos[] array
+    uint8_t count[3];  // How many times it has been called
+    uint16_t link;     // Link to next entry in hash table. For tos[0] this points to the last used entry
+};
+
+
+typedef enum { PROFILE_NOT_INIT = 0, PROFILE_ON, PROFILE_OFF } PROFILE_State;
+struct profinfo {
+    PROFILE_State state;  // Profiling state
+    uint16_t *counter;    // Profiling counters
+    size_t lowpc, highpc; // Range to be profiled
+    uint32_t scale;       // Scale value of bins
+};
+// Global profinfo for profil() call
+static struct profinfo prof = { PROFILE_NOT_INIT, 0, 0, 0, 0 };
+
+
+// Possible states of profiling
+typedef enum { GMON_PROF_ON = 0, GMON_PROF_BUSY, GMON_PROF_ERROR, GMON_PROF_OFF } GMON_State;
+
+// The profiling data structures are housed in this structure.
+struct gmonparam {
+    int   state;
+    uint16_t   *kcount;   // Histogram PC sample array
+    size_t    kcountsize; // Size of kcount[] array in bytes
+    uint16_t   *froms;    // Array of hashed 'from' addresses. The 16bit value is an index into the tos[] array
+    size_t    fromssize;  // Size of froms[] array in bytes
+    struct tostruct *tos; // to struct, contains histogram counter
+    size_t    tossize;    // Size of tos[] array in bytes
+    long      tolimit;
+    size_t    lowpc;      // Low program counter of area
+    size_t    highpc;     // High program counter
+    size_t    textsize;   // Code size
+};
+static struct gmonparam _gmonparam = { GMON_PROF_OFF, NULL, 0, NULL, 0, NULL, 0, 0L, 0, 0, 0};
+
+
+static bool already_setup = false;  // Flag to indicate if we need to init
+static bool _perf_in_setup = false; // Are we currently trying to initialize? (avoid infinite recursion)
+int __profileMemSize = 0;           // Memory allocated by the profiler to store tables
+
+static int    s_scale = 0;
+#define SCALE_1_TO_1 0x10000L
+
+
+// Convert an addr to an index
+static inline __attribute__((always_inline)) size_t profidx(size_t pc, size_t base, size_t scale) {
+    size_t i = (pc - base) / 2;
+    return (unsigned long long int) i * scale / 65536;
+}
+
+// Sample the current program counter periodically
+#if defined(__riscv)
+// TODO - systick-like handler
+#else
+static void __no_inline_not_in_flash_func(_SystickHandler)(void) {
+    static size_t pc, idx; // Ensure in heap, not on stack
+    extern volatile bool __otherCoreIdled;
+
+    if (!__otherCoreIdled && (prof.state == PROFILE_ON)) {
+        pc = ((uint32_t*)(__builtin_frame_address(0)))[14];  // Get SP and use it to get the return address from stack
+        if ((pc >= prof.lowpc) && (pc < prof.highpc)) {
+            idx = profidx(pc, prof.lowpc, prof.scale);
+            prof.counter[idx]++;
+        }
+    }
+}
+#endif
+
+// Convert an index into an address
+static inline __attribute__((always_inline)) size_t profaddr(size_t idx, size_t base, size_t scale) {
+    return base + ((((unsigned long long)(idx) << 16) / (unsigned long long)(scale)) << 1);
+}
+
+// Start or stop profiling
+// Profiling goes into the SAMPLES buffer of size SIZE (which is treated as an array of uint16_ts of size size/2).
+// Each bin represents a range of pc addresses from OFFSET.  The number of pc addresses in a bin depends on SCALE.
+// (A scale of 65536 maps each bin to two addresses, A scale of 32768 maps each bin to 4 addresses, a scale of
+// 1 maps each bin to 128k address).  Scale may be 1 - 65536, or zero to turn off profiling
+static int __no_inline_not_in_flash_func(profile_ctl)(char *samples, size_t size, size_t offset, uint32_t scale) {
+    size_t maxbin;
+
+    if (scale > 65536) {
+        return -1;
+    }
+    prof.state = PROFILE_OFF;
+    if (scale) {
+        bzero(samples, size);
+        bzero(&prof, sizeof(prof));
+        maxbin = size >> 1;
+        prof.counter = (uint16_t*)samples;
+        prof.lowpc = offset;
+        prof.highpc = profaddr(maxbin, offset, scale);
+        prof.scale = scale;
+        prof.state = PROFILE_ON;
+    }
+    return 0;
+}
+
+// Control profiling. Profiling is what mcount checks to see if all the data structures are ready.
+static void __no_inline_not_in_flash_func(moncontrol)(int mode) {
+    if (mode) { // Start
+        profile_ctl((char *)_gmonparam.kcount, _gmonparam.kcountsize, _gmonparam.lowpc, s_scale);
+        _gmonparam.state = GMON_PROF_ON;
+    } else { // Stop
+        profile_ctl((char *)NULL, 0, 0, 0);
+        _gmonparam.state = GMON_PROF_OFF;
+    }
+}
+
+// General rounding functions
+static inline __attribute__((always_inline)) size_t rounddown(size_t x, size_t y) {
+    return (x / y) * y;
+}
+
+static inline __attribute__((always_inline)) size_t roundup(size_t x, size_t y) {
+    return ((x + y - 1) / y) * y;
+}
+
+// Allocate memory and set boundaries before any sampling is performed
+void __no_inline_not_in_flash_func(monstartup)(size_t lowpc, size_t highpc) {
+    register size_t o;
+    char *cp;
+    struct gmonparam *p = &_gmonparam;
+
+    // Round lowpc and highpc to multiples of the density we're using so the rest of the scaling (here and in gprof) stays in ints.
+    p->lowpc = rounddown(lowpc, HISTFRACTION * sizeof(HISTCOUNTER));
+    p->highpc = roundup(highpc, HISTFRACTION * sizeof(HISTCOUNTER));
+    p->textsize = p->highpc - p->lowpc;
+    p->kcountsize = p->textsize / HISTFRACTION;
+    p->fromssize = p->textsize / HASHFRACTION;
+    p->tolimit = p->textsize * ARCDENSITY / 100;
+    if (p->tolimit < MINARCS) {
+        p->tolimit = MINARCS;
+    } else if (p->tolimit > MAXARCS) {
+        p->tolimit = MAXARCS;
+    }
+    p->tossize = p->tolimit * sizeof(struct tostruct);
+    __profileMemSize = p->kcountsize + p->fromssize + p->tossize;
+#ifdef RP2350_PSRAM_CS
+    cp = pmalloc(__profileMemSize);
+#else
+    cp = malloc(__profileMemSize);
+#endif
+    if (cp == NULL) {
+        // OOM
+        already_setup = false;
+        return;
+    }
+
+    // Zero out cp as value will be added there
+    bzero(cp, p->kcountsize + p->fromssize + p->tossize);
+
+    p->tos = (struct tostruct *)cp;
+    cp += p->tossize;
+    p->kcount = (uint16_t *)cp;
+    cp += p->kcountsize;
+    p->froms = (uint16_t *)cp;
+
+    p->tos[0].link = 0;
+
+    o = p->highpc - p->lowpc;
+    if (p->kcountsize < o) {
+        s_scale = ((float)p->kcountsize / o) * SCALE_1_TO_1;
+    } else {
+        s_scale = SCALE_1_TO_1;
+    }
+    moncontrol(1); // Start
+}
+
+// Accessors for the selfpc and count fields
+static inline __attribute__((always_inline)) void setselfpc(struct tostruct *x, size_t d) {
+    x->selfpc[0] = d & 0xff;
+    x->selfpc[1] = (d >> 8) & 0xff;
+    x->selfpc[2] = (d >> 16) & 0xff;
+}
+
+static inline __attribute__((always_inline))void setcount(struct tostruct *x, size_t d) {
+    x->count[0] = d & 0xff;
+    x->count[1] = (d >> 8) & 0xff;
+    x->count[2] = (d >> 16) & 0xff;
+}
+
+static inline __attribute__((always_inline)) uint32_t getselfpc(const struct tostruct *x) {
+    return 0x10000000 | ((uint32_t)x->selfpc[0]) | (((uint32_t)x->selfpc[1]) << 8) | (((uint32_t)x->selfpc[2]) << 16);
+}
+
+static inline __attribute__((always_inline)) uint32_t getcount(const struct tostruct *x) {
+    return ((uint32_t)x->count[0]) | (((uint32_t)x->count[1]) << 8) | (((uint32_t)x->count[2]) << 16);
+}
+
+// Called by the GCC function shim (gprof_shim.S) on function entry to record an arc hit
+void __no_inline_not_in_flash_func(_mcount_internal)(uint32_t *frompcindex, uint32_t *selfpc) {
+    register struct tostruct *top;
+    register struct tostruct *prevtop;
+    register long            toindex;
+    struct gmonparam *p = &_gmonparam;
+
+    if (_perf_in_setup) {
+        // Avoid infinite recursion
+        return;
+    }
+
+    if (!already_setup) {
+        extern char __flash_binary_start; // Start of flash
+        extern char __etext;              // End of .text
+        already_setup = true;
+        _perf_in_setup = true;
+        monstartup((uint32_t)&__flash_binary_start, (uint32_t)&__etext);
+        _perf_in_setup = false;
+    }
+    // Check that we are profiling and that we aren't recursively invoked.
+    if (p->state != GMON_PROF_ON) {
+        return;
+    }
+    p->state++;
+    // Check that frompcindex is a reasonable pc value.
+    frompcindex = (uint32_t*)((long)frompcindex - (long)p->lowpc);
+    if ((unsigned long)frompcindex > p->textsize) {
+        goto done;
+    }
+    frompcindex = (uint32_t*)&p->froms[((long)frompcindex) / (HASHFRACTION * sizeof(*p->froms))];
+    toindex = *((uint16_t*)frompcindex); // Get froms[] value
+    if (toindex == 0) {
+        // First time traversing this arc
+        toindex = ++p->tos[0].link;  // The link of tos[0] points to the last used record in the array
+        if (toindex >= p->tolimit) { // More tos[] entries than we can handle!
+            goto overflow;
+        }
+        *((uint16_t*)frompcindex) = (uint16_t)toindex; // Store new 'to' value into froms[]
+        top = &p->tos[toindex];
+        setselfpc(top, (uint32_t)selfpc);
+        setcount(top, 1);
+        top->link = 0;
+        goto done;
+    }
+    top = &p->tos[toindex];
+    if (getselfpc(top) == (size_t)selfpc) {
+        // Arc at front of chain; usual case.
+        uint32_t cnt = getcount(top) + 1;
+        if (cnt >= 1 << 24) {
+            cnt = (1 << 24) - 1;
+        }
+        setcount(top, cnt);
+        goto done;
+    }
+    // Have to go looking down chain for it. top points to what we are looking at, prevtop points to previous top. We know it is not at the head of the chain.
+    for (; /* goto done */;) {
+        if (top->link == 0) {
+            // top is end of the chain and none of the chain had top->selfpc == selfpc, so we allocate a new tostruct and link it to the head of the chain.
+            toindex = ++p->tos[0].link;
+            if (toindex >= p->tolimit) {
+                goto overflow;
+            }
+            top = &p->tos[toindex];
+            setselfpc(top, (uint32_t)selfpc);
+            setcount(top, 1);
+            top->link = *((uint16_t*)frompcindex);
+            *(uint16_t*)frompcindex = (uint16_t)toindex;
+            goto done;
+        }
+        // Otherwise, check the next arc on the chain.
+        prevtop = top;
+        top = &p->tos[top->link];
+        if (getselfpc(top) == (size_t)selfpc) {
+            // Increment its count, move it to the head of the chain.
+            uint32_t cnt = getcount(top) + 1;
+            if (cnt >= 1 << 24) {
+                cnt = (1 << 24) - 1;
+            }
+            setcount(top, cnt);
+            toindex = prevtop->link;
+            prevtop->link = top->link;
+            top->link = *((uint16_t*)frompcindex);
+            *((uint16_t*)frompcindex) = (uint16_t)toindex;
+            goto done;
+        }
+    }
+done:
+    p->state--;
+    return;
+
+overflow:
+    p->state++; // Halt further profiling
+    return;
+}
+
+
+// Write out the GMON.OUT file using internal state
+void _writeProfile(int (*writeCB)(const void *data, int len)) {
+    struct gmonhdr {  // GMON.OUT header
+        size_t lpc;   // base pc address of sample buffer
+        size_t hpc;   // max pc address of sampled buffer
+        int ncnt;     // size of sample buffer (plus this header)
+        int version;  // version number
+        int profrate; // profiling clock rate
+        int spare[3]; // reserved
+    };
+    const unsigned int GMONVERSION = 0x00051879;
+    struct rawarc {     // Per-arc on-disk data format
+        size_t raw_frompc;
+        size_t raw_selfpc;
+        long   raw_count;
+    };
+    int fromindex;
+    int endfrom;
+    size_t frompc;
+    int toindex;
+    struct rawarc rawarc;
+    const int BS = 64;
+    struct rawarc rawarcbuff[BS];
+    int rawarcbuffptr = 0;
+    struct gmonparam *p = &_gmonparam;
+    struct gmonhdr hdr;
+
+    moncontrol(0); // Stop
+
+    hdr.lpc = p->lowpc;
+    hdr.hpc = p->highpc;
+    hdr.ncnt = p->kcountsize + sizeof(hdr);
+    hdr.version = GMONVERSION;
+    hdr.profrate = GMON_HZ;
+    writeCB((void *)&hdr, sizeof(hdr));
+    writeCB((void *)p->kcount, p->kcountsize);
+    endfrom = p->fromssize / sizeof(*p->froms);
+    for (fromindex = 0; fromindex < endfrom; fromindex++) {
+        if (p->froms[fromindex] == 0) {
+            continue;
+        }
+        frompc = p->lowpc;
+        frompc += fromindex * HASHFRACTION * sizeof(*p->froms);
+        for (toindex = p->froms[fromindex]; toindex != 0; toindex = p->tos[toindex].link) {
+            rawarc.raw_frompc = frompc;
+            rawarc.raw_selfpc = getselfpc(&p->tos[toindex]);
+            rawarc.raw_count = getcount(&p->tos[toindex]);
+            // Buffer up writes because Semihosting is really slow per write call
+            rawarcbuff[rawarcbuffptr++] = rawarc;
+            if (rawarcbuffptr == BS) {
+                writeCB((void *)rawarcbuff, BS * sizeof(struct rawarc));
+                rawarcbuffptr = 0;
+            }
+        }
+    }
+    // Write any remaining bits
+    if (rawarcbuffptr) {
+        writeCB((void *)rawarcbuff, rawarcbuffptr * sizeof(struct rawarc));
+    }
+}
+
+
+// These are referenced by RP2040Support.cpp and called by the runtime init SDK
+// Install a periodic PC sampler at the specified frequency
+#if defined(__riscv)
+void runtime_init_setup_profiling() {
+    // TODO - is there an equivalent?  Or do we need to build a timer IRQ here?
+}
+#else
+#include <hardware/exception.h>
+#include <hardware/structs/systick.h>
+void runtime_init_setup_profiling() {
+    exception_set_exclusive_handler(SYSTICK_EXCEPTION, _SystickHandler);
+    systick_hw->csr = 0x7;
+    systick_hw->rvr = (F_CPU / GMON_HZ) - 1;
+}
+#endif
--- a/cores/rp2040/gprof_shim.S
+++ b/cores/rp2040/gprof_shim.S
@ -0,0 +1,58 @@
+#if defined(__riscv)
+// Originally from https://github.com/sbzpro/riscv-gprof
+# define RSIZE 4
+
+.section .text
+.align 2
+.globl  _mcount
+ _mcount:
+  addi sp,sp,-4*RSIZE
+  sw ra, 3*RSIZE(sp)
+  mv  a1,ra
+  call _mcount_internal; //jal  _mcount_internal
+  lw ra,  3*RSIZE(sp)
+  addi sp,sp,4*RSIZE
+  ret
+#else
+/*
+ * profiler.S
+ *  Implements the gprof profiler arc counting function.
+ *  Created on: 06.08.2015
+ *      Author: Erich Styger
+ *  Modified for RP2040/RP2350 on Dec 3 2024 by Earle F. Philhower, III.
+ */
+    .syntax unified
+    .arch armv7-m
+    .cpu cortex-m0plus
+
+    .text
+    .thumb
+    .thumb_func
+    .align 2
+
+.globl __gnu_mcount_nc
+.type __gnu_mcount_nc, %function
+.section .time_critical
+
+__gnu_mcount_nc:
+// LR = to return to
+// SP = to-replace-LR with
+  push {r0, r1, r2, r3}
+  push {lr}
+
+  // Swap 24/0 
+  ldr r0, [sp, #20]
+  ldr r1, [sp, #0]
+  str r0, [sp, #0]
+  str r1, [sp, #20]
+
+  mov r1, lr
+  ldr r0, [sp, #0]     /* caller - at the top of the stack */
+  bl  _mcount_internal        /* when __gnu_mcount_nc is called */
+  pop {r0}
+  mov lr, r0
+  pop {r0, r1, r2, r3}
+  pop {pc}
+
+  .end __gnu_mcount_nc
+#endif
--- a/cores/rp2040/main.cpp
+++ b/cores/rp2040/main.cpp
@ -22,7 +22,11 @@
 #include "RP2040USB.h"
 #include <pico/stdlib.h>
 #include <pico/multicore.h>
+#include <hardware/vreg.h>
 #include <reent.h>
+#ifdef RP2350_PSRAM_CS
+#include "psram.h"
+#endif

 RP2040 rp2040;
 extern "C" {
@ -47,9 +51,14 @@ void initVariant() { }

 // Optional 2nd core setup and loop
 bool core1_separate_stack __attribute__((weak)) = false;
+bool core1_disable_systick __attribute__((weak)) = false;
 extern void setup1() __attribute__((weak));
 extern void loop1() __attribute__((weak));
 extern "C" void main1() {
+    if (!core1_disable_systick) {
+        // Don't install the SYSTICK exception handler. rp2040.getCycleCount will not work properly on core1
+        rp2040.begin(1);
+    }
    rp2040.fifo.registerCore();
    if (setup1) {
        setup1();
@ -80,9 +89,41 @@ static struct _reent *_impure_ptr1 = nullptr;

 extern "C" int main() {
 #if (defined(PICO_RP2040) && (F_CPU != 125000000)) || (defined(PICO_RP2350) && (F_CPU != 150000000))
-    set_sys_clock_khz(F_CPU / 1000, true);
+
+#if defined(PICO_RP2040)
+    // From runtime_init_clocks() to bump up RP2040 V for 200Mhz+ operation
+    if ((F_CPU > 133000000) && (vreg_get_voltage() < VREG_VOLTAGE_1_15)) {
+        vreg_set_voltage(VREG_VOLTAGE_1_15);
+        // wait for voltage to settle; must use CPU cycles as TIMER is not yet clocked correctly
+        busy_wait_at_least_cycles((uint32_t)((SYS_CLK_VREG_VOLTAGE_AUTO_ADJUST_DELAY_US * (uint64_t)XOSC_HZ) / 1000000));
+    }
 #endif

+#if defined(RP2350_PSRAM_CS) && (F_CPU > 150000000)
+    // Need to increase the qmi divider before upping sysclk to ensure we keep the output sck w/in legal bounds
+    psram_reinit_timing(F_CPU);
+    // Per datasheet, need to do a dummy access and memory barrier before it takes effect
+    extern uint8_t __psram_start__;
+    volatile uint8_t *x = &__psram_start__;
+    *x ^= 0xff;
+    *x ^= 0xff;
+    asm volatile("" ::: "memory");
+#endif
+
+    set_sys_clock_khz(F_CPU / 1000, true);
+
+#if defined(RP2350_PSRAM_CS) && (F_CPU < 150000000)
+    psram_reinit_timing();
+    // Per datasheet, need to do a dummy access and memory barrier before it takes effect
+    extern uint8_t __psram_start__;
+    volatile uint8_t *x = &__psram_start__;
+    *x ^= 0xff;
+    *x ^= 0xff;
+    asm volatile("" ::: "memory");
+#endif
+
+#endif // over/underclock
+
    // Let rest of core know if we're using FreeRTOS
    __isFreeRTOS = initFreeRTOS ? true : false;

@ -92,7 +133,7 @@ extern "C" int main() {
        _REENT_INIT_PTR(_impure_ptr1);
    }

-    rp2040.begin();
+    rp2040.begin(0);

    initVariant();

@ -203,3 +244,10 @@ void hexdump(const void* mem, uint32_t len, uint8_t cols) {
 }

 const String emptyString = "";
+
+extern "C" void __attribute__((__noreturn__)) __wrap___stack_chk_fail() {
+    while (true) {
+        panic("*** stack smashing detected ***: terminated\n");
+    }
+}
+
--- a/cores/rp2040/pio_uart.pio
+++ b/cores/rp2040/pio_uart.pio
@ -73,20 +73,25 @@ static inline void pio_tx_program_init(PIO pio, uint sm, uint offset, uint pin_t
 ; IN pin 0 and JMP pin are both mapped to the GPIO used as UART RX.

 start:
-    set x, 18           ; Preload bit counter...we'll shift in the start bit and stop bit, and each bit will be double-recorded (to be fixed by RP2040 code)
+    set x, 18           ; Preload bit counter...overwritten by the app
    wait 0 pin 0        ; Stall until start bit is asserted

-bitloop:
   ; Delay until 1/2 way into the bit time
    mov y, osr
-wait_half:
-    jmp y-- wait_half
+wait_mid_start:
+    jmp y-- wait_mid_start

-    ; Read in the bit
-    in pins, 1          ; Shift data bit into ISR
-    jmp x-- bitloop     ; Loop all bits
+bitloop:
+    mov y, osr
+bitloop1:
+    jmp y-- bitloop1
+    mov y, osr
+bitloop2:
+    jmp y-- bitloop2

-    push                ; Stuff it and wait for next start
+    in pins, 1
+    jmp x-- bitloop
+    push

 % c-sdk {
 static inline void pio_rx_program_init(PIO pio, uint sm, uint offset, uint pin) {
--- a/cores/rp2040/pio_uart.pio.h
+++ b/cores/rp2040/pio_uart.pio.h
@ -32,7 +32,7 @@ static const struct pio_program pio_tx_program = {
    .instructions = pio_tx_program_instructions,
    .length = 6,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_tx_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@ -71,7 +71,7 @@ static inline void pio_tx_program_init(PIO pio, uint sm, uint offset, uint pin_t
 // ------ //

 #define pio_rx_wrap_target 0
-#define pio_rx_wrap 6
+#define pio_rx_wrap 10
 #define pio_rx_pio_version 0

 static const uint16_t pio_rx_program_instructions[] = {
@ -80,18 +80,22 @@ static const uint16_t pio_rx_program_instructions[] = {
    0x2020, //  1: wait   0 pin, 0
    0xa047, //  2: mov    y, osr
    0x0083, //  3: jmp    y--, 3
-    0x4001, //  4: in     pins, 1
-    0x0042, //  5: jmp    x--, 2
-    0x8020, //  6: push   block
+    0xa047, //  4: mov    y, osr
+    0x0085, //  5: jmp    y--, 5
+    0xa047, //  6: mov    y, osr
+    0x0087, //  7: jmp    y--, 7
+    0x4001, //  8: in     pins, 1
+    0x0044, //  9: jmp    x--, 4
+    0x8020, // 10: push   block
    //     .wrap
 };

 #if !PICO_NO_HARDWARE
 static const struct pio_program pio_rx_program = {
    .instructions = pio_rx_program_instructions,
-    .length = 7,
+    .length = 11,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_rx_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
--- a/cores/rp2040/posix.cpp
+++ b/cores/rp2040/posix.cpp
@ -23,6 +23,7 @@
 #include <errno.h>
 #include <_syslist.h>
 #include <sys/times.h>
+#include <sys/unistd.h>
 #include <pico/stdlib.h>
 #include <pico/multicore.h>

--- a/cores/rp2040/psram.cpp
+++ b/cores/rp2040/psram.cpp
@ -195,10 +195,7 @@ static size_t __no_inline_not_in_flash_func(get_psram_size)(void) {
 ///
 /// @note This function expects interrupts to be enabled on entry

-static void __no_inline_not_in_flash_func(set_psram_timing)(void) {
-    // Get secs / cycle for the system clock - get before disabling interrupts.
-    uint32_t sysHz = (uint32_t)clock_get_hz(clk_sys);
-
+static void __no_inline_not_in_flash_func(set_psram_timing)(uint32_t sysHz) {
    // Calculate the clock divider - goal to get clock used for PSRAM <= what
    // the PSRAM IC can handle - which is defined in SFE_PSRAM_MAX_SCK_HZ
    volatile uint8_t clockDivider = (sysHz + SFE_PSRAM_MAX_SCK_HZ - 1) / SFE_PSRAM_MAX_SCK_HZ;
@ -283,7 +280,7 @@ static void __no_inline_not_in_flash_func(runtime_init_setup_psram)(/*uint32_t p

    // check our interrupts and setup the timing
    restore_interrupts(intr_stash);
-    set_psram_timing();
+    set_psram_timing((uint32_t)clock_get_hz(clk_sys));

    // and now stash interrupts again
    intr_stash = save_and_disable_interrupts();
@ -323,8 +320,11 @@ static void __no_inline_not_in_flash_func(runtime_init_setup_psram)(/*uint32_t p
 PICO_RUNTIME_INIT_FUNC_RUNTIME(runtime_init_setup_psram, PICO_RUNTIME_INIT_PSRAM);

 // update timing -- used if the system clock/timing was changed.
-void psram_reinit_timing() {
-    set_psram_timing();
+void psram_reinit_timing(uint32_t hz) {
+    if (!hz) {
+        hz = (uint32_t)clock_get_hz(clk_sys);
+    }
+    set_psram_timing(hz);
 }

 static bool __psram_heap_init() {
--- a/cores/rp2040/psram.h
+++ b/cores/rp2040/psram.h
@ -31,7 +31,7 @@

 #include <Arduino.h>

-void psram_reinit_timing();
+void psram_reinit_timing(uint32_t hz = 0);
 void *__psram_malloc(size_t size);
 void __psram_free(void *ptr);
 void *__psram_realloc(void *ptr, size_t size);
--- a/cores/rp2040/sdkoverride/btstack_flash_bank.cpp
+++ b/cores/rp2040/sdkoverride/btstack_flash_bank.cpp
@ -4,7 +4,7 @@
    SPDX-License-Identifier: BSD-3-Clause
 */

-#if defined(ARDUINO_RASPBERRY_PI_PICO_W)
+#if defined(PICO_CYW43_SUPPORTED)
 #include <btstack.h>
 #include <pico/btstack_flash_bank.h>
 #include <hardware/flash.h>
--- a/cores/rp2040/tone2.pio
+++ b/cores/rp2040/tone2.pio
@ -18,7 +18,7 @@

 ; Side-set pin 0 is used for Tone output

-; OSR == Halfcycle count
+; OSR == Halfcycle count - 3

 .program tone2
 .side_set 1 opt
@ -26,10 +26,11 @@
 ;    pull                     ; TXFIFO -> OSR, or X -> OSR if no new period
 ;    mov x, osr               ; OSR -> X

+.wrap_target
 high:
    pull noblock             ; Potentially grab new HALFCYCLECOUNT, OTW copy from backup in X
-    mov x, osr               ; OSR -> X
-    mov y, osr      side 1   ; HALFCYCLECOUNT -> Y
+    mov x, osr      side 1   ; OSR -> X
+    mov y, osr               ; HALFCYCLECOUNT -> Y
 highloop:
    jmp y-- highloop         ; while (y--) { /* noop delay */ }

@ -38,7 +39,7 @@ low:
 lowloop:
    jmp y-- lowloop          ; while (y--) { /* noop delay */ }

-    jmp high                 ; GOTO high
+    .wrap                    ; GOTO high

 % c-sdk {
 static inline void tone2_program_init(PIO pio, uint sm, uint offset, uint pin) {
--- a/cores/rp2040/tone2.pio.h
+++ b/cores/rp2040/tone2.pio.h
@ -13,27 +13,26 @@
 // ----- //

 #define tone2_wrap_target 0
-#define tone2_wrap 6
+#define tone2_wrap 5
 #define tone2_pio_version 0

 static const uint16_t tone2_program_instructions[] = {
    //     .wrap_target
    0x8080, //  0: pull   noblock
-    0xa027, //  1: mov    x, osr
-    0xb847, //  2: mov    y, osr          side 1
+    0xb827, //  1: mov    x, osr          side 1
+    0xa047, //  2: mov    y, osr
    0x0083, //  3: jmp    y--, 3
    0xb047, //  4: mov    y, osr          side 0
    0x0085, //  5: jmp    y--, 5
-    0x0000, //  6: jmp    0
    //     .wrap
 };

 #if !PICO_NO_HARDWARE
 static const struct pio_program tone2_program = {
    .instructions = tone2_program_instructions,
-    .length = 7,
+    .length = 6,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = tone2_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
--- a/cores/rp2040/wiring_shift.cpp
+++ b/cores/rp2040/wiring_shift.cpp
@ -56,9 +56,9 @@ extern "C" void shiftOut(pin_size_t dataPin, pin_size_t clockPin, BitOrder bitOr
    }
    for (i = 0; i < 8; i++)  {
        if (bitOrder == LSBFIRST) {
-            digitalWrite(dataPin, !!(val & (1 << i)));
+            digitalWrite(dataPin, !!(val & (1 << i)) ? HIGH : LOW);
        } else {
-            digitalWrite(dataPin, !!(val & (1 << (7 - i))));
+            digitalWrite(dataPin, !!(val & (1 << (7 - i))) ? HIGH : LOW);
        }

        digitalWrite(clockPin, HIGH);
--- a/docs/adc.rst
+++ b/docs/adc.rst
@ -12,9 +12,9 @@ need to be periodically sampled to be read by applications, easily, such as:
 * Light dependent resistors (LDR), etc.


-Up to 4 analog samples can be recorded by the hardware (``A0`` ... ``A3``), and all
-recording is done at 16-bit levels (but be aware that the ADC in the Pico will only
-ever return values between 0...4095).
+Up to 4 (or 8 in the case of the RP2350B) analog samples can be recorded by the
+hardware (``A0`` ... ``A3``), and all recording is done at 16-bit levels (but be
+aware that the ADC in the Pico will only ever return values between 0...4095).

 The interface for the ``ADCInput`` device is very similar to the ``I2S`` input
 device, and most code can be ported simply by instantiating a ``ADCInput``
@ -26,11 +26,12 @@ allowed while in use.
 ADC Input API
 -------------

-ADCInput(pin0 [, pin1, pin2, pin3])
+ADCInput(pin0 [, pin1, pin2, pin3[, pin4, pin5, pin6, pin7])
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 Creates an ADC input object which will record the pins specified in the code.
-Only pins ``A0`` ... ``A3`` can be used, and they must be specified in increasing
-order (i.e. ``ADCInput(A0, A1);`` is valid, but ``ADCInput(A1, A0)`` is not.
+Only pins ``A0`` ... ``A3`` (``A7`` on RP2350B) can be used, and they must be
+specified in increasing order (i.e. ``ADCInput(A0, A1);`` is valid,
+but ``ADCInput(A1, A0)`` is not.

 bool setBuffers(size_t buffers, size_t bufferWords)
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--- a/docs/conf.py
+++ b/docs/conf.py
@ -54,9 +54,9 @@ author = u'Earle F. Philhower, III'
 # built documents.
 #
 # The short X.Y version.
-version = u'4.2.1'
+version = u'4.5.4'
 # The full version, including alpha/beta/rc tags.
-release = u'4.2.1'
+release = u'4.5.4'

 # The language for content autogenerated by Sphinx. Refer to documentation
 # for a list of supported languages.
--- a/docs/contrib.rst
+++ b/docs/contrib.rst
@ -112,7 +112,7 @@ For only RP2350A variants (using the compile options, not the onboard ID registe

 .. code:: cpp

-    #if defined(PICO_RP2350) && !defined(PICO_RP2350B)
+    #if defined(PICO_RP2350A) && PICO_RP2350A
    ...RP2350A only code...
    #endif

@ -121,7 +121,7 @@ and not the chip ID register):

 .. code:: cpp

-    #if defined(PICO_RP2350B)
+    #if defined(PICO_RP2350A) && !PICO_RP2350A
    ...48-GPIO version code here
    #endif

--- a/docs/fs.rst
+++ b/docs/fs.rst
@ -135,6 +135,29 @@ directory into a new LittleFS flash file system.
 -  Double check the Serial Monitor is closed.  Uploads will fail if the Serial Monitor has control of the serial port.
 -  Enter ``[Ctrl]`` + ``[Shift]`` + ``[P]`` to bring up the command palette, then select/type ``Upload LittleFS to Pico/ESP8266``

+Downloading Files from a LittleFS System
+----------------------------------------
+
+Using ``gdb`` it is possible to dump the flash data making up the filesystem and then extract
+it using the ``mklittlefs`` tool.  A working ``OpenOCD`` setup, DebugProbe, and ``gdb`` are required.
+To download the raw filesystem, from within ``GDB`` run:
+
+.. code::
+
+    ^C (break)
+    (gdb) dump binary memory littlefs.bin &_FS_start &_FS_end
+
+It may take a few seconds as ``GDB`` reads out the flash to the file.  Once the raw file is downloaded it can be extracted using the ``mklittlefs`` tool from the BASH/Powershell/command line
+
+.. code::
+
+    $ <path-to-mklittlefs>/mklittlefs -u output-dir littlefs.bin
+     Directory <output-dir> does not exists. Try to create it.
+     gmon.out    > <output-dir>/gmon.out    size: 24518 Bytes
+     gmon.bak    > <output-dir>/gmon.bak    size: 1 Bytes
+
+The defaults built into ``mklittlefs`` should be appropriate for normal LittleFS filesystems built on the device or using the upload tool.
+
 SD Library Information
 ----------------------
 The included ``SD`` library is the Arduino standard one.  Please refer to
@ -151,6 +174,23 @@ second SPI port, ``SPI1``.  Just use the following call in place of

    SD.begin(cspin, SPI1);

+Enabling SDIO operation for SD
+------------------------------
+SDIO support is available thanks to SdFat implementing a PIO-based SDIO controller.
+This mode can significantly increase IO performance to SD cards but it requires that
+all 4 DAT0..DAT3 lines to be wired to the Pico (most SD breakout boards only provide
+1-but SPI mode of operation).
+
+To enable SDIO mode, simply specify the SD_CLK, SD_CMD, and SD_DAT0 GPIO pins.  The clock
+and command pins can be any GPIO (not limited to legal SPI pins).  The DAT0 pin can be any
+GPIO with remaining DAT1...3 pins consecutively connected.
+
+..code:: cpp
+
+    SD.begin(RP_CLK_GPIO, RP_CMD_GPIO, RP_DAT0_GPIO);
+
+No other changes are required in the application to take advantage of this high
+performance mode.

 Using VFS (Virtual File System) for POSIX support
 -------------------------------------------------
--- a/docs/i2s.rst
+++ b/docs/i2s.rst
@ -30,6 +30,12 @@ I2S(INPUT)
 Creates an I2S input port.  Needs to be connected up to the
 desired pins (see below) and started before any input can happen.

+I2S(INPUT_PULLUP)
+~~~~~~~~~~~~~~~~~
+Creates a bi-directional I2S input and output port.  Needs to be
+connected up to the desired pins (see below) and started before
+any input or output can happen.
+
 bool setBCLK(pin_size_t pin)
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 Sets the BCLK pin of the I2S device.  The LRCLK/word clock will be ``pin + 1``
@ -37,7 +43,18 @@ due to limitations of the PIO state machines.  Call this before ``I2S::begin()``

 bool setDATA(pin_size_t pin)
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-Sets the DOUT or DIN pin of the I2S device.  Any pin may be used.
+Sets the DOUT or DIN pin of the I2S device.  Any pin may be used. In bi-directional
+operation, must use ``I2S::setDOUT()`` and ``I2S::setDIN`` instead.
+Call before ``I2S::begin()``
+
+bool setDOUT(pin_size_t pin)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Sets the DOUT pin of the I2S device.  Any pin may be used.
+Call before ``I2S::begin()``
+
+bool setDIN(pin_size_t pin)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Sets the DIN pin of the I2S device.  Any pin may be used.
 Call before ``I2S::begin()``

 bool setMCLK(pin_size_t pin)
@ -71,7 +88,7 @@ sample rate on-the-fly.
 bool setSysClk(int samplerate) 
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 Changes the PICO system clock to optimise for the desired samplerate. 
-The clock changes to 147.6 MHz for samplerates that are a multiple of 8 kHz, and 135.6 MHz for multiples of 11.025 kHz.
+The clock changes to 153.6 MHz for samplerates that are a multiple of 8 kHz, and 135.6 MHz for multiples of 11.025 kHz.
 Note that using ``setSysClk()`` may affect the timing of other sysclk-dependent functions.
 Should be called before any I2S functions and any other sysclk dependent initialisations.

@ -115,6 +132,14 @@ void getOverUnderflow()
 Returns a flag indicating if the I2S system ran our of data to send on output,
 or had to throw away data on input.

+void getOverflow()
+~~~~~~~~~~~~~~~~~~~~~~~
+Returns a flag indicating if the I2S system had to throw away data on input.
+
+void getUnderflow()
+~~~~~~~~~~~~~~~~~~~~~~~
+Returns a flag indicating if the I2S system ran our of data to send on output.
+
 size_t write(uint8_t/int8_t/int16_t/int32_t)
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 Writes a single sample of ``bitsPerSample`` to the buffer.  It is up to the
@ -139,7 +164,7 @@ size_t write(const uint8_t \*buffer, size_t size)
 Transfers number of bytes from an application buffer to the I2S output buffer.
 Be aware that ``size`` is in *bytes** and not samples.  Size must be a multiple
 of **4 bytes**.  Will not block, so check the return value to find out how
-many bytes were actually written.
+many 32-bit words were actually written.

 int availableForWrite()
 ~~~~~~~~~~~~~~~~~~~~~~~
@ -156,6 +181,13 @@ int peek()
 Returns the next sample to be read from the I2S buffer (without actually
 removing it).

+size_t read(uint8_t \*buffer, size_t size)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Transfers number of bytes from the I2S input buffer to an application buffer.
+Be aware that ``size`` is in *bytes** and not samples.  Size must be a multiple
+of **4 bytes**.  Will not block, so check the return value to find out how
+many 32-bit words were actually read.
+
 void onTransmit(void (\*fn)(void))
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 Sets a callback to be called when an I2S DMA buffer is fully transmitted.
--- a/docs/index.rst
+++ b/docs/index.rst
@ -43,6 +43,8 @@ For the latest version, always check https://github.com/earlephilhower/arduino-p
   File Systems (SD, SDFS, LittleFS) <fs>
   USB (Arduino and Adafruit_TinyUSB) <usb>
   Multicore Processing <multicore>
+   Semihosting <semihosting>
+   Profiling (GPROF) <profiling>

   RP2350 Specific Notes <rp2350>
   RP2350 PSRAM <psram>
--- a/docs/multicore.rst
+++ b/docs/multicore.rst
@ -16,6 +16,25 @@ not necessarily simultaneously!).
 See the ``Multicore.ino`` example in the ``rp2040`` example directory for a
 quick introduction.

+Core 1 Operation
+----------------
+
+By default, core1 (the second core) has no non-user written code running on it.
+No interrupts, exceptions, or other background processing is done (but the core
+is still subject to hardware stalls due to on-die memory resource conflicts).
+When flash erase or write operations (i.e. ``LittleFS`` or ``EEPROM``) are called
+from core0, core1 **will** be paused.
+
+If ``rp2040.getCycleCount`` is needed to operate on the second core, then a
+periodic (once ever 16M clock cycles) ``SYSTICK`` exception will happen behind
+the scenes.  For extremely time-critical operations this may not be desirable
+and can be disabled by defining a new ``bool`` variable to ``true`` anywhere
+in your sketch:
+
+.. code:: cpp
+
+    bool core1_disable_systick = true;
+
 Stack Sizes
 -----------

@ -67,6 +86,9 @@ void rp2040.restartCore1()
 ~~~~~~~~~~~~~~~~~~~~~~~~~~

 Hard resets Core1 from Core 0 and restarts its operation from ``setup1()``.
+This can cause unpredictable behavior because globals and the heap
+are shared between cores and not re-initialized with this call.  Use with
+extreme caution.

 Communicating Between Cores
 ---------------------------
--- a/docs/platformio.rst
+++ b/docs/platformio.rst
@ -172,6 +172,37 @@ To learn more about PSRAM usage, see: :doc:`RP2350 PSRAM Support <psram>`
    ; PSRAM size: 4MB
    board_upload.psram_length = 4194304

+PSRAM chip select (CS)
+----------------------
+
+For RP2350 based boards, this controls what chip-select (also called: slave-select / SS) pin to use when wanting to talk to the PSRAM chip.
+
+Note that it's not needed to set this with a board that is known to have a PSRAM chip on-board, such as a "Sparkfun Thing Plus 2350". The ``pins_arduino.h`` of that variant already has the correct definition.
+
+To learn more about PSRAM usage, see: :doc:`RP2350 PSRAM Support <psram>` 
+
+.. code:: ini
+
+    ; PSRAM CS is at GP47
+    build_flags =
+      -DRP2350_PSRAM_CS=47
+
+
+Boot2 Source
+------------
+
+Boot2 is the second stage bootloader and predominantly used on the RP2040.
+Its main purpose is to configure the communication with the Flash at the highest, safest speed it can.
+All known boards have their correct value already configured. However, when choosing ``board = generic``,
+you can freely configure the Boot2 to be for a different flash. 
+
+For possible Boot2 filenames, `please see here <https://github.com/earlephilhower/arduino-pico/tree/master/boot2/rp2040>`__.
+
+.. code:: ini
+
+    ; expect an ISSI IS25LP080 flash, SPI frequency = CPU frequency divided by 2 
+    board_build.arduino.earlephilhower.boot2_source = boot2_is25lp080_2_padded_checksum.S
+
 CPU Speed
 ---------

--- a/docs/profiling.rst
+++ b/docs/profiling.rst
@ -0,0 +1,76 @@
+Profiling Applications with GPROF
+=================================
+
+Applications running on the Pico can be profiled using GNU GPROF to show where the CPU is using its time
+on the device and how often certain functions are called.  It does this by recompiling the application
+and adding a small preamble to each function built to identify what functions call what others (and
+how frequently).  It also uses the ``SYSTICK`` exception timer to sample and record the PC 10,000 times
+per second.  When an application is complete, the recorded date can be dumped to the host PC as a
+``gmon.,out`` file which can be processed by ``arm-none-eabi-gprof`` into useful date.
+
+s histogram of PCs and tally of function caller/callees can take a significant amount of RAM, from 100KB
+to 10000KB depending on the size of the application.  As such, while the RP2040 **may** be able to
+profile small applications, this is only really recommended on the RP2350 with external PSRAM.  The
+profiler will automatically use PSRAM when available.  Call ``rp2040.getProfileMemoryUsage()`` to get the
+memory allocated at runtime.
+
+
+Profiling also adds processing overhead in terms of the periodic sampling and the function preambles.
+In most cases there is no reason to enable (and many reasons to disable) profiling when an application
+is deployed to the field.
+
+To transfer the ``GMON.OUT`` data from the Pico to the host HP can be done by having the application
+write it out to an SD card or a LittleFS filesystem which is then manually dumped, but for ease of use
+semihosting can be used to allow the Pico (under the control of OpenOCD and GDB) to write the
+``gmon.out`` file directly on the host PC, ready for use.
+
+**NOTE** Semihosting only works when connected to an OpenOCD + GDB debug session.  Running an application
+compiled for Semihosting without the debugger will cause a panic and hang the chip.
+
+As of now, only ARM has support for Semihosting or GPROF.
+
+
+Enabling Profiling in an Application
+------------------------------------
+
+The ``Tools->Profiling->Enabled`` menu needs to be selected to enable profiling support in GCC.  This will
+add the necessary preamble to every function compiled (**Note** that the ``libpico`` and ``libc`` will not
+be instrumented because they are pre-built so calls from them will not be fully instrumented.  However,
+PC data will still be grabbed and decoded from them at runtime.)
+
+The application will automatically start collecting profiling data even before ``setup`` starts in this
+mode.  It will continue collecting data until you stop and write out the profiling data using
+``rp2040.writeProfiling()`` to dump to the host, a file, serial port, etc.
+
+For example, an application which does all its processing in ``setup()`` might look like:
+
+.. code:: cpp
+
+    #include <SemiFS.h>
+    void setup() {
+        SerialSemi.printf("BEGIN\n");
+        do_some_work_that_takes_a_long_time_with_many_function_calls();
+        // Do lots of other work...
+        // Now all done...
+        SerialSemi.printf("Writing GMON.OUT\n");
+        SemiFS.begin();
+        File gmon = SemiFS.open("gmon.out", "w");
+        rp2040.writeProfiling(&gmon);
+        gmon.close();
+        SerialSemi.printf("END\n");
+    }
+    void loop() {}
+
+
+Collecting and Analyzing Profile Data
+-------------------------------------
+
+Running this application under `semihosting <semihosting>`_ GDB and OpenOCD generates a ``gmon.out`` file
+in the OpenOCD current working directory.  This file, combined with the ``ELF`` binary build in the
+IDE and loaded through GDB, can produce profiler output using
+
+.. code::
+
+    $ /path/to/arm-none-eabi/bin/arm-none-eabi-gprof /path/to/sketch.ino.elf /path/to/gmon.out
+
+See the ``rp2040/Profiling.ino`` example for more details.
--- a/docs/semihosting.rst
+++ b/docs/semihosting.rst
@ -0,0 +1,59 @@
+Semihosting Support
+===================
+
+Using special debugger breakpoints and commands, the Pico can read and write to the debugging console as well
+as read and write files on a development PC.  The ``Semihosting`` library allows applications to use the
+semihosting support as a normal filesystem or serial port.
+
+**NOTE** Semihosting only works when connected to an OpenOCD + GDB debug session.  Running an application
+compiled for Semihosting without the debugger will cause a panic and hang the chip.
+
+As of now, only ARM has support for Semihosting.
+
+Running Semihosting on the Development Host
+-------------------------------------------
+
+Start OpenOCD normally from inside a directory that you can read and write files within (i.e. do not run from
+``C:\\Program Files\\..`` on Windows where general users aren't allowed to write).  The starting
+directory will be where the Pico will read and write files using the ``SemiFS`` class.
+Be sure to keep the terminal window you ran OpenOCD in open, because all ``SerialSemi`` input and output
+will go to **that** terminal and not ``gdb``'s.
+
+Start GDB normally and connect to the OpenOCD debugger and enable semihosting support
+
+.. code::
+
+    (gdb) target extended-remote localhost:3333
+    (gdb) monitor arm semihosting enable
+
+At this point load and run your ``ELF`` application as normal.  Again, all ``SerialSemi`` output will go
+to the **OpenOCD** window, not GDB.
+
+See the ``hellosemi`` example in the ``Semihosting`` library.
+
+SerialSemi - Serial over Semihosting
+------------------------------------
+
+Simply include ``<Semihosting.h>`` in your application and use ``SerialSemi`` as you would any other
+``Serial`` port with the following limitations:
+
+* Baud rate, bit width, etc. are all ignored
+* Input is limited because ``read`` may hang indefinitely in the host and ``available`` is not part of the spec
+
+``SerialSemi`` can also be selected as the debug output port in the IDE, in which case ``::printf`` will write
+to the debugger directly.
+
+SemiFS - Host filesystem access through Semihosting
+---------------------------------------------------
+
+Use ``SemiFS`` the same way as any other file system.  Note that only file creation and renaming are supported, with
+no provision for iterating over directories or listing files.  In most cases simply opening a ``File`` and writing out
+a debug dump is all that's needed:
+
+.. code::
+
+    SemiFS.begin();
+    File f = SemiFS.open("debug.dmp", "w");
+    f.write(buffer, size);
+    f.close();
+    SerialSemi.printf("Debug dump now available on host.\n");
--- a/docs/spi.rst
+++ b/docs/spi.rst
@ -28,6 +28,19 @@ pin itself, as is the standard way in Arduino.

 * The interrupt calls (``attachInterrupt``, and ``detachInterrpt``) are not implemented.

+Software SPI (Master Only)
+==========================
+
+Similar to ``SoftwareSerial``, ``SoftwareSPI`` creates a PIO based SPI interface that
+can be used in the same manner as the hardware SPI devices.  The constructor takes the
+pins desired, which can be any GPIO pins with the rule that if hardware CS is used then
+it must be on pin ``SCK + 1``.  Construct a ``SoftwareSPI`` object in your code as
+follows and use it as needed (i.e. pass it into ``SD.begin(_CS, softwareSPI);``
+
+.. code:: cpp
+
+    #include <SoftwareSPI.h>
+    SoftwareSPI softSPI(_sck, _miso, _mosi); // no HW CS support, any selection of pins can be used

 SPI Slave (SPISlave)
 ====================
--- a/include/bearssl/bearssl_git.h
+++ b/include/bearssl/bearssl_git.h
@ -1,2 +1,2 @@
 // Do not edit -- Automatically generated by tools/sdk/ssl/bearssl/Makefile
-#define BEARSSL_GIT 5b7f3d5
+#define BEARSSL_GIT aca1383
--- a/include/lwipopts.h
+++ b/include/lwipopts.h
@ -30,7 +30,7 @@ extern unsigned long __lwip_rand(void);
 #define MEMP_NUM_TCP_SEG              (32)
 #define MEMP_NUM_ARP_QUEUE            (10)
 #define PBUF_POOL_SIZE                (__LWIP_MEMMULT > 1 ? 32 : 24)
-#define LWIP_ARP                      5
+#define LWIP_ARP                      7
 #define LWIP_ETHERNET                 1
 #define LWIP_ICMP                     1
 #define LWIP_RAW                      1
--- a/include/rp2040/pico_base/pico/version.h
+++ b/include/rp2040/pico_base/pico/version.h
@ -12,8 +12,8 @@
 #define _PICO_VERSION_H

 #define PICO_SDK_VERSION_MAJOR    2
-#define PICO_SDK_VERSION_MINOR    0
-#define PICO_SDK_VERSION_REVISION 1
-#define PICO_SDK_VERSION_STRING   "2.0.1-develop"
+#define PICO_SDK_VERSION_MINOR    1
+#define PICO_SDK_VERSION_REVISION 2
+#define PICO_SDK_VERSION_STRING   "2.1.2-develop"

 #endif
--- a/include/rp2350/pico_base/pico/version.h
+++ b/include/rp2350/pico_base/pico/version.h
@ -12,8 +12,8 @@
 #define _PICO_VERSION_H

 #define PICO_SDK_VERSION_MAJOR    2
-#define PICO_SDK_VERSION_MINOR    0
-#define PICO_SDK_VERSION_REVISION 1
-#define PICO_SDK_VERSION_STRING   "2.0.1-develop"
+#define PICO_SDK_VERSION_MINOR    1
+#define PICO_SDK_VERSION_REVISION 2
+#define PICO_SDK_VERSION_STRING   "2.1.2-develop"

 #endif
--- a/keywords.txt
+++ b/keywords.txt
@ -14,6 +14,7 @@ File	KEYWORD1
 timeval	KEYWORD1
 time_t	KEYWORD1
 SoftwareSerial	KEYWORD1
+AudioOutputBase	KEYWORD1

 #######################################
 # Methods and Functions (KEYWORD2)
@ -65,6 +66,9 @@ getUsedPSRAMHeap	KEYWORD2
 getTotalPSRAMHeap	KEYWORD2
 getTotalPSRAM	KEYWORD2

+getProfileMemoryUsage	KEYWORD2
+writeProfiling	KEYWORD2
+
 getChipID	KEYWORD2

 hwrand32	KEYWORD2
@ -83,6 +87,9 @@ digitalReadFast	KEYWORD2

 enableDoubleResetBootloader	KEYWORD2

+SerialSemi	KEYWORD2
+SemiFS	KEYWORD2
+
 openDir	KEYWORD2
 next	KEYWORD2
 getLastWrite	KEYWORD2
--- a/lib/core_inc.txt
+++ b/lib/core_inc.txt
@ -54,6 +54,7 @@
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_lwip/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_multicore/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform/include
+-iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform_common/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform_compiler/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform_sections/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform_panic/include
--- a/lib/core_wrap.txt
+++ b/lib/core_wrap.txt
@ -68,7 +68,4 @@
 -Wl,--wrap=cyw43_cb_tcpip_init
 -Wl,--wrap=cyw43_cb_tcpip_deinit

-Wl,--wrap=flash_range_erase
-Wl,--wrap=flash_range_program
-Wl,--wrap=flash_get_unique_id
-Wl,--wrap=flash_do_cmd
+-Wl,--wrap=__stack_chk_fail
--- a/lib/rp2040/libbearssl.a
+++ b/lib/rp2040/libbearssl.a
--- a/lib/rp2040/libipv4-big.a
+++ b/lib/rp2040/libipv4-big.a
--- a/lib/rp2040/libipv4-bt-big.a
+++ b/lib/rp2040/libipv4-bt-big.a
--- a/lib/rp2040/libipv4-bt.a
+++ b/lib/rp2040/libipv4-bt.a
--- a/lib/rp2040/libipv4-ipv6-big.a
+++ b/lib/rp2040/libipv4-ipv6-big.a
--- a/lib/rp2040/libipv4-ipv6-bt-big.a
+++ b/lib/rp2040/libipv4-ipv6-bt-big.a
--- a/lib/rp2040/libipv4-ipv6-bt.a
+++ b/lib/rp2040/libipv4-ipv6-bt.a
--- a/lib/rp2040/libipv4-ipv6.a
+++ b/lib/rp2040/libipv4-ipv6.a
--- a/lib/rp2040/libipv4.a
+++ b/lib/rp2040/libipv4.a
--- a/lib/rp2040/libpico.a
+++ b/lib/rp2040/libpico.a
--- a/lib/rp2040/ota.o
+++ b/lib/rp2040/ota.o
--- a/lib/rp2040/platform_inc.txt
+++ b/lib/rp2040/platform_inc.txt
@ -10,5 +10,6 @@
 -iwithprefixbefore/pico-sdk/lib/btstack/src
 -iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/bluedroid/decoder/include
 -iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/bluedroid/encoder/include
+-iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/yxml
 -iwithprefixbefore/pico-sdk/lib/btstack/platform/embedded
 -iwithprefixbefore/pico-sdk/src/rp2_common/cmsis/stub/CMSIS/Device/RP2040/Include
--- a/lib/rp2350-riscv/libbearssl.a
+++ b/lib/rp2350-riscv/libbearssl.a
--- a/lib/rp2350-riscv/libipv4-big.a
+++ b/lib/rp2350-riscv/libipv4-big.a
--- a/lib/rp2350-riscv/libipv4-bt-big.a
+++ b/lib/rp2350-riscv/libipv4-bt-big.a
--- a/lib/rp2350-riscv/libipv4-bt.a
+++ b/lib/rp2350-riscv/libipv4-bt.a
--- a/lib/rp2350-riscv/libipv4-ipv6-big.a
+++ b/lib/rp2350-riscv/libipv4-ipv6-big.a
--- a/lib/rp2350-riscv/libipv4-ipv6-bt-big.a
+++ b/lib/rp2350-riscv/libipv4-ipv6-bt-big.a
--- a/lib/rp2350-riscv/libipv4-ipv6-bt.a
+++ b/lib/rp2350-riscv/libipv4-ipv6-bt.a
--- a/lib/rp2350-riscv/libipv4-ipv6.a
+++ b/lib/rp2350-riscv/libipv4-ipv6.a
--- a/lib/rp2350-riscv/libipv4.a
+++ b/lib/rp2350-riscv/libipv4.a
--- a/lib/rp2350-riscv/libpico.a
+++ b/lib/rp2350-riscv/libpico.a
--- a/lib/rp2350-riscv/ota.o
+++ b/lib/rp2350-riscv/ota.o
--- a/lib/rp2350-riscv/picoprobe_cmsis_dap.tcl
+++ b/lib/rp2350-riscv/picoprobe_cmsis_dap.tcl
@ -0,0 +1,3 @@
+source [find interface/cmsis-dap.cfg]
+adapter speed 5000
+source [find target/rp2350-riscv.cfg]
--- a/lib/rp2350-riscv/platform_def.txt
+++ b/lib/rp2350-riscv/platform_def.txt
@ -1,4 +1,5 @@
 -DPICO_CYW43_ARCH_THREADSAFE_BACKGROUND=1
+-DTARGET_RP2350
 -DCYW43_LWIP=1
 -DCYW43_PIO_CLOCK_DIV_DYNAMIC=1
 -DCFG_TUSB_MCU=OPT_MCU_RP2040
--- a/lib/rp2350-riscv/platform_inc.txt
+++ b/lib/rp2350-riscv/platform_inc.txt
@ -15,4 +15,5 @@
 -iwithprefixbefore/pico-sdk/lib/btstack/src
 -iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/bluedroid/decoder/include
 -iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/bluedroid/encoder/include
+-iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/yxml
 -iwithprefixbefore/pico-sdk/lib/btstack/platform/embedded
--- a/lib/rp2350/libbearssl.a
+++ b/lib/rp2350/libbearssl.a
--- a/lib/rp2350/libipv4-big.a
+++ b/lib/rp2350/libipv4-big.a
--- a/lib/rp2350/libipv4-bt-big.a
+++ b/lib/rp2350/libipv4-bt-big.a
--- a/lib/rp2350/libipv4-bt.a
+++ b/lib/rp2350/libipv4-bt.a
--- a/lib/rp2350/libipv4-ipv6-big.a
+++ b/lib/rp2350/libipv4-ipv6-big.a
--- a/lib/rp2350/libipv4-ipv6-bt-big.a
+++ b/lib/rp2350/libipv4-ipv6-bt-big.a
--- a/lib/rp2350/libipv4-ipv6-bt.a
+++ b/lib/rp2350/libipv4-ipv6-bt.a
--- a/lib/rp2350/libipv4-ipv6.a
+++ b/lib/rp2350/libipv4-ipv6.a
--- a/lib/rp2350/libipv4.a
+++ b/lib/rp2350/libipv4.a
--- a/lib/rp2350/libpico.a
+++ b/lib/rp2350/libpico.a
--- a/lib/rp2350/ota.o
+++ b/lib/rp2350/ota.o
--- a/lib/rp2350/platform_def.txt
+++ b/lib/rp2350/platform_def.txt
@ -1,4 +1,5 @@
 -DPICO_CYW43_ARCH_THREADSAFE_BACKGROUND=1
+-DTARGET_RP2350
 -DCYW43_LWIP=1
 -DCYW43_PIO_CLOCK_DIV_DYNAMIC=1
 -DCFG_TUSB_MCU=OPT_MCU_RP2040
--- a/lib/rp2350/platform_inc.txt
+++ b/lib/rp2350/platform_inc.txt
@ -13,4 +13,5 @@
 -iwithprefixbefore/pico-sdk/lib/btstack/src
 -iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/bluedroid/decoder/include
 -iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/bluedroid/encoder/include
+-iwithprefixbefore/pico-sdk/lib/btstack/3rd-party/yxml
 -iwithprefixbefore/pico-sdk/lib/btstack/platform/embedded
--- a/libraries/ADCInput/src/ADCInput.cpp
+++ b/libraries/ADCInput/src/ADCInput.cpp
@ -49,12 +49,7 @@ bool ADCInput::setBuffers(size_t buffers, size_t bufferWords) {

 int ADCInput::_mask(pin_size_t p) {
    switch (p) {
-#if !defined(PICO_RP2350B)
-    case 26: return 1;
-    case 27: return 2;
-    case 28: return 4;
-    case 29: return 8;
-#else // Starts at 40 and there are 8 of them
+#if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
    case 40: return 1;
    case 41: return 2;
    case 42: return 4;
@ -63,6 +58,11 @@ int ADCInput::_mask(pin_size_t p) {
    case 45: return 32;
    case 46: return 64;
    case 47: return 128;
+#else
+    case 26: return 1;
+    case 27: return 2;
+    case 28: return 4;
+    case 29: return 8;
 #endif
    default: return 0;
    }
@ -77,8 +77,9 @@ bool ADCInput::setPins(pin_size_t pin0, pin_size_t pin1, pin_size_t pin2, pin_si
 }

 bool ADCInput::setFrequency(int newFreq) {
-    _freq = newFreq * __builtin_popcount(_pinMask); // Want to sample all channels at given frequency
-    adc_set_clkdiv(48000000.0f / _freq - 1.0f);
+    _freq = newFreq;
+    int scaledFreq = newFreq * __builtin_popcount(_pinMask); // Want to sample all channels at given frequency
+    adc_set_clkdiv(48000000.0f / scaledFreq - 1.0f);
    return true;
 }

@ -105,7 +106,7 @@ bool ADCInput::begin() {
    // Set up the GPIOs to go to ADC
    adc_init();
    int cnt = 0;
-#if !defined(PICO_RP2350B)
+#if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
    int startpin = 26;
    int maxpin = 29;
 #else
--- a/Show more
+++ b/Show more