Update I2S

While I don't see it in RFC 7230, some web services seem to deliver an
explicit t-e header even with the default identity mapping.  If seen,
let it pass.

Found & fixed by M. Guenther

README.md

@@ -4,7 +4,7 @@
 
 Raspberry Pi Pico Arduino core, for all RP2040 and RP2350 boards
 
-This is a port of Arduino to the RP2040 (Raspberry Pi Pico processor) and RP2350 (Raspberry Pi Pico 2 processor). It uses the bare Raspberry Pi Pico SDK and a custom GCC 14.2/Newlib 4.3 toolchain and supports ARM and RISC-V cores.
+This is a port of Arduino to the RP2040 (Raspberry Pi Pico processor) and RP2350 (Raspberry Pi Pico 2 processor). It uses the bare Raspberry Pi Pico SDK and a custom GCC 14.3/Newlib 4.5 toolchain and supports ARM and RISC-V cores.
 
 # Documentation
 See https://arduino-pico.readthedocs.io/en/latest/ along with the examples for more detailed usage information.
@@ -37,6 +37,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Architeuthis Flux Jumperless V5
 * Arduino Nano RP2040 Connect
 * ArtronShop RP2 Nano
+* BIGTREETECH SKR-Pico
 * Breadstick Raspberry
 * BridgeTek IDM2040-7A
 * BridgeTek IDM2040-43A
@@ -115,11 +116,15 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Waveshare RP2040 LCD 1.28
 * Waveshare RP2040 Matrix
 * Waveshare RP2040 PiZero
+* Waveshare RP2350 Plus
+* Waveshare RP2350 LCD 0.96
 * WIZnet W5100S-EVB-Pico
 * WIZnet W5100S-EVB-Pico2
 * WIZnet W5500-EVB-Pico
 * WIZnet W5500-EVB-Pico2
 * WIZnet W55RP20-EVB-Pico
+* WIZnet W6300-EVB-Pico
+* WIZnet W6300-EVB-Pico2
 * WIZnet WizFi360-EVB-Pico
 * Generic RP2040 (configurable flash, I/O pins)
 * Generic RP2350 (configurable flash, I/O pins)
@@ -130,7 +135,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Bluetooth Classic and BLE HID master mode (connect to BT keyboard, mouse, or joystick)
 * Generic Arduino USB Serial, Keyboard, Joystick, and Mouse emulation
 * WiFi (Pico W, ESP32-based ESPHost, Atmel WINC1500)
-* Ethernet (Wired WizNet W6100, WizNet W5500, WizNet W5100, ENC28J60)
+* Ethernet (Wired WizNet W6300, WizNet W6100, WizNet W5500, WizNet W5100, ENC28J60)
 * HTTP client and server (WebServer)
 * SSL/TLS/HTTPS
 * Over-the-Air (OTA) upgrades

cores/rp2040/RP2040Version.h

@@ -1,5 +1,5 @@
 #pragma once
 #define ARDUINO_PICO_MAJOR 4
-#define ARDUINO_PICO_MINOR 5
-#define ARDUINO_PICO_REVISION 4
-#define ARDUINO_PICO_VERSION_STR "4.5.4"
+#define ARDUINO_PICO_MINOR 6
+#define ARDUINO_PICO_REVISION 1
+#define ARDUINO_PICO_VERSION_STR "4.6.1"

docs/bluetooth.rst

@@ -42,7 +42,7 @@ For many BTStack examples, you simply need call the included
 called afterwards to start processing (in the background).
 
 You will also need to acquire the BT ``async_context`` system lock before
-calling any BTStack APIs.  ``__lockBluetooth`` and ``unlockBluetooth`` are
+calling any BTStack APIs.  ``__lockBluetooth`` and ``__unlockBluetooth`` are
 provided in the PicoW variant code.
 
 Note that if you need to modify the system ``btstack_config.h`` file, do so

docs/conf.py

@@ -54,9 +54,9 @@ author = u'Earle F. Philhower, III'
 # built documents.
 #
 # The short X.Y version.
-version = u'4.5.4'
+version = u'4.6.1'
 # The full version, including alpha/beta/rc tags.
-release = u'4.5.4'
+release = u'4.6.1'
 
 # The language for content autogenerated by Sphinx. Refer to documentation
 # for a list of supported languages.

docs/fs.rst

@@ -105,14 +105,14 @@ are automatically created when you attempt to create a file in a
 subdirectory, and when the last file in a subdirectory is removed the
 subdirectory itself is automatically deleted.
 
-Uploading Files to the LittleFS File System
--------------------------------------------
+Uploading Files to the LittleFS File System on IDE 1.x (RP2040 only)
+--------------------------------------------------------------------
 
-*PicoLittleFS* is a tool which integrates into the Arduino IDE. It adds a
-menu item to **Tools** menu for uploading the contents of sketch data
-directory into a new LittleFS flash file system.
-
-**IDE 1.x**
+For the Pico (RP2040) only, *PicoLittleFS* is a tool which integrates into
+the obsolete Arduino 1.x IDE. It adds a menu item to **Tools** menu for uploading the
+contents of sketch data directory into a new LittleFS flash file system.
+Please note that this JAVA plug in for the obsolete 1.x IDE does **NOT**
+support the RP2350 (Pico 2).
 
 -  Download the tool: https://github.com/earlephilhower/arduino-pico-littlefs-plugin/releases
 -  In your Arduino sketchbook directory, create ``tools`` directory if it doesn't exist yet.
@@ -126,7 +126,12 @@ directory into a new LittleFS flash file system.
 -  Double check the Serial Monitor is closed.  Uploads will fail if the Serial Monitor has control of the serial port.
 -  Select ``Tools > Pico LittleFS Data Upload``. This should start uploading the files into the flash file system.
 
-**IDE 2.x**
+Uploading Files to the LittleFS File System on IDE 2.x (RP2040 and RP2350)
+--------------------------------------------------------------------------
+
+For the original Pico (RP2040) and Pico 2 (RP2350), use the Typescript 2.x IDE tool which
+operates in the new Arduino 2.x IDE.  This tool works on all Pico and Pico 2s (and ESP32s
+if you're so inclined).
 
 -  Download the new tool: https://github.com/earlephilhower/arduino-littlefs-upload/releases
 -  Exit the IDE, if running

docs/platformio.rst

@@ -63,12 +63,10 @@ Step 3: Reboot the computer
 Once the two prior stages are complete, please do a full reboot or power cycle so that the new settings will take effect.
 
 
-Current state of development
-----------------------------
+Updating platformio.ini to use the proper platform
+--------------------------------------------------
 
-At the time of writing, PlatformIO integration for this core is a work-in-progress and not yet merged into mainline PlatformIO. This is subject to change once `this pull request <https://github.com/platformio/platform-raspberrypi/pull/36>`_ is merged.
-
-If you want to use the PlatformIO integration right now, make sure you first create a standard Raspberry Pi Pico + Arduino project within PlatformIO.
+First create a standard Raspberry Pi Pico + Arduino project within PlatformIO.
 This will give you a project with the ``platformio.ini``
 
 .. code:: ini

docs/spi.rst

@@ -16,7 +16,7 @@ SPI pinouts can be set **before SPI.begin()** using the following calls:
 Note that the ``CS`` pin can be hardware or software controlled by the sketch.
 When software controlled, the ``setCS()`` call is ignored.
 
-The Arduino `SPI documentation <https://www.arduino.cc/en/reference/SPI>`_ gives
+The Arduino `SPI documentation <https://docs.arduino.cc/language-reference/en/functions/communication/SPI/>`_ gives
 a detailed overview of the library, except for the following RP2040-specific
 changes:
 

libraries/ADCInput/src/ADCInput.cpp

@@ -23,6 +23,7 @@
 #include <Arduino.h>
 #include "ADCInput.h"
 #include <hardware/adc.h>
+#include <debug_internal.h>
 
 ADCInput::ADCInput(pin_size_t p0, pin_size_t p1, pin_size_t p2, pin_size_t p3, pin_size_t p4, pin_size_t p5, pin_size_t p6, pin_size_t p7) {
     _running = false;
@@ -122,6 +123,18 @@ bool ADCInput::begin() {
             adc_gpio_init(pin);
         }
     }
+
+    // Make sure the bufferWords is a multiple of the natural size.
+    // For 1 and 2 inputs there will never be a misalignment on overflow
+    // For 3 inputs we need to have a multiple of 3 words to guarantee that every buffer[0] is ADC[0].  OTW we can slip on an overflow
+    // Data = [ADC0:ADC1, ADC2:ADC0, ADC1:ADC2], [ADC0:ADC1, ADC2:ADC0, ADC1:ADC2,ADC3], ...
+    // For 4 inputs we need to have a multiple of 2 words, same reason.  See #2991
+    // Data = [ADC0:ADC1, ADC2:ADC3] [ADC0:ADC1, ADC2:ADC3]
+    if (((cnt == 3) && (_bufferWords % 3)) || ((cnt == 4) && (_bufferWords % 2))) {
+        DEBUGV("ADCInput: bufferWords needs to be a multiple of 3 for 3 inputs, 2 for 4 inputs\n");
+        return false;
+    }
+
     adc_set_round_robin(_pinMask);
     adc_fifo_setup(true, true, 1, false, false);
 

libraries/Adafruit_TinyUSB_Arduino

@@ -1 +1 @@
-Subproject commit 6b772c0ac4a8158011a738e794463a2fe4e84a33
+Subproject commit 737dfb21154754485d5e45567315364bc382e1be

libraries/HTTPClient/examples/StreamHttpsClient/StreamHttpsClient.ino

@@ -45,7 +45,7 @@ void loop() {
     Serial.print("[HTTPS] begin...\n");
 
     // configure server and url
-    const char *fp = "41:FA:FD:B6:96:5F:33:09:F4:ED:09:28:BF:66:4D:5B:A2:88:03:65";
+    const char *fp = "e5:e8:05:7d:85:70:b0:db:d9:5a:b6:a6:bb:2b:29:ae:d9:b1:b7:f9";
 
     HTTPClient https;
     https.setFingerprint(fp);

libraries/HTTPClient/src/HTTPClient.cpp

@@ -323,6 +323,7 @@ bool HTTPClient::beginInternal(const String& __url, const char* expectedProtocol
         return false;
     }
     DEBUG_HTTPCLIENT("[HTTP-Client][begin] host: %s port: %d url: %s\n", _host.c_str(), _port, _uri.c_str());
+
     return true;
 }
 
@@ -675,6 +676,7 @@ int HTTPClient::sendRequest(const char * type, const uint8_t * payload, size_t s
         }
     } while (redirect);
 
+
     // handle Server Response (Header)
     return returnError(code);
 }
@@ -744,7 +746,7 @@ const String& HTTPClient::getLocation(void) {
 */
 WiFiClient& HTTPClient::getStream(void) {
     if (connected()) {
-        return *_client();
+        return _stream;
     }
 
     DEBUG_HTTPCLIENT("[HTTP-Client] getStream: not connected\n");
@@ -758,7 +760,7 @@ WiFiClient& HTTPClient::getStream(void) {
 */
 WiFiClient* HTTPClient::getStreamPtr(void) {
     if (connected()) {
-        return _client();
+        return &_stream;
     }
 
     DEBUG_HTTPCLIENT("[HTTP-Client] getStreamPtr: not connected\n");
@@ -808,57 +810,10 @@ int HTTPClient::writeToPrint(Print * print) {
         //            return returnError(StreamReportToHttpClientReport(_client->getLastSendReport()));
         //        }
     } else if (_transferEncoding == HTTPC_TE_CHUNKED) {
-        int size = 0;
-        while (1) {
-            if (!connected()) {
-                return returnError(HTTPC_ERROR_CONNECTION_LOST);
-            }
-            String chunkHeader = _client()->readStringUntil('\n');
+        ret = StreamSendSize(&_stream, print, -1);
 
-            if (chunkHeader.length() <= 0) {
-                return returnError(HTTPC_ERROR_READ_TIMEOUT);
-            }
-
-            chunkHeader.trim(); // remove \r
-            DEBUG_HTTPCLIENT("[HTTP-Client] chunk header: '%s'\n", chunkHeader.c_str());
-
-            // read size of chunk
-            len = (uint32_t) strtol((const char *) chunkHeader.c_str(), nullptr, 16);
-            size += len;
-            DEBUG_HTTPCLIENT("[HTTP-Client] read chunk len: %d\n", len);
-
-            // data left?
-            if (len > 0) {
-                // read len bytes with timeout
-                int r = StreamSendSize(_client(), print, len);
-                if (r != len) {
-                    return HTTPC_ERROR_NO_STREAM;
-                }
-
-                //               if (_client->getLastSendReport() != Stream::Report::Success)
-                //                    // not all data transferred
-                //                    return returnError(StreamReportToHttpClientReport(_client->getLastSendReport()));
-                ret += r;
-            } else {
-
-                // if no length Header use global chunk size
-                if (_size <= 0) {
-                    _size = size;
-                }
-
-                // check if we have write all data out
-                if (ret != _size) {
-                    return returnError(HTTPC_ERROR_STREAM_WRITE);
-                }
-                break;
-            }
-
-            // read trailing \r\n at the end of the chunk
-            char buf[2];
-            auto trailing_seq_len = _client()->readBytes((uint8_t*)buf, 2);
-            if (trailing_seq_len != 2 || buf[0] != '\r' || buf[1] != '\n') {
-                return returnError(HTTPC_ERROR_READ_TIMEOUT);
-            }
+        if (ret == 0) {
+            return HTTPC_ERROR_NO_STREAM;
         }
     } else {
         return returnError(HTTPC_ERROR_ENCODING);
@@ -1112,6 +1067,9 @@ int HTTPClient::handleHeaderResponse() {
 
     _canReuse = _reuse;
 
+    // Hook up the HTTPStream to this WiFiClient already connected and headers decoded
+    _stream.reset(_client(), false);
+
     String transferEncoding;
 
     _transferEncoding = HTTPC_TE_IDENTITY;
@@ -1196,6 +1154,9 @@ int HTTPClient::handleHeaderResponse() {
                     DEBUG_HTTPCLIENT("[HTTP-Client][handleHeaderResponse] Transfer-Encoding: %s\n", transferEncoding.c_str());
                     if (transferEncoding.equalsIgnoreCase(F("chunked"))) {
                         _transferEncoding = HTTPC_TE_CHUNKED;
+                    } else if (transferEncoding.equalsIgnoreCase(F("identity"))) {
+                        // Not in the RFC but seen in the wild
+                        _transferEncoding = HTTPC_TE_IDENTITY;
                     } else {
                         _returnCode = HTTPC_ERROR_ENCODING;
                         return _returnCode;
@@ -1204,6 +1165,9 @@ int HTTPClient::handleHeaderResponse() {
                     _transferEncoding = HTTPC_TE_IDENTITY;
                 }
 
+                // Hook up the HTTPStream to this WiFiClient already connected and headers decoded
+                _stream.reset(_client(), _transferEncoding == HTTPC_TE_CHUNKED);
+
                 if (_returnCode <= 0) {
                     DEBUG_HTTPCLIENT("[HTTP-Client][handleHeaderResponse] Remote host is not an HTTP Server!");
                     _returnCode = HTTPC_ERROR_NO_HTTP_SERVER;

libraries/HTTPClient/src/HTTPClient.h

@@ -176,6 +176,228 @@ typedef struct  {
 } Cookie;
 typedef std::vector<Cookie> CookieJar;
 
+class HTTPStream : public WiFiClient {
+public:
+    HTTPStream() {
+        _conn = nullptr;
+        _chunked = false;
+        _chunkLen = 0;
+        _state = READ_HEX;
+        _partial = 0;
+        _eof = false;
+    }
+
+    HTTPStream(const HTTPStream&);
+    HTTPStream& operator=(const HTTPStream&);
+
+    void reset(WiFiClient *connection, bool chunked) {
+        DEBUG_HTTPCLIENT("[HTTPStream] reset(%p, %d)\n", connection, chunked);
+        _conn = connection;
+        _partial = 0;
+        _state = READ_HEX;
+        _chunked = chunked;
+        _eof = false;
+    }
+
+    virtual size_t write(uint8_t c) override {
+        return _conn->write(c);
+    }
+
+    virtual size_t write(const uint8_t *buf, size_t size) override {
+        return _conn->write(buf, size);
+    }
+
+    virtual uint8_t connected() override {
+        return _conn->connected();
+    }
+
+    virtual int available() override {
+        if (!_chunked) {
+            return _conn->available();
+        }
+        // We're chunked at this point
+        if (_eof) {
+            return 0;
+        }
+        if (!_chunkLen) {
+            tryReadChunkLen(1);
+        }
+        return std::min(_chunkLen, _conn->available());
+    }
+
+    virtual int availableForWrite() override {
+        return _conn->availableForWrite();
+    }
+
+    virtual void flush() override {
+        _conn->flush();
+    }
+
+    virtual void stop() override {
+        _conn->stop();
+    }
+
+    virtual int read() override {
+        if (!_chunked) {
+            return _conn->read();
+        }
+        // We're chunked at this point
+        if (_eof) {
+            DEBUG_HTTPCLIENT("[HTTPStream] ::read() after EOF\n");
+            return -1;
+        }
+        if (!_chunkLen) {
+            tryReadChunkLen(_timeout);
+        }
+        if (!_chunkLen) {
+            DEBUG_HTTPCLIENT("[HTTPStream] ::read no chunkLen\n");
+            return -1;
+        }
+        uint32_t start = millis();
+        while (((millis() - start) < _timeout) && !_conn->available() && _conn->connected()) {
+            delay(1);
+        }
+        if (_conn->available()) {
+            _chunkLen--;
+            return _conn->read();
+        } else {
+            DEBUG_HTTPCLIENT("[HTTPStream] ::read wrapped stream failure. avail = %d, conn = %d\n", _conn->available(), _conn->connected());
+            return -1;
+        }
+    }
+
+    virtual int read(uint8_t *buf, size_t size) override {
+        if (!_chunked) {
+            return _conn->read(buf, size);
+        }
+        for (int i = 0; i < (int)size; i++) {
+            int c = read();
+            if (c < 0) {
+                return i;
+            }
+            *(buf++) = (uint8_t)c;
+        }
+        return size;
+    }
+
+    virtual int peek() override {
+        if (!_chunked) {
+            return _conn->peek();
+        }
+        // We're chunked at this point
+        if (_eof) {
+            DEBUG_HTTPCLIENT("[HTTPStream] ::peek after EOF\n");
+            return -1;
+        }
+        if (!_chunkLen) {
+            tryReadChunkLen(_timeout);
+        }
+        if (!_chunkLen) {
+            DEBUG_HTTPCLIENT("[HTTPStream] ::peek no chunkLen\n");
+            return -1;
+        }
+        uint32_t start = millis();
+        while (((millis() - start) < _timeout) && !_conn->available() && _conn->connected()) {
+            delay(1);
+        }
+        if (_conn->available()) {
+            return _conn->peek();
+        } else {
+            DEBUG_HTTPCLIENT("[HTTPStream] ::peek wrapped stream failure. avail = %d, conn = %d\n", _conn->available(), _conn->connected());
+            return -1;
+        }
+    }
+
+    void setTimeout(unsigned long timeout) {
+        _timeout = timeout;
+        _conn->setTimeout(timeout);
+    }
+
+private:
+    void tryReadChunkLen(uint32_t to) {
+        if (_state == ERROR) {
+            return;
+        }
+        uint32_t start = millis();
+        while ((millis() - start) <= to) {
+            if (_conn->available()) {
+                int recv = _conn->read();
+                if (recv < 0) {
+                    DEBUG_HTTPCLIENT("[HTTPStream] Read of available data failed\n");
+                    _state = ERROR;
+                    return;
+                }
+                switch (_state) {
+                case READ_HEX:
+                    if (recv == '\r') {
+                        DEBUG_HTTPCLIENT("[HTTPStream] Saw \\r of chunk len\r\n");
+                        _state = READ_LF;
+                        break;
+                    }
+                    if (recv >= '0' && recv <= '9') {
+                        DEBUG_HTTPCLIENT("[HTTPStream] Read %c of chunk size\n", recv);
+                        _partial <<= 4;
+                        _partial |= recv - '0';
+                    } else if (tolower(recv) >= 'a' && tolower(recv) <= 'f') {
+                        DEBUG_HTTPCLIENT("[HTTPStream] Read %c of chunk size\n", recv);
+                        _partial <<= 4;
+                        _partial |= tolower(recv) - 'a' + 10;
+                    } else {
+                        DEBUG_HTTPCLIENT("[HTTPStream] READ_HEX error '%c'\n", recv);
+                        _state = ERROR;
+                        return;
+                    }
+                    break;
+                case READ_LF:
+                    if (recv != '\n') {
+                        _state = ERROR;
+                        DEBUG_HTTPCLIENT("[HTTPStream] READ_LF error '%02x'\n", recv);
+                        return;
+                    }
+                    DEBUG_HTTPCLIENT("[HTTPStream] Chunk len = %d\n", _partial);
+                    _chunkLen = _partial;
+                    _partial = 0;
+                    _state = TAIL_CR;
+                    if (_chunkLen == 0) {
+                        // 0-sized chunk is EOF special case
+                        _eof = true;
+                    }
+                    return;
+                case TAIL_CR:
+                    if (recv == '\r') {
+                        DEBUG_HTTPCLIENT("[HTTPStream] Saw \\r of chunk end\n");
+                        _state = TAIL_LF;
+                        break;
+                    }
+                    DEBUG_HTTPCLIENT("[HTTPStream] TAIL_CR error '%c'\n", recv);
+                    _state = ERROR;
+                    return;
+                case TAIL_LF:
+                    if (recv == '\n') {
+                        DEBUG_HTTPCLIENT("[HTTPStream] Saw \\n of chunk end\n");
+                        _state = READ_HEX;
+                        break;
+                    }
+                    DEBUG_HTTPCLIENT("[HTTPStream] TAIL_LF error '%c'\n", recv);
+                    _state = ERROR;
+                    return;
+                case ERROR:
+                    return;
+                }
+            }
+        }
+        DEBUG_HTTPCLIENT("[HTTPStream] Timeout waiting for chunk\n");
+    }
+
+    WiFiClient *_conn;
+    bool _chunked;
+    int _chunkLen;
+    enum { READ_HEX, READ_LF, TAIL_CR, TAIL_LF, ERROR } _state;
+    int _partial;
+    bool _eof;
+};
+
+
 class HTTPClient {
 public:
     HTTPClient() = default;
@@ -407,4 +629,6 @@ protected:
     std::unique_ptr<StreamString> _payload;
     // Cookie jar support
     CookieJar *_cookieJar = nullptr;
+
+    HTTPStream _stream;
 };

libraries/PWMAudio/src/PWMAudio.cpp

@@ -30,6 +30,7 @@ PWMAudio::PWMAudio(pin_size_t pin, bool stereo) {
     _freq = 48000;
     _arb = nullptr;
     _cb = nullptr;
+    _cbd = nullptr;
     _buffers = 8;
     _bufferWords = 0;
     _stereo = stereo;

libraries/SPISlave/src/SPISlave.cpp

@@ -48,36 +48,6 @@ SPISlaveClass::SPISlaveClass(spi_inst_t *spi, pin_size_t rx, pin_size_t cs, pin_
     _dataLeft = 0;
 }
 
-inline spi_cpol_t SPISlaveClass::cpol(SPISettings _spis) {
-    switch (_spis.getDataMode()) {
-    case SPI_MODE0:
-        return SPI_CPOL_0;
-    case SPI_MODE1:
-        return SPI_CPOL_0;
-    case SPI_MODE2:
-        return SPI_CPOL_1;
-    case SPI_MODE3:
-        return SPI_CPOL_1;
-    }
-    // Error
-    return SPI_CPOL_0;
-}
-
-inline spi_cpha_t SPISlaveClass::cpha(SPISettings _spis) {
-    switch (_spis.getDataMode()) {
-    case SPI_MODE0:
-        return SPI_CPHA_0;
-    case SPI_MODE1:
-        return SPI_CPHA_1;
-    case SPI_MODE2:
-        return SPI_CPHA_0;
-    case SPI_MODE3:
-        return SPI_CPHA_1;
-    }
-    // Error
-    return SPI_CPHA_0;
-}
-
 bool SPISlaveClass::setRX(pin_size_t pin) {
 #if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
     constexpr uint64_t valid[2] = { __bitset({0, 4, 16, 20, 32, 26}) /* SPI0 */,
@@ -196,7 +166,7 @@ void SPISlaveClass::_handleIRQ() {
     if (cnt && _recvCB) {
         _recvCB(buff, cnt);
     }
-    // Attempt to send as many ytes to the TX FIFO as we have/are free
+    // Attempt to send as many bytes to the TX FIFO as we have/are free
     while (spi_is_writable(_spi)) {
         for (; _dataLeft && spi_is_writable(_spi); _dataLeft--) {
             spi_get_hw(_spi)->dr = *(_dataOut++);
@@ -243,7 +213,7 @@ void SPISlaveClass::begin(SPISettings spis) {
     spi_init(_spi, _spis.getClockFreq());
     DEBUGSPI("SPISlave: actual baudrate=%u\n", spi_get_baudrate(_spi));
     spi_set_slave(_spi, true);
-    spi_set_format(_spi, 8, cpol(spis),	cpha(spis), SPI_MSB_FIRST);
+    spi_set_format(_spi, 8, _helper.cpol(spis),	_helper.cpha(spis), SPI_MSB_FIRST);
 
     // Install our IRQ handler
     if (_spi == spi0) {

libraries/SPISlave/src/SPISlave.h

@@ -21,6 +21,7 @@
 #pragma once
 
 #include <Arduino.h>
+#include <SPI.h> // For SPIHelper
 #include <api/HardwareSPI.h>
 #include <hardware/spi.h>
 #include <functional>
@@ -69,10 +70,6 @@ public:
     void _handleIRQ();
 
 private:
-    spi_cpol_t cpol(SPISettings _spis);
-    spi_cpha_t cpha(SPISettings _spis);
-    uint8_t reverseByte(uint8_t b);
-    uint16_t reverse16Bit(uint16_t w);
     void adjustBuffer(const void *s, void *d, size_t cnt, bool by16);
 
     spi_inst_t *_spi;
@@ -89,6 +86,8 @@ private:
     size_t _dataLeft;
 
     // Received data will be returned in small chunks directly from a local buffer in _handleIRQ()
+
+    SPIHelper _helper;
 };
 
 extern SPISlaveClass SPISlave;

libraries/SerialBT/src/SerialBT.h

@@ -79,7 +79,7 @@ private:
     // Lockless, IRQ-handled circular queue
     uint32_t _writer;
     uint32_t _reader;
-    size_t   _fifoSize = 32;
+    size_t   _fifoSize = 1024;
     uint8_t *_queue;
 
     const int RFCOMM_SERVER_CHANNEL = 1;

libraries/lwIP_w6300/examples/WiFiClient-W6300/WiFiClient-W6300.ino

@@ -0,0 +1,95 @@
+/*
+    This sketch establishes a TCP connection to a "quote of the day" service.
+    It sends a "hello" message, and then prints received data.
+*/
+
+#include <W6300lwIP.h>
+
+const char* host = "djxmmx.net";
+const uint16_t port = 17;
+
+Wiznet6300lwIP eth(1 /* chip select */);
+
+void setup() {
+  // Set up SPI pinout to match your HW
+  SPI.setRX(0);
+  SPI.setCS(1);
+  SPI.setSCK(2);
+  SPI.setTX(3);
+
+  Serial.begin(115200);
+  delay(5000);
+  Serial.println();
+  Serial.println();
+  Serial.println("Starting Ethernet port");
+
+  // Start the Ethernet port
+  if (!eth.begin()) {
+    Serial.println("No wired Ethernet hardware detected. Check pinouts, wiring.");
+    while (1) {
+      delay(1000);
+    }
+  }
+
+  while (!eth.connected()) {
+    Serial.print(".");
+    delay(500);
+  }
+
+  Serial.println("");
+  Serial.println("Ethernet connected");
+  Serial.println("IP address: ");
+  Serial.println(eth.localIP());
+}
+
+void loop() {
+  static bool wait = false;
+
+  Serial.print("connecting to ");
+  Serial.print(host);
+  Serial.print(':');
+  Serial.println(port);
+
+  // Use WiFiClient class to create TCP connections
+  WiFiClient client;
+  if (!client.connect(host, port)) {
+    Serial.println("connection failed");
+    delay(5000);
+    return;
+  }
+
+  // This will send a string to the server
+  Serial.println("sending data to server");
+  if (client.connected()) {
+    client.println("hello from RP2040");
+  }
+
+  // wait for data to be available
+  unsigned long timeout = millis();
+  while (client.available() == 0) {
+    if (millis() - timeout > 5000) {
+      Serial.println(">>> Client Timeout !");
+      client.stop();
+      delay(60000);
+      return;
+    }
+  }
+
+  // Read all the lines of the reply from server and print them to Serial
+  Serial.println("receiving from remote server");
+  // not testing 'client.connected()' since we do not need to send data here
+  while (client.available()) {
+    char ch = static_cast<char>(client.read());
+    Serial.print(ch);
+  }
+
+  // Close the connection
+  Serial.println();
+  Serial.println("closing connection");
+  client.stop();
+
+  if (wait) {
+    delay(300000);  // execute once every 5 minutes, don't flood remote service
+  }
+  wait = true;
+}

libraries/lwIP_w6300/keywords.txt

@@ -0,0 +1,18 @@
+#######################################
+# Syntax Coloring Map
+#######################################
+
+#######################################
+# Library (KEYWORD1)
+#######################################
+
+W6100lwIP	KEYWORD1
+Wiznet6100lwIP	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+#######################################
+# Constants (LITERAL1)
+#######################################

libraries/lwIP_w6300/library.properties

@@ -0,0 +1,10 @@
+name=lwIP_w6300
+version=1
+author=Stefan Nuernberger
+maintainer=esp8266/Arduino
+sentence=Ethernet driver
+paragraph=Wiznet6300 ethernet drivers for lwIP and esp8266 Arduino from https://github.com/njh/W5100MacRaw
+category=Communication
+url=https://github.com/esp8266/Arduino
+architectures=rp2040
+dot_a_linkage=true

libraries/lwIP_w6300/src/W6300lwIP.h

@@ -0,0 +1,8 @@
+#pragma once
+
+#include <LwipIntfDev.h>
+#include <utility/w6300.h>
+#include <LwipEthernet.h>
+#include <WiFi.h>
+
+using Wiznet6300lwIP = LwipIntfDev<Wiznet6300>;

libraries/lwIP_w6300/src/utility/w6300.cpp

@@ -0,0 +1,457 @@
+/*
+    Copyright (c) 2013, WIZnet Co., Ltd.
+    Copyright (c) 2016, Nicholas Humfrey
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+    1. Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in the
+      documentation and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+    FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+    COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+    INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+    OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+// original sources: https://github.com/njh/W5500MacRaw
+
+#include <SPI.h>
+#include "wiznet_pio_qspi.h"
+#include "w6300.h"
+#include <LwipEthernet.h>
+
+#define _W6300_SPI_READ_            (0x00 << 5)        ///< SPI interface Read operation in Control Phase
+#define _W6300_SPI_WRITE_           (0x01 << 5)        ///< SPI interface Write operation in Control Phase
+
+#define QSPI_SINGLE_MODE            (0x00 << 6) // 0b0000 0000 // 0x00
+#define QSPI_DUAL_MODE              (0x01 << 6) // 0b0100 0000 // 0x40
+#define QSPI_QUAD_MODE              (0x02 << 6) // 0b1000 0000 // 0x80 
+
+wiznet_pio_qspi_config_t wiznet_pio_qspi_config;
+wiznet_pio_qspi_handle_t wiznet_pio_qspi_handle = NULL;
+
+/**
+    Check physical link
+    @return true when physical link is up
+*/
+bool Wiznet6300::isLinked() {
+    ethernet_arch_lwip_gpio_mask();
+    ethernet_arch_lwip_begin();
+    auto ret = wizphy_getphylink() == PHY_LINK_ON;
+    ethernet_arch_lwip_end();
+    ethernet_arch_lwip_gpio_unmask();
+    return ret;
+}
+
+uint8_t Wiznet6300::wizchip_read(uint8_t block, uint16_t address) {
+    uint8_t ret = 0;
+    uint8_t opcode = 0;
+    uint16_t ADDR = 0;
+
+    wizchip_cs_select();
+
+    opcode = (uint8_t)((block & 0x000000FF) | (_W6300_SPI_READ_) | (QSPI_QUAD_MODE));
+    ADDR = (uint16_t)(address & 0x0000FFFF);
+    (*wiznet_pio_qspi_handle)->read_byte(opcode, ADDR, &ret, 1);
+
+    wizchip_cs_deselect();
+    return ret;
+}
+
+uint16_t Wiznet6300::wizchip_read_word(uint8_t block, uint16_t address) {
+    return ((uint16_t)wizchip_read(block, address) << 8) + wizchip_read(block, address + 1);
+}
+
+void Wiznet6300::wizchip_read_buf(uint8_t block, uint16_t address, uint8_t* pBuf, uint16_t len) {
+    uint8_t opcode = 0;
+    uint16_t ADDR = 0;
+
+    wizchip_cs_select();
+
+    opcode = (uint8_t)((block & 0x000000FF) | (_W6300_SPI_READ_) | (QSPI_QUAD_MODE));
+    ADDR = (uint16_t)(address & 0x0000FFFF);
+    (*wiznet_pio_qspi_handle)->read_byte(opcode, ADDR, pBuf, len);
+
+    wizchip_cs_deselect();
+}
+
+void Wiznet6300::wizchip_write(uint8_t block, uint16_t address, uint8_t wb) {
+    uint8_t opcode = 0;
+    uint16_t ADDR = 0;
+
+    wizchip_cs_select();
+
+    opcode = (uint8_t)((block & 0x000000FF) | (_W6300_SPI_WRITE_) | (QSPI_QUAD_MODE));
+    ADDR = (uint16_t)(address & 0x0000FFFF);
+    (*wiznet_pio_qspi_handle)->write_byte(opcode, ADDR, &wb, 1);
+
+    wizchip_cs_deselect();
+}
+
+void Wiznet6300::wizchip_write_word(uint8_t block, uint16_t address, uint16_t word) {
+    wizchip_write(block, address, (uint8_t)(word >> 8));
+    wizchip_write(block, address + 1, (uint8_t)word);
+}
+
+void Wiznet6300::wizchip_write_buf(uint8_t block, uint16_t address, const uint8_t* pBuf,
+                                   uint16_t len) {
+    uint8_t opcode = 0;
+    uint16_t ADDR = 0;
+
+    wizchip_cs_select();
+
+    opcode = (uint8_t)((block & 0x000000FF) | (_W6300_SPI_WRITE_) | (QSPI_QUAD_MODE));
+    ADDR = (uint16_t)(address & 0x0000FFFF);
+    (*wiznet_pio_qspi_handle)->write_byte(opcode, ADDR, (uint8_t *)pBuf, len);
+
+    wizchip_cs_deselect();
+}
+
+void Wiznet6300::setSn_CR(uint8_t cr) {
+    // Write the command to the Command Register
+    wizchip_write(BlockSelectSReg, Sn_CR, cr);
+
+    // Now wait for the command to complete
+    while (wizchip_read(BlockSelectSReg, Sn_CR))
+        ;
+}
+
+uint16_t Wiznet6300::getSn_TX_FSR() {
+    uint16_t val = 0, val1 = 0;
+    do {
+        val1 = wizchip_read_word(BlockSelectSReg, Sn_TX_FSR);
+        if (val1 != 0) {
+            val = wizchip_read_word(BlockSelectSReg, Sn_TX_FSR);
+        }
+    } while (val != val1);
+    return val;
+}
+
+uint16_t Wiznet6300::getSn_RX_RSR() {
+    uint16_t val = 0, val1 = 0;
+    do {
+        val1 = wizchip_read_word(BlockSelectSReg, Sn_RX_RSR);
+        if (val1 != 0) {
+            val = wizchip_read_word(BlockSelectSReg, Sn_RX_RSR);
+        }
+    } while (val != val1);
+    return val;
+}
+
+void Wiznet6300::wizchip_send_data(const uint8_t* wizdata, uint16_t len) {
+    uint16_t ptr = 0;
+
+    if (len == 0) {
+        return;
+    }
+    ptr = getSn_TX_WR();
+    wizchip_write_buf(BlockSelectTxBuf, ptr, wizdata, len);
+
+    ptr += len;
+
+    setSn_TX_WR(ptr);
+}
+
+void Wiznet6300::wizchip_recv_data(uint8_t* wizdata, uint16_t len) {
+    uint16_t ptr;
+
+    if (len == 0) {
+        return;
+    }
+    ptr = getSn_RX_RD();
+    wizchip_read_buf(BlockSelectRxBuf, ptr, wizdata, len);
+    ptr += len;
+
+    setSn_RX_RD(ptr);
+}
+
+void Wiznet6300::wizchip_recv_ignore(uint16_t len) {
+    uint16_t ptr;
+
+    ptr = getSn_RX_RD();
+    ptr += len;
+    setSn_RX_RD(ptr);
+}
+
+bool Wiznet6300::wizchip_sw_reset() {
+    setChipLOCK(CHPLCKR_UNLOCK);
+    uint16_t count = 0;
+    do {
+        // Wait Unlock Complete
+        if (++count > 20) {
+            // Check retry count
+            return false; // Over Limit retry count
+        }
+    } while ((getStatus() & SYSR_CHPL_LOCK) ^ SYSR_CHPL_ULOCK); // Exit Wait Unlock Complete
+
+    setCommand0(0x0); // Software Reset
+
+    do {
+        // Wait Lock Complete
+        if (++count > 20) {
+            // Check retry count
+            return false; // Over Limit retry count
+        }
+
+    } while ((getStatus() & SYSR_CHPL_LOCK) ^ SYSR_CHPL_LOCK); // Exit Wait Lock Complete
+
+    return true;
+}
+
+int8_t Wiznet6300::wizphy_getphylink() {
+    int8_t tmp;
+    if (getPHYCFGR() & PHYCFGR_LNK_ON) {
+        tmp = PHY_LINK_ON;
+    } else {
+        tmp = PHY_LINK_OFF;
+    }
+    return tmp;
+}
+
+int8_t Wiznet6300::wizphy_getphypmode() {
+    int8_t tmp = 0;
+    if (getPHYCFGR() & PHYCFGR_OPMDC_PDOWN) {
+        tmp = PHY_POWER_DOWN;
+    } else {
+        tmp = PHY_POWER_NORM;
+    }
+    return tmp;
+}
+
+void Wiznet6300::wizphy_reset() {
+    uint8_t tmp = getPHYCFGR();
+    tmp &= PHYCFGR_RST;
+    setPHYCFGR(tmp);
+    tmp = getPHYCFGR();
+    tmp |= ~PHYCFGR_RST;
+    setPHYCFGR(tmp);
+}
+
+int8_t Wiznet6300::wizphy_setphypmode(uint8_t pmode) {
+    uint8_t tmp = 0;
+    tmp         = getPHYCFGR();
+    if ((tmp & PHYCFGR_OPMD) == 0) {
+        return -1;
+    }
+    tmp &= ~PHYCFGR_OPMDC_ALLA;
+    if (pmode == PHY_POWER_DOWN) {
+        tmp |= PHYCFGR_OPMDC_PDOWN;
+    } else {
+        tmp |= PHYCFGR_OPMDC_ALLA;
+    }
+    setPHYCFGR(tmp);
+    wizphy_reset();
+    tmp = getPHYCFGR();
+    if (pmode == PHY_POWER_DOWN) {
+        if (tmp & PHYCFGR_OPMDC_PDOWN) {
+            return 0;
+        }
+    } else {
+        if (tmp & PHYCFGR_OPMDC_ALLA) {
+            return 0;
+        }
+    }
+    return -1;
+}
+
+Wiznet6300::Wiznet6300(int8_t cs, SPIClass& spi, int8_t intr) : _spi(spi), _cs(cs), _intr(intr) {
+}
+
+bool Wiznet6300::begin(const uint8_t* mac_address, netif *net) {
+    wiznet_pio_qspi_config.clock_div_major = 4;
+    wiznet_pio_qspi_config.clock_div_minor = 0;
+    wiznet_pio_qspi_config.data_io0_pin = WIZNET_PIO_QSPI_DATA_IO0_PIN;
+    wiznet_pio_qspi_config.data_io1_pin = WIZNET_PIO_QSPI_DATA_IO1_PIN;
+    wiznet_pio_qspi_config.data_io2_pin = WIZNET_PIO_QSPI_DATA_IO2_PIN;
+    wiznet_pio_qspi_config.data_io3_pin = WIZNET_PIO_QSPI_DATA_IO3_PIN;
+    wiznet_pio_qspi_config.clock_pin = WIZNET_PIO_QSPI_SCK_PIN;
+    wiznet_pio_qspi_config.cs_pin = WIZNET_PIO_QSPI_CS_PIN;
+
+    if (wiznet_pio_qspi_handle != NULL) {
+        wiznet_pio_qspi_close(wiznet_pio_qspi_handle);
+    }
+    wiznet_pio_qspi_handle = wiznet_pio_qspi_open(&wiznet_pio_qspi_config);
+    (*wiznet_pio_qspi_handle)->set_active(wiznet_pio_qspi_handle);
+
+    _netif = net;
+    memcpy(_mac_address, mac_address, 6);
+
+    pinMode(_cs, OUTPUT);
+    wizchip_cs_deselect();
+
+    wizchip_sw_reset();
+
+    // Unlock
+    setChipLOCK(CHPLCKR_UNLOCK);
+    setNetLOCK(NETLCKR_UNLOCK);
+    setPHYLOCK(PHYLCKR_UNLOCK);
+
+    // W6100 CIDR0
+    // Version 97(dec) 0x61(hex)
+    int ver = getVERSIONR();
+
+    Serial.print("version = 0x");
+    Serial.println(ver, HEX);
+
+    if (ver != 0x61) {
+        return false;
+    }
+
+    // Use the full 32Kb of RAM for Socket 0
+    setSn_RXBUF_SIZE(32);
+    setSn_TXBUF_SIZE(32);
+
+    // Set our local MAC address
+    setSHAR(_mac_address);
+
+    // Open Socket 0 in MACRaw mode
+    setSn_MR(Sn_MR_MACRAW);
+    setSn_CR(Sn_CR_OPEN);
+    if (getSn_SR() != SOCK_MACRAW) {
+        // Failed to put socket 0 into MACRaw mode
+        return false;
+    }
+
+    Serial.println("MAC RAW mode!");
+
+    if (_intr >= 0) {
+
+        setSn_IR(0xff); // Clear everything
+
+
+        // Configure socket 0 interrupts
+        setSn_IMR(Sn_IMR_RECV); // we're not interested in Sn_IMR_SENDOK atm
+
+        // Enable socket 0 interrupts
+        setSIMR(SIMR_S0_INT);
+
+        // Disable unused interrupts
+        setIMR(0);
+
+        // Enable interrupt pin
+        setCommand1(SYCR1_IEN);
+
+    }
+
+    // Success
+    return true;
+}
+
+void Wiznet6300::end() {
+    setSn_CR(Sn_CR_CLOSE);
+
+    // clear all interrupt of the socket
+    setSn_IR(0xFF);
+
+    // Wait for socket to change to closed
+    while (getSn_SR() != SOCK_CLOSED)
+        ;
+}
+
+/*
+    uint16_t Wiznet6100::readFrame(uint8_t* buffer, uint16_t bufsize) {
+    uint16_t data_len = readFrameSize();
+
+    if (data_len == 0) {
+        return 0;
+    }
+
+    if (data_len > bufsize) {
+        // Packet is bigger than buffer - drop the packet
+        discardFrame(data_len);
+        return 0;
+    }
+
+    return readFrameData(buffer, data_len);
+    }
+*/
+
+uint16_t Wiznet6300::readFrameSize() {
+    setSn_IR(Sn_IR_RECV);
+
+    uint16_t len = getSn_RX_RSR();
+
+    if (len == 0) {
+        return 0;
+    }
+
+    uint8_t  head[2];
+    uint16_t data_len = 0;
+
+    wizchip_recv_data(head, 2);
+    setSn_CR(Sn_CR_RECV);
+
+    data_len = head[0];
+    data_len = (data_len << 8) + head[1];
+    data_len -= 2;
+
+    // Clear interrupt flags
+    setICLR(Sn_IRCLR_RECV);
+    return data_len;
+}
+
+void Wiznet6300::discardFrame(uint16_t framesize) {
+    wizchip_recv_ignore(framesize);
+    setSn_CR(Sn_CR_RECV);
+}
+
+uint16_t Wiznet6300::readFrameData(uint8_t* buffer, uint16_t framesize) {
+    wizchip_recv_data(buffer, framesize);
+    setSn_CR(Sn_CR_RECV);
+
+    // let lwIP deal with mac address filtering
+    return framesize;
+}
+
+uint16_t Wiznet6300::sendFrame(const uint8_t* buf, uint16_t len) {
+    ethernet_arch_lwip_gpio_mask(); // So we don't fire an IRQ and interrupt the send w/a receive!
+
+    // Wait for space in the transmit buffer
+    while (1) {
+        uint16_t freesize = getSn_TX_FSR();
+        if (getSn_SR() == SOCK_CLOSED) {
+            ethernet_arch_lwip_gpio_unmask();
+            return -1;
+        }
+        if (len <= freesize) {
+            break;
+        }
+    };
+
+    wizchip_send_data(buf, len);
+    setSn_CR(Sn_CR_SEND);
+
+    while (1) {
+        uint8_t tmp = getSn_IR();
+        if (tmp & Sn_IR_SENDOK) {
+            setSn_IR(Sn_IR_SENDOK);
+            // Packet sent ok
+            break;
+        } else if (tmp & Sn_IR_TIMEOUT) {
+            setSn_IR(Sn_IR_TIMEOUT);
+            // There was a timeout
+            ethernet_arch_lwip_gpio_unmask();
+            return -1;
+        }
+    }
+
+    ethernet_arch_lwip_gpio_unmask();
+    return len;
+}

libraries/lwIP_w6300/src/utility/w6300.h

@@ -0,0 +1,898 @@
+/*
+    Copyright (c) 2013, WIZnet Co., Ltd.
+    Copyright (c) 2016, Nicholas Humfrey
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+    1. Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in the
+      documentation and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+    FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+    COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+    INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+    OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+// original sources: https://github.com/njh/W5500MacRaw
+
+#ifndef W6300_H
+#define W6300_H
+
+#include <stdint.h>
+#include <Arduino.h>
+#include <SPI.h>
+#include <LwipEthernet.h>
+#include "wiznet_pio_qspi.h"
+
+#define WIZNET_PIO_QSPI_DATA_IO0_PIN   18
+#define WIZNET_PIO_QSPI_DATA_IO1_PIN   19
+#define WIZNET_PIO_QSPI_DATA_IO2_PIN   20
+#define WIZNET_PIO_QSPI_DATA_IO3_PIN   21
+#define WIZNET_PIO_QSPI_SCK_PIN        17
+#define WIZNET_PIO_QSPI_CS_PIN         16
+
+class Wiznet6300 {
+public:
+    /**
+        Constructor that uses the default hardware SPI pins
+        @param cs the Arduino Chip Select / Slave Select pin (default 10)
+    */
+    Wiznet6300(int8_t cs = SS, SPIClass &spi = SPI, int8_t intr = -1);
+
+    /**
+        Initialise the Ethernet controller
+        Must be called before sending or receiving Ethernet frames
+
+        @param address the local MAC address for the Ethernet interface
+        @return Returns true if setting up the Ethernet interface was successful
+    */
+    bool begin(const uint8_t* address, netif *net);
+
+    /**
+        Shut down the Ethernet controlled
+    */
+    void end();
+
+    /**
+        Send an Ethernet frame
+        @param data a pointer to the data to send
+        @param datalen the length of the data in the packet
+        @return the number of bytes transmitted
+    */
+    uint16_t sendFrame(const uint8_t* data, uint16_t datalen);
+
+    /**
+        Read an Ethernet frame
+        @param buffer a pointer to a buffer to write the packet to
+        @param bufsize the available space in the buffer
+        @return the length of the received packet
+               or 0 if no packet was received
+    */
+    uint16_t readFrame(uint8_t* buffer, uint16_t bufsize);
+
+    bool isLinked();
+
+    /**
+        Report whether ::isLinked() API is implemented
+        @return true when ::isLinked() API is implemented
+    */
+    constexpr bool isLinkDetectable() const {
+        return true;
+    }
+
+    constexpr bool needsSPI() const {
+        return true;
+    }
+
+protected:
+    static constexpr bool interruptIsPossible() {
+        return true;
+    }
+
+    static constexpr PinStatus interruptMode() {
+        return LOW;
+    }
+
+    /**
+        Read an Ethernet frame size
+        @return the length of data do receive
+               or 0 if no frame was received
+    */
+    uint16_t readFrameSize();
+
+    /**
+        discard an Ethernet frame
+        @param framesize readFrameSize()'s result
+    */
+    void discardFrame(uint16_t framesize);
+
+    /**
+        Read an Ethernet frame data
+           readFrameSize() must be called first,
+           its result must be passed into framesize parameter
+        @param buffer a pointer to a buffer to write the frame to
+        @param framesize readFrameSize()'s result
+        @return the length of the received frame
+               or 0 if a problem occurred
+    */
+    uint16_t readFrameData(uint8_t* frame, uint16_t framesize);
+
+private:
+    //< SPI interface Read operation in Control Phase
+    static const uint8_t AccessModeRead = (0x00 << 2);
+
+    //< SPI interface Read operation in Control Phase
+    static const uint8_t AccessModeWrite = (0x01 << 2);
+
+    //< Common register block in Control Phase
+    static const uint8_t BlockSelectCReg = (0x00 << 3);
+
+    //< Socket 0 register block in Control Phase
+    static const uint8_t BlockSelectSReg = (0x01);
+
+    //< Socket 0 Tx buffer address block
+    static const uint8_t BlockSelectTxBuf = (0x02);
+
+    //< Socket 0 Rx buffer address block
+    static const uint8_t BlockSelectRxBuf = (0x03);
+
+    //< SPI Fixed Data Mode Length
+    static const uint8_t FixedDataMode1 = 1;
+    static const uint8_t FixedDataMode2 = 2;
+    static const uint8_t FixedDataMode4 = 3;
+
+    SPIClass& _spi;
+    int8_t    _cs;
+    int8_t    _intr;
+    uint8_t   _mac_address[6];
+
+    /**
+        Default function to select chip.
+        @note This function help not to access wrong address. If you do not describe this function
+        or register any functions, null function is called.
+    */
+    inline void wizchip_cs_select() {
+        //digitalWrite(WIZNET_PIO_QSPI_CS_PIN, LOW);
+        wiznet_pio_qspi_frame_start();
+    }
+
+    /**
+        Default function to deselect chip.
+        @note This function help not to access wrong address. If you do not describe this function
+        or register any functions, null function is called.
+    */
+    inline void wizchip_cs_deselect() {
+        //digitalWrite(WIZNET_PIO_QSPI_CS_PIN, HIGH);
+        wiznet_pio_qspi_frame_end();
+    }
+
+    /**
+        Default function to read in SPI interface.
+        @note This function help not to access wrong address. If you do not describe this function
+        or register any functions, null function is called.
+    */
+    inline uint8_t wizchip_spi_read_byte() {
+        //return _spi.transfer(0);
+        return 0;
+    }
+
+    /**
+        Default function to write in SPI interface.
+        @note This function help not to access wrong address. If you do not describe this function
+        or register any functions, null function is called.
+    */
+    inline void wizchip_spi_write_byte(uint8_t wb) {
+        //_spi.transfer(wb);
+    }
+
+    /**
+        Read a 1 byte value from a register.
+        @param address Register address
+        @return The value of register
+    */
+    uint8_t wizchip_read(uint8_t block, uint16_t address);
+
+    /**
+        Reads a 2 byte value from a register.
+        @param address Register address
+        @return The value of register
+    */
+    uint16_t wizchip_read_word(uint8_t block, uint16_t address);
+
+    /**
+        It reads sequence data from registers.
+        @param address Register address
+        @param pBuf Pointer buffer to read data
+        @param len Data length
+    */
+    void wizchip_read_buf(uint8_t block, uint16_t address, uint8_t* pBuf, uint16_t len);
+
+    /**
+        Write a 1 byte value to a register.
+        @param address Register address
+        @param wb Write data
+        @return void
+    */
+    void wizchip_write(uint8_t block, uint16_t address, uint8_t wb);
+
+    /**
+        Write a 2 byte value to a register.
+        @param address Register address
+        @param wb Write data
+        @return void
+    */
+    void wizchip_write_word(uint8_t block, uint16_t address, uint16_t word);
+
+    /**
+        It writes sequence data to registers.
+        @param address Register address
+        @param pBuf Pointer buffer to write data
+        @param len Data length
+    */
+    void wizchip_write_buf(uint8_t block, uint16_t address, const uint8_t* pBuf, uint16_t len);
+
+    /**
+        Get @ref Sn_TX_FSR register
+        @return uint16_t. Value of @ref Sn_TX_FSR.
+    */
+    uint16_t getSn_TX_FSR();
+
+    /**
+        Get @ref Sn_RX_RSR register
+        @return uint16_t. Value of @ref Sn_RX_RSR.
+    */
+    uint16_t getSn_RX_RSR();
+
+    /**
+        Reset WIZCHIP by softly.
+    */
+    bool wizchip_sw_reset();
+
+    /**
+        Get the link status of phy in WIZCHIP
+    */
+    int8_t wizphy_getphylink();
+
+    /**
+        Get the power mode of PHY in WIZCHIP
+    */
+    int8_t wizphy_getphypmode();
+
+    /**
+        Reset Phy
+    */
+    void wizphy_reset();
+
+    /**
+        set the power mode of phy inside WIZCHIP. Refer to @ref PHYCFGR in W5500, @ref PHYSTATUS in
+        W5200
+        @param pmode Setting value of power down mode.
+    */
+    int8_t wizphy_setphypmode(uint8_t pmode);
+
+    /**
+        It copies data to internal TX memory
+
+        @details This function reads the Tx write pointer register and after that,
+        it copies the <i>wizdata(pointer buffer)</i> of the length of <i>len(variable)</i> bytes to
+        internal TX memory and updates the Tx write pointer register. This function is being called
+        by send() and sendto() function also.
+
+        @param wizdata Pointer buffer to write data
+        @param len Data length
+        @sa wizchip_recv_data()
+    */
+    void wizchip_send_data(const uint8_t* wizdata, uint16_t len);
+
+    /**
+        It copies data to your buffer from internal RX memory
+
+        @details This function read the Rx read pointer register and after that,
+        it copies the received data from internal RX memory
+        to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes.
+        This function is being called by recv() also.
+
+        @param wizdata Pointer buffer to read data
+        @param len Data length
+        @sa wizchip_send_data()
+    */
+    void wizchip_recv_data(uint8_t* wizdata, uint16_t len);
+
+    /**
+        It discard the received data in RX memory.
+        @details It discards the data of the length of <i>len(variable)</i> bytes in internal RX
+        memory.
+        @param len Data length
+    */
+    void wizchip_recv_ignore(uint16_t len);
+
+    /** Common registers */
+    enum {
+        MR       = 0x4000,  ///< Mode Register address (R/W)
+        SHAR     = 0x4120,  ///< Source MAC Register address (R/W)
+        INTLEVEL = 0x0013,  ///< Set Interrupt low level timer register address (R/W)
+        IR       = 0x2100,  ///< Interrupt Register (R/W)
+        _IMR_    = 0x2104,  ///< Interrupt mask register (R/W)
+        SIR      = 0x2101,  ///< Socket Interrupt Register (R/W)
+        _SIMR_   = 0x2114,  ///< Socket Interrupt Mask Register (R/W)
+        _RTR_    = 0x2101,  ///< Timeout register address (1 is 100us) (R/W)
+        _RCR_    = 0x4200,  ///< Retry count register (R/W)
+        UIPR     = 0x0000,  ///< Unreachable IP register address in UDP mode (R)
+        UPORTR   = 0x0000,  ///< Unreachable Port register address in UDP mode (R)
+        PHYCFGR  = 0x3000,  ///< PHY Status Register (R/W)
+        VERSIONR = 0x0000,  ///< Chip version register address (R)
+        NETLCKR  = 0x41F5,  ///< Network lock register
+        CHPLCKR  = 0x41F4,  ///< Chip lock register
+        PHYLCKR  = 0x41F6,  ///< PHY lock register
+        SYSR     = 0x2000,  ///< System status register
+        SYCR0    = 0x2004,  ///< System command register 0
+        SYCR1    = 0x2005,  ///< System command register 1
+    };
+
+    /** Socket registers */
+    enum {
+        Sn_MR         = 0x0000,  ///< Socket Mode register (R/W)
+        Sn_CR         = 0x0010,  ///< Socket command register (R/W)
+        Sn_IR         = 0x0020,  ///< Socket interrupt register (R)
+        Sn_ICLR       = 0x0028,  ///< Socket Interrupt clear register (W)
+        Sn_SR         = 0x0030,  ///< Socket status register (R)
+        Sn_PORT       = 0x0114,  ///< Source port register (R/W)
+        Sn_DHAR       = 0x0118,  ///< Peer MAC register address (R/W)
+        Sn_DIPR       = 0x0120,  ///< Peer IP register address (R/W)
+        Sn_DPORT      = 0x0140,  ///< Peer port register address (R/W)
+        Sn_MSSR       = 0x0110,  ///< Maximum Segment Size(Sn_MSSR0) register address (R/W)
+        Sn_TOS        = 0x0104,  ///< IP Type of Service(TOS) Register (R/W)
+        Sn_TTL        = 0x0108,  ///< IP Time to live(TTL) Register (R/W)
+        Sn_RXBUF_SIZE = 0x0220,  ///< Receive memory size register (R/W)
+        Sn_TXBUF_SIZE = 0x0200,  ///< Transmit memory size register (R/W)
+        Sn_TX_FSR     = 0x0204,  ///< Transmit free memory size register (R)
+        Sn_TX_RD      = 0x0208,  ///< Transmit memory read pointer register address (R)
+        Sn_TX_WR      = 0x020C,  ///< Transmit memory write pointer register address (R/W)
+        Sn_RX_RSR     = 0x0224,  ///< Received data size register (R)
+        Sn_RX_RD      = 0x0228,  ///< Read point of Receive memory (R/W)
+        Sn_RX_WR      = 0x022C,  ///< Write point of Receive memory (R)
+        Sn_IMR        = 0x0024,  ///< Socket interrupt mask register (R)
+        Sn_FRAG       = 0x002D,  ///< Fragment field value in IP header register (R/W)
+        Sn_KPALVTR    = 0x002F,  ///< Keep Alive Timer register (R/W)
+    };
+
+    /** Mode register values */
+    enum {
+        MR_RST   = 0x80,  ///< Reset
+        MR_WOL   = 0x20,  ///< Wake on LAN
+        MR_PB    = 0x10,  ///< Ping block
+        MR_PPPOE = 0x08,  ///< Enable PPPoE
+        MR_FARP  = 0x02,  ///< Enable UDP_FORCE_ARP CHECK
+    };
+
+    /* Interrupt Register values */
+    enum {
+        IR_CONFLICT = 0x80,  ///< Check IP conflict
+        IR_UNREACH  = 0x40,  ///< Get the destination unreachable message in UDP sending
+        IR_PPPoE    = 0x20,  ///< Get the PPPoE close message
+        IR_MP       = 0x10,  ///< Get the magic packet interrupt
+    };
+
+    /* Interrupt Mask Register values */
+    enum {
+        IM_IR7 = 0x80,  ///< IP Conflict Interrupt Mask
+        IM_IR6 = 0x40,  ///< Destination unreachable Interrupt Mask
+        IM_IR5 = 0x20,  ///< PPPoE Close Interrupt Mask
+        IM_IR4 = 0x10,  ///< Magic Packet Interrupt Mask
+    };
+
+    /** Socket Mode Register values @ref Sn_MR */
+    enum {
+        Sn_MR_CLOSE  = 0x00,  ///< Unused socket
+        Sn_MR_TCP    = 0x01,  ///< TCP
+        Sn_MR_UDP    = 0x02,  ///< UDP
+        Sn_MR_MACRAW = 0x07,  ///< MAC LAYER RAW SOCK
+        Sn_MR_UCASTB = 0x10,  ///< Unicast Block in UDP Multicasting
+        Sn_MR_ND     = 0x20,  ///< No Delayed Ack(TCP), Multicast flag
+        Sn_MR_BCASTB = 0x40,  ///< Broadcast block in UDP Multicasting
+        Sn_MR_MULTI  = 0x80,  ///< Support UDP Multicasting
+        Sn_MR_MIP6B  = 0x10,  ///< IPv6 packet Blocking in @ref Sn_MR_MACRAW mode
+        Sn_MR_MMB    = 0x20,  ///< Multicast Blocking in @ref Sn_MR_MACRAW mode
+        Sn_MR_MFEN   = 0x80,  ///< MAC filter enable in @ref Sn_MR_MACRAW mode
+    };
+
+    /** Socket Command Register values */
+    enum {
+        Sn_CR_OPEN      = 0x01,  ///< Initialise or open socket
+        Sn_CR_LISTEN    = 0x02,  ///< Wait connection request in TCP mode (Server mode)
+        Sn_CR_CONNECT   = 0x04,  ///< Send connection request in TCP mode (Client mode)
+        Sn_CR_DISCON    = 0x08,  ///< Send closing request in TCP mode
+        Sn_CR_CLOSE     = 0x10,  ///< Close socket
+        Sn_CR_SEND      = 0x20,  ///< Update TX buffer pointer and send data
+        Sn_CR_SEND_MAC  = 0x21,  ///< Send data with MAC address, so without ARP process
+        Sn_CR_SEND_KEEP = 0x22,  ///< Send keep alive message
+        Sn_CR_RECV      = 0x40,  ///< Update RX buffer pointer and receive data
+    };
+
+    /** Socket Interrupt register values */
+    enum {
+        Sn_IR_CON     = 0x01,  ///< CON Interrupt
+        Sn_IR_DISCON  = 0x02,  ///< DISCON Interrupt
+        Sn_IR_RECV    = 0x04,  ///< RECV Interrupt
+        Sn_IR_TIMEOUT = 0x08,  ///< TIMEOUT Interrupt
+        Sn_IR_SENDOK  = 0x10,  ///< SEND_OK Interrupt
+    };
+
+    /** Socket Status Register values */
+    enum {
+        SOCK_CLOSED      = 0x00,  ///< Closed
+        SOCK_INIT        = 0x13,  ///< Initiate state
+        SOCK_LISTEN      = 0x14,  ///< Listen state
+        SOCK_SYNSENT     = 0x15,  ///< Connection state
+        SOCK_SYNRECV     = 0x16,  ///< Connection state
+        SOCK_ESTABLISHED = 0x17,  ///< Success to connect
+        SOCK_FIN_WAIT    = 0x18,  ///< Closing state
+        SOCK_CLOSING     = 0x1A,  ///< Closing state
+        SOCK_TIME_WAIT   = 0x1B,  ///< Closing state
+        SOCK_CLOSE_WAIT  = 0x1C,  ///< Closing state
+        SOCK_LAST_ACK    = 0x1D,  ///< Closing state
+        SOCK_UDP         = 0x22,  ///< UDP socket
+        SOCK_MACRAW      = 0x42,  ///< MAC raw mode socket
+    };
+
+    /* PHYCFGR register value */
+    enum {
+        PHYCFGR_RST         = ~(1 << 7),  //< For PHY reset, must operate AND mask.
+        PHYCFGR_OPMD        = (1 << 6),   // Configure PHY with OPMDC value
+        PHYCFGR_OPMDC_ALLA  = (7 << 3),
+        PHYCFGR_OPMDC_PDOWN = (6 << 3),
+        PHYCFGR_OPMDC_NA    = (5 << 3),
+        PHYCFGR_OPMDC_100FA = (4 << 3),
+        PHYCFGR_OPMDC_100F  = (3 << 3),
+        PHYCFGR_OPMDC_100H  = (2 << 3),
+        PHYCFGR_OPMDC_10F   = (1 << 3),
+        PHYCFGR_OPMDC_10H   = (0 << 3),
+        PHYCFGR_DPX_FULL    = (1 << 2),
+        PHYCFGR_DPX_HALF    = (0 << 2),
+        PHYCFGR_SPD_100     = (1 << 1),
+        PHYCFGR_SPD_10      = (0 << 1),
+        PHYCFGR_LNK_ON      = (1 << 0),
+        PHYCFGR_LNK_OFF     = (0 << 0),
+    };
+
+    /* Lock register commands */
+    enum {
+        CHPLCKR_UNLOCK      = 0xCE,
+        NETLCKR_UNLOCK      = 0x3A,
+        PHYLCKR_UNLOCK      = 0x53,
+    };
+
+    /* SYS Lock register commands */
+    enum {
+        SYSR_CHPL_LOCK      = (1 << 7),
+        SYSR_CHPL_ULOCK     = (0 << 7),
+    };
+
+    /* SYS1 register commands */
+    enum {
+        SYCR1_IEN           = 0x80,
+    };
+
+    /* Socket Interrupt Mask register */
+    enum {
+        SIMR_S7_INT         = 0x80,
+        SIMR_S6_INT         = 0x40,
+        SIMR_S5_INT         = 0x20,
+        SIMR_S4_INT         = 0x10,
+        SIMR_S3_INT         = 0x08,
+        SIMR_S2_INT         = 0x04,
+        SIMR_S1_INT         = 0x02,
+        SIMR_S0_INT         = 0x01,
+    };
+
+    /* Sn_IR Clear register */
+    enum {
+        Sn_IRCLR_SENDOK     = 0x10,
+        Sn_IRCLR_TIMEOUT    = 0x08,
+        Sn_IRCLR_RECV       = 0x04,
+        Sn_IRCLR_DISCON     = 0x02,
+        Sn_IRCLR_CON        = 0x01,
+    };
+
+    /* Socket n Interrupt Mask register */
+    enum {
+        Sn_IMR_SENDOK       = 0x10,
+        Sn_IMR_TIMEOUT      = 0x08,
+        Sn_IMR_RECV         = 0x04,
+        Sn_IMR_DISCON       = 0x02,
+        Sn_IMR_CON          = 0x01,
+    };
+
+    enum {
+        PHY_SPEED_10    = 0,  ///< Link Speed 10
+        PHY_SPEED_100   = 1,  ///< Link Speed 100
+        PHY_DUPLEX_HALF = 0,  ///< Link Half-Duplex
+        PHY_DUPLEX_FULL = 1,  ///< Link Full-Duplex
+        PHY_LINK_OFF    = 0,  ///< Link Off
+        PHY_LINK_ON     = 1,  ///< Link On
+        PHY_POWER_NORM  = 0,  ///< PHY power normal mode
+        PHY_POWER_DOWN  = 1,  ///< PHY power down mode
+    };
+
+    /**
+        Set Mode Register
+        @param (uint8_t)mr The value to be set.
+        @sa getMR()
+    */
+    inline void setMR(uint8_t mode) {
+        wizchip_write(BlockSelectCReg, MR, mode);
+    }
+
+    /**
+        Get Mode Register
+        @return uint8_t. The value of Mode register.
+        @sa setMR()
+    */
+    inline uint8_t getMR() {
+        return wizchip_read(BlockSelectCReg, MR);
+    }
+
+    /**
+        Reads the W6300 system status register
+        @return uint8_t
+    */
+    inline uint8_t getStatus() {
+        return wizchip_read(BlockSelectCReg, SYSR);
+    }
+
+    /**
+        Writes a W6300 command
+    */
+    inline void setCommand0(uint8_t cmd) {
+        wizchip_write(BlockSelectCReg, SYCR0, cmd);
+    }
+
+    /**
+        Writes a W6300 command
+    */
+    inline void setCommand1(uint8_t cmd) {
+        wizchip_write(BlockSelectCReg, SYCR1, cmd);
+    }
+
+    /**
+        Set local MAC address
+        @param (uint8_t*)shar Pointer variable to set local MAC address. It should be allocated 6
+        bytes.
+        @sa getSHAR()
+    */
+    inline void setSHAR(const uint8_t* macaddr) {
+        wizchip_write_buf(BlockSelectCReg, SHAR, macaddr, 6);
+    }
+
+    /**
+        Get local MAC address
+        @param (uint8_t*)shar Pointer variable to get local MAC address. It should be allocated 6
+        bytes.
+        @sa setSHAR()
+    */
+    inline void getSHAR(uint8_t* macaddr) {
+        wizchip_read_buf(BlockSelectCReg, SHAR, macaddr, 6);
+    }
+
+    /**
+        Set @ref IR register
+        @param (uint8_t)ir Value to set @ref IR register.
+        @sa getIR()
+    */
+    inline void setIR(uint8_t ir) {
+        wizchip_write(BlockSelectCReg, IR, (ir & 0xF0));
+    }
+
+    /**
+        Get @ref IR register
+        @return uint8_t. Value of @ref IR register.
+        @sa setIR()
+    */
+    inline uint8_t getIR() {
+        return wizchip_read(BlockSelectCReg, IR) & 0xF0;
+    }
+
+    /**
+        Set @ref SIR register
+        @param (uint8_t)ir Value to set @ref SIR register.
+        @sa getSIR()
+    */
+    inline void setSIR(uint8_t ir) {
+        wizchip_write(BlockSelectCReg, SIR, ir);
+    }
+
+    /**
+        Get @ref SIR register
+        @return uint8_t. Value of @ref SIR register.
+        @sa setSIR()
+    */
+    inline uint8_t getSIR() {
+        return wizchip_read(BlockSelectCReg, SIR);
+    }
+
+    /**
+        Set @ref _IMR_ register
+        @param (uint8_t)imr Value to set @ref _IMR_ register.
+        @sa getIMR()
+    */
+    inline void setIMR(uint8_t imr) {
+        wizchip_write(BlockSelectCReg, _IMR_, imr);
+    }
+
+    /**
+        Get @ref _IMR_ register
+        @return uint8_t. Value of @ref _IMR_ register.
+        @sa setIMR()
+    */
+    inline uint8_t getIMR() {
+        return wizchip_read(BlockSelectCReg, _IMR_);
+    }
+
+    /**
+        Set @ref _SIMR_ register
+        @param (uint8_t)imr Value to set @ref _SIMR_ register.
+        @sa getIMR()
+    */
+    inline void setSIMR(uint8_t imr) {
+        wizchip_write(BlockSelectCReg, _SIMR_, imr);
+    }
+
+    /**
+        Set @ref _SIMR_ register
+        @param (uint8_t)imr Value to set @ref _SIMR_ register.
+        @sa getIMR()
+    */
+    inline void setICLR(uint8_t imr) {
+        wizchip_write(BlockSelectSReg, Sn_ICLR, imr);
+    }
+
+    /**
+        Get @ref _SIMR_ register
+        @return uint8_t. Value of @ref _SIMR_ register.
+        @sa setSIMR()
+    */
+    inline uint8_t getSIMR() {
+        return wizchip_read(BlockSelectCReg, _SIMR_);
+    }
+
+    /**
+        Set @ref PHYCFGR register
+        @param (uint8_t)phycfgr Value to set @ref PHYCFGR register.
+        @sa getPHYCFGR()
+    */
+    inline void setPHYCFGR(uint8_t phycfgr) {
+        wizchip_write(BlockSelectCReg, PHYCFGR, phycfgr);
+    }
+
+    /**
+        Get @ref PHYCFGR register
+        @return uint8_t. Value of @ref PHYCFGR register.
+        @sa setPHYCFGR()
+    */
+    inline uint8_t getPHYCFGR() {
+        return wizchip_read(BlockSelectCReg, PHYCFGR);
+    }
+
+    /**
+        Sets the chip lock to
+        @param state
+    */
+    inline void setChipLOCK(uint8_t state) {
+        wizchip_write(BlockSelectCReg, CHPLCKR, state);
+    }
+
+    /**
+        Sets the PHY lock to
+        @param state
+    */
+    inline void setPHYLOCK(uint8_t state) {
+        wizchip_write(BlockSelectCReg, PHYLCKR, state);
+    }
+    /**
+        Sets the network lock to
+        @param state
+    */
+    inline void setNetLOCK(uint8_t state) {
+        wizchip_write(BlockSelectCReg, NETLCKR, state);
+    }
+
+    /**
+        Get @ref VERSIONR register
+        @return uint8_t. Value of @ref VERSIONR register.
+    */
+    inline uint8_t getVERSIONR() {
+        return wizchip_read(BlockSelectCReg, VERSIONR);
+    }
+
+    /**
+        Set @ref Sn_MR register
+        @param (uint8_t)mr Value to set @ref Sn_MR
+        @sa getSn_MR()
+    */
+    inline void setSn_MR(uint8_t mr) {
+        wizchip_write(BlockSelectSReg, Sn_MR, mr);
+    }
+
+    /**
+        Get @ref Sn_MR register
+        @return uint8_t. Value of @ref Sn_MR.
+        @sa setSn_MR()
+    */
+    inline uint8_t getSn_MR() {
+        return wizchip_read(BlockSelectSReg, Sn_MR);
+    }
+
+    /**
+        Set @ref Sn_CR register, then wait for the command to execute
+        @param (uint8_t)cr Value to set @ref Sn_CR
+        @sa getSn_CR()
+    */
+    void setSn_CR(uint8_t cr);
+
+    /**
+        Get @ref Sn_CR register
+        @return uint8_t. Value of @ref Sn_CR.
+        @sa setSn_CR()
+    */
+    inline uint8_t getSn_CR() {
+        return wizchip_read(BlockSelectSReg, Sn_CR);
+    }
+
+    /**
+        Set @ref Sn_IR register
+        @param (uint8_t)ir Value to set @ref Sn_IR
+        @sa getSn_IR()
+    */
+    inline void setSn_IR(uint8_t ir) {
+        wizchip_write(BlockSelectSReg, Sn_IR, (ir & 0x1F));
+    }
+
+    /**
+        Get @ref Sn_IR register
+        @return uint8_t. Value of @ref Sn_IR.
+        @sa setSn_IR()
+    */
+    inline uint8_t getSn_IR() {
+        return (wizchip_read(BlockSelectSReg, Sn_IR) & 0x1F);
+    }
+
+    /**
+        Set @ref Sn_IMR register
+        @param (uint8_t)imr Value to set @ref Sn_IMR
+        @sa getSn_IMR()
+    */
+    inline void setSn_IMR(uint8_t imr) {
+        wizchip_write(BlockSelectSReg, Sn_IMR, (imr & 0x1F));
+    }
+
+    /**
+        Get @ref Sn_IMR register
+        @return uint8_t. Value of @ref Sn_IMR.
+        @sa setSn_IMR()
+    */
+    inline uint8_t getSn_IMR() {
+        return (wizchip_read(BlockSelectSReg, Sn_IMR) & 0x1F);
+    }
+
+    /**
+        Get @ref Sn_SR register
+        @return uint8_t. Value of @ref Sn_SR.
+    */
+    inline uint8_t getSn_SR() {
+        return wizchip_read(BlockSelectSReg, Sn_SR);
+    }
+
+    /**
+        Set @ref Sn_RXBUF_SIZE register
+        @param (uint8_t)rxbufsize Value to set @ref Sn_RXBUF_SIZE
+        @sa getSn_RXBUF_SIZE()
+    */
+    inline void setSn_RXBUF_SIZE(uint8_t rxbufsize) {
+        // W6300 DEBUG: rxbufsize = 16
+        // W6300 DEBUG: original code:
+        /*   static inline uint8_t writeSn(SOCKET s=0, uint16_t addr, uint8_t data=16) {
+            return write(CH_BASE() + s * CH_SIZE + addr, data);
+        */
+        wizchip_write(BlockSelectSReg, Sn_RXBUF_SIZE, rxbufsize);
+    }
+
+    /**
+        Get @ref Sn_RXBUF_SIZE register
+        @return uint8_t. Value of @ref Sn_RXBUF_SIZE.
+        @sa setSn_RXBUF_SIZE()
+    */
+    inline uint8_t getSn_RXBUF_SIZE() {
+        return wizchip_read(BlockSelectSReg, Sn_RXBUF_SIZE);
+    }
+
+    /**
+        Set @ref Sn_TXBUF_SIZE register
+        @param (uint8_t)txbufsize Value to set @ref Sn_TXBUF_SIZE
+        @sa getSn_TXBUF_SIZE()
+    */
+    inline void setSn_TXBUF_SIZE(uint8_t txbufsize) {
+        wizchip_write(BlockSelectSReg, Sn_TXBUF_SIZE, txbufsize);
+    }
+
+    /**
+        Get @ref Sn_TXBUF_SIZE register
+        @return uint8_t. Value of @ref Sn_TXBUF_SIZE.
+        @sa setSn_TXBUF_SIZE()
+    */
+    inline uint8_t getSn_TXBUF_SIZE() {
+        return wizchip_read(BlockSelectSReg, Sn_TXBUF_SIZE);
+    }
+
+    /**
+        Get @ref Sn_TX_RD register
+        @return uint16_t. Value of @ref Sn_TX_RD.
+    */
+    inline uint16_t getSn_TX_RD() {
+        return wizchip_read_word(BlockSelectSReg, Sn_TX_RD);
+    }
+
+    /**
+        Set @ref Sn_TX_WR register
+        @param (uint16_t)txwr Value to set @ref Sn_TX_WR
+        @sa GetSn_TX_WR()
+    */
+    inline void setSn_TX_WR(uint16_t txwr) {
+        wizchip_write_word(BlockSelectSReg, Sn_TX_WR, txwr);
+    }
+
+    /**
+        Get @ref Sn_TX_WR register
+        @return uint16_t. Value of @ref Sn_TX_WR.
+        @sa setSn_TX_WR()
+    */
+    inline uint16_t getSn_TX_WR() {
+        return wizchip_read_word(BlockSelectSReg, Sn_TX_WR);
+    }
+
+    /**
+        Set @ref Sn_RX_RD register
+        @param (uint16_t)rxrd Value to set @ref Sn_RX_RD
+        @sa getSn_RX_RD()
+    */
+    inline void setSn_RX_RD(uint16_t rxrd) {
+        wizchip_write_word(BlockSelectSReg, Sn_RX_RD, rxrd);
+    }
+
+    /**
+        Get @ref Sn_RX_RD register
+        @return uint16_t. Value of @ref Sn_RX_RD.
+        @sa setSn_RX_RD()
+    */
+    inline uint16_t getSn_RX_RD() {
+        return wizchip_read_word(BlockSelectSReg, Sn_RX_RD);
+    }
+
+    /**
+        Get @ref Sn_RX_WR register
+        @return uint16_t. Value of @ref Sn_RX_WR.
+    */
+    inline uint16_t getSn_RX_WR() {
+        return wizchip_read_word(BlockSelectSReg, Sn_RX_WR);
+    }
+
+    netif *_netif;
+};
+
+#endif  // W6300_H

libraries/lwIP_w6300/src/wiznet_pio_qspi.c

@@ -0,0 +1,400 @@
+/*
+    Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
+
+    SPDX-License-Identifier: BSD-3-Clause
+*/
+
+#include <stdio.h>
+#include <string.h>
+
+#include "pico/stdlib.h"
+#include "pico/error.h"
+
+#include "hardware/dma.h"
+#include "hardware/clocks.h"
+
+#include "wiznet_pio_qspi.h"
+#include "wiznet_pio_qspi.pio.h"
+
+#ifndef PIO_QSPI_PREFERRED_PIO
+#define PIO_QSPI_PREFERRED_PIO 1
+#endif
+
+#define PADS_DRIVE_STRENGTH PADS_BANK0_GPIO0_DRIVE_VALUE_12MA
+#define IRQ_SAMPLE_DELAY_NS 100
+
+#define WIZNET_PIO_QSPI_PROGRAM_NAME wizchip_pio_spi_quad_write_read
+#define WIZNET_PIO_QSPI_PROGRAM_FUNC __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _program)
+#define WIZNET_PIO_QSPI_PROGRAM_GET_DEFAULT_CONFIG_FUNC __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _program_get_default_config)
+#define WIZNET_PIO_QSPI_OFFSET_WRITE_BITS __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _offset_write_bits)
+#define WIZNET_PIO_QSPI_OFFSET_WRITE_BITS_END __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _offset_write_bits_end)
+#define WIZNET_PIO_QSPI_OFFSET_READ_END __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _offset_read_bits_end)
+
+// All wiznet spi operations must start with writing a 3 byte header
+#define WIZNET_PIO_QSPI_HEADER_LEN 3
+
+#ifndef WIZNET_PICO_PIO_QSPI_INSTANCE_COUNT
+#define WIZNET_PICO_PIO_QSPI_INSTANCE_COUNT 1
+#endif
+
+typedef struct wiznet_pio_qspi_state {
+    wiznet_pio_qspi_funcs_t *funcs;
+    const wiznet_pio_qspi_config_t *qspi_config;
+    pio_hw_t *pio;
+    uint8_t pio_func_sel;
+    int8_t pio_offset;
+    int8_t pio_sm;
+    int8_t dma_out;
+    int8_t dma_in;
+    uint8_t qspi_header[WIZNET_PIO_QSPI_HEADER_LEN];
+    uint8_t qspi_header_count;
+} wiznet_pio_qspi_state_t;
+
+static wiznet_pio_qspi_state_t wiznet_pio_qspi_state[WIZNET_PICO_PIO_QSPI_INSTANCE_COUNT];
+static wiznet_pio_qspi_state_t *active_state;
+
+static wiznet_pio_qspi_funcs_t *get_wiznet_pio_qspi_impl(void);
+
+static uint16_t mk_cmd_buf(uint8_t *pdst, uint8_t opcode, uint16_t addr) {
+    pdst[0] = ((opcode >> 7 & 0x01) << 4) | ((opcode >> 6 & 0x01) << 0);
+    pdst[1] = ((opcode >> 5 & 0x01) << 4) | ((opcode >> 4 & 0x01) << 0);
+    pdst[2] = ((opcode >> 3 & 0x01) << 4) | ((opcode >> 2 & 0x01) << 0);
+    pdst[3] = ((opcode >> 1 & 0x01) << 4) | ((opcode >> 0 & 0x01) << 0);
+
+    pdst[4] = ((uint8_t)(addr >> 8) & 0xFF);
+    pdst[5] = ((uint8_t)(addr >> 0) & 0xFF);
+
+    pdst[6] = 0;
+
+    return 6 + 1;
+}
+
+// Initialise our gpios
+static void pio_qspi_gpio_setup(wiznet_pio_qspi_state_t *state) {
+    // Setup DO and DI
+    gpio_init(state->qspi_config->data_io0_pin);
+    gpio_init(state->qspi_config->data_io1_pin);
+    gpio_init(state->qspi_config->data_io2_pin);
+    gpio_init(state->qspi_config->data_io3_pin);
+    gpio_set_dir(state->qspi_config->data_io0_pin, GPIO_OUT);
+    gpio_set_dir(state->qspi_config->data_io1_pin, GPIO_OUT);
+    gpio_set_dir(state->qspi_config->data_io2_pin, GPIO_OUT);
+    gpio_set_dir(state->qspi_config->data_io3_pin, GPIO_OUT);
+    gpio_put(state->qspi_config->data_io0_pin, false);
+    gpio_put(state->qspi_config->data_io1_pin, false);
+    gpio_put(state->qspi_config->data_io2_pin, false);
+    gpio_put(state->qspi_config->data_io3_pin, false);
+
+    // Setup CS
+    gpio_init(state->qspi_config->cs_pin);
+    gpio_set_dir(state->qspi_config->cs_pin, GPIO_OUT);
+    gpio_put(state->qspi_config->cs_pin, true);
+
+    // Setup reset
+    gpio_init(state->qspi_config->irq_pin);
+    gpio_set_dir(state->qspi_config->irq_pin, GPIO_IN);
+    gpio_set_pulls(state->qspi_config->irq_pin, false, false);
+}
+
+wiznet_pio_qspi_handle_t wiznet_pio_qspi_open(const wiznet_pio_qspi_config_t *qspi_config) {
+
+    wiznet_pio_qspi_state_t *state;
+    for (unsigned int i = 0; i < count_of(wiznet_pio_qspi_state); i++) {
+        if (!wiznet_pio_qspi_state[i].funcs) {
+            state = &wiznet_pio_qspi_state[i];
+            break;
+        }
+    }
+    assert(state);
+    if (!state) {
+        return NULL;
+    }
+    state->qspi_config = qspi_config;
+    state->funcs = get_wiznet_pio_qspi_impl();
+
+    pio_qspi_gpio_setup(state);
+
+    pio_hw_t *pios[2] = {pio0, pio1};
+    uint pio_index = PIO_QSPI_PREFERRED_PIO;
+
+    if (!pio_can_add_program(pios[pio_index], &WIZNET_PIO_QSPI_PROGRAM_FUNC)) {
+        pio_index ^= 1;
+        if (!pio_can_add_program(pios[pio_index], &WIZNET_PIO_QSPI_PROGRAM_FUNC)) {
+            return NULL;
+        }
+    }
+
+    state->pio = pios[pio_index];
+    state->dma_in = -1;
+    state->dma_out = -1;
+
+    static_assert(GPIO_FUNC_PIO1 == GPIO_FUNC_PIO0 + 1, "");
+    state->pio_func_sel = GPIO_FUNC_PIO0 + pio_index;
+    state->pio_sm = (int8_t)pio_claim_unused_sm(state->pio, false);
+    if (state->pio_sm < 0) {
+        wiznet_pio_qspi_close(&state->funcs);
+        return NULL;
+    }
+
+    state->pio_offset = pio_add_program(state->pio, &WIZNET_PIO_QSPI_PROGRAM_FUNC);
+    printf("[QSPI CLOCK SPEED : %.2lf MHz]\r\n\r\n", 66.5 / (state->qspi_config->clock_div_major + ((double)state->qspi_config->clock_div_minor / 256)));
+    pio_sm_config sm_config = WIZNET_PIO_QSPI_PROGRAM_GET_DEFAULT_CONFIG_FUNC(state->pio_offset);
+
+    sm_config_set_clkdiv_int_frac(&sm_config, state->qspi_config->clock_div_major, state->qspi_config->clock_div_minor);
+    hw_write_masked(&pads_bank0_hw->io[state->qspi_config->clock_pin],
+                    (uint)PADS_DRIVE_STRENGTH << PADS_BANK0_GPIO0_DRIVE_LSB,
+                    PADS_BANK0_GPIO0_DRIVE_BITS
+                   );
+    hw_write_masked(&pads_bank0_hw->io[state->qspi_config->clock_pin],
+                    (uint)1 << PADS_BANK0_GPIO0_SLEWFAST_LSB,
+                    PADS_BANK0_GPIO0_SLEWFAST_BITS
+                   );
+
+    printf("\r\n[QSPI QUAD MODE]\r\n");
+    sm_config_set_out_pins(&sm_config, state->qspi_config->data_io0_pin, 4);
+    sm_config_set_in_pins(&sm_config, state->qspi_config->data_io0_pin);
+    sm_config_set_set_pins(&sm_config, state->qspi_config->data_io0_pin, 4);
+    sm_config_set_sideset(&sm_config, 1, false, false);
+    sm_config_set_sideset_pins(&sm_config, state->qspi_config->clock_pin);
+
+    sm_config_set_in_shift(&sm_config, false, true, 8);
+    sm_config_set_out_shift(&sm_config, false, true, 8);
+
+    hw_set_bits(&state->pio->input_sync_bypass,
+                (1u << state->qspi_config->data_io0_pin) | (1u << state->qspi_config->data_io1_pin) | (1u << state->qspi_config->data_io2_pin) | (1u << state->qspi_config->data_io3_pin));
+    pio_sm_set_config(state->pio, state->pio_sm, &sm_config);
+    pio_sm_set_consecutive_pindirs(state->pio, state->pio_sm, state->qspi_config->clock_pin, 1, true);
+
+    gpio_set_function(state->qspi_config->data_io0_pin, state->pio_func_sel);
+    gpio_set_function(state->qspi_config->data_io1_pin, state->pio_func_sel);
+    gpio_set_function(state->qspi_config->data_io2_pin, state->pio_func_sel);
+    gpio_set_function(state->qspi_config->data_io3_pin, state->pio_func_sel);
+
+    // Set data pin to pull down and schmitt
+    gpio_set_pulls(state->qspi_config->data_io0_pin, false, true);
+    gpio_set_pulls(state->qspi_config->data_io1_pin, false, true);
+    gpio_set_pulls(state->qspi_config->data_io2_pin, false, true);
+    gpio_set_pulls(state->qspi_config->data_io3_pin, false, true);
+    gpio_set_input_hysteresis_enabled(state->qspi_config->data_io0_pin, true);
+    gpio_set_input_hysteresis_enabled(state->qspi_config->data_io1_pin, true);
+    gpio_set_input_hysteresis_enabled(state->qspi_config->data_io2_pin, true);
+    gpio_set_input_hysteresis_enabled(state->qspi_config->data_io3_pin, true);
+    /* @todo: Implement to use. */
+
+    pio_sm_exec(state->pio, state->pio_sm, pio_encode_set(pio_pins, 1));
+
+    state->dma_out = (int8_t)dma_claim_unused_channel(false); // todo: Should be able to use one dma channel?
+    state->dma_in = (int8_t)dma_claim_unused_channel(false);
+    if (state->dma_out < 0 || state->dma_in < 0) {
+        wiznet_pio_qspi_close(&state->funcs);
+        return NULL;
+    }
+
+    return &state->funcs;
+
+}
+
+void wiznet_pio_qspi_close(wiznet_pio_qspi_handle_t handle) {
+
+    wiznet_pio_qspi_state_t *state = (wiznet_pio_qspi_state_t *)handle;
+    if (state) {
+        if (state->pio_sm >= 0) {
+            if (state->pio_offset != -1) {
+                pio_remove_program(state->pio, &WIZNET_PIO_QSPI_PROGRAM_FUNC, state->pio_offset);
+            }
+
+            pio_sm_unclaim(state->pio, state->pio_sm);
+        }
+        if (state->dma_out >= 0) {
+            dma_channel_unclaim(state->dma_out);
+            state->dma_out = -1;
+        }
+        if (state->dma_in >= 0) {
+            dma_channel_unclaim(state->dma_in);
+            state->dma_in = -1;
+        }
+        state->funcs = NULL;
+    }
+}
+
+static void cs_set(wiznet_pio_qspi_state_t *state, bool value) {
+    gpio_put(state->qspi_config->cs_pin, value);
+}
+
+static __noinline void ns_delay(uint32_t ns) {
+    // cycles = ns * clk_sys_hz / 1,000,000,000
+    uint32_t cycles = ns * (clock_get_hz(clk_sys) >> 16u) / (1000000000u >> 16u);
+    busy_wait_at_least_cycles(cycles);
+}
+
+void wiznet_pio_qspi_frame_start(void) {
+    assert(active_state);
+
+    gpio_set_function(active_state->qspi_config->data_io0_pin, active_state->pio_func_sel);
+    gpio_set_function(active_state->qspi_config->data_io1_pin, active_state->pio_func_sel);
+    gpio_set_function(active_state->qspi_config->data_io2_pin, active_state->pio_func_sel);
+    gpio_set_function(active_state->qspi_config->data_io3_pin, active_state->pio_func_sel);
+
+    gpio_set_function(active_state->qspi_config->clock_pin, active_state->pio_func_sel);
+    gpio_pull_down(active_state->qspi_config->clock_pin);
+
+    // Pull CS low
+    cs_set(active_state, false);
+}
+
+void wiznet_pio_qspi_frame_end(void) {
+    assert(active_state);
+    // from this point a positive edge will cause an IRQ to be pending
+    cs_set(active_state, true);
+    // we need to wait a bit in case the irq line is incorrectly high
+#ifdef IRQ_SAMPLE_DELAY_NS
+    ns_delay(IRQ_SAMPLE_DELAY_NS);
+#endif
+}
+
+// To read a byte we must first have been asked to write a 3 byte spi header
+void wiznet_pio_qspi_read_byte(uint8_t op_code, uint16_t AddrSel, uint8_t *rx, uint16_t rx_length) {
+    uint8_t command_buf[8] = {0,};
+    uint16_t command_len = mk_cmd_buf(command_buf, op_code, AddrSel);
+    uint32_t loop_cnt = 0;
+
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
+    pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset, active_state->pio_offset + WIZNET_PIO_QSPI_OFFSET_READ_END - 1);
+    //pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset + PIO_SPI_OFFSET_WRITE_BITS, active_state->pio_offset + PIO_SPI_OFFSET_READ_BITS_END - 1);
+    pio_sm_clear_fifos(active_state->pio, active_state->pio_sm);
+
+    loop_cnt = 2;
+    pio_sm_set_pindirs_with_mask(active_state->pio,
+                                 active_state->pio_sm,
+                                 (1u << active_state->qspi_config->data_io0_pin) | (1u << active_state->qspi_config->data_io1_pin) | (1u << active_state->qspi_config->data_io2_pin) | (1u << active_state->qspi_config->data_io3_pin),
+                                 (1u << active_state->qspi_config->data_io0_pin) | (1u << active_state->qspi_config->data_io1_pin) | (1u << active_state->qspi_config->data_io2_pin) | (1u << active_state->qspi_config->data_io3_pin));
+
+    /* @todo: Implement to use. */
+
+    pio_sm_restart(active_state->pio, active_state->pio_sm);
+    pio_sm_clkdiv_restart(active_state->pio, active_state->pio_sm);
+
+    pio_sm_put(active_state->pio, active_state->pio_sm, command_len * loop_cnt - 1);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_x, 32));
+
+    pio_sm_put(active_state->pio, active_state->pio_sm, rx_length - 1);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_y, 32));
+
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_jmp(active_state->pio_offset));
+
+    dma_channel_abort(active_state->dma_out);
+    dma_channel_abort(active_state->dma_in);
+
+    dma_channel_config out_config = dma_channel_get_default_config(active_state->dma_out);
+    channel_config_set_transfer_data_size(&out_config, DMA_SIZE_8);
+    channel_config_set_bswap(&out_config, true);
+    channel_config_set_dreq(&out_config, pio_get_dreq(active_state->pio, active_state->pio_sm, true));
+    dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], command_buf, command_len, true);
+
+    dma_channel_config in_config = dma_channel_get_default_config(active_state->dma_in);
+    channel_config_set_transfer_data_size(&in_config, DMA_SIZE_8);
+    channel_config_set_bswap(&in_config, true);
+    channel_config_set_dreq(&in_config, pio_get_dreq(active_state->pio, active_state->pio_sm, false));
+    channel_config_set_write_increment(&in_config, true);
+    channel_config_set_read_increment(&in_config, false);
+    dma_channel_configure(active_state->dma_in, &in_config, rx, &active_state->pio->rxf[active_state->pio_sm], rx_length, true);
+
+#if 1
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
+
+    __compiler_memory_barrier();
+
+    dma_channel_wait_for_finish_blocking(active_state->dma_out);
+    dma_channel_wait_for_finish_blocking(active_state->dma_in);
+
+    __compiler_memory_barrier();
+
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_mov(pio_pins, pio_null));
+
+#endif
+}
+
+void wiznet_pio_qspi_write_byte(uint8_t op_code, uint16_t AddrSel, uint8_t *tx, uint16_t tx_length) {
+    uint8_t command_buf[8] = {0,};
+    uint16_t command_len = mk_cmd_buf(command_buf, op_code, AddrSel);
+    uint32_t loop_cnt = 0;
+    tx_length = tx_length + command_len;
+
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
+    pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset, active_state->pio_offset + WIZNET_PIO_QSPI_OFFSET_WRITE_BITS_END - 1);
+    pio_sm_clear_fifos(active_state->pio, active_state->pio_sm);
+
+    loop_cnt = 2;
+    pio_sm_set_pindirs_with_mask(active_state->pio,
+                                 active_state->pio_sm,
+                                 (1u << active_state->qspi_config->data_io0_pin) | (1u << active_state->qspi_config->data_io1_pin) | (1u << active_state->qspi_config->data_io2_pin) | (1u << active_state->qspi_config->data_io3_pin),
+                                 (1u << active_state->qspi_config->data_io0_pin) | (1u << active_state->qspi_config->data_io1_pin) | (1u << active_state->qspi_config->data_io2_pin) | (1u << active_state->qspi_config->data_io3_pin));
+
+    pio_sm_restart(active_state->pio, active_state->pio_sm);
+    pio_sm_clkdiv_restart(active_state->pio, active_state->pio_sm);
+    pio_sm_put(active_state->pio, active_state->pio_sm, tx_length * loop_cnt - 1);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_x, 32));
+    pio_sm_put(active_state->pio, active_state->pio_sm, 0);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_y, 32));
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_jmp(active_state->pio_offset));
+    dma_channel_abort(active_state->dma_out);
+
+
+    dma_channel_config out_config = dma_channel_get_default_config(active_state->dma_out);
+    channel_config_set_transfer_data_size(&out_config, DMA_SIZE_8);
+    channel_config_set_bswap(&out_config, true);
+    channel_config_set_dreq(&out_config, pio_get_dreq(active_state->pio, active_state->pio_sm, true));
+
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
+
+    dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], command_buf, command_len, true);
+    dma_channel_wait_for_finish_blocking(active_state->dma_out);
+    dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], tx, tx_length - command_len, true);
+    dma_channel_wait_for_finish_blocking(active_state->dma_out);
+
+    const uint32_t fdebug_tx_stall = 1u << (PIO_FDEBUG_TXSTALL_LSB + active_state->pio_sm);
+    active_state->pio->fdebug = fdebug_tx_stall;
+    // pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
+    while (!(active_state->pio->fdebug & fdebug_tx_stall)) {
+        tight_loop_contents(); // todo timeout
+    }
+    __compiler_memory_barrier();
+    pio_sm_set_consecutive_pindirs(active_state->pio, active_state->pio_sm, active_state->qspi_config->data_io0_pin, 4, false);
+
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_mov(pio_pins, pio_null));
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
+}
+
+static void wiznet_pio_qspi_set_active(wiznet_pio_qspi_handle_t handle) {
+    active_state = (wiznet_pio_qspi_state_t *)handle;
+}
+
+static void wiznet_pio_qspi_set_inactive(void) {
+    active_state = NULL;
+}
+
+static void wizchip_pio_qspi_reset(wiznet_pio_qspi_handle_t handle) {
+
+    wiznet_pio_qspi_state_t *state = (wiznet_pio_qspi_state_t *)handle;
+    gpio_set_dir(state->qspi_config->reset_pin, GPIO_OUT);
+    gpio_put(state->qspi_config->reset_pin, 0);
+    sleep_ms(100);
+    gpio_put(state->qspi_config->reset_pin, 1);
+    sleep_ms(100);
+
+}
+
+static wiznet_pio_qspi_funcs_t *get_wiznet_pio_qspi_impl(void) {
+    static wiznet_pio_qspi_funcs_t funcs = {
+        .close = wiznet_pio_qspi_close,
+        .set_active = wiznet_pio_qspi_set_active,
+        .set_inactive = wiznet_pio_qspi_set_inactive,
+        .frame_start = wiznet_pio_qspi_frame_start,
+        .frame_end = wiznet_pio_qspi_frame_end,
+        .read_byte = wiznet_pio_qspi_read_byte,
+        .write_byte = wiznet_pio_qspi_write_byte,
+        .reset = wizchip_pio_qspi_reset,
+    };
+    return &funcs;
+}

libraries/lwIP_w6300/src/wiznet_pio_qspi.h

@@ -0,0 +1,53 @@
+/*
+    Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
+
+    SPDX-License-Identifier: BSD-3-Clause
+*/
+
+#ifndef _WIZNET_SPI_PIO_H_
+#define _WIZNET_SPI_PIO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+typedef struct wiznet_pio_qspi_config {
+    uint16_t clock_div_major;
+    uint8_t clock_div_minor;
+    uint8_t clock_pin;
+    uint8_t data_io0_pin;
+    uint8_t data_io1_pin;
+    uint8_t data_io2_pin;
+    uint8_t data_io3_pin;
+    uint8_t cs_pin;
+    uint8_t reset_pin;
+    uint8_t irq_pin;
+} wiznet_pio_qspi_config_t;
+
+typedef struct wiznet_pio_qspi_funcs** wiznet_pio_qspi_handle_t;
+
+typedef struct wiznet_pio_qspi_funcs {
+    void (*close)(wiznet_pio_qspi_handle_t funcs);
+    void (*set_active)(wiznet_pio_qspi_handle_t funcs);
+    void (*set_inactive)(void);
+    void (*frame_start)(void);
+    void (*frame_end)(void);
+    void (*read_byte)(uint8_t opcode, uint16_t addr, uint8_t* pBuf, uint16_t len);
+    void (*write_byte)(uint8_t opcode, uint16_t addr, uint8_t* pBuf, uint16_t len);
+    void (*read_buffer)(uint8_t *pBuf, uint16_t len);
+    void (*write_buffer)(uint8_t *pBuf, uint16_t len);
+    void (*reset)(wiznet_pio_qspi_handle_t funcs);
+} wiznet_pio_qspi_funcs_t;
+
+wiznet_pio_qspi_handle_t wiznet_pio_qspi_open(const wiznet_pio_qspi_config_t *qspi_config);
+void wiznet_pio_qspi_close(wiznet_pio_qspi_handle_t handle);
+void wiznet_pio_qspi_frame_start(void);
+void wiznet_pio_qspi_frame_end(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

libraries/lwIP_w6300/src/wiznet_pio_qspi.pio

@@ -0,0 +1,95 @@
+;
+; Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
+;
+; SPDX-License-Identifier: BSD-3-Clause
+;
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Normal SPI for W55RP20
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+.program wiznet_spi_write_read
+.side_set 1
+
+public write_bits:
+    out pins, 1             side 0
+    jmp x-- write_bits      side 1
+    set pins 0              side 0
+public write_end:
+read_byte_delay:
+    set pindirs 0           side 0
+read_byte:
+    set x 6                 side 1
+read_bits:
+    in pins, 1              side 0
+    jmp x-- read_bits       side 1
+    in pins, 1              side 0
+    jmp y-- read_byte       side 0
+public read_end:
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; QSPI Single for W6300
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+.program wizchip_pio_spi_single_write_read
+.side_set 1
+
+public write_bits: 
+    out pins, 1             side 0
+    jmp x-- write_bits      side 1
+    set pins 0              side 0
+public write_bits_end:
+read_byte_delay:
+    set pindirs 0           side 0
+read_byte:
+    set x 6                 side 1
+read_bits:
+    in pins, 1              side 0 
+    jmp x-- read_bits       side 1
+    in pins, 1              side 0 
+    jmp y-- read_byte       side 0
+public read_bits_end:
+
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; QSPI Dual for W6300
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+.program wizchip_pio_spi_dual_write_read
+.side_set 1
+
+public write_bits: 
+    out pins, 2             side 0
+    jmp x-- write_bits      side 1
+    set pins 0              side 0
+public write_bits_end:
+read_byte_delay:
+    set pindirs 0           side 0
+read_byte:
+    set x 2                 side 1
+read_bits:
+    in pins, 2              side 0 
+    jmp x-- read_bits       side 1
+    in pins, 2              side 0 
+    jmp y-- read_byte       side 0
+public read_bits_end:
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; QSPI Quad for W6300
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+.program wizchip_pio_spi_quad_write_read
+.side_set 1
+
+write_bits: 
+    out pins, 4             side 0
+    jmp x-- write_bits      side 1
+    set pins 0              side 0
+public write_bits_end:
+read_byte_delay:
+    set pindirs 0           side 0
+read_byte:
+    set x 0                 side 1
+read_bits:
+    in pins, 4              side 0 
+    jmp x-- read_bits       side 1
+    in pins, 4              side 0 
+    jmp y-- read_byte       side 0
+public read_bits_end:

libraries/lwIP_w6300/src/wiznet_pio_qspi.pio.h

@@ -0,0 +1,189 @@
+// -------------------------------------------------- //
+// This file is autogenerated by pioasm; do not edit! //
+// -------------------------------------------------- //
+
+#pragma once
+
+#if !PICO_NO_HARDWARE
+#include "hardware/pio.h"
+#endif
+
+// --------------------- //
+// wiznet_spi_write_read //
+// --------------------- //
+
+#define wiznet_spi_write_read_wrap_target 0
+#define wiznet_spi_write_read_wrap 8
+#define wiznet_spi_write_read_pio_version 0
+
+#define wiznet_spi_write_read_offset_write_bits 0u
+#define wiznet_spi_write_read_offset_write_end 3u
+#define wiznet_spi_write_read_offset_read_end 9u
+
+static const uint16_t wiznet_spi_write_read_program_instructions[] = {
+    //     .wrap_target
+    0x6001, //  0: out    pins, 1         side 0
+    0x1040, //  1: jmp    x--, 0          side 1
+    0xe000, //  2: set    pins, 0         side 0
+    0xe080, //  3: set    pindirs, 0      side 0
+    0xf026, //  4: set    x, 6            side 1
+    0x4001, //  5: in     pins, 1         side 0
+    0x1045, //  6: jmp    x--, 5          side 1
+    0x4001, //  7: in     pins, 1         side 0
+    0x0084, //  8: jmp    y--, 4          side 0
+    //     .wrap
+};
+
+#if !PICO_NO_HARDWARE
+static const struct pio_program wiznet_spi_write_read_program = {
+    .instructions = wiznet_spi_write_read_program_instructions,
+    .length = 9,
+    .origin = -1,
+    .pio_version = wiznet_spi_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
+};
+
+static inline pio_sm_config wiznet_spi_write_read_program_get_default_config(uint offset) {
+    pio_sm_config c = pio_get_default_sm_config();
+    sm_config_set_wrap(&c, offset + wiznet_spi_write_read_wrap_target, offset + wiznet_spi_write_read_wrap);
+    sm_config_set_sideset(&c, 1, false, false);
+    return c;
+}
+#endif
+
+// --------------------------------- //
+// wizchip_pio_spi_single_write_read //
+// --------------------------------- //
+
+#define wizchip_pio_spi_single_write_read_wrap_target 0
+#define wizchip_pio_spi_single_write_read_wrap 8
+#define wizchip_pio_spi_single_write_read_pio_version 0
+
+#define wizchip_pio_spi_single_write_read_offset_write_bits 0u
+#define wizchip_pio_spi_single_write_read_offset_write_bits_end 3u
+#define wizchip_pio_spi_single_write_read_offset_read_bits_end 9u
+
+static const uint16_t wizchip_pio_spi_single_write_read_program_instructions[] = {
+    //     .wrap_target
+    0x6001, //  0: out    pins, 1         side 0
+    0x1040, //  1: jmp    x--, 0          side 1
+    0xe000, //  2: set    pins, 0         side 0
+    0xe080, //  3: set    pindirs, 0      side 0
+    0xf026, //  4: set    x, 6            side 1
+    0x4001, //  5: in     pins, 1         side 0
+    0x1045, //  6: jmp    x--, 5          side 1
+    0x4001, //  7: in     pins, 1         side 0
+    0x0084, //  8: jmp    y--, 4          side 0
+    //     .wrap
+};
+
+#if !PICO_NO_HARDWARE
+static const struct pio_program wizchip_pio_spi_single_write_read_program = {
+    .instructions = wizchip_pio_spi_single_write_read_program_instructions,
+    .length = 9,
+    .origin = -1,
+    .pio_version = wizchip_pio_spi_single_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
+};
+
+static inline pio_sm_config wizchip_pio_spi_single_write_read_program_get_default_config(uint offset) {
+    pio_sm_config c = pio_get_default_sm_config();
+    sm_config_set_wrap(&c, offset + wizchip_pio_spi_single_write_read_wrap_target, offset + wizchip_pio_spi_single_write_read_wrap);
+    sm_config_set_sideset(&c, 1, false, false);
+    return c;
+}
+#endif
+
+// ------------------------------- //
+// wizchip_pio_spi_dual_write_read //
+// ------------------------------- //
+
+#define wizchip_pio_spi_dual_write_read_wrap_target 0
+#define wizchip_pio_spi_dual_write_read_wrap 8
+#define wizchip_pio_spi_dual_write_read_pio_version 0
+
+#define wizchip_pio_spi_dual_write_read_offset_write_bits 0u
+#define wizchip_pio_spi_dual_write_read_offset_write_bits_end 3u
+#define wizchip_pio_spi_dual_write_read_offset_read_bits_end 9u
+
+static const uint16_t wizchip_pio_spi_dual_write_read_program_instructions[] = {
+    //     .wrap_target
+    0x6002, //  0: out    pins, 2         side 0
+    0x1040, //  1: jmp    x--, 0          side 1
+    0xe000, //  2: set    pins, 0         side 0
+    0xe080, //  3: set    pindirs, 0      side 0
+    0xf022, //  4: set    x, 2            side 1
+    0x4002, //  5: in     pins, 2         side 0
+    0x1045, //  6: jmp    x--, 5          side 1
+    0x4002, //  7: in     pins, 2         side 0
+    0x0084, //  8: jmp    y--, 4          side 0
+    //     .wrap
+};
+
+#if !PICO_NO_HARDWARE
+static const struct pio_program wizchip_pio_spi_dual_write_read_program = {
+    .instructions = wizchip_pio_spi_dual_write_read_program_instructions,
+    .length = 9,
+    .origin = -1,
+    .pio_version = wizchip_pio_spi_dual_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
+};
+
+static inline pio_sm_config wizchip_pio_spi_dual_write_read_program_get_default_config(uint offset) {
+    pio_sm_config c = pio_get_default_sm_config();
+    sm_config_set_wrap(&c, offset + wizchip_pio_spi_dual_write_read_wrap_target, offset + wizchip_pio_spi_dual_write_read_wrap);
+    sm_config_set_sideset(&c, 1, false, false);
+    return c;
+}
+#endif
+
+// ------------------------------- //
+// wizchip_pio_spi_quad_write_read //
+// ------------------------------- //
+
+#define wizchip_pio_spi_quad_write_read_wrap_target 0
+#define wizchip_pio_spi_quad_write_read_wrap 8
+#define wizchip_pio_spi_quad_write_read_pio_version 0
+
+#define wizchip_pio_spi_quad_write_read_offset_write_bits_end 3u
+#define wizchip_pio_spi_quad_write_read_offset_read_bits_end 9u
+
+static const uint16_t wizchip_pio_spi_quad_write_read_program_instructions[] = {
+    //     .wrap_target
+    0x6004, //  0: out    pins, 4         side 0
+    0x1040, //  1: jmp    x--, 0          side 1
+    0xe000, //  2: set    pins, 0         side 0
+    0xe080, //  3: set    pindirs, 0      side 0
+    0xf020, //  4: set    x, 0            side 1
+    0x4004, //  5: in     pins, 4         side 0
+    0x1045, //  6: jmp    x--, 5          side 1
+    0x4004, //  7: in     pins, 4         side 0
+    0x0084, //  8: jmp    y--, 4          side 0
+    //     .wrap
+};
+
+#if !PICO_NO_HARDWARE
+static const struct pio_program wizchip_pio_spi_quad_write_read_program = {
+    .instructions = wizchip_pio_spi_quad_write_read_program_instructions,
+    .length = 9,
+    .origin = -1,
+    .pio_version = wizchip_pio_spi_quad_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
+};
+
+static inline pio_sm_config wizchip_pio_spi_quad_write_read_program_get_default_config(uint offset) {
+    pio_sm_config c = pio_get_default_sm_config();
+    sm_config_set_wrap(&c, offset + wizchip_pio_spi_quad_write_read_wrap_target, offset + wizchip_pio_spi_quad_write_read_wrap);
+    sm_config_set_sideset(&c, 1, false, false);
+    return c;
+}
+#endif
+

package.json

@@ -1,6 +1,6 @@
 {
   "name": "framework-arduinopico",
-  "version": "1.40504.0",
+  "version": "1.40601.0",
   "description": "Arduino Wiring-based Framework (RPi Pico RP2040, RP2350)",
   "keywords": [
     "framework",

package/package_pico_index.template.json

@@ -119,6 +119,9 @@
                   {
                      "name": "ArtronShop RP2 Nano"
                   },
+                  {
+                     "name": "BIGTREETECH SKR-Pico"
+                  },
                   {
                      "name": "Breadstick Raspberry"
                   },
@@ -363,10 +366,7 @@
                      "name": "Waveshare RP2040 PiZero"
                   },
                   {
-                     "name": "Waveshare RP2040 Plus 4MB"
-                  },
-                  {
-                     "name": "Waveshare RP2040 Plus 16MB"
+                     "name": "Waveshare RP2040 Plus"
                   },
                   {
                      "name": "Waveshare RP2040 LCD 0.96"
@@ -374,6 +374,15 @@
                   {
                      "name": "Waveshare RP2040 LCD 1.28"
                   },
+                  {
+                     "name": "Waveshare RP2350 Zero"
+                  },
+                  {
+                     "name": "Waveshare RP2350 Plus"
+                  },
+                  {
+                     "name": "Waveshare RP2350 LCD 0.96"
+                  },
                   {
                      "name": "WIZnet W5100S-EVB-Pico"
                   },
@@ -392,6 +401,12 @@
                   {
                      "name": "WIZnet W55RP20-EVB-Pico"
                   },
+                  {
+                     "name": "WIZnet W6300-EVB-Pico"
+                  },
+                  {
+                     "name": "WIZnet W6300-EVB-Pico2"
+                  },
                   {
                      "name": "Generic RP2040"
                   },

platform.txt

@@ -20,7 +20,7 @@
 # https://github.com/arduino/Arduino/wiki/Arduino-IDE-1.5---3rd-party-Hardware-specification
 
 name=Raspberry Pi RP2040/RP2350 Boards
-version=4.5.4
+version=4.6.1
 
 # Required discoveries and monitors
 # ---------------------------------

tests/restyle.sh

@@ -13,7 +13,7 @@ for dir in ./cores/rp2040 ./libraries/EEPROM ./libraries/I2S ./libraries/SingleF
            ./libraries/JoystickBT ./libraries/KeyboardBT ./variants ./libraries/BTstackLib \
            ./libraries/MouseBT ./libraries/SerialBT ./libraries/HID_Bluetooth \
            ./libraries/JoystickBLE ./libraries/KeyboardBLE ./libraries/MouseBLE \
-           ./libraries/lwIP_w55rp20 ./libraries/lwIP_w5500 ./libraries/lwIP_w5100 ./libraries/lwIP_enc28j60 \
+           ./libraries/lwIP_w6300 ./libraries/lwIP_w55rp20 ./libraries/lwIP_w5500 ./libraries/lwIP_w5100 ./libraries/lwIP_enc28j60 \
            ./libraries/SPISlave ./libraries/lwIP_ESPHost ./libraries/FatFS\
            ./libraries/FatFSUSB ./libraries/BluetoothAudio ./libraries/BluetoothHCI \
            ./libraries/BluetoothHIDMaster ./libraries/NetBIOS ./libraries/Ticker \

tools/json/adafruit_feather_rp2350_adalogger.json

@@ -25,7 +25,7 @@
         "variant": "adafruit_feather_rp2350_adalogger"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/adafruit_feather_rp2350_hstx.json

@@ -25,7 +25,7 @@
         "variant": "adafruit_feather_rp2350_hstx"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/adafruit_fruitjam.json

@@ -25,7 +25,7 @@
         "variant": "adafruit_fruitjam"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/adafruit_metro_rp2350.json

@@ -25,7 +25,7 @@
         "variant": "adafruit_metro_rp2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/bigtreetech_SKR_Pico.json

@@ -0,0 +1,56 @@
+{
+    "build": {
+        "arduino": {
+            "earlephilhower": {
+                "boot2_source": "boot2_w25q080_2_padded_checksum.S",
+                "usb_vid": "0x2E8B",
+                "usb_pid": "0xF00A"
+            }
+        },
+        "core": "earlephilhower",
+        "cpu": "cortex-m0plus",
+        "extra_flags": "-DARDUINO_BIGTREETECH_SKR_PICO -DARDUINO_ARCH_RP2040 -DUSBD_MAX_POWER_MA=250 ",
+        "f_cpu": "133000000L",
+        "hwids": [
+            [
+                "0x2E8A",
+                "0x00C0"
+            ],
+            [
+                "0x2E8B",
+                "0xF00A"
+            ]
+        ],
+        "mcu": "rp2040",
+        "variant": "bigtreetech_SKR_Pico"
+    },
+    "debug": {
+        "jlink_device": "RP2040_M0_0",
+        "openocd_target": "rp2040.cfg",
+        "svd_path": "rp2040.svd"
+    },
+    "frameworks": [
+        "arduino",
+        "picosdk"
+    ],
+    "name": "SKR-Pico",
+    "upload": {
+        "maximum_ram_size": 262144,
+        "maximum_size": 2097152,
+        "require_upload_port": true,
+        "native_usb": true,
+        "use_1200bps_touch": true,
+        "wait_for_upload_port": false,
+        "protocol": "picotool",
+        "protocols": [
+            "blackmagic",
+            "cmsis-dap",
+            "jlink",
+            "raspberrypi-swd",
+            "picotool",
+            "picoprobe"
+        ]
+    },
+    "url": "https://github.com/bigtreetech/SKR-Pico",
+    "vendor": "BIGTREETECH"
+}

tools/json/challenger_2350_bconnect.json

@@ -25,7 +25,7 @@
         "variant": "challenger_2350_bconnect"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/challenger_2350_wifi6_ble5.json

@@ -25,7 +25,7 @@
         "variant": "challenger_2350_wifi6_ble5"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/cytron_iriv_io_controller.json

@@ -25,7 +25,7 @@
         "variant": "cytron_iriv_io_controller"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/cytron_motion_2350_pro.json

@@ -25,7 +25,7 @@
         "variant": "cytron_motion_2350_pro"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/datanoisetv_picoadk_v2.json

@@ -25,7 +25,7 @@
         "variant": "datanoisetv_picoadk_v2"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/generic_rp2350.json

@@ -25,7 +25,7 @@
         "variant": "generic_rp2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/jumperless_v5.json

@@ -25,7 +25,7 @@
         "variant": "jumperless_v5"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/olimex_pico2xl.json

@@ -25,7 +25,7 @@
         "variant": "olimex_pico2xl"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/olimex_pico2xxl.json

@@ -25,7 +25,7 @@
         "variant": "olimex_pico2xxl"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/pimoroni_pga2350.json

@@ -25,7 +25,7 @@
         "variant": "pimoroni_pga2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/pimoroni_pico_plus_2.json

@@ -25,7 +25,7 @@
         "variant": "pimoroni_pico_plus_2"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/pimoroni_pico_plus_2w.json

@@ -25,7 +25,7 @@
         "variant": "pimoroni_pico_plus_2w"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/pimoroni_plasma2350.json

@@ -25,7 +25,7 @@
         "variant": "pimoroni_plasma2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/pimoroni_tiny2350.json

@@ -25,7 +25,7 @@
         "variant": "pimoroni_tiny2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/rpipico2.json

@@ -25,7 +25,7 @@
         "variant": "rpipico2"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/rpipico2w.json

@@ -25,7 +25,7 @@
         "variant": "rpipico2w"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/seeed_xiao_rp2350.json

@@ -25,7 +25,7 @@
         "variant": "seeed_xiao_rp2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/solderparty_rp2350_stamp.json

@@ -25,7 +25,7 @@
         "variant": "solderparty_rp2350_stamp"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/solderparty_rp2350_stamp_xl.json

@@ -25,7 +25,7 @@
         "variant": "solderparty_rp2350_stamp_xl"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/sparkfun_iotnode_lorawanrp2350.json

@@ -25,7 +25,7 @@
         "variant": "sparkfun_iotnode_lorawanrp2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/sparkfun_iotredboard_rp2350.json

@@ -25,7 +25,7 @@
         "variant": "sparkfun_iotredboard_rp2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/sparkfun_promicrorp2350.json

@@ -25,7 +25,7 @@
         "variant": "sparkfun_promicrorp2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/sparkfun_thingplusrp2350.json

@@ -25,7 +25,7 @@
         "variant": "sparkfun_thingplusrp2350"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/sparkfun_xrp_controller.json

@@ -25,7 +25,7 @@
         "variant": "sparkfun_xrp_controller"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/waveshare_rp2040_plus.json

@@ -22,7 +22,7 @@
             ]
         ],
         "mcu": "rp2040",
-        "variant": "waveshare_rp2040_plus_4mb"
+        "variant": "waveshare_rp2040_plus"
     },
     "debug": {
         "jlink_device": "RP2040_M0_0",
@@ -33,7 +33,7 @@
         "arduino",
         "picosdk"
     ],
-    "name": "RP2040 Plus 4MB",
+    "name": "RP2040 Plus",
     "upload": {
         "maximum_ram_size": 262144,
         "maximum_size": 4194304,

tools/json/waveshare_rp2350_lcd_0_96.json

@@ -0,0 +1,56 @@
+{
+    "build": {
+        "arduino": {
+            "earlephilhower": {
+                "boot2_source": "none.S",
+                "usb_vid": "0x2E8A",
+                "usb_pid": "0x10B7"
+            }
+        },
+        "core": "earlephilhower",
+        "cpu": "cortex-m33",
+        "extra_flags": "-DARDUINO_WAVESHARE_RP2350_LCD_0_96 -DARDUINO_ARCH_RP2040 -DUSBD_MAX_POWER_MA=500 ",
+        "f_cpu": "150000000L",
+        "hwids": [
+            [
+                "0x2E8A",
+                "0x00C0"
+            ],
+            [
+                "0x2E8A",
+                "0x10B7"
+            ]
+        ],
+        "mcu": "rp2350",
+        "variant": "waveshare_rp2350_lcd_0_96"
+    },
+    "debug": {
+        "jlink_device": "RP2350_M33_0",
+        "openocd_target": "rp2350.cfg",
+        "svd_path": "rp2350.svd"
+    },
+    "frameworks": [
+        "arduino",
+        "picosdk"
+    ],
+    "name": "RP2350 LCD 0.96",
+    "upload": {
+        "maximum_ram_size": 524288,
+        "maximum_size": 4194304,
+        "require_upload_port": true,
+        "native_usb": true,
+        "use_1200bps_touch": true,
+        "wait_for_upload_port": false,
+        "protocol": "picotool",
+        "protocols": [
+            "blackmagic",
+            "cmsis-dap",
+            "jlink",
+            "raspberrypi-swd",
+            "picotool",
+            "picoprobe"
+        ]
+    },
+    "url": "https://www.raspberrypi.org/products/raspberry-pi-pico/",
+    "vendor": "Waveshare"
+}

tools/json/waveshare_rp2350_plus.json

@@ -0,0 +1,56 @@
+{
+    "build": {
+        "arduino": {
+            "earlephilhower": {
+                "boot2_source": "none.S",
+                "usb_vid": "0x2E8A",
+                "usb_pid": "0x10B1"
+            }
+        },
+        "core": "earlephilhower",
+        "cpu": "cortex-m33",
+        "extra_flags": "-DARDUINO_WAVESHARE_RP2350_PLUS -DARDUINO_ARCH_RP2040 -DUSBD_MAX_POWER_MA=500 ",
+        "f_cpu": "150000000L",
+        "hwids": [
+            [
+                "0x2E8A",
+                "0x00C0"
+            ],
+            [
+                "0x2E8A",
+                "0x10B1"
+            ]
+        ],
+        "mcu": "rp2350",
+        "variant": "waveshare_rp2350_plus"
+    },
+    "debug": {
+        "jlink_device": "RP2350_M33_0",
+        "openocd_target": "rp2350.cfg",
+        "svd_path": "rp2350.svd"
+    },
+    "frameworks": [
+        "arduino",
+        "picosdk"
+    ],
+    "name": "RP2350 Plus",
+    "upload": {
+        "maximum_ram_size": 524288,
+        "maximum_size": 4194304,
+        "require_upload_port": true,
+        "native_usb": true,
+        "use_1200bps_touch": true,
+        "wait_for_upload_port": false,
+        "protocol": "picotool",
+        "protocols": [
+            "blackmagic",
+            "cmsis-dap",
+            "jlink",
+            "raspberrypi-swd",
+            "picotool",
+            "picoprobe"
+        ]
+    },
+    "url": "https://www.raspberrypi.org/products/raspberry-pi-pico/",
+    "vendor": "Waveshare"
+}

tools/json/waveshare_rp2350_zero.json

@@ -0,0 +1,56 @@
+{
+    "build": {
+        "arduino": {
+            "earlephilhower": {
+                "boot2_source": "none.S",
+                "usb_vid": "0x2E8A",
+                "usb_pid": "0x10B0"
+            }
+        },
+        "core": "earlephilhower",
+        "cpu": "cortex-m33",
+        "extra_flags": "-DARDUINO_WAVESHARE_RP2350_ZERO -DARDUINO_ARCH_RP2040 -DUSBD_MAX_POWER_MA=500 ",
+        "f_cpu": "150000000L",
+        "hwids": [
+            [
+                "0x2E8A",
+                "0x00C0"
+            ],
+            [
+                "0x2E8A",
+                "0x10B0"
+            ]
+        ],
+        "mcu": "rp2350",
+        "variant": "waveshare_rp2350_zero"
+    },
+    "debug": {
+        "jlink_device": "RP2350_M33_0",
+        "openocd_target": "rp2350.cfg",
+        "svd_path": "rp2350.svd"
+    },
+    "frameworks": [
+        "arduino",
+        "picosdk"
+    ],
+    "name": "RP2350 Zero",
+    "upload": {
+        "maximum_ram_size": 524288,
+        "maximum_size": 4194304,
+        "require_upload_port": true,
+        "native_usb": true,
+        "use_1200bps_touch": true,
+        "wait_for_upload_port": false,
+        "protocol": "picotool",
+        "protocols": [
+            "blackmagic",
+            "cmsis-dap",
+            "jlink",
+            "raspberrypi-swd",
+            "picotool",
+            "picoprobe"
+        ]
+    },
+    "url": "https://www.raspberrypi.org/products/raspberry-pi-pico/",
+    "vendor": "Waveshare"
+}

tools/json/wiznet_5100s_evb_pico2.json

@@ -25,7 +25,7 @@
         "variant": "wiznet_5100s_evb_pico2"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/wiznet_5500_evb_pico2.json

@@ -25,7 +25,7 @@
         "variant": "wiznet_5500_evb_pico2"
     },
     "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
         "openocd_target": "rp2350.cfg",
         "svd_path": "rp2350.svd"
     },

tools/json/wiznet_6300_evb_pico.json

@@ -4,12 +4,12 @@
             "earlephilhower": {
                 "boot2_source": "boot2_w25q080_2_padded_checksum.S",
                 "usb_vid": "0x2E8A",
-                "usb_pid": "0x1020"
+                "usb_pid": "0x1029"
             }
         },
         "core": "earlephilhower",
         "cpu": "cortex-m0plus",
-        "extra_flags": "-DARDUINO_WAVESHARE_RP2040_PLUS -DARDUINO_ARCH_RP2040 -DUSBD_MAX_POWER_MA=500 ",
+        "extra_flags": "-DARDUINO_WIZNET_6300_EVB_PICO -DARDUINO_ARCH_RP2040 -DUSBD_MAX_POWER_MA=250 ",
         "f_cpu": "133000000L",
         "hwids": [
             [
@@ -18,11 +18,11 @@
             ],
             [
                 "0x2E8A",
-                "0x1020"
+                "0x1029"
             ]
         ],
         "mcu": "rp2040",
-        "variant": "waveshare_rp2040_plus_16mb"
+        "variant": "wiznet_6300_evb_pico"
     },
     "debug": {
         "jlink_device": "RP2040_M0_0",
@@ -33,10 +33,10 @@
         "arduino",
         "picosdk"
     ],
-    "name": "RP2040 Plus 16MB",
+    "name": "W6300-EVB-Pico",
     "upload": {
         "maximum_ram_size": 262144,
-        "maximum_size": 16777216,
+        "maximum_size": 2097152,
         "require_upload_port": true,
         "native_usb": true,
         "use_1200bps_touch": true,
@@ -52,5 +52,5 @@
         ]
     },
     "url": "https://www.raspberrypi.org/products/raspberry-pi-pico/",
-    "vendor": "Waveshare"
+    "vendor": "WIZnet"
 }

tools/json/wiznet_6300_evb_pico2.json

@@ -0,0 +1,56 @@
+{
+    "build": {
+        "arduino": {
+            "earlephilhower": {
+                "boot2_source": "none.S",
+                "usb_vid": "0x2E8A",
+                "usb_pid": "0x1029"
+            }
+        },
+        "core": "earlephilhower",
+        "cpu": "cortex-m33",
+        "extra_flags": "-DARDUINO_WIZNET_6300_EVB_PICO2 -DARDUINO_ARCH_RP2040 -DUSBD_MAX_POWER_MA=250 ",
+        "f_cpu": "150000000L",
+        "hwids": [
+            [
+                "0x2E8A",
+                "0x00C0"
+            ],
+            [
+                "0x2E8A",
+                "0x1029"
+            ]
+        ],
+        "mcu": "rp2350",
+        "variant": "wiznet_6300_evb_pico2"
+    },
+    "debug": {
+        "jlink_device": "RP2350_M33_0",
+        "openocd_target": "rp2350.cfg",
+        "svd_path": "rp2350.svd"
+    },
+    "frameworks": [
+        "arduino",
+        "picosdk"
+    ],
+    "name": "W6300-EVB-Pico2",
+    "upload": {
+        "maximum_ram_size": 524288,
+        "maximum_size": 2097152,
+        "require_upload_port": true,
+        "native_usb": true,
+        "use_1200bps_touch": true,
+        "wait_for_upload_port": false,
+        "protocol": "picotool",
+        "protocols": [
+            "blackmagic",
+            "cmsis-dap",
+            "jlink",
+            "raspberrypi-swd",
+            "picotool",
+            "picoprobe"
+        ]
+    },
+    "url": "https://www.raspberrypi.org/products/raspberry-pi-pico/",
+    "vendor": "WIZnet"
+}

tools/makeboards.py

@@ -327,7 +327,7 @@ def MakeBoard(name, chip, vendor_name, product_name, vid, pid, pwr, boarddefine,
         tup = "riscv32-unknown-elf"
         opts = "-march=rv32imac_zicsr_zifencei_zba_zbb_zbs_zbkb -mabi=ilp32"
     else:
-        raise Exception("Unknown board type " + str(chip));
+        raise Exception("Unknown board type " + str(chip))
     BuildHeader(name, chip, tup, opts, vendor_name, product_name, vid, pid, pwr, boarddefine, name, flashsizemb * 1024 * 1024, psramsize, boot2, extra)
     if (name == "generic") or (name == "generic_rp2350") or (name == "vccgnd_yd_rp2040"):
         smfs =  [ 0, 64 * 1024, 128 * 1024, 256 * 1024, 512 * 1024 ]
@@ -350,6 +350,12 @@ def MakeBoard(name, chip, vendor_name, product_name, vid, pid, pwr, boarddefine,
         BuildCountry(name)
         BuildFlashMenu(name, chip, 8*1024*1024, [0, 7*1024*1024, 4*1024*1024, 2*1024*1024])
         BuildFlashMenu(name, chip, 16*1024*1024, [0, 15*1024*1024, 14*1024*1024, 12*1024*1024, 8*1024*1024, 4*1024*1024, 2*1024*1024])
+    elif name == "waveshare_rp2040_plus":
+        BuildFlashMenu(name, chip, 4*1024*1024, [*smallfs, 1024*1024, 2*1024*1024, 3*1024*1024])
+        BuildFlashMenu(name, chip, 16*1024*1024, [0, 15*1024*1024, 14*1024*1024, 12*1024*1024, 8*1024*1024, 4*1024*1024, 2*1024*1024])
+    elif name == "waveshare_rp2350_plus":
+        BuildFlashMenu(name, chip, 4*1024*1024, [*smallfs, 1024*1024, 2*1024*1024, 3*1024*1024])
+        BuildFlashMenu(name, chip, 16*1024*1024, [0, 15*1024*1024, 14*1024*1024, 12*1024*1024, 8*1024*1024, 4*1024*1024, 2*1024*1024])
     else:
         BuildFlashMenu(name, chip, flashsizemb * 1024 * 1024, fssizelist)
     if (chip == "rp2350") or (chip == "rp2350-riscv"):
@@ -412,12 +418,12 @@ def MakeBoardJSON(name, chip, vendor_name, product_name, vid, pid, pwr, boarddef
     elif chip == "rp2350":
         cpu = "cortex-m33"
         ramsize = 512
-        jlink = "RP2350_0"
+        jlink = "RP2350_M33_0"
         fcpu = "150000000L"
     elif chip == "rp2350-riscv":
         cpu = "riscv"
         ramsize = 512
-        jlink = "RP2350_0"
+        jlink = "RP2350_RV32_0"
         fcpu = "150000000L"
     j = {
     "build": {
@@ -541,6 +547,9 @@ MakeBoard("arduino_nano_connect", "rp2040", "Arduino", "Nano RP2040 Connect", "0
 # ArtronShop
 MakeBoard("artronshop_rp2_nano", "rp2040", "ArtronShop", "RP2 Nano", "0x2e8a", "0x000a", 250, "ARTRONSHOP_RP2_NANO", 2, 0, "boot2_w25q080_2_padded_checksum")
 
+# BIGTREETECH
+MakeBoard("bigtreetech_SKR_Pico", "rp2040", "BIGTREETECH", "SKR-Pico", "0x2e8b", "0xf00a", 250, "BIGTREETECH_SKR_PICO", 2, 0, "boot2_w25q080_2_padded_checksum", board_url="https://github.com/bigtreetech/SKR-Pico")
+
 # Breadstick
 MakeBoard("breadstick_raspberry", "rp2040", "Breadstick", "Raspberry", "0x2e8a", "0x105e" , 500, "Breadstick_Raspberry", 16, 0, "boot2_w25q080_2_padded_checksum", board_url="https://shop.breadstick.ca/products/raspberry-breadstick-rp2040")
 
@@ -689,10 +698,12 @@ MakeBoard("waveshare_rp2040_zero", "rp2040", "Waveshare", "RP2040 Zero", "0x2e8a
 MakeBoard("waveshare_rp2040_one", "rp2040", "Waveshare", "RP2040 One", "0x2e8a", "0x103a", 500, "WAVESHARE_RP2040_ONE", 4, 0, "boot2_w25q16jvxq_4_padded_checksum")
 MakeBoard("waveshare_rp2040_matrix", "rp2040", "Waveshare", "RP2040 Matrix", "0x2e8a", "0x103a", 500, "WAVESHARE_RP2040_MATRIX", 2, 0, "boot2_w25q16jvxq_4_padded_checksum")
 MakeBoard("waveshare_rp2040_pizero", "rp2040", "Waveshare", "RP2040 PiZero", "0x2e8a", "0x0003", 500, "WAVESHARE_RP2040_PIZERO", 16, 0, "boot2_w25q16jvxq_4_padded_checksum")
-MakeBoard("waveshare_rp2040_plus_4mb", "rp2040", "Waveshare", "RP2040 Plus 4MB", "0x2e8a", "0x1020", 500, "WAVESHARE_RP2040_PLUS", 4, 0, "boot2_w25q080_2_padded_checksum")
-MakeBoard("waveshare_rp2040_plus_16mb", "rp2040", "Waveshare", "RP2040 Plus 16MB", "0x2e8a", "0x1020", 500, "WAVESHARE_RP2040_PLUS", 16, 0, "boot2_w25q080_2_padded_checksum")
+MakeBoard("waveshare_rp2040_plus", "rp2040", "Waveshare", "RP2040 Plus", "0x2e8a", "0x1020", 500, "WAVESHARE_RP2040_PLUS", 4, 0, "boot2_w25q080_2_padded_checksum")
 MakeBoard("waveshare_rp2040_lcd_0_96", "rp2040", "Waveshare", "RP2040 LCD 0.96", "0x2e8a", "0x1021", 500, "WAVESHARE_RP2040_LCD_0_96", 2, 0, "boot2_w25q16jvxq_4_padded_checksum")
 MakeBoard("waveshare_rp2040_lcd_1_28", "rp2040", "Waveshare", "RP2040 LCD 1.28", "0x2e8a", "0x1039", 500, "WAVESHARE_RP2040_LCD_1_28", 2, 0, "boot2_w25q16jvxq_4_padded_checksum")
+MakeBoard("waveshare_rp2350_zero", "rp2350", "Waveshare", "RP2350 Zero", "0x2e8a", "0x10B0", 500, "WAVESHARE_RP2350_ZERO", 4, 0, "none")
+MakeBoard("waveshare_rp2350_plus", "rp2350", "Waveshare", "RP2350 Plus", "0x2e8a", "0x10B1", 500, "WAVESHARE_RP2350_PLUS", 4, 0, "none")
+MakeBoard("waveshare_rp2350_lcd_0_96", "rp2350", "Waveshare", "RP2350 LCD 0.96", "0x2e8a", "0x10B7", 500, "WAVESHARE_RP2350_LCD_0_96", 4, 0, "none")
 
 # WIZnet
 MakeBoard("wiznet_5100s_evb_pico", "rp2040", "WIZnet", "W5100S-EVB-Pico", "0x2e8a", "0x1027", 250, "WIZNET_5100S_EVB_PICO", 2, 0, "boot2_w25q080_2_padded_checksum")
@@ -701,6 +712,8 @@ MakeBoard("wiznet_wizfi360_evb_pico", "rp2040", "WIZnet", "WizFi360-EVB-Pico", "
 MakeBoard("wiznet_5500_evb_pico", "rp2040", "WIZnet", "W5500-EVB-Pico", "0x2e8a", "0x1029", 250, "WIZNET_5500_EVB_PICO", 2, 0, "boot2_w25q080_2_padded_checksum")
 MakeBoard("wiznet_5500_evb_pico2", "rp2350", "WIZnet", "W5500-EVB-Pico2", "0x2e8a", "0x1029", 250, "WIZNET_5500_EVB_PICO2", 2, 0, "none")
 MakeBoard("wiznet_55rp20_evb_pico", "rp2040", "WIZnet", "W55RP20-EVB-Pico", "0x2e8a", "0x1029", 250, "WIZNET_55RP20_EVB_PICO", 2, 0, "boot2_w25q080_2_padded_checksum")
+MakeBoard("wiznet_6300_evb_pico", "rp2040", "WIZnet", "W6300-EVB-Pico", "0x2e8a", "0x1029", 250, "WIZNET_6300_EVB_PICO", 2, 0, "boot2_w25q080_2_padded_checksum")
+MakeBoard("wiznet_6300_evb_pico2", "rp2350", "WIZnet", "W6300-EVB-Pico2", "0x2e8a", "0x1029", 250, "WIZNET_6300_EVB_PICO2", 2, 0, "none")
 
 # Generic
 MakeBoard("generic", "rp2040", "Generic", "RP2040", "0x2e8a", "0xf00a", 250, "GENERIC_RP2040", 16, 0, "boot2_generic_03h_4_padded_checksum")

variants/adafruit_fruitjam/pins_arduino.h

@@ -8,9 +8,9 @@
 #define NUM_NEOPIXEL   (5u)
 
 // 'Boot0' button also on GPIO #0
-#define PIN_BUTTON      (0u)
-#define PIN_BUTTON1     (4u)
-#define PIN_BUTTON2     (5u)
+#define PIN_BUTTON1     (0u)
+#define PIN_BUTTON2     (4u)
+#define PIN_BUTTON3     (5u)
 
 // USB host connector
 #define PIN_USB_HOST_DP (1u)
@@ -29,12 +29,22 @@
 
 // I2S
 #define PIN_I2S_DATAOUT  (24u)
-#define PIN_I2S_WORDSEL  (25u)
+#define PIN_I2S_WORDSEL  (27u)
 #define PIN_I2S_BITCLK   (26u)
-#define PIN_I2S_MCLK     (27u)
+#define PIN_I2S_MCLK     (25u)
+#define PIN_I2S_IRQ      (23u)
+
 
 #define PIN_PERIPHERAL_RESET (22u)
 
+
+#define SerialESP32     Serial1
+#define SPIWIFI         SPI1
+#define SPIWIFI_SS      46      // Chip select pin
+#define SPIWIFI_ACK     3       // a.k.a BUSY or READY pin
+#define ESP32_RESETN    PIN_PERIPHERAL_RESET  // Reset pin
+#define ESP32_GPIO0     PIN_I2S_IRQ
+
 #define __PIN_A0        (40u)
 #define __PIN_A1        (41u)
 #define __PIN_A2        (42u)
@@ -43,24 +53,25 @@
 #define __PIN_A5        (45u)
 
 // UARTs
+#define __SERIAL1_DEVICE uart1
 #define PIN_SERIAL1_TX (8u)
 #define PIN_SERIAL1_RX (9u)
-#define PIN_SERIAL2_TX (99u) // not pinned out
+#define PIN_SERIAL2_TX (99u)
 #define PIN_SERIAL2_RX (99u)
 
 // SPI
-#define __SPI1_DEVICE   spi1
-#define PIN_SPI1_MISO  (28u)
-#define PIN_SPI1_MOSI  (31u)
-#define PIN_SPI1_SCK   (30u)
-#define PIN_SPI1_SS    (46u)
-
 #define __SPI0_DEVICE   spi0
 #define PIN_SPI0_MISO  (36u)
 #define PIN_SPI0_MOSI  (35u)
 #define PIN_SPI0_SCK   (34u)
 #define PIN_SPI0_SS    (39u)
 
+#define __SPI1_DEVICE   spi1
+#define PIN_SPI1_MISO  (28u)
+#define PIN_SPI1_MOSI  (31u)
+#define PIN_SPI1_SCK   (30u)
+#define PIN_SPI1_SS    (46u)
+
 // Wire
 #define __WIRE0_DEVICE i2c0
 #define PIN_WIRE0_SDA  (20u)

variants/bigtreetech_SKR_Pico/pins_arduino.h

@@ -0,0 +1,86 @@
+#pragma once
+
+// based on
+// https://github.com/s-light/bigtreetech-SKR-Pico?tab=readme-ov-file
+// that is based on
+// https://github.com/bigtreetech/SKR-Pico/blob/master/Hardware/BTT%20SKR%20Pico%20V1.0-SCH.pdf
+
+// LEDs
+// #define PIN_LED        (13u)
+
+
+// Serial
+#define PIN_SERIAL1_TX  (0u)
+#define PIN_SERIAL1_RX  (1u)
+#define PIN_TXD0        PIN_SERIAL1_TX
+#define PIN_RXD0        PIN_SERIAL1_RX
+
+// Wire
+#define PIN_WIRE0_SDA   PIN_SERIAL1_TX
+#define PIN_WIRE0_SCL   PIN_SERIAL1_RX
+
+
+#define PIN_ZEN         (2u)
+#define PIN_YSTOP       (3u)
+#define PIN_XSTOP       (4u)
+#define PIN_YDIR        (5u)
+#define PIN_YSTP        (6u)
+#define PIN_YEN         (7u)
+
+#define PIN_SERIAL2_TX  (8u)
+#define PIN_SERIAL2_RX  (9u)
+#define PIN_TX4         PIN_SERIAL2_TX
+#define PIN_RX4         PIN_SERIAL2_RX
+
+#define PIN_XDIR        (10u)
+#define PIN_XSTP        (11u)
+#define PIN_XEN         (12u)
+#define PIN_E0DIR       (13u)
+#define PIN_E0STP       (14u)
+#define PIN_E0EN        (15u)
+#define PIN_E0STOP      (16u)
+#define PIN_FAN1_PWM    (17u)
+#define PIN_FAN2_PWM    (18u)
+#define PIN_ZSTP        (19u)
+#define PIN_FAN3_PWM    (20u)
+#define LASER_PWM       PIN_FAN3_PWM
+#define PIN_HB_PWM      (21u)
+#define PIN_P_2         (22u)
+#define PIN_HE_PWM      (23u)
+
+// NeoPixel
+#define PIN_NEOPIXEL   (24u)
+#define NUM_NEOPIXEL   (1u)
+#define PIN_RGB        PIN_NEOPIXEL
+
+#define PIN_ZSTOP      (25u)
+#define PIN_THB        (26u)
+#define PIN_TH0        (27u)
+#define PIN_ZDIR       (28u)
+#define PIN_SERVOS     (29u)
+#define ADC3           PIN_SERVOS
+
+// ----------------------
+// Not available..  (all pins already in use)
+#define PIN_SPI0_MISO  (99u)
+#define PIN_SPI0_MOSI  (99u)
+#define PIN_SPI0_SCK   (99u)
+#define PIN_SPI0_SS    (99u)
+
+#define PIN_SPI1_MISO  (99u)
+#define PIN_SPI1_MOSI  (99u)
+#define PIN_SPI1_SCK   (99u)
+#define PIN_SPI1_SS    (99u)
+
+// #define __WIRE1_DEVICE i2c0
+#define PIN_WIRE1_SDA  (99u)
+#define PIN_WIRE1_SCL  (99u)
+
+
+
+#define SERIAL_HOWMANY (2u)
+#define SPI_HOWMANY    (0u)
+#define WIRE_HOWMANY   (1u)
+
+
+#include "../generic/common.h"

variants/pimoroni_pico_plus_2/pins_arduino.h

@@ -51,6 +51,16 @@
 
 #define PICO_RP2350A 0 // RP2350B
 
+// DVI connector
+#define PIN_CKN (15u)
+#define PIN_CKP (14u)
+#define PIN_D0N (13u)
+#define PIN_D0P (12u)
+#define PIN_D1N (19u)
+#define PIN_D1P (18u)
+#define PIN_D2N (17u)
+#define PIN_D2P (16u)
+
 /* Pins mappings for marked pins on the board */
 static const uint8_t D0 = (0u);
 static const uint8_t D1 = (1u);

variants/pimoroni_pico_plus_2w/pins_arduino.h

@@ -53,6 +53,16 @@
 
 #define PICO_RP2350A 0 // RP2530B
 
+// DVI connector
+#define PIN_CKN (15u)
+#define PIN_CKP (14u)
+#define PIN_D0N (13u)
+#define PIN_D0P (12u)
+#define PIN_D1N (19u)
+#define PIN_D1P (18u)
+#define PIN_D2N (17u)
+#define PIN_D2P (16u)
+
 /* Pins mappings for marked pins on the board */
 static const uint8_t D0 = (0u);
 static const uint8_t D1 = (1u);

variants/waveshare_rp2350_lcd_0_96/pins_arduino.h

@@ -0,0 +1,79 @@
+#pragma once
+
+// Waveshare RP2350 lcd 0.96
+// https://www.waveshare.com/wiki/RP2350-LCD-0.96
+// https://files.waveshare.com/wiki/RP2350-LCD-0.96/RP2350_LCD_0.96_Schematic.pdf
+// https://www.waveshare.com/w/upload/0/09/RP2350-LCD-0.96-details-inter.jpg
+//
+
+/*
+                  Pin#                Pin#
+                       ___(_____)___
+           GPIO0   1  |   *USB C*   | 40   VBUS
+           GPIO1   2  |             | 39   VSYS
+             GND   3  |             | 38   GND
+           GPIO2   4  |             | 37   3V3_EN
+           GPIO3   5  |             | 36   3V3(OUT)
+           GPIO4   6  |             | 35   ADC_VREF
+           GPIO5   7  |             | 34   GPIO28
+             GND   8  |             | 33   GND
+           GPIO6   9  |             | 32   GPIO27
+           GPIO7  10  |             | 31   GPIO26
+           GPIO8  11  |             | 30   RUN
+           GPIO9  12  |             | 29   GPIO22
+             GND  13  |             | 28   GND
+          GPIO10  14  |             | 27   GPIO21
+          GPIO11  15  |             | 25   GPIO20
+          GPIO12  16  |             | 25   GPIO19
+          GPIO13  17  |             | 24   GPIO18
+             GND  18  |             | 23   GND
+          GPIO14  19  |             | 22   GPIO17
+          GPIO15  20  |____|_|_|____| 21   GPIO16
+                           S G S
+                           W N W
+                           C D D
+                           L   I
+                           K   N
+*/
+
+#define PICO_RP2350A 1
+
+// LCD
+#define LDC_SPI (1u)
+#define PIN_LCD_DC (8u)
+#define PIN_LCD_CS (9u)
+#define PIN_LCD_SCLK (10u)
+#define PIN_LCD_MOSI (11u)
+#define PIN_LCD_RST (12u)
+#define PIN_LCD_BL (25u)
+
+// Serial
+#define PIN_SERIAL1_TX (0u)
+#define PIN_SERIAL1_RX (1u)
+
+#define PIN_SERIAL2_TX (8u)
+#define PIN_SERIAL2_RX (9u)
+
+// SPI
+#define PIN_SPI0_MISO (16u)
+#define PIN_SPI0_MOSI (19u)
+#define PIN_SPI0_SCK (18u)
+#define PIN_SPI0_SS (17u)
+
+#define PIN_SPI1_MISO (12u)
+#define PIN_SPI1_MOSI (15u)
+#define PIN_SPI1_SCK (14u)
+#define PIN_SPI1_SS (13u)
+
+// Wire
+#define PIN_WIRE0_SDA (8u)
+#define PIN_WIRE0_SCL (9u)
+
+#define PIN_WIRE1_SDA (6u)
+#define PIN_WIRE1_SCL (7u)
+
+#define SERIAL_HOWMANY (3u)
+#define SPI_HOWMANY (2u)
+#define WIRE_HOWMANY (2u)
+
+#include "../generic/common.h"

variants/waveshare_rp2350_plus/pins_arduino.h

@@ -1,9 +1,9 @@
 #pragma once
 
-// Waveshare RP2040 Plus
-// https://www.waveshare.com/wiki/RP2040-Plus
-// https://www.waveshare.com/w/upload/d/d1/RP2040_Plus.pdf
-// https://www.waveshare.com/img/devkit/RP2040-Plus/RP2040-Plus-details-7.jpg
+// Waveshare RP2350 Plus
+// https://www.waveshare.com/wiki/RP2350-Plus
+// https://files.waveshare.com/wiki/RP2350-Plus/RP2350_Plus.pdf
+// https://www.waveshare.com/w/upload/3/3c/680px-RP2350-Plus-details-inter.jpg
 //
 
 /*
@@ -36,8 +36,10 @@
                            K   N
 */
 
+#define PICO_RP2350A 1
+
 // LEDs
-#define PIN_LED        (25u)
+#define PIN_LED (25u)
 
 // Serial
 #define PIN_SERIAL1_TX (0u)
@@ -47,26 +49,25 @@
 #define PIN_SERIAL2_RX (9u)
 
 // SPI
-#define PIN_SPI0_MISO  (16u)
-#define PIN_SPI0_MOSI  (19u)
-#define PIN_SPI0_SCK   (18u)
-#define PIN_SPI0_SS    (17u)
+#define PIN_SPI0_MISO (16u)
+#define PIN_SPI0_MOSI (19u)
+#define PIN_SPI0_SCK (18u)
+#define PIN_SPI0_SS (17u)
 
-#define PIN_SPI1_MISO  (12u)
-#define PIN_SPI1_MOSI  (15u)
-#define PIN_SPI1_SCK   (14u)
-#define PIN_SPI1_SS    (13u)
+#define PIN_SPI1_MISO (12u)
+#define PIN_SPI1_MOSI (15u)
+#define PIN_SPI1_SCK (14u)
+#define PIN_SPI1_SS (13u)
 
 // Wire
-#define PIN_WIRE0_SDA  (8u)
-#define PIN_WIRE0_SCL  (9u)
+#define PIN_WIRE0_SDA (8u)
+#define PIN_WIRE0_SCL (9u)
 
-#define PIN_WIRE1_SDA  (6u)
-#define PIN_WIRE1_SCL  (7u)
+#define PIN_WIRE1_SDA (6u)
+#define PIN_WIRE1_SCL (7u)
 
 #define SERIAL_HOWMANY (3u)
-#define SPI_HOWMANY    (2u)
-#define WIRE_HOWMANY   (2u)
-
+#define SPI_HOWMANY (2u)
+#define WIRE_HOWMANY (2u)
 
 #include "../generic/common.h"

variants/waveshare_rp2350_zero/pins_arduino.h

@@ -0,0 +1,65 @@
+#pragma once
+
+// Waveshare RP2350 Zero
+// https://www.waveshare.com/wiki/RP2350-Zero
+// https://files.waveshare.com/wiki/RP2350-Zero/RP2350_Zero.pdf
+// https://www.waveshare.com/img/devkit/RP2350-Zero/RP2350-Zero-details-7.jpg
+//
+
+/*
+                Pin#              Pin#
+                    ___(_____)___
+              5v 1 |   *USB C*   | 23 GPIO0
+             GND 2 |             | 22 GPIO1
+            3.3v 3 |             | 21 GPIO2
+          GPIO29 4 |             | 20 GPIO3
+          GPIO28 5 |             | 19 GPIO4
+          GPIO27 6 |             | 18 GPIO5
+          GPIO26 7 |             | 17 GPIO6
+          GPIO15 8 |             | 16 GPIO7
+          GPIO14 9 |__|_|_|_|_|__| 15 GPIO8
+                      1 1 1 1 1
+                      0 1 2 3 4
+
+                    Pin10 = GPIO13
+                    Pin11 = GPIO12
+                    Pin12 = GPIO11
+                    Pin13 = GPIO10
+                    Pin14 = GPIO9
+*/
+
+#define PICO_RP2350A 1
+
+// NeoPixel
+#define PIN_NEOPIXEL (16u)
+
+// Serial1
+#define PIN_SERIAL1_TX (0u)
+#define PIN_SERIAL1_RX (1u)
+
+#define PIN_SERIAL2_TX (8u)
+#define PIN_SERIAL2_RX (9u)
+
+// SPI
+#define PIN_SPI0_MISO (4u)
+#define PIN_SPI0_MOSI (3u)
+#define PIN_SPI0_SCK (2u)
+#define PIN_SPI0_SS (5u)
+
+#define PIN_SPI1_MISO (12u)
+#define PIN_SPI1_MOSI (15u)
+#define PIN_SPI1_SCK (14u)
+#define PIN_SPI1_SS (13u)
+
+// Wire
+#define PIN_WIRE0_SDA (4u)
+#define PIN_WIRE0_SCL (5u)
+
+#define PIN_WIRE1_SDA (26u)
+#define PIN_WIRE1_SCL (27u)
+
+#define SERIAL_HOWMANY (2u)
+#define SPI_HOWMANY (2u)
+#define WIRE_HOWMANY (2u)
+
+#include "../generic/common.h"

variants/wiznet_6300_evb_pico/pins_arduino.h

@@ -0,0 +1 @@
+#include "../generic/pins_arduino.h"

variants/wiznet_6300_evb_pico2/pins_arduino.h

@@ -0,0 +1,2 @@
+#define PICO_RP2350A 1
+#include "../generic/pins_arduino.h"