arduino-pico/docs/rp2350.rst
Earle F. Philhower, III f6973fc64d
Add RISC-V support, GCC 14 move (#2491)
* Adds RISC-V compilation option to the IDE and Platform.IO.
* Build RP2350-RISCV libpico, libbearssl
* Fix RP2350 BearSSL library (was copied from RP2040, now built for M33)
* New GCC 14.2 toolchain is required (12.4 RISC-V support is borked)
* Newlib locking fixed prototypes
* Manually force all runtime init code into RP2350 binaries
* Add RISC-V to CI
* Remove RP2350 BOOT2.S files, binaries (not used)
* Clean up minor GCC 14.x warnings
* Add RP2350-RISCV OTA build, link
* Add RISC-V FreeRTOS files (configuration still not running, but builds)
* Add basic documentation
2024-09-29 15:10:36 -07:00

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RP2350 Specific Notes
=====================
The RP2350 chip (present on the Raspberry Pi Pico 2 board and many others)
is supported by the core with some minor caveats:
* PSRAM is supported via a new ``pmalloc`` call and ``PSRAM`` variable decorator.
* Both RP2350A and RP2350B (48 GPIOs) are supported.
ARM and RISC-V Modes
~~~~~~~~~~~~~~~~~~~~
Either set of cores can be used on the RP2350, ARM Cortex-M33 or RISC-V Hazard3.
Select the desired core from the IDE menus under ``Tools->CPU Architecture``.
As of the initial release, all libraries should work under the new RISC-V mode with
the exception of FreeRTOS. If not, patches are always welcome.
P2350-E9 Errata ("Increased leakage current on Bank 0 GPIO when pad input is enabled")
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Like all chips, the RP2350-A2 stepping has post-silicon chip errata covering certain
bugs found after the chip was manufactured. Probably the most (in)famous and concerning
is RP2350-E9 which is noted as resulting in "Increased leakage current on Bank 0 GPIO
when pad input is enabled." At a high level, this means that in some cases when an
input pin is being driven by a weak (high impedance) input, it may not read properly.
After discussion with the community and exploration of the issue by many users, this
core has decided not to implement any forced workarounds for this issue. Given the
physical nature of the problem and how no one specific solution is appropriate for
all conditions.
For more information please read the errata yourself and check the Raspberry Pi Forums
for the latest updates.