Earle F. Philhower, III 21a767e7e4 Semihosting part of core, RISC-V support (#2685) ... Semihosting is handy for debugging, so allow the core to use `SerialSemi` as the ::printf port. Add menu item to the IDE to allow selection. Add RISC-V implementation of semihost call		2024-12-14 09:42:45 -08:00
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ci	Remove obsolete TRAVIS CI variables (#2292)	2024-07-23 09:48:33 -07:00
astyle_core.conf	Add astyle format, boards.txt, and package check (#166)	2021-05-24 15:01:03 -07:00
astyle_examples.conf	Add compilation to CI (#155)	2021-05-22 02:58:57 -07:00
build-rp2350-riscv.sh	Add RISC-V support, GCC 14 move (#2491)	2024-09-29 15:10:36 -07:00
build-rp2350.sh	Add RISC-V support, GCC 14 move (#2491)	2024-09-29 15:10:36 -07:00
build-tinyusb.sh	Remove obsolete TRAVIS CI variables (#2292)	2024-07-23 09:48:33 -07:00
build.sh	Add RP2350 support, new boards (#2337)	2024-08-25 11:21:46 -07:00
common.sh	Add RISC-V support, GCC 14 move (#2491)	2024-09-29 15:10:36 -07:00
debug.sh	Remove obsolete TRAVIS CI variables (#2292)	2024-07-23 09:48:33 -07:00
restyle.sh	Semihosting part of core, RISC-V support (#2685)	2024-12-14 09:42:45 -08:00
run_CI_locally.sh	Remove obsolete TRAVIS CI variables (#2292)	2024-07-23 09:48:33 -07:00