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@ -60,11 +60,13 @@ Available as a book to purchase or as a free PDF download.
text - [site](url).
## Feature
## RISC-V: The background, the benefits, and the future
[![title](../assets/20221220/20221220-name.jpg)](url)
[![RISC-V: The background, the benefits, and the future](../assets/20221220/20221220-name.jpg)](https://www.eeworldonline.com/risc-v-background-benefits-and-future-faq/)
text - [site](url).
US developers conceived the revolutionary instruction set architecture (ISA) known as RISC-V in 2010. Grounded in reduced instruction set computer (RISC) principles, it’s a common, open-source, and completely free ISA that can be used to develop software and hardware. These attributes are just part of what makes the architecture unique and attractive to developers and manufacturers.
While it’s far from new, momentum around RISC-V is continuing to accelerate, with various services, technologies, and products that leverage this architecture emerging in the past year alone. According to Deloitte, use of RISC-V’s open-chip processors was expected to double this year and is set to double again in 2023 - [EEWorld](https://www.eeworldonline.com/risc-v-background-benefits-and-future-faq/).
## This Week's Python Streams