From 69e34b6b6bdf45bc1111777c46839a8b5fcb30bd Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 4 Oct 2023 11:20:47 +1100
Subject: [PATCH 001/310] all: Switch to new preview build versioning scheme.

See https://github.com/micropython/micropython/issues/12127 for details.

Previously at the point when a release is made, we update mpconfig.h
and set a git tag. i.e. the version increments at the release.

Now the version increments immediately after the release. The workflow is:
1. Final commit in the cycle updates mpconfig.h to set (X, Y, 0, 0) (i.e.
   clear the pre-release state).
2. This commit is tagged "vX.Y.0".
3. First commit for the new cycle updates mpconfig.h to set (X, Y+1, 0, 1)
   (i.e. increment the minor version, set the pre-release state).
4. This commit is tagged "vX.Y+1.0-preview".

The idea is that a nightly build is actually a "preview" of the _next_
release. i.e. any documentation describing the current release may not
actually match the nightly build. So we use "preview" as our semver
pre-release identifier.

Changes in this commit:
 - Add MICROPY_VERSION_PRERELEASE to mpconfig.h to allow indicating that
   this is not a release version.
 - Remove unused MICROPY_VERSION integer.
 - Append "-preview" to MICROPY_VERSION_STRING when the pre-release state
   is set.
 - Update py/makeversionhdr.py to no longer generate MICROPY_GIT_HASH.
 - Remove the one place MICROPY_GIT_HASH was used (it can use
   MICROPY_GIT_TAG instead).
 - Update py/makeversionhdr.py to also understand
   MICROPY_VERSION_PRERELEASE in mpconfig.h.
 - Update py/makeversionhdr.py to convert the git-describe output into
   semver-compatible "X.Y.Z-preview.N.gHASH".
 - Update autobuild.sh to generate filenames using the new scheme.
 - Update remove_old_firmware.py to match new scheme.
 - Update mpremote's pyproject.toml to handle the "-preview" suffix in the
   tag. setuptools_scm maps to this "rc0" to match PEP440.
 - Fix docs heading where it incorrectly said "vvX.Y.Z" for release docs.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 docs/conf.py                           |  4 +-
 docs/templates/layout.html             |  2 +-
 ports/cc3200/tools/update-wipy.py      |  4 +-
 py/makeversionhdr.py                   | 93 +++++++++++++-------------
 py/modsys.c                            | 20 ++++--
 py/mpconfig.h                          | 28 +++++---
 tools/autobuild/autobuild.sh           | 14 +++-
 tools/autobuild/remove_old_firmware.py | 22 +++---
 tools/mpremote/pyproject.toml          |  7 +-
 9 files changed, 116 insertions(+), 78 deletions(-)

diff --git a/docs/conf.py b/docs/conf.py
index 0dbbfe0f70..49ddd22be9 100755
--- a/docs/conf.py
+++ b/docs/conf.py
@@ -21,10 +21,12 @@ import os
 # documentation root, use os.path.abspath to make it absolute, like shown here.
 sys.path.insert(0, os.path.abspath('.'))
 
-# The members of the html_context dict are available inside topindex.html
+# The MICROPY_VERSION env var should be "vX.Y.Z" (or unset).
 micropy_version = os.getenv('MICROPY_VERSION') or 'latest'
 micropy_all_versions = (os.getenv('MICROPY_ALL_VERSIONS') or 'latest').split(',')
 url_pattern = '%s/en/%%s' % (os.getenv('MICROPY_URL_PREFIX') or '/',)
+
+# The members of the html_context dict are available inside topindex.html
 html_context = {
     'cur_version':micropy_version,
     'all_versions':[
diff --git a/docs/templates/layout.html b/docs/templates/layout.html
index 8563f02af0..21dab5eb42 100644
--- a/docs/templates/layout.html
+++ b/docs/templates/layout.html
@@ -9,7 +9,7 @@
   {% if is_release %}
     <div class="wy-alert wy-alert-danger">
       <p>
-        This is the v{{ release }} version of the MicroPython
+        This is the {{ release }} version of the MicroPython
         documentation. The <a href="/en/latest/{{ pagename }}.html">latest
         development version</a> of this page may be more current.
       </p>
diff --git a/ports/cc3200/tools/update-wipy.py b/ports/cc3200/tools/update-wipy.py
index 7f5527a52b..e37f3a0b09 100644
--- a/ports/cc3200/tools/update-wipy.py
+++ b/ports/cc3200/tools/update-wipy.py
@@ -152,9 +152,9 @@ def verify_update(args):
             with open(tag_file_path) as tag_file:
                 for line in tag_file:
                     bline = bytes(line, "ascii")
-                    if b"MICROPY_GIT_HASH" in bline:
+                    if b"MICROPY_GIT_TAG" in bline:
                         bline = (
-                            bline.lstrip(b"#define MICROPY_GIT_HASH ")
+                            bline.lstrip(b"#define MICROPY_GIT_TAG ")
                             .replace(b'"', b"")
                             .replace(b"\r", b"")
                             .replace(b"\n", b"")
diff --git a/py/makeversionhdr.py b/py/makeversionhdr.py
index e682a4e139..2030bb02c4 100644
--- a/py/makeversionhdr.py
+++ b/py/makeversionhdr.py
@@ -13,6 +13,14 @@ import datetime
 import subprocess
 
 
+# The MicroPython repository tags a release commit as "vX.Y.Z", and the commit
+# immediately following as "vX.(Y+1).Z-preview".
+# This function will return:
+#   "vX.Y.Z" -- building at the release commit
+#   "vX.Y.Z-preview" -- building at the first commit in the next cycle
+#   "vX.Y.Z-preview.N.gHASH" -- building at any subsequent commit in the cycle
+#   "vX.Y.Z-preview.N.gHASH.dirty" -- building at any subsequent commit in the cycle
+#                                     with local changes
 def get_version_info_from_git(repo_path):
     # Python 2.6 doesn't have check_output, so check for that
     try:
@@ -29,47 +37,33 @@ def get_version_info_from_git(repo_path):
             stderr=subprocess.STDOUT,
             universal_newlines=True,
         ).strip()
-    except subprocess.CalledProcessError as er:
-        if er.returncode == 128:
-            # git exit code of 128 means no repository found
-            return None
-        git_tag = ""
-    except OSError:
-        return None
-    try:
-        git_hash = subprocess.check_output(
-            ["git", "rev-parse", "--short", "HEAD"],
-            cwd=repo_path,
-            stderr=subprocess.STDOUT,
-            universal_newlines=True,
-        ).strip()
+        # Turn git-describe's output into semver compatible (dot-separated
+        # identifiers inside the prerelease field).
+        git_tag = git_tag.split("-", 1)
+        if len(git_tag) == 1:
+            return git_tag[0]
+        else:
+            return git_tag[0] + "-" + git_tag[1].replace("-", ".")
     except subprocess.CalledProcessError:
-        git_hash = "unknown"
+        return None
     except OSError:
         return None
 
-    try:
-        # Check if there are any modified files.
-        subprocess.check_call(
-            ["git", "diff", "--no-ext-diff", "--quiet", "--exit-code"],
-            cwd=repo_path,
-            stderr=subprocess.STDOUT,
-        )
-        # Check if there are any staged files.
-        subprocess.check_call(
-            ["git", "diff-index", "--cached", "--quiet", "HEAD", "--"],
-            cwd=repo_path,
-            stderr=subprocess.STDOUT,
-        )
-    except subprocess.CalledProcessError:
-        git_hash += "-dirty"
-    except OSError:
-        return None
-
-    return git_tag, git_hash
-
 
+# When building from a source tarball (or any situation where the git repo
+# isn't available), this function will use the info in mpconfig.h as a
+# fallback. The release commit sets MICROPY_VERSION_PRERELEASE to 0, and the
+# commit immediately following increments MICROPY_VERSION_MINOR and sets
+# MICROPY_VERSION_PRERELEASE back to 1.
+# This function will return:
+#    "vX.Y.Z" -- building at the release commit
+#    "vX.Y.Z-preview" -- building at any other commit
 def get_version_info_from_mpconfig(repo_path):
+    print(
+        "makeversionhdr.py: Warning: No git repo or tag info available, falling back to mpconfig.h version info.",
+        file=sys.stderr,
+    )
+
     with open(os.path.join(repo_path, "py", "mpconfig.h")) as f:
         for line in f:
             if line.startswith("#define MICROPY_VERSION_MAJOR "):
@@ -78,21 +72,30 @@ def get_version_info_from_mpconfig(repo_path):
                 ver_minor = int(line.strip().split()[2])
             elif line.startswith("#define MICROPY_VERSION_MICRO "):
                 ver_micro = int(line.strip().split()[2])
-                git_tag = "v%d.%d.%d" % (ver_major, ver_minor, ver_micro)
-                return git_tag, "<no hash>"
+            elif line.startswith("#define MICROPY_VERSION_PRERELEASE "):
+                ver_prerelease = int(line.strip().split()[2])
+                git_tag = "v%d.%d.%d%s" % (
+                    ver_major,
+                    ver_minor,
+                    ver_micro,
+                    "-preview" if ver_prerelease else "",
+                )
+                return git_tag
     return None
 
 
 def make_version_header(repo_path, filename):
-    info = None
+    git_tag = None
     if "MICROPY_GIT_TAG" in os.environ:
-        info = [os.environ["MICROPY_GIT_TAG"], os.environ["MICROPY_GIT_HASH"]]
-    if info is None:
-        info = get_version_info_from_git(repo_path)
-    if info is None:
-        info = get_version_info_from_mpconfig(repo_path)
+        git_tag = os.environ["MICROPY_GIT_TAG"]
+    if git_tag is None:
+        git_tag = get_version_info_from_git(repo_path)
+    if git_tag is None:
+        git_tag = get_version_info_from_mpconfig(repo_path)
 
-    git_tag, git_hash = info
+    if not git_tag:
+        print("makeversionhdr.py: Error: No version information available.")
+        sys.exit(1)
 
     build_date = datetime.date.today()
     if "SOURCE_DATE_EPOCH" in os.environ:
@@ -104,11 +107,9 @@ def make_version_header(repo_path, filename):
     file_data = """\
 // This file was generated by py/makeversionhdr.py
 #define MICROPY_GIT_TAG "%s"
-#define MICROPY_GIT_HASH "%s"
 #define MICROPY_BUILD_DATE "%s"
 """ % (
         git_tag,
-        git_hash,
         build_date.strftime("%Y-%m-%d"),
     )
 
diff --git a/py/modsys.c b/py/modsys.c
index 38105ee218..e40542467b 100644
--- a/py/modsys.c
+++ b/py/modsys.c
@@ -59,16 +59,24 @@ const mp_print_t mp_sys_stdout_print = {&mp_sys_stdout_obj, mp_stream_write_adap
 STATIC const MP_DEFINE_STR_OBJ(mp_sys_version_obj, "3.4.0; " MICROPY_BANNER_NAME_AND_VERSION);
 
 // version_info - Python language version that this implementation conforms to, as a tuple of ints
-#define I(n) MP_OBJ_NEW_SMALL_INT(n)
-// TODO: CPython is now at 5-element array, but save 2 els so far...
-STATIC const mp_obj_tuple_t mp_sys_version_info_obj = {{&mp_type_tuple}, 3, {I(3), I(4), I(0)}};
+// TODO: CPython is now at 5-element array (major, minor, micro, releaselevel, serial), but save 2 els so far...
+STATIC const mp_rom_obj_tuple_t mp_sys_version_info_obj = {{&mp_type_tuple}, 3, {MP_ROM_INT(3), MP_ROM_INT(4), MP_ROM_INT(0)}};
 
 // sys.implementation object
 // this holds the MicroPython version
-STATIC const mp_obj_tuple_t mp_sys_implementation_version_info_obj = {
+STATIC const mp_rom_obj_tuple_t mp_sys_implementation_version_info_obj = {
     {&mp_type_tuple},
-    3,
-    { I(MICROPY_VERSION_MAJOR), I(MICROPY_VERSION_MINOR), I(MICROPY_VERSION_MICRO) }
+    4,
+    {
+        MP_ROM_INT(MICROPY_VERSION_MAJOR),
+        MP_ROM_INT(MICROPY_VERSION_MINOR),
+        MP_ROM_INT(MICROPY_VERSION_MICRO),
+        #if MICROPY_VERSION_PRERELEASE
+        MP_ROM_QSTR(MP_QSTR_preview),
+        #else
+        MP_ROM_QSTR(MP_QSTR_),
+        #endif
+    }
 };
 STATIC const MP_DEFINE_STR_OBJ(mp_sys_implementation_machine_obj, MICROPY_BANNER_MACHINE);
 #if MICROPY_PERSISTENT_CODE_LOAD
diff --git a/py/mpconfig.h b/py/mpconfig.h
index eb3a0eb736..a36f9658fb 100644
--- a/py/mpconfig.h
+++ b/py/mpconfig.h
@@ -26,22 +26,32 @@
 #ifndef MICROPY_INCLUDED_PY_MPCONFIG_H
 #define MICROPY_INCLUDED_PY_MPCONFIG_H
 
-// Current version of MicroPython
+// Current version of MicroPython. This is used by sys.implementation.version
+// as well as a fallback to generate MICROPY_GIT_TAG if the git repo or tags
+// are unavailable.
 #define MICROPY_VERSION_MAJOR 1
-#define MICROPY_VERSION_MINOR 21
+#define MICROPY_VERSION_MINOR 22
 #define MICROPY_VERSION_MICRO 0
+#define MICROPY_VERSION_PRERELEASE 1
 
-// Combined version as a 32-bit number for convenience
-#define MICROPY_VERSION ( \
-    MICROPY_VERSION_MAJOR << 16 \
-        | MICROPY_VERSION_MINOR << 8 \
-        | MICROPY_VERSION_MICRO)
+// Combined version as a 32-bit number for convenience to allow version
+// comparison. Doesn't include prerelease state.
+// e.g. #if MICROPY_VERSION < MICROPY_MAKE_VERSION(1, 22, 0)
+#define MICROPY_MAKE_VERSION(major, minor, patch) (major << 16 | minor << 8 | patch)
+#define MICROPY_VERSION MICROPY_MAKE_VERSION(MICROPY_VERSION_MAJOR, MICROPY_VERSION_MINOR, MICROPY_VERSION_MICRO)
 
-// String version
-#define MICROPY_VERSION_STRING \
+// String version. This is only used directly for platform.platform and
+// os.uname().release. All other version info available in the firmware (e.g.
+// the REPL banner) comes from MICROPY_GIT_TAG.
+#define MICROPY_VERSION_STRING_BASE \
     MP_STRINGIFY(MICROPY_VERSION_MAJOR) "." \
     MP_STRINGIFY(MICROPY_VERSION_MINOR) "." \
     MP_STRINGIFY(MICROPY_VERSION_MICRO)
+#if MICROPY_VERSION_PRERELEASE
+#define MICROPY_VERSION_STRING MICROPY_VERSION_STRING_BASE "-preview"
+#else
+#define MICROPY_VERSION_STRING MICROPY_VERSION_STRING_BASE
+#endif
 
 // This file contains default configuration settings for MicroPython.
 // You can override any of the options below using mpconfigport.h file
diff --git a/tools/autobuild/autobuild.sh b/tools/autobuild/autobuild.sh
index e1f2287ee5..7854945bbe 100755
--- a/tools/autobuild/autobuild.sh
+++ b/tools/autobuild/autobuild.sh
@@ -54,9 +54,19 @@ pushd ${MICROPY_AUTOBUILD_MICROPYTHON_REPO}
 make -C mpy-cross
 
 # make the firmware tag
+# final filename will be <BOARD><-VARIANT>-<DATE>-v<SEMVER>.ext
+# where SEMVER is vX.Y.Z or vX.Y.Z-preview.N.gHASH or vX.Y.Z-preview.N.gHASH.dirty
 FW_DATE=$(date '+%Y%m%d')
-FW_GIT="$(git describe --dirty || echo unknown)"
-FW_TAG="-$FW_DATE-unstable-$FW_GIT"
+# same logic as makeversionhdr.py, convert git-describe output into semver-compatible
+FW_GIT_TAG="$(git describe --tags --dirty --always --match 'v[1-9].*')"
+FW_SEMVER_MAJOR_MINOR_PATCH="$(echo $FW_GIT_TAG | cut -d'-' -f1)"
+FW_SEMVER_PRERELEASE="$(echo $FW_GIT_TAG | cut -s -d'-' -f2-)"
+if [ -z "$FW_SEMVER_PRERELEASE" ]; then
+    FW_SEMVER="$FW_SEMVER_MAJOR_MINOR_PATCH"
+else
+    FW_SEMVER="$FW_SEMVER_MAJOR_MINOR_PATCH-$(echo $FW_SEMVER_PRERELEASE | tr - .)"
+fi
+FW_TAG="-$FW_DATE-$FW_SEMVER"
 
 # build new firmware
 cd ports/cc3200
diff --git a/tools/autobuild/remove_old_firmware.py b/tools/autobuild/remove_old_firmware.py
index e9d2e8aae8..a6203531c7 100755
--- a/tools/autobuild/remove_old_firmware.py
+++ b/tools/autobuild/remove_old_firmware.py
@@ -14,7 +14,7 @@ def main():
 
     # SSH to get list of existing files.
     p = subprocess.run(
-        ["ssh", ssh_machine, "find", ssh_firmware_dir, "-name", "\\*-unstable-v\\*"],
+        ["ssh", ssh_machine, "find", ssh_firmware_dir, "-name", "\\*-preview.\\*"],
         capture_output=True,
     )
     if p.returncode != 0:
@@ -26,31 +26,33 @@ def main():
     boards = {}
     for file in all_files:
         m = re.match(
-            rb"([a-z/.]+)/([A-Za-z0-9_-]+)-(20[0-9]{6})-unstable-(v[0-9.-]+-g[0-9a-f]+).",
+            rb"([a-z/.]+)/([A-Za-z0-9_-]+)-(20[0-9]{6})-(v[0-9.]+)-preview.([0-9]+).g[0-9a-f]+.",
             file,
         )
         if not m:
             continue
-        dir, board, date, version = m.groups()
+        dir, board, date, version, ncommits = m.groups()
         if board not in boards:
             boards[board] = {}
-        if (date, version) not in boards[board]:
-            boards[board][(date, version)] = []
-        boards[board][(date, version)].append(file)
+        if (date, version, ncommits) not in boards[board]:
+            boards[board][(date, version, ncommits)] = []
+        boards[board][(date, version, ncommits)].append(file)
 
     # Collect files to remove based on date and version.
     remove = []
     for board in boards.values():
-        filelist = [(date, version, files) for (date, version), files in board.items()]
+        filelist = [
+            (date, version, ncommits, files) for (date, version, ncommits), files in board.items()
+        ]
         filelist.sort(reverse=True)
         keep = []
-        for date, version, files in filelist:
-            if keep and version == keep[-1]:
+        for date, version, ncommits, files in filelist:
+            if keep and (version, ncommits) == keep[-1]:
                 remove.extend(files)
             elif len(keep) >= NUM_KEEP_PER_BOARD:
                 remove.extend(files)
             else:
-                keep.append(version)
+                keep.append((version, ncommits))
 
     if DEBUG:
         all_files.sort(reverse=True)
diff --git a/tools/mpremote/pyproject.toml b/tools/mpremote/pyproject.toml
index b01385c3d5..746b40bfdd 100644
--- a/tools/mpremote/pyproject.toml
+++ b/tools/mpremote/pyproject.toml
@@ -36,9 +36,14 @@ mpremote = "mpremote.main:main"
 [tool.hatch.metadata.hooks.requirements_txt]
 files = ["requirements.txt"]
 
+# This will be PEP-440 normalised into either:
+# mpremote-X.Y.Z (on vX.Y.Z release tag)
+# mpremote-X.Y.Zrc0 (on vX.Y.Z-preview tag, i.e. first commit in the cycle)
+# mpremote-X.Y.Zrc0.postN+gHASH (N commits past vX.Y.Z-preview tag)
+# mpremote-X.Y.Zrc0.postN+gHASH.dDATE (N commits past vX.Y.Z-preview tag, dirty)
 [tool.hatch.version]
 source = "vcs"
-tag-pattern = "(?P<version>v(\\d+).(\\d+).(\\d+))"
+tag-pattern = "(?P<version>v(\\d+).(\\d+).(\\d+)(-preview)?)"
 raw-options = { root = "../..", version_scheme = "post-release" }
 
 [tool.hatch.build]

From 5232847771903e9022c8c67a436b0562e4530602 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Fri, 6 Oct 2023 15:57:15 +1100
Subject: [PATCH 002/310] README.md: Update CI badges.

- Fix URL for the unix badge.
- Add stm32 CI badge.
- Add docs CI badge (linking to the documentation)
- Make docs CI run on push (so we get a badge generated).

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 .github/workflows/docs.yml | 1 +
 README.md                  | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/docs.yml b/.github/workflows/docs.yml
index a0105d6ca6..e0b6fdaba0 100644
--- a/.github/workflows/docs.yml
+++ b/.github/workflows/docs.yml
@@ -1,6 +1,7 @@
 name: Build docs
 
 on:
+  push:
   pull_request:
     paths:
       - docs/**
diff --git a/README.md b/README.md
index 6482899b25..e6c0a09b8b 100644
--- a/README.md
+++ b/README.md
@@ -1,4 +1,4 @@
-[![CI badge](https://github.com/micropython/micropython/workflows/unix%20port/badge.svg)](https://github.com/micropython/micropython/actions?query=branch%3Amaster+event%3Apush) [![codecov](https://codecov.io/gh/micropython/micropython/branch/master/graph/badge.svg?token=I92PfD05sD)](https://codecov.io/gh/micropython/micropython)
+[![Unix CI badge](https://github.com/micropython/micropython/actions/workflows/ports_unix.yml/badge.svg)](https://github.com/micropython/micropython/actions?query=branch%3Amaster+event%3Apush) [![STM32 CI badge](https://github.com/micropython/micropython/actions/workflows/ports_stm32.yml/badge.svg)](https://github.com/micropython/micropython/actions?query=branch%3Amaster+event%3Apush) [![Docs CI badge](https://github.com/micropython/micropython/actions/workflows/docs.yml/badge.svg)](https://docs.micropython.org/) [![codecov](https://codecov.io/gh/micropython/micropython/branch/master/graph/badge.svg?token=I92PfD05sD)](https://codecov.io/gh/micropython/micropython)
 
 The MicroPython project
 =======================

From 3fb1bb131f43207e2201a61139cd3f6e82d6513f Mon Sep 17 00:00:00 2001
From: Matthias Urlichs <matthias@urlichs.de>
Date: Fri, 6 Oct 2023 21:02:43 +0200
Subject: [PATCH 003/310] py/vm: Don't emit warning when using "raise ... from
 None".

"Raise SomeException() from None" is a common Python idiom to suppress
chained exceptions and thus shouldn't trigger a warning on a version of
Python that doesn't support them in the first place.
---
 py/vm.c                             | 6 ++++--
 tests/basics/exception_chain.py     | 9 +++++++++
 tests/basics/exception_chain.py.exp | 3 ++-
 3 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/py/vm.c b/py/vm.c
index 385d13ee40..a7902d9276 100644
--- a/py/vm.c
+++ b/py/vm.c
@@ -1171,8 +1171,10 @@ unwind_return:
 
                 ENTRY(MP_BC_RAISE_FROM): {
                     MARK_EXC_IP_SELECTIVE();
-                    mp_warning(NULL, "exception chaining not supported");
-                    sp--; // ignore (pop) "from" argument
+                    mp_obj_t from_value = POP();
+                    if (from_value != mp_const_none) {
+                        mp_warning(NULL, "exception chaining not supported");
+                    }
                     mp_obj_t obj = mp_make_raise_obj(TOP());
                     RAISE(obj);
                 }
diff --git a/tests/basics/exception_chain.py b/tests/basics/exception_chain.py
index c3a7d6b113..14dd6dfbad 100644
--- a/tests/basics/exception_chain.py
+++ b/tests/basics/exception_chain.py
@@ -1,6 +1,15 @@
 # Exception chaining is not supported, but check that basic
 # exception works as expected.
+
 try:
     raise Exception from None
 except Exception:
     print("Caught Exception")
+
+try:
+    try:
+        raise ValueError("Value")
+    except Exception as exc:
+        raise RuntimeError("Runtime") from exc
+except Exception as ex2:
+    print("Caught Exception:", ex2)
diff --git a/tests/basics/exception_chain.py.exp b/tests/basics/exception_chain.py.exp
index 13635b3cde..4369e07a2c 100644
--- a/tests/basics/exception_chain.py.exp
+++ b/tests/basics/exception_chain.py.exp
@@ -1,2 +1,3 @@
-Warning: exception chaining not supported
 Caught Exception
+Warning: exception chaining not supported
+Caught Exception: Runtime

From a06f4c8df499164721b2132859bef19da48d52d1 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Sat, 7 Oct 2023 12:10:19 +0200
Subject: [PATCH 004/310] mimxrt/led: Fix LED init call from main, and simplify
 led_init.

led_init() was not called, and therefore the machine.LED class seemed not
to work.  led_init() now uses mp_hal_pin_output() to configure the pin.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/mimxrt/led.c  | 14 +-------------
 ports/mimxrt/main.c |  2 +-
 2 files changed, 2 insertions(+), 14 deletions(-)

diff --git a/ports/mimxrt/led.c b/ports/mimxrt/led.c
index 216affa227..99876a5d90 100644
--- a/ports/mimxrt/led.c
+++ b/ports/mimxrt/led.c
@@ -52,19 +52,7 @@ void led_init(void) {
     // Turn off LEDs and initialize
     for (mp_int_t led = 0; led < NUM_LEDS; led++) {
         const machine_pin_obj_t *led_pin = machine_led_obj[led].led_pin;
-
-        gpio_pin_config_t pin_config = {
-            .outputLogic = 1U,
-            .direction = kGPIO_DigitalOutput,
-            .interruptMode = kGPIO_NoIntmode,
-        };
-
-        GPIO_PinInit(led_pin->gpio, led_pin->pin, &pin_config);
-
-        // ALT mode for GPIO is always 5
-        IOMUXC_SetPinMux(led_pin->muxRegister, 5U, 0, 0, led_pin->configRegister,
-            1U);                 // Software Input On Field: Input Path is determined by functionality
-        IOMUXC_SetPinConfig(led_pin->muxRegister, 5U, 0, 0, led_pin->configRegister, 0x10B0U);
+        mp_hal_pin_output(led_pin);
         MICROPY_HW_LED_OFF(led_pin);
     }
 }
diff --git a/ports/mimxrt/main.c b/ports/mimxrt/main.c
index 993e598185..f5d57d530e 100644
--- a/ports/mimxrt/main.c
+++ b/ports/mimxrt/main.c
@@ -93,7 +93,7 @@ int main(void) {
     #endif
 
     for (;;) {
-        #if defined(MICROPY_HW_LED1)
+        #if defined(MICROPY_HW_LED1_PIN)
         led_init();
         #endif
 

From 9f835df35e1628974437cdf87334667a9e2ce3c5 Mon Sep 17 00:00:00 2001
From: Glenn Moloney <glenn.moloney@gmail.com>
Date: Tue, 10 Oct 2023 13:06:59 +1100
Subject: [PATCH 005/310] esp32,esp8266: Rename MICROPY_ESPNOW to
 MICROPY_PY_ESPNOW.

For consistency with other Python-level modules.

Also add the corresponding missing preprocessor guard to esp32/modespnow.c,
so that this port compiles if MICROPY_PY_ESPNOW and MICROPY_PY_NETWORK_WLAN
are set to 0.

Fixes #12622.

Signed-off-by: Glenn Moloney <glenn.moloney@gmail.com>
---
 ports/esp32/main.c                            |  4 +-
 ports/esp32/modespnow.c                       | 55 ++++++++++---------
 ports/esp32/mpconfigport.h                    |  4 +-
 ports/esp8266/Makefile                        |  6 +-
 .../boards/ESP8266_GENERIC/mpconfigboard.mk   |  6 +-
 ports/esp8266/main.c                          |  4 +-
 ports/esp8266/modespnow.c                     |  2 +-
 7 files changed, 43 insertions(+), 38 deletions(-)

diff --git a/ports/esp32/main.c b/ports/esp32/main.c
index 4a9c0060b2..b514f44e01 100644
--- a/ports/esp32/main.c
+++ b/ports/esp32/main.c
@@ -60,7 +60,7 @@
 #include "extmod/modbluetooth.h"
 #endif
 
-#if MICROPY_ESPNOW
+#if MICROPY_PY_ESPNOW
 #include "modespnow.h"
 #endif
 
@@ -152,7 +152,7 @@ soft_reset_exit:
     mp_bluetooth_deinit();
     #endif
 
-    #if MICROPY_ESPNOW
+    #if MICROPY_PY_ESPNOW
     espnow_deinit(mp_const_none);
     MP_STATE_PORT(espnow_singleton) = NULL;
     #endif
diff --git a/ports/esp32/modespnow.c b/ports/esp32/modespnow.c
index 08836c0ad7..77dc970f51 100644
--- a/ports/esp32/modespnow.c
+++ b/ports/esp32/modespnow.c
@@ -47,17 +47,20 @@
 #include "py/ringbuf.h"
 
 #include "mpconfigport.h"
+
+#if MICROPY_PY_ESPNOW
+
 #include "mphalport.h"
 #include "modnetwork.h"
 #include "modespnow.h"
 
-#ifndef MICROPY_ESPNOW_RSSI
+#ifndef MICROPY_PY_ESPNOW_RSSI
 // Include code to track rssi of peers
-#define MICROPY_ESPNOW_RSSI 1
+#define MICROPY_PY_ESPNOW_RSSI 1
 #endif
-#ifndef MICROPY_ESPNOW_EXTRA_PEER_METHODS
+#ifndef MICROPY_PY_ESPNOW_EXTRA_PEER_METHODS
 // Include mod_peer(),get_peer(),peer_count()
-#define MICROPY_ESPNOW_EXTRA_PEER_METHODS 1
+#define MICROPY_PY_ESPNOW_EXTRA_PEER_METHODS 1
 #endif
 
 // Relies on gcc Variadic Macros and Statement Expressions
@@ -71,10 +74,10 @@ static const uint8_t ESPNOW_MAGIC = 0x99;
 typedef struct {
     uint8_t magic;              // = ESPNOW_MAGIC
     uint8_t msg_len;            // Length of the message
-    #if MICROPY_ESPNOW_RSSI
+    #if MICROPY_PY_ESPNOW_RSSI
     uint32_t time_ms;           // Timestamp (ms) when packet is received
     int8_t rssi;                // RSSI value (dBm) (-127 to 0)
-    #endif // MICROPY_ESPNOW_RSSI
+    #endif // MICROPY_PY_ESPNOW_RSSI
 } __attribute__((packed)) espnow_hdr_t;
 
 typedef struct {
@@ -117,9 +120,9 @@ typedef struct _esp_espnow_obj_t {
     size_t peer_count;              // Cache the # of peers for send(sync=True)
     mp_obj_t recv_cb;               // Callback when a packet is received
     mp_obj_t recv_cb_arg;           // Argument passed to callback
-    #if MICROPY_ESPNOW_RSSI
+    #if MICROPY_PY_ESPNOW_RSSI
     mp_obj_t peers_table;           // A dictionary of discovered peers
-    #endif // MICROPY_ESPNOW_RSSI
+    #endif // MICROPY_PY_ESPNOW_RSSI
 } esp_espnow_obj_t;
 
 const mp_obj_type_t esp_espnow_type;
@@ -164,11 +167,11 @@ STATIC mp_obj_t espnow_make_new(const mp_obj_type_t *type, size_t n_args,
     self->recv_timeout_ms = DEFAULT_RECV_TIMEOUT_MS;
     self->recv_buffer = NULL;       // Buffer is allocated in espnow_init()
     self->recv_cb = mp_const_none;
-    #if MICROPY_ESPNOW_RSSI
+    #if MICROPY_PY_ESPNOW_RSSI
     self->peers_table = mp_obj_new_dict(0);
     // Prevent user code modifying the dict
     mp_obj_dict_get_map(self->peers_table)->is_fixed = 1;
-    #endif // MICROPY_ESPNOW_RSSI
+    #endif // MICROPY_PY_ESPNOW_RSSI
 
     // Set the global singleton pointer for the espnow protocol.
     MP_STATE_PORT(espnow_singleton) = self;
@@ -305,7 +308,7 @@ STATIC mp_obj_t espnow_stats(mp_obj_t _) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(espnow_stats_obj, espnow_stats);
 
-#if MICROPY_ESPNOW_RSSI
+#if MICROPY_PY_ESPNOW_RSSI
 // ### Maintaining the peer table and reading RSSI values
 //
 // We maintain a peers table for several reasons, to:
@@ -345,7 +348,7 @@ static mp_map_elem_t *_update_rssi(const uint8_t *peer, int8_t rssi, uint32_t ti
     list->items[1] = mp_obj_new_int(time_ms);
     return item;
 }
-#endif // MICROPY_ESPNOW_RSSI
+#endif // MICROPY_PY_ESPNOW_RSSI
 
 // Return C pointer to byte memory string/bytes/bytearray in obj.
 // Raise ValueError if the length does not match expected len.
@@ -413,11 +416,11 @@ STATIC mp_obj_t espnow_recvinto(size_t n_args, const mp_obj_t *args) {
         msg->len += msg->free;   // Make all the space in msg array available
         msg->free = 0;
     }
-    #if MICROPY_ESPNOW_RSSI
+    #if MICROPY_PY_ESPNOW_RSSI
     uint8_t peer_buf[ESP_NOW_ETH_ALEN];
     #else
     uint8_t *peer_buf = _get_bytes_len_w(list->items[0], ESP_NOW_ETH_ALEN);
-    #endif // MICROPY_ESPNOW_RSSI
+    #endif // MICROPY_PY_ESPNOW_RSSI
     uint8_t *msg_buf = _get_bytes_len_w(msg, ESP_NOW_MAX_DATA_LEN);
 
     // Read the packet header from the incoming buffer
@@ -441,7 +444,7 @@ STATIC mp_obj_t espnow_recvinto(size_t n_args, const mp_obj_t *args) {
         msg->free = size - msg_len;
     }
 
-    #if MICROPY_ESPNOW_RSSI
+    #if MICROPY_PY_ESPNOW_RSSI
     // Update rssi value in the peer device table
     mp_map_elem_t *entry = _update_rssi(peer_buf, hdr.rssi, hdr.time_ms);
     list->items[0] = entry->key;  // Set first element of list to peer
@@ -449,7 +452,7 @@ STATIC mp_obj_t espnow_recvinto(size_t n_args, const mp_obj_t *args) {
         list->items[2] = MP_OBJ_NEW_SMALL_INT(hdr.rssi);
         list->items[3] = mp_obj_new_int(hdr.time_ms);
     }
-    #endif // MICROPY_ESPNOW_RSSI
+    #endif // MICROPY_PY_ESPNOW_RSSI
 
     return MP_OBJ_NEW_SMALL_INT(msg_len);
 }
@@ -561,10 +564,10 @@ STATIC void recv_cb(const esp_now_recv_info_t *recv_info, const uint8_t *msg, in
     espnow_hdr_t header;
     header.magic = ESPNOW_MAGIC;
     header.msg_len = msg_len;
-    #if MICROPY_ESPNOW_RSSI
+    #if MICROPY_PY_ESPNOW_RSSI
     header.rssi = recv_info->rx_ctrl->rssi;
     header.time_ms = mp_hal_ticks_ms();
-    #endif // MICROPY_ESPNOW_RSSI
+    #endif // MICROPY_PY_ESPNOW_RSSI
 
     ringbuf_put_bytes(buf, (uint8_t *)&header, sizeof(header));
     ringbuf_put_bytes(buf, recv_info->src_addr, ESP_NOW_ETH_ALEN);
@@ -710,7 +713,7 @@ STATIC mp_obj_t espnow_get_peers(mp_obj_t _) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(espnow_get_peers_obj, espnow_get_peers);
 
-#if MICROPY_ESPNOW_EXTRA_PEER_METHODS
+#if MICROPY_PY_ESPNOW_EXTRA_PEER_METHODS
 // ESPNow.get_peer(peer_mac): Get the peer info for peer_mac as a tuple.
 // Raise OSError if ESPNow.init() has not been called.
 // Raise ValueError if mac or LMK are not bytes-like objects or wrong length.
@@ -777,11 +780,11 @@ STATIC const mp_rom_map_elem_t esp_espnow_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_add_peer), MP_ROM_PTR(&espnow_add_peer_obj) },
     { MP_ROM_QSTR(MP_QSTR_del_peer), MP_ROM_PTR(&espnow_del_peer_obj) },
     { MP_ROM_QSTR(MP_QSTR_get_peers), MP_ROM_PTR(&espnow_get_peers_obj) },
-    #if MICROPY_ESPNOW_EXTRA_PEER_METHODS
+    #if MICROPY_PY_ESPNOW_EXTRA_PEER_METHODS
     { MP_ROM_QSTR(MP_QSTR_mod_peer), MP_ROM_PTR(&espnow_mod_peer_obj) },
     { MP_ROM_QSTR(MP_QSTR_get_peer), MP_ROM_PTR(&espnow_get_peer_obj) },
     { MP_ROM_QSTR(MP_QSTR_peer_count), MP_ROM_PTR(&espnow_peer_count_obj) },
-    #endif // MICROPY_ESPNOW_EXTRA_PEER_METHODS
+    #endif // MICROPY_PY_ESPNOW_EXTRA_PEER_METHODS
 };
 STATIC MP_DEFINE_CONST_DICT(esp_espnow_locals_dict, esp_espnow_locals_dict_table);
 
@@ -819,7 +822,7 @@ STATIC const mp_stream_p_t espnow_stream_p = {
     .ioctl = espnow_stream_ioctl,
 };
 
-#if MICROPY_ESPNOW_RSSI
+#if MICROPY_PY_ESPNOW_RSSI
 // Return reference to the dictionary of peers we have seen:
 //   {peer1: (rssi, time_sec), peer2: (rssi, time_msec), ...}
 // where:
@@ -838,16 +841,16 @@ STATIC void espnow_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) {
     }
     dest[1] = MP_OBJ_SENTINEL;  // Attribute not found
 }
-#endif // MICROPY_ESPNOW_RSSI
+#endif // MICROPY_PY_ESPNOW_RSSI
 
 MP_DEFINE_CONST_OBJ_TYPE(
     esp_espnow_type,
     MP_QSTR_ESPNowBase,
     MP_TYPE_FLAG_NONE,
     make_new, espnow_make_new,
-    #if MICROPY_ESPNOW_RSSI
+    #if MICROPY_PY_ESPNOW_RSSI
     attr, espnow_attr,
-    #endif // MICROPY_ESPNOW_RSSI
+    #endif // MICROPY_PY_ESPNOW_RSSI
     protocol, &espnow_stream_p,
     locals_dict, &esp_espnow_locals_dict
     );
@@ -859,3 +862,5 @@ const mp_obj_module_t mp_module_espnow = {
 
 MP_REGISTER_MODULE(MP_QSTR__espnow, mp_module_espnow);
 MP_REGISTER_ROOT_POINTER(struct _esp_espnow_obj_t *espnow_singleton);
+
+#endif // MICROPY_PY_ESPNOW
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index da26a78ae7..04a745262d 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -72,8 +72,8 @@
 #define MICROPY_GC_SPLIT_HEAP_AUTO          (1)
 
 // extended modules
-#ifndef MICROPY_ESPNOW
-#define MICROPY_ESPNOW                      (1)
+#ifndef MICROPY_PY_ESPNOW
+#define MICROPY_PY_ESPNOW                   (1)
 #endif
 #ifndef MICROPY_PY_BLUETOOTH
 #define MICROPY_PY_BLUETOOTH                (1)
diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index e4c907c57a..75b4076338 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -78,8 +78,8 @@ LD_FILES ?= boards/esp8266_2m.ld
 LDFLAGS += -nostdlib -T $(LD_FILES) -Map=$(@:.elf=.map) --cref
 LIBS += -L$(ESP_SDK)/lib -lmain -ljson -llwip_open -lpp -lnet80211 -lwpa -lphy -lnet80211
 
-ifeq ($(MICROPY_ESPNOW),1)
-CFLAGS += -DMICROPY_ESPNOW=1
+ifeq ($(MICROPY_PY_ESPNOW),1)
+CFLAGS += -DMICROPY_PY_ESPNOW=1
 LIBS += -lespnow
 endif
 
@@ -126,7 +126,7 @@ SRC_C = \
 	hspi.c \
 	$(wildcard $(BOARD_DIR)/*.c) \
 
-ifeq ($(MICROPY_ESPNOW),1)
+ifeq ($(MICROPY_PY_ESPNOW),1)
 SRC_C += \
 	modespnow.c
 endif
diff --git a/ports/esp8266/boards/ESP8266_GENERIC/mpconfigboard.mk b/ports/esp8266/boards/ESP8266_GENERIC/mpconfigboard.mk
index 2eb78d7e85..69dbeb5fb9 100644
--- a/ports/esp8266/boards/ESP8266_GENERIC/mpconfigboard.mk
+++ b/ports/esp8266/boards/ESP8266_GENERIC/mpconfigboard.mk
@@ -1,7 +1,7 @@
 ifeq ($(BOARD_VARIANT),)
 LD_FILES = boards/esp8266_2MiB.ld
 
-MICROPY_ESPNOW ?= 1
+MICROPY_PY_ESPNOW ?= 1
 MICROPY_PY_BTREE ?= 1
 MICROPY_VFS_FAT ?= 1
 MICROPY_VFS_LFS2 ?= 1
@@ -16,7 +16,7 @@ endif
 ifeq ($(BOARD_VARIANT),FLASH_1M)
 LD_FILES = boards/esp8266_1MiB.ld
 
-MICROPY_ESPNOW ?= 1
+MICROPY_PY_ESPNOW ?= 1
 MICROPY_PY_BTREE ?= 1
 MICROPY_VFS_LFS2 ?= 1
 
@@ -29,7 +29,7 @@ endif
 ifeq ($(BOARD_VARIANT),OTA)
 LD_FILES = boards/esp8266_ota.ld
 
-MICROPY_ESPNOW ?= 1
+MICROPY_PY_ESPNOW ?= 1
 MICROPY_PY_BTREE ?= 1
 MICROPY_VFS_LFS2 ?= 1
 
diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c
index 3083fe364e..11ac5b63f5 100644
--- a/ports/esp8266/main.c
+++ b/ports/esp8266/main.c
@@ -45,7 +45,7 @@
 #include "gccollect.h"
 #include "user_interface.h"
 
-#if MICROPY_ESPNOW
+#if MICROPY_PY_ESPNOW
 #include "modespnow.h"
 #endif
 
@@ -77,7 +77,7 @@ STATIC void mp_reset(void) {
         mp_os_dupterm_obj.fun.var(2, args);
     }
 
-    #if MICROPY_ESPNOW
+    #if MICROPY_PY_ESPNOW
     espnow_deinit(mp_const_none);
     #endif
 
diff --git a/ports/esp8266/modespnow.c b/ports/esp8266/modespnow.c
index 1f89204676..9aa5fdf9d8 100644
--- a/ports/esp8266/modespnow.c
+++ b/ports/esp8266/modespnow.c
@@ -33,7 +33,7 @@
 
 #include "py/runtime.h"
 
-#if MICROPY_ESPNOW
+#if MICROPY_PY_ESPNOW
 
 #include "c_types.h"
 #include "espnow.h"

From d2a9d70c0977f02b4d52fa5e6d31f17c2a7aa313 Mon Sep 17 00:00:00 2001
From: Andrew Leech <andrew.leech@planetinnovation.com.au>
Date: Wed, 11 Oct 2023 08:13:53 +1100
Subject: [PATCH 006/310] tools/ci.sh: Ensure enough commits are fetched for a
 common ancestor.

This commit updates the ci script to automatically fetch all upstream if
the common commit hasn't been found; this should preserve the speed of CI
checks for most PR's, and use a reliable but slow fetch if needed for older
ones.

Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
---
 tools/ci.sh | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tools/ci.sh b/tools/ci.sh
index efa492bd19..975ce86172 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -44,7 +44,9 @@ function ci_code_spell_run {
 
 function ci_commit_formatting_run {
     git remote add upstream https://github.com/micropython/micropython.git
-    git fetch --depth=100 upstream  master
+    git fetch --depth=100 upstream master
+    # If the common ancestor commit hasn't been found, fetch more.
+    git merge-base upstream/master HEAD || git fetch --unshallow upstream master
     # For a PR, upstream/master..HEAD ends with a merge commit into master, exclude that one.
     tools/verifygitlog.py -v upstream/master..HEAD --no-merges
 }
@@ -68,6 +70,8 @@ function ci_code_size_build {
     git checkout -b pull_request # save the current location
     git remote add upstream https://github.com/micropython/micropython.git
     git fetch --depth=100 upstream master
+    # If the common ancestor commit hasn't been found, fetch more.
+    git merge-base upstream/master HEAD || git fetch --unshallow upstream master
     # build reference, save to size0
     # ignore any errors with this build, in case master is failing
     git checkout `git merge-base --fork-point upstream/master pull_request`

From 480659b1ac758c377568c93c0ccda6a232f744ca Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Wed, 11 Oct 2023 09:55:14 +0200
Subject: [PATCH 007/310] ports: Make all ports skip execution of main.py if
 boot.py fails.

That can be caused e.g. by an exception.  This feature is implemented in
some way already for the stm32, renesas-ra, mimxrt and samd ports.  This
commit adds it for the rp2, esp8266, esp32 and nrf ports.  No change for
the cc3200 and teensy ports.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/esp32/main.c   | 7 +++++--
 ports/esp8266/main.c | 4 ++--
 ports/nrf/main.c     | 6 ++++--
 ports/rp2/main.c     | 2 +-
 4 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/ports/esp32/main.c b/ports/esp32/main.c
index b514f44e01..044b43655c 100644
--- a/ports/esp32/main.c
+++ b/ports/esp32/main.c
@@ -124,8 +124,11 @@ soft_reset:
 
     // run boot-up scripts
     pyexec_frozen_module("_boot.py", false);
-    pyexec_file_if_exists("boot.py");
-    if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL) {
+    int ret = pyexec_file_if_exists("boot.py");
+    if (ret & PYEXEC_FORCED_EXIT) {
+        goto soft_reset_exit;
+    }
+    if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL && ret != 0) {
         int ret = pyexec_file_if_exists("main.py");
         if (ret & PYEXEC_FORCED_EXIT) {
             goto soft_reset_exit;
diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c
index 11ac5b63f5..7c940ac2a0 100644
--- a/ports/esp8266/main.c
+++ b/ports/esp8266/main.c
@@ -83,8 +83,8 @@ STATIC void mp_reset(void) {
 
     #if MICROPY_MODULE_FROZEN
     pyexec_frozen_module("_boot.py", false);
-    pyexec_file_if_exists("boot.py");
-    if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL) {
+    int ret = pyexec_file_if_exists("boot.py");
+    if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL && ret != 0) {
         pyexec_file_if_exists("main.py");
     }
     #endif
diff --git a/ports/nrf/main.c b/ports/nrf/main.c
index 7f35c7f1b3..650a47e161 100644
--- a/ports/nrf/main.c
+++ b/ports/nrf/main.c
@@ -263,8 +263,10 @@ soft_reset:
 
     #if MICROPY_VFS || MICROPY_MBFS || MICROPY_MODULE_FROZEN
     // run boot.py and main.py if they exist.
-    pyexec_file_if_exists("boot.py");
-    pyexec_file_if_exists("main.py");
+    ret = pyexec_file_if_exists("boot.py");
+    if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL && ret != 0) {
+        pyexec_file_if_exists("main.py");
+    }
     #endif
 
     for (;;) {
diff --git a/ports/rp2/main.c b/ports/rp2/main.c
index 72b243a598..682ea14476 100644
--- a/ports/rp2/main.c
+++ b/ports/rp2/main.c
@@ -179,7 +179,7 @@ int main(int argc, char **argv) {
         if (ret & PYEXEC_FORCED_EXIT) {
             goto soft_reset_exit;
         }
-        if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL) {
+        if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL && ret != 0) {
             ret = pyexec_file_if_exists("main.py");
             if (ret & PYEXEC_FORCED_EXIT) {
                 goto soft_reset_exit;

From 5015779a6f4a180233a78ec8b5fd1ea095057a91 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 27 Sep 2023 13:43:50 +1000
Subject: [PATCH 008/310] py/builtinevex: Handle invalid filenames for
 execfile.

If a non-string buffer was passed to execfile, then it would be passed
as a non-null-terminated char* to mp_lexer_new_from_file.

This changes mp_lexer_new_from_file to take a qstr instead (as in almost
all cases a qstr will be created from this input anyway to set the
`__file__` attribute on the module).

This now makes execfile require a string (not generic buffer) argument,
which is probably a good fix to make anyway.

Fixes issue #12522.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 extmod/vfs_reader.c                       |  4 ++--
 mpy-cross/main.c                          |  4 ++--
 ports/esp8266/main.c                      |  2 +-
 ports/minimal/main.c                      |  2 +-
 ports/nrf/main.c                          |  6 +++---
 ports/pic16bit/main.c                     |  2 +-
 ports/powerpc/main.c                      |  2 +-
 ports/qemu-arm/main.c                     |  2 +-
 ports/qemu-arm/test_main.c                |  2 +-
 ports/teensy/lexerfrozen.c                |  2 +-
 ports/unix/main.c                         |  3 ++-
 ports/webassembly/main.c                  |  2 +-
 ports/zephyr/main.c                       |  2 +-
 py/builtinevex.c                          |  9 +++++----
 py/builtinimport.c                        | 23 +++++++++++++++--------
 py/lexer.c                                |  4 ++--
 py/lexer.h                                |  2 +-
 py/persistentcode.c                       |  8 ++++----
 py/persistentcode.h                       |  4 ++--
 py/reader.c                               |  6 +++---
 py/reader.h                               |  2 +-
 shared/memzip/lexermemzip.c               |  6 +++---
 shared/runtime/pyexec.c                   |  2 +-
 tests/micropython/builtin_execfile.py     |  6 ++++++
 tests/micropython/builtin_execfile.py.exp |  1 +
 25 files changed, 62 insertions(+), 46 deletions(-)

diff --git a/extmod/vfs_reader.c b/extmod/vfs_reader.c
index d3904c5c50..3c6ff52a99 100644
--- a/extmod/vfs_reader.c
+++ b/extmod/vfs_reader.c
@@ -69,10 +69,10 @@ STATIC void mp_reader_vfs_close(void *data) {
     m_del_obj(mp_reader_vfs_t, reader);
 }
 
-void mp_reader_new_file(mp_reader_t *reader, const char *filename) {
+void mp_reader_new_file(mp_reader_t *reader, qstr filename) {
     mp_reader_vfs_t *rf = m_new_obj(mp_reader_vfs_t);
     mp_obj_t args[2] = {
-        mp_obj_new_str(filename, strlen(filename)),
+        MP_OBJ_NEW_QSTR(filename),
         MP_OBJ_NEW_QSTR(MP_QSTR_rb),
     };
     rf->file = mp_vfs_open(MP_ARRAY_SIZE(args), &args[0], (mp_map_t *)&mp_const_empty_map);
diff --git a/mpy-cross/main.c b/mpy-cross/main.c
index 3ef77d436f..f05aef5dd8 100644
--- a/mpy-cross/main.c
+++ b/mpy-cross/main.c
@@ -71,7 +71,7 @@ STATIC int compile_and_save(const char *file, const char *output_file, const cha
         if (strcmp(file, "-") == 0) {
             lex = mp_lexer_new_from_fd(MP_QSTR__lt_stdin_gt_, STDIN_FILENO, false);
         } else {
-            lex = mp_lexer_new_from_file(file);
+            lex = mp_lexer_new_from_file(qstr_from_str(file));
         }
 
         qstr source_name;
@@ -104,7 +104,7 @@ STATIC int compile_and_save(const char *file, const char *output_file, const cha
                 vstr_add_str(&vstr, output_file);
             }
 
-            mp_raw_code_save_file(&cm, vstr_null_terminated_str(&vstr));
+            mp_raw_code_save_file(&cm, qstr_from_strn(vstr.buf, vstr.len));
             vstr_clear(&vstr);
         }
 
diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c
index 7c940ac2a0..87e72bace9 100644
--- a/ports/esp8266/main.c
+++ b/ports/esp8266/main.c
@@ -141,7 +141,7 @@ void user_init(void) {
 }
 
 #if !MICROPY_VFS
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
 
diff --git a/ports/minimal/main.c b/ports/minimal/main.c
index 4990997531..5f472c1afd 100644
--- a/ports/minimal/main.c
+++ b/ports/minimal/main.c
@@ -73,7 +73,7 @@ void gc_collect(void) {
 }
 #endif
 
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
 
diff --git a/ports/nrf/main.c b/ports/nrf/main.c
index 650a47e161..cd22521f4a 100644
--- a/ports/nrf/main.c
+++ b/ports/nrf/main.c
@@ -302,8 +302,8 @@ soft_reset:
 #if !MICROPY_VFS
 #if MICROPY_MBFS
 // Use micro:bit filesystem
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
-    return os_mbfs_new_reader(filename);
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
+    return os_mbfs_new_reader(qstr_str(filename));
 }
 
 mp_import_stat_t mp_import_stat(const char *path) {
@@ -317,7 +317,7 @@ MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open);
 
 #else
 // use dummy functions - no filesystem available
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
 
diff --git a/ports/pic16bit/main.c b/ports/pic16bit/main.c
index e6481bafb6..b1fe7321f0 100644
--- a/ports/pic16bit/main.c
+++ b/ports/pic16bit/main.c
@@ -102,7 +102,7 @@ void gc_collect(void) {
     gc_collect_end();
 }
 
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
 
diff --git a/ports/powerpc/main.c b/ports/powerpc/main.c
index f3abc64aa7..4b668c861c 100644
--- a/ports/powerpc/main.c
+++ b/ports/powerpc/main.c
@@ -111,7 +111,7 @@ void gc_collect(void) {
     gc_dump_info(&mp_plat_print);
 }
 
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
 
diff --git a/ports/qemu-arm/main.c b/ports/qemu-arm/main.c
index 45da65f2a4..f57c03fb9e 100644
--- a/ports/qemu-arm/main.c
+++ b/ports/qemu-arm/main.c
@@ -41,7 +41,7 @@ int main(int argc, char **argv) {
 void gc_collect(void) {
 }
 
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
 
diff --git a/ports/qemu-arm/test_main.c b/ports/qemu-arm/test_main.c
index 673311d1e5..bd0a9918da 100644
--- a/ports/qemu-arm/test_main.c
+++ b/ports/qemu-arm/test_main.c
@@ -34,7 +34,7 @@ void gc_collect(void) {
     gc_collect_end();
 }
 
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
 
diff --git a/ports/teensy/lexerfrozen.c b/ports/teensy/lexerfrozen.c
index 672a0ce08b..59ccdabf09 100644
--- a/ports/teensy/lexerfrozen.c
+++ b/ports/teensy/lexerfrozen.c
@@ -9,6 +9,6 @@ mp_import_stat_t mp_import_stat(const char *path) {
     return MP_IMPORT_STAT_NO_EXIST;
 }
 
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
diff --git a/ports/unix/main.c b/ports/unix/main.c
index 47973df8df..468fc40964 100644
--- a/ports/unix/main.c
+++ b/ports/unix/main.c
@@ -129,7 +129,8 @@ STATIC int execute_from_lexer(int source_kind, const void *source, mp_parse_inpu
             const vstr_t *vstr = source;
             lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, vstr->buf, vstr->len, false);
         } else if (source_kind == LEX_SRC_FILENAME) {
-            lex = mp_lexer_new_from_file((const char *)source);
+            const char *filename = (const char *)source;
+            lex = mp_lexer_new_from_file(qstr_from_str(filename));
         } else { // LEX_SRC_STDIN
             lex = mp_lexer_new_from_fd(MP_QSTR__lt_stdin_gt_, 0, false);
         }
diff --git a/ports/webassembly/main.c b/ports/webassembly/main.c
index e627328260..c3cb8c1974 100644
--- a/ports/webassembly/main.c
+++ b/ports/webassembly/main.c
@@ -124,7 +124,7 @@ void gc_collect(void) {
 }
 
 #if !MICROPY_VFS
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(MP_ENOENT);
 }
 
diff --git a/ports/zephyr/main.c b/ports/zephyr/main.c
index a2dfb16602..36bc628bbe 100644
--- a/ports/zephyr/main.c
+++ b/ports/zephyr/main.c
@@ -189,7 +189,7 @@ void gc_collect(void) {
 }
 
 #if !MICROPY_READER_VFS
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_raise_OSError(ENOENT);
 }
 #endif
diff --git a/py/builtinevex.c b/py/builtinevex.c
index 97eab7fad9..73fca5d39b 100644
--- a/py/builtinevex.c
+++ b/py/builtinevex.c
@@ -136,17 +136,18 @@ STATIC mp_obj_t eval_exec_helper(size_t n_args, const mp_obj_t *args, mp_parse_i
     }
     #endif
 
-    // Extract the source code.
-    mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args[0], &bufinfo, MP_BUFFER_READ);
 
     // create the lexer
     // MP_PARSE_SINGLE_INPUT is used to indicate a file input
     mp_lexer_t *lex;
     if (MICROPY_PY_BUILTINS_EXECFILE && parse_input_kind == MP_PARSE_SINGLE_INPUT) {
-        lex = mp_lexer_new_from_file(bufinfo.buf);
+        lex = mp_lexer_new_from_file(mp_obj_str_get_qstr(args[0]));
         parse_input_kind = MP_PARSE_FILE_INPUT;
     } else {
+        // Extract the source code.
+        mp_buffer_info_t bufinfo;
+        mp_get_buffer_raise(args[0], &bufinfo, MP_BUFFER_READ);
+
         lex = mp_lexer_new_from_str_len(MP_QSTR__lt_string_gt_, bufinfo.buf, bufinfo.len, 0);
     }
 
diff --git a/py/builtinimport.c b/py/builtinimport.c
index d4cd254fd6..009885498c 100644
--- a/py/builtinimport.c
+++ b/py/builtinimport.c
@@ -164,11 +164,11 @@ STATIC void do_load_from_lexer(mp_module_context_t *context, mp_lexer_t *lex) {
 #endif
 
 #if (MICROPY_HAS_FILE_READER && MICROPY_PERSISTENT_CODE_LOAD) || MICROPY_MODULE_FROZEN_MPY
-STATIC void do_execute_raw_code(const mp_module_context_t *context, const mp_raw_code_t *rc, const char *source_name) {
-    (void)source_name;
-
+STATIC void do_execute_raw_code(const mp_module_context_t *context, const mp_raw_code_t *rc, qstr source_name) {
     #if MICROPY_PY___FILE__
-    mp_store_attr(MP_OBJ_FROM_PTR(&context->module), MP_QSTR___file__, MP_OBJ_NEW_QSTR(qstr_from_str(source_name)));
+    mp_store_attr(MP_OBJ_FROM_PTR(&context->module), MP_QSTR___file__, MP_OBJ_NEW_QSTR(source_name));
+    #else
+    (void)source_name;
     #endif
 
     // execute the module in its context
@@ -224,7 +224,12 @@ STATIC void do_load(mp_module_context_t *module_obj, vstr_t *file) {
         if (frozen_type == MP_FROZEN_MPY) {
             const mp_frozen_module_t *frozen = modref;
             module_obj->constants = frozen->constants;
-            do_execute_raw_code(module_obj, frozen->rc, file_str + frozen_path_prefix_len);
+            #if MICROPY_PY___FILE__
+            qstr frozen_file_qstr = qstr_from_str(file_str + frozen_path_prefix_len);
+            #else
+            qstr frozen_file_qstr = MP_QSTRnull;
+            #endif
+            do_execute_raw_code(module_obj, frozen->rc, frozen_file_qstr);
             return;
         }
         #endif
@@ -232,14 +237,16 @@ STATIC void do_load(mp_module_context_t *module_obj, vstr_t *file) {
 
     #endif // MICROPY_MODULE_FROZEN
 
+    qstr file_qstr = qstr_from_str(file_str);
+
     // If we support loading .mpy files then check if the file extension is of
     // the correct format and, if so, load and execute the file.
     #if MICROPY_HAS_FILE_READER && MICROPY_PERSISTENT_CODE_LOAD
     if (file_str[file->len - 3] == 'm') {
         mp_compiled_module_t cm;
         cm.context = module_obj;
-        mp_raw_code_load_file(file_str, &cm);
-        do_execute_raw_code(cm.context, cm.rc, file_str);
+        mp_raw_code_load_file(file_qstr, &cm);
+        do_execute_raw_code(cm.context, cm.rc, file_qstr);
         return;
     }
     #endif
@@ -247,7 +254,7 @@ STATIC void do_load(mp_module_context_t *module_obj, vstr_t *file) {
     // If we can compile scripts then load the file and compile and execute it.
     #if MICROPY_ENABLE_COMPILER
     {
-        mp_lexer_t *lex = mp_lexer_new_from_file(file_str);
+        mp_lexer_t *lex = mp_lexer_new_from_file(file_qstr);
         do_load_from_lexer(module_obj, lex);
         return;
     }
diff --git a/py/lexer.c b/py/lexer.c
index 6b28f22152..9587f6b164 100644
--- a/py/lexer.c
+++ b/py/lexer.c
@@ -879,10 +879,10 @@ mp_lexer_t *mp_lexer_new_from_str_len(qstr src_name, const char *str, size_t len
 
 #if MICROPY_READER_POSIX || MICROPY_READER_VFS
 
-mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
     mp_reader_t reader;
     mp_reader_new_file(&reader, filename);
-    return mp_lexer_new(qstr_from_str(filename), reader);
+    return mp_lexer_new(filename, reader);
 }
 
 #if MICROPY_HELPER_LEXER_UNIX
diff --git a/py/lexer.h b/py/lexer.h
index 8295dec0f7..2d9d0447b8 100644
--- a/py/lexer.h
+++ b/py/lexer.h
@@ -191,7 +191,7 @@ mp_lexer_t *mp_lexer_new_from_str_len(qstr src_name, const char *str, size_t len
 
 // If MICROPY_READER_POSIX or MICROPY_READER_VFS aren't enabled then
 // this function must be implemented by the port.
-mp_lexer_t *mp_lexer_new_from_file(const char *filename);
+mp_lexer_t *mp_lexer_new_from_file(qstr filename);
 
 #if MICROPY_HELPER_LEXER_UNIX
 mp_lexer_t *mp_lexer_new_from_fd(qstr filename, int fd, bool close_fd);
diff --git a/py/persistentcode.c b/py/persistentcode.c
index e1218e0b8a..0feb93bdbe 100644
--- a/py/persistentcode.c
+++ b/py/persistentcode.c
@@ -451,7 +451,7 @@ void mp_raw_code_load_mem(const byte *buf, size_t len, mp_compiled_module_t *con
 
 #if MICROPY_HAS_FILE_READER
 
-void mp_raw_code_load_file(const char *filename, mp_compiled_module_t *context) {
+void mp_raw_code_load_file(qstr filename, mp_compiled_module_t *context) {
     mp_reader_t reader;
     mp_reader_new_file(&reader, filename);
     mp_raw_code_load(&reader, context);
@@ -638,12 +638,12 @@ STATIC void fd_print_strn(void *env, const char *str, size_t len) {
     (void)ret;
 }
 
-void mp_raw_code_save_file(mp_compiled_module_t *cm, const char *filename) {
+void mp_raw_code_save_file(mp_compiled_module_t *cm, qstr filename) {
     MP_THREAD_GIL_EXIT();
-    int fd = open(filename, O_WRONLY | O_CREAT | O_TRUNC, 0644);
+    int fd = open(qstr_str(filename), O_WRONLY | O_CREAT | O_TRUNC, 0644);
     MP_THREAD_GIL_ENTER();
     if (fd < 0) {
-        mp_raise_OSError_with_filename(errno, filename);
+        mp_raise_OSError_with_filename(errno, qstr_str(filename));
     }
     mp_print_t fd_print = {(void *)(intptr_t)fd, fd_print_strn};
     mp_raw_code_save(cm, &fd_print);
diff --git a/py/persistentcode.h b/py/persistentcode.h
index d363f544ad..140a0e7e80 100644
--- a/py/persistentcode.h
+++ b/py/persistentcode.h
@@ -113,10 +113,10 @@ enum {
 
 void mp_raw_code_load(mp_reader_t *reader, mp_compiled_module_t *ctx);
 void mp_raw_code_load_mem(const byte *buf, size_t len, mp_compiled_module_t *ctx);
-void mp_raw_code_load_file(const char *filename, mp_compiled_module_t *ctx);
+void mp_raw_code_load_file(qstr filename, mp_compiled_module_t *ctx);
 
 void mp_raw_code_save(mp_compiled_module_t *cm, mp_print_t *print);
-void mp_raw_code_save_file(mp_compiled_module_t *cm, const char *filename);
+void mp_raw_code_save_file(mp_compiled_module_t *cm, qstr filename);
 
 void mp_native_relocate(void *reloc, uint8_t *text, uintptr_t reloc_text);
 
diff --git a/py/reader.c b/py/reader.c
index 57b12b3b65..d2af62cfb3 100644
--- a/py/reader.c
+++ b/py/reader.c
@@ -134,12 +134,12 @@ void mp_reader_new_file_from_fd(mp_reader_t *reader, int fd, bool close_fd) {
 
 #if !MICROPY_VFS_POSIX
 // If MICROPY_VFS_POSIX is defined then this function is provided by the VFS layer
-void mp_reader_new_file(mp_reader_t *reader, const char *filename) {
+void mp_reader_new_file(mp_reader_t *reader, qstr filename) {
     MP_THREAD_GIL_EXIT();
-    int fd = open(filename, O_RDONLY, 0644);
+    int fd = open(qstr_str(filename), O_RDONLY, 0644);
     MP_THREAD_GIL_ENTER();
     if (fd < 0) {
-        mp_raise_OSError_with_filename(errno, filename);
+        mp_raise_OSError_with_filename(errno, qstr_str(filename));
     }
     mp_reader_new_file_from_fd(reader, fd, true);
 }
diff --git a/py/reader.h b/py/reader.h
index 8511c72ce5..5cb1e67966 100644
--- a/py/reader.h
+++ b/py/reader.h
@@ -40,7 +40,7 @@ typedef struct _mp_reader_t {
 } mp_reader_t;
 
 void mp_reader_new_mem(mp_reader_t *reader, const byte *buf, size_t len, size_t free_len);
-void mp_reader_new_file(mp_reader_t *reader, const char *filename);
+void mp_reader_new_file(mp_reader_t *reader, qstr filename);
 void mp_reader_new_file_from_fd(mp_reader_t *reader, int fd, bool close_fd);
 
 #endif // MICROPY_INCLUDED_PY_READER_H
diff --git a/shared/memzip/lexermemzip.c b/shared/memzip/lexermemzip.c
index 6b26961bdc..1915a04c01 100644
--- a/shared/memzip/lexermemzip.c
+++ b/shared/memzip/lexermemzip.c
@@ -5,15 +5,15 @@
 #include "py/mperrno.h"
 #include "memzip.h"
 
-mp_lexer_t *mp_lexer_new_from_file(const char *filename)
+mp_lexer_t *mp_lexer_new_from_file(qstr filename)
 {
     void *data;
     size_t len;
 
-    if (memzip_locate(filename, &data, &len) != MZ_OK) {
+    if (memzip_locate(qstr_str(filename), &data, &len) != MZ_OK) {
         mp_raise_OSError(MP_ENOENT);
     }
 
-    return mp_lexer_new_from_str_len(qstr_from_str(filename), (const char *)data, (mp_uint_t)len, 0);
+    return mp_lexer_new_from_str_len(filename, (const char *)data, (mp_uint_t)len, 0);
 }
 
diff --git a/shared/runtime/pyexec.c b/shared/runtime/pyexec.c
index e32150e5e7..9f6d9a1002 100644
--- a/shared/runtime/pyexec.c
+++ b/shared/runtime/pyexec.c
@@ -100,7 +100,7 @@ STATIC int parse_compile_execute(const void *source, mp_parse_input_kind_t input
             } else if (exec_flags & EXEC_FLAG_SOURCE_IS_READER) {
                 lex = mp_lexer_new(MP_QSTR__lt_stdin_gt_, *(mp_reader_t *)source);
             } else if (exec_flags & EXEC_FLAG_SOURCE_IS_FILENAME) {
-                lex = mp_lexer_new_from_file(source);
+                lex = mp_lexer_new_from_file(qstr_from_str(source));
             } else {
                 lex = (mp_lexer_t *)source;
             }
diff --git a/tests/micropython/builtin_execfile.py b/tests/micropython/builtin_execfile.py
index 5a26ccf0ad..9b6d6a0aa0 100644
--- a/tests/micropython/builtin_execfile.py
+++ b/tests/micropython/builtin_execfile.py
@@ -70,5 +70,11 @@ except OSError:
 # Test execfile with a file that does exist.
 execfile("/test_mnt/test.py")
 
+# Test that it only works with string arguments.
+try:
+    execfile(b"aaa")
+except TypeError:
+    print("TypeError")
+
 # Unmount the VFS object.
 os.umount(fs)
diff --git a/tests/micropython/builtin_execfile.py.exp b/tests/micropython/builtin_execfile.py.exp
index 1d5d8ee571..49703d5707 100644
--- a/tests/micropython/builtin_execfile.py.exp
+++ b/tests/micropython/builtin_execfile.py.exp
@@ -3,4 +3,5 @@ open /noexist.py rb
 OSError
 open /test.py rb
 123
+TypeError
 umount

From 05cb1406ad1b421a238faf763e19f4119f5f6bb2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 12 Oct 2023 15:45:40 +1100
Subject: [PATCH 009/310] extmod/moductypes: Validate that uctypes.struct addr
 argument is an int.

Fixes issue #12660.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/moductypes.c               | 2 +-
 tests/extmod/uctypes_error.py     | 6 ++++++
 tests/extmod/uctypes_error.py.exp | 1 +
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/extmod/moductypes.c b/extmod/moductypes.c
index 63be621fbc..f56567107d 100644
--- a/extmod/moductypes.c
+++ b/extmod/moductypes.c
@@ -96,7 +96,7 @@ STATIC NORETURN void syntax_error(void) {
 STATIC mp_obj_t uctypes_struct_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 2, 3, false);
     mp_obj_uctypes_struct_t *o = mp_obj_malloc(mp_obj_uctypes_struct_t, type);
-    o->addr = (void *)(uintptr_t)mp_obj_int_get_truncated(args[0]);
+    o->addr = (void *)(uintptr_t)mp_obj_get_int_truncated(args[0]);
     o->desc = args[1];
     o->flags = LAYOUT_NATIVE;
     if (n_args == 3) {
diff --git a/tests/extmod/uctypes_error.py b/tests/extmod/uctypes_error.py
index d429562615..f8aea94a7f 100644
--- a/tests/extmod/uctypes_error.py
+++ b/tests/extmod/uctypes_error.py
@@ -8,6 +8,12 @@ except ImportError:
 
 data = bytearray(b"01234567")
 
+# first argument isn't an integer
+try:
+    uctypes.struct(data, {})
+except TypeError:
+    print("TypeError")
+
 # del subscr not supported
 S = uctypes.struct(uctypes.addressof(data), {})
 try:
diff --git a/tests/extmod/uctypes_error.py.exp b/tests/extmod/uctypes_error.py.exp
index f2e9c12f7f..9910ced6c6 100644
--- a/tests/extmod/uctypes_error.py.exp
+++ b/tests/extmod/uctypes_error.py.exp
@@ -3,3 +3,4 @@ TypeError
 TypeError
 TypeError
 TypeError
+TypeError

From 5f0bd33b732151bb7aa896307afae55400b15454 Mon Sep 17 00:00:00 2001
From: Matthias Urlichs <matthias@urlichs.de>
Date: Fri, 6 Oct 2023 21:03:24 +0200
Subject: [PATCH 010/310] extmod/asyncio: Emit errors to stderr, not stdout.

Sometimes these are different file descriptors, not to mention the Unix
port, so use stderr to distinguish these error messages.

CPython prints to stdout, but it does it via a call to the logging module.
We don't want to introduce a dependency on logging, so printing to stderr
is a good alternative.  One can override default_exception_handler() if
needed.
---
 extmod/asyncio/core.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/extmod/asyncio/core.py b/extmod/asyncio/core.py
index be5119ba61..214cc52f45 100644
--- a/extmod/asyncio/core.py
+++ b/extmod/asyncio/core.py
@@ -272,9 +272,9 @@ class Loop:
         return Loop._exc_handler
 
     def default_exception_handler(loop, context):
-        print(context["message"])
-        print("future:", context["future"], "coro=", context["future"].coro)
-        sys.print_exception(context["exception"])
+        print(context["message"], file=sys.stderr)
+        print("future:", context["future"], "coro=", context["future"].coro, file=sys.stderr)
+        sys.print_exception(context["exception"], sys.stderr)
 
     def call_exception_handler(context):
         (Loop._exc_handler or Loop.default_exception_handler)(Loop, context)

From 4f5e165d0bf9ba338df3cdab4266556c4c5a70c7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Mon, 7 Dec 2020 13:33:13 +0100
Subject: [PATCH 011/310] py/objboundmeth: Support comparing and hashing bound
 methods.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This behaviour matches CPython.  It's useful to be able to store bound
method objects in dicts/sets, and compare for equality, eg when storing
them in a list and using list.remove().

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 py/obj.h          |  1 +
 py/objboundmeth.c | 25 +++++++++++++++++++++++--
 2 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/py/obj.h b/py/obj.h
index de4c15b22c..3c2176832d 100644
--- a/py/obj.h
+++ b/py/obj.h
@@ -828,6 +828,7 @@ extern const mp_obj_type_t mp_type_fun_bc;
 extern const mp_obj_type_t mp_type_module;
 extern const mp_obj_type_t mp_type_staticmethod;
 extern const mp_obj_type_t mp_type_classmethod;
+extern const mp_obj_type_t mp_type_bound_meth;
 extern const mp_obj_type_t mp_type_property;
 extern const mp_obj_type_t mp_type_stringio;
 extern const mp_obj_type_t mp_type_bytesio;
diff --git a/py/objboundmeth.c b/py/objboundmeth.c
index 8486f876f9..10f52016c5 100644
--- a/py/objboundmeth.c
+++ b/py/objboundmeth.c
@@ -83,6 +83,25 @@ STATIC mp_obj_t bound_meth_call(mp_obj_t self_in, size_t n_args, size_t n_kw, co
     return mp_call_method_self_n_kw(self->meth, self->self, n_args, n_kw, args);
 }
 
+STATIC mp_obj_t bound_meth_unary_op(mp_unary_op_t op, mp_obj_t self_in) {
+    mp_obj_bound_meth_t *self = MP_OBJ_TO_PTR(self_in);
+    switch (op) {
+        case MP_UNARY_OP_HASH:
+            return MP_OBJ_NEW_SMALL_INT((mp_uint_t)self->self ^ (mp_uint_t)self->meth);
+        default:
+            return MP_OBJ_NULL; // op not supported
+    }
+}
+
+STATIC mp_obj_t bound_meth_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in) {
+    if (!mp_obj_is_type(rhs_in, &mp_type_bound_meth) || op != MP_BINARY_OP_EQUAL) {
+        return MP_OBJ_NULL; // op not supported
+    }
+    mp_obj_bound_meth_t *lhs = MP_OBJ_TO_PTR(lhs_in);
+    mp_obj_bound_meth_t *rhs = MP_OBJ_TO_PTR(rhs_in);
+    return mp_obj_new_bool(lhs->self == rhs->self && lhs->meth == rhs->meth);
+}
+
 #if MICROPY_PY_FUNCTION_ATTRS
 STATIC void bound_meth_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) {
     if (dest[0] != MP_OBJ_NULL) {
@@ -107,13 +126,15 @@ STATIC void bound_meth_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) {
 #define BOUND_METH_TYPE_ATTR
 #endif
 
-STATIC MP_DEFINE_CONST_OBJ_TYPE(
+MP_DEFINE_CONST_OBJ_TYPE(
     mp_type_bound_meth,
     MP_QSTR_bound_method,
     MP_TYPE_FLAG_NONE,
     BOUND_METH_TYPE_PRINT
     BOUND_METH_TYPE_ATTR
-    call, bound_meth_call
+    call, bound_meth_call,
+    unary_op, bound_meth_unary_op,
+    binary_op, bound_meth_binary_op
     );
 
 mp_obj_t mp_obj_new_bound_meth(mp_obj_t meth, mp_obj_t self) {

From 66c62353ce35d72d7322740ad88f3c4986f31e64 Mon Sep 17 00:00:00 2001
From: Ned Konz <ned@productcreationstudio.com>
Date: Mon, 9 Oct 2023 10:14:57 -0700
Subject: [PATCH 012/310] tests/basics/boundmeth1.py: Add tests for bound
 method equality/hash.

This commit adds tests for bound method comparison and hashing to support
the changes in the previous commit.

Signed-off-by: Ned Konz <ned@productcreationstudio.com>
---
 tests/basics/boundmeth1.py | 38 +++++++++++++++++++++++++++++++++++++-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/tests/basics/boundmeth1.py b/tests/basics/boundmeth1.py
index f483ba406d..e72153a41a 100644
--- a/tests/basics/boundmeth1.py
+++ b/tests/basics/boundmeth1.py
@@ -3,14 +3,18 @@
 # uPy and CPython differ when printing a bound method, so just print the type
 print(type(repr([].append)))
 
+
 class A:
     def f(self):
         return 0
+
     def g(self, a):
         return a
+
     def h(self, a, b, c, d, e, f):
         return a + b + c + d + e + f
 
+
 # bound method with no extra args
 m = A().f
 print(m())
@@ -27,4 +31,36 @@ print(m(1, 2, 3, 4, 5, 6))
 try:
     A().f.x = 1
 except AttributeError:
-    print('AttributeError')
+    print("AttributeError")
+
+# bound method comparison with same object
+a = A()
+m1 = a.f
+m2 = a.f
+print(m1 == a.f)  # should result in True
+print(m2 == a.f)  # should result in True
+print(m1 == m2)  # should result in True
+print(m1 != a.f)  # should result in False
+
+# bound method comparison with different objects
+a1 = A()
+a2 = A()
+m1 = a1.f
+m2 = a2.f
+print(m1 == a2.f)  # should result in False
+print(m2 == a1.f)  # should result in False
+print(m1 != a2.f)  # should result in True
+
+# bound method hashing
+a = A()
+m1 = a.f
+m2 = a.f
+print(hash(m1) == hash(a.f))  # should result in True
+print(hash(m2) == hash(a.f))  # should result in True
+print(hash(m1) == hash(m2))  # should result in True
+print(hash(m1) != hash(a.g))  # should result in True
+
+# bound method hashing with different objects
+a2 = A()
+m2 = a2.f
+print(hash(m1) == hash(a2.f))  # should result in False

From 516385c4ccbb1f7fa9dbd37a44ed8ae33dcf1942 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 13 Oct 2023 15:27:05 +1100
Subject: [PATCH 013/310] py/objboundmeth: Optimise check for types in
 binary_op.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/objboundmeth.c          |  5 ++++-
 tests/basics/boundmeth1.py | 10 ++++++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/py/objboundmeth.c b/py/objboundmeth.c
index 10f52016c5..b0be810c5c 100644
--- a/py/objboundmeth.c
+++ b/py/objboundmeth.c
@@ -94,7 +94,10 @@ STATIC mp_obj_t bound_meth_unary_op(mp_unary_op_t op, mp_obj_t self_in) {
 }
 
 STATIC mp_obj_t bound_meth_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in) {
-    if (!mp_obj_is_type(rhs_in, &mp_type_bound_meth) || op != MP_BINARY_OP_EQUAL) {
+    // The MP_TYPE_FLAG_EQ_CHECKS_OTHER_TYPE flag is clear for this type, so if this
+    // function is called with MP_BINARY_OP_EQUAL then lhs_in and rhs_in must have the
+    // same type, which is mp_type_bound_meth.
+    if (op != MP_BINARY_OP_EQUAL) {
         return MP_OBJ_NULL; // op not supported
     }
     mp_obj_bound_meth_t *lhs = MP_OBJ_TO_PTR(lhs_in);
diff --git a/tests/basics/boundmeth1.py b/tests/basics/boundmeth1.py
index e72153a41a..fe1b454688 100644
--- a/tests/basics/boundmeth1.py
+++ b/tests/basics/boundmeth1.py
@@ -33,6 +33,8 @@ try:
 except AttributeError:
     print("AttributeError")
 
+print("--------")
+
 # bound method comparison with same object
 a = A()
 m1 = a.f
@@ -51,6 +53,14 @@ print(m1 == a2.f)  # should result in False
 print(m2 == a1.f)  # should result in False
 print(m1 != a2.f)  # should result in True
 
+# bound method comparison with non-bound-method objects
+print(A().f == None)  # should result in False
+print(A().f != None)  # should result in True
+print(None == A().f)  # should result in False
+print(None != A().f)  # should result in True
+
+print("--------")
+
 # bound method hashing
 a = A()
 m1 = a.f

From 9c7ea9b14ac0378f580bd8ed55b22ef311eda20b Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 13 Oct 2023 17:33:29 +1100
Subject: [PATCH 014/310] py/obj: Generalise mp_get_buffer so it can raise if a
 flag is set.

This allows mp_get_buffer_raise() to be changed to a simple inline function
that in the majority of cases costs the same (in code size) to call as the
original mp_get_buffer_raise(), because the flags argument is a constant.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/obj.c | 16 +++++-----------
 py/obj.h | 10 +++++++++-
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/py/obj.c b/py/obj.c
index d013eb3d02..5e01198b6f 100644
--- a/py/obj.c
+++ b/py/obj.c
@@ -577,18 +577,12 @@ MP_DEFINE_CONST_FUN_OBJ_1(mp_identity_obj, mp_identity);
 
 bool mp_get_buffer(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags) {
     const mp_obj_type_t *type = mp_obj_get_type(obj);
-    if (!MP_OBJ_TYPE_HAS_SLOT(type, buffer)) {
-        return false;
+    if (MP_OBJ_TYPE_HAS_SLOT(type, buffer)
+        && MP_OBJ_TYPE_GET_SLOT(type, buffer)(obj, bufinfo, flags & MP_BUFFER_RW) == 0) {
+        return true;
     }
-    int ret = MP_OBJ_TYPE_GET_SLOT(type, buffer)(obj, bufinfo, flags);
-    if (ret != 0) {
-        return false;
-    }
-    return true;
-}
-
-void mp_get_buffer_raise(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags) {
-    if (!mp_get_buffer(obj, bufinfo, flags)) {
+    if (flags & MP_BUFFER_RAISE_IF_UNSUPPORTED) {
         mp_raise_TypeError(MP_ERROR_TEXT("object with buffer protocol required"));
     }
+    return false;
 }
diff --git a/py/obj.h b/py/obj.h
index 3c2176832d..56ae62172f 100644
--- a/py/obj.h
+++ b/py/obj.h
@@ -585,17 +585,25 @@ typedef struct _mp_getiter_iternext_custom_t {
 } mp_getiter_iternext_custom_t;
 
 // Buffer protocol
+
 typedef struct _mp_buffer_info_t {
     void *buf;      // can be NULL if len == 0
     size_t len;     // in bytes
     int typecode;   // as per binary.h
 } mp_buffer_info_t;
+
 #define MP_BUFFER_READ  (1)
 #define MP_BUFFER_WRITE (2)
 #define MP_BUFFER_RW (MP_BUFFER_READ | MP_BUFFER_WRITE)
+#define MP_BUFFER_RAISE_IF_UNSUPPORTED (4)
+
 typedef mp_int_t (*mp_buffer_fun_t)(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags);
+
 bool mp_get_buffer(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags);
-void mp_get_buffer_raise(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags);
+
+static inline void mp_get_buffer_raise(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags) {
+    mp_get_buffer(obj, bufinfo, flags | MP_BUFFER_RAISE_IF_UNSUPPORTED);
+}
 
 // This struct will be updated to become a variable sized struct. In order to
 // use this as a member, or allocate dynamically, use the mp_obj_empty_type_t

From 9b63421fb36a9674eda01c1bc111f070b7b81329 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 13 Oct 2023 17:37:56 +1100
Subject: [PATCH 015/310] py/dynruntime: Add mp_get_buffer.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/dynruntime.h | 3 ++-
 py/nativeglue.c | 2 +-
 py/nativeglue.h | 2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/py/dynruntime.h b/py/dynruntime.h
index 90c401ab4b..de9c93c659 100644
--- a/py/dynruntime.h
+++ b/py/dynruntime.h
@@ -125,7 +125,8 @@ static inline void *m_realloc_dyn(void *ptr, size_t new_num_bytes) {
 #define mp_obj_get_int_truncated(o)         (mp_fun_table.native_from_obj(o, MP_NATIVE_TYPE_UINT))
 #define mp_obj_str_get_str(s)               (mp_obj_str_get_data_dyn((s), NULL))
 #define mp_obj_str_get_data(o, len)         (mp_obj_str_get_data_dyn((o), (len)))
-#define mp_get_buffer_raise(o, bufinfo, fl) (mp_fun_table.get_buffer_raise((o), (bufinfo), (fl)))
+#define mp_get_buffer(o, bufinfo, fl)       (mp_fun_table.get_buffer((o), (bufinfo), (fl)))
+#define mp_get_buffer_raise(o, bufinfo, fl) (mp_fun_table.get_buffer((o), (bufinfo), (fl) | MP_BUFFER_RAISE_IF_UNSUPPORTED))
 #define mp_get_stream_raise(s, flags)       (mp_fun_table.get_stream_raise((s), (flags)))
 #define mp_obj_is_true(o)                   (mp_fun_table.native_from_obj(o, MP_NATIVE_TYPE_BOOL))
 
diff --git a/py/nativeglue.c b/py/nativeglue.c
index d92d815abd..217c6b3df3 100644
--- a/py/nativeglue.c
+++ b/py/nativeglue.c
@@ -328,7 +328,7 @@ const mp_fun_table_t mp_fun_table = {
     mp_obj_new_float_from_d,
     mp_obj_get_float_to_f,
     mp_obj_get_float_to_d,
-    mp_get_buffer_raise,
+    mp_get_buffer,
     mp_get_stream_raise,
     &mp_plat_print,
     &mp_type_type,
diff --git a/py/nativeglue.h b/py/nativeglue.h
index 7b1ccd8d46..cf73ffbfc3 100644
--- a/py/nativeglue.h
+++ b/py/nativeglue.h
@@ -154,7 +154,7 @@ typedef struct _mp_fun_table_t {
     mp_obj_t (*obj_new_float_from_d)(double d);
     float (*obj_get_float_to_f)(mp_obj_t o);
     double (*obj_get_float_to_d)(mp_obj_t o);
-    void (*get_buffer_raise)(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags);
+    bool (*get_buffer)(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags);
     const mp_stream_p_t *(*get_stream_raise)(mp_obj_t self_in, int flags);
     const mp_print_t *plat_print;
     const mp_obj_type_t *type_type;

From 6967ff3c581a66f73e9f3d78975f47528db39980 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 16 Oct 2023 10:48:36 +1100
Subject: [PATCH 016/310] py/persistentcode: Bump .mpy sub-version.

This is required because the previous commit changed the .mpy native ABI.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/persistentcode.h                       | 2 +-
 tests/micropython/import_mpy_native_gc.py | 4 ++--
 tools/mpy-tool.py                         | 2 +-
 tools/mpy_ld.py                           | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/py/persistentcode.h b/py/persistentcode.h
index 140a0e7e80..45a268d63f 100644
--- a/py/persistentcode.h
+++ b/py/persistentcode.h
@@ -35,7 +35,7 @@
 // set) must also match MPY_SUB_VERSION. This allows 3 additional updates to
 // the native ABI per bytecode revision.
 #define MPY_VERSION 6
-#define MPY_SUB_VERSION 1
+#define MPY_SUB_VERSION 2
 
 // Macros to encode/decode sub-version to/from the feature byte. This replaces
 // the bits previously used to encode the flags (map caching and unicode)
diff --git a/tests/micropython/import_mpy_native_gc.py b/tests/micropython/import_mpy_native_gc.py
index 5f2a2a6f45..e0da8d2c37 100644
--- a/tests/micropython/import_mpy_native_gc.py
+++ b/tests/micropython/import_mpy_native_gc.py
@@ -53,9 +53,9 @@ class UserFS:
 # cat features0.mpy | python -c 'import sys; print(sys.stdin.buffer.read())'
 features0_file_contents = {
     # -march=x64
-    0x806: b'M\x06\x09\x1f\x02\x004build/features0.native.mpy\x00\x12factorial\x00\x8a\x02\xe9/\x00\x00\x00SH\x8b\x1d\x83\x00\x00\x00\xbe\x02\x00\x00\x00\xffS\x18\xbf\x01\x00\x00\x00H\x85\xc0u\x0cH\x8bC \xbe\x02\x00\x00\x00[\xff\xe0H\x0f\xaf\xf8H\xff\xc8\xeb\xe6ATUSH\x8b\x1dQ\x00\x00\x00H\x8bG\x08L\x8bc(H\x8bx\x08A\xff\xd4H\x8d5+\x00\x00\x00H\x89\xc5H\x8b\x059\x00\x00\x00\x0f\xb7x\x02\xffShH\x89\xefA\xff\xd4H\x8b\x03[]A\\\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x05\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x10\x11$\r&\xa3 \x01"\xff',
+    0x806: b'M\x06\x0a\x1f\x02\x004build/features0.native.mpy\x00\x12factorial\x00\x8a\x02\xe9/\x00\x00\x00SH\x8b\x1d\x83\x00\x00\x00\xbe\x02\x00\x00\x00\xffS\x18\xbf\x01\x00\x00\x00H\x85\xc0u\x0cH\x8bC \xbe\x02\x00\x00\x00[\xff\xe0H\x0f\xaf\xf8H\xff\xc8\xeb\xe6ATUSH\x8b\x1dQ\x00\x00\x00H\x8bG\x08L\x8bc(H\x8bx\x08A\xff\xd4H\x8d5+\x00\x00\x00H\x89\xc5H\x8b\x059\x00\x00\x00\x0f\xb7x\x02\xffShH\x89\xefA\xff\xd4H\x8b\x03[]A\\\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x05\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x10\x11$\r&\xa3 \x01"\xff',
     # -march=armv6m
-    0x1006: b"M\x06\x11\x1f\x02\x004build/features0.native.mpy\x00\x12factorial\x00\x88\x02\x18\xe0\x00\x00\x10\xb5\tK\tJ{D\x9cX\x02!\xe3h\x98G\x03\x00\x01 \x00+\x02\xd0XC\x01;\xfa\xe7\x02!#i\x98G\x10\xbd\xc0Fj\x00\x00\x00\x00\x00\x00\x00\xf8\xb5\nN\nK~D\xf4XChgiXh\xb8G\x05\x00\x07K\x08I\xf3XyDX\x88ck\x98G(\x00\xb8G h\xf8\xbd\xc0F:\x00\x00\x00\x00\x00\x00\x00\x04\x00\x00\x00\x1e\x00\x00\x00\x00\x00\x00\x00\x05\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x10\x11<\r>\xa38\x01:\xff",
+    0x1006: b"M\x06\x12\x1f\x02\x004build/features0.native.mpy\x00\x12factorial\x00\x88\x02\x18\xe0\x00\x00\x10\xb5\tK\tJ{D\x9cX\x02!\xe3h\x98G\x03\x00\x01 \x00+\x02\xd0XC\x01;\xfa\xe7\x02!#i\x98G\x10\xbd\xc0Fj\x00\x00\x00\x00\x00\x00\x00\xf8\xb5\nN\nK~D\xf4XChgiXh\xb8G\x05\x00\x07K\x08I\xf3XyDX\x88ck\x98G(\x00\xb8G h\xf8\xbd\xc0F:\x00\x00\x00\x00\x00\x00\x00\x04\x00\x00\x00\x1e\x00\x00\x00\x00\x00\x00\x00\x05\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x10\x11<\r>\xa38\x01:\xff",
 }
 
 # Populate armv7m-derived archs based on armv6m.
diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py
index 5ef69b267a..fc3518d359 100755
--- a/tools/mpy-tool.py
+++ b/tools/mpy-tool.py
@@ -88,7 +88,7 @@ class FreezeError(Exception):
 
 class Config:
     MPY_VERSION = 6
-    MPY_SUB_VERSION = 1
+    MPY_SUB_VERSION = 2
     MICROPY_LONGINT_IMPL_NONE = 0
     MICROPY_LONGINT_IMPL_LONGLONG = 1
     MICROPY_LONGINT_IMPL_MPZ = 2
diff --git a/tools/mpy_ld.py b/tools/mpy_ld.py
index 7f0fcbca22..d7d0b945c5 100755
--- a/tools/mpy_ld.py
+++ b/tools/mpy_ld.py
@@ -36,7 +36,7 @@ import makeqstrdata as qstrutil
 
 # MicroPython constants
 MPY_VERSION = 6
-MPY_SUB_VERSION = 1
+MPY_SUB_VERSION = 2
 MP_CODE_BYTECODE = 2
 MP_CODE_NATIVE_VIPER = 4
 MP_NATIVE_ARCH_X86 = 1

From a1be5e1439c9c3056d9073981c4301bb1c5e17be Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 16 Oct 2023 11:28:32 +1100
Subject: [PATCH 017/310] docs/reference/mpyfiles: Document change in .mpy
 sub-version.

Signed-off-by: Damien George <damien@micropython.org>
---
 docs/reference/mpyfiles.rst | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/docs/reference/mpyfiles.rst b/docs/reference/mpyfiles.rst
index 1588eda570..02bac3d411 100644
--- a/docs/reference/mpyfiles.rst
+++ b/docs/reference/mpyfiles.rst
@@ -86,7 +86,8 @@ and .mpy version.
 =================== ============
 MicroPython release .mpy version
 =================== ============
-v1.20 and up        6.1
+v1.22.0 and up      6.2
+v1.20 - v1.21.0     6.1
 v1.19.x             6
 v1.12 - v1.18       5
 v1.11               4
@@ -101,6 +102,7 @@ MicroPython repository at which the .mpy version was changed.
 =================== ========================================
 .mpy version change Git commit
 =================== ========================================
+6.1 to 6.2          6967ff3c581a66f73e9f3d78975f47528db39980
 6 to 6.1            d94141e1473aebae0d3c63aeaa8397651ad6fa01
 5 to 6              f2040bfc7ee033e48acef9f289790f3b4e6b74e5
 4 to 5              5716c5cf65e9b2cb46c2906f40302401bdd27517

From d040478d8aad7a05aac98651ec6ac5c2e9265a22 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 4 Oct 2023 22:13:18 +1100
Subject: [PATCH 018/310] extmod/modframebuf: Validate FrameBuffer bounds
 against input buffer.

This ensures that the buffer is large enough for the specified width,
height, bits-per-pixel, and stride.

Also makes the legacy FrameBuffer1 constructor re-use the FrameBuffer
make_new to save some code size.

Fixes issue #12562.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 extmod/modframebuf.c                | 74 +++++++++++++++--------------
 tests/extmod/framebuf_bounds.py     | 60 +++++++++++++++++++++++
 tests/extmod/framebuf_bounds.py.exp | 44 +++++++++++++++++
 3 files changed, 143 insertions(+), 35 deletions(-)
 create mode 100644 tests/extmod/framebuf_bounds.py
 create mode 100644 tests/extmod/framebuf_bounds.py.exp

diff --git a/extmod/modframebuf.c b/extmod/modframebuf.c
index 87f7609dd8..eabe819973 100644
--- a/extmod/modframebuf.c
+++ b/extmod/modframebuf.c
@@ -273,42 +273,59 @@ STATIC void fill_rect(const mp_obj_framebuf_t *fb, int x, int y, int w, int h, u
 STATIC mp_obj_t framebuf_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args_in) {
     mp_arg_check_num(n_args, n_kw, 4, 5, false);
 
-    mp_obj_framebuf_t *o = mp_obj_malloc(mp_obj_framebuf_t, type);
-    o->buf_obj = args_in[0];
+    mp_int_t width = mp_obj_get_int(args_in[1]);
+    mp_int_t height = mp_obj_get_int(args_in[2]);
+    mp_int_t format = mp_obj_get_int(args_in[3]);
+    mp_int_t stride = n_args >= 5 ? mp_obj_get_int(args_in[4]) : width;
 
-    mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args_in[0], &bufinfo, MP_BUFFER_WRITE);
-    o->buf = bufinfo.buf;
-
-    o->width = mp_obj_get_int(args_in[1]);
-    o->height = mp_obj_get_int(args_in[2]);
-    o->format = mp_obj_get_int(args_in[3]);
-    if (n_args >= 5) {
-        o->stride = mp_obj_get_int(args_in[4]);
-    } else {
-        o->stride = o->width;
+    if (width < 1 || height < 1 || width > 0xffff || height > 0xffff || stride > 0xffff || stride < width) {
+        mp_raise_ValueError(NULL);
     }
 
-    switch (o->format) {
+    size_t height_required = height;
+    size_t bpp = 1;
+
+    switch (format) {
         case FRAMEBUF_MVLSB:
-        case FRAMEBUF_RGB565:
+            height_required = (height + 7) & ~7;
             break;
         case FRAMEBUF_MHLSB:
         case FRAMEBUF_MHMSB:
-            o->stride = (o->stride + 7) & ~7;
+            stride = (stride + 7) & ~7;
             break;
         case FRAMEBUF_GS2_HMSB:
-            o->stride = (o->stride + 3) & ~3;
+            stride = (stride + 3) & ~3;
+            bpp = 2;
             break;
         case FRAMEBUF_GS4_HMSB:
-            o->stride = (o->stride + 1) & ~1;
+            stride = (stride + 1) & ~1;
+            bpp = 4;
             break;
         case FRAMEBUF_GS8:
+            bpp = 8;
+            break;
+        case FRAMEBUF_RGB565:
+            bpp = 16;
             break;
         default:
             mp_raise_ValueError(MP_ERROR_TEXT("invalid format"));
     }
 
+    mp_buffer_info_t bufinfo;
+    mp_get_buffer_raise(args_in[0], &bufinfo, MP_BUFFER_WRITE);
+
+    if (height_required * stride * bpp / 8 > bufinfo.len) {
+        mp_raise_ValueError(NULL);
+    }
+
+    mp_obj_framebuf_t *o = mp_obj_malloc(mp_obj_framebuf_t, type);
+    o->buf_obj = args_in[0];
+    o->buf = bufinfo.buf;
+    o->width = width;
+    o->height = height;
+    o->format = format;
+    o->stride = stride;
+
     return MP_OBJ_FROM_PTR(o);
 }
 
@@ -851,24 +868,11 @@ STATIC MP_DEFINE_CONST_OBJ_TYPE(
     );
 #endif
 
-// this factory function is provided for backwards compatibility with old FrameBuffer1 class
+// This factory function is provided for backwards compatibility with the old
+// FrameBuffer1 class which did not support a format argument.
 STATIC mp_obj_t legacy_framebuffer1(size_t n_args, const mp_obj_t *args_in) {
-    mp_obj_framebuf_t *o = mp_obj_malloc(mp_obj_framebuf_t, (mp_obj_type_t *)&mp_type_framebuf);
-
-    mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args_in[0], &bufinfo, MP_BUFFER_WRITE);
-    o->buf = bufinfo.buf;
-
-    o->width = mp_obj_get_int(args_in[1]);
-    o->height = mp_obj_get_int(args_in[2]);
-    o->format = FRAMEBUF_MVLSB;
-    if (n_args >= 4) {
-        o->stride = mp_obj_get_int(args_in[3]);
-    } else {
-        o->stride = o->width;
-    }
-
-    return MP_OBJ_FROM_PTR(o);
+    mp_obj_t args[] = {args_in[0], args_in[1], args_in[2], MP_OBJ_NEW_SMALL_INT(FRAMEBUF_MVLSB), n_args >= 4 ? args_in[3] : args_in[1] };
+    return framebuf_make_new(&mp_type_framebuf, 5, 0, args);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(legacy_framebuffer1_obj, 3, 4, legacy_framebuffer1);
 
diff --git a/tests/extmod/framebuf_bounds.py b/tests/extmod/framebuf_bounds.py
new file mode 100644
index 0000000000..3035b365bb
--- /dev/null
+++ b/tests/extmod/framebuf_bounds.py
@@ -0,0 +1,60 @@
+try:
+    import framebuf
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+def test_constructor(*args):
+    try:
+        framebuf.FrameBuffer(*args)
+        print("Valid")
+    except ValueError:
+        print("ValueError")
+
+
+print(framebuf.MONO_HLSB)
+test_constructor(bytearray(20), 10, 10, framebuf.MONO_HLSB)
+test_constructor(bytearray(20), -1, 10, framebuf.MONO_HLSB)
+test_constructor(bytearray(20), 10, -1, framebuf.MONO_HLSB)
+test_constructor(bytearray(20), 10, 10, framebuf.MONO_HLSB, 11)
+test_constructor(bytearray(20), 10, 10, framebuf.MONO_HLSB, 10)
+test_constructor(bytearray(20), 10, 10, framebuf.MONO_HLSB, 9)
+test_constructor(bytearray(20), 10, 10, framebuf.MONO_HLSB, -1)
+
+print(framebuf.MONO_VLSB)
+test_constructor(bytearray(8), 8, 1, framebuf.MONO_VLSB)
+test_constructor(bytearray(7), 8, 1, framebuf.MONO_VLSB)
+test_constructor(bytearray(8), 8, 8, framebuf.MONO_VLSB)
+
+for f in (framebuf.MONO_HLSB, framebuf.MONO_HMSB):
+    print(f)
+    test_constructor(bytearray(1), 8, 1, f)
+    test_constructor(bytearray(0), 8, 1, f)
+    test_constructor(bytearray(8), 8, 8, f)
+    test_constructor(bytearray(9), 8, 9, f)
+    test_constructor(bytearray(9), 9, 8, f)
+
+print(framebuf.GS2_HMSB)
+test_constructor(bytearray(8), 4, 8, framebuf.GS2_HMSB)
+test_constructor(bytearray(15), 5, 8, framebuf.GS2_HMSB)
+test_constructor(bytearray(16), 5, 8, framebuf.GS2_HMSB)
+test_constructor(bytearray(9), 4, 9, framebuf.GS2_HMSB)
+
+print(framebuf.GS4_HMSB)
+test_constructor(bytearray(8), 2, 8, framebuf.GS4_HMSB)
+test_constructor(bytearray(15), 3, 8, framebuf.GS4_HMSB)
+test_constructor(bytearray(16), 3, 8, framebuf.GS4_HMSB)
+test_constructor(bytearray(9), 2, 9, framebuf.GS4_HMSB)
+
+print(framebuf.GS8)
+test_constructor(bytearray(63), 8, 8, framebuf.GS8)
+test_constructor(bytearray(64), 8, 8, framebuf.GS8)
+test_constructor(bytearray(64), 9, 8, framebuf.GS8)
+test_constructor(bytearray(64), 8, 9, framebuf.GS8)
+
+print(framebuf.RGB565)
+test_constructor(bytearray(127), 8, 8, framebuf.RGB565)
+test_constructor(bytearray(128), 8, 8, framebuf.RGB565)
+test_constructor(bytearray(128), 9, 8, framebuf.RGB565)
+test_constructor(bytearray(128), 8, 9, framebuf.RGB565)
diff --git a/tests/extmod/framebuf_bounds.py.exp b/tests/extmod/framebuf_bounds.py.exp
new file mode 100644
index 0000000000..3125013bc9
--- /dev/null
+++ b/tests/extmod/framebuf_bounds.py.exp
@@ -0,0 +1,44 @@
+3
+Valid
+ValueError
+ValueError
+Valid
+Valid
+ValueError
+ValueError
+0
+Valid
+ValueError
+Valid
+3
+Valid
+ValueError
+Valid
+Valid
+ValueError
+4
+Valid
+ValueError
+Valid
+Valid
+ValueError
+5
+Valid
+ValueError
+Valid
+Valid
+2
+Valid
+ValueError
+Valid
+Valid
+6
+ValueError
+Valid
+ValueError
+ValueError
+1
+ValueError
+Valid
+ValueError
+ValueError

From 03a9fa227d323da7b239a1ef3fa84b0ef45a1621 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 4 Oct 2023 22:33:14 +1100
Subject: [PATCH 019/310] extmod/modframebuf: Fix FrameBuffer get-buffer
 implementation.

This wasn't correctly accounting for the bits-per-pixel and was returning a
bufinfo struct with the incorrect length.  Instead, just forward directly
to the underlying buffer object.

Fixes issue #12563.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 extmod/modframebuf.c          | 6 +-----
 tests/extmod/framebuf1.py     | 6 ++++++
 tests/extmod/framebuf1.py.exp | 1 +
 3 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/extmod/modframebuf.c b/extmod/modframebuf.c
index eabe819973..c62ac4fe39 100644
--- a/extmod/modframebuf.c
+++ b/extmod/modframebuf.c
@@ -336,12 +336,8 @@ STATIC void framebuf_args(const mp_obj_t *args_in, mp_int_t *args_out, int n) {
 }
 
 STATIC mp_int_t framebuf_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags) {
-    (void)flags;
     mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(self_in);
-    bufinfo->buf = self->buf;
-    bufinfo->len = self->stride * self->height * (self->format == FRAMEBUF_RGB565 ? 2 : 1);
-    bufinfo->typecode = 'B'; // view framebuf as bytes
-    return 0;
+    return mp_get_buffer(self->buf_obj, bufinfo, flags) ? 0 : 1;
 }
 
 STATIC mp_obj_t framebuf_fill(mp_obj_t self_in, mp_obj_t col_in) {
diff --git a/tests/extmod/framebuf1.py b/tests/extmod/framebuf1.py
index d35674a709..b1173d5368 100644
--- a/tests/extmod/framebuf1.py
+++ b/tests/extmod/framebuf1.py
@@ -109,3 +109,9 @@ except ValueError:
 fbuf = framebuf.FrameBuffer1(buf, w, h)
 fbuf = framebuf.FrameBuffer1(buf, w, h, w)
 print(framebuf.MVLSB == framebuf.MONO_VLSB)
+
+# test get-buffer (returns the original buffer)
+fbuf = framebuf.FrameBuffer(bytearray(2), 8, 1, framebuf.MONO_HLSB)
+fbuf.pixel(0, 0, 1)
+fbuf.pixel(4, 0, 1)
+print(bytearray(fbuf))
diff --git a/tests/extmod/framebuf1.py.exp b/tests/extmod/framebuf1.py.exp
index b9cd97835d..4f18e48eca 100644
--- a/tests/extmod/framebuf1.py.exp
+++ b/tests/extmod/framebuf1.py.exp
@@ -66,3 +66,4 @@ bytearray(b'\n\x15\n\x15\n\x15\n\x15\x00\x00\x00\x00\x00\x00\x00\x00')
 
 ValueError
 True
+bytearray(b'\x88\x00')

From 8eb7721b4aa838608d6e3b28b96992e3d2db42b4 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 4 Oct 2023 22:42:12 +1100
Subject: [PATCH 020/310] extmod/modframebuf: Remove FrameBuffer1 from natmod
 build.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 examples/natmod/framebuf/framebuf.c | 1 -
 extmod/modframebuf.c                | 2 +-
 tests/extmod/framebuf1.py           | 5 +++--
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/examples/natmod/framebuf/framebuf.c b/examples/natmod/framebuf/framebuf.c
index 32b67eabcf..badc7ab46d 100644
--- a/examples/natmod/framebuf/framebuf.c
+++ b/examples/natmod/framebuf/framebuf.c
@@ -36,7 +36,6 @@ mp_obj_t mpy_init(mp_obj_fun_bc_t *self, size_t n_args, size_t n_kw, mp_obj_t *a
     MP_OBJ_TYPE_SET_SLOT(&mp_type_framebuf, locals_dict, (void*)&framebuf_locals_dict, 2);
 
     mp_store_global(MP_QSTR_FrameBuffer, MP_OBJ_FROM_PTR(&mp_type_framebuf));
-    mp_store_global(MP_QSTR_FrameBuffer1, MP_OBJ_FROM_PTR(&legacy_framebuffer1_obj));
     mp_store_global(MP_QSTR_MVLSB, MP_OBJ_NEW_SMALL_INT(FRAMEBUF_MVLSB));
     mp_store_global(MP_QSTR_MONO_VLSB, MP_OBJ_NEW_SMALL_INT(FRAMEBUF_MVLSB));
     mp_store_global(MP_QSTR_RGB565, MP_OBJ_NEW_SMALL_INT(FRAMEBUF_RGB565));
diff --git a/extmod/modframebuf.c b/extmod/modframebuf.c
index c62ac4fe39..92313bd4bb 100644
--- a/extmod/modframebuf.c
+++ b/extmod/modframebuf.c
@@ -864,6 +864,7 @@ STATIC MP_DEFINE_CONST_OBJ_TYPE(
     );
 #endif
 
+#if !MICROPY_ENABLE_DYNRUNTIME
 // This factory function is provided for backwards compatibility with the old
 // FrameBuffer1 class which did not support a format argument.
 STATIC mp_obj_t legacy_framebuffer1(size_t n_args, const mp_obj_t *args_in) {
@@ -872,7 +873,6 @@ STATIC mp_obj_t legacy_framebuffer1(size_t n_args, const mp_obj_t *args_in) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(legacy_framebuffer1_obj, 3, 4, legacy_framebuffer1);
 
-#if !MICROPY_ENABLE_DYNRUNTIME
 STATIC const mp_rom_map_elem_t framebuf_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_framebuf) },
     { MP_ROM_QSTR(MP_QSTR_FrameBuffer), MP_ROM_PTR(&mp_type_framebuf) },
diff --git a/tests/extmod/framebuf1.py b/tests/extmod/framebuf1.py
index b1173d5368..f5e92579f2 100644
--- a/tests/extmod/framebuf1.py
+++ b/tests/extmod/framebuf1.py
@@ -106,8 +106,9 @@ except ValueError:
     print("ValueError")
 
 # test legacy constructor
-fbuf = framebuf.FrameBuffer1(buf, w, h)
-fbuf = framebuf.FrameBuffer1(buf, w, h, w)
+if hasattr(framebuf, "FrameBuffer1"):
+    fbuf = framebuf.FrameBuffer1(buf, w, h)
+    fbuf = framebuf.FrameBuffer1(buf, w, h, w)
 print(framebuf.MVLSB == framebuf.MONO_VLSB)
 
 # test get-buffer (returns the original buffer)

From ac4f79592b9779d827c24df2ef2ff9ad8b7f1db8 Mon Sep 17 00:00:00 2001
From: Thomas Ackermann <th.acker.0302@gmail.com>
Date: Fri, 13 Oct 2023 12:27:21 +0000
Subject: [PATCH 021/310] docs/library/io: Remove io.FileIO and
 io.TextIOWrapper.

FileIO and TextIOWrapper were removed in
e65d1e69e88268145ff0e7e73240f028885915be.  Remove them also from the
documentation.

Signed-off-by: Thomas Ackermann <th.acker@arcor.de>
---
 docs/library/io.rst | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/docs/library/io.rst b/docs/library/io.rst
index 6b4b9f1a47..caa5989522 100644
--- a/docs/library/io.rst
+++ b/docs/library/io.rst
@@ -86,16 +86,6 @@ Functions
 Classes
 -------
 
-.. class:: FileIO(...)
-
-    This is type of a file open in binary mode, e.g. using ``open(name, "rb")``.
-    You should not instantiate this class directly.
-
-.. class:: TextIOWrapper(...)
-
-    This is type of a file open in text mode, e.g. using ``open(name, "rt")``.
-    You should not instantiate this class directly.
-
 .. class:: StringIO([string])
 .. class:: BytesIO([string])
 

From 4074f828dd107cb5eb469b0d7338d3b39d0a99e9 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Wed, 11 Oct 2023 14:45:35 +0200
Subject: [PATCH 022/310] stm32/boards/ARDUINO_GIGA: Add QSPI fix/workaround to
 early init.

This workaround fixes an issue with some production boards that have
an older QSPI flash part revision, which can't handle floating pins.
Note those pins can be reconfigured and reused later.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/stm32/boards/ARDUINO_GIGA/board_init.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/ports/stm32/boards/ARDUINO_GIGA/board_init.c b/ports/stm32/boards/ARDUINO_GIGA/board_init.c
index bdec04643b..b072f00a24 100644
--- a/ports/stm32/boards/ARDUINO_GIGA/board_init.c
+++ b/ports/stm32/boards/ARDUINO_GIGA/board_init.c
@@ -35,6 +35,14 @@ void GIGA_board_startup(void) {
 void GIGA_board_early_init(void) {
     HAL_InitTick(0);
 
+    // The following pins need to be configured at this point to fix an
+    // issue with some boards that have an older QSPI flash part revision.
+    mp_hal_pin_config(pin_PD13, MP_HAL_PIN_MODE_ANALOG, MP_HAL_PIN_PULL_NONE, 0);
+    __HAL_RCC_GPIOD_CLK_DISABLE();
+
+    mp_hal_pin_config(pin_PF7, MP_HAL_PIN_MODE_ANALOG, MP_HAL_PIN_PULL_NONE, 0);
+    __HAL_RCC_GPIOF_CLK_DISABLE();
+
     #if MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE == 1
     // The Arduino/mbed bootloader uses the MPU to protect sector 1
     // which is used for the flash filesystem. The following code

From f84b4617cb6e15f943ea81efeeafa651a9553445 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Tue, 10 Oct 2023 09:36:18 +0200
Subject: [PATCH 023/310] rp2/cyw43_configport: Use m_tracked_calloc and
 m_tracked_free.

When using malloc and free there were out-of-memory situations depending on
the arm-none-eabi package version.  This commit changes malloc/free to use
the MicroPython GC heap instead.

Signed-off-by: robert-hh <robert@hammelrath.com>
Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/boards/RPI_PICO_W/mpconfigboard.cmake | 3 ---
 ports/rp2/cyw43_configport.h                    | 9 +++++----
 2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/ports/rp2/boards/RPI_PICO_W/mpconfigboard.cmake b/ports/rp2/boards/RPI_PICO_W/mpconfigboard.cmake
index 5610c313e6..cea6c38d73 100644
--- a/ports/rp2/boards/RPI_PICO_W/mpconfigboard.cmake
+++ b/ports/rp2/boards/RPI_PICO_W/mpconfigboard.cmake
@@ -2,9 +2,6 @@
 
 set(PICO_BOARD "pico_w")
 
-# The C malloc is needed by cyw43-driver Bluetooth
-set(MICROPY_C_HEAP_SIZE 4096)
-
 set(MICROPY_PY_LWIP ON)
 set(MICROPY_PY_NETWORK_CYW43 ON)
 
diff --git a/ports/rp2/cyw43_configport.h b/ports/rp2/cyw43_configport.h
index 929d83537b..8f64762df5 100644
--- a/ports/rp2/cyw43_configport.h
+++ b/ports/rp2/cyw43_configport.h
@@ -90,13 +90,14 @@
 
 #define cyw43_schedule_internal_poll_dispatch(func) pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, func)
 
-// Bluetooth uses the C heap to load its firmware (provided by pico-sdk).
-// Space is reserved for this, see MICROPY_C_HEAP_SIZE.
+// Bluetooth requires dynamic memory allocation to load its firmware (the allocation
+// call is made from pico-sdk).  This allocation is always done at thread-level, not
+// from an IRQ, so is safe to delegate to the MicroPython GC heap.
 #ifndef cyw43_malloc
-#define cyw43_malloc malloc
+#define cyw43_malloc(nmemb) m_tracked_calloc(nmemb, 1)
 #endif
 #ifndef cyw43_free
-#define cyw43_free free
+#define cyw43_free m_tracked_free
 #endif
 
 void cyw43_post_poll_hook(void);

From 8b12923da2490d37d70d0f3e3c3ac948fd150a3a Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Mon, 16 Oct 2023 15:15:07 +0200
Subject: [PATCH 024/310] stm32/boards/ARDUINO_GIGA: Fix name of pins in board
 init.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/stm32/boards/ARDUINO_GIGA/board_init.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ports/stm32/boards/ARDUINO_GIGA/board_init.c b/ports/stm32/boards/ARDUINO_GIGA/board_init.c
index b072f00a24..eec2494614 100644
--- a/ports/stm32/boards/ARDUINO_GIGA/board_init.c
+++ b/ports/stm32/boards/ARDUINO_GIGA/board_init.c
@@ -37,10 +37,10 @@ void GIGA_board_early_init(void) {
 
     // The following pins need to be configured at this point to fix an
     // issue with some boards that have an older QSPI flash part revision.
-    mp_hal_pin_config(pin_PD13, MP_HAL_PIN_MODE_ANALOG, MP_HAL_PIN_PULL_NONE, 0);
+    mp_hal_pin_config(pin_D13, MP_HAL_PIN_MODE_ANALOG, MP_HAL_PIN_PULL_NONE, 0);
     __HAL_RCC_GPIOD_CLK_DISABLE();
 
-    mp_hal_pin_config(pin_PF7, MP_HAL_PIN_MODE_ANALOG, MP_HAL_PIN_PULL_NONE, 0);
+    mp_hal_pin_config(pin_F7, MP_HAL_PIN_MODE_ANALOG, MP_HAL_PIN_PULL_NONE, 0);
     __HAL_RCC_GPIOF_CLK_DISABLE();
 
     #if MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE == 1

From 51da8cc28bb6073588e4938489194f2f937006df Mon Sep 17 00:00:00 2001
From: Rene Straub <rene@see5.ch>
Date: Mon, 14 Aug 2023 18:38:44 +0200
Subject: [PATCH 025/310] stm32/eth: Add Ethernet support for H5 MCUs.

This commit implements Ethernet support for STM32H5.  Changes are:

- Add Cortex-M33 MPU code.  Ethernet driver requires MPU to define cache
  strategy for DMA buffers (descriptors and frames).
- Add support for STM32H5 Ethernet controller.  The controller is mostly
  compatible with the STM32H7.  However the descriptor layout is different.
- Adapt clocking and reset for STM32H5.

Tested on NUCLEO-H563ZI and STM32H573I-DK, using ping and iperf3.  TCP
rates of 80-90 Mbits/sec were achievable.

Signed-off-by: Rene Straub <rene@see5.ch>
Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/eth.c | 116 +++++++++++++++++++++++++++++++++-------------
 ports/stm32/mpu.h |  52 ++++++++++++++++++++-
 2 files changed, 136 insertions(+), 32 deletions(-)

diff --git a/ports/stm32/eth.c b/ports/stm32/eth.c
index b01eee3f2b..363357dac9 100644
--- a/ports/stm32/eth.c
+++ b/ports/stm32/eth.c
@@ -62,7 +62,19 @@
 #define PHY_SCSR_SPEED_100FULL  (6 << PHY_SCSR_SPEED_Pos)
 
 // ETH DMA RX and TX descriptor definitions
-#if defined(STM32H7)
+#if defined(STM32H5)
+#define RX_DESCR_3_OWN_Pos      (31)
+#define RX_DESCR_3_IOC_Pos      (30)
+#define RX_DESCR_3_BUF1V_Pos    (24)
+#define RX_DESCR_3_PL_Msk       (0x7fff)
+
+#define TX_DESCR_3_OWN_Pos      (31)
+#define TX_DESCR_3_FD_Pos       (29)
+#define TX_DESCR_3_LD_Pos       (28)
+#define TX_DESCR_3_CIC_Pos      (16)
+#define TX_DESCR_2_B1L_Pos      (0)
+#define TX_DESCR_2_B1L_Msk      (0x3fff << TX_DESCR_2_B1L_Pos)
+#elif defined(STM32H7)
 #define RX_DESCR_3_OWN_Pos      (31)
 #define RX_DESCR_3_IOC_Pos      (30)
 #define RX_DESCR_3_BUF1V_Pos    (24)
@@ -135,7 +147,7 @@ STATIC void eth_mac_deinit(eth_t *self);
 STATIC void eth_process_frame(eth_t *self, size_t len, const uint8_t *buf);
 
 STATIC void eth_phy_write(uint32_t reg, uint32_t val) {
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     while (ETH->MACMDIOAR & ETH_MACMDIOAR_MB) {
     }
     uint32_t ar = ETH->MACMDIOAR;
@@ -161,7 +173,7 @@ STATIC void eth_phy_write(uint32_t reg, uint32_t val) {
 }
 
 STATIC uint32_t eth_phy_read(uint32_t reg) {
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     while (ETH->MACMDIOAR & ETH_MACMDIOAR_MB) {
     }
     uint32_t ar = ETH->MACMDIOAR;
@@ -202,7 +214,11 @@ void eth_init(eth_t *self, int mac_idx) {
     mp_hal_pin_config_alt_static(MICROPY_HW_ETH_RMII_TXD1, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, STATIC_AF_ETH_RMII_TXD1);
 
     // Enable peripheral clock
-    #if defined(STM32H7)
+    #if defined(STM32H5)
+    __HAL_RCC_ETH_CLK_ENABLE();
+    __HAL_RCC_ETHTX_CLK_ENABLE();
+    __HAL_RCC_ETHRX_CLK_ENABLE();
+    #elif defined(STM32H7)
     __HAL_RCC_ETH1MAC_CLK_ENABLE();
     __HAL_RCC_ETH1TX_CLK_ENABLE();
     __HAL_RCC_ETH1RX_CLK_ENABLE();
@@ -218,11 +234,20 @@ void eth_set_trace(eth_t *self, uint32_t value) {
 STATIC int eth_mac_init(eth_t *self) {
     // Configure MPU
     uint32_t irq_state = mpu_config_start();
+    #if defined(STM32H5)
+    mpu_config_region(MPU_REGION_ETH, (uint32_t)&eth_dma, MPU_CONFIG_ETH(16 * 1024));
+    #else
     mpu_config_region(MPU_REGION_ETH, (uint32_t)&eth_dma, MPU_CONFIG_ETH(MPU_REGION_SIZE_16KB));
+    #endif
     mpu_config_end(irq_state);
 
     // Enable peripheral clock
-    #if defined(STM32H7)
+    #if defined(STM32H5)
+    __HAL_RCC_ETH_CLK_ENABLE();
+    __HAL_RCC_ETHTX_CLK_ENABLE();
+    __HAL_RCC_ETHRX_CLK_ENABLE();
+    __HAL_RCC_ETH_FORCE_RESET();
+    #elif defined(STM32H7)
     __HAL_RCC_ETH1MAC_CLK_ENABLE();
     __HAL_RCC_ETH1TX_CLK_ENABLE();
     __HAL_RCC_ETH1RX_CLK_ENABLE();
@@ -233,14 +258,23 @@ STATIC int eth_mac_init(eth_t *self) {
     #endif
 
     // Select RMII interface
-    #if defined(STM32H7)
+    #if defined(STM32H5)
+    __HAL_RCC_SBS_CLK_ENABLE();
+    SBS->PMCR = (SBS->PMCR & ~SBS_PMCR_ETH_SEL_PHY_Msk) | SBS_PMCR_ETH_SEL_PHY_2;
+    #elif defined(STM32H7)
     SYSCFG->PMCR = (SYSCFG->PMCR & ~SYSCFG_PMCR_EPIS_SEL_Msk) | SYSCFG_PMCR_EPIS_SEL_2;
     #else
     __HAL_RCC_SYSCFG_CLK_ENABLE();
     SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;
     #endif
 
-    #if defined(STM32H7)
+    #if defined(STM32H5)
+    __HAL_RCC_ETH_RELEASE_RESET();
+
+    __HAL_RCC_ETH_CLK_SLEEP_ENABLE();
+    __HAL_RCC_ETHTX_CLK_SLEEP_ENABLE();
+    __HAL_RCC_ETHRX_CLK_SLEEP_ENABLE();
+    #elif defined(STM32H7)
     __HAL_RCC_ETH1MAC_RELEASE_RESET();
 
     __HAL_RCC_ETH1MAC_CLK_SLEEP_ENABLE();
@@ -255,7 +289,7 @@ STATIC int eth_mac_init(eth_t *self) {
     #endif
 
     // Do a soft reset of the MAC core
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     #define ETH_SOFT_RESET(eth) do { eth->DMAMR = ETH_DMAMR_SWR; } while (0)
     #define ETH_IS_RESET(eth) (eth->DMAMR & ETH_DMAMR_SWR)
     #else
@@ -277,7 +311,23 @@ STATIC int eth_mac_init(eth_t *self) {
     // Set MII clock range
     uint32_t hclk = HAL_RCC_GetHCLKFreq();
     uint32_t cr_div;
-    #if defined(STM32H7)
+    #if defined(STM32H5)
+    cr_div = ETH->MACMDIOAR & ~ETH_MACMDIOAR_CR;
+    if (hclk < 35000000) {
+        cr_div |= ETH_MACMDIOAR_CR_DIV16;
+    } else if (hclk < 60000000) {
+        cr_div |= ETH_MACMDIOAR_CR_DIV26;
+    } else if (hclk < 100000000) {
+        cr_div |= ETH_MACMDIOAR_CR_DIV42;
+    } else if (hclk < 150000000) {
+        cr_div |= ETH_MACMDIOAR_CR_DIV62;
+    } else if (hclk < 250000000) {
+        cr_div |= ETH_MACMDIOAR_CR_DIV102;
+    } else {
+        cr_div |= ETH_MACMDIOAR_CR_DIV124;
+    }
+    ETH->MACMDIOAR = cr_div;
+    #elif defined(STM32H7)
     cr_div = ETH->MACMDIOAR & ~ETH_MACMDIOAR_CR;
     if (hclk < 35000000) {
         cr_div |= ETH_MACMDIOAR_CR_DIV16;
@@ -306,7 +356,7 @@ STATIC int eth_mac_init(eth_t *self) {
     ETH->MACMIIAR = cr_div;
     #endif
 
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     // don't skip 32bit words since our descriptors are continuous in memory
     ETH->DMACCR &= ~(ETH_DMACCR_DSL_Msk);
     #endif
@@ -351,7 +401,7 @@ STATIC int eth_mac_init(eth_t *self) {
     uint16_t phy_scsr = eth_phy_read(PHY_SCSR);
 
     // Burst mode configuration
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     ETH->DMASBMR = ETH->DMASBMR & ~ETH_DMASBMR_AAL & ~ETH_DMASBMR_FB;
     #else
     ETH->DMABMR = 0;
@@ -359,7 +409,7 @@ STATIC int eth_mac_init(eth_t *self) {
     mp_hal_delay_ms(2);
 
     // Select DMA interrupts
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     ETH->DMACIER = ETH->DMACIER
         | ETH_DMACIER_NIE // enable normal interrupts
         | ETH_DMACIER_RIE // enable RX interrupt
@@ -373,7 +423,7 @@ STATIC int eth_mac_init(eth_t *self) {
 
     // Configure RX descriptor lists
     for (size_t i = 0; i < RX_BUF_NUM; ++i) {
-        #if defined(STM32H7)
+        #if defined(STM32H5) || defined(STM32H7)
         eth_dma.rx_descr[i].rdes3 =
             1 << RX_DESCR_3_OWN_Pos
                 | (1 << RX_DESCR_3_BUF1V_Pos) // buf1 address valid
@@ -391,7 +441,7 @@ STATIC int eth_mac_init(eth_t *self) {
         #endif
     }
 
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     ETH->DMACRDLAR = (uint32_t)&eth_dma.rx_descr[0];
     #else
     ETH->DMARDLAR = (uint32_t)&eth_dma.rx_descr[0];
@@ -400,7 +450,7 @@ STATIC int eth_mac_init(eth_t *self) {
 
     // Configure TX descriptor lists
     for (size_t i = 0; i < TX_BUF_NUM; ++i) {
-        #if defined(STM32H7)
+        #if defined(STM32H5) || defined(STM32H7)
         eth_dma.tx_descr[i].tdes0 = 0;
         eth_dma.tx_descr[i].tdes1 = 0;
         eth_dma.tx_descr[i].tdes2 = TX_BUF_SIZE & TX_DESCR_2_B1L_Msk;
@@ -413,7 +463,7 @@ STATIC int eth_mac_init(eth_t *self) {
         #endif
     }
 
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     // set number of descriptors and buffers
     ETH->DMACTDRLR = TX_BUF_NUM - 1;
     ETH->DMACRDRLR = RX_BUF_NUM - 1;
@@ -425,7 +475,7 @@ STATIC int eth_mac_init(eth_t *self) {
     eth_dma.tx_descr_idx = 0;
 
     // Configure DMA
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     // read from RX FIFO only after a full frame is written
     ETH->MTLRQOMR = ETH_MTLRQOMR_RSF;
     // transmission starts when a full packet resides in the Tx queue
@@ -439,7 +489,7 @@ STATIC int eth_mac_init(eth_t *self) {
     mp_hal_delay_ms(2);
 
     // Select MAC filtering options
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     ETH->MACPFR = ETH_MACPFR_RA; // pass all frames up
     #else
     ETH->MACFFR =
@@ -472,7 +522,7 @@ STATIC int eth_mac_init(eth_t *self) {
     mp_hal_delay_ms(2);
 
     // Start DMA layer
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     ETH->DMACRCR |= ETH_DMACRCR_SR; // start RX
     ETH->DMACTCR |= ETH_DMACTCR_ST; // start TX
     #else
@@ -493,7 +543,11 @@ STATIC int eth_mac_init(eth_t *self) {
 STATIC void eth_mac_deinit(eth_t *self) {
     (void)self;
     HAL_NVIC_DisableIRQ(ETH_IRQn);
-    #if defined(STM32H7)
+    #if defined(STM32H5)
+    __HAL_RCC_ETH_FORCE_RESET();
+    __HAL_RCC_ETH_RELEASE_RESET();
+    __HAL_RCC_ETH_CLK_DISABLE();
+    #elif defined(STM32H7)
     __HAL_RCC_ETH1MAC_FORCE_RESET();
     __HAL_RCC_ETH1MAC_RELEASE_RESET();
     __HAL_RCC_ETH1MAC_CLK_DISABLE();
@@ -513,7 +567,7 @@ STATIC int eth_tx_buf_get(size_t len, uint8_t **buf) {
     eth_dma_tx_descr_t *tx_descr = &eth_dma.tx_descr[eth_dma.tx_descr_idx];
     uint32_t t0 = mp_hal_ticks_ms();
     for (;;) {
-        #if defined(STM32H7)
+        #if defined(STM32H5) || defined(STM32H7)
         if (!(tx_descr->tdes3 & (1 << TX_DESCR_3_OWN_Pos))) {
             break;
         }
@@ -527,7 +581,7 @@ STATIC int eth_tx_buf_get(size_t len, uint8_t **buf) {
         }
     }
 
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     // Update TX descriptor with length and buffer pointer
     *buf = &eth_dma.tx_buf[eth_dma.tx_descr_idx * TX_BUF_SIZE];
     tx_descr->tdes2 = len & TX_DESCR_2_B1L_Msk;
@@ -549,7 +603,7 @@ STATIC int eth_tx_buf_send(void) {
     eth_dma.tx_descr_idx = (eth_dma.tx_descr_idx + 1) % TX_BUF_NUM;
 
     // Schedule to send next outgoing frame
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     tx_descr->tdes3 =
         1 << TX_DESCR_3_OWN_Pos     // owned by DMA
             | 1 << TX_DESCR_3_LD_Pos // last segment
@@ -568,7 +622,7 @@ STATIC int eth_tx_buf_send(void) {
 
     // Notify ETH DMA that there is a new TX descriptor for sending
     __DMB();
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     if (ETH->DMACSR & ETH_DMACSR_TBU) {
         ETH->DMACSR = ETH_DMACSR_TBU;
     }
@@ -590,7 +644,7 @@ STATIC void eth_dma_rx_free(void) {
     eth_dma.rx_descr_idx = (eth_dma.rx_descr_idx + 1) % RX_BUF_NUM;
 
     // Schedule to get next incoming frame
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     rx_descr->rdes0 = (uint32_t)buf;
     rx_descr->rdes3 = 1 << RX_DESCR_3_OWN_Pos;  // owned by DMA
     rx_descr->rdes3 |= 1 << RX_DESCR_3_BUF1V_Pos; // buf 1 address valid
@@ -607,7 +661,7 @@ STATIC void eth_dma_rx_free(void) {
 
     // Notify ETH DMA that there is a new RX descriptor available
     __DMB();
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     ETH->DMACRDTPR = (uint32_t)&rx_descr[eth_dma.rx_descr_idx];
     #else
     ETH->DMARPDR = 0;
@@ -615,7 +669,7 @@ STATIC void eth_dma_rx_free(void) {
 }
 
 void ETH_IRQHandler(void) {
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     uint32_t sr = ETH->DMACSR;
     ETH->DMACSR = ETH_DMACSR_NIS;
     uint32_t rx_interrupt = sr & ETH_DMACSR_RI;
@@ -625,13 +679,13 @@ void ETH_IRQHandler(void) {
     uint32_t rx_interrupt = sr & ETH_DMASR_RS;
     #endif
     if (rx_interrupt) {
-        #if defined(STM32H7)
+        #if defined(STM32H5) || defined(STM32H7)
         ETH->DMACSR = ETH_DMACSR_RI;
         #else
         ETH->DMASR = ETH_DMASR_RS;
         #endif
         for (;;) {
-            #if defined(STM32H7)
+            #if defined(STM32H5) || defined(STM32H7)
             eth_dma_rx_descr_t *rx_descr_l = &eth_dma.rx_descr[eth_dma.rx_descr_idx];
             if (rx_descr_l->rdes3 & (1 << RX_DESCR_3_OWN_Pos)) {
                 // No more RX descriptors ready to read
@@ -646,13 +700,13 @@ void ETH_IRQHandler(void) {
             #endif
 
             // Get RX buffer containing new frame
-            #if defined(STM32H7)
+            #if defined(STM32H5) || defined(STM32H7)
             size_t len = (rx_descr_l->rdes3 & RX_DESCR_3_PL_Msk);
             #else
             size_t len = (rx_descr->rdes0 & RX_DESCR_0_FL_Msk) >> RX_DESCR_0_FL_Pos;
             #endif
             len -= 4; // discard CRC at end
-            #if defined(STM32H7)
+            #if defined(STM32H5) || defined(STM32H7)
             uint8_t *buf = &eth_dma.rx_buf[eth_dma.rx_descr_idx * RX_BUF_SIZE];
             #else
             uint8_t *buf = (uint8_t *)rx_descr->rdes2;
diff --git a/ports/stm32/mpu.h b/ports/stm32/mpu.h
index 106112073e..e95a07da91 100644
--- a/ports/stm32/mpu.h
+++ b/ports/stm32/mpu.h
@@ -26,7 +26,7 @@
 #ifndef MICROPY_INCLUDED_STM32_MPU_H
 #define MICROPY_INCLUDED_STM32_MPU_H
 
-#if defined(STM32F7) || defined(STM32H7) || defined(MICROPY_HW_ETH_MDC)
+#if (defined(STM32F4) && defined(MICROPY_HW_ETH_MDC)) || defined(STM32F7) || defined(STM32H7)
 
 #define MPU_REGION_ETH      (MPU_REGION_NUMBER0)
 #define MPU_REGION_QSPI1    (MPU_REGION_NUMBER1)
@@ -97,9 +97,16 @@ static inline void mpu_config_end(uint32_t irq_state) {
 
 #elif defined(STM32H5)
 
+#define MPU_REGION_SIG      (MPU_REGION_NUMBER0)
+#define MPU_REGION_ETH      (MPU_REGION_NUMBER1)
+
 #define ST_DEVICE_SIGNATURE_BASE (0x08fff800)
 #define ST_DEVICE_SIGNATURE_LIMIT (0x08ffffff)
 
+// STM32H5 Cortex-M33 MPU works differently from older cores.
+// Macro only takes region size in bytes, Attributes are coded in mpu_config_region().
+#define MPU_CONFIG_ETH(size) (size)
+
 static inline void mpu_init(void) {
     // Configure attribute 0, inner-outer non-cacheable (=0x44).
     __DMB();
@@ -125,6 +132,49 @@ static inline void mpu_init(void) {
     __ISB();
 }
 
+static inline uint32_t mpu_config_start(void) {
+    return disable_irq();
+}
+
+static inline void mpu_config_region(uint32_t region, uint32_t base_addr, uint32_t size) {
+    if (region == MPU_REGION_ETH) {
+        // Configure region 1 to make DMA memory non-cacheable.
+
+        __DMB();
+        // Configure attribute 1, inner-outer non-cacheable (=0x44).
+        MPU->MAIR0 = (MPU->MAIR0 & ~MPU_MAIR0_Attr1_Msk)
+            | 0x44 << MPU_MAIR0_Attr1_Pos;
+        __DMB();
+
+        // RBAR
+        //  BASE          Bits [31:5] of base address
+        //  SH[4:3]  00 = Non-shareable
+        //  AP[2:1]  01 = Read/write by any privilege level
+        //  XN[0]:    1 = No execution
+
+        // RLAR
+        //  LIMIT         Limit address. Contains bits[31:5] of the upper inclusive limit of the selected MPU memory region
+        //  AT[3:1] 001 = Attribute 1
+        //  EN[0]     1 = Enabled
+        MPU->RNR = region;
+        MPU->RBAR = (base_addr & MPU_RBAR_BASE_Msk)
+            | MPU_ACCESS_NOT_SHAREABLE << MPU_RBAR_SH_Pos
+            | MPU_REGION_ALL_RW << MPU_RBAR_AP_Pos
+            | MPU_INSTRUCTION_ACCESS_DISABLE << MPU_RBAR_XN_Pos;
+        MPU->RLAR = ((base_addr + size - 1) & MPU_RLAR_LIMIT_Msk)
+            | MPU_ATTRIBUTES_NUMBER1 << MPU_RLAR_AttrIndx_Pos
+            | MPU_REGION_ENABLE << MPU_RLAR_EN_Pos;
+    }
+    __DMB();
+}
+
+static inline void mpu_config_end(uint32_t irq_state) {
+    __ISB();
+    __DSB();
+    __DMB();
+    enable_irq(irq_state);
+}
+
 #else
 
 static inline void mpu_init(void) {

From e15882ad2bfaf342e8e966a84877f338eabd1430 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 17 Oct 2023 11:44:16 +1100
Subject: [PATCH 026/310] stm32/boards/STM32H573I_DK: Enable ETH and DAC
 peripherals.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/boards/STM32H573I_DK/manifest.py      |  2 ++
 ports/stm32/boards/STM32H573I_DK/mpconfigboard.h  | 13 ++++++++++++-
 ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk |  7 +++++++
 3 files changed, 21 insertions(+), 1 deletion(-)
 create mode 100644 ports/stm32/boards/STM32H573I_DK/manifest.py

diff --git a/ports/stm32/boards/STM32H573I_DK/manifest.py b/ports/stm32/boards/STM32H573I_DK/manifest.py
new file mode 100644
index 0000000000..ebfecd4844
--- /dev/null
+++ b/ports/stm32/boards/STM32H573I_DK/manifest.py
@@ -0,0 +1,2 @@
+include("$(PORT_DIR)/boards/manifest.py")
+require("bundle-networking")
diff --git a/ports/stm32/boards/STM32H573I_DK/mpconfigboard.h b/ports/stm32/boards/STM32H573I_DK/mpconfigboard.h
index 01064325da..fba14329a5 100644
--- a/ports/stm32/boards/STM32H573I_DK/mpconfigboard.h
+++ b/ports/stm32/boards/STM32H573I_DK/mpconfigboard.h
@@ -6,7 +6,7 @@
 #define MICROPY_HW_ENABLE_RTC               (1)
 #define MICROPY_HW_ENABLE_RNG               (1)
 #define MICROPY_HW_ENABLE_ADC               (1)
-#define MICROPY_HW_ENABLE_DAC               (0) // requires DMA
+#define MICROPY_HW_ENABLE_DAC               (1)
 #define MICROPY_HW_ENABLE_USB               (1)
 #define MICROPY_HW_HAS_SWITCH               (1)
 #define MICROPY_HW_HAS_FLASH                (1)
@@ -106,6 +106,17 @@
 #define MICROPY_HW_USB_FS                   (1)
 #define MICROPY_HW_USB_MAIN_DEV             (USB_PHY_FS_ID)
 
+// Ethernet via RMII
+#define MICROPY_HW_ETH_MDC                  (pin_C1)
+#define MICROPY_HW_ETH_MDIO                 (pin_A2)
+#define MICROPY_HW_ETH_RMII_REF_CLK         (pin_A1)
+#define MICROPY_HW_ETH_RMII_CRS_DV          (pin_A7)
+#define MICROPY_HW_ETH_RMII_RXD0            (pin_C4)
+#define MICROPY_HW_ETH_RMII_RXD1            (pin_C5)
+#define MICROPY_HW_ETH_RMII_TX_EN           (pin_G11)
+#define MICROPY_HW_ETH_RMII_TXD0            (pin_G13)
+#define MICROPY_HW_ETH_RMII_TXD1            (pin_G12)
+
 /******************************************************************************/
 // Variable and function declarations
 
diff --git a/ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk b/ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk
index 99d3923f20..9da249879b 100644
--- a/ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk
+++ b/ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk
@@ -13,3 +13,10 @@ else
 LD_FILES = boards/stm32h573xi.ld boards/common_basic.ld
 TEXT0_ADDR = 0x08000000
 endif
+
+# MicroPython settings
+MICROPY_PY_LWIP = 1
+MICROPY_PY_SSL = 1
+MICROPY_SSL_MBEDTLS = 1
+
+FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py

From 971f1cf987583d5607ec1563f9261b9b7fb0cafa Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 17 Oct 2023 12:41:47 +1100
Subject: [PATCH 027/310] stm32/powerctrl: Add support for frequency scaling
 with HSI on H5 MCUs.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/boards/pllvalues.py | 14 ++++++++++----
 ports/stm32/powerctrl.c         | 22 +++++++++++++++++++++-
 2 files changed, 31 insertions(+), 5 deletions(-)

diff --git a/ports/stm32/boards/pllvalues.py b/ports/stm32/boards/pllvalues.py
index 76320cc9c3..2db6b5f257 100644
--- a/ports/stm32/boards/pllvalues.py
+++ b/ports/stm32/boards/pllvalues.py
@@ -41,6 +41,15 @@ mcu_table = {
         range_vco_in=range(1, 2 + 1),
         range_vco_out=range(100, 432 + 1),
     ),
+    "stm32h5": MCU(
+        range_sysclk=range(2, 250 + 1, 2),
+        range_m=range(1, 63 + 1),
+        range_n=range(4, 512 + 1),
+        range_p=range(2, 128 + 1, 2),
+        range_q=range(1, 128 + 1),
+        range_vco_in=range(1, 16 + 1),
+        range_vco_out=range(150, 836 + 1),  # 150-420=medium, 192-836=wide
+    ),
     "stm32h7": MCU(
         range_sysclk=range(2, 400 + 1, 2),  # above 400MHz currently unsupported
         range_m=range(1, 63 + 1),
@@ -274,9 +283,6 @@ def main():
         hse, hsi = search_header_for_hsx_values(argv[0][5:], [None, None])
         if hse is None:
             raise ValueError("%s does not contain a definition of HSE_VALUE" % argv[0])
-        if hsi is not None and hsi > 16:
-            # Currently, a HSI value greater than 16MHz is not supported
-            hsi = None
     else:
         # HSE given directly as an integer
         hse = int(argv[0])
@@ -289,7 +295,7 @@ def main():
             break
 
     # Relax constraint on PLLQ being 48MHz on MCUs which have separate PLLs for 48MHz
-    relax_pll48 = mcu_series.startswith(("stm32f413", "stm32f7", "stm32h7"))
+    relax_pll48 = mcu_series.startswith(("stm32f413", "stm32f7", "stm32h5", "stm32h7"))
 
     hse_valid_plls = compute_pll_table(hse, relax_pll48)
     if hsi is not None:
diff --git a/ports/stm32/powerctrl.c b/ports/stm32/powerctrl.c
index 80195f04ae..03224f4d8b 100644
--- a/ports/stm32/powerctrl.c
+++ b/ports/stm32/powerctrl.c
@@ -498,6 +498,9 @@ set_clk:
     RCC_OscInitStruct.OscillatorType = MICROPY_HW_RCC_OSCILLATOR_TYPE;
     RCC_OscInitStruct.HSEState = MICROPY_HW_RCC_HSE_STATE;
     RCC_OscInitStruct.HSIState = MICROPY_HW_RCC_HSI_STATE;
+    #if defined(STM32G0) || defined(STM32H5)
+    RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
+    #endif
     RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
     RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
     RCC_OscInitStruct.PLL.PLLSource = MICROPY_HW_RCC_PLL_SRC;
@@ -506,7 +509,24 @@ set_clk:
     RCC_OscInitStruct.PLL.PLLP = p;
     RCC_OscInitStruct.PLL.PLLQ = q;
 
-    #if defined(STM32H7)
+    #if defined(STM32H5)
+    RCC_OscInitStruct.PLL.PLLR = 0;
+    if (MICROPY_HW_CLK_VALUE / 1000000 <= 2 * m) {
+        RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_0; // 1-2MHz
+    } else if (MICROPY_HW_CLK_VALUE / 1000000 <= 4 * m) {
+        RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; // 2-4MHz
+    } else if (MICROPY_HW_CLK_VALUE / 1000000 <= 8 * m) {
+        RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; // 4-8MHz
+    } else {
+        RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_3; // 8-16MHz
+    }
+    if (MICROPY_HW_CLK_VALUE / 1000000 * n <= 420 * m) {
+        RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_MEDIUM; // 150-420MHz
+    } else {
+        RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; // 192-836MHz
+    }
+    RCC_OscInitStruct.PLL.PLLFRACN = 0;
+    #elif defined(STM32H7)
     RCC_OscInitStruct.PLL.PLLR = 0;
     if (MICROPY_HW_CLK_VALUE / 1000000 <= 2 * m) {
         RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_0; // 1-2MHz

From c2361328e156a3de46aa69acdc11d111c26c5c98 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Tue, 17 Oct 2023 12:47:04 +1100
Subject: [PATCH 028/310] github/workflows: Pin ruff to 0.1.0 and change flags
 for new version.

The `--format` flag was changed to `--output-format` in the recent update.

Pin to this version to prevent further updates from breaking (e.g. through
new rules or other changes).

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 .github/workflows/ruff.yml | 4 ++--
 .pre-commit-config.yaml    | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/ruff.yml b/.github/workflows/ruff.yml
index 806d95e895..0374d766f5 100644
--- a/.github/workflows/ruff.yml
+++ b/.github/workflows/ruff.yml
@@ -6,5 +6,5 @@ jobs:
     runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
-    - run: pip install --user ruff
-    - run: ruff --format=github .
+    - run: pip install --user ruff==0.1.0
+    - run: ruff check --output-format=github .
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index e9815a4b2e..bfce6a2468 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -12,6 +12,6 @@ repos:
         verbose: true
         stages: [commit-msg]
   - repo: https://github.com/charliermarsh/ruff-pre-commit
-    rev: v0.0.265
+    rev: v0.1.0
     hooks:
       - id: ruff

From 64ad6764240e5cf59a8c38272226569fdbf8071d Mon Sep 17 00:00:00 2001
From: "Kwabena W. Agyeman" <kwagyeman@live.com>
Date: Mon, 21 Aug 2023 20:03:52 -0700
Subject: [PATCH 029/310] mimxrt/boards: Define missing SNVS pins for all
 processors.

Signed-off-by: "Kwabena W. Agyeman" <kwagyeman@live.com>
---
 ports/mimxrt/boards/MIMXRT1011_af.csv | 1 +
 ports/mimxrt/boards/MIMXRT1015_af.csv | 1 +
 ports/mimxrt/boards/MIMXRT1021_af.csv | 1 +
 ports/mimxrt/boards/MIMXRT1052_af.csv | 3 +++
 ports/mimxrt/boards/MIMXRT1062_af.csv | 6 +++---
 ports/mimxrt/boards/MIMXRT1064_af.csv | 3 +++
 ports/mimxrt/boards/MIMXRT1176_af.csv | 2 ++
 ports/mimxrt/boards/make-pins.py      | 6 ++++--
 8 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/ports/mimxrt/boards/MIMXRT1011_af.csv b/ports/mimxrt/boards/MIMXRT1011_af.csv
index 11dd085463..be8a9c634d 100644
--- a/ports/mimxrt/boards/MIMXRT1011_af.csv
+++ b/ports/mimxrt/boards/MIMXRT1011_af.csv
@@ -42,3 +42,4 @@ GPIO_SD_10,FLEXSPI_A_SCLK,LPSPI2_SDO,LPUART2_TXD,,FLEXIO1_IO16,GPIO2_IO10,,,,,,,
 GPIO_SD_11,FLEXSPI_A_DATA3,LPSPI2_SCK,LPUART1_RXD,,FLEXIO1_IO17,GPIO2_IO11,WDOG1_RST_B_DEB,,,,,,ALT5
 GPIO_SD_12,FLEXSPI_A_DQS,LPSPI2_PCS0,LPUART1_TXD,,FLEXIO1_IO18,GPIO2_IO12,WDOG2_RST_B_DEB,,,,,,ALT5
 GPIO_SD_13,FLEXSPI_B_SCLK,SAI3_RX_BCLK,ARM_CM7_TXEV,CCM_PMIC_RDY,FLEXIO1_IO19,GPIO2_IO13,SRC_BT_CFG3,,,,,,ALT5
+PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO00,,,,,,,ALT0
diff --git a/ports/mimxrt/boards/MIMXRT1015_af.csv b/ports/mimxrt/boards/MIMXRT1015_af.csv
index d988662583..0d2504733c 100644
--- a/ports/mimxrt/boards/MIMXRT1015_af.csv
+++ b/ports/mimxrt/boards/MIMXRT1015_af.csv
@@ -55,3 +55,4 @@ GPIO_SD_B1_08,,FLEXSPI_A_DATA0,,SAI3_TX_DATA,LPSPI2_SDO,GPIO3_IO28,,,,,,,ALT5
 GPIO_SD_B1_09,,FLEXSPI_A_DATA2,,SAI3_RX_BCLK,LPSPI2_SDI,GPIO3_IO29,CCM_REF_EN_B,,,,,,ALT5
 GPIO_SD_B1_10,,FLEXSPI_A_DATA1,,SAI3_RX_SYNC,LPSPI2_PCS2,GPIO3_IO30,SRC_SYSTEM_RESET,,,,,,ALT5
 GPIO_SD_B1_11,,FLEXSPI_A_SS0_B,,SAI3_RX_DATA,LPSPI2_PCS3,GPIO3_IO31,SRC_EARLY_RESET,,,,,,ALT5
+PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0
diff --git a/ports/mimxrt/boards/MIMXRT1021_af.csv b/ports/mimxrt/boards/MIMXRT1021_af.csv
index 3ce38eb0b9..79ef29927c 100644
--- a/ports/mimxrt/boards/MIMXRT1021_af.csv
+++ b/ports/mimxrt/boards/MIMXRT1021_af.csv
@@ -92,3 +92,4 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,ENET_RX_ER,SAI3_TX_DATA,LPSPI2_SDO,GP
 GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA2,ENET_TX_EN,SAI3_RX_BCLK,LPSPI2_SDI,GPIO3_IO29,CCM_REF_EN_B,,,,,,ALT5
 GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA1,ENET_TX_DATA0,SAI3_RX_SYNC,LPSPI2_PCS2,GPIO3_IO30,SRC_SYSTEM_RESET,,,,,,ALT5
 GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_SS0_B,ENET_TX_DATA1,SAI3_RX_DATA,LPSPI2_PCS3,GPIO3_IO31,SRC_EARLY_RESET,,,,,,ALT5
+PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0
diff --git a/ports/mimxrt/boards/MIMXRT1052_af.csv b/ports/mimxrt/boards/MIMXRT1052_af.csv
index 754bf4ab7b..ee11a12cfd 100644
--- a/ports/mimxrt/boards/MIMXRT1052_af.csv
+++ b/ports/mimxrt/boards/MIMXRT1052_af.csv
@@ -123,3 +123,6 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,LPUART7_TXD,SAI1_TX_BCLK,LPSPI2_SOUT,
 GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA1,LPUART7_RXD,SAI1_TX_SYNC,LPSPI2_SIN,GPIO3_IO09,,,,,,,ALT5
 GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA2,LPUART2_RXD,LPI2C2_SDA,LPSPI2_PCS2,GPIO3_IO10,,,,,,,ALT5
 GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_DATA3,LPUART2_TXD,LPI2C2_SCL,LPSPI2_PCS3,GPIO3_IO11,,,,,,,ALT5
+WAKEUP,,,,,,GPIO5_IO00,,NMI_GLUE_NMI,,,,,ALT5
+PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0
+PMIC_STBY_REQ,CCM_PMIC_VSTBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0
diff --git a/ports/mimxrt/boards/MIMXRT1062_af.csv b/ports/mimxrt/boards/MIMXRT1062_af.csv
index d2f0b22023..9af33137ab 100644
--- a/ports/mimxrt/boards/MIMXRT1062_af.csv
+++ b/ports/mimxrt/boards/MIMXRT1062_af.csv
@@ -123,6 +123,6 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,LPUART7_TXD,SAI1_TX_BCLK,LPSPI2_SOUT,
 GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA1,LPUART7_RXD,SAI1_TX_SYNC,LPSPI2_SIN,GPIO3_IO09,,,,,,,ALT5
 GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA2,LPUART2_RXD,LPI2C2_SDA,LPSPI2_PCS2,GPIO3_IO10,,,,,,,ALT5
 GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_DATA3,LPUART2_TXD,LPI2C2_SCL,LPSPI2_PCS3,GPIO3_IO11,,,,,,,ALT5
-WAKEUP,,,,,,GPIO5_IO00,,NMI,,,,,ALT5
-PMIC_ON_REQ,SNVS_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0
-PMIC_STBY_REQ,CCM_PMIC_STBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0
+WAKEUP,,,,,,GPIO5_IO00,,NMI_GLUE_NMI,,,,,ALT5
+PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0
+PMIC_STBY_REQ,CCM_PMIC_VSTBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0
diff --git a/ports/mimxrt/boards/MIMXRT1064_af.csv b/ports/mimxrt/boards/MIMXRT1064_af.csv
index 074a3f69ab..bcd063ff3d 100644
--- a/ports/mimxrt/boards/MIMXRT1064_af.csv
+++ b/ports/mimxrt/boards/MIMXRT1064_af.csv
@@ -123,3 +123,6 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,LPUART7_TXD,SAI1_TX_BCLK,LPSPI2_SOUT,
 GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA1,LPUART7_RXD,SAI1_TX_SYNC,LPSPI2_SIN,GPIO3_IO09,,,,,,,ALT5
 GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA2,LPUART2_RXD,LPI2C2_SDA,LPSPI2_PCS2,GPIO3_IO10,,,,,,,ALT5
 GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_DATA3,LPUART2_TXD,LPI2C2_SCL,LPSPI2_PCS3,GPIO3_IO11,,,,,,,ALT5
+WAKEUP,,,,,,GPIO5_IO00,,NMI_GLUE_NMI,,,,,ALT5
+PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0
+PMIC_STBY_REQ,CCM_PMIC_VSTBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0
diff --git a/ports/mimxrt/boards/MIMXRT1176_af.csv b/ports/mimxrt/boards/MIMXRT1176_af.csv
index 21fd2a2417..5e99a49003 100644
--- a/ports/mimxrt/boards/MIMXRT1176_af.csv
+++ b/ports/mimxrt/boards/MIMXRT1176_af.csv
@@ -107,6 +107,8 @@ GPIO_LPSR_13,JTAG_MUX_MOD,MIC_BITSTREAM1,PIT2_TRIGGER1,,,GPIO6_IO13,,SAI4_RX_DAT
 GPIO_LPSR_14,JTAG_MUX_TCK,MIC_BITSTREAM2,PIT2_TRIGGER2,,,GPIO6_IO14,,SAI4_RX_BCLK,LPSPI5_SOUT,,GPIO12_IO14,,,
 GPIO_LPSR_15,JTAG_MUX_TMS,MIC_BITSTREAM3,PIT2_TRIGGER3,,,GPIO6_IO15,,SAI4_RX_SYNC,LPSPI5_SIN,,GPIO12_IO15,,,
 WAKEUP_DIG,,,,,,GPIO13_IO00,,NMI_GLUE_NMI,,,,,,
+PMIC_ON_REQ_DIG,SNVS_LP_PMIC_ON_REQ,,,,,GPIO13_IO01,,,,,,,,
+PMIC_STBY_REQ_DIG,CCM_PMIC_VSTBY_REQ,,,,,GPIO13_IO02,,,,,,,,
 GPIO_DISP_B1_00,VIDEO_MUX_LCDIF_CLK,ENET_1G_RX_EN,,TMR1_TIMER0,XBAR1_INOUT26,GPIO4_IO21,,,ENET_QOS_RX_EN,,GPIO10_IO21,,,
 GPIO_DISP_B1_01,VIDEO_MUX_LCDIF_ENABLE,ENET_1G_RX_CLK,ENET_1G_RX_ER,TMR1_TIMER1,XBAR1_INOUT27,GPIO4_IO22,,,ENET_QOS_RX_CLK,ENET_QOS_RX_ER,GPIO10_IO22,,,
 GPIO_DISP_B1_02,VIDEO_MUX_LCDIF_HSYNC,ENET_1G_RX_DATA00,LPI2C3_SCL,TMR1_TIMER2,XBAR1_INOUT28,GPIO4_IO23,,,ENET_QOS_RX_DATA00,LPUART1_TXD,GPIO10_IO23,,,
diff --git a/ports/mimxrt/boards/make-pins.py b/ports/mimxrt/boards/make-pins.py
index 51ae9eb717..5795e2f042 100644
--- a/ports/mimxrt/boards/make-pins.py
+++ b/ports/mimxrt/boards/make-pins.py
@@ -25,8 +25,8 @@ regexes = [
     r"IOMUXC_(?P<pin>GPIO_DISP_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
     r"IOMUXC_(?P<pin>GPIO_LPSR_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
     r"IOMUXC_[SNVS_]*(?P<pin>WAKEUP[_DIG]*)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
-    r"IOMUXC_SNVS_(?P<pin>PMIC_ON_REQ)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
-    r"IOMUXC_SNVS_(?P<pin>PMIC_STBY_REQ)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
+    r"IOMUXC_[SNVS_]*(?P<pin>PMIC_ON_REQ[_DIG]*)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
+    r"IOMUXC_[SNVS_]*(?P<pin>PMIC_STBY_REQ[_DIG]*)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
     r"IOMUXC_(?P<pin>GPIO_SNVS_\d\d_DIG)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
 ]
 
@@ -152,7 +152,9 @@ class Pin(object):
                 "WAKEUP": "PIN_SNVS",
                 "WAKEUP_DIG": "PIN_SNVS",
                 "PMIC_ON_REQ": "PIN_SNVS",
+                "PMIC_ON_REQ_DIG": "PIN_SNVS",
                 "PMIC_STBY_REQ": "PIN_SNVS",
+                "PMIC_STBY_REQ_DIG": "PIN_SNVS",
             }
 
             print(

From 433158076fba1de8dd48494dc35c3c3d1cd251e0 Mon Sep 17 00:00:00 2001
From: "Kwabena W. Agyeman" <kwagyeman@live.com>
Date: Thu, 10 Aug 2023 11:16:19 -0700
Subject: [PATCH 030/310] mimxrt/machine_rtc: Add RTC alarm/wakeup
 functionality.

Following the documented Python machine.RTC API.

Signed-off-by: "Kwabena W. Agyeman" <kwagyeman@live.com>
---
 ports/mimxrt/machine_rtc.c | 224 ++++++++++++++++++++++++++++++++++++-
 ports/mimxrt/main.c        |   1 +
 ports/mimxrt/modmachine.h  |   1 +
 3 files changed, 225 insertions(+), 1 deletion(-)

diff --git a/ports/mimxrt/machine_rtc.c b/ports/mimxrt/machine_rtc.c
index 54a19dacb4..2a28005301 100644
--- a/ports/mimxrt/machine_rtc.c
+++ b/ports/mimxrt/machine_rtc.c
@@ -25,16 +25,117 @@
  * THE SOFTWARE.
  */
 
+#include "py/mperrno.h"
 #include "py/runtime.h"
+#include "shared/runtime/mpirq.h"
 #include "shared/timeutils/timeutils.h"
 #include "modmachine.h"
 #include "ticks.h"
 #include "fsl_snvs_lp.h"
 #include "fsl_snvs_hp.h"
 
+STATIC mp_int_t timeout = 0;
+
+void machine_rtc_alarm_clear_en(void) {
+    SNVS_LP_SRTC_DisableInterrupts(SNVS, SNVS_LPCR_LPTA_EN_MASK);
+    while (SNVS->LPCR & SNVS_LPCR_LPTA_EN_MASK) {
+    }
+}
+
+void machine_rtc_alarm_set_en() {
+    SNVS_LP_SRTC_EnableInterrupts(SNVS, SNVS_LPCR_LPTA_EN_MASK);
+    while (!(SNVS->LPCR & SNVS_LPCR_LPTA_EN_MASK)) {
+    }
+}
+
+void machine_rtc_alarm_off(bool clear) {
+    machine_rtc_alarm_clear_en();
+    DisableIRQ(SNVS_HP_WRAPPER_IRQn);
+
+    if (clear) {
+        SNVS->LPTAR = 0;
+        timeout = 0;
+        SNVS->LPSR = SNVS_LPSR_LPTA_MASK;
+    }
+}
+
+void machine_rtc_alarm_on() {
+    EnableIRQ(SNVS_HP_WRAPPER_IRQn);
+    machine_rtc_alarm_set_en();
+}
+
+uint32_t machine_rtc_get_seconds() {
+    uint32_t seconds = 0;
+    uint32_t tmp = 0;
+
+    // Do consecutive reads until value is correct
+    do {
+        seconds = tmp;
+        tmp = (SNVS->LPSRTCMR << 17U);
+        tmp |= (SNVS->LPSRTCLR >> 15U);
+    } while (tmp != seconds);
+
+    return seconds;
+}
+
+void machine_rtc_alarm_helper(int seconds, bool repeat) {
+    machine_rtc_alarm_off(true);
+
+    SNVS->LPTAR = machine_rtc_get_seconds() + seconds;
+
+    if (repeat) {
+        timeout = seconds;
+    }
+
+    machine_rtc_alarm_on();
+}
+
+typedef struct _machine_rtc_irq_obj_t {
+    mp_irq_obj_t base;
+} machine_rtc_irq_obj_t;
+
+STATIC mp_uint_t machine_rtc_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) {
+    new_trigger /= 1000;
+    if (!new_trigger) {
+        machine_rtc_alarm_off(true);
+    } else {
+        machine_rtc_alarm_helper(new_trigger, true);
+    }
+    return 0;
+}
+
+STATIC mp_uint_t machine_rtc_irq_info(mp_obj_t self_in, mp_uint_t info_type) {
+    return 0;
+}
+
+STATIC const mp_irq_methods_t machine_rtc_irq_methods = {
+    .trigger = machine_rtc_irq_trigger,
+    .info = machine_rtc_irq_info,
+};
+
+void SNVS_HP_WRAPPER_IRQHandler(void) {
+    if (SNVS->LPSR & SNVS_LPSR_LPTA_MASK) {
+        SNVS->LPSR = SNVS_LPSR_LPTA_MASK;
+        machine_rtc_irq_obj_t *irq = MP_STATE_PORT(machine_rtc_irq_object);
+        if (irq != NULL) {
+            mp_irq_handler(&irq->base);
+        }
+        if (timeout > 0) {
+            machine_rtc_alarm_clear_en();
+            SNVS->LPTAR += timeout;
+            machine_rtc_alarm_set_en();
+        }
+    }
+}
+
+// Deinit rtc IRQ handler.
+void machine_rtc_irq_deinit(void) {
+    machine_rtc_alarm_off(true);
+    MP_STATE_PORT(machine_rtc_irq_object) = NULL;
+}
+
 typedef struct _machine_rtc_obj_t {
     mp_obj_base_t base;
-    mp_obj_t callback;
 } machine_rtc_obj_t;
 
 // Singleton RTC object.
@@ -163,11 +264,130 @@ STATIC mp_obj_t machine_rtc_calibration(mp_obj_t self_in, mp_obj_t cal_in) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_rtc_calibration_obj, machine_rtc_calibration);
 
+STATIC mp_obj_t machine_rtc_alarm(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    STATIC const mp_arg_t allowed_args[] = {
+        { MP_QSTR_id,                            MP_ARG_INT,  {.u_int = 0} },
+        { MP_QSTR_time,                          MP_ARG_OBJ,  {.u_obj = mp_const_none} },
+        { MP_QSTR_repeat,     MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
+    };
+
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args);
+
+    // check the alarm id
+    if (args[0].u_int != 0) {
+        mp_raise_OSError(MP_ENODEV);
+    }
+
+    mp_int_t seconds = 0;
+    snvs_lp_srtc_datetime_t srtc_date;
+    bool repeat = args[2].u_bool;
+    if (mp_obj_is_type(args[1].u_obj, &mp_type_tuple)) { // datetime tuple given
+        // repeat cannot be used with a datetime tuple
+        if (repeat) {
+            mp_raise_ValueError(MP_ERROR_TEXT("invalid argument(s) value"));
+        }
+        // Set date and time.
+        mp_obj_t *items;
+        mp_int_t year;
+        mp_obj_get_array_fixed_n(args[1].u_obj, 8, &items);
+
+        year = mp_obj_get_int(items[0]);
+        srtc_date.year = year >= 100 ? year : year + 2000; // allow 21 for 2021
+        srtc_date.month = mp_obj_get_int(items[1]);
+        srtc_date.day = mp_obj_get_int(items[2]);
+        // Ignore weekday at items[3]
+        srtc_date.hour = mp_obj_get_int(items[4]);
+        srtc_date.minute = mp_obj_get_int(items[5]);
+        srtc_date.second = mp_obj_get_int(items[6]);
+        machine_rtc_alarm_off(true);
+        if (SNVS_LP_SRTC_SetAlarm(SNVS, &srtc_date) != kStatus_Success) {
+            mp_raise_ValueError(NULL);
+        }
+        machine_rtc_alarm_on();
+    } else { // then it must be an integer
+        seconds = (args[1].u_obj == mp_const_none) ? 0 : (mp_obj_get_int(args[1].u_obj) / 1000);
+        machine_rtc_alarm_helper(seconds, repeat);
+    }
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_rtc_alarm_obj, 1, machine_rtc_alarm);
+
+STATIC mp_obj_t machine_rtc_alarm_left(size_t n_args, const mp_obj_t *args) {
+    // only alarm id 0 is available
+    if (n_args > 1 && mp_obj_get_int(args[1]) != 0) {
+        mp_raise_OSError(MP_ENODEV);
+    }
+    uint32_t seconds = machine_rtc_get_seconds();
+    uint32_t alarmSeconds = SNVS->LPTAR;
+    return mp_obj_new_int((alarmSeconds >= seconds) ? ((alarmSeconds - seconds) * 1000) : 0);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_rtc_alarm_left_obj, 1, 2, machine_rtc_alarm_left);
+
+STATIC mp_obj_t machine_rtc_alarm_cancel(size_t n_args, const mp_obj_t *args) {
+    // only alarm id 0 is available
+    if (n_args > 1 && mp_obj_get_int(args[1]) != 0) {
+        mp_raise_OSError(MP_ENODEV);
+    }
+    machine_rtc_alarm_off(true);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_rtc_alarm_cancel_obj, 1, 2, machine_rtc_alarm_cancel);
+
+STATIC mp_obj_t machine_rtc_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    enum { ARG_trigger, ARG_handler, ARG_wake, ARG_hard };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_trigger, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_handler, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
+        { MP_QSTR_wake, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} },
+    };
+
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // check we want alarm0
+    if (args[ARG_trigger].u_int != 0) {
+        mp_raise_OSError(MP_ENODEV);
+    }
+
+    machine_rtc_irq_obj_t *irq = MP_STATE_PORT(machine_rtc_irq_object);
+
+    // Allocate the IRQ object if it doesn't already exist.
+    if (irq == NULL) {
+        irq = m_new_obj(machine_rtc_irq_obj_t);
+        irq->base.base.type = &mp_irq_type;
+        irq->base.methods = (mp_irq_methods_t *)&machine_rtc_irq_methods;
+        irq->base.parent = MP_OBJ_FROM_PTR(pos_args[0]);
+        irq->base.handler = mp_const_none;
+        irq->base.ishard = args[ARG_hard].u_bool;
+        MP_STATE_PORT(machine_rtc_irq_object) = irq;
+    }
+
+    machine_rtc_alarm_off(false);
+
+    irq->base.handler = args[ARG_handler].u_obj;
+
+    if (SNVS->LPTAR) {
+        machine_rtc_alarm_on();
+    }
+
+    return MP_OBJ_FROM_PTR(irq);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_rtc_irq_obj, 1, machine_rtc_irq);
+
 STATIC const mp_rom_map_elem_t machine_rtc_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_rtc_init_obj) },
     { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&machine_rtc_datetime_obj) },
     { MP_ROM_QSTR(MP_QSTR_now), MP_ROM_PTR(&machine_rtc_now_obj) },
     { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&machine_rtc_calibration_obj) },
+    { MP_ROM_QSTR(MP_QSTR_alarm), MP_ROM_PTR(&machine_rtc_alarm_obj) },
+    { MP_ROM_QSTR(MP_QSTR_alarm_left), MP_ROM_PTR(&machine_rtc_alarm_left_obj) },
+    { MP_ROM_QSTR(MP_QSTR_alarm_cancel), MP_ROM_PTR(&machine_rtc_alarm_cancel_obj) },
+    { MP_ROM_QSTR(MP_QSTR_cancel), MP_ROM_PTR(&machine_rtc_alarm_cancel_obj) },
+    { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_rtc_irq_obj) },
+    { MP_ROM_QSTR(MP_QSTR_ALARM0), MP_ROM_INT(0) },
 };
 STATIC MP_DEFINE_CONST_DICT(machine_rtc_locals_dict, machine_rtc_locals_dict_table);
 
@@ -178,3 +398,5 @@ MP_DEFINE_CONST_OBJ_TYPE(
     make_new, machine_rtc_make_new,
     locals_dict, &machine_rtc_locals_dict
     );
+
+MP_REGISTER_ROOT_POINTER(void *machine_rtc_irq_object);
diff --git a/ports/mimxrt/main.c b/ports/mimxrt/main.c
index f5d57d530e..376d72f197 100644
--- a/ports/mimxrt/main.c
+++ b/ports/mimxrt/main.c
@@ -141,6 +141,7 @@ int main(void) {
     soft_reset_exit:
         mp_printf(MP_PYTHON_PRINTER, "MPY: soft reboot\n");
         machine_pin_irq_deinit();
+        machine_rtc_irq_deinit();
         #if MICROPY_PY_MACHINE_I2S
         machine_i2s_deinit_all();
         #endif
diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h
index 904419df2c..d00d2031c4 100644
--- a/ports/mimxrt/modmachine.h
+++ b/ports/mimxrt/modmachine.h
@@ -42,6 +42,7 @@ extern const mp_obj_type_t machine_wdt_type;
 
 void machine_adc_init(void);
 void machine_pin_irq_deinit(void);
+void machine_rtc_irq_deinit(void);
 void machine_pwm_deinit_all(void);
 void machine_uart_deinit_all(void);
 void machine_timer_init_PIT(void);

From e78471416bc77d5355e2181047e57f1e45d3654c Mon Sep 17 00:00:00 2001
From: "Kwabena W. Agyeman" <kwagyeman@live.com>
Date: Thu, 10 Aug 2023 11:18:48 -0700
Subject: [PATCH 031/310] mimxrt/modmachine: Add support for machine.deepsleep.

Signed-off-by: "Kwabena W. Agyeman" <kwagyeman@live.com>
---
 ports/mimxrt/Makefile      |  1 +
 ports/mimxrt/machine_rtc.c |  8 +++++++
 ports/mimxrt/modmachine.c  | 46 ++++++++++++++++++++++++++++++++++++++
 ports/mimxrt/modmachine.h  |  2 +-
 4 files changed, 56 insertions(+), 1 deletion(-)

diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index f44518a8aa..3521f92288 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -128,6 +128,7 @@ SRC_HAL_IMX_C += \
 	$(MCU_DIR)/drivers/fsl_edma.c \
 	$(MCU_DIR)/drivers/fsl_flexram.c \
 	$(MCU_DIR)/drivers/fsl_flexspi.c \
+	$(MCU_DIR)/drivers/fsl_gpc.c \
 	$(MCU_DIR)/drivers/fsl_gpio.c \
 	$(MCU_DIR)/drivers/fsl_gpt.c \
 	$(MCU_DIR)/drivers/fsl_lpi2c.c \
diff --git a/ports/mimxrt/machine_rtc.c b/ports/mimxrt/machine_rtc.c
index 2a28005301..169ec6b910 100644
--- a/ports/mimxrt/machine_rtc.c
+++ b/ports/mimxrt/machine_rtc.c
@@ -50,7 +50,11 @@ void machine_rtc_alarm_set_en() {
 
 void machine_rtc_alarm_off(bool clear) {
     machine_rtc_alarm_clear_en();
+    #ifdef MIMXRT117x_SERIES
+    DisableIRQ(SNVS_HP_NON_TZ_IRQn);
+    #else
     DisableIRQ(SNVS_HP_WRAPPER_IRQn);
+    #endif
 
     if (clear) {
         SNVS->LPTAR = 0;
@@ -60,7 +64,11 @@ void machine_rtc_alarm_off(bool clear) {
 }
 
 void machine_rtc_alarm_on() {
+    #ifdef MIMXRT117x_SERIES
+    EnableIRQ(SNVS_HP_NON_TZ_IRQn);
+    #else
     EnableIRQ(SNVS_HP_WRAPPER_IRQn);
+    #endif
     machine_rtc_alarm_set_en();
 }
 
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index 423a67d609..16eae22029 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -37,6 +37,12 @@
 #include "led.h"
 #include "pin.h"
 #include "modmachine.h"
+#include "fsl_gpc.h"
+#ifdef MIMXRT117x_SERIES
+#include "fsl_soc_src.h"
+#else
+#include "fsl_src.h"
+#endif
 #include "fsl_wdog.h"
 #if FSL_FEATURE_BOOT_ROM_HAS_ROMAPI
 #include "fsl_romapi.h"
@@ -74,6 +80,14 @@ STATIC mp_obj_t machine_reset(void) {
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 STATIC mp_obj_t machine_reset_cause(void) {
+    #ifdef MIMXRT117x_SERIES
+    uint32_t user_reset_flag = kSRC_M7CoreIppUserResetFlag;
+    #else
+    uint32_t user_reset_flag = kSRC_IppUserResetFlag;
+    #endif
+    if (SRC->SRSR & user_reset_flag) {
+        return MP_OBJ_NEW_SMALL_INT(MP_DEEPSLEEP_RESET);
+    }
     uint16_t reset_cause =
         WDOG_GetStatusFlags(WDOG1) & (kWDOG_PowerOnResetFlag | kWDOG_TimeoutResetFlag | kWDOG_SoftwareResetFlag);
     if (reset_cause == kWDOG_PowerOnResetFlag) {
@@ -98,6 +112,37 @@ STATIC mp_obj_t machine_idle(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
+STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+    if (n_args != 0) {
+        mp_int_t seconds = mp_obj_get_int(args[0]) / 1000;
+        if (seconds > 0) {
+            machine_rtc_alarm_helper(seconds, false);
+            #ifdef MIMXRT117x_SERIES
+            GPC_CM_EnableIrqWakeup(GPC_CPU_MODE_CTRL_0, SNVS_HP_NON_TZ_IRQn, true);
+            #else
+            GPC_EnableIRQ(GPC, SNVS_HP_WRAPPER_IRQn);
+            #endif
+        }
+    }
+
+    #ifdef MIMXRT117x_SERIES
+    machine_pin_config(&pin_WAKEUP_DIG, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5);
+    GPC_CM_EnableIrqWakeup(GPC_CPU_MODE_CTRL_0, GPIO13_Combined_0_31_IRQn, true);
+    #elif defined IOMUXC_SNVS_WAKEUP_GPIO5_IO00
+    machine_pin_config(&pin_WAKEUP, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5);
+    GPC_EnableIRQ(GPC, GPIO5_Combined_0_15_IRQn);
+    #endif
+
+    SNVS->LPCR |= SNVS_LPCR_TOP_MASK;
+
+    while (true) {
+        ;
+    }
+
+    return mp_const_none;
+}
+MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
+
 STATIC mp_obj_t machine_disable_irq(void) {
     uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
     return mp_obj_new_int(state);
@@ -162,6 +207,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
 
     { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) },
+    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) },
 
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) },
     { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) },
diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h
index d00d2031c4..478b1c7736 100644
--- a/ports/mimxrt/modmachine.h
+++ b/ports/mimxrt/modmachine.h
@@ -51,7 +51,7 @@ void mimxrt_sdram_init(void);
 void machine_i2s_init0();
 void machine_i2s_deinit_all(void);
 void machine_rtc_start(void);
-
+void machine_rtc_alarm_helper(int seconds, bool repeat);
 void machine_uart_set_baudrate(mp_obj_t uart, uint32_t baudrate);
 
 #endif // MICROPY_INCLUDED_MIMXRT_MODMACHINE_H

From 3883f29485fad21105f6f965d56bfec842b8cfbb Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Tue, 17 Oct 2023 12:27:49 +1100
Subject: [PATCH 032/310] py/modthread: Initialise nlr_jump_callback_top on
 threads.

The main thread gets this because the thread state is in bss, but
subsequent threads need this field to be initialised.

Also added a note to mpstate.h to help avoid missing this in the future.

Fixes issue #12695.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 py/modthread.c | 1 +
 py/mpstate.h   | 6 ++++--
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/py/modthread.c b/py/modthread.c
index 6b75474904..e4dcccd259 100644
--- a/py/modthread.c
+++ b/py/modthread.c
@@ -174,6 +174,7 @@ STATIC void *thread_entry(void *args_in) {
     // The GC starts off unlocked on this thread.
     ts.gc_lock_depth = 0;
 
+    ts.nlr_jump_callback_top = NULL;
     ts.mp_pending_exception = MP_OBJ_NULL;
 
     // set locals and globals from the calling context
diff --git a/py/mpstate.h b/py/mpstate.h
index 64915ab87d..0e0388e410 100644
--- a/py/mpstate.h
+++ b/py/mpstate.h
@@ -249,8 +249,10 @@ typedef struct _mp_state_vm_t {
     #endif
 } mp_state_vm_t;
 
-// This structure holds state that is specific to a given thread.
-// Everything in this structure is scanned for root pointers.
+// This structure holds state that is specific to a given thread. Everything
+// in this structure is scanned for root pointers.  Anything added to this
+// structure must have corresponding initialisation added to thread_entry (in
+// py/modthread.c).
 typedef struct _mp_state_thread_t {
     // Stack top at the start of program
     char *stack_top;

From 86c7b957a85d69ffb19bc6e4db719e902abd3fc1 Mon Sep 17 00:00:00 2001
From: Seon Rozenblum <seon@unexpectedmaker.com>
Date: Thu, 19 Oct 2023 18:13:54 +1100
Subject: [PATCH 033/310] esp32/boards: Update UM board image names for
 consistency.

Signed-off-by: Seon Rozenblum <seon@unexpectedmaker.com>
---
 ports/esp32/boards/UM_FEATHERS2NEO/board.json | 2 +-
 ports/esp32/boards/UM_TINYPICO/board.json     | 2 +-
 ports/esp32/boards/UM_TINYS2/board.json       | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/ports/esp32/boards/UM_FEATHERS2NEO/board.json b/ports/esp32/boards/UM_FEATHERS2NEO/board.json
index dfa1f46dc3..5b79d3195a 100644
--- a/ports/esp32/boards/UM_FEATHERS2NEO/board.json
+++ b/ports/esp32/boards/UM_FEATHERS2NEO/board.json
@@ -17,7 +17,7 @@
         "5x5 RGB LED Matrix"
     ],
     "images": [
-        "FeatherS2_Neo_White_Product2.jpg"
+        "unexpectedmaker_feathers2neo.jpg"
     ],
     "mcu": "esp32s2",
     "product": "Feather S2 Neo",
diff --git a/ports/esp32/boards/UM_TINYPICO/board.json b/ports/esp32/boards/UM_TINYPICO/board.json
index bf0b3d2c8c..6dbe762f3a 100644
--- a/ports/esp32/boards/UM_TINYPICO/board.json
+++ b/ports/esp32/boards/UM_TINYPICO/board.json
@@ -16,7 +16,7 @@
         "TinyPICO Compatible"
     ],
     "images": [
-        "tinypico-v2-both.jpg"
+        "unexpectedmaker_tinypico.jpg"
     ],
     "mcu": "esp32",
     "product": "TinyPICO",
diff --git a/ports/esp32/boards/UM_TINYS2/board.json b/ports/esp32/boards/UM_TINYS2/board.json
index 1b4c934dfa..9bbf9058bb 100644
--- a/ports/esp32/boards/UM_TINYS2/board.json
+++ b/ports/esp32/boards/UM_TINYS2/board.json
@@ -16,7 +16,7 @@
         "TinyPICO Compatible"
     ],
     "images": [
-        "TinyS2+Product+Shot.jpg"
+        "unexpectedmaker_tinys2.jpg"
     ],
     "mcu": "esp32s2",
     "product": "Tiny S2",

From e3ba6f952bda153cfc3389eb48c7645d71b2b094 Mon Sep 17 00:00:00 2001
From: Christian Walther <cwalther@gmx.ch>
Date: Mon, 31 Jul 2023 18:25:26 +0200
Subject: [PATCH 034/310] extmod/vfs_posix: Fix relative root path.

A VfsPosix created with a relative root path would get confused when
chdir() was called on it and become unable to properly resolve absolute
paths, because changing directories effectively shifted its root. The
simplest fix for that would be to say "don't do that", but since the
unit tests themselves do it, fix it by making a relative path absolute
before storing it.

Signed-off-by: Christian Walther <cwalther@gmx.ch>
---
 extmod/vfs_posix.c            | 26 +++++++++++++++++++++++++-
 tests/extmod/vfs_posix.py     | 13 +++++++++++++
 tests/extmod/vfs_posix.py.exp |  1 +
 3 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/extmod/vfs_posix.c b/extmod/vfs_posix.c
index d63bb5be7b..1505682f11 100644
--- a/extmod/vfs_posix.c
+++ b/extmod/vfs_posix.c
@@ -46,6 +46,9 @@
 #ifdef _MSC_VER
 #include <direct.h> // For mkdir etc.
 #endif
+#ifdef _WIN32
+#include <windows.h>
+#endif
 
 typedef struct _mp_obj_vfs_posix_t {
     mp_obj_base_t base;
@@ -107,7 +110,28 @@ STATIC mp_obj_t vfs_posix_make_new(const mp_obj_type_t *type, size_t n_args, siz
     mp_obj_vfs_posix_t *vfs = mp_obj_malloc(mp_obj_vfs_posix_t, type);
     vstr_init(&vfs->root, 0);
     if (n_args == 1) {
-        vstr_add_str(&vfs->root, mp_obj_str_get_str(args[0]));
+        const char *root = mp_obj_str_get_str(args[0]);
+        // if the root is relative, make it absolute, otherwise we'll get confused by chdir
+        #ifdef _WIN32
+        char buf[MICROPY_ALLOC_PATH_MAX + 1];
+        DWORD result = GetFullPathNameA(root, sizeof(buf), buf, NULL);
+        if (result > 0 && result < sizeof(buf)) {
+            vstr_add_str(&vfs->root, buf);
+        } else {
+            mp_raise_OSError(GetLastError());
+        }
+        #else
+        if (root[0] != '\0' && root[0] != '/') {
+            char buf[MICROPY_ALLOC_PATH_MAX + 1];
+            const char *cwd = getcwd(buf, sizeof(buf));
+            if (cwd == NULL) {
+                mp_raise_OSError(errno);
+            }
+            vstr_add_str(&vfs->root, cwd);
+            vstr_add_char(&vfs->root, '/');
+        }
+        vstr_add_str(&vfs->root, root);
+        #endif
         vstr_add_char(&vfs->root, '/');
     }
     vfs->root_len = vfs->root.len;
diff --git a/tests/extmod/vfs_posix.py b/tests/extmod/vfs_posix.py
index 05dc0f537e..ebbd08a4a6 100644
--- a/tests/extmod/vfs_posix.py
+++ b/tests/extmod/vfs_posix.py
@@ -99,6 +99,19 @@ if hasattr(vfs, "statvfs"):
 print(type(list(vfs.ilistdir("."))[0][0]))
 print(type(list(vfs.ilistdir(b"."))[0][0]))
 
+# chdir should not affect absolute paths (regression test)
+vfs.mkdir("/subdir")
+vfs.mkdir("/subdir/micropy_test_dir")
+with vfs.open("/subdir/micropy_test_dir/test2", "w") as f:
+    f.write("wrong")
+vfs.chdir("/subdir")
+with vfs.open("/test2", "r") as f:
+    print(f.read())
+os.chdir(curdir)
+vfs.remove("/subdir/micropy_test_dir/test2")
+vfs.rmdir("/subdir/micropy_test_dir")
+vfs.rmdir("/subdir")
+
 # remove
 os.remove(temp_dir + "/test2")
 print(os.listdir(temp_dir))
diff --git a/tests/extmod/vfs_posix.py.exp b/tests/extmod/vfs_posix.py.exp
index 99922e621d..bd1ec7bad6 100644
--- a/tests/extmod/vfs_posix.py.exp
+++ b/tests/extmod/vfs_posix.py.exp
@@ -10,6 +10,7 @@ next_file_no <= base_file_no True
 <class 'tuple'>
 <class 'str'>
 <class 'bytes'>
+hello
 []
 remove OSError
 False

From 5f7065f57a1ce445266a566685ad451edecc58c3 Mon Sep 17 00:00:00 2001
From: Christian Walther <cwalther@gmx.ch>
Date: Sun, 30 Jul 2023 17:26:04 +0200
Subject: [PATCH 035/310] extmod/vfs_posix: Fix accidentally passing tests.

These tests test an unrealistic situation and only pass by accident due
to a bug. The upcoming fix for the bug would make them fail.

The unrealistic situation is that VfsPosix methods are called with
relative paths while the current working directory is somewhere outside
of the root of the VFS. In the intended use of VFS objects via
os.mount() (as opposed to calling methods directly as the tests do),
this never happens, as mp_vfs_lookup_path() directs incoming calls to
the VFS that contains the CWD.

Make the testing situation realistic by changing the working directory
to the root of the VFS before calling methods on it, as the subsequent
relative path accesses expect.

Thanks to the preceding commit, the tests still pass, but still for the
wrong reason. The following commit "Fix relative paths on non-root VFS"
will make them pass for the correct reason.

Signed-off-by: Christian Walther <cwalther@gmx.ch>
---
 tests/extmod/vfs_posix.py                 | 6 ++++++
 tests/extmod/vfs_posix_ilistdir_del.py    | 9 +++++++++
 tests/extmod/vfs_posix_ilistdir_filter.py | 7 +++++++
 3 files changed, 22 insertions(+)

diff --git a/tests/extmod/vfs_posix.py b/tests/extmod/vfs_posix.py
index ebbd08a4a6..bc4c7c2014 100644
--- a/tests/extmod/vfs_posix.py
+++ b/tests/extmod/vfs_posix.py
@@ -88,6 +88,9 @@ print(os.listdir(temp_dir))
 
 # construct new VfsPosix with path argument
 vfs = os.VfsPosix(temp_dir)
+# when VfsPosix is used the intended way via os.mount(), it can only be called
+# with relative paths when the CWD is inside or at its root, so simulate that
+os.chdir(temp_dir)
 print(list(i[0] for i in vfs.ilistdir(".")))
 
 # stat, statvfs (statvfs may not exist)
@@ -112,6 +115,9 @@ vfs.remove("/subdir/micropy_test_dir/test2")
 vfs.rmdir("/subdir/micropy_test_dir")
 vfs.rmdir("/subdir")
 
+# done with vfs, restore CWD
+os.chdir(curdir)
+
 # remove
 os.remove(temp_dir + "/test2")
 print(os.listdir(temp_dir))
diff --git a/tests/extmod/vfs_posix_ilistdir_del.py b/tests/extmod/vfs_posix_ilistdir_del.py
index edb50dfd62..8c8e6978b6 100644
--- a/tests/extmod/vfs_posix_ilistdir_del.py
+++ b/tests/extmod/vfs_posix_ilistdir_del.py
@@ -11,7 +11,13 @@ except (ImportError, AttributeError):
 
 
 def test(testdir):
+    curdir = os.getcwd()
     vfs = os.VfsPosix(testdir)
+    # When VfsPosix is used the intended way via os.mount(), it can only be called
+    # with relative paths when the CWD is inside or at its root, so simulate that.
+    # (Although perhaps calling with a relative path was an oversight in this case
+    # and the respective line below was meant to read `vfs.rmdir("/" + dname)`.)
+    os.chdir(testdir)
     vfs.mkdir("/test_d1")
     vfs.mkdir("/test_d2")
     vfs.mkdir("/test_d3")
@@ -48,6 +54,9 @@ def test(testdir):
         vfs.open("/test", "w").close()
         vfs.remove("/test")
 
+    # Done with vfs, restore CWD.
+    os.chdir(curdir)
+
 
 # We need an empty directory for testing.
 # Skip the test if it already exists.
diff --git a/tests/extmod/vfs_posix_ilistdir_filter.py b/tests/extmod/vfs_posix_ilistdir_filter.py
index c32d124971..5401274605 100644
--- a/tests/extmod/vfs_posix_ilistdir_filter.py
+++ b/tests/extmod/vfs_posix_ilistdir_filter.py
@@ -10,7 +10,11 @@ except (ImportError, AttributeError):
 
 
 def test(testdir):
+    curdir = os.getcwd()
     vfs = os.VfsPosix(testdir)
+    # When VfsPosix is used the intended way via os.mount(), it can only be called
+    # with relative paths when the CWD is inside or at its root, so simulate that.
+    os.chdir(testdir)
 
     dirs = [".a", "..a", "...a", "a.b", "a..b"]
 
@@ -24,6 +28,9 @@ def test(testdir):
 
     print(dirs)
 
+    # Done with vfs, restore CWD.
+    os.chdir(curdir)
+
 
 # We need an empty directory for testing.
 # Skip the test if it already exists.

From 0c4fb1687193a6c6f5edbb9404ecb7e5d6f3bec3 Mon Sep 17 00:00:00 2001
From: Christian Walther <cwalther@gmx.ch>
Date: Sun, 30 Jul 2023 14:48:22 +0200
Subject: [PATCH 036/310] extmod/vfs_posix: Fix relative paths on non-root VFS.

The unwritten API contract expected of a VFS by mp_vfs_lookup_path() is
that paths passed in are relative to the root of the VFS if they start
with '/' and relative to the current directory of the VFS otherwise.
This was not correctly implemented in VfsPosix for instances with a
non-empty root - all paths were interpreted relative to the root. Fix
that. Since VfsPosix tracks its CWD using the "external" CWD of the Unix
process, the correct handling for relative paths is to pass them through
unmodified.

Also, when concatenating absolute paths, fix an off-by-one resulting in
a harmless double slash (the root path already has a trailing slash).

Signed-off-by: Christian Walther <cwalther@gmx.ch>
---
 extmod/vfs_posix.c                  | 16 ++++---
 tests/extmod/vfs_posix_paths.py     | 73 +++++++++++++++++++++++++++++
 tests/extmod/vfs_posix_paths.py.exp | 13 +++++
 3 files changed, 95 insertions(+), 7 deletions(-)
 create mode 100644 tests/extmod/vfs_posix_paths.py
 create mode 100644 tests/extmod/vfs_posix_paths.py.exp

diff --git a/extmod/vfs_posix.c b/extmod/vfs_posix.c
index 1505682f11..6df91a2732 100644
--- a/extmod/vfs_posix.c
+++ b/extmod/vfs_posix.c
@@ -58,21 +58,23 @@ typedef struct _mp_obj_vfs_posix_t {
 } mp_obj_vfs_posix_t;
 
 STATIC const char *vfs_posix_get_path_str(mp_obj_vfs_posix_t *self, mp_obj_t path) {
-    if (self->root_len == 0) {
-        return mp_obj_str_get_str(path);
+    const char *path_str = mp_obj_str_get_str(path);
+    if (self->root_len == 0 || path_str[0] != '/') {
+        return path_str;
     } else {
-        self->root.len = self->root_len;
-        vstr_add_str(&self->root, mp_obj_str_get_str(path));
+        self->root.len = self->root_len - 1;
+        vstr_add_str(&self->root, path_str);
         return vstr_null_terminated_str(&self->root);
     }
 }
 
 STATIC mp_obj_t vfs_posix_get_path_obj(mp_obj_vfs_posix_t *self, mp_obj_t path) {
-    if (self->root_len == 0) {
+    const char *path_str = mp_obj_str_get_str(path);
+    if (self->root_len == 0 || path_str[0] != '/') {
         return path;
     } else {
-        self->root.len = self->root_len;
-        vstr_add_str(&self->root, mp_obj_str_get_str(path));
+        self->root.len = self->root_len - 1;
+        vstr_add_str(&self->root, path_str);
         return mp_obj_new_str(self->root.buf, self->root.len);
     }
 }
diff --git a/tests/extmod/vfs_posix_paths.py b/tests/extmod/vfs_posix_paths.py
new file mode 100644
index 0000000000..8cdad77068
--- /dev/null
+++ b/tests/extmod/vfs_posix_paths.py
@@ -0,0 +1,73 @@
+# Test for VfsPosix with relative paths
+
+try:
+    import os
+
+    os.VfsPosix
+except (ImportError, AttributeError):
+    print("SKIP")
+    raise SystemExit
+
+# We need a directory for testing that doesn't already exist.
+# Skip the test if it does exist.
+temp_dir = "vfs_posix_paths_test_dir"
+try:
+    import os
+
+    os.stat(temp_dir)
+    print("SKIP")
+    raise SystemExit
+except OSError:
+    pass
+
+curdir = os.getcwd()
+os.mkdir(temp_dir)
+
+# construct new VfsPosix with absolute path argument
+temp_dir_abs = os.getcwd() + os.sep + temp_dir
+vfs = os.VfsPosix(temp_dir_abs)
+# when VfsPosix is used the intended way via os.mount(), it can only be called
+# with relative paths when the CWD is inside or at its root, so simulate that
+os.chdir(temp_dir_abs)
+vfs.mkdir("subdir")
+vfs.mkdir("subdir/one")
+print('listdir("/"):', sorted(i[0] for i in vfs.ilistdir("/")))
+print('listdir("."):', sorted(i[0] for i in vfs.ilistdir(".")))
+print('getcwd() in {"", "/"}:', vfs.getcwd() in {"", "/"})
+print('chdir("subdir"):', vfs.chdir("subdir"))
+print("getcwd():", vfs.getcwd())
+print('mkdir("two"):', vfs.mkdir("two"))
+f = vfs.open("file.py", "w")
+f.write("print('hello')")
+f.close()
+print('listdir("/"):', sorted(i[0] for i in vfs.ilistdir("/")))
+print('listdir("/subdir"):', sorted(i[0] for i in vfs.ilistdir("/subdir")))
+print('listdir("."):', sorted(i[0] for i in vfs.ilistdir(".")))
+try:
+    f = vfs.open("/subdir/file.py", "r")
+    print(f.read())
+    f.close()
+except Exception as e:
+    print(e)
+import sys
+
+sys.path.insert(0, "")
+try:
+    import file
+
+    print(file)
+except Exception as e:
+    print(e)
+del sys.path[0]
+vfs.remove("file.py")
+vfs.rmdir("two")
+vfs.rmdir("/subdir/one")
+vfs.chdir("/")
+vfs.rmdir("/subdir")
+
+# done with vfs, restore CWD
+os.chdir(curdir)
+
+# rmdir
+os.rmdir(temp_dir)
+print(temp_dir in os.listdir())
diff --git a/tests/extmod/vfs_posix_paths.py.exp b/tests/extmod/vfs_posix_paths.py.exp
new file mode 100644
index 0000000000..5828453c92
--- /dev/null
+++ b/tests/extmod/vfs_posix_paths.py.exp
@@ -0,0 +1,13 @@
+listdir("/"): ['subdir']
+listdir("."): ['subdir']
+getcwd() in {"", "/"}: True
+chdir("subdir"): None
+getcwd(): subdir
+mkdir("two"): None
+listdir("/"): ['subdir']
+listdir("/subdir"): ['file.py', 'one', 'two']
+listdir("."): ['file.py', 'one', 'two']
+print('hello')
+hello
+<module 'file' from 'file.py'>
+False

From be28829ae8d22e1a0373bda116022ee446fb2ed8 Mon Sep 17 00:00:00 2001
From: Christian Walther <cwalther@gmx.ch>
Date: Sun, 30 Jul 2023 14:48:22 +0200
Subject: [PATCH 037/310] extmod/vfs_posix: Fix getcwd() on non-root VFS.

The unwritten API contract expected of a VFS.getcwd() by mp_vfs_getcwd()
is that its return value should be either "" or "/" when the CWD is at
the root of the VFS and otherwise start with a slash and not end with a
slash. This was not correctly implemented in VfsPosix for instances with
a non-empty root - the required leading slash, if any, was cut off
because the root length includes a trailing slash. This would result in
missing slashes in the middle of the return value of os.getcwd() or in
uninitialized garbage from beyond a string's null terminator when the
CWD was at the VFS root.

Signed-off-by: Christian Walther <cwalther@gmx.ch>
---
 extmod/vfs_posix.c                  |  9 ++++++++-
 tests/extmod/vfs_posix_paths.py     | 19 +++++++++++++++++++
 tests/extmod/vfs_posix_paths.py.exp | 12 +++++++++++-
 3 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/extmod/vfs_posix.c b/extmod/vfs_posix.c
index 6df91a2732..e29b47cccd 100644
--- a/extmod/vfs_posix.c
+++ b/extmod/vfs_posix.c
@@ -186,7 +186,14 @@ STATIC mp_obj_t vfs_posix_getcwd(mp_obj_t self_in) {
     if (ret == NULL) {
         mp_raise_OSError(errno);
     }
-    ret += self->root_len;
+    if (self->root_len > 0) {
+        ret += self->root_len - 1;
+        #ifdef _WIN32
+        if (*ret == '\\') {
+            *(char *)ret = '/';
+        }
+        #endif
+    }
     return mp_obj_new_str(ret, strlen(ret));
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(vfs_posix_getcwd_obj, vfs_posix_getcwd);
diff --git a/tests/extmod/vfs_posix_paths.py b/tests/extmod/vfs_posix_paths.py
index 8cdad77068..5806a34521 100644
--- a/tests/extmod/vfs_posix_paths.py
+++ b/tests/extmod/vfs_posix_paths.py
@@ -68,6 +68,25 @@ vfs.rmdir("/subdir")
 # done with vfs, restore CWD
 os.chdir(curdir)
 
+# some integration tests with a mounted VFS
+os.mount(os.VfsPosix(temp_dir_abs), "/mnt")
+os.mkdir("/mnt/dir")
+print('chdir("/mnt/dir"):', os.chdir("/mnt/dir"))
+print("getcwd():", os.getcwd())
+print('chdir("/mnt"):', os.chdir("/mnt"))
+print("getcwd():", os.getcwd())
+print('chdir("/"):', os.chdir("/"))
+print("getcwd():", os.getcwd())
+print('chdir("/mnt/dir"):', os.chdir("/mnt/dir"))
+print("getcwd():", os.getcwd())
+print('chdir(".."):', os.chdir(".."))
+print("getcwd():", os.getcwd())
+os.rmdir("/mnt/dir")
+os.umount("/mnt")
+
+# restore CWD
+os.chdir(curdir)
+
 # rmdir
 os.rmdir(temp_dir)
 print(temp_dir in os.listdir())
diff --git a/tests/extmod/vfs_posix_paths.py.exp b/tests/extmod/vfs_posix_paths.py.exp
index 5828453c92..ecc13222aa 100644
--- a/tests/extmod/vfs_posix_paths.py.exp
+++ b/tests/extmod/vfs_posix_paths.py.exp
@@ -2,7 +2,7 @@ listdir("/"): ['subdir']
 listdir("."): ['subdir']
 getcwd() in {"", "/"}: True
 chdir("subdir"): None
-getcwd(): subdir
+getcwd(): /subdir
 mkdir("two"): None
 listdir("/"): ['subdir']
 listdir("/subdir"): ['file.py', 'one', 'two']
@@ -10,4 +10,14 @@ listdir("."): ['file.py', 'one', 'two']
 print('hello')
 hello
 <module 'file' from 'file.py'>
+chdir("/mnt/dir"): None
+getcwd(): /mnt/dir
+chdir("/mnt"): None
+getcwd(): /mnt
+chdir("/"): None
+getcwd(): /
+chdir("/mnt/dir"): None
+getcwd(): /mnt/dir
+chdir(".."): None
+getcwd(): /mnt
 False

From 7be16e05402a49a432523d6a55e614c7d87627b6 Mon Sep 17 00:00:00 2001
From: Christian Walther <cwalther@gmx.ch>
Date: Wed, 2 Aug 2023 13:15:21 +0200
Subject: [PATCH 038/310] extmod/vfs_posix: Additional tests for coverage of
 error cases.

Signed-off-by: Christian Walther <cwalther@gmx.ch>
---
 tests/extmod/vfs_posix_enoent.py     | 42 ++++++++++++++++++++++++++++
 tests/extmod/vfs_posix_enoent.py.exp |  2 ++
 2 files changed, 44 insertions(+)
 create mode 100644 tests/extmod/vfs_posix_enoent.py
 create mode 100644 tests/extmod/vfs_posix_enoent.py.exp

diff --git a/tests/extmod/vfs_posix_enoent.py b/tests/extmod/vfs_posix_enoent.py
new file mode 100644
index 0000000000..e6010d79d5
--- /dev/null
+++ b/tests/extmod/vfs_posix_enoent.py
@@ -0,0 +1,42 @@
+# Test for VfsPosix error conditions
+
+try:
+    import os
+    import sys
+
+    os.VfsPosix
+except (ImportError, AttributeError):
+    print("SKIP")
+    raise SystemExit
+
+if sys.platform == "win32":
+    # Windows doesn't let you delete the current directory, so this cannot be
+    # tested.
+    print("SKIP")
+    raise SystemExit
+
+# We need an empty directory for testing.
+# Skip the test if it already exists.
+temp_dir = "vfs_posix_enoent_test_dir"
+try:
+    os.stat(temp_dir)
+    print("SKIP")
+    raise SystemExit
+except OSError:
+    pass
+
+curdir = os.getcwd()
+os.mkdir(temp_dir)
+os.chdir(temp_dir)
+os.rmdir(curdir + "/" + temp_dir)
+try:
+    print("getcwd():", os.getcwd())
+except OSError as e:
+    # expecting ENOENT = 2
+    print("getcwd():", repr(e))
+
+try:
+    print("VfsPosix():", os.VfsPosix("something"))
+except OSError as e:
+    # expecting ENOENT = 2
+    print("VfsPosix():", repr(e))
diff --git a/tests/extmod/vfs_posix_enoent.py.exp b/tests/extmod/vfs_posix_enoent.py.exp
new file mode 100644
index 0000000000..f2d9a0d551
--- /dev/null
+++ b/tests/extmod/vfs_posix_enoent.py.exp
@@ -0,0 +1,2 @@
+getcwd(): OSError(2,)
+VfsPosix(): OSError(2,)

From 9ed39553f2ffa542ab390d7bf460ac5593310577 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Mon, 11 Sep 2023 15:24:54 +0200
Subject: [PATCH 039/310] drivers/ninaw10: Add ioctl for reading analog pins.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 drivers/ninaw10/nina_wifi_drv.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/ninaw10/nina_wifi_drv.c b/drivers/ninaw10/nina_wifi_drv.c
index 111ead003d..6e4df84294 100644
--- a/drivers/ninaw10/nina_wifi_drv.c
+++ b/drivers/ninaw10/nina_wifi_drv.c
@@ -684,6 +684,14 @@ int nina_ioctl(uint32_t cmd, size_t len, uint8_t *buf, uint32_t iface) {
                 return -1;
             }
             break;
+        case NINA_CMD_GET_ANALOG_READ: {
+            if (len != 2 || nina_send_command_read_vals(NINA_CMD_GET_ANALOG_READ,
+                1, ARG_8BITS, NINA_ARGS(ARG_BYTE(buf[0])),
+                1, ARG_8BITS, NINA_VALS({(uint16_t *)&len, buf})) != 0) {
+                return -1;
+            }
+            break;
+        }
         default:
             return 0;
     }

From 7bbf7910fec6d3302bb839eaa0885d819faf8f15 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Mon, 11 Sep 2023 15:25:27 +0200
Subject: [PATCH 040/310] extmod/network_ninaw10: Raise an error if nina_ioctl
 fails.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 extmod/network_ninaw10.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/extmod/network_ninaw10.c b/extmod/network_ninaw10.c
index 00f53eff13..399d02cd6e 100644
--- a/extmod/network_ninaw10.c
+++ b/extmod/network_ninaw10.c
@@ -121,7 +121,7 @@ STATIC void network_ninaw10_poll_connect(mp_sched_node_t *node) {
             reason == NINA_ESP_REASON_NOT_AUTHED ||
             reason == NINA_ESP_REASON_4WAY_HANDSHAKE_TIMEOUT ||
             reason >= NINA_ESP_REASON_BEACON_TIMEOUT) {
-            debug_printf(&mp_plat_print, "poll_connect() status: %d reason %d\n", status, reason);
+            debug_printf("poll_connect() status: %d reason %d\n", status, reason);
             if (nina_connect(self->ssid, self->security, self->key, 0) != 0) {
                 mp_raise_msg_varg(&mp_type_OSError,
                     MP_ERROR_TEXT("could not connect to ssid=%s, sec=%d, key=%s\n"),
@@ -428,7 +428,11 @@ STATIC mp_obj_t network_ninaw10_ioctl(mp_obj_t self_in, mp_obj_t cmd_in, mp_obj_
     nina_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_buffer_info_t buf;
     mp_get_buffer_raise(buf_in, &buf, MP_BUFFER_READ | MP_BUFFER_WRITE);
-    nina_ioctl(mp_obj_get_int(cmd_in), buf.len, buf.buf, self->itf);
+    int ret = nina_ioctl(mp_obj_get_int(cmd_in), buf.len, buf.buf, self->itf);
+    if (ret != 0) {
+        mp_raise_msg_varg(&mp_type_OSError,
+            MP_ERROR_TEXT("ioctl %d failed %d"), mp_obj_get_int(cmd_in), ret);
+    }
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_3(network_ninaw10_ioctl_obj, network_ninaw10_ioctl);

From 4358faab0ccc71f8419f41c0c44ccf5e782c247d Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Tue, 17 Oct 2023 12:32:45 +0200
Subject: [PATCH 041/310] drivers/ninaw10: Add support for external ADC
 channels.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 drivers/ninaw10/machine_pin_nina.c | 36 +++++++++++++++++++++++++++---
 1 file changed, 33 insertions(+), 3 deletions(-)

diff --git a/drivers/ninaw10/machine_pin_nina.c b/drivers/ninaw10/machine_pin_nina.c
index 025ecb66af..c72ecee3db 100644
--- a/drivers/ninaw10/machine_pin_nina.c
+++ b/drivers/ninaw10/machine_pin_nina.c
@@ -42,9 +42,13 @@
 
 #define NINA_GPIO_MODE          (0x50)
 #define NINA_GPIO_READ          (0x53)
+#define NINA_GPIO_READ_ANALOG   (0x54)
 #define NINA_GPIO_WRITE         (0x51)
-#define NINA_GPIO_IS_INPUT_ONLY(p) ((p >= 34 && p <= 36) || (p == 39))
+#define NINA_GPIO_IS_INPUT_ONLY(p)  ((p >= 3 && p <= 6))
+#define NINA_GPIO_IS_ADC_CHANNEL(p) ((p >= 3 && p <= 6))
 
+// This maps logical pin ID (0..MICROPY_HW_PIN_EXT_COUNT) to
+// physical pins on the Nina module.
 static uint8_t pin_map[MICROPY_HW_PIN_EXT_COUNT] = {
     27, // LEDR
     25, // LEDG
@@ -55,10 +59,30 @@ static uint8_t pin_map[MICROPY_HW_PIN_EXT_COUNT] = {
     35, // A7
 };
 
+// This maps logical pin ID (0..MICROPY_HW_PIN_EXT_COUNT) to
+// ADC channel numbers on the Nina module.
+static uint8_t adc_map[MICROPY_HW_PIN_EXT_COUNT] = {
+    -1, // LEDR
+    -1, // LEDG
+    -1, // LEDB
+    6, // A4
+    3, // A5
+    0, // A6
+    7, // A7
+};
+
 void machine_pin_ext_init(void) {
     nina_init();
 }
 
+bool machine_pin_ext_is_adc_channel(const machine_pin_obj_t *self) {
+    return NINA_GPIO_IS_ADC_CHANNEL(self->id);
+}
+
+uint32_t machine_pin_ext_to_adc_channel(const machine_pin_obj_t *self) {
+    return adc_map[self->id];
+}
+
 void machine_pin_ext_set(machine_pin_obj_t *self, bool value) {
     if (self->id >= 0 && self->id < MICROPY_HW_PIN_EXT_COUNT) {
         uint8_t buf[] = {pin_map[self->id], value};
@@ -76,8 +100,14 @@ bool machine_pin_ext_get(machine_pin_obj_t *self) {
     return value;
 }
 
+uint16_t machine_pin_ext_read_u16(uint32_t channel) {
+    uint16_t buf = channel;
+    nina_ioctl(NINA_GPIO_READ_ANALOG, sizeof(buf), (uint8_t *)&buf, 0);
+    return buf;
+}
+
 void machine_pin_ext_config(machine_pin_obj_t *self, int mode, int value) {
-    if (mode == MACHINE_PIN_MODE_IN) {
+    if (mode == MACHINE_PIN_MODE_IN || mode == MACHINE_PIN_MODE_ANALOG) {
         mode = NINA_GPIO_INPUT;
         self->is_output = false;
     } else if (mode == MACHINE_PIN_MODE_OUT) {
@@ -89,7 +119,7 @@ void machine_pin_ext_config(machine_pin_obj_t *self, int mode, int value) {
     if (self->id >= 0 && self->id < MICROPY_HW_PIN_EXT_COUNT) {
         uint8_t buf[] = {pin_map[self->id], mode};
         if (mode == NINA_GPIO_OUTPUT) {
-            if (NINA_GPIO_IS_INPUT_ONLY(buf[0])) {
+            if (NINA_GPIO_IS_INPUT_ONLY(self->id)) {
                 mp_raise_ValueError("only Pin.IN is supported for this pin");
             }
             machine_pin_ext_set(self, value);

From 5e52389f993c7bd54bb25d8785f5abf3a4e771b0 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Tue, 17 Oct 2023 12:36:11 +0200
Subject: [PATCH 042/310] rp2/machine_adc: Add support for external ADC
 channels.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/rp2/machine_adc.c | 40 ++++++++++++++++++++++++++++++++++++----
 ports/rp2/machine_pin.c |  2 +-
 ports/rp2/machine_pin.h |  7 ++++++-
 3 files changed, 43 insertions(+), 6 deletions(-)

diff --git a/ports/rp2/machine_adc.c b/ports/rp2/machine_adc.c
index 9e3d7f57a8..5d6f0cc29c 100644
--- a/ports/rp2/machine_adc.c
+++ b/ports/rp2/machine_adc.c
@@ -27,6 +27,7 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "hardware/adc.h"
+#include "machine_pin.h"
 
 #define ADC_IS_VALID_GPIO(gpio) ((gpio) >= 26 && (gpio) <= 29)
 #define ADC_CHANNEL_FROM_GPIO(gpio) ((gpio) - 26)
@@ -48,6 +49,9 @@ const mp_obj_type_t machine_adc_type;
 typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
     uint32_t channel;
+    #if MICROPY_HW_ADC_EXT_COUNT
+    uint32_t is_ext : 1;
+    #endif
 } machine_adc_obj_t;
 
 STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
@@ -63,6 +67,9 @@ STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, s
     mp_obj_t source = all_args[0];
 
     uint32_t channel;
+    bool is_ext = false;
+    const machine_pin_obj_t *pin = NULL;
+
     if (mp_obj_is_int(source)) {
         // Get and validate channel number.
         channel = mp_obj_get_int(source);
@@ -72,18 +79,35 @@ STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, s
 
     } else {
         // Get GPIO and check it has ADC capabilities.
-        channel = mp_hal_get_pin_obj(source);
-        if (!ADC_IS_VALID_GPIO(channel)) {
+        pin = machine_pin_find(source);
+        channel = pin->id;
+        bool valid_adc_pin = false;
+        #if MICROPY_HW_ADC_EXT_COUNT
+        is_ext = pin->is_ext;
+        if (is_ext) {
+            valid_adc_pin = machine_pin_ext_is_adc_channel(pin);
+        } else
+        #endif
+        {
+            valid_adc_pin = ADC_IS_VALID_GPIO(channel);
+        }
+        if (!valid_adc_pin) {
             mp_raise_ValueError(MP_ERROR_TEXT("Pin doesn't have ADC capabilities"));
         }
     }
 
     // Initialise the ADC peripheral if it's not already running.
-    if (!(adc_hw->cs & ADC_CS_EN_BITS)) {
+    if (!is_ext && !(adc_hw->cs & ADC_CS_EN_BITS)) {
         adc_init();
     }
 
-    if (ADC_IS_VALID_GPIO(channel)) {
+    if (is_ext) {
+        #if MICROPY_HW_ADC_EXT_COUNT
+        // Note external pins are mutable.
+        machine_pin_ext_config((machine_pin_obj_t *)pin, MACHINE_PIN_MODE_ANALOG, 0);
+        channel = machine_pin_ext_to_adc_channel(pin);
+        #endif
+    } else if (ADC_IS_VALID_GPIO(channel)) {
         // Configure the GPIO pin in ADC mode.
         adc_gpio_init(channel);
         channel = ADC_CHANNEL_FROM_GPIO(channel);
@@ -95,6 +119,9 @@ STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, s
     // Create ADC object.
     machine_adc_obj_t *o = mp_obj_malloc(machine_adc_obj_t, &machine_adc_type);
     o->channel = channel;
+    #if MICROPY_HW_ADC_EXT_COUNT
+    o->is_ext = is_ext;
+    #endif
 
     return MP_OBJ_FROM_PTR(o);
 }
@@ -102,6 +129,11 @@ STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, s
 // read_u16()
 STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
     machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    #if MICROPY_HW_ADC_EXT_COUNT
+    if (self->is_ext) {
+        return MP_OBJ_NEW_SMALL_INT(machine_pin_ext_read_u16(self->channel));
+    }
+    #endif
     return MP_OBJ_NEW_SMALL_INT(adc_config_and_read_u16(self->channel));
 }
 MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
diff --git a/ports/rp2/machine_pin.c b/ports/rp2/machine_pin.c
index bdd80fb8f4..3470f38696 100644
--- a/ports/rp2/machine_pin.c
+++ b/ports/rp2/machine_pin.c
@@ -166,7 +166,7 @@ const machine_pin_af_obj_t *machine_pin_find_alt_by_index(const machine_pin_obj_
     return NULL;
 }
 
-static const machine_pin_obj_t *machine_pin_find(mp_obj_t pin) {
+const machine_pin_obj_t *machine_pin_find(mp_obj_t pin) {
     // Is already a object of the proper type
     if (mp_obj_is_type(pin, &machine_pin_type)) {
         return pin;
diff --git a/ports/rp2/machine_pin.h b/ports/rp2/machine_pin.h
index c10dc4f9e8..aa5ea641b7 100644
--- a/ports/rp2/machine_pin.h
+++ b/ports/rp2/machine_pin.h
@@ -34,7 +34,8 @@ enum {
     MACHINE_PIN_MODE_IN = 0,
     MACHINE_PIN_MODE_OUT = 1,
     MACHINE_PIN_MODE_OPEN_DRAIN = 2,
-    MACHINE_PIN_MODE_ALT = 3
+    MACHINE_PIN_MODE_ALT = 3,
+    MACHINE_PIN_MODE_ANALOG = 4
 };
 
 typedef struct _machine_pin_af_obj_t {
@@ -71,10 +72,14 @@ extern const mp_obj_type_t pin_board_pins_obj_type;
 extern const mp_obj_dict_t pin_board_pins_locals_dict;
 
 void machine_pin_ext_init(void);
+bool machine_pin_ext_is_adc_channel(const machine_pin_obj_t *self);
+uint32_t machine_pin_ext_to_adc_channel(const machine_pin_obj_t *self);
 void machine_pin_ext_set(machine_pin_obj_t *self, bool value);
 bool machine_pin_ext_get(machine_pin_obj_t *self);
+uint16_t machine_pin_ext_read_u16(uint32_t channel);
 void machine_pin_ext_config(machine_pin_obj_t *self, int mode, int value);
 
+const machine_pin_obj_t *machine_pin_find(mp_obj_t pin);
 const machine_pin_obj_t *machine_pin_find_named(const mp_obj_dict_t *named_pins, mp_obj_t name);
 const machine_pin_af_obj_t *machine_pin_find_alt(const machine_pin_obj_t *pin, uint8_t fn);
 const machine_pin_af_obj_t *machine_pin_find_alt_by_index(const machine_pin_obj_t *pin, mp_uint_t af_idx);

From 2590a34ed77059cf25ad99f57672612afeb59cc7 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Tue, 17 Oct 2023 12:36:40 +0200
Subject: [PATCH 043/310] rp2/boards/ARDUINO_NANO_RP2040_CONNECT: Add external
 analog pins.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h | 1 +
 ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/pins.csv        | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h b/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h
index 026702da45..537c6d7057 100644
--- a/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h
+++ b/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h
@@ -15,6 +15,7 @@
 
 // Enable externally controlled pins.
 #define MICROPY_HW_PIN_EXT_COUNT        (7)
+#define MICROPY_HW_ADC_EXT_COUNT        (4)
 
 // Enable USB Mass Storage with FatFS filesystem.
 #define MICROPY_HW_USB_MSC              (1)
diff --git a/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/pins.csv b/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/pins.csv
index 47d9b5b043..0b1566cacf 100644
--- a/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/pins.csv
+++ b/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/pins.csv
@@ -26,3 +26,7 @@ D18,EXT_GPIO3
 D19,EXT_GPIO4
 D20,EXT_GPIO5
 D21,EXT_GPIO6
+A4,EXT_GPIO3
+A5,EXT_GPIO4
+A6,EXT_GPIO5
+A7,EXT_GPIO6

From 60929ec7e2c19b896487491192361e44f7cee0d9 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 10 Oct 2023 18:19:03 +1100
Subject: [PATCH 044/310] extmod/machine_wdt: Factor ports' WDT Python bindings
 to common code.

There are currently 7 ports that implement machine.WDT and a lot of code is
duplicated across these implementations.  This commit factors the common
parts of all these implementations to a single location in
extmod/machine_wdt.c.  This common code provides the top-level Python
bindings (class and method wrappers), and then each port implements the
back end specific to that port.

With this refactor the ports remain functionally the same except for:

- The esp8266 WDT constructor now takes keyword arguments, and accepts the
  "timeout" argument but raises an exception if it's not the default value
  (this port doesn't support changing the timeout).

- The mimxrt and samd ports now interpret the argument to WDT.timeout_ms()
  as signed and if it's negative truncate it to the minimum timeout (rather
  than it being unsigned and a negative value truncating to the maximum
  timeout).

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/extmod.cmake                           |  1 +
 extmod/extmod.mk                              |  1 +
 extmod/machine_wdt.c                          | 95 +++++++++++++++++++
 ports/stm32/wdt.h => extmod/modmachine.h      | 22 ++++-
 ports/cc3200/application.mk                   |  1 -
 ports/cc3200/mods/{pybwdt.c => machine_wdt.c} | 66 ++++---------
 ports/cc3200/mods/modmachine.c                |  4 +-
 ports/cc3200/mods/pybwdt.h                    |  4 +-
 ports/cc3200/mpconfigport.h                   |  2 +
 ports/esp32/esp32_common.cmake                |  1 -
 ports/esp32/machine_wdt.c                     | 44 ++-------
 ports/esp32/modmachine.c                      |  3 +
 ports/esp32/modmachine.h                      |  1 -
 ports/esp32/mpconfigport.h                    |  2 +
 ports/esp8266/Makefile                        |  1 -
 ports/esp8266/machine_wdt.c                   | 38 ++------
 ports/esp8266/modmachine.c                    |  7 +-
 ports/esp8266/mpconfigport.h                  |  2 +
 ports/mimxrt/Makefile                         |  1 -
 ports/mimxrt/machine_wdt.c                    | 67 ++++---------
 ports/mimxrt/modmachine.c                     |  3 +
 ports/mimxrt/modmachine.h                     |  1 -
 ports/mimxrt/mpconfigport.h                   |  3 +
 ports/renesas-ra/modmachine.h                 |  1 -
 ports/rp2/CMakeLists.txt                      |  1 -
 ports/rp2/machine_wdt.c                       | 40 ++------
 ports/rp2/modmachine.c                        |  3 +
 ports/rp2/modmachine.h                        |  1 -
 ports/rp2/mpconfigport.h                      |  2 +
 ports/samd/Makefile                           |  1 -
 ports/samd/machine_wdt.c                      | 52 ++--------
 ports/samd/modmachine.c                       |  3 +
 ports/samd/modmachine.h                       |  1 -
 ports/samd/mpconfigport.h                     |  3 +
 ports/stm32/Makefile                          |  1 -
 ports/stm32/{wdt.c => machine_wdt.c}          | 52 +++-------
 ports/stm32/modmachine.c                      |  6 +-
 ports/stm32/mpconfigport.h                    |  2 +
 38 files changed, 235 insertions(+), 304 deletions(-)
 create mode 100644 extmod/machine_wdt.c
 rename ports/stm32/wdt.h => extmod/modmachine.h (63%)
 rename ports/cc3200/mods/{pybwdt.c => machine_wdt.c} (68%)
 rename ports/stm32/{wdt.c => machine_wdt.c} (60%)

diff --git a/extmod/extmod.cmake b/extmod/extmod.cmake
index c8756a682e..063df70f5f 100644
--- a/extmod/extmod.cmake
+++ b/extmod/extmod.cmake
@@ -14,6 +14,7 @@ set(MICROPY_SOURCE_EXTMOD
     ${MICROPY_EXTMOD_DIR}/machine_pwm.c
     ${MICROPY_EXTMOD_DIR}/machine_signal.c
     ${MICROPY_EXTMOD_DIR}/machine_spi.c
+    ${MICROPY_EXTMOD_DIR}/machine_wdt.c
     ${MICROPY_EXTMOD_DIR}/modbluetooth.c
     ${MICROPY_EXTMOD_DIR}/modframebuf.c
     ${MICROPY_EXTMOD_DIR}/modlwip.c
diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index f776a7f694..a6c7826867 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -11,6 +11,7 @@ SRC_EXTMOD_C += \
 	extmod/machine_signal.c \
 	extmod/machine_spi.c \
 	extmod/machine_timer.c \
+	extmod/machine_wdt.c \
 	extmod/modasyncio.c \
 	extmod/modbinascii.c \
 	extmod/modbluetooth.c \
diff --git a/extmod/machine_wdt.c b/extmod/machine_wdt.c
new file mode 100644
index 0000000000..a49484ed80
--- /dev/null
+++ b/extmod/machine_wdt.c
@@ -0,0 +1,95 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020-2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+
+#if MICROPY_PY_MACHINE_WDT
+
+#include "extmod/modmachine.h"
+
+// The port must provide implementations of these low-level WDT functions.
+STATIC machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms);
+STATIC void mp_machine_wdt_feed(machine_wdt_obj_t *self);
+#if MICROPY_PY_MACHINE_WDT_TIMEOUT_MS
+STATIC void mp_machine_wdt_timeout_ms_set(machine_wdt_obj_t *self_in, mp_int_t timeout_ms);
+#endif
+
+// The port provides implementations of the above in this file.
+#include MICROPY_PY_MACHINE_WDT_INCLUDEFILE
+
+STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    enum { ARG_id, ARG_timeout };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} },
+    };
+
+    // Parse the arguments.
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // Create WDT instance.
+    machine_wdt_obj_t *self = mp_machine_wdt_make_new_instance(args[ARG_id].u_int, args[ARG_timeout].u_int);
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
+// WDT.feed()
+STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) {
+    machine_wdt_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_machine_wdt_feed(self);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed);
+
+#if MICROPY_PY_MACHINE_WDT_TIMEOUT_MS
+// WDT.timeout_ms(timeout)
+STATIC mp_obj_t machine_wdt_timeout_ms(mp_obj_t self_in, mp_obj_t timeout_in) {
+    machine_wdt_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_int_t timeout_ms = mp_obj_get_int(timeout_in);
+    mp_machine_wdt_timeout_ms_set(self, timeout_ms);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_wdt_timeout_ms_obj, machine_wdt_timeout_ms);
+#endif
+
+STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) },
+    #if MICROPY_PY_MACHINE_WDT_TIMEOUT_MS
+    { MP_ROM_QSTR(MP_QSTR_timeout_ms), MP_ROM_PTR(&machine_wdt_timeout_ms_obj) },
+    #endif
+};
+STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table);
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_wdt_type,
+    MP_QSTR_WDT,
+    MP_TYPE_FLAG_NONE,
+    make_new, machine_wdt_make_new,
+    locals_dict, &machine_wdt_locals_dict
+    );
+
+#endif // MICROPY_PY_MACHINE_WDT
diff --git a/ports/stm32/wdt.h b/extmod/modmachine.h
similarity index 63%
rename from ports/stm32/wdt.h
rename to extmod/modmachine.h
index d60bb7e9e6..794c62cde2 100644
--- a/ports/stm32/wdt.h
+++ b/extmod/modmachine.h
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2016 Damien P. George
+ * Copyright (c) 2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -23,9 +23,21 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
-#ifndef MICROPY_INCLUDED_STM32_WDT_H
-#define MICROPY_INCLUDED_STM32_WDT_H
 
-extern const mp_obj_type_t pyb_wdt_type;
+#ifndef MICROPY_INCLUDED_EXTMOD_MODMACHINE_H
+#define MICROPY_INCLUDED_EXTMOD_MODMACHINE_H
 
-#endif // MICROPY_INCLUDED_STM32_WDT_H
+#include "py/obj.h"
+
+// A port must provide these types, but they are otherwise opaque.
+typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
+
+// These classes correspond to machine.Type entries in the machine module.
+// Their Python bindings are implemented in extmod, and their implementation
+// is provided by a port.
+extern const mp_obj_type_t machine_i2c_type;
+extern const mp_obj_type_t machine_spi_type;
+extern const mp_obj_type_t machine_timer_type;
+extern const mp_obj_type_t machine_wdt_type;
+
+#endif // MICROPY_INCLUDED_EXTMOD_MODMACHINE_H
diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index f4487d69d4..deee201eef 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -93,7 +93,6 @@ APP_MODS_SRC_C = $(addprefix mods/,\
 	pybspi.c \
 	pybtimer.c \
 	pybuart.c \
-	pybwdt.c \
 	)
 
 APP_CC3100_SRC_C = $(addprefix drivers/cc3100/src/,\
diff --git a/ports/cc3200/mods/pybwdt.c b/ports/cc3200/mods/machine_wdt.c
similarity index 68%
rename from ports/cc3200/mods/pybwdt.c
rename to ports/cc3200/mods/machine_wdt.c
index 589f53cf12..b20ef7eb93 100644
--- a/ports/cc3200/mods/pybwdt.c
+++ b/ports/cc3200/mods/machine_wdt.c
@@ -24,11 +24,9 @@
  * THE SOFTWARE.
  */
 
-#include <stdint.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_wdt.c via MICROPY_PY_MACHINE_WDT_INCLUDEFILE.
 
-#include "py/mpconfig.h"
-#include "py/obj.h"
-#include "py/runtime.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "inc/hw_types.h"
@@ -40,8 +38,6 @@
 #include "prcm.h"
 #include "utils.h"
 #include "pybwdt.h"
-#include "mperror.h"
-
 
 /******************************************************************************
  DECLARE CONSTANTS
@@ -52,18 +48,18 @@
 /******************************************************************************
  DECLARE TYPES
  ******************************************************************************/
-typedef struct {
+typedef struct _machine_wdt_obj_t {
     mp_obj_base_t base;
     bool    servers;
     bool    servers_sleeping;
     bool    simplelink;
     bool    running;
-} pyb_wdt_obj_t;
+} machine_wdt_obj_t;
 
 /******************************************************************************
  DECLARE PRIVATE DATA
  ******************************************************************************/
-STATIC pyb_wdt_obj_t pyb_wdt_obj = {.servers = false, .servers_sleeping = false, .simplelink = false, .running = false};
+STATIC machine_wdt_obj_t machine_wdt_obj = {.servers = false, .servers_sleeping = false, .simplelink = false, .running = false};
 
 /******************************************************************************
  DEFINE PUBLIC FUNCTIONS
@@ -74,39 +70,28 @@ void pybwdt_init0 (void) {
 }
 
 void pybwdt_srv_alive (void) {
-    pyb_wdt_obj.servers = true;
+    machine_wdt_obj.servers = true;
 }
 
 void pybwdt_srv_sleeping (bool state) {
-    pyb_wdt_obj.servers_sleeping = state;
+    machine_wdt_obj.servers_sleeping = state;
 }
 
 void pybwdt_sl_alive (void) {
-    pyb_wdt_obj.simplelink = true;
+    machine_wdt_obj.simplelink = true;
 }
 
 /******************************************************************************/
 // MicroPython bindings
 
-STATIC const mp_arg_t pyb_wdt_init_args[] = {
-    { MP_QSTR_id,                             MP_ARG_OBJ,  {.u_obj = mp_const_none} },
-    { MP_QSTR_timeout,                        MP_ARG_INT,  {.u_int = 5000} },   // 5 s
-};
-STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    // check the arguments
-    mp_map_t kw_args;
-    mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args);
-    mp_arg_val_t args[MP_ARRAY_SIZE(pyb_wdt_init_args)];
-    mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_wdt_init_args, args);
-
-    if (args[0].u_obj != mp_const_none && mp_obj_get_int(args[0].u_obj) > 0) {
+STATIC machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms) {
+    if (id != 0) {
         mp_raise_OSError(MP_ENODEV);
     }
-    uint timeout_ms = args[1].u_int;
     if (timeout_ms < PYBWDT_MIN_TIMEOUT_MS) {
         mp_raise_ValueError(MP_ERROR_TEXT("invalid argument(s) value"));
     }
-    if (pyb_wdt_obj.running) {
+    if (machine_wdt_obj.running) {
         mp_raise_OSError(MP_EPERM);
     }
 
@@ -116,10 +101,10 @@ STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_
     // Unlock to be able to configure the registers
     MAP_WatchdogUnlock(WDT_BASE);
 
-#ifdef DEBUG
+    #ifdef DEBUG
     // make the WDT stall when the debugger stops on a breakpoint
     MAP_WatchdogStallEnable (WDT_BASE);
-#endif
+    #endif
 
     // set the watchdog timer reload value
     // the WDT trigger a system reset after the second timeout
@@ -128,33 +113,16 @@ STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_
 
     // start the timer. Once it's started, it cannot be disabled.
     MAP_WatchdogEnable(WDT_BASE);
-    pyb_wdt_obj.base.type = &pyb_wdt_type;
-    pyb_wdt_obj.running = true;
+    machine_wdt_obj.base.type = &machine_wdt_type;
+    machine_wdt_obj.running = true;
 
-    return (mp_obj_t)&pyb_wdt_obj;
+    return &machine_wdt_obj;
 }
 
-STATIC mp_obj_t pyb_wdt_feed(mp_obj_t self_in) {
-    pyb_wdt_obj_t *self = self_in;
+STATIC void mp_machine_wdt_feed(machine_wdt_obj_t *self) {
     if ((self->servers || self->servers_sleeping) && self->simplelink && self->running) {
         self->servers = false;
         self->simplelink = false;
         MAP_WatchdogIntClear(WDT_BASE);
     }
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_wdt_feed_obj, pyb_wdt_feed);
-
-STATIC const mp_rom_map_elem_t pybwdt_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&pyb_wdt_feed_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(pybwdt_locals_dict, pybwdt_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    pyb_wdt_type,
-    MP_QSTR_WDT,
-    MP_TYPE_FLAG_NONE,
-    make_new, pyb_wdt_make_new,
-    locals_dict, &pybwdt_locals_dict
-    );
-
diff --git a/ports/cc3200/mods/modmachine.c b/ports/cc3200/mods/modmachine.c
index bdf963c31a..107efaef16 100644
--- a/ports/cc3200/mods/modmachine.c
+++ b/ports/cc3200/mods/modmachine.c
@@ -30,6 +30,7 @@
 
 #include "py/runtime.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
 #include "inc/hw_types.h"
 #include "inc/hw_gpio.h"
 #include "inc/hw_ints.h"
@@ -51,7 +52,6 @@
 #include "pybadc.h"
 #include "pybi2c.h"
 #include "pybsd.h"
-#include "pybwdt.h"
 #include "pybsleep.h"
 #include "pybspi.h"
 #include "pybtimer.h"
@@ -189,7 +189,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&pyb_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&pyb_uart_type) },
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&pyb_timer_type) },
-    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&pyb_wdt_type) },
+    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
     { MP_ROM_QSTR(MP_QSTR_SD),                  MP_ROM_PTR(&pyb_sd_type) },
 
     // class constants
diff --git a/ports/cc3200/mods/pybwdt.h b/ports/cc3200/mods/pybwdt.h
index 275c49435c..e106ae30ea 100644
--- a/ports/cc3200/mods/pybwdt.h
+++ b/ports/cc3200/mods/pybwdt.h
@@ -26,9 +26,7 @@
 #ifndef MICROPY_INCLUDED_CC3200_MODS_PYBWDT_H
 #define MICROPY_INCLUDED_CC3200_MODS_PYBWDT_H
 
-#include "py/obj.h"
-
-extern const mp_obj_type_t pyb_wdt_type;
+#include <stdbool.h>
 
 void pybwdt_init0 (void);
 void pybwdt_srv_alive (void);
diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h
index b6b412f178..6b2dc7ca09 100644
--- a/ports/cc3200/mpconfigport.h
+++ b/ports/cc3200/mpconfigport.h
@@ -120,6 +120,8 @@
 #define MICROPY_PY_TIME_GMTIME_LOCALTIME_MKTIME     (1)
 #define MICROPY_PY_TIME_TIME_TIME_NS                (1)
 #define MICROPY_PY_TIME_INCLUDEFILE                 "ports/cc3200/mods/modtime.c"
+#define MICROPY_PY_MACHINE_WDT                      (1)
+#define MICROPY_PY_MACHINE_WDT_INCLUDEFILE          "ports/cc3200/mods/machine_wdt.c"
 
 #define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF      (1)
 #define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE        (0)
diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index f5219048f3..e1dd546ea3 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -86,7 +86,6 @@ list(APPEND MICROPY_SOURCE_PORT
     esp32_ulp.c
     modesp32.c
     machine_hw_spi.c
-    machine_wdt.c
     mpthreadport.c
     machine_rtc.c
     machine_sdcard.c
diff --git a/ports/esp32/machine_wdt.c b/ports/esp32/machine_wdt.c
index bf924c35e0..cee761f265 100644
--- a/ports/esp32/machine_wdt.c
+++ b/ports/esp32/machine_wdt.c
@@ -25,16 +25,11 @@
  * THE SOFTWARE.
  */
 
-#include <string.h>
-
-#include "py/nlr.h"
-#include "py/obj.h"
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_wdt.c via MICROPY_PY_MACHINE_WDT_INCLUDEFILE.
 
 #include "esp_task_wdt.h"
 
-const mp_obj_type_t machine_wdt_type;
-
 typedef struct _machine_wdt_obj_t {
     mp_obj_base_t base;
     esp_task_wdt_user_handle_t twdt_user_handle;
@@ -44,25 +39,17 @@ STATIC machine_wdt_obj_t wdt_default = {
     {&machine_wdt_type}, 0
 };
 
-STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    enum { ARG_id, ARG_timeout };
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} },
-        { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} }
-    };
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    if (args[ARG_id].u_int != 0) {
+STATIC machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms) {
+    if (id != 0) {
         mp_raise_ValueError(NULL);
     }
 
-    if (args[ARG_timeout].u_int <= 0) {
+    if (timeout_ms <= 0) {
         mp_raise_ValueError(MP_ERROR_TEXT("WDT timeout too short"));
     }
 
     esp_task_wdt_config_t config = {
-        .timeout_ms = args[ARG_timeout].u_int,
+        .timeout_ms = timeout_ms,
         .idle_core_mask = 0,
         .trigger_panic = true,
     };
@@ -81,25 +68,10 @@ STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type_in, size_t n_args
     return &wdt_default;
 }
 
-STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) {
-    (void)self_in;
+STATIC void mp_machine_wdt_feed(machine_wdt_obj_t *self) {
+    (void)self;
     mp_int_t rs_code = esp_task_wdt_reset_user(wdt_default.twdt_user_handle);
     if (rs_code != ESP_OK) {
         mp_raise_OSError(rs_code);
     }
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed);
-
-STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_wdt_type,
-    MP_QSTR_WDT,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_wdt_make_new,
-    locals_dict, &machine_wdt_locals_dict
-    );
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 31fa589aed..f8567973b0 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -47,6 +47,7 @@
 #include "extmod/machine_pwm.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "modmachine.h"
 #include "machine_rtc.h"
 
@@ -297,7 +298,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) },
 
     { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) },
+    #if MICROPY_PY_MACHINE_WDT
     { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) },
+    #endif
     #if MICROPY_HW_ENABLE_SDCARD
     { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&machine_sdcard_type) },
     #endif
diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h
index 24417f6107..24f27101a8 100644
--- a/ports/esp32/modmachine.h
+++ b/ports/esp32/modmachine.h
@@ -10,7 +10,6 @@ typedef enum {
 } wake_type_t;
 
 extern const mp_obj_type_t machine_timer_type;
-extern const mp_obj_type_t machine_wdt_type;
 extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_touchpad_type;
 extern const mp_obj_type_t machine_adc_type;
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 04a745262d..5d39323c58 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -115,6 +115,8 @@
 #ifndef MICROPY_PY_MACHINE_I2S
 #define MICROPY_PY_MACHINE_I2S              (1)
 #endif
+#define MICROPY_PY_MACHINE_WDT              (1)
+#define MICROPY_PY_MACHINE_WDT_INCLUDEFILE  "ports/esp32/machine_wdt.c"
 #define MICROPY_PY_NETWORK (1)
 #ifndef MICROPY_PY_NETWORK_HOSTNAME_DEFAULT
 #if CONFIG_IDF_TARGET_ESP32
diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index 75b4076338..5982987d7b 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -116,7 +116,6 @@ SRC_C = \
 	machine_rtc.c \
 	machine_adc.c \
 	machine_uart.c \
-	machine_wdt.c \
 	machine_hspi.c \
 	modesp.c \
 	network_wlan.c \
diff --git a/ports/esp8266/machine_wdt.c b/ports/esp8266/machine_wdt.c
index 39a5d51119..074ee56598 100644
--- a/ports/esp8266/machine_wdt.c
+++ b/ports/esp8266/machine_wdt.c
@@ -24,27 +24,22 @@
  * THE SOFTWARE.
  */
 
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_wdt.c via MICROPY_PY_MACHINE_WDT_INCLUDEFILE.
 
-#include "py/runtime.h"
 #include "user_interface.h"
-#include "etshal.h"
 #include "ets_alt_task.h"
 
-const mp_obj_type_t esp_wdt_type;
-
 typedef struct _machine_wdt_obj_t {
     mp_obj_base_t base;
 } machine_wdt_obj_t;
 
-STATIC machine_wdt_obj_t wdt_default = {{&esp_wdt_type}};
+STATIC machine_wdt_obj_t wdt_default = {{&machine_wdt_type}};
 
-STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
-    mp_arg_check_num(n_args, n_kw, 0, 1, false);
-
-    mp_int_t id = 0;
-    if (n_args > 0) {
-        id = mp_obj_get_int(args[0]);
+STATIC machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms) {
+    // The timeout on ESP8266 is fixed, so raise an exception if the argument is not the default.
+    if (timeout_ms != 5000) {
+        mp_raise_ValueError(NULL);
     }
 
     switch (id) {
@@ -57,22 +52,7 @@ STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type_in, size_t n_args
     }
 }
 
-STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) {
-    (void)self_in;
+STATIC void mp_machine_wdt_feed(machine_wdt_obj_t *self) {
+    (void)self;
     system_soft_wdt_feed();
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed);
-
-STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    esp_wdt_type,
-    MP_QSTR_WDT,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_wdt_make_new,
-    locals_dict, &machine_wdt_locals_dict
-    );
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index 64346b4deb..eee5f3c683 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -43,6 +43,7 @@
 #include "extmod/machine_pwm.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "modmachine.h"
 
 #include "xtirq.h"
@@ -58,8 +59,6 @@
 // #define MACHINE_WAKE_SLEEP (0x02)
 #define MACHINE_WAKE_DEEPSLEEP (0x04)
 
-extern const mp_obj_type_t esp_wdt_type;
-
 STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
     if (n_args == 0) {
         // get
@@ -423,7 +422,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
 
     { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) },
     { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&esp_timer_type) },
-    { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&esp_wdt_type) },
+    #if MICROPY_PY_MACHINE_WDT
+    { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pyb_pin_type) },
     { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
     { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) },
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index 18b2e47e29..2a51f8bcbb 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -71,6 +71,8 @@
 #define MICROPY_PY_MACHINE_SOFTI2C  (1)
 #define MICROPY_PY_MACHINE_SPI      (1)
 #define MICROPY_PY_MACHINE_SOFTSPI  (1)
+#define MICROPY_PY_MACHINE_WDT      (1)
+#define MICROPY_PY_MACHINE_WDT_INCLUDEFILE "ports/esp8266/machine_wdt.c"
 #define MICROPY_PY_NETWORK (1)
 #ifndef MICROPY_PY_NETWORK_HOSTNAME_DEFAULT
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-esp8266"
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index 3521f92288..d29b38e040 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -205,7 +205,6 @@ SRC_C += \
 	machine_sdcard.c \
 	machine_spi.c \
 	machine_uart.c \
-	machine_wdt.c \
 	main.c \
 	mbedtls/mbedtls_port.c \
 	mimxrt_flash.c \
diff --git a/ports/mimxrt/machine_wdt.c b/ports/mimxrt/machine_wdt.c
index f5f14f9ef7..176e114f72 100644
--- a/ports/mimxrt/machine_wdt.c
+++ b/ports/mimxrt/machine_wdt.c
@@ -24,8 +24,8 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "modmachine.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_wdt.c via MICROPY_PY_MACHINE_WDT_INCLUDEFILE.
 
 #include "fsl_wdog.h"
 
@@ -38,19 +38,8 @@ typedef struct _machine_wdt_obj_t {
 
 STATIC const machine_wdt_obj_t machine_wdt = {{&machine_wdt_type}};
 
-STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    enum { ARG_id, ARG_timeout };
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} },
-        { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} },
-    };
-
-    // Parse the arguments.
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
+STATIC machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms) {
     // Verify the WDT id.
-    mp_int_t id = args[ARG_id].u_int;
     if (id != 0) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("WDT(%d) doesn't exist"), id);
     }
@@ -58,51 +47,33 @@ STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type, size_t n_args, s
     // Start the watchdog (timeout is in milliseconds).
     wdog_config_t config;
     WDOG_GetDefaultConfig(&config);
-    uint32_t timeout = args[ARG_timeout].u_int;
     // confine to the valid range
-    if (timeout < MIN_TIMEOUT) {
-        timeout = MIN_TIMEOUT;
-    } else if (timeout > MAX_TIMEOUT) {
-        timeout = MAX_TIMEOUT;
+    if (timeout_ms < MIN_TIMEOUT) {
+        timeout_ms = MIN_TIMEOUT;
+    } else if (timeout_ms > MAX_TIMEOUT) {
+        timeout_ms = MAX_TIMEOUT;
     }
-    config.timeoutValue = (timeout / 500) - 1;
+    config.timeoutValue = (timeout_ms / 500) - 1;
     WDOG_Init(WDOG1, &config);
 
-    return MP_OBJ_FROM_PTR(&machine_wdt);
+    return (machine_wdt_obj_t *)&machine_wdt;
 }
 
-STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) {
-    (void)self_in;
+STATIC void mp_machine_wdt_feed(machine_wdt_obj_t *self) {
+    (void)self;
     WDOG_Refresh(WDOG1);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed);
 
-STATIC mp_obj_t machine_wdt_timeout_ms(mp_obj_t self_in, mp_obj_t timout_in) {
-    uint32_t timeout = mp_obj_get_int(timout_in);
+STATIC void mp_machine_wdt_timeout_ms_set(machine_wdt_obj_t *self, mp_int_t timeout_ms) {
+    (void)self;
+
     // confine to the valid range
-    if (timeout < MIN_TIMEOUT) {
-        timeout = MIN_TIMEOUT;
-    } else if (timeout > MAX_TIMEOUT) {
-        timeout = MAX_TIMEOUT;
+    if (timeout_ms < MIN_TIMEOUT) {
+        timeout_ms = MIN_TIMEOUT;
+    } else if (timeout_ms > MAX_TIMEOUT) {
+        timeout_ms = MAX_TIMEOUT;
     }
-    timeout = (timeout / 500) - 1;
+    uint32_t timeout = (timeout_ms / 500) - 1;
     WDOG_SetTimeoutValue(WDOG1, (uint16_t)timeout);
     WDOG_Refresh(WDOG1);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_wdt_timeout_ms_obj, machine_wdt_timeout_ms);
-
-STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) },
-    { MP_ROM_QSTR(MP_QSTR_timeout_ms), MP_ROM_PTR(&machine_wdt_timeout_ms_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_wdt_type,
-    MP_QSTR_WDT,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_wdt_make_new,
-    locals_dict, &machine_wdt_locals_dict
-    );
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index 16eae22029..c2f3559cf8 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -33,6 +33,7 @@
 #include "extmod/machine_pulse.h"
 #include "extmod/machine_signal.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "led.h"
 #include "pin.h"
@@ -204,7 +205,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     #endif
     { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
+    #if MICROPY_PY_MACHINE_WDT
     { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
+    #endif
 
     { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) },
     { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) },
diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h
index 478b1c7736..cf40505ea5 100644
--- a/ports/mimxrt/modmachine.h
+++ b/ports/mimxrt/modmachine.h
@@ -38,7 +38,6 @@ extern const mp_obj_type_t machine_sdcard_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_uart_type;
-extern const mp_obj_type_t machine_wdt_type;
 
 void machine_adc_init(void);
 void machine_pin_irq_deinit(void);
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index feb6cb2660..1eb3b17112 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -94,6 +94,9 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_MACHINE_SPI              (1)
 #define MICROPY_PY_MACHINE_SOFTSPI          (1)
 #define MICROPY_PY_MACHINE_TIMER            (1)
+#define MICROPY_PY_MACHINE_WDT              (1)
+#define MICROPY_PY_MACHINE_WDT_INCLUDEFILE  "ports/mimxrt/machine_wdt.c"
+#define MICROPY_PY_MACHINE_WDT_TIMEOUT_MS   (1)
 #define MICROPY_SOFT_TIMER_TICKS_MS         systick_ms
 #define MICROPY_PY_ONEWIRE                  (1)
 
diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h
index 5dbda6bda8..ec494b798c 100644
--- a/ports/renesas-ra/modmachine.h
+++ b/ports/renesas-ra/modmachine.h
@@ -30,7 +30,6 @@
 #include "py/obj.h"
 
 extern const mp_obj_type_t machine_timer_type;
-extern const mp_obj_type_t machine_wdt_type;
 extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_touchpad_type;
 extern const mp_obj_type_t machine_adc_type;
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index fae4cda756..b8cf4d7bec 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -126,7 +126,6 @@ set(MICROPY_SOURCE_PORT
     machine_spi.c
     machine_timer.c
     machine_uart.c
-    machine_wdt.c
     main.c
     modmachine.c
     modrp2.c
diff --git a/ports/rp2/machine_wdt.c b/ports/rp2/machine_wdt.c
index 6574a6180f..58c372176c 100644
--- a/ports/rp2/machine_wdt.c
+++ b/ports/rp2/machine_wdt.c
@@ -24,8 +24,8 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "modmachine.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_wdt.c via MICROPY_PY_MACHINE_WDT_INCLUDEFILE.
 
 #include "hardware/watchdog.h"
 
@@ -38,49 +38,23 @@ typedef struct _machine_wdt_obj_t {
 
 STATIC const machine_wdt_obj_t machine_wdt = {{&machine_wdt_type}};
 
-STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    enum { ARG_id, ARG_timeout };
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} },
-        { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} },
-    };
-
-    // Parse the arguments.
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
+STATIC machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms) {
     // Verify the WDT id.
-    mp_int_t id = args[ARG_id].u_int;
     if (id != 0) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("WDT(%d) doesn't exist"), id);
     }
 
     // Start the watchdog (timeout is in milliseconds).
-    uint32_t timeout = args[ARG_timeout].u_int;
+    uint32_t timeout = timeout_ms;
     if (timeout > WDT_TIMEOUT_MAX) {
         mp_raise_ValueError(MP_ERROR_TEXT("timeout exceeds " MP_STRINGIFY(WDT_TIMEOUT_MAX)));
     }
     watchdog_enable(timeout, false);
 
-    return MP_OBJ_FROM_PTR(&machine_wdt);
+    return (machine_wdt_obj_t *)&machine_wdt;
 }
 
-STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) {
-    (void)self_in;
+STATIC void mp_machine_wdt_feed(machine_wdt_obj_t *self) {
+    (void)self;
     watchdog_update();
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed);
-
-STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_wdt_type,
-    MP_QSTR_WDT,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_wdt_make_new,
-    locals_dict, &machine_wdt_locals_dict
-    );
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 35c938b54b..eedeca1e3b 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -35,6 +35,7 @@
 #include "extmod/machine_pwm.h"
 #include "extmod/machine_signal.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 
 #include "modmachine.h"
 #include "uart.h"
@@ -266,7 +267,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
+    #if MICROPY_PY_MACHINE_WDT
     { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
+    #endif
 
     { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(RP2_RESET_PWRON) },
     { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(RP2_RESET_WDT) },
diff --git a/ports/rp2/modmachine.h b/ports/rp2/modmachine.h
index 45ccd49e8c..559fb34814 100644
--- a/ports/rp2/modmachine.h
+++ b/ports/rp2/modmachine.h
@@ -11,7 +11,6 @@ extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_uart_type;
-extern const mp_obj_type_t machine_wdt_type;
 
 void machine_pin_init(void);
 void machine_pin_deinit(void);
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index 056e2df4fe..bf43b5ce7f 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -122,6 +122,8 @@
 #define MICROPY_PY_MACHINE_SPI_MSB              (SPI_MSB_FIRST)
 #define MICROPY_PY_MACHINE_SPI_LSB              (SPI_LSB_FIRST)
 #define MICROPY_PY_MACHINE_SOFTSPI              (1)
+#define MICROPY_PY_MACHINE_WDT                  (1)
+#define MICROPY_PY_MACHINE_WDT_INCLUDEFILE      "ports/rp2/machine_wdt.c"
 #define MICROPY_PY_ONEWIRE                      (1)
 #define MICROPY_VFS                             (1)
 #define MICROPY_VFS_LFS2                        (1)
diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index 6dd71bd93f..8e4327073c 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -104,7 +104,6 @@ SRC_C += \
 	machine_rtc.c \
 	machine_spi.c \
 	machine_uart.c \
-	machine_wdt.c \
 	main.c \
 	modmachine.c \
 	modsamd.c \
diff --git a/ports/samd/machine_wdt.c b/ports/samd/machine_wdt.c
index d7dcfcf54e..d6fadfd123 100644
--- a/ports/samd/machine_wdt.c
+++ b/ports/samd/machine_wdt.c
@@ -24,8 +24,8 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "modmachine.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_wdt.c via MICROPY_PY_MACHINE_WDT_INCLUDEFILE.
 
 #include "sam.h"
 
@@ -76,27 +76,15 @@ STATIC void set_timeout(uint32_t timeout) {
     #endif
 }
 
-STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    enum { ARG_id, ARG_timeout, ARG_lock };
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} },
-        { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} },
-    };
-
-    // Parse the arguments.
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
+STATIC machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms) {
     #if defined(MCU_SAMD51)
     // Verify the WDT id. SAMD51 only, saving a few bytes for SAMD21
-    mp_int_t id = args[ARG_id].u_int;
     if (id != 0) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("WDT(%d) doesn't exist"), id);
     }
     #endif
 
     // Start the watchdog (timeout is in milliseconds).
-    uint32_t timeout = args[ARG_timeout].u_int;
     // Configure the WDT
     #if defined(MCU_SAMD21)
 
@@ -112,37 +100,17 @@ STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type, size_t n_args, s
 
     #endif
 
-    set_timeout(timeout);
+    set_timeout(timeout_ms);
 
-    return MP_OBJ_FROM_PTR(&machine_wdt);
+    return (machine_wdt_obj_t *)&machine_wdt;
 }
 
-STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) {
-    (void)self_in;
+STATIC void mp_machine_wdt_feed(machine_wdt_obj_t *self) {
+    (void)self;
     WDT->CLEAR.reg = 0xa5;
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed);
 
-STATIC mp_obj_t machine_wdt_timeout_ms(mp_obj_t self_in, mp_obj_t timout_in) {
-    uint32_t timeout = mp_obj_get_int(timout_in);
-
-    set_timeout(timeout);
-
-    return mp_const_none;
+STATIC void mp_machine_wdt_timeout_ms_set(machine_wdt_obj_t *self, mp_int_t timeout_ms) {
+    (void)self;
+    set_timeout(timeout_ms);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_wdt_timeout_ms_obj, machine_wdt_timeout_ms);
-
-STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) },
-    { MP_ROM_QSTR(MP_QSTR_timeout_ms), MP_ROM_PTR(&machine_wdt_timeout_ms_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_wdt_type,
-    MP_QSTR_WDT,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_wdt_make_new,
-    locals_dict, &machine_wdt_locals_dict
-    );
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 9d5b7c2e27..97718401a3 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -31,6 +31,7 @@
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_signal.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "drivers/dht/dht.h"
 #include "shared/runtime/pyexec.h"
 #include "modmachine.h"
@@ -261,7 +262,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     #if MICROPY_PY_MACHINE_UART
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
     #endif
+    #if MICROPY_PY_MACHINE_WDT
     { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
+    #endif
     #if MICROPY_PY_MACHINE_RTC
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) },
     #endif
diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h
index b3ba44039a..d62b14a0aa 100644
--- a/ports/samd/modmachine.h
+++ b/ports/samd/modmachine.h
@@ -49,7 +49,6 @@ extern const mp_obj_type_t machine_timer_type;
 #if MICROPY_PY_MACHINE_UART
 extern const mp_obj_type_t machine_uart_type;
 #endif
-extern const mp_obj_type_t machine_wdt_type;
 #if MICROPY_PY_MACHINE_RTC
 extern const mp_obj_type_t machine_rtc_type;
 #endif
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 011119fd11..3505d8db1e 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -127,6 +127,9 @@
 #endif
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
 #define MICROPY_PY_MACHINE_DHT_READINTO     (1)
+#define MICROPY_PY_MACHINE_WDT              (1)
+#define MICROPY_PY_MACHINE_WDT_INCLUDEFILE  "ports/samd/machine_wdt.c"
+#define MICROPY_PY_MACHINE_WDT_TIMEOUT_MS   (1)
 #define MICROPY_PY_ONEWIRE                  (1)
 #define MICROPY_PY_PLATFORM                 (1)
 #define MICROPY_PLATFORM_VERSION            "ASF4"
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index dcfc8dfd54..589ef4cdbb 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -329,7 +329,6 @@ SRC_C += \
 	fdcan.c \
 	pyb_can.c \
 	usb.c \
-	wdt.c \
 	eth.c \
 	gccollect.c \
 	help.c \
diff --git a/ports/stm32/wdt.c b/ports/stm32/machine_wdt.c
similarity index 60%
rename from ports/stm32/wdt.c
rename to ports/stm32/machine_wdt.c
index e541e4d36b..e0605751d1 100644
--- a/ports/stm32/wdt.c
+++ b/ports/stm32/machine_wdt.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2016 Damien P. George
+ * Copyright (c) 2016-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,40 +24,28 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_wdt.c via MICROPY_PY_MACHINE_WDT_INCLUDEFILE.
 
-#include "py/runtime.h"
-#include "wdt.h"
+#include "py/mphal.h"
 
 #if defined(STM32H7)
 #define IWDG (IWDG1)
 #endif
 
-typedef struct _pyb_wdt_obj_t {
+typedef struct _machine_wdt_obj_t {
     mp_obj_base_t base;
-} pyb_wdt_obj_t;
+} machine_wdt_obj_t;
 
-STATIC const pyb_wdt_obj_t pyb_wdt = {{&pyb_wdt_type}};
+STATIC const machine_wdt_obj_t machine_wdt = {{&machine_wdt_type}};
 
-STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    // parse arguments
-    enum { ARG_id, ARG_timeout };
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} },
-        { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} },
-    };
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    mp_int_t id = args[ARG_id].u_int;
+STATIC machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms) {
     if (id != 0) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("WDT(%d) doesn't exist"), id);
     }
 
-    // timeout is in milliseconds
-    mp_int_t timeout = args[ARG_timeout].u_int;
-
     // compute prescaler
+    int32_t timeout = timeout_ms;
     uint32_t prescaler;
     for (prescaler = 0; prescaler < 6 && timeout >= 512; ++prescaler, timeout /= 2) {
     }
@@ -86,26 +74,10 @@ STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_
     // start the watch dog
     IWDG->KR = 0xcccc;
 
-    return MP_OBJ_FROM_PTR(&pyb_wdt);
+    return (machine_wdt_obj_t *)&machine_wdt;
 }
 
-STATIC mp_obj_t pyb_wdt_feed(mp_obj_t self_in) {
-    (void)self_in;
+STATIC void mp_machine_wdt_feed(machine_wdt_obj_t *self) {
+    (void)self;
     IWDG->KR = 0xaaaa;
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_wdt_feed_obj, pyb_wdt_feed);
-
-STATIC const mp_rom_map_elem_t pyb_wdt_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&pyb_wdt_feed_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(pyb_wdt_locals_dict, pyb_wdt_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    pyb_wdt_type,
-    MP_QSTR_WDT,
-    MP_TYPE_FLAG_NONE,
-    make_new, pyb_wdt_make_new,
-    locals_dict, &pyb_wdt_locals_dict
-    );
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 69fe8f4f54..926dc30413 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -38,6 +38,7 @@
 #include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
 #include "extmod/vfs.h"
@@ -56,7 +57,6 @@
 #include "i2c.h"
 #include "spi.h"
 #include "uart.h"
-#include "wdt.h"
 
 #if defined(STM32G0)
 // G0 has BOR and POR combined
@@ -447,7 +447,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
     #endif
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&pyb_uart_type) },
-    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&pyb_wdt_type) },
+    #if MICROPY_PY_MACHINE_WDT
+    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
     #if 0
     { MP_ROM_QSTR(MP_QSTR_HeartBeat),           MP_ROM_PTR(&pyb_heartbeat_type) },
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index 2d2d81486b..0e9df54ff4 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -122,6 +122,8 @@
 #define MICROPY_PY_MACHINE_SPI_LSB  (SPI_FIRSTBIT_LSB)
 #define MICROPY_PY_MACHINE_SOFTSPI  (1)
 #define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_WDT      (1)
+#define MICROPY_PY_MACHINE_WDT_INCLUDEFILE "ports/stm32/machine_wdt.c"
 #endif
 #define MICROPY_HW_SOFTSPI_MIN_DELAY (0)
 #define MICROPY_HW_SOFTSPI_MAX_BAUDRATE (HAL_RCC_GetSysClockFreq() / 48)

From 7e7af715271c8c3ca3ec8c600b835aa388624461 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 20 Oct 2023 16:00:36 +1100
Subject: [PATCH 045/310] extmod/machine_pwm: Remove header file and move decls
 to .c file.

With public declarations moved to extmod/modmachine.h.  It's now mandatory
for a port to define MICROPY_PY_MACHINE_PWM_INCLUDEFILE if it enables
MICROPY_PY_MACHINE_PWM.  This follows how extmod/machine_wdt.c works.

All ports have been updated to work with this modified scheme.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_pwm.c                   | 21 ++++++++--
 extmod/machine_pwm.h                   | 55 --------------------------
 extmod/modmachine.h                    |  2 +
 ports/esp32/machine_pwm.c              |  6 +--
 ports/esp32/modmachine.c               |  1 -
 ports/esp8266/machine_pwm.c            |  6 +--
 ports/esp8266/modmachine.c             |  1 -
 ports/mimxrt/machine_pwm.c             |  5 ++-
 ports/mimxrt/modmachine.h              |  1 -
 ports/nrf/modules/machine/modmachine.c |  1 +
 ports/nrf/modules/machine/pwm.c        | 41 +++++++------------
 ports/nrf/modules/machine/pwm.h        |  2 -
 ports/nrf/modules/machine/soft_pwm.c   | 15 ++-----
 ports/renesas-ra/machine_pwm.c         | 10 ++---
 ports/renesas-ra/modmachine.c          |  2 +-
 ports/rp2/machine_pwm.c                |  6 +--
 ports/rp2/modmachine.c                 |  1 -
 ports/samd/machine_pwm.c               |  9 +----
 ports/samd/modmachine.h                |  3 --
 19 files changed, 57 insertions(+), 131 deletions(-)
 delete mode 100644 extmod/machine_pwm.h

diff --git a/extmod/machine_pwm.c b/extmod/machine_pwm.c
index 8a633b3793..13b96eb5d4 100644
--- a/extmod/machine_pwm.c
+++ b/extmod/machine_pwm.c
@@ -28,11 +28,26 @@
 
 #if MICROPY_PY_MACHINE_PWM
 
-#include "extmod/machine_pwm.h"
+#include "extmod/modmachine.h"
 
-#ifdef MICROPY_PY_MACHINE_PWM_INCLUDEFILE
-#include MICROPY_PY_MACHINE_PWM_INCLUDEFILE
+// The port must provide implementations of these low-level PWM functions.
+STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind);
+STATIC mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args);
+STATIC void mp_machine_pwm_init_helper(machine_pwm_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+STATIC void mp_machine_pwm_deinit(machine_pwm_obj_t *self);
+STATIC mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self);
+STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq);
+#if MICROPY_PY_MACHINE_PWM_DUTY
+STATIC mp_obj_t mp_machine_pwm_duty_get(machine_pwm_obj_t *self);
+STATIC void mp_machine_pwm_duty_set(machine_pwm_obj_t *self, mp_int_t duty);
 #endif
+STATIC mp_obj_t mp_machine_pwm_duty_get_u16(machine_pwm_obj_t *self);
+STATIC void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self, mp_int_t duty_u16);
+STATIC mp_obj_t mp_machine_pwm_duty_get_ns(machine_pwm_obj_t *self);
+STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns);
+
+// The port provides implementations of the above in this file.
+#include MICROPY_PY_MACHINE_PWM_INCLUDEFILE
 
 STATIC mp_obj_t machine_pwm_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
     mp_machine_pwm_init_helper(args[0], n_args - 1, args + 1, kw_args);
diff --git a/extmod/machine_pwm.h b/extmod/machine_pwm.h
deleted file mode 100644
index f0953014ca..0000000000
--- a/extmod/machine_pwm.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2021 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_PWM_H
-#define MICROPY_INCLUDED_EXTMOD_MACHINE_PWM_H
-
-#include "py/obj.h"
-
-// A port must provide this type, but it's otherwise opaque.
-typedef struct _machine_pwm_obj_t machine_pwm_obj_t;
-
-// This PWM class is implemented by machine_pwm.c.
-extern const mp_obj_type_t machine_pwm_type;
-
-// A port must provide implementations of these low-level PWM functions, either as global
-// linker symbols, or included directly if MICROPY_PY_MACHINE_PWM_INCLUDEFILE is defined.
-#ifndef MICROPY_PY_MACHINE_PWM_INCLUDEFILE
-void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind);
-mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args);
-void mp_machine_pwm_init_helper(machine_pwm_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
-void mp_machine_pwm_deinit(machine_pwm_obj_t *self);
-mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self);
-void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq);
-mp_obj_t mp_machine_pwm_duty_get(machine_pwm_obj_t *self);
-void mp_machine_pwm_duty_set(machine_pwm_obj_t *self, mp_int_t duty);
-mp_obj_t mp_machine_pwm_duty_get_u16(machine_pwm_obj_t *self);
-void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self, mp_int_t duty_u16);
-mp_obj_t mp_machine_pwm_duty_get_ns(machine_pwm_obj_t *self);
-void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns);
-#endif
-
-#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_PWM_H
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index 794c62cde2..22bd0d6258 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -30,12 +30,14 @@
 #include "py/obj.h"
 
 // A port must provide these types, but they are otherwise opaque.
+typedef struct _machine_pwm_obj_t machine_pwm_obj_t;
 typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
 
 // These classes correspond to machine.Type entries in the machine module.
 // Their Python bindings are implemented in extmod, and their implementation
 // is provided by a port.
 extern const mp_obj_type_t machine_i2c_type;
+extern const mp_obj_type_t machine_pwm_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_wdt_type;
diff --git a/ports/esp32/machine_pwm.c b/ports/esp32/machine_pwm.c
index 462d0fa79c..03ef2d77fd 100644
--- a/ports/esp32/machine_pwm.c
+++ b/ports/esp32/machine_pwm.c
@@ -27,11 +27,11 @@
  * THE SOFTWARE.
  */
 
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_pwm.c via MICROPY_PY_MACHINE_PWM_INCLUDEFILE.
+
 #include <math.h>
-
-#include "py/runtime.h"
 #include "py/mphal.h"
-
 #include "driver/ledc.h"
 #include "esp_err.h"
 #include "soc/gpio_sig_map.h"
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index f8567973b0..fe6d18e786 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -44,7 +44,6 @@
 #include "extmod/machine_mem.h"
 #include "extmod/machine_signal.h"
 #include "extmod/machine_pulse.h"
-#include "extmod/machine_pwm.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
diff --git a/ports/esp8266/machine_pwm.c b/ports/esp8266/machine_pwm.c
index 58c8fa915f..b9e499d252 100644
--- a/ports/esp8266/machine_pwm.c
+++ b/ports/esp8266/machine_pwm.c
@@ -24,10 +24,10 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "py/mphal.h"
-#include "modmachine.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_pwm.c via MICROPY_PY_MACHINE_PWM_INCLUDEFILE.
 
+#include "py/mphal.h"
 #include "esppwm.h"
 
 typedef struct _machine_pwm_obj_t {
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index eee5f3c683..95048952c4 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -40,7 +40,6 @@
 #include "extmod/machine_mem.h"
 #include "extmod/machine_signal.h"
 #include "extmod/machine_pulse.h"
-#include "extmod/machine_pwm.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
diff --git a/ports/mimxrt/machine_pwm.c b/ports/mimxrt/machine_pwm.c
index a50b67cc8c..7b95d78877 100644
--- a/ports/mimxrt/machine_pwm.c
+++ b/ports/mimxrt/machine_pwm.c
@@ -25,9 +25,10 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_pwm.c via MICROPY_PY_MACHINE_PWM_INCLUDEFILE.
+
 #include "py/mphal.h"
-#include "modmachine.h"
 #include "pin.h"
 #include "fsl_clock.h"
 #include "fsl_iomuxc.h"
diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h
index cf40505ea5..92d875b4d0 100644
--- a/ports/mimxrt/modmachine.h
+++ b/ports/mimxrt/modmachine.h
@@ -32,7 +32,6 @@
 extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_i2s_type;
-extern const mp_obj_type_t machine_pwm_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
 extern const mp_obj_type_t machine_spi_type;
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index 616757a96a..59f163dee2 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -33,6 +33,7 @@
 #include "extmod/machine_mem.h"
 #include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
+#include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
 #include "lib/oofatfs/diskio.h"
diff --git a/ports/nrf/modules/machine/pwm.c b/ports/nrf/modules/machine/pwm.c
index 96917769ee..f0c11fa8fc 100644
--- a/ports/nrf/modules/machine/pwm.c
+++ b/ports/nrf/modules/machine/pwm.c
@@ -25,15 +25,11 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_pwm.c via MICROPY_PY_MACHINE_PWM_INCLUDEFILE.
+
 #include <string.h>
-
-#include "py/nlr.h"
-#include "py/runtime.h"
 #include "py/mphal.h"
-
-#if MICROPY_PY_MACHINE_HW_PWM
-
 #include "pin.h"
 #include "genhdr/pins.h"
 #include "pwm.h"
@@ -154,11 +150,6 @@ STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_p
 /* MicroPython bindings for machine API                                       */
 
 STATIC void machine_hard_pwm_start(const machine_pwm_obj_t *self);
-STATIC void mp_machine_pwm_deinit(const machine_pwm_obj_t *self);
-STATIC void mp_machine_pwm_freq_set(const machine_pwm_obj_t *self, mp_int_t freq);
-STATIC void mp_machine_pwm_duty_set(const machine_pwm_obj_t *self, mp_int_t duty);
-STATIC void mp_machine_pwm_duty_set_u16(const machine_pwm_obj_t *self, mp_int_t duty_u16);
-STATIC void mp_machine_pwm_duty_set_ns(const machine_pwm_obj_t *self, mp_int_t duty_ns);
 
 static const mp_arg_t allowed_args[] = {
     { MP_QSTR_pin,      MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
@@ -171,7 +162,7 @@ static const mp_arg_t allowed_args[] = {
     { MP_QSTR_channel,  MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
 };
 
-STATIC void mp_machine_pwm_init_helper(const machine_pwm_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_pwm_init_helper(machine_pwm_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_pin, ARG_freq, ARG_duty, ARG_duty_u16, ARG_duty_ns, ARG_invert, ARG_device, ARG_channel };
 
     mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
@@ -245,7 +236,7 @@ STATIC mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args
     // start the PWM running for this channel
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args);
-    mp_machine_pwm_init_helper(self, n_args, all_args, &kw_args);
+    mp_machine_pwm_init_helper((machine_pwm_obj_t *)self, n_args, all_args, &kw_args);
 
     return MP_OBJ_FROM_PTR(self);
 }
@@ -253,23 +244,23 @@ STATIC mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args
 // Stop all PWM modules and release them
 void pwm_deinit_all(void) {
     for (int i = 0; i < MP_ARRAY_SIZE(machine_hard_pwm_instances); i++) {
-        mp_machine_pwm_deinit(&machine_hard_pwm_obj[i * NRF_PWM_CHANNEL_COUNT]);
+        mp_machine_pwm_deinit((machine_pwm_obj_t *)&machine_hard_pwm_obj[i * NRF_PWM_CHANNEL_COUNT]);
     }
     pwm_init0();
 }
 
 // Stop the PWM module, but do not release it.
-STATIC void mp_machine_pwm_deinit(const machine_pwm_obj_t *self) {
+STATIC void mp_machine_pwm_deinit(machine_pwm_obj_t *self) {
     self->p_config->active = STOPPED;
     nrfx_pwm_stop(self->p_pwm, true);
     nrfx_pwm_uninit(self->p_pwm);
 }
 
-STATIC mp_obj_t mp_machine_pwm_freq_get(const machine_pwm_obj_t *self) {
+STATIC mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self) {
     return MP_OBJ_NEW_SMALL_INT(self->p_config->freq);
 }
 
-STATIC void mp_machine_pwm_freq_set(const machine_pwm_obj_t *self, mp_int_t freq) {
+STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) {
 
     uint8_t div = 0;
     if (freq > (PWM_MAX_BASE_FREQ / 3) || freq <= (PWM_MIN_BASE_FREQ / PWM_MAX_PERIOD)) {
@@ -285,7 +276,7 @@ STATIC void mp_machine_pwm_freq_set(const machine_pwm_obj_t *self, mp_int_t freq
     machine_hard_pwm_start(self);
 }
 
-STATIC mp_obj_t mp_machine_pwm_duty_get(const machine_pwm_obj_t *self) {
+STATIC mp_obj_t mp_machine_pwm_duty_get(machine_pwm_obj_t *self) {
     if (self->p_config->duty_mode[self->channel] == DUTY_PERCENT) {
         return MP_OBJ_NEW_SMALL_INT(self->p_config->duty[self->channel]);
     } else if (self->p_config->duty_mode[self->channel] == DUTY_U16) {
@@ -295,13 +286,13 @@ STATIC mp_obj_t mp_machine_pwm_duty_get(const machine_pwm_obj_t *self) {
     }
 }
 
-STATIC void mp_machine_pwm_duty_set(const machine_pwm_obj_t *self, mp_int_t duty) {
+STATIC void mp_machine_pwm_duty_set(machine_pwm_obj_t *self, mp_int_t duty) {
     self->p_config->duty[self->channel] = duty;
     self->p_config->duty_mode[self->channel] = DUTY_PERCENT;
     machine_hard_pwm_start(self);
 }
 
-STATIC mp_obj_t mp_machine_pwm_duty_get_u16(const machine_pwm_obj_t *self) {
+STATIC mp_obj_t mp_machine_pwm_duty_get_u16(machine_pwm_obj_t *self) {
     if (self->p_config->duty_mode[self->channel] == DUTY_U16) {
         return MP_OBJ_NEW_SMALL_INT(self->p_config->duty[self->channel]);
     } else if (self->p_config->duty_mode[self->channel] == DUTY_PERCENT) {
@@ -311,13 +302,13 @@ STATIC mp_obj_t mp_machine_pwm_duty_get_u16(const machine_pwm_obj_t *self) {
     }
 }
 
-STATIC void mp_machine_pwm_duty_set_u16(const machine_pwm_obj_t *self, mp_int_t duty) {
+STATIC void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self, mp_int_t duty) {
     self->p_config->duty[self->channel] = duty;
     self->p_config->duty_mode[self->channel] = DUTY_U16;
     machine_hard_pwm_start(self);
 }
 
-STATIC mp_obj_t mp_machine_pwm_duty_get_ns(const machine_pwm_obj_t *self) {
+STATIC mp_obj_t mp_machine_pwm_duty_get_ns(machine_pwm_obj_t *self) {
     if (self->p_config->duty_mode[self->channel] == DUTY_NS) {
         return MP_OBJ_NEW_SMALL_INT(self->p_config->duty[self->channel]);
     } else {
@@ -325,7 +316,7 @@ STATIC mp_obj_t mp_machine_pwm_duty_get_ns(const machine_pwm_obj_t *self) {
     }
 }
 
-STATIC void mp_machine_pwm_duty_set_ns(const machine_pwm_obj_t *self, mp_int_t duty) {
+STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty) {
     self->p_config->duty[self->channel] = duty;
     self->p_config->duty_mode[self->channel] = DUTY_NS;
     machine_hard_pwm_start(self);
@@ -393,5 +384,3 @@ STATIC void machine_hard_pwm_start(const machine_pwm_obj_t *self) {
         0, // Loop disabled.
         0);
 }
-
-#endif // MICROPY_PY_MACHINE_HW_PWM
diff --git a/ports/nrf/modules/machine/pwm.h b/ports/nrf/modules/machine/pwm.h
index 4c0528fb4c..aceb76ba06 100644
--- a/ports/nrf/modules/machine/pwm.h
+++ b/ports/nrf/modules/machine/pwm.h
@@ -26,5 +26,3 @@
 
 void pwm_init0(void);
 void pwm_deinit_all(void);
-
-extern const mp_obj_type_t machine_pwm_type;
diff --git a/ports/nrf/modules/machine/soft_pwm.c b/ports/nrf/modules/machine/soft_pwm.c
index 27783328eb..c69b5f0bbe 100644
--- a/ports/nrf/modules/machine/soft_pwm.c
+++ b/ports/nrf/modules/machine/soft_pwm.c
@@ -24,12 +24,10 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_pwm.c via MICROPY_PY_MACHINE_PWM_INCLUDEFILE.
+
 #include "py/mphal.h"
-
-#if MICROPY_PY_MACHINE_SOFT_PWM
-
 #include "softpwm.h"
 
 typedef enum {
@@ -62,11 +60,6 @@ STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_p
 // MicroPython bindings for machine API
 
 STATIC void machine_soft_pwm_start(machine_pwm_obj_t *self);
-STATIC void mp_machine_pwm_deinit(machine_pwm_obj_t *self);
-STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq);
-STATIC void mp_machine_pwm_duty_set(machine_pwm_obj_t *self, mp_int_t duty);
-STATIC void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self, mp_int_t duty_u16);
-STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns);
 
 STATIC void mp_machine_pwm_init_helper(machine_pwm_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_freq, ARG_duty, ARG_duty_u16, ARG_duty_ns };
@@ -210,5 +203,3 @@ STATIC void machine_soft_pwm_start(machine_pwm_obj_t *self) {
         pwm_set_duty_cycle(self->pwm_pin, duty_width);
     }
 }
-
-#endif // MICROPY_PY_MACHINE_HW_PWM
diff --git a/ports/renesas-ra/machine_pwm.c b/ports/renesas-ra/machine_pwm.c
index f2199805a1..936f698e33 100644
--- a/ports/renesas-ra/machine_pwm.c
+++ b/ports/renesas-ra/machine_pwm.c
@@ -25,15 +25,13 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_pwm.c via MICROPY_PY_MACHINE_PWM_INCLUDEFILE.
+
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_pwm.h"
 #include "pin.h"
 #include "ra/ra_gpt.h"
-#include "modmachine.h"
-
-#if MICROPY_HW_ENABLE_HW_PWM
 
 typedef struct _machine_pwm_obj_t {
     mp_obj_base_t base;
@@ -353,5 +351,3 @@ STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns
         }
     }
 }
-
-#endif // MICROPY_HW_ENABLE_HW_PWM
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index bc85d9b7f8..6f7b8b8c07 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -40,7 +40,7 @@
 #include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
-#include "extmod/machine_pwm.h"
+#include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
 #include "extmod/vfs.h"
diff --git a/ports/rp2/machine_pwm.c b/ports/rp2/machine_pwm.c
index a14ba0a43a..0248b3142a 100644
--- a/ports/rp2/machine_pwm.c
+++ b/ports/rp2/machine_pwm.c
@@ -24,10 +24,10 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "py/mphal.h"
-#include "modmachine.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_pwm.c via MICROPY_PY_MACHINE_PWM_INCLUDEFILE.
 
+#include "py/mphal.h"
 #include "hardware/clocks.h"
 #include "hardware/pwm.h"
 
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index eedeca1e3b..11de929e7b 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -32,7 +32,6 @@
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_mem.h"
 #include "extmod/machine_pulse.h"
-#include "extmod/machine_pwm.h"
 #include "extmod/machine_signal.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
diff --git a/ports/samd/machine_pwm.c b/ports/samd/machine_pwm.c
index 1b5f6c3ed8..196a9b1435 100644
--- a/ports/samd/machine_pwm.c
+++ b/ports/samd/machine_pwm.c
@@ -25,15 +25,12 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-
-#if MICROPY_PY_MACHINE_PWM
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_pwm.c via MICROPY_PY_MACHINE_PWM_INCLUDEFILE.
 
 #include <string.h>
 #include "py/mphal.h"
-#include "modmachine.h"
 #include "clock_config.h"
-
 #include "sam.h"
 #include "pin_af.h"
 
@@ -396,5 +393,3 @@ STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns
     duty_type_flags[self->device] &= ~(1 << self->channel);
     mp_machine_pwm_start(self);
 }
-
-#endif
diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h
index d62b14a0aa..faa43b7af7 100644
--- a/ports/samd/modmachine.h
+++ b/ports/samd/modmachine.h
@@ -39,9 +39,6 @@ extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_i2c_type;
 #endif
 extern const mp_obj_type_t machine_pin_type;
-#if MICROPY_PY_MACHINE_PWM
-extern const mp_obj_type_t machine_pwm_type;
-#endif
 #if MICROPY_PY_MACHINE_SPI
 extern const mp_obj_type_t machine_spi_type;
 #endif

From f2f3ef162d8915096379030838c314071b445ef4 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 9 Oct 2023 12:12:18 +1100
Subject: [PATCH 046/310] extmod/machine_i2s: Factor ports' I2S Python bindings
 to common code.

This factors the basic top-level I2S class code from the ports into
extmod/machine_i2s.c:
- I2S class definition and method table.
- The init and deinit method wrappers.
- The make_new code.

Further factoring will follow.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/extmod.cmake                |   1 +
 extmod/extmod.mk                   |   1 +
 extmod/machine_i2s.c               | 111 +++++++++++++++++++++++++++++
 extmod/modmachine.h                |   2 +
 ports/esp32/esp32_common.cmake     |   1 -
 ports/esp32/machine_i2s.c          |  78 +++-----------------
 ports/esp32/modmachine.h           |   1 -
 ports/esp32/mpconfigport.h         |   4 ++
 ports/mimxrt/Makefile              |   1 -
 ports/mimxrt/machine_i2s.c         |  74 ++-----------------
 ports/mimxrt/modmachine.h          |   1 -
 ports/mimxrt/mpconfigport.h        |   3 +
 ports/rp2/CMakeLists.txt           |   2 -
 ports/rp2/machine_i2s.c            |  76 +++-----------------
 ports/rp2/modmachine.h             |   1 -
 ports/rp2/mpconfigport.h           |   4 ++
 ports/stm32/Makefile               |   1 -
 ports/stm32/dma.c                  |   8 +--
 ports/stm32/machine_i2s.c          |  83 +++------------------
 ports/stm32/main.c                 |   2 +-
 ports/stm32/modmachine.c           |   2 +-
 ports/stm32/modmachine.h           |   1 -
 ports/stm32/mpconfigboard_common.h |   4 +-
 ports/stm32/mpconfigport.h         |   3 +
 24 files changed, 170 insertions(+), 295 deletions(-)
 create mode 100644 extmod/machine_i2s.c

diff --git a/extmod/extmod.cmake b/extmod/extmod.cmake
index 063df70f5f..ccb6f0465b 100644
--- a/extmod/extmod.cmake
+++ b/extmod/extmod.cmake
@@ -9,6 +9,7 @@ set(MICROPY_SOURCE_EXTMOD
     ${MICROPY_EXTMOD_DIR}/btstack/modbluetooth_btstack.c
     ${MICROPY_EXTMOD_DIR}/machine_bitstream.c
     ${MICROPY_EXTMOD_DIR}/machine_i2c.c
+    ${MICROPY_EXTMOD_DIR}/machine_i2s.c
     ${MICROPY_EXTMOD_DIR}/machine_mem.c
     ${MICROPY_EXTMOD_DIR}/machine_pulse.c
     ${MICROPY_EXTMOD_DIR}/machine_pwm.c
diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index a6c7826867..44b41f5ffb 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -4,6 +4,7 @@
 SRC_EXTMOD_C += \
 	extmod/machine_bitstream.c \
 	extmod/machine_i2c.c \
+	extmod/machine_i2s.c \
 	extmod/machine_mem.c \
 	extmod/machine_pinbase.c \
 	extmod/machine_pulse.c \
diff --git a/extmod/machine_i2s.c b/extmod/machine_i2s.c
new file mode 100644
index 0000000000..53de7293f2
--- /dev/null
+++ b/extmod/machine_i2s.c
@@ -0,0 +1,111 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Mike Teachman
+ * Copyright (c) 2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+
+#if MICROPY_PY_MACHINE_I2S
+
+#include "extmod/modmachine.h"
+
+// The port must provide implementations of these low-level I2S functions.
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id);
+STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self);
+
+// The port provides implementations of the above in this file.
+#include MICROPY_PY_MACHINE_I2S_INCLUDEFILE
+
+STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
+    mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
+    mp_int_t i2s_id = mp_obj_get_int(args[0]);
+
+    machine_i2s_obj_t *self = mp_machine_i2s_make_new_instance(i2s_id);
+
+    mp_map_t kw_args;
+    mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
+    mp_machine_i2s_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
+// I2S.init(...)
+STATIC mp_obj_t machine_i2s_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+    mp_machine_i2s_deinit(self);
+    mp_machine_i2s_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_init_obj, 1, machine_i2s_init);
+
+// I2S.deinit()
+STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
+    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_machine_i2s_deinit(self);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_i2s_deinit_obj, machine_i2s_deinit);
+
+STATIC const mp_rom_map_elem_t machine_i2s_locals_dict_table[] = {
+    // Methods
+    { MP_ROM_QSTR(MP_QSTR_init),            MP_ROM_PTR(&machine_i2s_init_obj) },
+    { MP_ROM_QSTR(MP_QSTR_readinto),        MP_ROM_PTR(&mp_stream_readinto_obj) },
+    { MP_ROM_QSTR(MP_QSTR_write),           MP_ROM_PTR(&mp_stream_write_obj) },
+    { MP_ROM_QSTR(MP_QSTR_deinit),          MP_ROM_PTR(&machine_i2s_deinit_obj) },
+    { MP_ROM_QSTR(MP_QSTR_irq),             MP_ROM_PTR(&machine_i2s_irq_obj) },
+    #if MICROPY_PY_MACHINE_I2S_FINALISER
+    { MP_ROM_QSTR(MP_QSTR___del__),         MP_ROM_PTR(&machine_i2s_deinit_obj) },
+    #endif
+
+    // Static method
+    { MP_ROM_QSTR(MP_QSTR_shift),           MP_ROM_PTR(&machine_i2s_shift_obj) },
+
+    // Constants
+    { MP_ROM_QSTR(MP_QSTR_RX),              MP_ROM_INT(MICROPY_PY_MACHINE_I2S_CONSTANT_RX) },
+    { MP_ROM_QSTR(MP_QSTR_TX),              MP_ROM_INT(MICROPY_PY_MACHINE_I2S_CONSTANT_TX) },
+    { MP_ROM_QSTR(MP_QSTR_STEREO),          MP_ROM_INT(STEREO) },
+    { MP_ROM_QSTR(MP_QSTR_MONO),            MP_ROM_INT(MONO) },
+};
+MP_DEFINE_CONST_DICT(machine_i2s_locals_dict, machine_i2s_locals_dict_table);
+
+STATIC const mp_stream_p_t i2s_stream_p = {
+    .read = machine_i2s_stream_read,
+    .write = machine_i2s_stream_write,
+    .ioctl = machine_i2s_ioctl,
+    .is_text = false,
+};
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_i2s_type,
+    MP_QSTR_I2S,
+    MP_TYPE_FLAG_ITER_IS_STREAM,
+    make_new, machine_i2s_make_new,
+    print, machine_i2s_print,
+    protocol, &i2s_stream_p,
+    locals_dict, &machine_i2s_locals_dict
+    );
+
+#endif // MICROPY_PY_MACHINE_I2S
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index 22bd0d6258..b0235dcf64 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -30,6 +30,7 @@
 #include "py/obj.h"
 
 // A port must provide these types, but they are otherwise opaque.
+typedef struct _machine_i2s_obj_t machine_i2s_obj_t;
 typedef struct _machine_pwm_obj_t machine_pwm_obj_t;
 typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
 
@@ -37,6 +38,7 @@ typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
 // Their Python bindings are implemented in extmod, and their implementation
 // is provided by a port.
 extern const mp_obj_type_t machine_i2c_type;
+extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_pwm_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index e1dd546ea3..2c82c1f10f 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -70,7 +70,6 @@ list(APPEND MICROPY_SOURCE_PORT
     machine_adcblock.c
     machine_dac.c
     machine_i2c.c
-    machine_i2s.c
     machine_uart.c
     modmachine.c
     network_common.c
diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c
index 95751c87c3..5a78e3b740 100644
--- a/ports/esp32/machine_i2s.c
+++ b/ports/esp32/machine_i2s.c
@@ -24,19 +24,11 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include <stdbool.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_i2s.c via MICROPY_PY_MACHINE_I2S_INCLUDEFILE.
 
-#include "py/obj.h"
-#include "py/runtime.h"
-#include "py/misc.h"
+#include "py/mphal.h"
 #include "py/stream.h"
-#include "py/objstr.h"
-#include "modmachine.h"
-#include "mphalport.h"
 
 #if MICROPY_PY_MACHINE_I2S
 
@@ -360,7 +352,7 @@ STATIC void task_for_non_blocking_mode(void *self_in) {
     }
 }
 
-STATIC void machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
 
     enum {
         ARG_sck,
@@ -501,10 +493,8 @@ STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
         );
 }
 
-STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
-    mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
-
-    i2s_port_t port = mp_obj_get_int(args[0]);
+STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
+    i2s_port_t port = i2s_id;
     if (port < 0 || port >= I2S_NUM_AUTO) {
         mp_raise_ValueError(MP_ERROR_TEXT("invalid id"));
     }
@@ -520,23 +510,10 @@ STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_arg
         machine_i2s_deinit(self);
     }
 
-    mp_map_t kw_args;
-    mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
-    machine_i2s_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
-
-    return MP_OBJ_FROM_PTR(self);
+    return self;
 }
 
-STATIC mp_obj_t machine_i2s_obj_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    machine_i2s_obj_t *self = pos_args[0];
-    machine_i2s_deinit(self);
-    machine_i2s_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_init_obj, 1, machine_i2s_obj_init);
-
-STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
     i2s_driver_uninstall(self->port);
 
     if (self->non_blocking_mode_task != NULL) {
@@ -550,9 +527,7 @@ STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
     }
 
     self->i2s_event_queue = NULL;
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_i2s_deinit_obj, machine_i2s_deinit);
 
 STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
@@ -660,26 +635,6 @@ STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_ma
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
 STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
 
-STATIC const mp_rom_map_elem_t machine_i2s_locals_dict_table[] = {
-    // Methods
-    { MP_ROM_QSTR(MP_QSTR_init),            MP_ROM_PTR(&machine_i2s_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto),        MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write),           MP_ROM_PTR(&mp_stream_write_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit),          MP_ROM_PTR(&machine_i2s_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_irq),             MP_ROM_PTR(&machine_i2s_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR___del__),         MP_ROM_PTR(&machine_i2s_deinit_obj) },
-
-    // Static method
-    { MP_ROM_QSTR(MP_QSTR_shift),           MP_ROM_PTR(&machine_i2s_shift_obj) },
-
-    // Constants
-    { MP_ROM_QSTR(MP_QSTR_RX),              MP_ROM_INT(I2S_MODE_MASTER | I2S_MODE_RX) },
-    { MP_ROM_QSTR(MP_QSTR_TX),              MP_ROM_INT(I2S_MODE_MASTER | I2S_MODE_TX) },
-    { MP_ROM_QSTR(MP_QSTR_STEREO),          MP_ROM_INT(STEREO) },
-    { MP_ROM_QSTR(MP_QSTR_MONO),            MP_ROM_INT(MONO) },
-};
-MP_DEFINE_CONST_DICT(machine_i2s_locals_dict, machine_i2s_locals_dict_table);
-
 STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
@@ -802,23 +757,6 @@ STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_
     return ret;
 }
 
-STATIC const mp_stream_p_t i2s_stream_p = {
-    .read = machine_i2s_stream_read,
-    .write = machine_i2s_stream_write,
-    .ioctl = machine_i2s_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_i2s_type,
-    MP_QSTR_I2S,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_i2s_make_new,
-    print, machine_i2s_print,
-    protocol, &i2s_stream_p,
-    locals_dict, &machine_i2s_locals_dict
-    );
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[I2S_NUM_AUTO]);
 
 #endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h
index 24f27101a8..abf029c473 100644
--- a/ports/esp32/modmachine.h
+++ b/ports/esp32/modmachine.h
@@ -17,7 +17,6 @@ extern const mp_obj_type_t machine_adcblock_type;
 extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_spi_type;
-extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_uart_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 5d39323c58..8b59dc1225 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -115,6 +115,10 @@
 #ifndef MICROPY_PY_MACHINE_I2S
 #define MICROPY_PY_MACHINE_I2S              (1)
 #endif
+#define MICROPY_PY_MACHINE_I2S_INCLUDEFILE  "ports/esp32/machine_i2s.c"
+#define MICROPY_PY_MACHINE_I2S_FINALISER    (1)
+#define MICROPY_PY_MACHINE_I2S_CONSTANT_RX  (I2S_MODE_MASTER | I2S_MODE_RX)
+#define MICROPY_PY_MACHINE_I2S_CONSTANT_TX  (I2S_MODE_MASTER | I2S_MODE_TX)
 #define MICROPY_PY_MACHINE_WDT              (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE  "ports/esp32/machine_wdt.c"
 #define MICROPY_PY_NETWORK (1)
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index d29b38e040..2f4b13ad92 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -198,7 +198,6 @@ SRC_C += \
 	machine_adc.c \
 	machine_bitstream.c \
 	machine_i2c.c \
-	machine_i2s.c \
 	machine_led.c \
 	machine_pin.c \
 	machine_rtc.c \
diff --git a/ports/mimxrt/machine_i2s.c b/ports/mimxrt/machine_i2s.c
index 7711219441..979872dd16 100644
--- a/ports/mimxrt/machine_i2s.c
+++ b/ports/mimxrt/machine_i2s.c
@@ -25,19 +25,11 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include <stdbool.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_i2s.c via MICROPY_PY_MACHINE_I2S_INCLUDEFILE.
 
-#include "py/obj.h"
-#include "py/runtime.h"
 #include "py/mphal.h"
-#include "py/misc.h"
 #include "py/stream.h"
-#include "py/objstr.h"
-#include "modmachine.h"
 #include "dma_manager.h"
 
 #include CLOCK_CONFIG_H
@@ -845,7 +837,7 @@ STATIC bool i2s_init(machine_i2s_obj_t *self) {
     return true;
 }
 
-STATIC void machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
 
     enum {
         ARG_sck,
@@ -994,10 +986,7 @@ STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
         );
 }
 
-STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
-    mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
-    uint8_t i2s_id = mp_obj_get_int(args[0]);
-
+STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
     if (i2s_id < 1 || i2s_id > MICROPY_HW_I2S_NUM) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("I2S(%d) does not exist"), i2s_id);
     }
@@ -1021,23 +1010,10 @@ STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_arg
     // fill the DMA buffer with NULLs
     memset(self->dma_buffer_dcache_aligned, 0, SIZEOF_DMA_BUFFER_IN_BYTES);
 
-    mp_map_t kw_args;
-    mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
-    machine_i2s_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
-    return MP_OBJ_FROM_PTR(self);
+    return self;
 }
 
-STATIC mp_obj_t machine_i2s_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
-    machine_i2s_deinit(MP_OBJ_FROM_PTR(self));
-    machine_i2s_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_init_obj, 1, machine_i2s_init);
-
-STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
+STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
     // use self->i2s_inst as in indication that I2S object has already been de-initialized
     if (self->i2s_inst != NULL) {
         EDMA_AbortTransfer(&self->edmaHandle);
@@ -1059,9 +1035,7 @@ STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
         m_free(self->ring_buffer_storage);
         self->i2s_inst = NULL;  // flag object as de-initialized
     }
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_i2s_deinit_obj, machine_i2s_deinit);
 
 STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
@@ -1142,25 +1116,6 @@ STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_ma
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
 STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
 
-STATIC const mp_rom_map_elem_t machine_i2s_locals_dict_table[] = {
-    // Methods
-    { MP_ROM_QSTR(MP_QSTR_init),            MP_ROM_PTR(&machine_i2s_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto),        MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write),           MP_ROM_PTR(&mp_stream_write_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit),          MP_ROM_PTR(&machine_i2s_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_irq),             MP_ROM_PTR(&machine_i2s_irq_obj) },
-
-    // Static method
-    { MP_ROM_QSTR(MP_QSTR_shift),           MP_ROM_PTR(&machine_i2s_shift_obj) },
-
-    // Constants
-    { MP_ROM_QSTR(MP_QSTR_RX),              MP_ROM_INT(RX) },
-    { MP_ROM_QSTR(MP_QSTR_TX),              MP_ROM_INT(TX) },
-    { MP_ROM_QSTR(MP_QSTR_STEREO),          MP_ROM_INT(STEREO) },
-    { MP_ROM_QSTR(MP_QSTR_MONO),            MP_ROM_INT(MONO) },
-};
-MP_DEFINE_CONST_DICT(machine_i2s_locals_dict, machine_i2s_locals_dict_table);
-
 STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
@@ -1259,23 +1214,6 @@ STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_
     return ret;
 }
 
-STATIC const mp_stream_p_t i2s_stream_p = {
-    .read = machine_i2s_stream_read,
-    .write = machine_i2s_stream_write,
-    .ioctl = machine_i2s_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_i2s_type,
-    MP_QSTR_I2S,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_i2s_make_new,
-    print, machine_i2s_print,
-    protocol, &i2s_stream_p,
-    locals_dict, &machine_i2s_locals_dict
-    );
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM]);
 
 #endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h
index 92d875b4d0..fed75fdd54 100644
--- a/ports/mimxrt/modmachine.h
+++ b/ports/mimxrt/modmachine.h
@@ -31,7 +31,6 @@
 
 extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
 extern const mp_obj_type_t machine_spi_type;
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index 1eb3b17112..24c2436dbf 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -87,6 +87,9 @@ uint32_t trng_random_u32(void);
 #ifndef MICROPY_PY_MACHINE_I2S
 #define MICROPY_PY_MACHINE_I2S              (0)
 #endif
+#define MICROPY_PY_MACHINE_I2S_INCLUDEFILE  "ports/mimxrt/machine_i2s.c"
+#define MICROPY_PY_MACHINE_I2S_CONSTANT_RX  (RX)
+#define MICROPY_PY_MACHINE_I2S_CONSTANT_TX  (TX)
 #ifndef MICROPY_PY_MACHINE_SDCARD
 #define MICROPY_PY_MACHINE_SDCARD           (1)
 #endif
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index b8cf4d7bec..d5302e3369 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -120,7 +120,6 @@ set(MICROPY_SOURCE_PORT
     machine_adc.c
     machine_bitstream.c
     machine_i2c.c
-    machine_i2s.c
     machine_pin.c
     machine_rtc.c
     machine_spi.c
@@ -149,7 +148,6 @@ set(MICROPY_SOURCE_QSTR
     ${MICROPY_DIR}/shared/runtime/sys_stdio_mphal.c
     ${MICROPY_PORT_DIR}/machine_adc.c
     ${MICROPY_PORT_DIR}/machine_i2c.c
-    ${MICROPY_PORT_DIR}/machine_i2s.c
     ${MICROPY_PORT_DIR}/machine_pin.c
     ${MICROPY_PORT_DIR}/machine_rtc.c
     ${MICROPY_PORT_DIR}/machine_spi.c
diff --git a/ports/rp2/machine_i2s.c b/ports/rp2/machine_i2s.c
index 5ad1a748b9..6ed982ba45 100644
--- a/ports/rp2/machine_i2s.c
+++ b/ports/rp2/machine_i2s.c
@@ -24,19 +24,13 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include <stdbool.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_i2s.c via MICROPY_PY_MACHINE_I2S_INCLUDEFILE.
 
-#include "py/obj.h"
-#include "py/runtime.h"
+#include <stdlib.h>
+#include <string.h>
 #include "py/mphal.h"
-#include "py/misc.h"
 #include "py/stream.h"
-#include "py/objstr.h"
-#include "modmachine.h"
 
 #include "hardware/pio.h"
 #include "hardware/clocks.h"
@@ -771,7 +765,7 @@ STATIC void dma_irq1_handler(void) {
     dma_irq_handler(1);
 }
 
-STATIC void machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
 
     enum {
         ARG_sck,
@@ -887,10 +881,7 @@ STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
         );
 }
 
-STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
-    mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
-    uint8_t i2s_id = mp_obj_get_int(args[0]);
-
+STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
     if (i2s_id >= MAX_I2S_RP2) {
         mp_raise_ValueError(MP_ERROR_TEXT("invalid id"));
     }
@@ -905,23 +896,10 @@ STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_arg
         machine_i2s_deinit(MP_OBJ_FROM_PTR(self));
     }
 
-    mp_map_t kw_args;
-    mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
-    machine_i2s_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
-    return MP_OBJ_FROM_PTR(self);
+    return self;
 }
 
-STATIC mp_obj_t machine_i2s_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
-    machine_i2s_deinit(MP_OBJ_FROM_PTR(self));
-    machine_i2s_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_init_obj, 1, machine_i2s_init);
-
-STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
+STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
     // use self->pio as in indication that I2S object has already been de-initialized
     if (self->pio != NULL) {
         pio_deinit(self);
@@ -930,9 +908,7 @@ STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
         m_free(self->ring_buffer_storage);
         self->pio = NULL;  // flag object as de-initialized
     }
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_i2s_deinit_obj, machine_i2s_deinit);
 
 STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
@@ -1013,25 +989,6 @@ STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_ma
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
 STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
 
-STATIC const mp_rom_map_elem_t machine_i2s_locals_dict_table[] = {
-    // Methods
-    { MP_ROM_QSTR(MP_QSTR_init),            MP_ROM_PTR(&machine_i2s_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto),        MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write),           MP_ROM_PTR(&mp_stream_write_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit),          MP_ROM_PTR(&machine_i2s_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_irq),             MP_ROM_PTR(&machine_i2s_irq_obj) },
-
-    // Static method
-    { MP_ROM_QSTR(MP_QSTR_shift),           MP_ROM_PTR(&machine_i2s_shift_obj) },
-
-    // Constants
-    { MP_ROM_QSTR(MP_QSTR_RX),              MP_ROM_INT(RX) },
-    { MP_ROM_QSTR(MP_QSTR_TX),              MP_ROM_INT(TX) },
-    { MP_ROM_QSTR(MP_QSTR_STEREO),          MP_ROM_INT(STEREO) },
-    { MP_ROM_QSTR(MP_QSTR_MONO),            MP_ROM_INT(MONO) },
-};
-MP_DEFINE_CONST_DICT(machine_i2s_locals_dict, machine_i2s_locals_dict_table);
-
 STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
@@ -1130,21 +1087,4 @@ STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_
     return ret;
 }
 
-STATIC const mp_stream_p_t i2s_stream_p = {
-    .read = machine_i2s_stream_read,
-    .write = machine_i2s_stream_write,
-    .ioctl = machine_i2s_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_i2s_type,
-    MP_QSTR_I2S,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_i2s_make_new,
-    print, machine_i2s_print,
-    protocol, &i2s_stream_p,
-    locals_dict, &machine_i2s_locals_dict
-    );
-
 MP_REGISTER_ROOT_POINTER(void *machine_i2s_obj[2]);
diff --git a/ports/rp2/modmachine.h b/ports/rp2/modmachine.h
index 559fb34814..39a6e9c81e 100644
--- a/ports/rp2/modmachine.h
+++ b/ports/rp2/modmachine.h
@@ -5,7 +5,6 @@
 
 extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_spi_type;
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index bf43b5ce7f..5e6cf0b2d5 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -118,6 +118,10 @@
 #define MICROPY_PY_MACHINE_PWM_INCLUDEFILE      "ports/rp2/machine_pwm.c"
 #define MICROPY_PY_MACHINE_I2C                  (1)
 #define MICROPY_PY_MACHINE_SOFTI2C              (1)
+#define MICROPY_PY_MACHINE_I2S                  (1)
+#define MICROPY_PY_MACHINE_I2S_INCLUDEFILE      "ports/rp2/machine_i2s.c"
+#define MICROPY_PY_MACHINE_I2S_CONSTANT_RX      (RX)
+#define MICROPY_PY_MACHINE_I2S_CONSTANT_TX      (TX)
 #define MICROPY_PY_MACHINE_SPI                  (1)
 #define MICROPY_PY_MACHINE_SPI_MSB              (SPI_MSB_FIRST)
 #define MICROPY_PY_MACHINE_SPI_LSB              (SPI_LSB_FIRST)
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index 589ef4cdbb..9c73c5c956 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -335,7 +335,6 @@ SRC_C += \
 	machine_adc.c \
 	machine_bitstream.c \
 	machine_i2c.c \
-	machine_i2s.c \
 	machine_spi.c \
 	machine_uart.c \
 	modmachine.c \
diff --git a/ports/stm32/dma.c b/ports/stm32/dma.c
index 36f4a67859..0a5d25c16c 100644
--- a/ports/stm32/dma.c
+++ b/ports/stm32/dma.c
@@ -131,7 +131,7 @@ static const DMA_InitTypeDef dma_init_struct_spi_i2c = {
 };
 #endif
 
-#if MICROPY_HW_ENABLE_I2S
+#if MICROPY_PY_MACHINE_I2S
 // Default parameters to dma_init() for i2s; Channel and Direction
 // vary depending on the peripheral instance so they get passed separately
 static const DMA_InitTypeDef dma_init_struct_i2s = {
@@ -314,7 +314,7 @@ const dma_descr_t dma_I2C_3_RX = { DMA1_Stream2, DMA_CHANNEL_3, dma_id_2,   &dma
 const dma_descr_t dma_I2C_2_RX = { DMA1_Stream2, DMA_CHANNEL_7, dma_id_2,   &dma_init_struct_spi_i2c };
 const dma_descr_t dma_SPI_2_RX = { DMA1_Stream3, DMA_CHANNEL_0, dma_id_3,   &dma_init_struct_spi_i2c };
 const dma_descr_t dma_SPI_2_TX = { DMA1_Stream4, DMA_CHANNEL_0, dma_id_4,   &dma_init_struct_spi_i2c };
-#if MICROPY_HW_ENABLE_I2S
+#if MICROPY_PY_MACHINE_I2S
 const dma_descr_t dma_I2S_2_RX = { DMA1_Stream3, DMA_CHANNEL_0, dma_id_3,   &dma_init_struct_i2s };
 const dma_descr_t dma_I2S_2_TX = { DMA1_Stream4, DMA_CHANNEL_0, dma_id_4,   &dma_init_struct_i2s };
 #endif
@@ -342,7 +342,7 @@ const dma_descr_t dma_SDMMC_2 = { DMA2_Stream0, DMA_CHANNEL_11, dma_id_8,  &dma_
 const dma_descr_t dma_DCMI_0 = { DMA2_Stream1, DMA_CHANNEL_1, dma_id_9,  &dma_init_struct_dcmi };
 #endif
 const dma_descr_t dma_SPI_1_RX = { DMA2_Stream2, DMA_CHANNEL_3, dma_id_10,  &dma_init_struct_spi_i2c };
-#if MICROPY_HW_ENABLE_I2S
+#if MICROPY_PY_MACHINE_I2S
 const dma_descr_t dma_I2S_1_RX = { DMA2_Stream2, DMA_CHANNEL_3, dma_id_10,  &dma_init_struct_i2s };
 #endif
 #if ENABLE_SDIO
@@ -356,7 +356,7 @@ const dma_descr_t dma_SPI_5_TX = { DMA2_Stream4, DMA_CHANNEL_2, dma_id_12,  &dma
 const dma_descr_t dma_SPI_4_TX = { DMA2_Stream4, DMA_CHANNEL_5, dma_id_12,  &dma_init_struct_spi_i2c };
 const dma_descr_t dma_SPI_6_TX = { DMA2_Stream5, DMA_CHANNEL_1, dma_id_13,  &dma_init_struct_spi_i2c };
 const dma_descr_t dma_SPI_1_TX = { DMA2_Stream5, DMA_CHANNEL_3, dma_id_13,  &dma_init_struct_spi_i2c };
-#if MICROPY_HW_ENABLE_I2S
+#if MICROPY_PY_MACHINE_I2S
 const dma_descr_t dma_I2S_1_TX = { DMA2_Stream5, DMA_CHANNEL_3, dma_id_13,  &dma_init_struct_i2s };
 #endif
 // #if defined(STM32F7) && defined(SDMMC2) && ENABLE_SDIO
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index bb595a2579..58b85c7a79 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -25,23 +25,17 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include <stdbool.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_i2s.c via MICROPY_PY_MACHINE_I2S_INCLUDEFILE.
 
-#include "py/obj.h"
-#include "py/runtime.h"
+#include <stdlib.h>
 #include "py/mphal.h"
-#include "py/misc.h"
 #include "py/stream.h"
-#include "py/objstr.h"
-#include "modmachine.h"
 #include "pin.h"
 #include "dma.h"
 
-#if MICROPY_HW_ENABLE_I2S
+#if MICROPY_PY_MACHINE_I2S
+
 // The I2S module has 3 modes of operation:
 //
 // Mode1:  Blocking
@@ -591,7 +585,7 @@ STATIC bool i2s_init(machine_i2s_obj_t *self) {
 
 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) {
     uint32_t errorCode = HAL_I2S_GetError(hi2s);
-    printf("I2S Error = %ld\n", errorCode);
+    mp_printf(MICROPY_ERROR_PRINTER, "I2S Error = %ld\n", errorCode);
 }
 
 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s) {
@@ -671,7 +665,7 @@ void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s) {
     feed_dma(self, TOP_HALF);
 }
 
-STATIC void machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
 
     enum {
         ARG_sck,
@@ -839,9 +833,7 @@ STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
         );
 }
 
-STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
-    mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
-    uint8_t i2s_id = mp_obj_get_int(args[0]);
+STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
     uint8_t i2s_id_zero_base = 0;
 
     if (0) {
@@ -870,24 +862,10 @@ STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_arg
     // align DMA buffer start to the cache line size (32 bytes)
     self->dma_buffer_dcache_aligned = (uint8_t *)((uint32_t)(self->dma_buffer + 0x1f) & ~0x1f);
 
-    mp_map_t kw_args;
-    mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
-    machine_i2s_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
-
-    return MP_OBJ_FROM_PTR(self);
+    return self;
 }
 
-STATIC mp_obj_t machine_i2s_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
-    machine_i2s_deinit(MP_OBJ_FROM_PTR(self));
-    machine_i2s_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_init_obj, 1, machine_i2s_init);
-
-STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
+STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
     if (self->ring_buffer_storage != NULL) {
         dma_deinit(self->dma_descr_tx);
         dma_deinit(self->dma_descr_rx);
@@ -906,10 +884,7 @@ STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
         m_free(self->ring_buffer_storage);
         self->ring_buffer_storage = NULL;
     }
-
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_i2s_deinit_obj, machine_i2s_deinit);
 
 STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
@@ -990,25 +965,6 @@ STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_ma
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
 STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
 
-STATIC const mp_rom_map_elem_t machine_i2s_locals_dict_table[] = {
-    // Methods
-    { MP_ROM_QSTR(MP_QSTR_init),            MP_ROM_PTR(&machine_i2s_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto),        MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write),           MP_ROM_PTR(&mp_stream_write_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit),          MP_ROM_PTR(&machine_i2s_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_irq),             MP_ROM_PTR(&machine_i2s_irq_obj) },
-
-    // Static method
-    { MP_ROM_QSTR(MP_QSTR_shift),           MP_ROM_PTR(&machine_i2s_shift_obj) },
-
-    // Constants
-    { MP_ROM_QSTR(MP_QSTR_RX),              MP_ROM_INT(I2S_MODE_MASTER_RX) },
-    { MP_ROM_QSTR(MP_QSTR_TX),              MP_ROM_INT(I2S_MODE_MASTER_TX) },
-    { MP_ROM_QSTR(MP_QSTR_STEREO),          MP_ROM_INT(STEREO) },
-    { MP_ROM_QSTR(MP_QSTR_MONO),            MP_ROM_INT(MONO) },
-};
-MP_DEFINE_CONST_DICT(machine_i2s_locals_dict, machine_i2s_locals_dict_table);
-
 STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
@@ -1107,23 +1063,6 @@ STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_
     return ret;
 }
 
-STATIC const mp_stream_p_t i2s_stream_p = {
-    .read = machine_i2s_stream_read,
-    .write = machine_i2s_stream_write,
-    .ioctl = machine_i2s_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_i2s_type,
-    MP_QSTR_I2S,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_i2s_make_new,
-    print, machine_i2s_print,
-    protocol, &i2s_stream_p,
-    locals_dict, &machine_i2s_locals_dict
-    );
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_MAX_I2S]);
 
-#endif // MICROPY_HW_ENABLE_I2S
+#endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/stm32/main.c b/ports/stm32/main.c
index 95b74c621a..9e5dafc9f6 100644
--- a/ports/stm32/main.c
+++ b/ports/stm32/main.c
@@ -528,7 +528,7 @@ soft_reset:
     pyb_usb_init0();
     #endif
 
-    #if MICROPY_HW_ENABLE_I2S
+    #if MICROPY_PY_MACHINE_I2S
     machine_i2s_init0();
     #endif
 
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 926dc30413..a0e2da89f8 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -443,7 +443,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
     #endif
-    #if MICROPY_HW_ENABLE_I2S
+    #if MICROPY_PY_MACHINE_I2S
     { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
     #endif
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&pyb_uart_type) },
diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h
index 28d9c699d6..9838eafdb0 100644
--- a/ports/stm32/modmachine.h
+++ b/ports/stm32/modmachine.h
@@ -30,7 +30,6 @@
 
 extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
 
diff --git a/ports/stm32/mpconfigboard_common.h b/ports/stm32/mpconfigboard_common.h
index b6cc7f84db..6d9ef8de3b 100644
--- a/ports/stm32/mpconfigboard_common.h
+++ b/ports/stm32/mpconfigboard_common.h
@@ -591,10 +591,10 @@
 
 // Enable I2S if there are any peripherals defined
 #if defined(MICROPY_HW_I2S1) || defined(MICROPY_HW_I2S2)
-#define MICROPY_HW_ENABLE_I2S (1)
+#define MICROPY_PY_MACHINE_I2S (1)
 #define MICROPY_HW_MAX_I2S (2)
 #else
-#define MICROPY_HW_ENABLE_I2S (0)
+#define MICROPY_PY_MACHINE_I2S (0)
 #define MICROPY_HW_MAX_I2S (0)
 #endif
 
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index 0e9df54ff4..1dae9f7f08 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -117,6 +117,9 @@
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_SOFTI2C  (1)
+#define MICROPY_PY_MACHINE_I2S_INCLUDEFILE "ports/stm32/machine_i2s.c"
+#define MICROPY_PY_MACHINE_I2S_CONSTANT_RX (I2S_MODE_MASTER_RX)
+#define MICROPY_PY_MACHINE_I2S_CONSTANT_TX (I2S_MODE_MASTER_TX)
 #define MICROPY_PY_MACHINE_SPI      (1)
 #define MICROPY_PY_MACHINE_SPI_MSB  (SPI_FIRSTBIT_MSB)
 #define MICROPY_PY_MACHINE_SPI_LSB  (SPI_FIRSTBIT_LSB)

From a2d7e0da0b7b4e822cb12390424e912ae0f13a18 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 9 Oct 2023 12:48:45 +1100
Subject: [PATCH 047/310] extmod/machine_i2s: Factor stream and ring-buf code.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_i2s.c        | 396 ++++++++++++++++++++++++++++++++++++
 ports/esp32/machine_i2s.c   | 123 -----------
 ports/mimxrt/machine_i2s.c  | 322 -----------------------------
 ports/mimxrt/mpconfigport.h |   1 +
 ports/rp2/machine_i2s.c     | 322 -----------------------------
 ports/rp2/mpconfigport.h    |   1 +
 ports/stm32/machine_i2s.c   | 322 -----------------------------
 ports/stm32/mpconfigport.h  |   1 +
 8 files changed, 399 insertions(+), 1089 deletions(-)

diff --git a/extmod/machine_i2s.c b/extmod/machine_i2s.c
index 53de7293f2..79ddfb20df 100644
--- a/extmod/machine_i2s.c
+++ b/extmod/machine_i2s.c
@@ -26,11 +26,37 @@
  */
 
 #include "py/runtime.h"
+#include "py/stream.h"
 
 #if MICROPY_PY_MACHINE_I2S
 
 #include "extmod/modmachine.h"
 
+#if MICROPY_PY_MACHINE_I2S_RING_BUF
+
+typedef struct _ring_buf_t {
+    uint8_t *buffer;
+    size_t head;
+    size_t tail;
+    size_t size;
+} ring_buf_t;
+
+typedef struct _non_blocking_descriptor_t {
+    mp_buffer_info_t appbuf;
+    uint32_t index;
+    bool copy_in_progress;
+} non_blocking_descriptor_t;
+
+STATIC void ringbuf_init(ring_buf_t *rbuf, uint8_t *buffer, size_t size);
+STATIC bool ringbuf_push(ring_buf_t *rbuf, uint8_t data);
+STATIC bool ringbuf_pop(ring_buf_t *rbuf, uint8_t *data);
+STATIC size_t ringbuf_available_data(ring_buf_t *rbuf);
+STATIC size_t ringbuf_available_space(ring_buf_t *rbuf);
+STATIC void fill_appbuf_from_ringbuf_non_blocking(machine_i2s_obj_t *self);
+STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self);
+
+#endif // MICROPY_PY_MACHINE_I2S_RING_BUF
+
 // The port must provide implementations of these low-level I2S functions.
 STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
 STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id);
@@ -39,6 +65,220 @@ STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self);
 // The port provides implementations of the above in this file.
 #include MICROPY_PY_MACHINE_I2S_INCLUDEFILE
 
+#if MICROPY_PY_MACHINE_I2S_RING_BUF
+
+// Ring Buffer
+// Thread safe when used with these constraints:
+// - Single Producer, Single Consumer
+// - Sequential atomic operations
+// One byte of capacity is used to detect buffer empty/full
+
+STATIC void ringbuf_init(ring_buf_t *rbuf, uint8_t *buffer, size_t size) {
+    rbuf->buffer = buffer;
+    rbuf->size = size;
+    rbuf->head = 0;
+    rbuf->tail = 0;
+}
+
+STATIC bool ringbuf_push(ring_buf_t *rbuf, uint8_t data) {
+    size_t next_tail = (rbuf->tail + 1) % rbuf->size;
+
+    if (next_tail != rbuf->head) {
+        rbuf->buffer[rbuf->tail] = data;
+        rbuf->tail = next_tail;
+        return true;
+    }
+
+    // full
+    return false;
+}
+
+STATIC bool ringbuf_pop(ring_buf_t *rbuf, uint8_t *data) {
+    if (rbuf->head == rbuf->tail) {
+        // empty
+        return false;
+    }
+
+    *data = rbuf->buffer[rbuf->head];
+    rbuf->head = (rbuf->head + 1) % rbuf->size;
+    return true;
+}
+
+STATIC bool ringbuf_is_empty(ring_buf_t *rbuf) {
+    return rbuf->head == rbuf->tail;
+}
+
+STATIC bool ringbuf_is_full(ring_buf_t *rbuf) {
+    return ((rbuf->tail + 1) % rbuf->size) == rbuf->head;
+}
+
+STATIC size_t ringbuf_available_data(ring_buf_t *rbuf) {
+    return (rbuf->tail - rbuf->head + rbuf->size) % rbuf->size;
+}
+
+STATIC size_t ringbuf_available_space(ring_buf_t *rbuf) {
+    return rbuf->size - ringbuf_available_data(rbuf) - 1;
+}
+
+STATIC uint32_t fill_appbuf_from_ringbuf(machine_i2s_obj_t *self, mp_buffer_info_t *appbuf) {
+
+    // copy audio samples from the ring buffer to the app buffer
+    // loop, copying samples until the app buffer is filled
+    // For asyncio mode, the loop will make an early exit if the ring buffer becomes empty
+    // Example:
+    //   a MicroPython I2S object is configured for 16-bit mono (2 bytes per audio sample).
+    //   For every frame coming from the ring buffer (8 bytes), 2 bytes are "cherry picked" and
+    //   copied to the supplied app buffer.
+    //   Thus, for every 1 byte copied to the app buffer, 4 bytes are read from the ring buffer.
+    //   If a 8kB app buffer is supplied, 32kB of audio samples is read from the ring buffer.
+
+    uint32_t num_bytes_copied_to_appbuf = 0;
+    uint8_t *app_p = (uint8_t *)appbuf->buf;
+    uint8_t appbuf_sample_size_in_bytes = (self->bits == 16? 2 : 4) * (self->format == STEREO ? 2: 1);
+    uint32_t num_bytes_needed_from_ringbuf = appbuf->len * (I2S_RX_FRAME_SIZE_IN_BYTES / appbuf_sample_size_in_bytes);
+    uint8_t discard_byte;
+    while (num_bytes_needed_from_ringbuf) {
+
+        uint8_t f_index = get_frame_mapping_index(self->bits, self->format);
+
+        for (uint8_t i = 0; i < I2S_RX_FRAME_SIZE_IN_BYTES; i++) {
+            int8_t r_to_a_mapping = i2s_frame_map[f_index][i];
+            if (r_to_a_mapping != -1) {
+                if (self->io_mode == BLOCKING) {
+                    // poll the ringbuf until a sample becomes available,  copy into appbuf using the mapping transform
+                    while (ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping) == false) {
+                        ;
+                    }
+                    num_bytes_copied_to_appbuf++;
+                } else if (self->io_mode == ASYNCIO) {
+                    if (ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping) == false) {
+                        // ring buffer is empty, exit
+                        goto exit;
+                    } else {
+                        num_bytes_copied_to_appbuf++;
+                    }
+                } else {
+                    return 0;  // should never get here (non-blocking mode does not use this function)
+                }
+            } else { // r_a_mapping == -1
+                // discard unused byte from ring buffer
+                if (self->io_mode == BLOCKING) {
+                    // poll the ringbuf until a sample becomes available
+                    while (ringbuf_pop(&self->ring_buffer, &discard_byte) == false) {
+                        ;
+                    }
+                } else if (self->io_mode == ASYNCIO) {
+                    if (ringbuf_pop(&self->ring_buffer, &discard_byte) == false) {
+                        // ring buffer is empty, exit
+                        goto exit;
+                    }
+                } else {
+                    return 0;  // should never get here (non-blocking mode does not use this function)
+                }
+            }
+            num_bytes_needed_from_ringbuf--;
+        }
+        app_p += appbuf_sample_size_in_bytes;
+    }
+exit:
+    return num_bytes_copied_to_appbuf;
+}
+
+// function is used in IRQ context
+STATIC void fill_appbuf_from_ringbuf_non_blocking(machine_i2s_obj_t *self) {
+
+    // attempt to copy a block of audio samples from the ring buffer to the supplied app buffer.
+    // audio samples will be formatted as part of the copy operation
+
+    uint32_t num_bytes_copied_to_appbuf = 0;
+    uint8_t *app_p = &(((uint8_t *)self->non_blocking_descriptor.appbuf.buf)[self->non_blocking_descriptor.index]);
+
+    uint8_t appbuf_sample_size_in_bytes = (self->bits == 16? 2 : 4) * (self->format == STEREO ? 2: 1);
+    uint32_t num_bytes_remaining_to_copy_to_appbuf = self->non_blocking_descriptor.appbuf.len - self->non_blocking_descriptor.index;
+    uint32_t num_bytes_remaining_to_copy_from_ring_buffer = num_bytes_remaining_to_copy_to_appbuf *
+        (I2S_RX_FRAME_SIZE_IN_BYTES / appbuf_sample_size_in_bytes);
+    uint32_t num_bytes_needed_from_ringbuf = MIN(SIZEOF_NON_BLOCKING_COPY_IN_BYTES, num_bytes_remaining_to_copy_from_ring_buffer);
+    uint8_t discard_byte;
+    if (ringbuf_available_data(&self->ring_buffer) >= num_bytes_needed_from_ringbuf) {
+        while (num_bytes_needed_from_ringbuf) {
+
+            uint8_t f_index = get_frame_mapping_index(self->bits, self->format);
+
+            for (uint8_t i = 0; i < I2S_RX_FRAME_SIZE_IN_BYTES; i++) {
+                int8_t r_to_a_mapping = i2s_frame_map[f_index][i];
+                if (r_to_a_mapping != -1) {
+                    ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping);
+                    num_bytes_copied_to_appbuf++;
+                } else { // r_a_mapping == -1
+                    // discard unused byte from ring buffer
+                    ringbuf_pop(&self->ring_buffer, &discard_byte);
+                }
+                num_bytes_needed_from_ringbuf--;
+            }
+            app_p += appbuf_sample_size_in_bytes;
+        }
+        self->non_blocking_descriptor.index += num_bytes_copied_to_appbuf;
+
+        if (self->non_blocking_descriptor.index >= self->non_blocking_descriptor.appbuf.len) {
+            self->non_blocking_descriptor.copy_in_progress = false;
+            mp_sched_schedule(self->callback_for_non_blocking, MP_OBJ_FROM_PTR(self));
+        }
+    }
+}
+
+STATIC uint32_t copy_appbuf_to_ringbuf(machine_i2s_obj_t *self, mp_buffer_info_t *appbuf) {
+
+    // copy audio samples from the app buffer to the ring buffer
+    // loop, reading samples until the app buffer is emptied
+    // for asyncio mode, the loop will make an early exit if the ring buffer becomes full
+
+    uint32_t a_index = 0;
+
+    while (a_index < appbuf->len) {
+        if (self->io_mode == BLOCKING) {
+            // copy a byte to the ringbuf when space becomes available
+            while (ringbuf_push(&self->ring_buffer, ((uint8_t *)appbuf->buf)[a_index]) == false) {
+                ;
+            }
+            a_index++;
+        } else if (self->io_mode == ASYNCIO) {
+            if (ringbuf_push(&self->ring_buffer, ((uint8_t *)appbuf->buf)[a_index]) == false) {
+                // ring buffer is full, exit
+                break;
+            } else {
+                a_index++;
+            }
+        } else {
+            return 0;  // should never get here (non-blocking mode does not use this function)
+        }
+    }
+
+    return a_index;
+}
+
+// function is used in IRQ context
+STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self) {
+
+    // copy audio samples from app buffer into ring buffer
+    uint32_t num_bytes_remaining_to_copy = self->non_blocking_descriptor.appbuf.len - self->non_blocking_descriptor.index;
+    uint32_t num_bytes_to_copy = MIN(SIZEOF_NON_BLOCKING_COPY_IN_BYTES, num_bytes_remaining_to_copy);
+
+    if (ringbuf_available_space(&self->ring_buffer) >= num_bytes_to_copy) {
+        for (uint32_t i = 0; i < num_bytes_to_copy; i++) {
+            ringbuf_push(&self->ring_buffer,
+                ((uint8_t *)self->non_blocking_descriptor.appbuf.buf)[self->non_blocking_descriptor.index + i]);
+        }
+
+        self->non_blocking_descriptor.index += num_bytes_to_copy;
+        if (self->non_blocking_descriptor.index >= self->non_blocking_descriptor.appbuf.len) {
+            self->non_blocking_descriptor.copy_in_progress = false;
+            mp_sched_schedule(self->callback_for_non_blocking, MP_OBJ_FROM_PTR(self));
+        }
+    }
+}
+
+#endif // MICROPY_PY_MACHINE_I2S_RING_BUF
+
 STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
     mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
     mp_int_t i2s_id = mp_obj_get_int(args[0]);
@@ -91,6 +331,162 @@ STATIC const mp_rom_map_elem_t machine_i2s_locals_dict_table[] = {
 };
 MP_DEFINE_CONST_DICT(machine_i2s_locals_dict, machine_i2s_locals_dict_table);
 
+STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
+
+    if (self->mode != MICROPY_PY_MACHINE_I2S_CONSTANT_RX) {
+        *errcode = MP_EPERM;
+        return MP_STREAM_ERROR;
+    }
+
+    uint8_t appbuf_sample_size_in_bytes = (self->bits / 8) * (self->format == STEREO ? 2: 1);
+    if (size % appbuf_sample_size_in_bytes != 0) {
+        *errcode = MP_EINVAL;
+        return MP_STREAM_ERROR;
+    }
+
+    if (size == 0) {
+        return 0;
+    }
+
+    if (self->io_mode == NON_BLOCKING) {
+        #if MICROPY_PY_MACHINE_I2S_RING_BUF
+        self->non_blocking_descriptor.appbuf.buf = (void *)buf_in;
+        self->non_blocking_descriptor.appbuf.len = size;
+        self->non_blocking_descriptor.index = 0;
+        self->non_blocking_descriptor.copy_in_progress = true;
+        #else
+        non_blocking_descriptor_t descriptor;
+        descriptor.appbuf.buf = (void *)buf_in;
+        descriptor.appbuf.len = size;
+        descriptor.callback = self->callback_for_non_blocking;
+        descriptor.direction = I2S_RX_TRANSFER;
+        // send the descriptor to the task that handles non-blocking mode
+        xQueueSend(self->non_blocking_mode_queue, &descriptor, 0);
+        #endif
+
+        return size;
+    } else { // blocking or asyncio mode
+        mp_buffer_info_t appbuf;
+        appbuf.buf = (void *)buf_in;
+        appbuf.len = size;
+        #if MICROPY_PY_MACHINE_I2S_RING_BUF
+        uint32_t num_bytes_read = fill_appbuf_from_ringbuf(self, &appbuf);
+        #else
+        uint32_t num_bytes_read = fill_appbuf_from_dma(self, &appbuf);
+        #endif
+        return num_bytes_read;
+    }
+}
+
+STATIC mp_uint_t machine_i2s_stream_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
+
+    if (self->mode != MICROPY_PY_MACHINE_I2S_CONSTANT_TX) {
+        *errcode = MP_EPERM;
+        return MP_STREAM_ERROR;
+    }
+
+    if (size == 0) {
+        return 0;
+    }
+
+    if (self->io_mode == NON_BLOCKING) {
+        #if MICROPY_PY_MACHINE_I2S_RING_BUF
+        self->non_blocking_descriptor.appbuf.buf = (void *)buf_in;
+        self->non_blocking_descriptor.appbuf.len = size;
+        self->non_blocking_descriptor.index = 0;
+        self->non_blocking_descriptor.copy_in_progress = true;
+        #else
+        non_blocking_descriptor_t descriptor;
+        descriptor.appbuf.buf = (void *)buf_in;
+        descriptor.appbuf.len = size;
+        descriptor.callback = self->callback_for_non_blocking;
+        descriptor.direction = I2S_TX_TRANSFER;
+        // send the descriptor to the task that handles non-blocking mode
+        xQueueSend(self->non_blocking_mode_queue, &descriptor, 0);
+        #endif
+
+        return size;
+    } else { // blocking or asyncio mode
+        mp_buffer_info_t appbuf;
+        appbuf.buf = (void *)buf_in;
+        appbuf.len = size;
+        #if MICROPY_PY_MACHINE_I2S_RING_BUF
+        uint32_t num_bytes_written = copy_appbuf_to_ringbuf(self, &appbuf);
+        #else
+        uint32_t num_bytes_written = copy_appbuf_to_dma(self, &appbuf);
+        #endif
+        return num_bytes_written;
+    }
+}
+
+STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_uint_t ret;
+    uintptr_t flags = arg;
+    self->io_mode = ASYNCIO; // a call to ioctl() is an indication that asyncio is being used
+
+    if (request == MP_STREAM_POLL) {
+        ret = 0;
+
+        if (flags & MP_STREAM_POLL_RD) {
+            if (self->mode != MICROPY_PY_MACHINE_I2S_CONSTANT_RX) {
+                *errcode = MP_EPERM;
+                return MP_STREAM_ERROR;
+            }
+
+            #if MICROPY_PY_MACHINE_I2S_RING_BUF
+            if (!ringbuf_is_empty(&self->ring_buffer)) {
+                ret |= MP_STREAM_POLL_RD;
+            }
+            #else
+            // check event queue to determine if a DMA buffer has been filled
+            // (which is an indication that at least one DMA buffer is available to be read)
+            // note:  timeout = 0 so the call is non-blocking
+            i2s_event_t i2s_event;
+            if (xQueueReceive(self->i2s_event_queue, &i2s_event, 0)) {
+                if (i2s_event.type == I2S_EVENT_RX_DONE) {
+                    // getting here means that at least one DMA buffer is now full
+                    // indicating that audio samples can be read from the I2S object
+                    ret |= MP_STREAM_POLL_RD;
+                }
+            }
+            #endif
+        }
+
+        if (flags & MP_STREAM_POLL_WR) {
+            if (self->mode != MICROPY_PY_MACHINE_I2S_CONSTANT_TX) {
+                *errcode = MP_EPERM;
+                return MP_STREAM_ERROR;
+            }
+
+            #if MICROPY_PY_MACHINE_I2S_RING_BUF
+            if (!ringbuf_is_full(&self->ring_buffer)) {
+                ret |= MP_STREAM_POLL_WR;
+            }
+            #else
+            // check event queue to determine if a DMA buffer has been emptied
+            // (which is an indication that at least one DMA buffer is available to be written)
+            // note:  timeout = 0 so the call is non-blocking
+            i2s_event_t i2s_event;
+            if (xQueueReceive(self->i2s_event_queue, &i2s_event, 0)) {
+                if (i2s_event.type == I2S_EVENT_TX_DONE) {
+                    // getting here means that at least one DMA buffer is now empty
+                    // indicating that audio samples can be written to the I2S object
+                    ret |= MP_STREAM_POLL_WR;
+                }
+            }
+            #endif
+        }
+    } else {
+        *errcode = MP_EINVAL;
+        ret = MP_STREAM_ERROR;
+    }
+
+    return ret;
+}
+
 STATIC const mp_stream_p_t i2s_stream_p = {
     .read = machine_i2s_stream_read,
     .write = machine_i2s_stream_write,
diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c
index 5a78e3b740..12294adbbd 100644
--- a/ports/esp32/machine_i2s.c
+++ b/ports/esp32/machine_i2s.c
@@ -28,7 +28,6 @@
 // extmod/machine_i2s.c via MICROPY_PY_MACHINE_I2S_INCLUDEFILE.
 
 #include "py/mphal.h"
-#include "py/stream.h"
 
 #if MICROPY_PY_MACHINE_I2S
 
@@ -635,128 +634,6 @@ STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_ma
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
 STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
 
-STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->mode != (I2S_MODE_MASTER | I2S_MODE_RX)) {
-        *errcode = MP_EPERM;
-        return MP_STREAM_ERROR;
-    }
-
-    uint8_t appbuf_sample_size_in_bytes = (self->bits / 8) * (self->format == STEREO ? 2: 1);
-    if (size % appbuf_sample_size_in_bytes != 0) {
-        *errcode = MP_EINVAL;
-        return MP_STREAM_ERROR;
-    }
-
-    if (size == 0) {
-        return 0;
-    }
-
-    if (self->io_mode == NON_BLOCKING) {
-        non_blocking_descriptor_t descriptor;
-        descriptor.appbuf.buf = (void *)buf_in;
-        descriptor.appbuf.len = size;
-        descriptor.callback = self->callback_for_non_blocking;
-        descriptor.direction = I2S_RX_TRANSFER;
-        // send the descriptor to the task that handles non-blocking mode
-        xQueueSend(self->non_blocking_mode_queue, &descriptor, 0);
-        return size;
-    } else { // blocking or asyncio mode
-        mp_buffer_info_t appbuf;
-        appbuf.buf = (void *)buf_in;
-        appbuf.len = size;
-        uint32_t num_bytes_read = fill_appbuf_from_dma(self, &appbuf);
-        return num_bytes_read;
-    }
-}
-
-STATIC mp_uint_t machine_i2s_stream_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->mode != (I2S_MODE_MASTER | I2S_MODE_TX)) {
-        *errcode = MP_EPERM;
-        return MP_STREAM_ERROR;
-    }
-
-    if (size == 0) {
-        return 0;
-    }
-
-    if (self->io_mode == NON_BLOCKING) {
-        non_blocking_descriptor_t descriptor;
-        descriptor.appbuf.buf = (void *)buf_in;
-        descriptor.appbuf.len = size;
-        descriptor.callback = self->callback_for_non_blocking;
-        descriptor.direction = I2S_TX_TRANSFER;
-        // send the descriptor to the task that handles non-blocking mode
-        xQueueSend(self->non_blocking_mode_queue, &descriptor, 0);
-        return size;
-    } else { // blocking or asyncio mode
-        mp_buffer_info_t appbuf;
-        appbuf.buf = (void *)buf_in;
-        appbuf.len = size;
-        size_t num_bytes_written = copy_appbuf_to_dma(self, &appbuf);
-        return num_bytes_written;
-    }
-}
-
-STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_uint_t ret;
-    mp_uint_t flags = arg;
-    self->io_mode = ASYNCIO; // a call to ioctl() is an indication that asyncio is being used
-
-    if (request == MP_STREAM_POLL) {
-        ret = 0;
-
-        if (flags & MP_STREAM_POLL_RD) {
-            if (self->mode != (I2S_MODE_MASTER | I2S_MODE_RX)) {
-                *errcode = MP_EPERM;
-                return MP_STREAM_ERROR;
-            }
-
-            i2s_event_t i2s_event;
-
-            // check event queue to determine if a DMA buffer has been filled
-            // (which is an indication that at least one DMA buffer is available to be read)
-            // note:  timeout = 0 so the call is non-blocking
-            if (xQueueReceive(self->i2s_event_queue, &i2s_event, 0)) {
-                if (i2s_event.type == I2S_EVENT_RX_DONE) {
-                    // getting here means that at least one DMA buffer is now full
-                    // indicating that audio samples can be read from the I2S object
-                    ret |= MP_STREAM_POLL_RD;
-                }
-            }
-        }
-
-        if (flags & MP_STREAM_POLL_WR) {
-            if (self->mode != (I2S_MODE_MASTER | I2S_MODE_TX)) {
-                *errcode = MP_EPERM;
-                return MP_STREAM_ERROR;
-            }
-
-            i2s_event_t i2s_event;
-
-            // check event queue to determine if a DMA buffer has been emptied
-            // (which is an indication that at least one DMA buffer is available to be written)
-            // note:  timeout = 0 so the call is non-blocking
-            if (xQueueReceive(self->i2s_event_queue, &i2s_event, 0)) {
-                if (i2s_event.type == I2S_EVENT_TX_DONE) {
-                    // getting here means that at least one DMA buffer is now empty
-                    // indicating that audio samples can be written to the I2S object
-                    ret |= MP_STREAM_POLL_WR;
-                }
-            }
-        }
-    } else {
-        *errcode = MP_EINVAL;
-        ret = MP_STREAM_ERROR;
-    }
-
-    return ret;
-}
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[I2S_NUM_AUTO]);
 
 #endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/mimxrt/machine_i2s.c b/ports/mimxrt/machine_i2s.c
index 979872dd16..e704e4f1ec 100644
--- a/ports/mimxrt/machine_i2s.c
+++ b/ports/mimxrt/machine_i2s.c
@@ -29,7 +29,6 @@
 // extmod/machine_i2s.c via MICROPY_PY_MACHINE_I2S_INCLUDEFILE.
 
 #include "py/mphal.h"
-#include "py/stream.h"
 #include "dma_manager.h"
 
 #include CLOCK_CONFIG_H
@@ -122,19 +121,6 @@ typedef enum {
     BOTTOM_HALF
 } ping_pong_t;
 
-typedef struct _ring_buf_t {
-    uint8_t *buffer;
-    size_t head;
-    size_t tail;
-    size_t size;
-} ring_buf_t;
-
-typedef struct _non_blocking_descriptor_t {
-    mp_buffer_info_t appbuf;
-    uint32_t index;
-    bool copy_in_progress;
-} non_blocking_descriptor_t;
-
 typedef struct _machine_i2s_obj_t {
     mp_obj_base_t base;
     uint8_t i2s_id;
@@ -285,59 +271,6 @@ void machine_i2s_deinit_all(void) {
     }
 }
 
-// Ring Buffer
-// Thread safe when used with these constraints:
-// - Single Producer, Single Consumer
-// - Sequential atomic operations
-// One byte of capacity is used to detect buffer empty/full
-
-STATIC void ringbuf_init(ring_buf_t *rbuf, uint8_t *buffer, size_t size) {
-    rbuf->buffer = buffer;
-    rbuf->size = size;
-    rbuf->head = 0;
-    rbuf->tail = 0;
-}
-
-STATIC bool ringbuf_push(ring_buf_t *rbuf, uint8_t data) {
-    size_t next_tail = (rbuf->tail + 1) % rbuf->size;
-
-    if (next_tail != rbuf->head) {
-        rbuf->buffer[rbuf->tail] = data;
-        rbuf->tail = next_tail;
-        return true;
-    }
-
-    // full
-    return false;
-}
-
-STATIC bool ringbuf_pop(ring_buf_t *rbuf, uint8_t *data) {
-    if (rbuf->head == rbuf->tail) {
-        // empty
-        return false;
-    }
-
-    *data = rbuf->buffer[rbuf->head];
-    rbuf->head = (rbuf->head + 1) % rbuf->size;
-    return true;
-}
-
-STATIC bool ringbuf_is_empty(ring_buf_t *rbuf) {
-    return rbuf->head == rbuf->tail;
-}
-
-STATIC bool ringbuf_is_full(ring_buf_t *rbuf) {
-    return ((rbuf->tail + 1) % rbuf->size) == rbuf->head;
-}
-
-STATIC size_t ringbuf_available_data(ring_buf_t *rbuf) {
-    return (rbuf->tail - rbuf->head + rbuf->size) % rbuf->size;
-}
-
-STATIC size_t ringbuf_available_space(ring_buf_t *rbuf) {
-    return rbuf->size - ringbuf_available_data(rbuf) - 1;
-}
-
 STATIC int8_t get_frame_mapping_index(int8_t bits, format_t format) {
     if (format == MONO) {
         if (bits == 16) {
@@ -429,163 +362,6 @@ STATIC const uint32_t get_clock_divider(int32_t rate) {
     return 0;
 }
 
-STATIC uint32_t fill_appbuf_from_ringbuf(machine_i2s_obj_t *self, mp_buffer_info_t *appbuf) {
-
-    // copy audio samples from the ring buffer to the app buffer
-    // loop, copying samples until the app buffer is filled
-    // For asyncio mode, the loop will make an early exit if the ring buffer becomes empty
-    // Example:
-    //   a MicroPython I2S object is configured for 16-bit mono (2 bytes per audio sample).
-    //   For every frame coming from the ring buffer (8 bytes), 2 bytes are "cherry picked" and
-    //   copied to the supplied app buffer.
-    //   Thus, for every 1 byte copied to the app buffer, 4 bytes are read from the ring buffer.
-    //   If a 8kB app buffer is supplied, 32kB of audio samples is read from the ring buffer.
-
-    uint32_t num_bytes_copied_to_appbuf = 0;
-    uint8_t *app_p = (uint8_t *)appbuf->buf;
-    uint8_t appbuf_sample_size_in_bytes = (self->bits == 16? 2 : 4) * (self->format == STEREO ? 2: 1);
-    uint32_t num_bytes_needed_from_ringbuf = appbuf->len * (I2S_RX_FRAME_SIZE_IN_BYTES / appbuf_sample_size_in_bytes);
-    uint8_t discard_byte;
-    while (num_bytes_needed_from_ringbuf) {
-
-        uint8_t f_index = get_frame_mapping_index(self->bits, self->format);
-
-        for (uint8_t i = 0; i < I2S_RX_FRAME_SIZE_IN_BYTES; i++) {
-            int8_t r_to_a_mapping = i2s_frame_map[f_index][i];
-            if (r_to_a_mapping != -1) {
-                if (self->io_mode == BLOCKING) {
-                    // poll the ringbuf until a sample becomes available,  copy into appbuf using the mapping transform
-                    while (ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping) == false) {
-                        ;
-                    }
-                    num_bytes_copied_to_appbuf++;
-                } else if (self->io_mode == ASYNCIO) {
-                    if (ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping) == false) {
-                        // ring buffer is empty, exit
-                        goto exit;
-                    } else {
-                        num_bytes_copied_to_appbuf++;
-                    }
-                } else {
-                    return 0;  // should never get here (non-blocking mode does not use this function)
-                }
-            } else { // r_a_mapping == -1
-                // discard unused byte from ring buffer
-                if (self->io_mode == BLOCKING) {
-                    // poll the ringbuf until a sample becomes available
-                    while (ringbuf_pop(&self->ring_buffer, &discard_byte) == false) {
-                        ;
-                    }
-                } else if (self->io_mode == ASYNCIO) {
-                    if (ringbuf_pop(&self->ring_buffer, &discard_byte) == false) {
-                        // ring buffer is empty, exit
-                        goto exit;
-                    }
-                } else {
-                    return 0;  // should never get here (non-blocking mode does not use this function)
-                }
-            }
-            num_bytes_needed_from_ringbuf--;
-        }
-        app_p += appbuf_sample_size_in_bytes;
-    }
-exit:
-    return num_bytes_copied_to_appbuf;
-}
-
-// function is used in IRQ context
-STATIC void fill_appbuf_from_ringbuf_non_blocking(machine_i2s_obj_t *self) {
-
-    // attempt to copy a block of audio samples from the ring buffer to the supplied app buffer.
-    // audio samples will be formatted as part of the copy operation
-
-    uint32_t num_bytes_copied_to_appbuf = 0;
-    uint8_t *app_p = &(((uint8_t *)self->non_blocking_descriptor.appbuf.buf)[self->non_blocking_descriptor.index]);
-
-    uint8_t appbuf_sample_size_in_bytes = (self->bits == 16? 2 : 4) * (self->format == STEREO ? 2: 1);
-    uint32_t num_bytes_remaining_to_copy_to_appbuf = self->non_blocking_descriptor.appbuf.len - self->non_blocking_descriptor.index;
-    uint32_t num_bytes_remaining_to_copy_from_ring_buffer = num_bytes_remaining_to_copy_to_appbuf *
-        (I2S_RX_FRAME_SIZE_IN_BYTES / appbuf_sample_size_in_bytes);
-    uint32_t num_bytes_needed_from_ringbuf = MIN(SIZEOF_NON_BLOCKING_COPY_IN_BYTES, num_bytes_remaining_to_copy_from_ring_buffer);
-    uint8_t discard_byte;
-    if (ringbuf_available_data(&self->ring_buffer) >= num_bytes_needed_from_ringbuf) {
-        while (num_bytes_needed_from_ringbuf) {
-
-            uint8_t f_index = get_frame_mapping_index(self->bits, self->format);
-
-            for (uint8_t i = 0; i < I2S_RX_FRAME_SIZE_IN_BYTES; i++) {
-                int8_t r_to_a_mapping = i2s_frame_map[f_index][i];
-                if (r_to_a_mapping != -1) {
-                    ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping);
-                    num_bytes_copied_to_appbuf++;
-                } else { // r_a_mapping == -1
-                    // discard unused byte from ring buffer
-                    ringbuf_pop(&self->ring_buffer, &discard_byte);
-                }
-                num_bytes_needed_from_ringbuf--;
-            }
-            app_p += appbuf_sample_size_in_bytes;
-        }
-        self->non_blocking_descriptor.index += num_bytes_copied_to_appbuf;
-
-        if (self->non_blocking_descriptor.index >= self->non_blocking_descriptor.appbuf.len) {
-            self->non_blocking_descriptor.copy_in_progress = false;
-            mp_sched_schedule(self->callback_for_non_blocking, MP_OBJ_FROM_PTR(self));
-        }
-    }
-}
-
-STATIC uint32_t copy_appbuf_to_ringbuf(machine_i2s_obj_t *self, mp_buffer_info_t *appbuf) {
-
-    // copy audio samples from the app buffer to the ring buffer
-    // loop, reading samples until the app buffer is emptied
-    // for asyncio mode, the loop will make an early exit if the ring buffer becomes full
-
-    uint32_t a_index = 0;
-
-    while (a_index < appbuf->len) {
-        if (self->io_mode == BLOCKING) {
-            // copy a byte to the ringbuf when space becomes available
-            while (ringbuf_push(&self->ring_buffer, ((uint8_t *)appbuf->buf)[a_index]) == false) {
-                ;
-            }
-            a_index++;
-        } else if (self->io_mode == ASYNCIO) {
-            if (ringbuf_push(&self->ring_buffer, ((uint8_t *)appbuf->buf)[a_index]) == false) {
-                // ring buffer is full, exit
-                break;
-            } else {
-                a_index++;
-            }
-        } else {
-            return 0;  // should never get here (non-blocking mode does not use this function)
-        }
-    }
-
-    return a_index;
-}
-
-// function is used in IRQ context
-STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self) {
-
-    // copy audio samples from app buffer into ring buffer
-    uint32_t num_bytes_remaining_to_copy = self->non_blocking_descriptor.appbuf.len - self->non_blocking_descriptor.index;
-    uint32_t num_bytes_to_copy = MIN(SIZEOF_NON_BLOCKING_COPY_IN_BYTES, num_bytes_remaining_to_copy);
-
-    if (ringbuf_available_space(&self->ring_buffer) >= num_bytes_to_copy) {
-        for (uint32_t i = 0; i < num_bytes_to_copy; i++) {
-            ringbuf_push(&self->ring_buffer,
-                ((uint8_t *)self->non_blocking_descriptor.appbuf.buf)[self->non_blocking_descriptor.index + i]);
-        }
-
-        self->non_blocking_descriptor.index += num_bytes_to_copy;
-        if (self->non_blocking_descriptor.index >= self->non_blocking_descriptor.appbuf.len) {
-            self->non_blocking_descriptor.copy_in_progress = false;
-            mp_sched_schedule(self->callback_for_non_blocking, MP_OBJ_FROM_PTR(self));
-        }
-    }
-}
-
 // function is used in IRQ context
 STATIC void empty_dma(machine_i2s_obj_t *self, ping_pong_t dma_ping_pong) {
     uint16_t dma_buffer_offset = 0;
@@ -1116,104 +892,6 @@ STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_ma
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
 STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
 
-STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->mode != RX) {
-        *errcode = MP_EPERM;
-        return MP_STREAM_ERROR;
-    }
-
-    uint8_t appbuf_sample_size_in_bytes = (self->bits / 8) * (self->format == STEREO ? 2: 1);
-    if (size % appbuf_sample_size_in_bytes != 0) {
-        *errcode = MP_EINVAL;
-        return MP_STREAM_ERROR;
-    }
-
-    if (size == 0) {
-        return 0;
-    }
-
-    if (self->io_mode == NON_BLOCKING) {
-        self->non_blocking_descriptor.appbuf.buf = (void *)buf_in;
-        self->non_blocking_descriptor.appbuf.len = size;
-        self->non_blocking_descriptor.index = 0;
-        self->non_blocking_descriptor.copy_in_progress = true;
-        return size;
-    } else { // blocking or asyncio mode
-        mp_buffer_info_t appbuf;
-        appbuf.buf = (void *)buf_in;
-        appbuf.len = size;
-        uint32_t num_bytes_read = fill_appbuf_from_ringbuf(self, &appbuf);
-        return num_bytes_read;
-    }
-}
-
-STATIC mp_uint_t machine_i2s_stream_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->mode != TX) {
-        *errcode = MP_EPERM;
-        return MP_STREAM_ERROR;
-    }
-
-    if (size == 0) {
-        return 0;
-    }
-
-    if (self->io_mode == NON_BLOCKING) {
-        self->non_blocking_descriptor.appbuf.buf = (void *)buf_in;
-        self->non_blocking_descriptor.appbuf.len = size;
-        self->non_blocking_descriptor.index = 0;
-        self->non_blocking_descriptor.copy_in_progress = true;
-        return size;
-    } else { // blocking or asyncio mode
-        mp_buffer_info_t appbuf;
-        appbuf.buf = (void *)buf_in;
-        appbuf.len = size;
-        uint32_t num_bytes_written = copy_appbuf_to_ringbuf(self, &appbuf);
-        return num_bytes_written;
-    }
-}
-
-STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_uint_t ret;
-    uintptr_t flags = arg;
-    self->io_mode = ASYNCIO; // a call to ioctl() is an indication that asyncio is being used
-
-    if (request == MP_STREAM_POLL) {
-        ret = 0;
-
-        if (flags & MP_STREAM_POLL_RD) {
-            if (self->mode != RX) {
-                *errcode = MP_EPERM;
-                return MP_STREAM_ERROR;
-            }
-
-            if (!ringbuf_is_empty(&self->ring_buffer)) {
-                ret |= MP_STREAM_POLL_RD;
-            }
-        }
-
-        if (flags & MP_STREAM_POLL_WR) {
-            if (self->mode != TX) {
-                *errcode = MP_EPERM;
-                return MP_STREAM_ERROR;
-            }
-
-            if (!ringbuf_is_full(&self->ring_buffer)) {
-                ret |= MP_STREAM_POLL_WR;
-            }
-        }
-    } else {
-        *errcode = MP_EINVAL;
-        ret = MP_STREAM_ERROR;
-    }
-
-    return ret;
-}
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM]);
 
 #endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index 24c2436dbf..d610e368b0 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -90,6 +90,7 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_MACHINE_I2S_INCLUDEFILE  "ports/mimxrt/machine_i2s.c"
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_RX  (RX)
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_TX  (TX)
+#define MICROPY_PY_MACHINE_I2S_RING_BUF     (1)
 #ifndef MICROPY_PY_MACHINE_SDCARD
 #define MICROPY_PY_MACHINE_SDCARD           (1)
 #endif
diff --git a/ports/rp2/machine_i2s.c b/ports/rp2/machine_i2s.c
index 6ed982ba45..84b22aef14 100644
--- a/ports/rp2/machine_i2s.c
+++ b/ports/rp2/machine_i2s.c
@@ -30,7 +30,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include "py/mphal.h"
-#include "py/stream.h"
 
 #include "hardware/pio.h"
 #include "hardware/clocks.h"
@@ -114,19 +113,6 @@ typedef enum {
     GP_OUTPUT = 1
 } gpio_dir_t;
 
-typedef struct _ring_buf_t {
-    uint8_t *buffer;
-    size_t head;
-    size_t tail;
-    size_t size;
-} ring_buf_t;
-
-typedef struct _non_blocking_descriptor_t {
-    mp_buffer_info_t appbuf;
-    uint32_t index;
-    bool copy_in_progress;
-} non_blocking_descriptor_t;
-
 typedef struct _machine_i2s_obj_t {
     mp_obj_base_t base;
     uint8_t i2s_id;
@@ -228,59 +214,6 @@ void machine_i2s_init0(void) {
     }
 }
 
-// Ring Buffer
-// Thread safe when used with these constraints:
-// - Single Producer, Single Consumer
-// - Sequential atomic operations
-// One byte of capacity is used to detect buffer empty/full
-
-STATIC void ringbuf_init(ring_buf_t *rbuf, uint8_t *buffer, size_t size) {
-    rbuf->buffer = buffer;
-    rbuf->size = size;
-    rbuf->head = 0;
-    rbuf->tail = 0;
-}
-
-STATIC bool ringbuf_push(ring_buf_t *rbuf, uint8_t data) {
-    size_t next_tail = (rbuf->tail + 1) % rbuf->size;
-
-    if (next_tail != rbuf->head) {
-        rbuf->buffer[rbuf->tail] = data;
-        rbuf->tail = next_tail;
-        return true;
-    }
-
-    // full
-    return false;
-}
-
-STATIC bool ringbuf_pop(ring_buf_t *rbuf, uint8_t *data) {
-    if (rbuf->head == rbuf->tail) {
-        // empty
-        return false;
-    }
-
-    *data = rbuf->buffer[rbuf->head];
-    rbuf->head = (rbuf->head + 1) % rbuf->size;
-    return true;
-}
-
-STATIC bool ringbuf_is_empty(ring_buf_t *rbuf) {
-    return rbuf->head == rbuf->tail;
-}
-
-STATIC bool ringbuf_is_full(ring_buf_t *rbuf) {
-    return ((rbuf->tail + 1) % rbuf->size) == rbuf->head;
-}
-
-STATIC size_t ringbuf_available_data(ring_buf_t *rbuf) {
-    return (rbuf->tail - rbuf->head + rbuf->size) % rbuf->size;
-}
-
-STATIC size_t ringbuf_available_space(ring_buf_t *rbuf) {
-    return rbuf->size - ringbuf_available_data(rbuf) - 1;
-}
-
 STATIC int8_t get_frame_mapping_index(int8_t bits, format_t format) {
     if (format == MONO) {
         if (bits == 16) {
@@ -297,163 +230,6 @@ STATIC int8_t get_frame_mapping_index(int8_t bits, format_t format) {
     }
 }
 
-STATIC uint32_t fill_appbuf_from_ringbuf(machine_i2s_obj_t *self, mp_buffer_info_t *appbuf) {
-
-    // copy audio samples from the ring buffer to the app buffer
-    // loop, copying samples until the app buffer is filled
-    // For asyncio mode, the loop will make an early exit if the ring buffer becomes empty
-    // Example:
-    //   a MicroPython I2S object is configured for 16-bit mono (2 bytes per audio sample).
-    //   For every frame coming from the ring buffer (8 bytes), 2 bytes are "cherry picked" and
-    //   copied to the supplied app buffer.
-    //   Thus, for every 1 byte copied to the app buffer, 4 bytes are read from the ring buffer.
-    //   If a 8kB app buffer is supplied, 32kB of audio samples is read from the ring buffer.
-
-    uint32_t num_bytes_copied_to_appbuf = 0;
-    uint8_t *app_p = (uint8_t *)appbuf->buf;
-    uint8_t appbuf_sample_size_in_bytes = (self->bits == 16? 2 : 4) * (self->format == STEREO ? 2: 1);
-    uint32_t num_bytes_needed_from_ringbuf = appbuf->len * (I2S_RX_FRAME_SIZE_IN_BYTES / appbuf_sample_size_in_bytes);
-    uint8_t discard_byte;
-    while (num_bytes_needed_from_ringbuf) {
-
-        uint8_t f_index = get_frame_mapping_index(self->bits, self->format);
-
-        for (uint8_t i = 0; i < I2S_RX_FRAME_SIZE_IN_BYTES; i++) {
-            int8_t r_to_a_mapping = i2s_frame_map[f_index][i];
-            if (r_to_a_mapping != -1) {
-                if (self->io_mode == BLOCKING) {
-                    // poll the ringbuf until a sample becomes available,  copy into appbuf using the mapping transform
-                    while (ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping) == false) {
-                        ;
-                    }
-                    num_bytes_copied_to_appbuf++;
-                } else if (self->io_mode == ASYNCIO) {
-                    if (ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping) == false) {
-                        // ring buffer is empty, exit
-                        goto exit;
-                    } else {
-                        num_bytes_copied_to_appbuf++;
-                    }
-                } else {
-                    return 0;  // should never get here (non-blocking mode does not use this function)
-                }
-            } else { // r_a_mapping == -1
-                // discard unused byte from ring buffer
-                if (self->io_mode == BLOCKING) {
-                    // poll the ringbuf until a sample becomes available
-                    while (ringbuf_pop(&self->ring_buffer, &discard_byte) == false) {
-                        ;
-                    }
-                } else if (self->io_mode == ASYNCIO) {
-                    if (ringbuf_pop(&self->ring_buffer, &discard_byte) == false) {
-                        // ring buffer is empty, exit
-                        goto exit;
-                    }
-                } else {
-                    return 0;  // should never get here (non-blocking mode does not use this function)
-                }
-            }
-            num_bytes_needed_from_ringbuf--;
-        }
-        app_p += appbuf_sample_size_in_bytes;
-    }
-exit:
-    return num_bytes_copied_to_appbuf;
-}
-
-// function is used in IRQ context
-STATIC void fill_appbuf_from_ringbuf_non_blocking(machine_i2s_obj_t *self) {
-
-    // attempt to copy a block of audio samples from the ring buffer to the supplied app buffer.
-    // audio samples will be formatted as part of the copy operation
-
-    uint32_t num_bytes_copied_to_appbuf = 0;
-    uint8_t *app_p = &(((uint8_t *)self->non_blocking_descriptor.appbuf.buf)[self->non_blocking_descriptor.index]);
-
-    uint8_t appbuf_sample_size_in_bytes = (self->bits == 16? 2 : 4) * (self->format == STEREO ? 2: 1);
-    uint32_t num_bytes_remaining_to_copy_to_appbuf = self->non_blocking_descriptor.appbuf.len - self->non_blocking_descriptor.index;
-    uint32_t num_bytes_remaining_to_copy_from_ring_buffer = num_bytes_remaining_to_copy_to_appbuf *
-        (I2S_RX_FRAME_SIZE_IN_BYTES / appbuf_sample_size_in_bytes);
-    uint32_t num_bytes_needed_from_ringbuf = MIN(SIZEOF_NON_BLOCKING_COPY_IN_BYTES, num_bytes_remaining_to_copy_from_ring_buffer);
-    uint8_t discard_byte;
-    if (ringbuf_available_data(&self->ring_buffer) >= num_bytes_needed_from_ringbuf) {
-        while (num_bytes_needed_from_ringbuf) {
-
-            uint8_t f_index = get_frame_mapping_index(self->bits, self->format);
-
-            for (uint8_t i = 0; i < I2S_RX_FRAME_SIZE_IN_BYTES; i++) {
-                int8_t r_to_a_mapping = i2s_frame_map[f_index][i];
-                if (r_to_a_mapping != -1) {
-                    ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping);
-                    num_bytes_copied_to_appbuf++;
-                } else { // r_a_mapping == -1
-                    // discard unused byte from ring buffer
-                    ringbuf_pop(&self->ring_buffer, &discard_byte);
-                }
-                num_bytes_needed_from_ringbuf--;
-            }
-            app_p += appbuf_sample_size_in_bytes;
-        }
-        self->non_blocking_descriptor.index += num_bytes_copied_to_appbuf;
-
-        if (self->non_blocking_descriptor.index >= self->non_blocking_descriptor.appbuf.len) {
-            self->non_blocking_descriptor.copy_in_progress = false;
-            mp_sched_schedule(self->callback_for_non_blocking, MP_OBJ_FROM_PTR(self));
-        }
-    }
-}
-
-STATIC uint32_t copy_appbuf_to_ringbuf(machine_i2s_obj_t *self, mp_buffer_info_t *appbuf) {
-
-    // copy audio samples from the app buffer to the ring buffer
-    // loop, reading samples until the app buffer is emptied
-    // for asyncio mode, the loop will make an early exit if the ring buffer becomes full
-
-    uint32_t a_index = 0;
-
-    while (a_index < appbuf->len) {
-        if (self->io_mode == BLOCKING) {
-            // copy a byte to the ringbuf when space becomes available
-            while (ringbuf_push(&self->ring_buffer, ((uint8_t *)appbuf->buf)[a_index]) == false) {
-                ;
-            }
-            a_index++;
-        } else if (self->io_mode == ASYNCIO) {
-            if (ringbuf_push(&self->ring_buffer, ((uint8_t *)appbuf->buf)[a_index]) == false) {
-                // ring buffer is full, exit
-                break;
-            } else {
-                a_index++;
-            }
-        } else {
-            return 0;  // should never get here (non-blocking mode does not use this function)
-        }
-    }
-
-    return a_index;
-}
-
-// function is used in IRQ context
-STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self) {
-
-    // copy audio samples from app buffer into ring buffer
-    uint32_t num_bytes_remaining_to_copy = self->non_blocking_descriptor.appbuf.len - self->non_blocking_descriptor.index;
-    uint32_t num_bytes_to_copy = MIN(SIZEOF_NON_BLOCKING_COPY_IN_BYTES, num_bytes_remaining_to_copy);
-
-    if (ringbuf_available_space(&self->ring_buffer) >= num_bytes_to_copy) {
-        for (uint32_t i = 0; i < num_bytes_to_copy; i++) {
-            ringbuf_push(&self->ring_buffer,
-                ((uint8_t *)self->non_blocking_descriptor.appbuf.buf)[self->non_blocking_descriptor.index + i]);
-        }
-
-        self->non_blocking_descriptor.index += num_bytes_to_copy;
-        if (self->non_blocking_descriptor.index >= self->non_blocking_descriptor.appbuf.len) {
-            self->non_blocking_descriptor.copy_in_progress = false;
-            mp_sched_schedule(self->callback_for_non_blocking, MP_OBJ_FROM_PTR(self));
-        }
-    }
-}
-
 // function is used in IRQ context
 STATIC void empty_dma(machine_i2s_obj_t *self, uint8_t *dma_buffer_p) {
     // when space exists, copy samples into ring buffer
@@ -989,102 +765,4 @@ STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_ma
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
 STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
 
-STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->mode != RX) {
-        *errcode = MP_EPERM;
-        return MP_STREAM_ERROR;
-    }
-
-    uint8_t appbuf_sample_size_in_bytes = (self->bits / 8) * (self->format == STEREO ? 2: 1);
-    if (size % appbuf_sample_size_in_bytes != 0) {
-        *errcode = MP_EINVAL;
-        return MP_STREAM_ERROR;
-    }
-
-    if (size == 0) {
-        return 0;
-    }
-
-    if (self->io_mode == NON_BLOCKING) {
-        self->non_blocking_descriptor.appbuf.buf = (void *)buf_in;
-        self->non_blocking_descriptor.appbuf.len = size;
-        self->non_blocking_descriptor.index = 0;
-        self->non_blocking_descriptor.copy_in_progress = true;
-        return size;
-    } else { // blocking or asyncio mode
-        mp_buffer_info_t appbuf;
-        appbuf.buf = (void *)buf_in;
-        appbuf.len = size;
-        uint32_t num_bytes_read = fill_appbuf_from_ringbuf(self, &appbuf);
-        return num_bytes_read;
-    }
-}
-
-STATIC mp_uint_t machine_i2s_stream_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->mode != TX) {
-        *errcode = MP_EPERM;
-        return MP_STREAM_ERROR;
-    }
-
-    if (size == 0) {
-        return 0;
-    }
-
-    if (self->io_mode == NON_BLOCKING) {
-        self->non_blocking_descriptor.appbuf.buf = (void *)buf_in;
-        self->non_blocking_descriptor.appbuf.len = size;
-        self->non_blocking_descriptor.index = 0;
-        self->non_blocking_descriptor.copy_in_progress = true;
-        return size;
-    } else { // blocking or asyncio mode
-        mp_buffer_info_t appbuf;
-        appbuf.buf = (void *)buf_in;
-        appbuf.len = size;
-        uint32_t num_bytes_written = copy_appbuf_to_ringbuf(self, &appbuf);
-        return num_bytes_written;
-    }
-}
-
-STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_uint_t ret;
-    uintptr_t flags = arg;
-    self->io_mode = ASYNCIO; // a call to ioctl() is an indication that asyncio is being used
-
-    if (request == MP_STREAM_POLL) {
-        ret = 0;
-
-        if (flags & MP_STREAM_POLL_RD) {
-            if (self->mode != RX) {
-                *errcode = MP_EPERM;
-                return MP_STREAM_ERROR;
-            }
-
-            if (!ringbuf_is_empty(&self->ring_buffer)) {
-                ret |= MP_STREAM_POLL_RD;
-            }
-        }
-
-        if (flags & MP_STREAM_POLL_WR) {
-            if (self->mode != TX) {
-                *errcode = MP_EPERM;
-                return MP_STREAM_ERROR;
-            }
-
-            if (!ringbuf_is_full(&self->ring_buffer)) {
-                ret |= MP_STREAM_POLL_WR;
-            }
-        }
-    } else {
-        *errcode = MP_EINVAL;
-        ret = MP_STREAM_ERROR;
-    }
-
-    return ret;
-}
-
 MP_REGISTER_ROOT_POINTER(void *machine_i2s_obj[2]);
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index 5e6cf0b2d5..e35980d10b 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -122,6 +122,7 @@
 #define MICROPY_PY_MACHINE_I2S_INCLUDEFILE      "ports/rp2/machine_i2s.c"
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_RX      (RX)
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_TX      (TX)
+#define MICROPY_PY_MACHINE_I2S_RING_BUF         (1)
 #define MICROPY_PY_MACHINE_SPI                  (1)
 #define MICROPY_PY_MACHINE_SPI_MSB              (SPI_MSB_FIRST)
 #define MICROPY_PY_MACHINE_SPI_LSB              (SPI_LSB_FIRST)
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index 58b85c7a79..a2ac973ad4 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -30,7 +30,6 @@
 
 #include <stdlib.h>
 #include "py/mphal.h"
-#include "py/stream.h"
 #include "pin.h"
 #include "dma.h"
 
@@ -106,19 +105,6 @@ typedef enum {
     BOTTOM_HALF
 } ping_pong_t;
 
-typedef struct _ring_buf_t {
-    uint8_t *buffer;
-    size_t head;
-    size_t tail;
-    size_t size;
-} ring_buf_t;
-
-typedef struct _non_blocking_descriptor_t {
-    mp_buffer_info_t appbuf;
-    uint32_t index;
-    bool copy_in_progress;
-} non_blocking_descriptor_t;
-
 typedef struct _machine_i2s_obj_t {
     mp_obj_base_t base;
     uint8_t i2s_id;
@@ -162,59 +148,6 @@ void machine_i2s_init0() {
     }
 }
 
-// Ring Buffer
-// Thread safe when used with these constraints:
-// - Single Producer, Single Consumer
-// - Sequential atomic operations
-// One byte of capacity is used to detect buffer empty/full
-
-STATIC void ringbuf_init(ring_buf_t *rbuf, uint8_t *buffer, size_t size) {
-    rbuf->buffer = buffer;
-    rbuf->size = size;
-    rbuf->head = 0;
-    rbuf->tail = 0;
-}
-
-STATIC bool ringbuf_push(ring_buf_t *rbuf, uint8_t data) {
-    size_t next_tail = (rbuf->tail + 1) % rbuf->size;
-
-    if (next_tail != rbuf->head) {
-        rbuf->buffer[rbuf->tail] = data;
-        rbuf->tail = next_tail;
-        return true;
-    }
-
-    // full
-    return false;
-}
-
-STATIC bool ringbuf_pop(ring_buf_t *rbuf, uint8_t *data) {
-    if (rbuf->head == rbuf->tail) {
-        // empty
-        return false;
-    }
-
-    *data = rbuf->buffer[rbuf->head];
-    rbuf->head = (rbuf->head + 1) % rbuf->size;
-    return true;
-}
-
-STATIC bool ringbuf_is_empty(ring_buf_t *rbuf) {
-    return rbuf->head == rbuf->tail;
-}
-
-STATIC bool ringbuf_is_full(ring_buf_t *rbuf) {
-    return ((rbuf->tail + 1) % rbuf->size) == rbuf->head;
-}
-
-STATIC size_t ringbuf_available_data(ring_buf_t *rbuf) {
-    return (rbuf->tail - rbuf->head + rbuf->size) % rbuf->size;
-}
-
-STATIC size_t ringbuf_available_space(ring_buf_t *rbuf) {
-    return rbuf->size - ringbuf_available_data(rbuf) - 1;
-}
-
 //  For 32-bit audio samples, the STM32 HAL API expects each 32-bit sample to be encoded
 //  in an unusual byte ordering:  Byte_2, Byte_3, Byte_0, Byte_1
 //      where:  Byte_0 is the least significant byte of the 32-bit sample
@@ -277,163 +210,6 @@ STATIC int8_t get_dma_bits(uint16_t mode, int8_t bits) {
     }
 }
 
-STATIC uint32_t fill_appbuf_from_ringbuf(machine_i2s_obj_t *self, mp_buffer_info_t *appbuf) {
-
-    // copy audio samples from the ring buffer to the app buffer
-    // loop, copying samples until the app buffer is filled
-    // For asyncio mode, the loop will make an early exit if the ring buffer becomes empty
-    // Example:
-    //   a MicroPython I2S object is configured for 16-bit mono (2 bytes per audio sample).
-    //   For every frame coming from the ring buffer (8 bytes), 2 bytes are "cherry picked" and
-    //   copied to the supplied app buffer.
-    //   Thus, for every 1 byte copied to the app buffer, 4 bytes are read from the ring buffer.
-    //   If a 8kB app buffer is supplied, 32kB of audio samples is read from the ring buffer.
-
-    uint32_t num_bytes_copied_to_appbuf = 0;
-    uint8_t *app_p = (uint8_t *)appbuf->buf;
-    uint8_t appbuf_sample_size_in_bytes = (self->bits == 16? 2 : 4) * (self->format == STEREO ? 2: 1);
-    uint32_t num_bytes_needed_from_ringbuf = appbuf->len * (I2S_RX_FRAME_SIZE_IN_BYTES / appbuf_sample_size_in_bytes);
-    uint8_t discard_byte;
-    while (num_bytes_needed_from_ringbuf) {
-
-        uint8_t f_index = get_frame_mapping_index(self->bits, self->format);
-
-        for (uint8_t i = 0; i < I2S_RX_FRAME_SIZE_IN_BYTES; i++) {
-            int8_t r_to_a_mapping = i2s_frame_map[f_index][i];
-            if (r_to_a_mapping != -1) {
-                if (self->io_mode == BLOCKING) {
-                    // poll the ringbuf until a sample becomes available,  copy into appbuf using the mapping transform
-                    while (ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping) == false) {
-                        ;
-                    }
-                    num_bytes_copied_to_appbuf++;
-                } else if (self->io_mode == ASYNCIO) {
-                    if (ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping) == false) {
-                        // ring buffer is empty, exit
-                        goto exit;
-                    } else {
-                        num_bytes_copied_to_appbuf++;
-                    }
-                } else {
-                    return 0;  // should never get here (non-blocking mode does not use this function)
-                }
-            } else { // r_a_mapping == -1
-                // discard unused byte from ring buffer
-                if (self->io_mode == BLOCKING) {
-                    // poll the ringbuf until a sample becomes available
-                    while (ringbuf_pop(&self->ring_buffer, &discard_byte) == false) {
-                        ;
-                    }
-                } else if (self->io_mode == ASYNCIO) {
-                    if (ringbuf_pop(&self->ring_buffer, &discard_byte) == false) {
-                        // ring buffer is empty, exit
-                        goto exit;
-                    }
-                } else {
-                    return 0;  // should never get here (non-blocking mode does not use this function)
-                }
-            }
-            num_bytes_needed_from_ringbuf--;
-        }
-        app_p += appbuf_sample_size_in_bytes;
-    }
-exit:
-    return num_bytes_copied_to_appbuf;
-}
-
-// function is used in IRQ context
-STATIC void fill_appbuf_from_ringbuf_non_blocking(machine_i2s_obj_t *self) {
-
-    // attempt to copy a block of audio samples from the ring buffer to the supplied app buffer.
-    // audio samples will be formatted as part of the copy operation
-
-    uint32_t num_bytes_copied_to_appbuf = 0;
-    uint8_t *app_p = &(((uint8_t *)self->non_blocking_descriptor.appbuf.buf)[self->non_blocking_descriptor.index]);
-
-    uint8_t appbuf_sample_size_in_bytes = (self->bits == 16? 2 : 4) * (self->format == STEREO ? 2: 1);
-    uint32_t num_bytes_remaining_to_copy_to_appbuf = self->non_blocking_descriptor.appbuf.len - self->non_blocking_descriptor.index;
-    uint32_t num_bytes_remaining_to_copy_from_ring_buffer = num_bytes_remaining_to_copy_to_appbuf *
-        (I2S_RX_FRAME_SIZE_IN_BYTES / appbuf_sample_size_in_bytes);
-    uint32_t num_bytes_needed_from_ringbuf = MIN(SIZEOF_NON_BLOCKING_COPY_IN_BYTES, num_bytes_remaining_to_copy_from_ring_buffer);
-    uint8_t discard_byte;
-    if (ringbuf_available_data(&self->ring_buffer) >= num_bytes_needed_from_ringbuf) {
-        while (num_bytes_needed_from_ringbuf) {
-
-            uint8_t f_index = get_frame_mapping_index(self->bits, self->format);
-
-            for (uint8_t i = 0; i < I2S_RX_FRAME_SIZE_IN_BYTES; i++) {
-                int8_t r_to_a_mapping = i2s_frame_map[f_index][i];
-                if (r_to_a_mapping != -1) {
-                    ringbuf_pop(&self->ring_buffer, app_p + r_to_a_mapping);
-                    num_bytes_copied_to_appbuf++;
-                } else { // r_a_mapping == -1
-                    // discard unused byte from ring buffer
-                    ringbuf_pop(&self->ring_buffer, &discard_byte);
-                }
-                num_bytes_needed_from_ringbuf--;
-            }
-            app_p += appbuf_sample_size_in_bytes;
-        }
-        self->non_blocking_descriptor.index += num_bytes_copied_to_appbuf;
-
-        if (self->non_blocking_descriptor.index >= self->non_blocking_descriptor.appbuf.len) {
-            self->non_blocking_descriptor.copy_in_progress = false;
-            mp_sched_schedule(self->callback_for_non_blocking, MP_OBJ_FROM_PTR(self));
-        }
-    }
-}
-
-STATIC uint32_t copy_appbuf_to_ringbuf(machine_i2s_obj_t *self, mp_buffer_info_t *appbuf) {
-
-    // copy audio samples from the app buffer to the ring buffer
-    // loop, reading samples until the app buffer is emptied
-    // for asyncio mode, the loop will make an early exit if the ring buffer becomes full
-
-    uint32_t a_index = 0;
-
-    while (a_index < appbuf->len) {
-        if (self->io_mode == BLOCKING) {
-            // copy a byte to the ringbuf when space becomes available
-            while (ringbuf_push(&self->ring_buffer, ((uint8_t *)appbuf->buf)[a_index]) == false) {
-                ;
-            }
-            a_index++;
-        } else if (self->io_mode == ASYNCIO) {
-            if (ringbuf_push(&self->ring_buffer, ((uint8_t *)appbuf->buf)[a_index]) == false) {
-                // ring buffer is full, exit
-                break;
-            } else {
-                a_index++;
-            }
-        } else {
-            return 0;  // should never get here (non-blocking mode does not use this function)
-        }
-    }
-
-    return a_index;
-}
-
-// function is used in IRQ context
-STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self) {
-
-    // copy audio samples from app buffer into ring buffer
-    uint32_t num_bytes_remaining_to_copy = self->non_blocking_descriptor.appbuf.len - self->non_blocking_descriptor.index;
-    uint32_t num_bytes_to_copy = MIN(SIZEOF_NON_BLOCKING_COPY_IN_BYTES, num_bytes_remaining_to_copy);
-
-    if (ringbuf_available_space(&self->ring_buffer) >= num_bytes_to_copy) {
-        for (uint32_t i = 0; i < num_bytes_to_copy; i++) {
-            ringbuf_push(&self->ring_buffer,
-                ((uint8_t *)self->non_blocking_descriptor.appbuf.buf)[self->non_blocking_descriptor.index + i]);
-        }
-
-        self->non_blocking_descriptor.index += num_bytes_to_copy;
-        if (self->non_blocking_descriptor.index >= self->non_blocking_descriptor.appbuf.len) {
-            self->non_blocking_descriptor.copy_in_progress = false;
-            mp_sched_schedule(self->callback_for_non_blocking, MP_OBJ_FROM_PTR(self));
-        }
-    }
-}
-
 // function is used in IRQ context
 STATIC void empty_dma(machine_i2s_obj_t *self, ping_pong_t dma_ping_pong) {
     uint16_t dma_buffer_offset = 0;
@@ -965,104 +741,6 @@ STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_ma
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
 STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
 
-STATIC mp_uint_t machine_i2s_stream_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->mode != I2S_MODE_MASTER_RX) {
-        *errcode = MP_EPERM;
-        return MP_STREAM_ERROR;
-    }
-
-    uint8_t appbuf_sample_size_in_bytes = (self->bits / 8) * (self->format == STEREO ? 2: 1);
-    if (size % appbuf_sample_size_in_bytes != 0) {
-        *errcode = MP_EINVAL;
-        return MP_STREAM_ERROR;
-    }
-
-    if (size == 0) {
-        return 0;
-    }
-
-    if (self->io_mode == NON_BLOCKING) {
-        self->non_blocking_descriptor.appbuf.buf = (void *)buf_in;
-        self->non_blocking_descriptor.appbuf.len = size;
-        self->non_blocking_descriptor.index = 0;
-        self->non_blocking_descriptor.copy_in_progress = true;
-        return size;
-    } else { // blocking or asyncio mode
-        mp_buffer_info_t appbuf;
-        appbuf.buf = (void *)buf_in;
-        appbuf.len = size;
-        uint32_t num_bytes_read = fill_appbuf_from_ringbuf(self, &appbuf);
-        return num_bytes_read;
-    }
-}
-
-STATIC mp_uint_t machine_i2s_stream_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->mode != I2S_MODE_MASTER_TX) {
-        *errcode = MP_EPERM;
-        return MP_STREAM_ERROR;
-    }
-
-    if (size == 0) {
-        return 0;
-    }
-
-    if (self->io_mode == NON_BLOCKING) {
-        self->non_blocking_descriptor.appbuf.buf = (void *)buf_in;
-        self->non_blocking_descriptor.appbuf.len = size;
-        self->non_blocking_descriptor.index = 0;
-        self->non_blocking_descriptor.copy_in_progress = true;
-        return size;
-    } else { // blocking or asyncio mode
-        mp_buffer_info_t appbuf;
-        appbuf.buf = (void *)buf_in;
-        appbuf.len = size;
-        uint32_t num_bytes_written = copy_appbuf_to_ringbuf(self, &appbuf);
-        return num_bytes_written;
-    }
-}
-
-STATIC mp_uint_t machine_i2s_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_uint_t ret;
-    uintptr_t flags = arg;
-    self->io_mode = ASYNCIO; // a call to ioctl() is an indication that asyncio is being used
-
-    if (request == MP_STREAM_POLL) {
-        ret = 0;
-
-        if (flags & MP_STREAM_POLL_RD) {
-            if (self->mode != I2S_MODE_MASTER_RX) {
-                *errcode = MP_EPERM;
-                return MP_STREAM_ERROR;
-            }
-
-            if (!ringbuf_is_empty(&self->ring_buffer)) {
-                ret |= MP_STREAM_POLL_RD;
-            }
-        }
-
-        if (flags & MP_STREAM_POLL_WR) {
-            if (self->mode != I2S_MODE_MASTER_TX) {
-                *errcode = MP_EPERM;
-                return MP_STREAM_ERROR;
-            }
-
-            if (!ringbuf_is_full(&self->ring_buffer)) {
-                ret |= MP_STREAM_POLL_WR;
-            }
-        }
-    } else {
-        *errcode = MP_EINVAL;
-        ret = MP_STREAM_ERROR;
-    }
-
-    return ret;
-}
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_MAX_I2S]);
 
 #endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index 1dae9f7f08..c27302d9bf 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -120,6 +120,7 @@
 #define MICROPY_PY_MACHINE_I2S_INCLUDEFILE "ports/stm32/machine_i2s.c"
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_RX (I2S_MODE_MASTER_RX)
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_TX (I2S_MODE_MASTER_TX)
+#define MICROPY_PY_MACHINE_I2S_RING_BUF (1)
 #define MICROPY_PY_MACHINE_SPI      (1)
 #define MICROPY_PY_MACHINE_SPI_MSB  (SPI_FIRSTBIT_MSB)
 #define MICROPY_PY_MACHINE_SPI_LSB  (SPI_FIRSTBIT_LSB)

From cdd9ad8d62cd69714665c086a9bebba92772afc3 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 10 Oct 2023 11:59:13 +1100
Subject: [PATCH 048/310] extmod/machine_i2s: Factor I2S.shift method.

It's exactly the same for all four port implementations.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_i2s.c       | 62 ++++++++++++++++++++++++++++++++++++++
 ports/esp32/machine_i2s.c  | 62 --------------------------------------
 ports/mimxrt/machine_i2s.c | 62 --------------------------------------
 ports/rp2/machine_i2s.c    | 62 --------------------------------------
 ports/stm32/machine_i2s.c  | 62 --------------------------------------
 5 files changed, 62 insertions(+), 248 deletions(-)

diff --git a/extmod/machine_i2s.c b/extmod/machine_i2s.c
index 79ddfb20df..e101d70ddf 100644
--- a/extmod/machine_i2s.c
+++ b/extmod/machine_i2s.c
@@ -309,6 +309,68 @@ STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_i2s_deinit_obj, machine_i2s_deinit);
 
+// Shift() is typically used as a volume control.
+// shift=1 increases volume by 6dB, shift=-1 decreases volume by 6dB
+STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    enum { ARG_buf, ARG_bits, ARG_shift};
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_buf,    MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_bits,   MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_shift,  MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+    };
+
+    // parse args
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    mp_buffer_info_t bufinfo;
+    mp_get_buffer_raise(args[ARG_buf].u_obj, &bufinfo, MP_BUFFER_RW);
+
+    int16_t *buf_16 = bufinfo.buf;
+    int32_t *buf_32 = bufinfo.buf;
+
+    uint8_t bits = args[ARG_bits].u_int;
+    int8_t shift = args[ARG_shift].u_int;
+
+    uint32_t num_audio_samples;
+    switch (bits) {
+        case 16:
+            num_audio_samples = bufinfo.len / sizeof(uint16_t);
+            break;
+
+        case 32:
+            num_audio_samples = bufinfo.len / sizeof(uint32_t);
+            break;
+
+        default:
+            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
+            break;
+    }
+
+    for (uint32_t i = 0; i < num_audio_samples; i++) {
+        switch (bits) {
+            case 16:
+                if (shift >= 0) {
+                    buf_16[i] = buf_16[i] << shift;
+                } else {
+                    buf_16[i] = buf_16[i] >> abs(shift);
+                }
+                break;
+            case 32:
+                if (shift >= 0) {
+                    buf_32[i] = buf_32[i] << shift;
+                } else {
+                    buf_32[i] = buf_32[i] >> abs(shift);
+                }
+                break;
+        }
+    }
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
+STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
+
 STATIC const mp_rom_map_elem_t machine_i2s_locals_dict_table[] = {
     // Methods
     { MP_ROM_QSTR(MP_QSTR_init),            MP_ROM_PTR(&machine_i2s_init_obj) },
diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c
index 12294adbbd..054ddb90cb 100644
--- a/ports/esp32/machine_i2s.c
+++ b/ports/esp32/machine_i2s.c
@@ -572,68 +572,6 @@ STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
 
-// Shift() is typically used as a volume control.
-// shift=1 increases volume by 6dB, shift=-1 decreases volume by 6dB
-STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    enum { ARG_buf, ARG_bits, ARG_shift};
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_buf,    MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
-        { MP_QSTR_bits,   MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-        { MP_QSTR_shift,  MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-    };
-
-    // parse args
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args[ARG_buf].u_obj, &bufinfo, MP_BUFFER_RW);
-
-    int16_t *buf_16 = bufinfo.buf;
-    int32_t *buf_32 = bufinfo.buf;
-
-    uint8_t bits = args[ARG_bits].u_int;
-    int8_t shift = args[ARG_shift].u_int;
-
-    uint32_t num_audio_samples;
-    switch (bits) {
-        case 16:
-            num_audio_samples = bufinfo.len / 2;
-            break;
-
-        case 32:
-            num_audio_samples = bufinfo.len / 4;
-            break;
-
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
-            break;
-    }
-
-    for (uint32_t i = 0; i < num_audio_samples; i++) {
-        switch (bits) {
-            case 16:
-                if (shift >= 0) {
-                    buf_16[i] = buf_16[i] << shift;
-                } else {
-                    buf_16[i] = buf_16[i] >> abs(shift);
-                }
-                break;
-            case 32:
-                if (shift >= 0) {
-                    buf_32[i] = buf_32[i] << shift;
-                } else {
-                    buf_32[i] = buf_32[i] >> abs(shift);
-                }
-                break;
-        }
-    }
-
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
-STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[I2S_NUM_AUTO]);
 
 #endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/mimxrt/machine_i2s.c b/ports/mimxrt/machine_i2s.c
index e704e4f1ec..5ed6588bb1 100644
--- a/ports/mimxrt/machine_i2s.c
+++ b/ports/mimxrt/machine_i2s.c
@@ -830,68 +830,6 @@ STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
 
-// Shift() is typically used as a volume control.
-// shift=1 increases volume by 6dB, shift=-1 decreases volume by 6dB
-STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    enum { ARG_buf, ARG_bits, ARG_shift};
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_buf,    MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_bits,   MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-        { MP_QSTR_shift,  MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-    };
-
-    // parse args
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args[ARG_buf].u_obj, &bufinfo, MP_BUFFER_RW);
-
-    int16_t *buf_16 = bufinfo.buf;
-    int32_t *buf_32 = bufinfo.buf;
-
-    uint8_t bits = args[ARG_bits].u_int;
-    int8_t shift = args[ARG_shift].u_int;
-
-    uint32_t num_audio_samples;
-    switch (bits) {
-        case 16:
-            num_audio_samples = bufinfo.len / sizeof(uint16_t);
-            break;
-
-        case 32:
-            num_audio_samples = bufinfo.len / sizeof(uint32_t);
-            break;
-
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
-            break;
-    }
-
-    for (uint32_t i = 0; i < num_audio_samples; i++) {
-        switch (bits) {
-            case 16:
-                if (shift >= 0) {
-                    buf_16[i] = buf_16[i] << shift;
-                } else {
-                    buf_16[i] = buf_16[i] >> abs(shift);
-                }
-                break;
-            case 32:
-                if (shift >= 0) {
-                    buf_32[i] = buf_32[i] << shift;
-                } else {
-                    buf_32[i] = buf_32[i] >> abs(shift);
-                }
-                break;
-        }
-    }
-
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
-STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM]);
 
 #endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/rp2/machine_i2s.c b/ports/rp2/machine_i2s.c
index 84b22aef14..524139012f 100644
--- a/ports/rp2/machine_i2s.c
+++ b/ports/rp2/machine_i2s.c
@@ -703,66 +703,4 @@ STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
 
-// Shift() is typically used as a volume control.
-// shift=1 increases volume by 6dB, shift=-1 decreases volume by 6dB
-STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    enum { ARG_buf, ARG_bits, ARG_shift};
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_buf,    MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_bits,   MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-        { MP_QSTR_shift, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-    };
-
-    // parse args
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args[ARG_buf].u_obj, &bufinfo, MP_BUFFER_RW);
-
-    int16_t *buf_16 = bufinfo.buf;
-    int32_t *buf_32 = bufinfo.buf;
-
-    uint8_t bits = args[ARG_bits].u_int;
-    int8_t shift = args[ARG_shift].u_int;
-
-    uint32_t num_audio_samples;
-    switch (bits) {
-        case 16:
-            num_audio_samples = bufinfo.len / sizeof(uint16_t);
-            break;
-
-        case 32:
-            num_audio_samples = bufinfo.len / sizeof(uint32_t);
-            break;
-
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
-            break;
-    }
-
-    for (uint32_t i = 0; i < num_audio_samples; i++) {
-        switch (bits) {
-            case 16:
-                if (shift >= 0) {
-                    buf_16[i] = buf_16[i] << shift;
-                } else {
-                    buf_16[i] = buf_16[i] >> abs(shift);
-                }
-                break;
-            case 32:
-                if (shift >= 0) {
-                    buf_32[i] = buf_32[i] << shift;
-                } else {
-                    buf_32[i] = buf_32[i] >> abs(shift);
-                }
-                break;
-        }
-    }
-
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
-STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
-
 MP_REGISTER_ROOT_POINTER(void *machine_i2s_obj[2]);
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index a2ac973ad4..b42120e1be 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -679,68 +679,6 @@ STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
 
-// Shift() is typically used as a volume control.
-// shift=1 increases volume by 6dB, shift=-1 decreases volume by 6dB
-STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    enum { ARG_buf, ARG_bits, ARG_shift};
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_buf,    MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_bits,   MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-        { MP_QSTR_shift, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-    };
-
-    // parse args
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args[ARG_buf].u_obj, &bufinfo, MP_BUFFER_RW);
-
-    int16_t *buf_16 = bufinfo.buf;
-    int32_t *buf_32 = bufinfo.buf;
-
-    uint8_t bits = args[ARG_bits].u_int;
-    int8_t shift = args[ARG_shift].u_int;
-
-    uint32_t num_audio_samples;
-    switch (bits) {
-        case 16:
-            num_audio_samples = bufinfo.len / sizeof(uint16_t);
-            break;
-
-        case 32:
-            num_audio_samples = bufinfo.len / sizeof(uint32_t);
-            break;
-
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
-            break;
-    }
-
-    for (uint32_t i = 0; i < num_audio_samples; i++) {
-        switch (bits) {
-            case 16:
-                if (shift >= 0) {
-                    buf_16[i] = buf_16[i] << shift;
-                } else {
-                    buf_16[i] = buf_16[i] >> abs(shift);
-                }
-                break;
-            case 32:
-                if (shift >= 0) {
-                    buf_32[i] = buf_32[i] << shift;
-                } else {
-                    buf_32[i] = buf_32[i] >> abs(shift);
-                }
-                break;
-        }
-    }
-
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_shift_fun_obj, 0, machine_i2s_shift);
-STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(machine_i2s_shift_obj, MP_ROM_PTR(&machine_i2s_shift_fun_obj));
-
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_MAX_I2S]);
 
 #endif // MICROPY_PY_MACHINE_I2S

From 14779868159a7a86e519541d5d6c562e9792a78e Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 10 Oct 2023 12:13:37 +1100
Subject: [PATCH 049/310] extmod/machine_i2s: Factor I2S.irq method.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_i2s.c       | 22 ++++++++++++++++++++++
 ports/esp32/machine_i2s.c  | 17 ++---------------
 ports/mimxrt/machine_i2s.c | 17 ++---------------
 ports/rp2/machine_i2s.c    | 17 ++---------------
 ports/stm32/machine_i2s.c  | 17 ++---------------
 5 files changed, 30 insertions(+), 60 deletions(-)

diff --git a/extmod/machine_i2s.c b/extmod/machine_i2s.c
index e101d70ddf..ea2a0e370a 100644
--- a/extmod/machine_i2s.c
+++ b/extmod/machine_i2s.c
@@ -61,6 +61,7 @@ STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self);
 STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
 STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id);
 STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self);
+STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self);
 
 // The port provides implementations of the above in this file.
 #include MICROPY_PY_MACHINE_I2S_INCLUDEFILE
@@ -309,6 +310,27 @@ STATIC mp_obj_t machine_i2s_deinit(mp_obj_t self_in) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_i2s_deinit_obj, machine_i2s_deinit);
 
+// I2S.irq(handler)
+STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
+    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (handler != mp_const_none && !mp_obj_is_callable(handler)) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid callback"));
+    }
+
+    if (handler != mp_const_none) {
+        self->io_mode = NON_BLOCKING;
+    } else {
+        self->io_mode = BLOCKING;
+    }
+
+    self->callback_for_non_blocking = handler;
+
+    mp_machine_i2s_irq_update(self);
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
+
 // Shift() is typically used as a volume control.
 // shift=1 increases volume by 6dB, shift=-1 decreases volume by 6dB
 STATIC mp_obj_t machine_i2s_shift(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c
index 054ddb90cb..c7a53461c6 100644
--- a/ports/esp32/machine_i2s.c
+++ b/ports/esp32/machine_i2s.c
@@ -528,15 +528,8 @@ STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
     self->i2s_event_queue = NULL;
 }
 
-STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    if (handler != mp_const_none && !mp_obj_is_callable(handler)) {
-        mp_raise_ValueError(MP_ERROR_TEXT("invalid callback"));
-    }
-
-    if (handler != mp_const_none) {
-        self->io_mode = NON_BLOCKING;
-
+STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self) {
+    if (self->io_mode == NON_BLOCKING) {
         // create a queue linking the MicroPython task to a FreeRTOS task
         // that manages the non blocking mode of operation
         self->non_blocking_mode_queue = xQueueCreate(1, sizeof(non_blocking_descriptor_t));
@@ -563,14 +556,8 @@ STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
             vQueueDelete(self->non_blocking_mode_queue);
             self->non_blocking_mode_queue = NULL;
         }
-
-        self->io_mode = BLOCKING;
     }
-
-    self->callback_for_non_blocking = handler;
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
 
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[I2S_NUM_AUTO]);
 
diff --git a/ports/mimxrt/machine_i2s.c b/ports/mimxrt/machine_i2s.c
index 5ed6588bb1..5556404f25 100644
--- a/ports/mimxrt/machine_i2s.c
+++ b/ports/mimxrt/machine_i2s.c
@@ -813,22 +813,9 @@ STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
     }
 }
 
-STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    if (handler != mp_const_none && !mp_obj_is_callable(handler)) {
-        mp_raise_ValueError(MP_ERROR_TEXT("invalid callback"));
-    }
-
-    if (handler != mp_const_none) {
-        self->io_mode = NON_BLOCKING;
-    } else {
-        self->io_mode = BLOCKING;
-    }
-
-    self->callback_for_non_blocking = handler;
-    return mp_const_none;
+STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self) {
+    (void)self;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
 
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM]);
 
diff --git a/ports/rp2/machine_i2s.c b/ports/rp2/machine_i2s.c
index 524139012f..4e49ad3590 100644
--- a/ports/rp2/machine_i2s.c
+++ b/ports/rp2/machine_i2s.c
@@ -686,21 +686,8 @@ STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
     }
 }
 
-STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    if (handler != mp_const_none && !mp_obj_is_callable(handler)) {
-        mp_raise_ValueError(MP_ERROR_TEXT("invalid callback"));
-    }
-
-    if (handler != mp_const_none) {
-        self->io_mode = NON_BLOCKING;
-    } else {
-        self->io_mode = BLOCKING;
-    }
-
-    self->callback_for_non_blocking = handler;
-    return mp_const_none;
+STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self) {
+    (void)self;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
 
 MP_REGISTER_ROOT_POINTER(void *machine_i2s_obj[2]);
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index b42120e1be..f83ab4ea1a 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -662,22 +662,9 @@ STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
     }
 }
 
-STATIC mp_obj_t machine_i2s_irq(mp_obj_t self_in, mp_obj_t handler) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    if (handler != mp_const_none && !mp_obj_is_callable(handler)) {
-        mp_raise_ValueError(MP_ERROR_TEXT("invalid callback"));
-    }
-
-    if (handler != mp_const_none) {
-        self->io_mode = NON_BLOCKING;
-    } else {
-        self->io_mode = BLOCKING;
-    }
-
-    self->callback_for_non_blocking = handler;
-    return mp_const_none;
+STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self) {
+    (void)self;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_i2s_irq_obj, machine_i2s_irq);
 
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_MAX_I2S]);
 

From 676f9bb78c6682b113f31b4c055a7029cf3942be Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 10 Oct 2023 12:31:04 +1100
Subject: [PATCH 050/310] extmod/machine_i2s: Factor print function.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_i2s.c        | 25 +++++++++++++++++++
 ports/esp32/machine_i2s.c   | 50 +++++++++++--------------------------
 ports/mimxrt/machine_i2s.c  | 21 ----------------
 ports/mimxrt/mpconfigport.h |  1 +
 ports/rp2/machine_i2s.c     | 19 --------------
 ports/stm32/machine_i2s.c   | 19 --------------
 6 files changed, 41 insertions(+), 94 deletions(-)

diff --git a/extmod/machine_i2s.c b/extmod/machine_i2s.c
index ea2a0e370a..3e232d7a30 100644
--- a/extmod/machine_i2s.c
+++ b/extmod/machine_i2s.c
@@ -280,6 +280,31 @@ STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self) {
 
 #endif // MICROPY_PY_MACHINE_I2S_RING_BUF
 
+STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_printf(print, "I2S(id=%u,\n"
+        "sck="MP_HAL_PIN_FMT ",\n"
+        "ws="MP_HAL_PIN_FMT ",\n"
+        "sd="MP_HAL_PIN_FMT ",\n"
+        #if MICROPY_PY_MACHINE_I2S_MCK
+        "mck="MP_HAL_PIN_FMT ",\n"
+        #endif
+        "mode=%u,\n"
+        "bits=%u, format=%u,\n"
+        "rate=%d, ibuf=%d)",
+        self->i2s_id,
+        mp_hal_pin_name(self->sck),
+        mp_hal_pin_name(self->ws),
+        mp_hal_pin_name(self->sd),
+        #if MICROPY_PY_MACHINE_I2S_MCK
+        mp_hal_pin_name(self->mck),
+        #endif
+        self->mode,
+        self->bits, self->format,
+        self->rate, self->ibuf
+        );
+}
+
 STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
     mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
     mp_int_t i2s_id = mp_obj_get_int(args[0]);
diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c
index c7a53461c6..6cc13b402e 100644
--- a/ports/esp32/machine_i2s.c
+++ b/ports/esp32/machine_i2s.c
@@ -109,7 +109,7 @@ typedef struct _non_blocking_descriptor_t {
 
 typedef struct _machine_i2s_obj_t {
     mp_obj_base_t base;
-    i2s_port_t port;
+    i2s_port_t i2s_id;
     mp_hal_pin_obj_t sck;
     mp_hal_pin_obj_t ws;
     mp_hal_pin_obj_t sd;
@@ -255,7 +255,7 @@ STATIC uint32_t fill_appbuf_from_dma(machine_i2s_obj_t *self, mp_buffer_info_t *
         }
 
         esp_err_t ret = i2s_read(
-            self->port,
+            self->i2s_id,
             self->transform_buffer,
             num_bytes_requested_from_dma,
             &num_bytes_received_from_dma,
@@ -315,7 +315,7 @@ STATIC size_t copy_appbuf_to_dma(machine_i2s_obj_t *self, mp_buffer_info_t *appb
         delay = portMAX_DELAY;  // block until supplied buffer is emptied
     }
 
-    esp_err_t ret = i2s_write(self->port, appbuf->buf, appbuf->len, &num_bytes_written, delay);
+    esp_err_t ret = i2s_write(self->i2s_id, appbuf->buf, appbuf->len, &num_bytes_written, delay);
     check_esp_err(ret);
 
     if ((self->io_mode == ASYNCIO) && (num_bytes_written < appbuf->len)) {
@@ -444,17 +444,17 @@ STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_arg
     i2s_config.bits_per_chan = 0;
 
     // I2S queue size equals the number of DMA buffers
-    check_esp_err(i2s_driver_install(self->port, &i2s_config, i2s_config.dma_buf_count, &self->i2s_event_queue));
+    check_esp_err(i2s_driver_install(self->i2s_id, &i2s_config, i2s_config.dma_buf_count, &self->i2s_event_queue));
 
     // apply low-level workaround for bug in some ESP-IDF versions that swap
     // the left and right channels
     // https://github.com/espressif/esp-idf/issues/6625
     #if CONFIG_IDF_TARGET_ESP32S3
-    REG_SET_BIT(I2S_TX_CONF_REG(self->port), I2S_TX_MSB_SHIFT);
-    REG_SET_BIT(I2S_TX_CONF_REG(self->port), I2S_RX_MSB_SHIFT);
+    REG_SET_BIT(I2S_TX_CONF_REG(self->i2s_id), I2S_TX_MSB_SHIFT);
+    REG_SET_BIT(I2S_TX_CONF_REG(self->i2s_id), I2S_RX_MSB_SHIFT);
     #else
-    REG_SET_BIT(I2S_CONF_REG(self->port), I2S_TX_MSB_RIGHT);
-    REG_SET_BIT(I2S_CONF_REG(self->port), I2S_RX_MSB_RIGHT);
+    REG_SET_BIT(I2S_CONF_REG(self->i2s_id), I2S_TX_MSB_RIGHT);
+    REG_SET_BIT(I2S_CONF_REG(self->i2s_id), I2S_RX_MSB_RIGHT);
     #endif
 
     i2s_pin_config_t pin_config;
@@ -470,42 +470,22 @@ STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_arg
         pin_config.data_out_num = self->sd;
     }
 
-    check_esp_err(i2s_set_pin(self->port, &pin_config));
-}
-
-STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "I2S(id=%u,\n"
-        "sck="MP_HAL_PIN_FMT ",\n"
-        "ws="MP_HAL_PIN_FMT ",\n"
-        "sd="MP_HAL_PIN_FMT ",\n"
-        "mode=%u,\n"
-        "bits=%u, format=%u,\n"
-        "rate=%d, ibuf=%d)",
-        self->port,
-        mp_hal_pin_name(self->sck),
-        mp_hal_pin_name(self->ws),
-        mp_hal_pin_name(self->sd),
-        self->mode,
-        self->bits, self->format,
-        self->rate, self->ibuf
-        );
+    check_esp_err(i2s_set_pin(self->i2s_id, &pin_config));
 }
 
 STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
-    i2s_port_t port = i2s_id;
-    if (port < 0 || port >= I2S_NUM_AUTO) {
+    if (i2s_id < 0 || i2s_id >= I2S_NUM_AUTO) {
         mp_raise_ValueError(MP_ERROR_TEXT("invalid id"));
     }
 
     machine_i2s_obj_t *self;
-    if (MP_STATE_PORT(machine_i2s_obj)[port] == NULL) {
+    if (MP_STATE_PORT(machine_i2s_obj)[i2s_id] == NULL) {
         self = m_new_obj_with_finaliser(machine_i2s_obj_t);
         self->base.type = &machine_i2s_type;
-        MP_STATE_PORT(machine_i2s_obj)[port] = self;
-        self->port = port;
+        MP_STATE_PORT(machine_i2s_obj)[i2s_id] = self;
+        self->i2s_id = i2s_id;
     } else {
-        self = MP_STATE_PORT(machine_i2s_obj)[port];
+        self = MP_STATE_PORT(machine_i2s_obj)[i2s_id];
         machine_i2s_deinit(self);
     }
 
@@ -513,7 +493,7 @@ STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
 }
 
 STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self) {
-    i2s_driver_uninstall(self->port);
+    i2s_driver_uninstall(self->i2s_id);
 
     if (self->non_blocking_mode_task != NULL) {
         vTaskDelete(self->non_blocking_mode_task);
diff --git a/ports/mimxrt/machine_i2s.c b/ports/mimxrt/machine_i2s.c
index 5556404f25..dc1955e306 100644
--- a/ports/mimxrt/machine_i2s.c
+++ b/ports/mimxrt/machine_i2s.c
@@ -741,27 +741,6 @@ STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_arg
     }
 }
 
-STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "I2S(id=%u,\n"
-        "sck="MP_HAL_PIN_FMT ",\n"
-        "ws="MP_HAL_PIN_FMT ",\n"
-        "sd="MP_HAL_PIN_FMT ",\n"
-        "mck="MP_HAL_PIN_FMT ",\n"
-        "mode=%u,\n"
-        "bits=%u, format=%u,\n"
-        "rate=%d, ibuf=%d)",
-        self->i2s_id,
-        mp_hal_pin_name(self->sck),
-        mp_hal_pin_name(self->ws),
-        mp_hal_pin_name(self->sd),
-        mp_hal_pin_name(self->mck),
-        self->mode,
-        self->bits, self->format,
-        self->rate, self->ibuf
-        );
-}
-
 STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
     if (i2s_id < 1 || i2s_id > MICROPY_HW_I2S_NUM) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("I2S(%d) does not exist"), i2s_id);
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index d610e368b0..492686843a 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -90,6 +90,7 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_MACHINE_I2S_INCLUDEFILE  "ports/mimxrt/machine_i2s.c"
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_RX  (RX)
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_TX  (TX)
+#define MICROPY_PY_MACHINE_I2S_MCK          (1)
 #define MICROPY_PY_MACHINE_I2S_RING_BUF     (1)
 #ifndef MICROPY_PY_MACHINE_SDCARD
 #define MICROPY_PY_MACHINE_SDCARD           (1)
diff --git a/ports/rp2/machine_i2s.c b/ports/rp2/machine_i2s.c
index 4e49ad3590..c1caac5dab 100644
--- a/ports/rp2/machine_i2s.c
+++ b/ports/rp2/machine_i2s.c
@@ -638,25 +638,6 @@ STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_arg
     dma_channel_start(self->dma_channel[0]);
 }
 
-STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "I2S(id=%u,\n"
-        "sck="MP_HAL_PIN_FMT ",\n"
-        "ws="MP_HAL_PIN_FMT ",\n"
-        "sd="MP_HAL_PIN_FMT ",\n"
-        "mode=%u,\n"
-        "bits=%u, format=%u,\n"
-        "rate=%d, ibuf=%d)",
-        self->i2s_id,
-        mp_hal_pin_name(self->sck),
-        mp_hal_pin_name(self->ws),
-        mp_hal_pin_name(self->sd),
-        self->mode,
-        self->bits, self->format,
-        self->rate, self->ibuf
-        );
-}
-
 STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
     if (i2s_id >= MAX_I2S_RP2) {
         mp_raise_ValueError(MP_ERROR_TEXT("invalid id"));
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index f83ab4ea1a..1ab80fb97b 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -590,25 +590,6 @@ STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_arg
     }
 }
 
-STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "I2S(id=%u,\n"
-        "sck="MP_HAL_PIN_FMT ",\n"
-        "ws="MP_HAL_PIN_FMT ",\n"
-        "sd="MP_HAL_PIN_FMT ",\n"
-        "mode=%u,\n"
-        "bits=%u, format=%u,\n"
-        "rate=%d, ibuf=%d)",
-        self->i2s_id,
-        mp_hal_pin_name(self->sck),
-        mp_hal_pin_name(self->ws),
-        mp_hal_pin_name(self->sd),
-        self->mode,
-        self->bits, self->format,
-        self->rate, self->ibuf
-        );
-}
-
 STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id) {
     uint8_t i2s_id_zero_base = 0;
 

From 46ae3b5a34d33d3c696e1fb66661983315686712 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 10 Oct 2023 12:53:42 +1100
Subject: [PATCH 051/310] extmod/machine_i2s: Factor init_helper argument
 parsing.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_i2s.c       | 42 +++++++++++++++++++++++++++++++++++---
 ports/esp32/machine_i2s.c  | 32 +----------------------------
 ports/mimxrt/machine_i2s.c | 35 ++-----------------------------
 ports/rp2/machine_i2s.c    | 32 +----------------------------
 ports/stm32/machine_i2s.c  | 32 +----------------------------
 5 files changed, 44 insertions(+), 129 deletions(-)

diff --git a/extmod/machine_i2s.c b/extmod/machine_i2s.c
index 3e232d7a30..bbff560a0d 100644
--- a/extmod/machine_i2s.c
+++ b/extmod/machine_i2s.c
@@ -32,6 +32,21 @@
 
 #include "extmod/modmachine.h"
 
+// Arguments for I2S() constructor and I2S.init().
+enum {
+    ARG_sck,
+    ARG_ws,
+    ARG_sd,
+    #if MICROPY_PY_MACHINE_I2S_MCK
+    ARG_mck,
+    #endif
+    ARG_mode,
+    ARG_bits,
+    ARG_format,
+    ARG_rate,
+    ARG_ibuf,
+};
+
 #if MICROPY_PY_MACHINE_I2S_RING_BUF
 
 typedef struct _ring_buf_t {
@@ -58,7 +73,7 @@ STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self);
 #endif // MICROPY_PY_MACHINE_I2S_RING_BUF
 
 // The port must provide implementations of these low-level I2S functions.
-STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, mp_arg_val_t *args);
 STATIC machine_i2s_obj_t *mp_machine_i2s_make_new_instance(mp_int_t i2s_id);
 STATIC void mp_machine_i2s_deinit(machine_i2s_obj_t *self);
 STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self);
@@ -280,6 +295,27 @@ STATIC void copy_appbuf_to_ringbuf_non_blocking(machine_i2s_obj_t *self) {
 
 #endif // MICROPY_PY_MACHINE_I2S_RING_BUF
 
+MP_NOINLINE STATIC void machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_sck,      MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_ws,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_sd,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
+        #if MICROPY_PY_MACHINE_I2S_MCK
+        { MP_QSTR_mck,      MP_ARG_KW_ONLY | MP_ARG_OBJ,   {.u_obj = mp_const_none} },
+        #endif
+        { MP_QSTR_mode,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
+        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
+        { MP_QSTR_format,   MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
+        { MP_QSTR_rate,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
+        { MP_QSTR_ibuf,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
+    };
+
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_pos_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    mp_machine_i2s_init_helper(self, args);
+}
+
 STATIC void machine_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "I2S(id=%u,\n"
@@ -313,7 +349,7 @@ STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_arg
 
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
-    mp_machine_i2s_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
+    machine_i2s_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
 
     return MP_OBJ_FROM_PTR(self);
 }
@@ -322,7 +358,7 @@ STATIC mp_obj_t machine_i2s_make_new(const mp_obj_type_t *type, size_t n_pos_arg
 STATIC mp_obj_t machine_i2s_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     machine_i2s_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
     mp_machine_i2s_deinit(self);
-    mp_machine_i2s_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
+    machine_i2s_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2s_init_obj, 1, machine_i2s_init);
diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c
index 6cc13b402e..9a5e5c6033 100644
--- a/ports/esp32/machine_i2s.c
+++ b/ports/esp32/machine_i2s.c
@@ -351,37 +351,7 @@ STATIC void task_for_non_blocking_mode(void *self_in) {
     }
 }
 
-STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-
-    enum {
-        ARG_sck,
-        ARG_ws,
-        ARG_sd,
-        ARG_mode,
-        ARG_bits,
-        ARG_format,
-        ARG_rate,
-        ARG_ibuf,
-    };
-
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_sck,      MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_ws,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_sd,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_mode,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_format,   MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_rate,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_ibuf,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-    };
-
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_pos_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    //
-    // ---- Check validity of arguments ----
-    //
-
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, mp_arg_val_t *args) {
     // are Pins valid?
     int8_t sck = args[ARG_sck].u_obj == MP_OBJ_NULL ? -1 : machine_pin_get_id(args[ARG_sck].u_obj);
     int8_t ws = args[ARG_ws].u_obj == MP_OBJ_NULL ? -1 : machine_pin_get_id(args[ARG_ws].u_obj);
diff --git a/ports/mimxrt/machine_i2s.c b/ports/mimxrt/machine_i2s.c
index dc1955e306..dcdebd4c7e 100644
--- a/ports/mimxrt/machine_i2s.c
+++ b/ports/mimxrt/machine_i2s.c
@@ -613,39 +613,7 @@ STATIC bool i2s_init(machine_i2s_obj_t *self) {
     return true;
 }
 
-STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-
-    enum {
-        ARG_sck,
-        ARG_ws,
-        ARG_sd,
-        ARG_mck,
-        ARG_mode,
-        ARG_bits,
-        ARG_format,
-        ARG_rate,
-        ARG_ibuf,
-    };
-
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_sck,      MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_ws,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_sd,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_mck,      MP_ARG_KW_ONLY | MP_ARG_OBJ,   {.u_obj = mp_const_none} },
-        { MP_QSTR_mode,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_format,   MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_rate,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_ibuf,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-    };
-
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_pos_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    //
-    // ---- Check validity of arguments ----
-    //
-
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, mp_arg_val_t *args) {
     // is Mode valid?
     uint16_t i2s_mode = args[ARG_mode].u_int;
     if ((i2s_mode != (RX)) &&
@@ -672,6 +640,7 @@ STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_arg
     const machine_pin_obj_t *pin_sd = pin_find(args[ARG_sd].u_obj);
     uint16_t mapping_index;
     bool invalid_sd = true;
+
     if (lookup_gpio(pin_sd, SD, self->i2s_id, &mapping_index)) {
         if (i2s_mode == i2s_gpio_map[mapping_index].mode) {
             invalid_sd = false;
diff --git a/ports/rp2/machine_i2s.c b/ports/rp2/machine_i2s.c
index c1caac5dab..9df0f09f24 100644
--- a/ports/rp2/machine_i2s.c
+++ b/ports/rp2/machine_i2s.c
@@ -541,37 +541,7 @@ STATIC void dma_irq1_handler(void) {
     dma_irq_handler(1);
 }
 
-STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-
-    enum {
-        ARG_sck,
-        ARG_ws,
-        ARG_sd,
-        ARG_mode,
-        ARG_bits,
-        ARG_format,
-        ARG_rate,
-        ARG_ibuf,
-    };
-
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_sck,      MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_ws,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_sd,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_mode,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_format,   MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_rate,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_ibuf,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-    };
-
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_pos_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    //
-    // ---- Check validity of arguments ----
-    //
-
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, mp_arg_val_t *args) {
     // are Pins valid?
     mp_hal_pin_obj_t sck = args[ARG_sck].u_obj == MP_OBJ_NULL ? -1 : mp_hal_get_pin_obj(args[ARG_sck].u_obj);
     mp_hal_pin_obj_t ws = args[ARG_ws].u_obj == MP_OBJ_NULL ? -1 : mp_hal_get_pin_obj(args[ARG_ws].u_obj);
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index 1ab80fb97b..6d195432fd 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -441,39 +441,9 @@ void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s) {
     feed_dma(self, TOP_HALF);
 }
 
-STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-
-    enum {
-        ARG_sck,
-        ARG_ws,
-        ARG_sd,
-        ARG_mode,
-        ARG_bits,
-        ARG_format,
-        ARG_rate,
-        ARG_ibuf,
-    };
-
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_sck,      MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_ws,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_sd,       MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ,   {.u_obj = MP_OBJ_NULL} },
-        { MP_QSTR_mode,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_format,   MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_rate,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-        { MP_QSTR_ibuf,     MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT,   {.u_int = -1} },
-    };
-
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_pos_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
+STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, mp_arg_val_t *args) {
     memset(&self->hi2s, 0, sizeof(self->hi2s));
 
-    //
-    // ---- Check validity of arguments ----
-    //
-
     // are I2S pin assignments valid?
     const pin_af_obj_t *pin_af;
 

From 91a3f183916e1514fbb8dc58ca5b77acc59d4346 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 10 Oct 2023 16:44:02 +1100
Subject: [PATCH 052/310] extmod/machine_i2s: Factor comments, some enums and
 macros.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_i2s.c       | 46 +++++++++++++++++++++++++++++++++++
 ports/esp32/machine_i2s.c  | 49 +-------------------------------------
 ports/mimxrt/machine_i2s.c | 49 ++------------------------------------
 ports/rp2/machine_i2s.c    | 47 ++----------------------------------
 ports/stm32/machine_i2s.c  | 49 +-------------------------------------
 5 files changed, 52 insertions(+), 188 deletions(-)

diff --git a/extmod/machine_i2s.c b/extmod/machine_i2s.c
index bbff560a0d..cc97f011a6 100644
--- a/extmod/machine_i2s.c
+++ b/extmod/machine_i2s.c
@@ -32,6 +32,52 @@
 
 #include "extmod/modmachine.h"
 
+// The I2S class has 3 modes of operation:
+//
+// Mode1:  Blocking
+// - readinto() and write() methods block until the supplied buffer is filled (read) or emptied (write)
+// - this is the default mode of operation
+//
+// Mode2:  Non-Blocking
+// - readinto() and write() methods return immediately
+// - buffer filling and emptying happens asynchronously to the main MicroPython task
+// - a callback function is called when the supplied buffer has been filled (read) or emptied (write)
+// - non-blocking mode is enabled when a callback is set with the irq() method
+// - implementation of asynchronous background operations is port specific
+//
+// Mode3: Asyncio
+// - implements the stream protocol
+// - asyncio mode is enabled when the ioctl() function is called
+// - the state of the internal ring buffer is used to detect that I2S samples can be read or written
+//
+// The samples contained in the app buffer supplied for the readinto() and write() methods have the following convention:
+//   Mono:  little endian format
+//   Stereo:  little endian format, left channel first
+//
+// I2S terms:
+//   "frame":  consists of two audio samples (Left audio sample + Right audio sample)
+//
+// Misc:
+// - for Mono configuration:
+//   - readinto method: samples are gathered from the L channel only
+//   - write method: every sample is output to both the L and R channels
+// - for readinto method the I2S hardware is read using 8-byte frames
+//   (this is standard for almost all I2S hardware, such as MEMS microphones)
+
+#define NUM_I2S_USER_FORMATS (4)
+#define I2S_RX_FRAME_SIZE_IN_BYTES (8)
+
+typedef enum {
+    MONO,
+    STEREO
+} format_t;
+
+typedef enum {
+    BLOCKING,
+    NON_BLOCKING,
+    ASYNCIO
+} io_mode_t;
+
 // Arguments for I2S() constructor and I2S.init().
 enum {
     ARG_sck,
diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c
index 9a5e5c6033..89d460e452 100644
--- a/ports/esp32/machine_i2s.c
+++ b/ports/esp32/machine_i2s.c
@@ -29,8 +29,6 @@
 
 #include "py/mphal.h"
 
-#if MICROPY_PY_MACHINE_I2S
-
 #include "driver/i2s.h"
 #include "soc/i2s_reg.h"
 #include "freertos/FreeRTOS.h"
@@ -38,38 +36,9 @@
 #include "freertos/queue.h"
 #include "esp_task.h"
 
-// The I2S module has 3 modes of operation:
-//
-// Mode1:  Blocking
-// - readinto() and write() methods block until the supplied buffer is filled (read) or emptied (write)
-// - this is the default mode of operation
-//
-// Mode2:  Non-Blocking
-// - readinto() and write() methods return immediately.
-// - buffer filling and emptying happens asynchronously to the main MicroPython task
-// - a callback function is called when the supplied buffer has been filled (read) or emptied (write)
-// - non-blocking mode is enabled when a callback is set with the irq() method
+// Notes on this port's specific implementation of I2S:
 // - a FreeRTOS task is created to implement the asynchronous background operations
 // - a FreeRTOS queue is used to transfer the supplied buffer to the background task
-//
-// Mode3: Asyncio
-// - implements the stream protocol
-// - asyncio mode is enabled when the ioctl() function is called
-// - the I2S event queue is used to detect that I2S samples can be read or written from/to DMA memory
-//
-// The samples contained in the app buffer supplied for the readinto() and write() methods have the following convention:
-//   Mono:  little endian format
-//   Stereo:  little endian format, left channel first
-//
-// I2S terms:
-//   "frame":  consists of two audio samples (Left audio sample + Right audio sample)
-//
-// Misc:
-// - for Mono configuration:
-//   - readinto method: samples are gathered from the L channel only
-//   - write method: every sample is output to both the L and R channels
-// - for readinto method the I2S hardware is read using 8-byte frames
-//   (this is standard for almost all I2S hardware, such as MEMS microphones)
 // - all sample data transfers use DMA
 
 #define I2S_TASK_PRIORITY        (ESP_TASK_PRIO_MIN + 1)
@@ -82,20 +51,6 @@
 // The size of 240 bytes is an engineering optimum that balances transfer performance with an acceptable use of heap space
 #define SIZEOF_TRANSFORM_BUFFER_IN_BYTES (240)
 
-#define NUM_I2S_USER_FORMATS (4)
-#define I2S_RX_FRAME_SIZE_IN_BYTES (8)
-
-typedef enum {
-    MONO,
-    STEREO
-} format_t;
-
-typedef enum {
-    BLOCKING,
-    NON_BLOCKING,
-    ASYNCIO
-} io_mode_t;
-
 typedef enum {
     I2S_TX_TRANSFER,
     I2S_RX_TRANSFER,
@@ -510,5 +465,3 @@ STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self) {
 }
 
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[I2S_NUM_AUTO]);
-
-#endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/mimxrt/machine_i2s.c b/ports/mimxrt/machine_i2s.c
index dcdebd4c7e..077c9e76fa 100644
--- a/ports/mimxrt/machine_i2s.c
+++ b/ports/mimxrt/machine_i2s.c
@@ -37,38 +37,8 @@
 #include "fsl_edma.h"
 #include "fsl_sai.h"
 
-#if MICROPY_PY_MACHINE_I2S
-// The I2S module has 3 modes of operation:
-//
-// Mode1:  Blocking
-// - readinto() and write() methods block until the supplied buffer is filled (read) or emptied (write)
-// - this is the default mode of operation
-//
-// Mode2:  Non-Blocking
-// - readinto() and write() methods return immediately
-// - buffer filling and emptying happens asynchronously to the main MicroPython task
-// - a callback function is called when the supplied buffer has been filled (read) or emptied (write)
-// - non-blocking mode is enabled when a callback is set with the irq() method
-// - the DMA callback is used to implement the asynchronous background operations
-//
-// Mode3: Asyncio
-// - implements the stream protocol
-// - asyncio mode is enabled when the ioctl() function is called
-// - the state of the internal ring buffer is used to detect that I2S samples can be read or written
-//
-// The samples contained in the app buffer supplied for the readinto() and write() methods have the following convention:
-//   Mono:  little endian format
-//   Stereo:  little endian format, left channel first
-//
-// I2S terms:
-//   "frame":  consists of two audio samples (Left audio sample + Right audio sample)
-//
-// Misc:
-// - for Mono configuration:
-//   - readinto method: samples are gathered from the L channel only
-//   - write method: every sample is output to both the L and R channels
-// - for readinto method the I2S hardware is read using 8-byte frames
-//   (this is standard for almost all I2S hardware, such as MEMS microphones)
+// Notes on this port's specific implementation of I2S:
+// - the DMA callback is used to implement the asynchronous background operations, for non-blocking mode
 // - all 3 Modes of operation are implemented using the peripheral drivers in the NXP MCUXpresso SDK
 // - all sample data transfers use DMA
 // - the DMA ping-pong buffer needs to be aligned to a cache line size of 32 bytes.  32 byte
@@ -88,8 +58,6 @@
 #define NON_BLOCKING_RATE_MULTIPLIER (4)
 #define SIZEOF_NON_BLOCKING_COPY_IN_BYTES (SIZEOF_HALF_DMA_BUFFER_IN_BYTES * NON_BLOCKING_RATE_MULTIPLIER)
 
-#define NUM_I2S_USER_FORMATS (4)
-#define I2S_RX_FRAME_SIZE_IN_BYTES (8)
 #define SAI_CHANNEL_0 (0)
 #define SAI_NUM_AUDIO_CHANNELS (2U)
 
@@ -105,17 +73,6 @@ typedef enum {
     TX,
 } i2s_mode_t;
 
-typedef enum {
-    MONO,
-    STEREO
-} format_t;
-
-typedef enum {
-    BLOCKING,
-    NON_BLOCKING,
-    ASYNCIO
-} io_mode_t;
-
 typedef enum {
     TOP_HALF,
     BOTTOM_HALF
@@ -766,5 +723,3 @@ STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self) {
 }
 
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM]);
-
-#endif // MICROPY_PY_MACHINE_I2S
diff --git a/ports/rp2/machine_i2s.c b/ports/rp2/machine_i2s.c
index 9df0f09f24..68a0f296a0 100644
--- a/ports/rp2/machine_i2s.c
+++ b/ports/rp2/machine_i2s.c
@@ -37,37 +37,8 @@
 #include "hardware/dma.h"
 #include "hardware/irq.h"
 
-// The I2S class has 3 modes of operation:
-//
-// Mode1:  Blocking
-// - readinto() and write() methods block until the supplied buffer is filled (read) or emptied (write)
-// - this is the default mode of operation
-//
-// Mode2:  Non-Blocking
-// - readinto() and write() methods return immediately
-// - buffer filling and emptying happens asynchronously to the main MicroPython task
-// - a callback function is called when the supplied buffer has been filled (read) or emptied (write)
-// - non-blocking mode is enabled when a callback is set with the irq() method
-// - the DMA IRQ handler is used to implement the asynchronous background operations
-//
-// Mode3: Asyncio
-// - implements the stream protocol
-// - asyncio mode is enabled when the ioctl() function is called
-// - the state of the internal ring buffer is used to detect that I2S samples can be read or written
-//
-// The samples contained in the app buffer supplied for the readinto() and write() methods have the following convention:
-//   Mono:  little endian format
-//   Stereo:  little endian format, left channel first
-//
-// I2S terms:
-//   "frame":  consists of two audio samples (Left audio sample + Right audio sample)
-//
-// Misc:
-// - for Mono configuration:
-//   - readinto method: samples are gathered from the L channel only
-//   - write method: every sample is output to both the L and R channels
-// - for readinto method the I2S hardware is read using 8-byte frames
-//   (this is standard for almost all I2S hardware, such as MEMS microphones)
+// Notes on this port's specific implementation of I2S:
+// - the DMA IRQ handler is used to implement the asynchronous background operations, for non-blocking mode
 // - the PIO is used to drive the I2S bus signals
 // - all sample data transfers use non-blocking DMA
 // - the DMA controller is configured with 2 DMA channels in chained mode
@@ -86,9 +57,6 @@
 #define NON_BLOCKING_RATE_MULTIPLIER (4)
 #define SIZEOF_NON_BLOCKING_COPY_IN_BYTES (SIZEOF_HALF_DMA_BUFFER_IN_BYTES * NON_BLOCKING_RATE_MULTIPLIER)
 
-#define NUM_I2S_USER_FORMATS (4)
-#define I2S_RX_FRAME_SIZE_IN_BYTES (8)
-
 #define SAMPLES_PER_FRAME (2)
 #define PIO_INSTRUCTIONS_PER_BIT (2)
 
@@ -97,17 +65,6 @@ typedef enum {
     TX
 } i2s_mode_t;
 
-typedef enum {
-    MONO,
-    STEREO
-} format_t;
-
-typedef enum {
-    BLOCKING,
-    NON_BLOCKING,
-    ASYNCIO
-} io_mode_t;
-
 typedef enum {
     GP_INPUT = 0,
     GP_OUTPUT = 1
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index 6d195432fd..dbcd9352d5 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -33,39 +33,8 @@
 #include "pin.h"
 #include "dma.h"
 
-#if MICROPY_PY_MACHINE_I2S
-
-// The I2S module has 3 modes of operation:
-//
-// Mode1:  Blocking
-// - readinto() and write() methods block until the supplied buffer is filled (read) or emptied (write)
-// - this is the default mode of operation
-//
-// Mode2:  Non-Blocking
-// - readinto() and write() methods return immediately
-// - buffer filling and emptying happens asynchronously to the main MicroPython task
-// - a callback function is called when the supplied buffer has been filled (read) or emptied (write)
-// - non-blocking mode is enabled when a callback is set with the irq() method
+// Notes on this port's specific implementation of I2S:
 // - the DMA callbacks (1/2 complete and complete) are used to implement the asynchronous background operations
-//
-// Mode3: Asyncio
-// - implements the stream protocol
-// - asyncio mode is enabled when the ioctl() function is called
-// - the state of the internal ring buffer is used to detect that I2S samples can be read or written
-//
-// The samples contained in the app buffer supplied for the readinto() and write() methods have the following convention:
-//   Mono:  little endian format
-//   Stereo:  little endian format, left channel first
-//
-// I2S terms:
-//   "frame":  consists of two audio samples (Left audio sample + Right audio sample)
-//
-// Misc:
-// - for Mono configuration:
-//   - readinto method: samples are gathered from the L channel only
-//   - write method: every sample is output to both the L and R channels
-// - for readinto method the I2S hardware is read using 8-byte frames
-//   (this is standard for almost all I2S hardware, such as MEMS microphones)
 // - all 3 Modes of operation are implemented using the HAL I2S Generic Driver
 // - all sample data transfers use DMA
 // - the DMA controller is configured in Circular mode to fulfil continuous and gapless sample flows
@@ -86,20 +55,6 @@
 #define NON_BLOCKING_RATE_MULTIPLIER (4)
 #define SIZEOF_NON_BLOCKING_COPY_IN_BYTES (SIZEOF_HALF_DMA_BUFFER_IN_BYTES * NON_BLOCKING_RATE_MULTIPLIER)
 
-#define NUM_I2S_USER_FORMATS (4)
-#define I2S_RX_FRAME_SIZE_IN_BYTES (8)
-
-typedef enum {
-    MONO,
-    STEREO
-} format_t;
-
-typedef enum {
-    BLOCKING,
-    NON_BLOCKING,
-    ASYNCIO
-} io_mode_t;
-
 typedef enum {
     TOP_HALF,
     BOTTOM_HALF
@@ -618,5 +573,3 @@ STATIC void mp_machine_i2s_irq_update(machine_i2s_obj_t *self) {
 }
 
 MP_REGISTER_ROOT_POINTER(struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_MAX_I2S]);
-
-#endif // MICROPY_PY_MACHINE_I2S

From bb4be837c3d439029c5c73928b0369ace8247525 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 23 Oct 2023 10:39:39 +1100
Subject: [PATCH 053/310] py/makeqstrdefs.py: Print a nicer error when
 preprocessing stage fails.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/makeqstrdefs.py | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/py/makeqstrdefs.py b/py/makeqstrdefs.py
index 64249f76ce..57200e069c 100644
--- a/py/makeqstrdefs.py
+++ b/py/makeqstrdefs.py
@@ -28,6 +28,10 @@ _MODE_MODULE = "module"
 _MODE_ROOT_POINTER = "root_pointer"
 
 
+class PreprocessorError(Exception):
+    pass
+
+
 def is_c_source(fname):
     return os.path.splitext(fname)[1] in [".c"]
 
@@ -57,7 +61,10 @@ def preprocess():
 
     def pp(flags):
         def run(files):
-            return subprocess.check_output(args.pp + flags + files)
+            try:
+                return subprocess.check_output(args.pp + flags + files)
+            except subprocess.CalledProcessError as er:
+                raise PreprocessorError(str(er))
 
         return run
 
@@ -208,7 +215,12 @@ if __name__ == "__main__":
         for k, v in named_args.items():
             setattr(args, k, v)
 
-        preprocess()
+        try:
+            preprocess()
+        except PreprocessorError as er:
+            print(er)
+            sys.exit(1)
+
         sys.exit(0)
 
     args.mode = sys.argv[2]

From 48e0986666c9f2059c92253f3c0f9b4184d68816 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 23 Oct 2023 10:55:15 +1100
Subject: [PATCH 054/310] nrf/boards: Automatically configure
 MICROPY_PY_MACHINE_PWM.

This commit makes it so that MICROPY_PY_MACHINE_PWM is enabled if at least
one of MICROPY_PY_MACHINE_HW_PWM and/or MICROPY_PY_MACHINE_SOFT_PWM are
enabled.  This simplifies the configuration for boards, and fixes DVK_BL652
which enabled PWM without selecting software or hardware implementations.

With this change, DVK_BL652 and EVK_NINA_B1 now enable (hardware) PWM.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h           | 1 -
 ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h | 1 -
 ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h             | 1 -
 ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h           | 1 -
 ports/nrf/boards/DVK_BL652/mpconfigboard.h                 | 2 +-
 ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h               | 1 +
 ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h               | 1 -
 ports/nrf/boards/FEATHER52/mpconfigboard.h                 | 1 -
 ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h            | 1 -
 ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h            | 1 -
 ports/nrf/boards/MICROBIT/mpconfigboard.h                  | 1 -
 ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h   | 1 -
 ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h            | 1 -
 ports/nrf/boards/PCA10000/mpconfigboard.h                  | 4 +---
 ports/nrf/boards/PCA10001/mpconfigboard.h                  | 4 +---
 ports/nrf/boards/PCA10028/mpconfigboard.h                  | 4 +---
 ports/nrf/boards/PCA10031/mpconfigboard.h                  | 4 +---
 ports/nrf/boards/PCA10040/mpconfigboard.h                  | 1 -
 ports/nrf/boards/PCA10056/mpconfigboard.h                  | 1 -
 ports/nrf/boards/PCA10059/mpconfigboard.h                  | 1 -
 ports/nrf/boards/PCA10090/mpconfigboard.h                  | 1 -
 ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h          | 1 -
 ports/nrf/mpconfigport.h                                   | 1 +
 23 files changed, 7 insertions(+), 29 deletions(-)

diff --git a/ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h b/ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h
index 46960cab83..9bf2a8d191 100644
--- a/ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h
+++ b/ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h
@@ -31,7 +31,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf9160"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_HW_PWM   (0)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
diff --git a/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h b/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
index 71349e08c4..0e6c5a44ab 100644
--- a/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
+++ b/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
@@ -14,7 +14,6 @@
 #define MICROPY_BOARD_ENTER_BOOTLOADER(nargs, args) NANO33_board_enter_bootloader()
 
 #define MICROPY_PY_MACHINE_UART         (1)
-#define MICROPY_PY_MACHINE_PWM          (1)
 #define MICROPY_PY_MACHINE_HW_PWM       (1)
 #define MICROPY_PY_MACHINE_HW_SPI       (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER    (1)
diff --git a/ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h b/ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h
index 271cef0323..a16ce1a20d 100644
--- a/ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h
+++ b/ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h
@@ -32,7 +32,6 @@
 #define MICROPY_PY_MUSIC            (1)
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h b/ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h
index 0ca3ca1612..b69f6a882e 100644
--- a/ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h
+++ b/ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h
@@ -32,7 +32,6 @@
 #define MICROPY_PY_MUSIC            (1)
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/DVK_BL652/mpconfigboard.h b/ports/nrf/boards/DVK_BL652/mpconfigboard.h
index e83e555178..5eb666c975 100644
--- a/ports/nrf/boards/DVK_BL652/mpconfigboard.h
+++ b/ports/nrf/boards/DVK_BL652/mpconfigboard.h
@@ -29,7 +29,7 @@
 #define MICROPY_PY_SYS_PLATFORM     "bl652"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
+#define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
diff --git a/ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h b/ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h
index 72aeb44928..8d3b3688f3 100644
--- a/ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h
+++ b/ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h
@@ -31,6 +31,7 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf52"
 
 #define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
diff --git a/ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h b/ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h
index d4ce93a0ac..17903e576d 100644
--- a/ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h
+++ b/ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h
@@ -46,7 +46,6 @@
 
 // Peripherals Config
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/FEATHER52/mpconfigboard.h b/ports/nrf/boards/FEATHER52/mpconfigboard.h
index cef44ca403..f653832c62 100644
--- a/ports/nrf/boards/FEATHER52/mpconfigboard.h
+++ b/ports/nrf/boards/FEATHER52/mpconfigboard.h
@@ -29,7 +29,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf52"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h b/ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h
index 63d2944f6c..85b48e1fb2 100644
--- a/ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h
+++ b/ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h
@@ -32,7 +32,6 @@
 #define MICROPY_PY_MUSIC            (1)
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h b/ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h
index 73b1c6ff74..1f47e9b06d 100644
--- a/ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h
+++ b/ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h
@@ -32,7 +32,6 @@
 #define MICROPY_PY_MUSIC            (1)
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/MICROBIT/mpconfigboard.h b/ports/nrf/boards/MICROBIT/mpconfigboard.h
index 4c6e05120d..63f45587af 100644
--- a/ports/nrf/boards/MICROBIT/mpconfigboard.h
+++ b/ports/nrf/boards/MICROBIT/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MUSIC            (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_SOFT_PWM (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h b/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h
index feafe8a143..d502c86575 100644
--- a/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h
+++ b/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h
@@ -29,7 +29,6 @@
 #define MICROPY_PY_SYS_PLATFORM      "nrf52840-MDK-USB-Dongle"
 
 #define MICROPY_PY_MACHINE_UART      (1)
-#define MICROPY_PY_MACHINE_PWM       (1)
 #define MICROPY_PY_MACHINE_HW_PWM    (1)
 #define MICROPY_PY_MACHINE_HW_SPI    (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h b/ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h
index 012a04458e..d77e104ce2 100644
--- a/ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h
+++ b/ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h
@@ -29,7 +29,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "PARTICLE-XENON"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/PCA10000/mpconfigboard.h b/ports/nrf/boards/PCA10000/mpconfigboard.h
index e56e0edf83..2f551612ea 100644
--- a/ports/nrf/boards/PCA10000/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10000/mpconfigboard.h
@@ -29,15 +29,13 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf51-dongle"
 
 #define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_SOFT_PWM (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (0)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (0)
 #define MICROPY_PY_MACHINE_ADC      (0)
 #define MICROPY_PY_MACHINE_TEMP     (1)
 
-#define MICROPY_PY_MACHINE_PWM      (1)
-#define MICROPY_PY_MACHINE_SOFT_PWM (1)
-
 #define MICROPY_HW_ENABLE_RNG       (1)
 
 #define MICROPY_HW_HAS_LED          (1)
diff --git a/ports/nrf/boards/PCA10001/mpconfigboard.h b/ports/nrf/boards/PCA10001/mpconfigboard.h
index a2e8455398..2120ee0a88 100644
--- a/ports/nrf/boards/PCA10001/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10001/mpconfigboard.h
@@ -29,15 +29,13 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf51-DK"
 
 #define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_SOFT_PWM (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (0)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_TEMP     (1)
 
-#define MICROPY_PY_MACHINE_PWM      (1)
-#define MICROPY_PY_MACHINE_SOFT_PWM (1)
-
 #define MICROPY_HW_ENABLE_RNG       (1)
 
 #define MICROPY_HW_HAS_LED          (1)
diff --git a/ports/nrf/boards/PCA10028/mpconfigboard.h b/ports/nrf/boards/PCA10028/mpconfigboard.h
index 7abb5845e3..f8e3541f37 100644
--- a/ports/nrf/boards/PCA10028/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10028/mpconfigboard.h
@@ -29,15 +29,13 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf51-DK"
 
 #define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_SOFT_PWM (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_TEMP     (1)
 
-#define MICROPY_PY_MACHINE_PWM      (1)
-#define MICROPY_PY_MACHINE_SOFT_PWM (1)
-
 #define MICROPY_HW_ENABLE_RNG       (1)
 
 #define MICROPY_HW_HAS_LED          (1)
diff --git a/ports/nrf/boards/PCA10031/mpconfigboard.h b/ports/nrf/boards/PCA10031/mpconfigboard.h
index f162366233..b618f61b50 100644
--- a/ports/nrf/boards/PCA10031/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10031/mpconfigboard.h
@@ -29,15 +29,13 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf51-dongle"
 
 #define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_SOFT_PWM (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_TEMP     (1)
 
-#define MICROPY_PY_MACHINE_PWM      (1)
-#define MICROPY_PY_MACHINE_SOFT_PWM (1)
-
 #define MICROPY_HW_ENABLE_RNG       (1)
 
 #define MICROPY_HW_HAS_LED          (1)
diff --git a/ports/nrf/boards/PCA10040/mpconfigboard.h b/ports/nrf/boards/PCA10040/mpconfigboard.h
index 00a56c2ea2..7202f6a0b1 100644
--- a/ports/nrf/boards/PCA10040/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10040/mpconfigboard.h
@@ -29,7 +29,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf52-DK"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/PCA10056/mpconfigboard.h b/ports/nrf/boards/PCA10056/mpconfigboard.h
index fa39764a7e..f7daf48a62 100644
--- a/ports/nrf/boards/PCA10056/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10056/mpconfigboard.h
@@ -29,7 +29,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf52840-PDK"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/PCA10059/mpconfigboard.h b/ports/nrf/boards/PCA10059/mpconfigboard.h
index 904a0871e4..f4c78915c6 100644
--- a/ports/nrf/boards/PCA10059/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10059/mpconfigboard.h
@@ -29,7 +29,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf52840-Dongle"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/PCA10090/mpconfigboard.h b/ports/nrf/boards/PCA10090/mpconfigboard.h
index 95cf8d6544..f58ac8989b 100644
--- a/ports/nrf/boards/PCA10090/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10090/mpconfigboard.h
@@ -31,7 +31,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf9160-DK"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_HW_PWM   (0)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_TIMER_NRF (0)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h b/ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h
index 18fbe327d0..1a2d14f1d4 100644
--- a/ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h
+++ b/ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h
@@ -34,7 +34,6 @@
 
 #define MICROPY_HW_USB_CDC          (1)
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 3a311fe5d9..5a956311e2 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -196,6 +196,7 @@
 #define MICROPY_PY_MACHINE_SOFT_PWM (0)
 #endif
 
+#define MICROPY_PY_MACHINE_PWM      (MICROPY_PY_MACHINE_HW_PWM || MICROPY_PY_MACHINE_SOFT_PWM)
 #define MICROPY_PY_MACHINE_PWM_DUTY (1)
 
 #if MICROPY_PY_MACHINE_HW_PWM

From 95d8b5fd555ba26ebd79b29fade45d2bf0abc6c4 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 11 Oct 2023 13:48:49 +1100
Subject: [PATCH 055/310] extmod/machine_adc: Factor ports' ADC Python bindings
 to common code.

No functional change, just code factoring to have the Python bindings in
one location, and all the ports use those same bindings.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/extmod.cmake                    |   1 +
 extmod/extmod.mk                       |   1 +
 extmod/machine_adc.c                   | 183 +++++++++++++++++++++++++
 extmod/modmachine.h                    |  38 +++++
 ports/esp32/esp32_common.cmake         |   1 -
 ports/esp32/machine_adc.c              | 146 ++++++++------------
 ports/esp32/machine_adc.h              |   8 +-
 ports/esp32/machine_adcblock.c         |   2 +-
 ports/esp32/modmachine.c               |   2 +
 ports/esp32/modmachine.h               |   1 -
 ports/esp32/mpconfigport.h             |   7 +
 ports/esp8266/Makefile                 |   1 -
 ports/esp8266/machine_adc.c            |  43 ++----
 ports/esp8266/modmachine.c             |   2 +
 ports/esp8266/modmachine.h             |   1 -
 ports/esp8266/mpconfigport.h           |   3 +
 ports/mimxrt/Makefile                  |   1 -
 ports/mimxrt/machine_adc.c             |  45 ++----
 ports/mimxrt/modmachine.c              |   2 +
 ports/mimxrt/modmachine.h              |   1 -
 ports/mimxrt/mpconfigport.h            |   2 +
 ports/nrf/Makefile                     |   1 -
 ports/nrf/modules/machine/adc.c        |  55 ++------
 ports/nrf/modules/machine/adc.h        |   2 -
 ports/nrf/modules/machine/modmachine.c |   3 -
 ports/nrf/mpconfigport.h               |   1 +
 ports/renesas-ra/Makefile              |   1 -
 ports/renesas-ra/machine_adc.c         |  55 +++-----
 ports/renesas-ra/modmachine.c          |   2 +
 ports/renesas-ra/modmachine.h          |   1 -
 ports/renesas-ra/mpconfigport.h        |   3 +
 ports/rp2/CMakeLists.txt               |   1 -
 ports/rp2/machine_adc.c                |  35 ++---
 ports/rp2/modmachine.c                 |   2 +
 ports/rp2/modmachine.h                 |   1 -
 ports/rp2/mpconfigport.h               |   2 +
 ports/samd/Makefile                    |   1 -
 ports/samd/machine_adc.c               |  48 ++-----
 ports/samd/modmachine.h                |   3 -
 ports/samd/mpconfigport.h              |   2 +
 ports/stm32/Makefile                   |   1 -
 ports/stm32/machine_adc.c              |  59 ++++----
 ports/stm32/mboot/Makefile             |   2 +-
 ports/stm32/mboot/adc.c                |   3 +
 ports/stm32/modmachine.c               |   2 +
 ports/stm32/modmachine.h               |   1 -
 ports/stm32/mpconfigport.h             |   2 +
 47 files changed, 434 insertions(+), 346 deletions(-)
 create mode 100644 extmod/machine_adc.c
 create mode 100644 ports/stm32/mboot/adc.c

diff --git a/extmod/extmod.cmake b/extmod/extmod.cmake
index ccb6f0465b..6f01bafe46 100644
--- a/extmod/extmod.cmake
+++ b/extmod/extmod.cmake
@@ -7,6 +7,7 @@ set(MICROPY_SOURCE_EXTMOD
     ${MICROPY_DIR}/shared/libc/abort_.c
     ${MICROPY_DIR}/shared/libc/printf.c
     ${MICROPY_EXTMOD_DIR}/btstack/modbluetooth_btstack.c
+    ${MICROPY_EXTMOD_DIR}/machine_adc.c
     ${MICROPY_EXTMOD_DIR}/machine_bitstream.c
     ${MICROPY_EXTMOD_DIR}/machine_i2c.c
     ${MICROPY_EXTMOD_DIR}/machine_i2s.c
diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index 44b41f5ffb..76dfbf0a45 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -2,6 +2,7 @@
 # and provides rules to build 3rd-party components for extmod modules.
 
 SRC_EXTMOD_C += \
+	extmod/machine_adc.c \
 	extmod/machine_bitstream.c \
 	extmod/machine_i2c.c \
 	extmod/machine_i2s.c \
diff --git a/extmod/machine_adc.c b/extmod/machine_adc.c
new file mode 100644
index 0000000000..9849163de8
--- /dev/null
+++ b/extmod/machine_adc.c
@@ -0,0 +1,183 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+
+#if MICROPY_PY_MACHINE_ADC
+
+#include "extmod/modmachine.h"
+
+// The port must provide implementations of these low-level ADC functions.
+
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind);
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args);
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self);
+
+#if MICROPY_PY_MACHINE_ADC_INIT
+STATIC void mp_machine_adc_init_helper(machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_DEINIT
+STATIC void mp_machine_adc_deinit(machine_adc_obj_t *self);
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_BLOCK
+STATIC mp_obj_t mp_machine_adc_block(machine_adc_obj_t *self);
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_READ_UV
+STATIC mp_int_t mp_machine_adc_read_uv(machine_adc_obj_t *self);
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH
+STATIC void mp_machine_adc_atten_set(machine_adc_obj_t *self, mp_int_t atten);
+STATIC void mp_machine_adc_width_set(machine_adc_obj_t *self, mp_int_t width);
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_READ
+STATIC mp_int_t mp_machine_adc_read(machine_adc_obj_t *self);
+#endif
+
+// The port provides implementations of the above in this file.
+#include MICROPY_PY_MACHINE_ADC_INCLUDEFILE
+
+#if MICROPY_PY_MACHINE_ADC_INIT
+// ADC.init(...)
+STATIC mp_obj_t machine_adc_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+    mp_machine_adc_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_adc_init_obj, 1, machine_adc_init);
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_DEINIT
+// ADC.deinit()
+STATIC mp_obj_t machine_adc_deinit(mp_obj_t self_in) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_machine_adc_deinit(self);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_deinit_obj, machine_adc_deinit);
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_BLOCK
+// ADC.block()
+STATIC mp_obj_t machine_adc_block(mp_obj_t self_in) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    return mp_machine_adc_block(self);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_block_obj, machine_adc_block);
+#endif
+
+// ADC.read_u16()
+STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    return MP_OBJ_NEW_SMALL_INT(mp_machine_adc_read_u16(self));
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
+
+#if MICROPY_PY_MACHINE_ADC_READ_UV
+// ADC.read_uv()
+STATIC mp_obj_t machine_adc_read_uv(mp_obj_t self_in) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    return MP_OBJ_NEW_SMALL_INT(mp_machine_adc_read_uv(self));
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_uv_obj, machine_adc_read_uv);
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH
+
+// ADC.atten(value) -- this is a legacy method.
+STATIC mp_obj_t machine_adc_atten(mp_obj_t self_in, mp_obj_t atten_in) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_int_t atten = mp_obj_get_int(atten_in);
+    mp_machine_adc_atten_set(self, atten);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_adc_atten_obj, machine_adc_atten);
+
+// ADC.width(value) -- this is a legacy method.
+STATIC mp_obj_t machine_adc_width(mp_obj_t self_in, mp_obj_t width_in) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_int_t width = mp_obj_get_int(width_in);
+    mp_machine_adc_width_set(self, width);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_adc_width_obj, machine_adc_width);
+
+#endif
+
+#if MICROPY_PY_MACHINE_ADC_READ
+// ADC.read() -- this is a legacy method.
+STATIC mp_obj_t machine_adc_read(mp_obj_t self_in) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    return MP_OBJ_NEW_SMALL_INT(mp_machine_adc_read(self));
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_obj, machine_adc_read);
+#endif
+
+STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = {
+    #if MICROPY_PY_MACHINE_ADC_INIT
+    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_adc_init_obj) },
+    #endif
+    #if MICROPY_PY_MACHINE_ADC_DEINIT
+    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_adc_deinit_obj) },
+    #endif
+    #if MICROPY_PY_MACHINE_ADC_BLOCK
+    { MP_ROM_QSTR(MP_QSTR_block), MP_ROM_PTR(&machine_adc_block_obj) },
+    #endif
+
+    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
+    #if MICROPY_PY_MACHINE_ADC_READ_UV
+    { MP_ROM_QSTR(MP_QSTR_read_uv), MP_ROM_PTR(&machine_adc_read_uv_obj) },
+    #endif
+
+    // Legacy methods.
+    #if MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH
+    { MP_ROM_QSTR(MP_QSTR_atten), MP_ROM_PTR(&machine_adc_atten_obj) },
+    { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&machine_adc_width_obj) },
+    #endif
+    #if MICROPY_PY_MACHINE_ADC_READ
+    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&machine_adc_read_obj) },
+    #endif
+
+    // A port must add ADC class constants defining the following macro.
+    // It can be defined to nothing if there are no constants.
+    MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS
+};
+STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table);
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_adc_type,
+    MP_QSTR_ADC,
+    MP_TYPE_FLAG_NONE,
+    make_new, mp_machine_adc_make_new,
+    print, mp_machine_adc_print,
+    locals_dict, &machine_adc_locals_dict
+    );
+
+#endif // MICROPY_PY_MACHINE_ADC
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index b0235dcf64..e635eedaae 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -29,7 +29,44 @@
 
 #include "py/obj.h"
 
+// Whether to enable the ADC.init() method.
+// Requires a port to implement mp_machine_adc_init_helper().
+#ifndef MICROPY_PY_MACHINE_ADC_INIT
+#define MICROPY_PY_MACHINE_ADC_INIT (0)
+#endif
+
+// Whether to enable the ADC.deinit() method.
+// Requires a port to implement mp_machine_adc_deinit().
+#ifndef MICROPY_PY_MACHINE_ADC_DEINIT
+#define MICROPY_PY_MACHINE_ADC_DEINIT (0)
+#endif
+
+// Whether to enable the ADC.block() method.
+// Requires a port to implement mp_machine_adc_block().
+#ifndef MICROPY_PY_MACHINE_ADC_BLOCK
+#define MICROPY_PY_MACHINE_ADC_BLOCK (0)
+#endif
+
+// Whether to enable the ADC.read_uv() method.
+// Requires a port to implement mp_machine_adc_read_uv().
+#ifndef MICROPY_PY_MACHINE_ADC_READ_UV
+#define MICROPY_PY_MACHINE_ADC_READ_UV (0)
+#endif
+
+// Whether to enable the ADC.atten() and ADC.width() methods.
+// Note: these are legacy and should not be used on new ports.
+#ifndef MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH
+#define MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH (0)
+#endif
+
+// Whether to enable the ADC.read() method.
+// Note: this is legacy and should not be used on new ports.
+#ifndef MICROPY_PY_MACHINE_ADC_READ
+#define MICROPY_PY_MACHINE_ADC_READ (0)
+#endif
+
 // A port must provide these types, but they are otherwise opaque.
+typedef struct _machine_adc_obj_t machine_adc_obj_t;
 typedef struct _machine_i2s_obj_t machine_i2s_obj_t;
 typedef struct _machine_pwm_obj_t machine_pwm_obj_t;
 typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
@@ -37,6 +74,7 @@ typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
 // These classes correspond to machine.Type entries in the machine module.
 // Their Python bindings are implemented in extmod, and their implementation
 // is provided by a port.
+extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_pwm_type;
diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index 2c82c1f10f..4c90282c9f 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -66,7 +66,6 @@ list(APPEND MICROPY_SOURCE_PORT
     machine_timer.c
     machine_pin.c
     machine_touchpad.c
-    machine_adc.c
     machine_adcblock.c
     machine_dac.c
     machine_i2c.c
diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c
index 1e20186b97..42746cb4bd 100644
--- a/ports/esp32/machine_adc.c
+++ b/ports/esp32/machine_adc.c
@@ -25,22 +25,53 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
 
 #include "esp_log.h"
 
 #include "driver/gpio.h"
 #include "driver/adc.h"
 
-#include "py/runtime.h"
 #include "py/mphal.h"
-#include "modmachine.h"
 #include "machine_adc.h"
 
 #define ADCBLOCK1 (&madcblock_obj[0])
 #define ADCBLOCK2 (&madcblock_obj[1])
 
-STATIC const madc_obj_t madc_obj[] = {
+#if CONFIG_IDF_TARGET_ESP32
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_9_10_11 \
+    { MP_ROM_QSTR(MP_QSTR_WIDTH_9BIT), MP_ROM_INT(9) }, \
+    { MP_ROM_QSTR(MP_QSTR_WIDTH_10BIT), MP_ROM_INT(10) }, \
+    { MP_ROM_QSTR(MP_QSTR_WIDTH_11BIT), MP_ROM_INT(11) },
+#else
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_9_10_11
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_12 \
+    { MP_ROM_QSTR(MP_QSTR_WIDTH_12BIT), MP_ROM_INT(12) },
+#else
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_12
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_13 \
+    { MP_ROM_QSTR(MP_QSTR_WIDTH_13BIT), MP_ROM_INT(13) },
+#else
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_13
+#endif
+
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_ATTN_0DB), MP_ROM_INT(ADC_ATTEN_DB_0) }, \
+    { MP_ROM_QSTR(MP_QSTR_ATTN_2_5DB), MP_ROM_INT(ADC_ATTEN_DB_2_5) }, \
+    { MP_ROM_QSTR(MP_QSTR_ATTN_6DB), MP_ROM_INT(ADC_ATTEN_DB_6) }, \
+    { MP_ROM_QSTR(MP_QSTR_ATTN_11DB), MP_ROM_INT(ADC_ATTEN_DB_11) }, \
+    MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_9_10_11 \
+    MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_12 \
+    MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_13 \
+
+STATIC const machine_adc_obj_t madc_obj[] = {
     #if CONFIG_IDF_TARGET_ESP32
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_0, GPIO_NUM_36},
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_1, GPIO_NUM_37},
@@ -96,18 +127,18 @@ STATIC const madc_obj_t madc_obj[] = {
 // can be distinguished from the initialised state.
 STATIC uint8_t madc_obj_atten[MP_ARRAY_SIZE(madc_obj)];
 
-static inline adc_atten_t madc_atten_get(const madc_obj_t *self) {
+static inline adc_atten_t madc_atten_get(const machine_adc_obj_t *self) {
     uint8_t value = madc_obj_atten[self - &madc_obj[0]];
     return value == 0 ? ADC_ATTEN_MAX : value - 1;
 }
 
-static inline void madc_atten_set(const madc_obj_t *self, adc_atten_t atten) {
+static inline void madc_atten_set(const machine_adc_obj_t *self, adc_atten_t atten) {
     madc_obj_atten[self - &madc_obj[0]] = atten + 1;
 }
 
-const madc_obj_t *madc_search_helper(madcblock_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id) {
+const machine_adc_obj_t *madc_search_helper(madcblock_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id) {
     for (int i = 0; i < MP_ARRAY_SIZE(madc_obj); i++) {
-        const madc_obj_t *adc = &madc_obj[i];
+        const machine_adc_obj_t *adc = &madc_obj[i];
         if ((block == NULL || block == adc->block) && (channel_id == -1 || channel_id == adc->channel_id) && (gpio_id == -1 || gpio_id == adc->gpio_id)) {
             return adc;
         }
@@ -115,12 +146,12 @@ const madc_obj_t *madc_search_helper(madcblock_obj_t *block, adc_channel_t chann
     return NULL;
 }
 
-STATIC void madc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    const madc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    const machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "ADC(Pin(%u), atten=%u)", self->gpio_id, madc_atten_get(self));
 }
 
-STATIC void madc_atten_helper(const madc_obj_t *self, mp_int_t atten) {
+STATIC void madc_atten_helper(const machine_adc_obj_t *self, mp_int_t atten) {
     esp_err_t err;
     if (self->block->unit_id == ADC_UNIT_1) {
         err = adc1_config_channel_atten(self->channel_id, atten);
@@ -133,7 +164,7 @@ STATIC void madc_atten_helper(const madc_obj_t *self, mp_int_t atten) {
     madc_atten_set(self, atten);
 }
 
-void madc_init_helper(const madc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+void madc_init_helper(const machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum {
         ARG_atten,
     };
@@ -153,10 +184,14 @@ void madc_init_helper(const madc_obj_t *self, size_t n_pos_args, const mp_obj_t
     }
 }
 
-STATIC mp_obj_t madc_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
+STATIC void mp_machine_adc_init_helper(machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    madc_init_helper(self, n_pos_args, pos_args, kw_args);
+}
+
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
     mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
     gpio_num_t gpio_id = machine_pin_get_id(args[0]);
-    const madc_obj_t *self = madc_search_helper(NULL, -1, gpio_id);
+    const machine_adc_obj_t *self = madc_search_helper(NULL, -1, gpio_id);
     if (!self) {
         mp_raise_ValueError(MP_ERROR_TEXT("invalid pin"));
     }
@@ -172,95 +207,32 @@ STATIC mp_obj_t madc_make_new(const mp_obj_type_t *type, size_t n_pos_args, size
     return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC mp_obj_t madc_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    const madc_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
-    madc_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(madc_init_obj, 1, madc_init);
-
-STATIC mp_obj_t madc_block(mp_obj_t self_in) {
-    const madc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_obj_t mp_machine_adc_block(machine_adc_obj_t *self) {
     return MP_OBJ_FROM_PTR(self->block);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(madc_block_obj, madc_block);
 
-STATIC mp_obj_t madc_read(mp_obj_t self_in) {
-    const madc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_adc_read(machine_adc_obj_t *self) {
     mp_int_t raw = madcblock_read_helper(self->block, self->channel_id);
-    return MP_OBJ_NEW_SMALL_INT(raw);
+    return raw;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(madc_read_obj, madc_read);
 
-STATIC mp_obj_t madc_read_u16(mp_obj_t self_in) {
-    const madc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     mp_uint_t raw = madcblock_read_helper(self->block, self->channel_id);
     // Scale raw reading to 16 bit value using a Taylor expansion (for 8 <= bits <= 16)
     mp_int_t bits = self->block->bits;
     mp_uint_t u16 = raw << (16 - bits) | raw >> (2 * bits - 16);
-    return MP_OBJ_NEW_SMALL_INT(u16);
+    return u16;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(madc_read_u16_obj, madc_read_u16);
 
-STATIC mp_obj_t madc_read_uv(mp_obj_t self_in) {
-    const madc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_adc_read_uv(machine_adc_obj_t *self) {
     adc_atten_t atten = madc_atten_get(self);
-    return MP_OBJ_NEW_SMALL_INT(madcblock_read_uv_helper(self->block, self->channel_id, atten));
+    return madcblock_read_uv_helper(self->block, self->channel_id, atten);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(madc_read_uv_obj, madc_read_uv);
 
-STATIC mp_obj_t madc_atten(mp_obj_t self_in, mp_obj_t atten_in) {
-    const madc_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_int_t atten = mp_obj_get_int(atten_in);
+STATIC void mp_machine_adc_atten_set(machine_adc_obj_t *self, mp_int_t atten) {
     madc_atten_helper(self, atten);
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_2(madc_atten_obj, madc_atten);
 
-STATIC mp_obj_t madc_width(mp_obj_t self_in, mp_obj_t bits_in) {
-    const madc_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_int_t bits = mp_obj_get_int(bits_in);
-    madcblock_bits_helper(self->block, bits);
-    return mp_const_none;
+STATIC void mp_machine_adc_width_set(machine_adc_obj_t *self, mp_int_t width) {
+    madcblock_bits_helper(self->block, width);
 }
-MP_DEFINE_CONST_FUN_OBJ_2(madc_width_obj, madc_width);
-
-STATIC const mp_rom_map_elem_t madc_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&madc_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_block), MP_ROM_PTR(&madc_block_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&madc_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&madc_read_u16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read_uv), MP_ROM_PTR(&madc_read_uv_obj) },
-
-    // Legacy API methods:
-    { MP_ROM_QSTR(MP_QSTR_atten), MP_ROM_PTR(&madc_atten_obj) },
-    { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&madc_width_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_ATTN_0DB), MP_ROM_INT(ADC_ATTEN_DB_0) },
-    { MP_ROM_QSTR(MP_QSTR_ATTN_2_5DB), MP_ROM_INT(ADC_ATTEN_DB_2_5) },
-    { MP_ROM_QSTR(MP_QSTR_ATTN_6DB), MP_ROM_INT(ADC_ATTEN_DB_6) },
-    { MP_ROM_QSTR(MP_QSTR_ATTN_11DB), MP_ROM_INT(ADC_ATTEN_DB_11) },
-
-    #if CONFIG_IDF_TARGET_ESP32
-    { MP_ROM_QSTR(MP_QSTR_WIDTH_9BIT), MP_ROM_INT(9) },
-    { MP_ROM_QSTR(MP_QSTR_WIDTH_10BIT), MP_ROM_INT(10) },
-    { MP_ROM_QSTR(MP_QSTR_WIDTH_11BIT), MP_ROM_INT(11) },
-    #endif
-    #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
-    { MP_ROM_QSTR(MP_QSTR_WIDTH_12BIT), MP_ROM_INT(12) },
-    #endif
-    #if CONFIG_IDF_TARGET_ESP32S2
-    { MP_ROM_QSTR(MP_QSTR_WIDTH_13BIT), MP_ROM_INT(13) },
-    #endif
-
-};
-STATIC MP_DEFINE_CONST_DICT(madc_locals_dict, madc_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adc_type,
-    MP_QSTR_ADC,
-    MP_TYPE_FLAG_NONE,
-    make_new, madc_make_new,
-    print, madc_print,
-    locals_dict, &madc_locals_dict
-    );
diff --git a/ports/esp32/machine_adc.h b/ports/esp32/machine_adc.h
index 0f229a2c5c..6d06486c30 100644
--- a/ports/esp32/machine_adc.h
+++ b/ports/esp32/machine_adc.h
@@ -3,14 +3,14 @@
 
 #include "machine_adcblock.h"
 
-typedef struct _madc_obj_t {
+typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
     madcblock_obj_t *block;
     adc_channel_t channel_id;
     gpio_num_t gpio_id;
-} madc_obj_t;
+} machine_adc_obj_t;
 
-extern const madc_obj_t *madc_search_helper(madcblock_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id);
-extern void madc_init_helper(const madc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+const machine_adc_obj_t *madc_search_helper(madcblock_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id);
+void madc_init_helper(const machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
 
 #endif // MICROPY_INCLUDED_MACHINE_ADC_H
diff --git a/ports/esp32/machine_adcblock.c b/ports/esp32/machine_adcblock.c
index afe8fdea40..8d5296e2e5 100644
--- a/ports/esp32/machine_adcblock.c
+++ b/ports/esp32/machine_adcblock.c
@@ -157,7 +157,7 @@ STATIC mp_obj_t madcblock_connect(size_t n_pos_args, const mp_obj_t *pos_args, m
         mp_raise_TypeError(MP_ERROR_TEXT("too many positional args"));
     }
 
-    const madc_obj_t *adc = madc_search_helper(self, channel_id, gpio_id);
+    const machine_adc_obj_t *adc = madc_search_helper(self, channel_id, gpio_id);
     if (adc != NULL) {
         madc_init_helper(adc, 0, pos_args + n_pos_args, kw_args);
         return MP_OBJ_FROM_PTR(adc);
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index fe6d18e786..b1c9011cb6 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -312,7 +312,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
     { MP_ROM_QSTR(MP_QSTR_TouchPad), MP_ROM_PTR(&machine_touchpad_type) },
     #endif
+    #if MICROPY_PY_MACHINE_ADC
     { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_ADCBlock), MP_ROM_PTR(&machine_adcblock_type) },
     #if MICROPY_PY_MACHINE_DAC
     { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&machine_dac_type) },
diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h
index abf029c473..68b7d4ffd5 100644
--- a/ports/esp32/modmachine.h
+++ b/ports/esp32/modmachine.h
@@ -12,7 +12,6 @@ typedef enum {
 extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_touchpad_type;
-extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_adcblock_type;
 extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_i2c_type;
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 8b59dc1225..1718f31f6c 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -96,6 +96,13 @@
 #define MICROPY_PY_OS_UNAME                 (1)
 #define MICROPY_PY_OS_URANDOM               (1)
 #define MICROPY_PY_MACHINE                  (1)
+#define MICROPY_PY_MACHINE_ADC              (1)
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/esp32/machine_adc.c"
+#define MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH  (1)
+#define MICROPY_PY_MACHINE_ADC_BLOCK        (1)
+#define MICROPY_PY_MACHINE_ADC_INIT         (1)
+#define MICROPY_PY_MACHINE_ADC_READ         (1)
+#define MICROPY_PY_MACHINE_ADC_READ_UV      (1)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM        (1)
 #define MICROPY_PY_MACHINE_PULSE            (1)
diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index 5982987d7b..0485f9bc05 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -114,7 +114,6 @@ SRC_C = \
 	machine_bitstream.c \
 	machine_pin.c \
 	machine_rtc.c \
-	machine_adc.c \
 	machine_uart.c \
 	machine_hspi.c \
 	modesp.c \
diff --git a/ports/esp8266/machine_adc.c b/ports/esp8266/machine_adc.c
index f4fd32db9c..83384eea97 100644
--- a/ports/esp8266/machine_adc.c
+++ b/ports/esp8266/machine_adc.c
@@ -24,20 +24,19 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
 
-#include "py/runtime.h"
-#include "py/mphal.h"
 #include "user_interface.h"
 
+// The ADC class doesn't have any constants for this port.
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS
+
 typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
     bool isvdd;
 } machine_adc_obj_t;
 
-extern const mp_obj_type_t machine_adc_type;
-
 STATIC machine_adc_obj_t machine_adc_vdd3 = {{&machine_adc_type}, true};
 STATIC machine_adc_obj_t machine_adc_adc = {{&machine_adc_type}, false};
 
@@ -48,12 +47,13 @@ STATIC uint16_t adc_read(machine_adc_obj_t *self) {
         return system_adc_read();
     }
 }
-void machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "ADC(%u)", self->isvdd);
 }
 
-mp_obj_t machine_adc_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 1, 1, false);
 
     mp_int_t chn = mp_obj_get_int(args[0]);
@@ -69,31 +69,12 @@ mp_obj_t machine_adc_make_new(const mp_obj_type_t *type_in, size_t n_args, size_
 }
 
 // read_u16()
-STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     uint32_t value = adc_read(self);
-    return MP_OBJ_NEW_SMALL_INT(value * 65535 / 1024);
+    return value * 65535 / 1024;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
 
 // Legacy method
-STATIC mp_obj_t machine_adc_read(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return mp_obj_new_int(adc_read(self));
+STATIC mp_int_t mp_machine_adc_read(machine_adc_obj_t *self) {
+    return adc_read(self);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_obj, machine_adc_read);
-
-STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&machine_adc_read_obj) }
-};
-STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adc_type,
-    MP_QSTR_ADC,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_adc_make_new,
-    print, machine_adc_print,
-    locals_dict, &machine_adc_locals_dict
-    );
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index 95048952c4..43e94e0c8a 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -427,7 +427,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pyb_pin_type) },
     { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
     { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) },
+    #if MICROPY_PY_MACHINE_ADC
     { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) },
     #if MICROPY_PY_MACHINE_I2C
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
diff --git a/ports/esp8266/modmachine.h b/ports/esp8266/modmachine.h
index 9b7a5e3cb2..469d25e81d 100644
--- a/ports/esp8266/modmachine.h
+++ b/ports/esp8266/modmachine.h
@@ -4,7 +4,6 @@
 #include "py/obj.h"
 
 extern const mp_obj_type_t pyb_pin_type;
-extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t pyb_rtc_type;
 extern const mp_obj_type_t pyb_uart_type;
 extern const mp_obj_type_t pyb_i2c_type;
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index 2a51f8bcbb..4e3248513e 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -61,6 +61,9 @@
 #define MICROPY_PY_LWIP             (1)
 #define MICROPY_PY_LWIP_SOCK_RAW    (1)
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/esp8266/machine_adc.c"
+#define MICROPY_PY_MACHINE_ADC_READ (1)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM (1)
 #define MICROPY_PY_MACHINE_PULSE    (1)
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index 2f4b13ad92..b631c829bf 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -195,7 +195,6 @@ SRC_C += \
 	hal/pwm_backport.c \
 	help.c \
 	led.c \
-	machine_adc.c \
 	machine_bitstream.c \
 	machine_i2c.c \
 	machine_led.c \
diff --git a/ports/mimxrt/machine_adc.c b/ports/mimxrt/machine_adc.c
index 36e5fafc98..0be5f9a7d2 100644
--- a/ports/mimxrt/machine_adc.c
+++ b/ports/mimxrt/machine_adc.c
@@ -24,9 +24,9 @@
  * THE SOFTWARE.
  */
 
-#include <stdint.h>
-#include "py/obj.h"
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
+
 #include "py/mphal.h"
 
 #if defined(MIMXRT117x_SERIES)
@@ -38,7 +38,8 @@
 #include "fsl_gpio.h"
 #include "fsl_iomuxc.h"
 
-#include "modmachine.h"
+// The ADC class doesn't have any constants for this port.
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS
 
 typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
@@ -50,9 +51,9 @@ typedef struct _machine_adc_obj_t {
 
 STATIC ADC_Type *const adc_bases[] = ADC_BASE_PTRS;
 
-STATIC void adc_obj_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) {
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     (void)kind;
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(o);
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
     // Get ADC adc id
     for (int i = 1; i < sizeof(adc_bases) / sizeof(ADC_Type *); ++i) {
@@ -63,11 +64,11 @@ STATIC void adc_obj_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t k
     }
 }
 
-STATIC mp_obj_t adc_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     mp_arg_check_num(n_args, n_kw, 1, 1, false);
 
     // Unpack and check parameter
-    const machine_pin_obj_t *pin = pin_find(args[0]);
+    const machine_pin_obj_t *pin = pin_find(all_args[0]);
 
     if (pin->adc_list_len == 0) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Pin(%q) does not have ADC capabilities"), pin->name);
@@ -98,8 +99,7 @@ STATIC mp_obj_t adc_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_
 
 // read_u16()
 #if defined(MIMXRT117x_SERIES)
-STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     lpadc_conv_command_config_t adc_config;
     lpadc_conv_trigger_config_t trigger_config;
 
@@ -120,9 +120,8 @@ STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
     while (!LPADC_GetConvResult(self->adc, &result_struct)) {
     }
 
-    return MP_OBJ_NEW_SMALL_INT(result_struct.convValue * 2);
+    return result_struct.convValue * 2;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
 
 void machine_adc_init(void) {
     lpadc_config_t adc_config;        // Set ADC configuration
@@ -134,9 +133,7 @@ void machine_adc_init(void) {
 
 #else
 
-STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     // Initiate conversion
     adc_channel_config_t channel_config = {
         .channelNumber = self->channel,
@@ -151,9 +148,8 @@ STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
 
     // Measure input voltage
     uint32_t value = ADC_GetChannelConversionValue(self->adc, (uint32_t)self->channel_group);
-    return MP_OBJ_NEW_SMALL_INT(value * 65535 / self->resolution);
+    return value * 65535 / self->resolution;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
 
 void machine_adc_init(void) {
     for (int i = 1; i < sizeof(adc_bases) / sizeof(ADC_Type *); ++i) {
@@ -173,18 +169,3 @@ void machine_adc_init(void) {
     }
 }
 #endif
-
-STATIC const mp_rom_map_elem_t adc_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(adc_locals_dict, adc_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adc_type,
-    MP_QSTR_ADC,
-    MP_TYPE_FLAG_NONE,
-    make_new, adc_obj_make_new,
-    print, adc_obj_print,
-    locals_dict, &adc_locals_dict
-    );
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index c2f3559cf8..33394e62dd 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -189,7 +189,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_LED),                 MP_ROM_PTR(&machine_led_type) },
     #endif
     { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) },
+    #if MICROPY_PY_MACHINE_ADC
     { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) },
     #if MICROPY_PY_MACHINE_SDCARD
diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h
index fed75fdd54..ff8ac0f085 100644
--- a/ports/mimxrt/modmachine.h
+++ b/ports/mimxrt/modmachine.h
@@ -29,7 +29,6 @@
 
 #include "py/obj.h"
 
-extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index 492686843a..9df6397a87 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -78,6 +78,8 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_OS_URANDOM               (1)
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC    (trng_random_u32())
 #define MICROPY_PY_MACHINE                  (1)
+#define MICROPY_PY_MACHINE_ADC              (1)
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/mimxrt/machine_adc.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM        (1)
 #define MICROPY_PY_MACHINE_PULSE            (1)
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index 284b82281b..b5d8325773 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -324,7 +324,6 @@ DRIVERS_SRC_C += $(addprefix modules/,\
 	machine/uart.c \
 	machine/spi.c \
 	machine/i2c.c \
-	machine/adc.c \
 	machine/pin.c \
 	machine/timer.c \
 	machine/rtcounter.c \
diff --git a/ports/nrf/modules/machine/adc.c b/ports/nrf/modules/machine/adc.c
index df9d23465a..9bebcbe086 100644
--- a/ports/nrf/modules/machine/adc.c
+++ b/ports/nrf/modules/machine/adc.c
@@ -24,15 +24,10 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
 
-#include "py/nlr.h"
-#include "py/runtime.h"
 #include "py/mphal.h"
-
-#if MICROPY_PY_MACHINE_ADC
-
 #include "adc.h"
 
 #if NRF51
@@ -100,19 +95,23 @@ STATIC int adc_find(mp_obj_t id) {
     mp_raise_ValueError(MP_ERROR_TEXT("ADC doesn't exist"));
 }
 
-/// \method __str__()
-/// Return a string describing the ADC object.
-STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) {
+/******************************************************************************/
+/* MicroPython bindings for machine API                                       */
+
+// These are ad-hoc legacy methods and need to be removed.
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&mp_machine_adc_value_obj) }, /* instance method */ \
+    { MP_ROM_QSTR(MP_QSTR_battery_level), MP_ROM_PTR(&mp_machine_adc_battery_level_obj) }, /* class method */ \
+
+// Return a string describing the ADC object.
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) {
     machine_adc_obj_t *self = o;
 
     mp_printf(print, "ADC(%u)", self->id);
 }
 
-/******************************************************************************/
-/* MicroPython bindings for machine API                                       */
-
 // for make_new
-STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     enum { ARG_id };
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1) } },
@@ -172,8 +171,7 @@ int16_t machine_adc_value_read(machine_adc_obj_t * adc_obj) {
 }
 
 // read_u16()
-STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
-    machine_adc_obj_t *self = self_in;
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     int16_t raw = machine_adc_value_read(self);
     #if defined(NRF52_SERIES)
     // raw is signed but the channel is in single-ended mode and this method cannot return negative values
@@ -182,9 +180,8 @@ STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
     }
     #endif
     // raw is an 8-bit value
-    return MP_OBJ_NEW_SMALL_INT(raw << 8 | raw);
+    return (raw << 8) | raw;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_machine_adc_read_u16_obj, machine_adc_read_u16);
 
 /// \method value()
 /// Read adc level.
@@ -282,25 +279,3 @@ mp_obj_t machine_adc_battery_level(void) {
     return MP_OBJ_NEW_SMALL_INT(batt_in_percent);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(mp_machine_adc_battery_level_obj, machine_adc_battery_level);
-
-STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = {
-    // instance methods
-    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&mp_machine_adc_read_u16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&mp_machine_adc_value_obj) },
-
-    // class methods
-    { MP_ROM_QSTR(MP_QSTR_battery_level), MP_ROM_PTR(&mp_machine_adc_battery_level_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adc_type,
-    MP_QSTR_ADC,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_adc_make_new,
-    locals_dict, &machine_adc_locals_dict,
-    print, machine_adc_print
-    );
-
-#endif // MICROPY_PY_MACHINE_ADC
diff --git a/ports/nrf/modules/machine/adc.h b/ports/nrf/modules/machine/adc.h
index cefccff6b2..84e5cdbb85 100644
--- a/ports/nrf/modules/machine/adc.h
+++ b/ports/nrf/modules/machine/adc.h
@@ -29,8 +29,6 @@
 
 typedef struct _machine_adc_obj_t machine_adc_obj_t;
 
-extern const mp_obj_type_t machine_adc_type;
-
 void adc_init0(void);
 
 int16_t machine_adc_value_read(machine_adc_obj_t * adc_obj);
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index 59f163dee2..f8a6e424af 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -46,9 +46,6 @@
 #if MICROPY_PY_MACHINE_HW_PWM || MICROPY_PY_MACHINE_SOFT_PWM
 #include "pwm.h"
 #endif
-#if MICROPY_PY_MACHINE_ADC
-#include "adc.h"
-#endif
 #if MICROPY_PY_MACHINE_TEMP
 #include "temp.h"
 #endif
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 5a956311e2..79a74e8566 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -179,6 +179,7 @@
 #ifndef MICROPY_PY_MACHINE_ADC
 #define MICROPY_PY_MACHINE_ADC      (0)
 #endif
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/nrf/modules/machine/adc.c"
 
 #ifndef MICROPY_PY_MACHINE_I2C
 #define MICROPY_PY_MACHINE_I2C      (0)
diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index 8126dbe777..4630c30fc0 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -319,7 +319,6 @@ SRC_C += \
 	uart.c \
 	gccollect.c \
 	help.c \
-	machine_adc.c \
 	machine_dac.c \
 	machine_i2c.c \
 	machine_spi.c \
diff --git a/ports/renesas-ra/machine_adc.c b/ports/renesas-ra/machine_adc.c
index b71c3db4b0..4ba30dff01 100644
--- a/ports/renesas-ra/machine_adc.c
+++ b/ports/renesas-ra/machine_adc.c
@@ -25,7 +25,9 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
+
 #include "py/mphal.h"
 #include "ra_adc.h"
 
@@ -47,7 +49,18 @@ typedef struct {
 /******************************************************************************/
 // MicroPython bindings for machine.ADC
 
-const mp_obj_type_t machine_adc_type;
+#if defined(ADC_CHANNEL_VBAT)
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VBAT \
+    { MP_ROM_QSTR(MP_QSTR_CORE_VBAT), MP_ROM_INT(ADC_CHANNEL_VBAT) },
+#else
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VBAT
+#endif
+
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_VREF), MP_ROM_INT(ADC_CHANNEL_VREF) }, \
+    { MP_ROM_QSTR(MP_QSTR_CORE_VREF), MP_ROM_INT(ADC_CHANNEL_VREFINT) }, \
+    { MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(ADC_CHANNEL_TEMPSENSOR) }, \
+    MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VBAT \
 
 typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
@@ -57,14 +70,14 @@ typedef struct _machine_adc_obj_t {
     uint32_t sample_time;
 } machine_adc_obj_t;
 
-STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint8_t resolution = (uint8_t)ra_adc_get_resolution();
     mp_printf(print, "<ADC%u channel=%u>", resolution, self->channel);
 }
 
 // ADC(id)
-STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     // Check number of arguments
     mp_arg_check_num(n_args, n_kw, 1, 1, false);
 
@@ -97,40 +110,14 @@ STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, s
     return MP_OBJ_FROM_PTR(o);
 }
 
-STATIC mp_obj_t machine_adc_read(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return MP_OBJ_NEW_SMALL_INT(ra_adc_read((uint32_t)(self->pin)));
+STATIC mp_int_t mp_machine_adc_read(machine_adc_obj_t *self) {
+    return ra_adc_read((uint32_t)(self->pin));
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_obj, machine_adc_read);
 
-STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
-    const machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     mp_uint_t raw = (mp_uint_t)ra_adc_read((uint32_t)(self->pin));
     mp_int_t bits = (mp_int_t)ra_adc_get_resolution();
     // Scale raw reading to 16 bit value using a Taylor expansion (for 8 <= bits <= 16)
     mp_uint_t u16 = raw << (16 - bits) | raw >> (2 * bits - 16);
-    return MP_OBJ_NEW_SMALL_INT(u16);
+    return u16;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
-
-STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&machine_adc_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_VREF), MP_ROM_INT(ADC_CHANNEL_VREF) },
-    { MP_ROM_QSTR(MP_QSTR_CORE_VREF), MP_ROM_INT(ADC_CHANNEL_VREFINT) },
-    { MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(ADC_CHANNEL_TEMPSENSOR) },
-    #if defined(ADC_CHANNEL_VBAT)
-    { MP_ROM_QSTR(MP_QSTR_CORE_VBAT), MP_ROM_INT(ADC_CHANNEL_VBAT) },
-    #endif
-};
-STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adc_type,
-    MP_QSTR_ADC,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_adc_make_new,
-    locals_dict, &machine_adc_locals_dict,
-    print, machine_adc_print
-    );
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index 6f7b8b8c07..9b93b69480 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -280,7 +280,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_Signal),              MP_ROM_PTR(&machine_signal_type) },
 
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) },
+    #if MICROPY_PY_MACHINE_ADC
     { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
+    #endif
     #if MICROPY_PY_MACHINE_DAC
     { MP_ROM_QSTR(MP_QSTR_DAC),                 MP_ROM_PTR(&machine_dac_type) },
     #endif
diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h
index ec494b798c..1dd0eec758 100644
--- a/ports/renesas-ra/modmachine.h
+++ b/ports/renesas-ra/modmachine.h
@@ -32,7 +32,6 @@
 extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_touchpad_type;
-extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_adcblock_type;
 extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_i2c_type;
diff --git a/ports/renesas-ra/mpconfigport.h b/ports/renesas-ra/mpconfigport.h
index 255605a57e..71d5cab820 100644
--- a/ports/renesas-ra/mpconfigport.h
+++ b/ports/renesas-ra/mpconfigport.h
@@ -130,6 +130,9 @@
 #define MICROPY_PY_LWIP_SOCK_RAW    (MICROPY_PY_LWIP)
 #ifndef MICROPY_PY_MACHINE
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/renesas-ra/machine_adc.c"
+#define MICROPY_PY_MACHINE_ADC_READ (1)
 #ifndef MICROPY_PY_MACHINE_BITSTREAM
 #define MICROPY_PY_MACHINE_BITSTREAM (1)
 #endif
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index d5302e3369..c93a8a55d8 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -117,7 +117,6 @@ set(MICROPY_SOURCE_DRIVERS
 set(MICROPY_SOURCE_PORT
     fatfs_port.c
     help.c
-    machine_adc.c
     machine_bitstream.c
     machine_i2c.c
     machine_pin.c
diff --git a/ports/rp2/machine_adc.c b/ports/rp2/machine_adc.c
index 5d6f0cc29c..80c4d0533e 100644
--- a/ports/rp2/machine_adc.c
+++ b/ports/rp2/machine_adc.c
@@ -24,7 +24,9 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
+
 #include "py/mphal.h"
 #include "hardware/adc.h"
 #include "machine_pin.h"
@@ -44,7 +46,8 @@ STATIC uint16_t adc_config_and_read_u16(uint32_t channel) {
 /******************************************************************************/
 // MicroPython bindings for machine.ADC
 
-const mp_obj_type_t machine_adc_type;
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(ADC_CHANNEL_TEMPSENSOR) }, \
 
 typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
@@ -54,13 +57,13 @@ typedef struct _machine_adc_obj_t {
     #endif
 } machine_adc_obj_t;
 
-STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "<ADC channel=%u>", self->channel);
 }
 
 // ADC(id)
-STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     // Check number of arguments
     mp_arg_check_num(n_args, n_kw, 1, 1, false);
 
@@ -127,29 +130,11 @@ STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, s
 }
 
 // read_u16()
-STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     #if MICROPY_HW_ADC_EXT_COUNT
     if (self->is_ext) {
-        return MP_OBJ_NEW_SMALL_INT(machine_pin_ext_read_u16(self->channel));
+        return machine_pin_ext_read_u16(self->channel);
     }
     #endif
-    return MP_OBJ_NEW_SMALL_INT(adc_config_and_read_u16(self->channel));
+    return adc_config_and_read_u16(self->channel);
 }
-MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
-
-STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(ADC_CHANNEL_TEMPSENSOR) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adc_type,
-    MP_QSTR_ADC,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_adc_make_new,
-    print, machine_adc_print,
-    locals_dict, &machine_adc_locals_dict
-    );
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 11de929e7b..b47af1aba0 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -254,7 +254,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_mem16),               MP_ROM_PTR(&machine_mem16_obj) },
     { MP_ROM_QSTR(MP_QSTR_mem32),               MP_ROM_PTR(&machine_mem32_obj) },
 
+    #if MICROPY_PY_MACHINE_ADC
     { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&machine_i2c_type) },
     { MP_ROM_QSTR(MP_QSTR_SoftI2C),             MP_ROM_PTR(&mp_machine_soft_i2c_type) },
     { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
diff --git a/ports/rp2/modmachine.h b/ports/rp2/modmachine.h
index 39a6e9c81e..5feafdcea8 100644
--- a/ports/rp2/modmachine.h
+++ b/ports/rp2/modmachine.h
@@ -3,7 +3,6 @@
 
 #include "py/obj.h"
 
-extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_rtc_type;
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index e35980d10b..b69a06387e 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -111,6 +111,8 @@
 #define MICROPY_PY_TIME_INCLUDEFILE             "ports/rp2/modtime.c"
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC        (rosc_random_u32())
 #define MICROPY_PY_MACHINE                      (1)
+#define MICROPY_PY_MACHINE_ADC                  (1)
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE      "ports/rp2/machine_adc.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW         mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM            (1)
 #define MICROPY_PY_MACHINE_PULSE                (1)
diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index 8e4327073c..841e6a9928 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -96,7 +96,6 @@ MPY_CROSS_FLAGS += -march=$(MPY_CROSS_MCU_ARCH)
 SRC_C += \
 	mcu/$(MCU_SERIES_LOWER)/clock_config.c \
 	help.c \
-	machine_adc.c \
 	machine_bitstream.c \
 	machine_dac.c \
 	machine_i2c.c \
diff --git a/ports/samd/machine_adc.c b/ports/samd/machine_adc.c
index 1d848e32bc..981318d33f 100644
--- a/ports/samd/machine_adc.c
+++ b/ports/samd/machine_adc.c
@@ -25,17 +25,12 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
 
-#if MICROPY_PY_MACHINE_ADC
-
-#include <stdint.h>
-#include "py/obj.h"
 #include "py/mphal.h"
-
 #include "sam.h"
 #include "pin_af.h"
-#include "modmachine.h"
 
 typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
@@ -77,6 +72,9 @@ static uint8_t adc_vref_table[] = {
 
 #endif  // defined(MCU_SAMD21)
 
+// The ADC class doesn't have any constants for this port.
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS
+
 Adc *const adc_bases[] = ADC_INSTS;
 uint32_t busy_flags = 0;
 bool init_flags[2] = {false, false};
@@ -87,16 +85,16 @@ static uint8_t resolution[] = {
 
 extern mp_int_t log2i(mp_int_t num);
 
-STATIC void adc_obj_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) {
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     (void)kind;
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(o);
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
     mp_printf(print, "ADC(%s, device=%u, channel=%u, bits=%u, average=%u, vref=%d)",
         pin_name(self->id), self->adc_config.device,
         self->adc_config.channel, self->bits, 1 << self->avg, self->vref);
 }
 
-STATIC mp_obj_t adc_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     enum { ARG_id, ARG_bits, ARG_average, ARG_vref };
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_id,       MP_ARG_REQUIRED | MP_ARG_OBJ },
@@ -140,8 +138,7 @@ STATIC mp_obj_t adc_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_
 }
 
 // read_u16()
-STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     Adc *adc = adc_bases[self->adc_config.device];
     // Set the reference voltage. Default: external AREFA.
     adc->REFCTRL.reg = adc_vref_table[self->vref];
@@ -155,18 +152,13 @@ STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
     while (adc->INTFLAG.bit.RESRDY == 0) {
     }
     // Get and return the result
-    return MP_OBJ_NEW_SMALL_INT(adc->RESULT.reg * (65536 / (1 << self->bits)));
+    return adc->RESULT.reg * (65536 / (1 << self->bits));
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
 
 // deinit() : release the ADC channel
-STATIC mp_obj_t machine_adc_deinit(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
+STATIC void mp_machine_adc_deinit(machine_adc_obj_t *self) {
     busy_flags &= ~((1 << (self->adc_config.device * 16 + self->adc_config.channel)));
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_deinit_obj, machine_adc_deinit);
 
 void adc_deinit_all(void) {
     busy_flags = 0;
@@ -174,22 +166,6 @@ void adc_deinit_all(void) {
     init_flags[1] = 0;
 }
 
-STATIC const mp_rom_map_elem_t adc_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_adc_deinit_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(adc_locals_dict, adc_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adc_type,
-    MP_QSTR_ADC,
-    MP_TYPE_FLAG_NONE,
-    make_new, adc_obj_make_new,
-    print, adc_obj_print,
-    locals_dict, &adc_locals_dict
-    );
-
 static void adc_init(machine_adc_obj_t *self) {
     // ADC & clock init is done only once per ADC
     if (init_flags[self->adc_config.device] == false) {
@@ -270,5 +246,3 @@ static void adc_init(machine_adc_obj_t *self) {
     // Set the port as given in self->id as ADC
     mp_hal_set_pin_mux(self->id, ALT_FCT_ADC);
 }
-
-#endif
diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h
index faa43b7af7..81b3078171 100644
--- a/ports/samd/modmachine.h
+++ b/ports/samd/modmachine.h
@@ -29,9 +29,6 @@
 #include "py/obj.h"
 #include "shared/timeutils/timeutils.h"
 
-#if MICROPY_PY_MACHINE_ADC
-extern const mp_obj_type_t machine_adc_type;
-#endif
 #if MICROPY_PY_MACHINE_DAC
 extern const mp_obj_type_t machine_dac_type;
 #endif
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 3505d8db1e..201e657c68 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -96,6 +96,8 @@
 #ifndef MICROPY_PY_MACHINE_ADC
 #define MICROPY_PY_MACHINE_ADC              (1)
 #endif
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/samd/machine_adc.c"
+#define MICROPY_PY_MACHINE_ADC_DEINIT       (1)
 #ifndef MICROPY_PY_MACHINE_DAC
 #define MICROPY_PY_MACHINE_DAC              (1)
 #endif
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index 9c73c5c956..d1248e0bb8 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -332,7 +332,6 @@ SRC_C += \
 	eth.c \
 	gccollect.c \
 	help.c \
-	machine_adc.c \
 	machine_bitstream.c \
 	machine_i2c.c \
 	machine_spi.c \
diff --git a/ports/stm32/machine_adc.c b/ports/stm32/machine_adc.c
index f41b80e0ad..4b644e6c97 100644
--- a/ports/stm32/machine_adc.c
+++ b/ports/stm32/machine_adc.c
@@ -24,7 +24,9 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
+
 #include "py/mphal.h"
 #include "adc.h"
 
@@ -490,7 +492,26 @@ uint32_t adc_config_and_read_u16(ADC_TypeDef *adc, uint32_t channel, uint32_t sa
 
 #if !BUILDING_MBOOT
 
-const mp_obj_type_t machine_adc_type;
+#if defined(ADC_CHANNEL_VBAT)
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VBAT \
+    { MP_ROM_QSTR(MP_QSTR_CORE_VBAT), MP_ROM_INT(MACHINE_ADC_INT_CH_VBAT) },
+#else
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VBAT
+#endif
+
+#if defined(ADC_CHANNEL_VDDCORE)
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VDD \
+    { MP_ROM_QSTR(MP_QSTR_CORE_VDD), MP_ROM_INT(MACHINE_ADC_INT_CH_VDDCORE) },
+#else
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VDD
+#endif
+
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_VREF), MP_ROM_INT(MACHINE_ADC_CH_VREF) }, \
+    { MP_ROM_QSTR(MP_QSTR_CORE_VREF), MP_ROM_INT(MACHINE_ADC_INT_CH_VREFINT) }, \
+    { MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(MACHINE_ADC_INT_CH_TEMPSENSOR) }, \
+    MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VBAT \
+    MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_CORE_VDD \
 
 typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
@@ -499,7 +520,7 @@ typedef struct _machine_adc_obj_t {
     uint32_t sample_time;
 } machine_adc_obj_t;
 
-STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
     unsigned adc_id = 1;
     #if defined(ADC2)
@@ -516,7 +537,7 @@ STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
 }
 
 // ADC(id)
-STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     // Check number of arguments
     mp_arg_check_num(n_args, n_kw, 1, 1, false);
 
@@ -586,34 +607,8 @@ STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, s
 }
 
 // read_u16()
-STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
-    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return MP_OBJ_NEW_SMALL_INT(adc_config_and_read_u16(self->adc, self->channel, self->sample_time));
+STATIC mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
+    return adc_config_and_read_u16(self->adc, self->channel, self->sample_time);
 }
-MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
-
-STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_VREF), MP_ROM_INT(MACHINE_ADC_CH_VREF) },
-    { MP_ROM_QSTR(MP_QSTR_CORE_VREF), MP_ROM_INT(MACHINE_ADC_INT_CH_VREFINT) },
-    { MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(MACHINE_ADC_INT_CH_TEMPSENSOR) },
-    #if defined(ADC_CHANNEL_VBAT)
-    { MP_ROM_QSTR(MP_QSTR_CORE_VBAT), MP_ROM_INT(MACHINE_ADC_INT_CH_VBAT) },
-    #endif
-    #if defined(ADC_CHANNEL_VDDCORE)
-    { MP_ROM_QSTR(MP_QSTR_CORE_VDD), MP_ROM_INT(MACHINE_ADC_INT_CH_VDDCORE) },
-    #endif
-};
-STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adc_type,
-    MP_QSTR_ADC,
-    MP_TYPE_FLAG_NONE,
-    make_new, machine_adc_make_new,
-    print, machine_adc_print,
-    locals_dict, &machine_adc_locals_dict
-    );
 
 #endif
diff --git a/ports/stm32/mboot/Makefile b/ports/stm32/mboot/Makefile
index 630327d700..54fc8f4830 100755
--- a/ports/stm32/mboot/Makefile
+++ b/ports/stm32/mboot/Makefile
@@ -109,6 +109,7 @@ LIB_SRC_C += \
 	lib/uzlib/tinflate.c
 
 SRC_C += \
+	adc.c \
 	main.c \
 	elem.c \
 	fsload.c \
@@ -124,7 +125,6 @@ SRC_C += \
 	ports/stm32/flash.c \
 	ports/stm32/flashbdev.c \
 	ports/stm32/i2cslave.c \
-	ports/stm32/machine_adc.c \
 	ports/stm32/powerctrlboot.c \
 	ports/stm32/qspi.c \
 	ports/stm32/spibdev.c \
diff --git a/ports/stm32/mboot/adc.c b/ports/stm32/mboot/adc.c
new file mode 100644
index 0000000000..c7b9749244
--- /dev/null
+++ b/ports/stm32/mboot/adc.c
@@ -0,0 +1,3 @@
+// Include the main ADC driver, so mboot can use adc_config() and adc_config_and_read_u16().
+#include "py/obj.h"
+#include "../machine_adc.c"
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index a0e2da89f8..070d0e1169 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -430,7 +430,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_Signal),              MP_ROM_PTR(&machine_signal_type) },
 
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&pyb_rtc_type) },
+    #if MICROPY_PY_MACHINE_ADC
     { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
+    #endif
     #if MICROPY_PY_MACHINE_I2C
     #if MICROPY_HW_ENABLE_HW_I2C
     { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&machine_i2c_type) },
diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h
index 9838eafdb0..882057c601 100644
--- a/ports/stm32/modmachine.h
+++ b/ports/stm32/modmachine.h
@@ -28,7 +28,6 @@
 
 #include "py/obj.h"
 
-extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index c27302d9bf..0cb929f558 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -110,6 +110,8 @@
 #define MICROPY_PY_LWIP_SOCK_RAW    (MICROPY_PY_LWIP)
 #ifndef MICROPY_PY_MACHINE
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/stm32/machine_adc.c"
 #ifndef MICROPY_PY_MACHINE_BITSTREAM
 #define MICROPY_PY_MACHINE_BITSTREAM (1)
 #endif

From 5b4a2baff6b42b2b428cd58a95407a66387e4305 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 10 Oct 2023 23:46:07 +1100
Subject: [PATCH 056/310] extmod/machine_uart: Factor ports' UART Python
 bindings to common code.

This is a code factoring to have the Python bindings in one location, and
all the ports use those same bindings.  For all ports except the two listed
below there is no functional change.

The nrf port has UART.sendbreak() removed, but this method previously did
nothing.

The zephyr port has the following methods added:
- UART.init(): supports setting timeout and timeout_char.
- UART.deinit(): does nothing, just returns None.
- UART.flush(): raises OSError(EINVAL) because it's not implemented.
- UART.any() and UART.txdone(): raise NotImplementedError.

Signed-off-by: Damien George <damien@micropython.org>
---
 drivers/cyw43/cywbt.c                  |   2 +-
 extmod/extmod.cmake                    |   1 +
 extmod/extmod.mk                       |   1 +
 extmod/machine_uart.c                  | 187 ++++++++++++++++++++
 extmod/modmachine.h                    |  20 +++
 ports/esp32/esp32_common.cmake         |   1 -
 ports/esp32/machine_uart.c             | 107 +++---------
 ports/esp32/modmachine.c               |   2 +
 ports/esp32/modmachine.h               |   1 -
 ports/esp32/mpconfigport.h             |   3 +
 ports/esp8266/Makefile                 |   1 -
 ports/esp8266/machine_uart.c           |  99 ++++-------
 ports/esp8266/main.c                   |   3 +-
 ports/esp8266/modmachine.c             |   4 +-
 ports/esp8266/modmachine.h             |   1 -
 ports/esp8266/modos.c                  |   5 +-
 ports/esp8266/mpconfigport.h           |   2 +
 ports/mimxrt/Makefile                  |   1 -
 ports/mimxrt/machine_uart.c            | 111 ++++--------
 ports/mimxrt/modmachine.c              |   2 +
 ports/mimxrt/modmachine.h              |   1 -
 ports/mimxrt/mpconfigport.h            |   3 +
 ports/nrf/Makefile                     |   1 -
 ports/nrf/main.c                       |   1 +
 ports/nrf/modules/machine/modmachine.c |   1 -
 ports/nrf/modules/machine/uart.c       | 162 ++++++------------
 ports/nrf/modules/machine/uart.h       |  11 +-
 ports/nrf/modules/os/modos.c           |   2 +-
 ports/nrf/mpconfigport.h               |   3 +
 ports/nrf/mphalport.c                  |   2 +-
 ports/renesas-ra/Makefile              |   1 -
 ports/renesas-ra/machine_uart.c        | 194 ++++-----------------
 ports/renesas-ra/modmachine.c          |   2 +
 ports/renesas-ra/modmachine.h          |   1 -
 ports/renesas-ra/mpconfigport.h        |   5 +
 ports/rp2/CMakeLists.txt               |   1 -
 ports/rp2/machine_uart.c               | 110 +++---------
 ports/rp2/modmachine.c                 |   2 +
 ports/rp2/modmachine.h                 |   1 -
 ports/rp2/mpbthciport.c                |   1 +
 ports/rp2/mpconfigport.h               |   3 +
 ports/samd/Makefile                    |   1 -
 ports/samd/machine_i2c.c               |   2 -
 ports/samd/machine_spi.c               |   2 -
 ports/samd/machine_uart.c              | 135 +++------------
 ports/samd/modmachine.h                |   3 -
 ports/samd/mpconfigport.h              |   2 +
 ports/samd/samd_soc.c                  |  25 +++
 ports/samd/samd_soc.h                  |   2 +
 ports/stm32/Makefile                   |   1 -
 ports/stm32/machine_uart.c             | 226 ++++++-------------------
 ports/stm32/main.c                     |   7 +-
 ports/stm32/modmachine.c               |   4 +-
 ports/stm32/modos.c                    |   7 +-
 ports/stm32/modpyb.c                   |   5 +-
 ports/stm32/mpbthciport.c              |   7 +-
 ports/stm32/mpconfigport.h             |   5 +
 ports/stm32/mphalport.c                |   2 +-
 ports/stm32/uart.c                     |  54 +++---
 ports/stm32/uart.h                     |  35 ++--
 ports/zephyr/CMakeLists.txt            |   1 -
 ports/zephyr/machine_uart.c            |  63 +++----
 ports/zephyr/modmachine.c              |   3 +
 ports/zephyr/modmachine.h              |   1 -
 ports/zephyr/mpconfigport.h            |   2 +
 65 files changed, 661 insertions(+), 996 deletions(-)
 create mode 100644 extmod/machine_uart.c

diff --git a/drivers/cyw43/cywbt.c b/drivers/cyw43/cywbt.c
index bc6674ea2e..d1b19382c5 100644
--- a/drivers/cyw43/cywbt.c
+++ b/drivers/cyw43/cywbt.c
@@ -49,7 +49,7 @@ extern uint8_t mp_bluetooth_hci_cmd_buf[4 + 256];
 #include "uart.h"
 
 // Provided by the port.
-extern pyb_uart_obj_t mp_bluetooth_hci_uart_obj;
+extern machine_uart_obj_t mp_bluetooth_hci_uart_obj;
 
 STATIC void cywbt_wait_cts_low(void) {
     mp_hal_pin_config(CYW43_PIN_BT_CTS, MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_UP, 0);
diff --git a/extmod/extmod.cmake b/extmod/extmod.cmake
index 6f01bafe46..a1a0a9f736 100644
--- a/extmod/extmod.cmake
+++ b/extmod/extmod.cmake
@@ -16,6 +16,7 @@ set(MICROPY_SOURCE_EXTMOD
     ${MICROPY_EXTMOD_DIR}/machine_pwm.c
     ${MICROPY_EXTMOD_DIR}/machine_signal.c
     ${MICROPY_EXTMOD_DIR}/machine_spi.c
+    ${MICROPY_EXTMOD_DIR}/machine_uart.c
     ${MICROPY_EXTMOD_DIR}/machine_wdt.c
     ${MICROPY_EXTMOD_DIR}/modbluetooth.c
     ${MICROPY_EXTMOD_DIR}/modframebuf.c
diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index 76dfbf0a45..8a48a42936 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -13,6 +13,7 @@ SRC_EXTMOD_C += \
 	extmod/machine_signal.c \
 	extmod/machine_spi.c \
 	extmod/machine_timer.c \
+	extmod/machine_uart.c \
 	extmod/machine_wdt.c \
 	extmod/modasyncio.c \
 	extmod/modbinascii.c \
diff --git a/extmod/machine_uart.c b/extmod/machine_uart.c
new file mode 100644
index 0000000000..dd556bbbbf
--- /dev/null
+++ b/extmod/machine_uart.c
@@ -0,0 +1,187 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "py/stream.h"
+
+#if MICROPY_PY_MACHINE_UART
+
+#include "extmod/modmachine.h"
+#include "shared/runtime/mpirq.h"
+
+// The port must provide implementations of these low-level UART functions.
+
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind);
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args);
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self);
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self);
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self);
+
+#if MICROPY_PY_MACHINE_UART_SENDBREAK
+STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self);
+#endif
+
+#if MICROPY_PY_MACHINE_UART_READCHAR_WRITECHAR
+STATIC mp_int_t mp_machine_uart_readchar(machine_uart_obj_t *self);
+STATIC void mp_machine_uart_writechar(machine_uart_obj_t *self, uint16_t data);
+#endif
+
+#if MICROPY_PY_MACHINE_UART_IRQ
+STATIC mp_irq_obj_t *mp_machine_uart_irq(machine_uart_obj_t *self, bool any_args, mp_arg_val_t *args);
+#endif
+
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode);
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode);
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode);
+
+// The port provides implementations of the above in this file.
+#include MICROPY_PY_MACHINE_UART_INCLUDEFILE
+
+// UART.init(...)
+STATIC mp_obj_t machine_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
+    mp_machine_uart_init_helper(MP_OBJ_TO_PTR(args[0]), n_args - 1, args + 1, kw_args);
+    return mp_const_none;
+}
+MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init);
+
+// UART.deinit()
+STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_machine_uart_deinit(self);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_deinit_obj, machine_uart_deinit);
+
+// UART.any()
+STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    return MP_OBJ_NEW_SMALL_INT(mp_machine_uart_any(self));
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any);
+
+// UART.txdone()
+STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    return mp_obj_new_bool(mp_machine_uart_txdone(self));
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
+
+#if MICROPY_PY_MACHINE_UART_SENDBREAK
+
+// UART.sendbreak()
+STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_machine_uart_sendbreak(self);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_sendbreak_obj, machine_uart_sendbreak);
+
+#endif
+
+#if MICROPY_PY_MACHINE_UART_READCHAR_WRITECHAR
+
+// UART.readchar()
+STATIC mp_obj_t machine_uart_readchar(mp_obj_t self_in) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    return MP_OBJ_NEW_SMALL_INT(mp_machine_uart_readchar(self));
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_readchar_obj, machine_uart_readchar);
+
+// UART.writechar(char)
+STATIC mp_obj_t machine_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_machine_uart_writechar(self, mp_obj_get_int(char_in));
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_uart_writechar_obj, machine_uart_writechar);
+
+#endif
+
+#if MICROPY_PY_MACHINE_UART_IRQ
+
+// UART.irq(handler, trigger, hard)
+STATIC mp_obj_t machine_uart_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    mp_arg_val_t args[MP_IRQ_ARG_INIT_NUM_ARGS];
+    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_IRQ_ARG_INIT_NUM_ARGS, mp_irq_init_args, args);
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+    bool any_args = n_args > 1 || kw_args->used != 0;
+    return MP_OBJ_FROM_PTR(mp_machine_uart_irq(self, any_args, args));
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_irq_obj, 1, machine_uart_irq);
+
+#endif
+
+STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) },
+    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_uart_deinit_obj) },
+
+    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
+    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
+    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
+    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
+    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
+
+    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) },
+    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
+
+    #if MICROPY_PY_MACHINE_UART_SENDBREAK
+    { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_uart_sendbreak_obj) },
+    #endif
+
+    #if MICROPY_PY_MACHINE_UART_READCHAR_WRITECHAR
+    { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&machine_uart_readchar_obj) },
+    { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&machine_uart_writechar_obj) },
+    #endif
+
+    #if MICROPY_PY_MACHINE_UART_IRQ
+    { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_uart_irq_obj) },
+    #endif
+
+    // A port must add UART class constants defining the following macro.
+    // It can be defined to nothing if there are no constants.
+    MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS
+};
+STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table);
+
+STATIC const mp_stream_p_t uart_stream_p = {
+    .read = mp_machine_uart_read,
+    .write = mp_machine_uart_write,
+    .ioctl = mp_machine_uart_ioctl,
+    .is_text = false,
+};
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_uart_type,
+    MP_QSTR_UART,
+    MP_TYPE_FLAG_ITER_IS_STREAM,
+    make_new, mp_machine_uart_make_new,
+    print, mp_machine_uart_print,
+    protocol, &uart_stream_p,
+    locals_dict, &machine_uart_locals_dict
+    );
+
+#endif // MICROPY_PY_MACHINE_UART
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index e635eedaae..c18c55553b 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -65,10 +65,29 @@
 #define MICROPY_PY_MACHINE_ADC_READ (0)
 #endif
 
+// Whether to enable the UART.sendbreak() method.
+// Requires a port to implement mp_machine_uart_sendbreak().
+#ifndef MICROPY_PY_MACHINE_UART_SENDBREAK
+#define MICROPY_PY_MACHINE_UART_SENDBREAK (0)
+#endif
+
+// Whether to enable the UART.readchar() and UART.writechar() methods.
+// Requires a port to implement mp_machine_uart_readchar() and mp_machine_uart_writechar().
+#ifndef MICROPY_PY_MACHINE_UART_READCHAR_WRITECHAR
+#define MICROPY_PY_MACHINE_UART_READCHAR_WRITECHAR (0)
+#endif
+
+// Whether to enable the UART.irq() method.
+// Requires a port to implement mp_machine_uart_irq().
+#ifndef MICROPY_PY_MACHINE_UART_IRQ
+#define MICROPY_PY_MACHINE_UART_IRQ (0)
+#endif
+
 // A port must provide these types, but they are otherwise opaque.
 typedef struct _machine_adc_obj_t machine_adc_obj_t;
 typedef struct _machine_i2s_obj_t machine_i2s_obj_t;
 typedef struct _machine_pwm_obj_t machine_pwm_obj_t;
+typedef struct _machine_uart_obj_t machine_uart_obj_t;
 typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
 
 // These classes correspond to machine.Type entries in the machine module.
@@ -80,6 +99,7 @@ extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_pwm_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
+extern const mp_obj_type_t machine_uart_type;
 extern const mp_obj_type_t machine_wdt_type;
 
 #endif // MICROPY_INCLUDED_EXTMOD_MODMACHINE_H
diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index 4c90282c9f..8b3dac532a 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -69,7 +69,6 @@ list(APPEND MICROPY_SOURCE_PORT
     machine_adcblock.c
     machine_dac.c
     machine_i2c.c
-    machine_uart.c
     modmachine.c
     network_common.c
     network_lan.c
diff --git a/ports/esp32/machine_uart.c b/ports/esp32/machine_uart.c
index 0b4f5890ba..f498ab5b32 100644
--- a/ports/esp32/machine_uart.c
+++ b/ports/esp32/machine_uart.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2016 Damien P. George
+ * Copyright (c) 2016-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,9 +24,8 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
 
 #include "driver/uart.h"
 #include "freertos/FreeRTOS.h"
@@ -35,7 +34,6 @@
 #include "py/stream.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
-#include "modmachine.h"
 #include "uart.h"
 
 #if SOC_UART_SUPPORT_XTAL_CLK
@@ -75,7 +73,15 @@ STATIC const char *_parity_name[] = {"None", "1", "0"};
 /******************************************************************************/
 // MicroPython bindings for UART
 
-STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_INV_TX), MP_ROM_INT(UART_INV_TX) }, \
+    { MP_ROM_QSTR(MP_QSTR_INV_RX), MP_ROM_INT(UART_INV_RX) }, \
+    { MP_ROM_QSTR(MP_QSTR_INV_RTS), MP_ROM_INT(UART_INV_RTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_INV_CTS), MP_ROM_INT(UART_INV_CTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HW_FLOWCTRL_RTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HW_FLOWCTRL_CTS) }, \
+
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint32_t baudrate;
     uart_get_baudrate(self->uart_num, &baudrate);
@@ -127,7 +133,7 @@ STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_pri
     mp_printf(print, ")");
 }
 
-STATIC void machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_tx, ARG_rx, ARG_rts, ARG_cts, ARG_txbuf, ARG_rxbuf, ARG_timeout, ARG_timeout_char, ARG_invert, ARG_flow };
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 0} },
@@ -303,7 +309,7 @@ STATIC void machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, co
     uart_set_hw_flow_ctrl(self->uart_num, self->flowcontrol, UART_FIFO_LEN - UART_FIFO_LEN / 4);
 }
 
-STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
     // get uart id
@@ -372,7 +378,7 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args,
 
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+    mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
 
     // Make sure pins are connected.
     uart_set_pin(self->uart_num, self->tx, self->rx, self->rts, self->cts);
@@ -380,30 +386,21 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args,
     return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC mp_obj_t machine_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    machine_uart_init_helper(args[0], n_args - 1, args + 1, kw_args);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init);
-
-STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
     uart_driver_delete(self->uart_num);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_deinit_obj, machine_uart_deinit);
 
-STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
     size_t rxbufsize;
     uart_get_buffered_data_len(self->uart_num, &rxbufsize);
-    return MP_OBJ_NEW_SMALL_INT(rxbufsize);
+    return rxbufsize;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any);
 
-STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    return uart_wait_tx_done(self->uart_num, 0) == ESP_OK;
+}
 
+STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self) {
     // Save settings
     uint32_t baudrate;
     uart_get_baudrate(self->uart_num, &baudrate);
@@ -418,46 +415,9 @@ STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) {
 
     // Restore original setting
     uart_set_baudrate(self->uart_num, baudrate);
-
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_sendbreak_obj, machine_uart_sendbreak);
 
-STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (uart_wait_tx_done(self->uart_num, 0) == ESP_OK) {
-        return mp_const_true;
-    } else {
-        return mp_const_false;
-    }
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
-
-STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_uart_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) },
-    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_uart_sendbreak_obj) },
-    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_INV_TX), MP_ROM_INT(UART_INV_TX) },
-    { MP_ROM_QSTR(MP_QSTR_INV_RX), MP_ROM_INT(UART_INV_RX) },
-    { MP_ROM_QSTR(MP_QSTR_INV_RTS), MP_ROM_INT(UART_INV_RTS) },
-    { MP_ROM_QSTR(MP_QSTR_INV_CTS), MP_ROM_INT(UART_INV_CTS) },
-
-    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HW_FLOWCTRL_RTS) },
-    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HW_FLOWCTRL_CTS) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table);
-
-STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
     // make sure we want at least 1 char
@@ -491,7 +451,7 @@ STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t siz
     return bytes_read;
 }
 
-STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
     int bytes_written = uart_write_bytes(self->uart_num, buf_in, size);
@@ -505,7 +465,7 @@ STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uin
     return bytes_written;
 }
 
-STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
     machine_uart_obj_t *self = self_in;
     mp_uint_t ret;
     if (request == MP_STREAM_POLL) {
@@ -537,20 +497,3 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr
     }
     return ret;
 }
-
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = machine_uart_read,
-    .write = machine_uart_write,
-    .ioctl = machine_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_uart_make_new,
-    print, machine_uart_print,
-    protocol, &uart_stream_p,
-    locals_dict, &machine_uart_locals_dict
-    );
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index b1c9011cb6..96df32d435 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -328,7 +328,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) },
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
+    #if MICROPY_PY_MACHINE_UART
     { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
+    #endif
 
     // Reset reasons
     { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h
index 68b7d4ffd5..f60715f77a 100644
--- a/ports/esp32/modmachine.h
+++ b/ports/esp32/modmachine.h
@@ -16,7 +16,6 @@ extern const mp_obj_type_t machine_adcblock_type;
 extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_spi_type;
-extern const mp_obj_type_t machine_uart_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
 
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 1718f31f6c..39f91ab831 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -126,6 +126,9 @@
 #define MICROPY_PY_MACHINE_I2S_FINALISER    (1)
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_RX  (I2S_MODE_MASTER | I2S_MODE_RX)
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_TX  (I2S_MODE_MASTER | I2S_MODE_TX)
+#define MICROPY_PY_MACHINE_UART             (1)
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/esp32/machine_uart.c"
+#define MICROPY_PY_MACHINE_UART_SENDBREAK   (1)
 #define MICROPY_PY_MACHINE_WDT              (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE  "ports/esp32/machine_wdt.c"
 #define MICROPY_PY_NETWORK (1)
diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index 0485f9bc05..b29df9fd22 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -114,7 +114,6 @@ SRC_C = \
 	machine_bitstream.c \
 	machine_pin.c \
 	machine_rtc.c \
-	machine_uart.c \
 	machine_hspi.c \
 	modesp.c \
 	network_wlan.c \
diff --git a/ports/esp8266/machine_uart.c b/ports/esp8266/machine_uart.c
index 873b12b2fa..f38858b0c2 100644
--- a/ports/esp8266/machine_uart.c
+++ b/ports/esp8266/machine_uart.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2016 Damien P. George
+ * Copyright (c) 2016-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,24 +24,19 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
 
+#include "py/mperrno.h"
+#include "py/mphal.h"
 #include "ets_sys.h"
 #include "user_interface.h"
 #include "uart.h"
 
-#include "py/runtime.h"
-#include "py/stream.h"
-#include "py/mperrno.h"
-#include "py/mphal.h"
-#include "modmachine.h"
-
 // UartDev is defined and initialized in rom code.
 extern UartDevice UartDev;
 
-typedef struct _pyb_uart_obj_t {
+typedef struct _machine_uart_obj_t {
     mp_obj_base_t base;
     uint8_t uart_id;
     uint8_t bits;
@@ -50,21 +45,24 @@ typedef struct _pyb_uart_obj_t {
     uint32_t baudrate;
     uint16_t timeout;       // timeout waiting for first char (in ms)
     uint16_t timeout_char;  // timeout waiting between chars (in ms)
-} pyb_uart_obj_t;
+} machine_uart_obj_t;
 
 STATIC const char *_parity_name[] = {"None", "1", "0"};
 
 /******************************************************************************/
 // MicroPython bindings for UART
 
-STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+// The UART class doesn't have any constants for this port.
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS
+
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, rxbuf=%u, timeout=%u, timeout_char=%u)",
         self->uart_id, self->baudrate, self->bits, _parity_name[self->parity],
         self->stop, uart0_get_rxbuf_len() - 1, self->timeout, self->timeout_char);
 }
 
-STATIC void pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_tx, ARG_rx, ARG_rxbuf, ARG_timeout, ARG_timeout_char };
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 0} },
@@ -192,7 +190,7 @@ STATIC void pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_o
     uart_setup(self->uart_id);
 }
 
-STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
     // get uart id
@@ -202,7 +200,7 @@ STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size
     }
 
     // create instance
-    pyb_uart_obj_t *self = mp_obj_malloc(pyb_uart_obj_t, &pyb_uart_type);
+    machine_uart_obj_t *self = mp_obj_malloc(machine_uart_obj_t, &machine_uart_type);
     self->uart_id = uart_id;
     self->baudrate = 115200;
     self->bits = 8;
@@ -214,47 +212,25 @@ STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size
     // init the peripheral
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+    mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
 
     return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args);
-    return mp_const_none;
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
+    (void)self;
 }
-MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init);
 
-STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self->uart_id));
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
+    return uart_rx_any(self->uart_id);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any);
 
-STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    return uart_txdone(self->uart_id) == true ? mp_const_true : mp_const_false;
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    return uart_txdone(self->uart_id);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
 
-STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) },
-    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table);
-
-STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
     if (self->uart_id == 1) {
         mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("UART(1) can't read"));
@@ -282,8 +258,8 @@ STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, i
     }
 }
 
-STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     const byte *buf = buf_in;
 
     /* TODO implement non-blocking
@@ -303,8 +279,8 @@ STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t
     return size;
 }
 
-STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) {
-    pyb_uart_obj_t *self = self_in;
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+    machine_uart_obj_t *self = self_in;
     mp_uint_t ret;
     if (request == MP_STREAM_POLL) {
         mp_uint_t flags = arg;
@@ -321,7 +297,7 @@ STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t a
         uint64_t timeout = (uint64_t)(3 + 127) * 13000000ll * 2 / self->baudrate
             + system_get_time();
         do {
-            if (machine_uart_txdone((mp_obj_t)self) == mp_const_true) {
+            if (mp_machine_uart_txdone(self)) {
                 return 0;
             }
             MICROPY_EVENT_POLL_HOOK
@@ -336,21 +312,4 @@ STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t a
     return ret;
 }
 
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = pyb_uart_read,
-    .write = pyb_uart_write,
-    .ioctl = pyb_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    pyb_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, pyb_uart_make_new,
-    print, pyb_uart_print,
-    protocol, &uart_stream_p,
-    locals_dict, &pyb_uart_locals_dict
-    );
-
 MP_REGISTER_ROOT_POINTER(byte * uart0_rxbuf);
diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c
index 87e72bace9..33e0272f80 100644
--- a/ports/esp8266/main.c
+++ b/ports/esp8266/main.c
@@ -40,6 +40,7 @@
 #define USE_US_TIMER 1
 
 #include "extmod/misc.h"
+#include "extmod/modmachine.h"
 #include "shared/readline/readline.h"
 #include "shared/runtime/pyexec.h"
 #include "gccollect.h"
@@ -72,7 +73,7 @@ STATIC void mp_reset(void) {
         mp_obj_t args[2];
         args[0] = MP_OBJ_NEW_SMALL_INT(0);
         args[1] = MP_OBJ_NEW_SMALL_INT(115200);
-        args[0] = MP_OBJ_TYPE_GET_SLOT(&pyb_uart_type, make_new)(&pyb_uart_type, 2, 0, args);
+        args[0] = MP_OBJ_TYPE_GET_SLOT(&machine_uart_type, make_new)(&machine_uart_type, 2, 0, args);
         args[1] = MP_OBJ_NEW_SMALL_INT(1);
         mp_os_dupterm_obj.fun.var(2, args);
     }
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index 43e94e0c8a..d7e8ed0333 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -430,7 +430,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     #if MICROPY_PY_MACHINE_ADC
     { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
     #endif
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) },
+    #if MICROPY_PY_MACHINE_UART
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
+    #endif
     #if MICROPY_PY_MACHINE_I2C
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
     { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
diff --git a/ports/esp8266/modmachine.h b/ports/esp8266/modmachine.h
index 469d25e81d..0c6a6afbba 100644
--- a/ports/esp8266/modmachine.h
+++ b/ports/esp8266/modmachine.h
@@ -5,7 +5,6 @@
 
 extern const mp_obj_type_t pyb_pin_type;
 extern const mp_obj_type_t pyb_rtc_type;
-extern const mp_obj_type_t pyb_uart_type;
 extern const mp_obj_type_t pyb_i2c_type;
 extern const mp_obj_type_t machine_hspi_type;
 
diff --git a/ports/esp8266/modos.c b/ports/esp8266/modos.c
index 78072d4f44..0194bf25f0 100644
--- a/ports/esp8266/modos.c
+++ b/ports/esp8266/modos.c
@@ -30,6 +30,7 @@
 #include "py/objtuple.h"
 #include "py/objstr.h"
 #include "extmod/misc.h"
+#include "extmod/modmachine.h"
 #include "extmod/vfs.h"
 #include "extmod/vfs_fat.h"
 #include "extmod/vfs_lfs.h"
@@ -53,10 +54,10 @@ STATIC mp_obj_t mp_os_urandom(mp_obj_t num) {
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_urandom_obj, mp_os_urandom);
 
 void mp_os_dupterm_stream_detached_attached(mp_obj_t stream_detached, mp_obj_t stream_attached) {
-    if (mp_obj_get_type(stream_attached) == &pyb_uart_type) {
+    if (mp_obj_get_type(stream_attached) == &machine_uart_type) {
         ++uart_attached_to_dupterm;
     }
-    if (mp_obj_get_type(stream_detached) == &pyb_uart_type) {
+    if (mp_obj_get_type(stream_detached) == &machine_uart_type) {
         --uart_attached_to_dupterm;
     }
 }
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index 4e3248513e..8493814b41 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -74,6 +74,8 @@
 #define MICROPY_PY_MACHINE_SOFTI2C  (1)
 #define MICROPY_PY_MACHINE_SPI      (1)
 #define MICROPY_PY_MACHINE_SOFTSPI  (1)
+#define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/esp8266/machine_uart.c"
 #define MICROPY_PY_MACHINE_WDT      (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE "ports/esp8266/machine_wdt.c"
 #define MICROPY_PY_NETWORK (1)
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index b631c829bf..6131a509d8 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -202,7 +202,6 @@ SRC_C += \
 	machine_rtc.c \
 	machine_sdcard.c \
 	machine_spi.c \
-	machine_uart.c \
 	main.c \
 	mbedtls/mbedtls_port.c \
 	mimxrt_flash.c \
diff --git a/ports/mimxrt/machine_uart.c b/ports/mimxrt/machine_uart.c
index 8e1505349a..7d228d9159 100644
--- a/ports/mimxrt/machine_uart.c
+++ b/ports/mimxrt/machine_uart.c
@@ -25,8 +25,9 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "py/stream.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
+
 #include "py/mphal.h"
 #include "ticks.h"
 #include "fsl_common.h"
@@ -163,7 +164,16 @@ void machine_uart_set_baudrate(mp_obj_t uart_in, uint32_t baudrate) {
     #endif
 }
 
-STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+/******************************************************************************/
+// MicroPython bindings for UART
+
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_INV_TX), MP_ROM_INT(UART_INVERT_TX) }, \
+    { MP_ROM_QSTR(MP_QSTR_INV_RX), MP_ROM_INT(UART_INVERT_RX) }, \
+    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) }, \
+
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, flow=%s, "
         "rxbuf=%d, txbuf=%d, timeout=%u, timeout_char=%u, invert=%s)",
@@ -174,7 +184,7 @@ STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_pri
         _invert_name[self->invert]);
 }
 
-STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_flow,
            ARG_timeout, ARG_timeout_char, ARG_invert, ARG_rxbuf, ARG_txbuf};
     static const mp_arg_t allowed_args[] = {
@@ -328,11 +338,9 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
         self->lpuart->STAT |= 1 << LPUART_STAT_BRK13_SHIFT;
         LPUART_EnableTx(self->lpuart, true);
     }
-
-    return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
     // Get UART bus.
@@ -358,53 +366,33 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args,
     if (uart_present) {
         mp_map_t kw_args;
         mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-        return machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+        mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+        return MP_OBJ_FROM_PTR(self);
     } else {
         return mp_const_none;
     }
 }
 
-// uart.init(baud, [kwargs])
-STATIC mp_obj_t machine_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    return machine_uart_init_helper(args[0], n_args - 1, args + 1, kw_args);
-}
-MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init);
-
 // uart.deinit()
-STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
     LPUART_SoftwareReset(self->lpuart);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_deinit_obj, machine_uart_deinit);
 
-STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
     machine_uart_ensure_active(self);
     size_t count = LPUART_TransferGetRxRingBufferLength(self->lpuart, &self->handle);
-    return MP_OBJ_NEW_SMALL_INT(count);
+    return count;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any);
 
-STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    return self->tx_status == kStatus_LPUART_TxIdle;
+}
+
+STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self) {
     machine_uart_ensure_active(self);
     self->lpuart->CTRL |= 1 << LPUART_CTRL_SBK_SHIFT; // Set SBK bit
     self->lpuart->CTRL &= ~LPUART_CTRL_SBK_MASK; // Clear SBK bit
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_sendbreak_obj, machine_uart_sendbreak);
-
-STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (self->tx_status == kStatus_LPUART_TxIdle) {
-        return mp_const_true;
-    } else {
-        return mp_const_false;
-    }
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
 
 // Reset all defined UARTs
 void machine_uart_deinit_all(void) {
@@ -415,31 +403,7 @@ void machine_uart_deinit_all(void) {
     }
 }
 
-STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_uart_deinit_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_uart_sendbreak_obj) },
-    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) },
-    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) },
-
-    { MP_ROM_QSTR(MP_QSTR_INV_TX), MP_ROM_INT(UART_INVERT_TX) },
-    { MP_ROM_QSTR(MP_QSTR_INV_RX), MP_ROM_INT(UART_INVERT_RX) },
-
-};
-STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table);
-
-STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint64_t t = ticks_us64() + (uint64_t)self->timeout * 1000;
     uint64_t timeout_char_us = (uint64_t)self->timeout_char * 1000;
@@ -474,7 +438,7 @@ STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t siz
     return size;
 }
 
-STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     lpuart_transfer_t xfer;
     uint64_t t;
@@ -534,7 +498,7 @@ STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uin
     return size;
 }
 
-STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
     machine_uart_obj_t *self = self_in;
     mp_uint_t ret;
     if (request == MP_STREAM_POLL) {
@@ -558,7 +522,7 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint
             self->config.baudRate_Bps + ticks_us64();
 
         do {
-            if (machine_uart_txdone((mp_obj_t)self) == mp_const_true) {
+            if (mp_machine_uart_txdone(self)) {
                 return 0;
             }
             MICROPY_EVENT_POLL_HOOK
@@ -572,20 +536,3 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint
     }
     return ret;
 }
-
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = machine_uart_read,
-    .write = machine_uart_write,
-    .ioctl = machine_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_uart_make_new,
-    print, machine_uart_print,
-    protocol, &uart_stream_p,
-    locals_dict, &machine_uart_locals_dict
-    );
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index 33394e62dd..ab7f1de485 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -206,7 +206,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
     #endif
     { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
+    #if MICROPY_PY_MACHINE_UART
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
+    #endif
     #if MICROPY_PY_MACHINE_WDT
     { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
     #endif
diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h
index ff8ac0f085..c6ac4eb390 100644
--- a/ports/mimxrt/modmachine.h
+++ b/ports/mimxrt/modmachine.h
@@ -34,7 +34,6 @@ extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
-extern const mp_obj_type_t machine_uart_type;
 
 void machine_adc_init(void);
 void machine_pin_irq_deinit(void);
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index 9df6397a87..01502d5472 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -105,6 +105,9 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE  "ports/mimxrt/machine_wdt.c"
 #define MICROPY_PY_MACHINE_WDT_TIMEOUT_MS   (1)
 #define MICROPY_SOFT_TIMER_TICKS_MS         systick_ms
+#define MICROPY_PY_MACHINE_UART             (1)
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/mimxrt/machine_uart.c"
+#define MICROPY_PY_MACHINE_UART_SENDBREAK   (1)
 #define MICROPY_PY_ONEWIRE                  (1)
 
 // fatfs configuration used in ffconf.h
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index b5d8325773..ac86ad2b15 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -321,7 +321,6 @@ endif
 
 DRIVERS_SRC_C += $(addprefix modules/,\
 	machine/modmachine.c \
-	machine/uart.c \
 	machine/spi.c \
 	machine/i2c.c \
 	machine/pin.c \
diff --git a/ports/nrf/main.c b/ports/nrf/main.c
index cd22521f4a..959c31e2e7 100644
--- a/ports/nrf/main.c
+++ b/ports/nrf/main.c
@@ -38,6 +38,7 @@
 #include "py/stackctrl.h"
 #include "py/gc.h"
 #include "py/compile.h"
+#include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "readline.h"
 #include "gccollect.h"
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index f8a6e424af..4d39a29b03 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -39,7 +39,6 @@
 #include "lib/oofatfs/diskio.h"
 #include "gccollect.h"
 #include "pin.h"
-#include "uart.h"
 #include "spi.h"
 #include "i2c.h"
 #include "timer.h"
diff --git a/ports/nrf/modules/machine/uart.c b/ports/nrf/modules/machine/uart.c
index fd176549d0..e0b56e8310 100644
--- a/ports/nrf/modules/machine/uart.c
+++ b/ports/nrf/modules/machine/uart.c
@@ -26,13 +26,9 @@
  * THE SOFTWARE.
  */
 
-#include <stdbool.h>
-#include <string.h>
-#include <stdarg.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
 
-#include "py/nlr.h"
-#include "py/runtime.h"
-#include "py/stream.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "py/ringbuf.h"
@@ -41,9 +37,7 @@
 #include "shared/runtime/interrupt_char.h"
 
 #include "uart.h"
-#include "mpconfigboard.h"
 #include "nrf.h"
-#include "mphalport.h"
 
 #if NRFX_UART_ENABLED
 #include "nrfx_uart.h"
@@ -51,15 +45,12 @@
 #include "nrfx_uarte.h"
 #endif
 
-
-#if MICROPY_PY_MACHINE_UART
-
-typedef struct _machine_hard_uart_buf_t {
+typedef struct _machine_uart_buf_t {
     uint8_t tx_buf[1];
     uint8_t rx_buf[1];
     uint8_t rx_ringbuf_array[64];
     volatile ringbuf_t rx_ringbuf;
-} machine_hard_uart_buf_t;
+} machine_uart_buf_t;
 
 #if NRFX_UARTE_ENABLED
 
@@ -96,17 +87,17 @@ typedef struct _machine_hard_uart_buf_t {
 
 #endif
 
-typedef struct _machine_hard_uart_obj_t {
+typedef struct _machine_uart_obj_t {
     mp_obj_base_t       base;
     const nrfx_uart_t * p_uart;      // Driver instance
-    machine_hard_uart_buf_t buf;
+    machine_uart_buf_t buf;
     uint16_t timeout;       // timeout waiting for first char (in ms)
     uint16_t timeout_char;  // timeout waiting between chars (in ms)
-} machine_hard_uart_obj_t;
+} machine_uart_obj_t;
 
 static const nrfx_uart_t instance0 = NRFX_UART_INSTANCE(0);
 
-STATIC machine_hard_uart_obj_t machine_hard_uart_obj[] = {
+STATIC machine_uart_obj_t machine_uart_obj[] = {
     {{&machine_uart_type}, .p_uart = &instance0}
 };
 
@@ -116,14 +107,14 @@ void uart_init0(void) {
 STATIC int uart_find(mp_obj_t id) {
     // given an integer id
     int uart_id = mp_obj_get_int(id);
-    if (uart_id >= 0 && uart_id < MP_ARRAY_SIZE(machine_hard_uart_obj)) {
+    if (uart_id >= 0 && uart_id < MP_ARRAY_SIZE(machine_uart_obj)) {
         return uart_id;
     }
     mp_raise_ValueError(MP_ERROR_TEXT("UART doesn't exist"));
 }
 
 STATIC void uart_event_handler(nrfx_uart_event_t const *p_event, void *p_context) {
-    machine_hard_uart_obj_t *self = p_context;
+    machine_uart_obj_t *self = p_context;
     if (p_event->type == NRFX_UART_EVT_RX_DONE) {
         nrfx_uart_rx(self->p_uart, &self->buf.rx_buf[0], 1);
         int chr = self->buf.rx_buf[0];
@@ -143,15 +134,15 @@ STATIC void uart_event_handler(nrfx_uart_event_t const *p_event, void *p_context
     }
 }
 
-bool uart_rx_any(machine_hard_uart_obj_t *self) {
+bool uart_rx_any(machine_uart_obj_t *self) {
     return self->buf.rx_ringbuf.iput != self->buf.rx_ringbuf.iget;
 }
 
-int uart_rx_char(machine_hard_uart_obj_t *self) {
+int uart_rx_char(machine_uart_obj_t *self) {
     return ringbuf_get((ringbuf_t *)&self->buf.rx_ringbuf);
 }
 
-STATIC nrfx_err_t uart_tx_char(machine_hard_uart_obj_t *self, int c) {
+STATIC nrfx_err_t uart_tx_char(machine_uart_obj_t *self, int c) {
     while (nrfx_uart_tx_in_progress(self->p_uart)) {
         ;
     }
@@ -160,13 +151,13 @@ STATIC nrfx_err_t uart_tx_char(machine_hard_uart_obj_t *self, int c) {
 }
 
 
-void uart_tx_strn(machine_hard_uart_obj_t *uart_obj, const char *str, uint len) {
+void uart_tx_strn(machine_uart_obj_t *uart_obj, const char *str, uint len) {
     for (const char *top = str + len; str < top; str++) {
         uart_tx_char(uart_obj, *str);
     }
 }
 
-void uart_tx_strn_cooked(machine_hard_uart_obj_t *uart_obj, const char *str, uint len) {
+void uart_tx_strn_cooked(machine_uart_obj_t *uart_obj, const char *str, uint len) {
     for (const char *top = str + len; str < top; str++) {
         if (*str == '\n') {
             uart_tx_char(uart_obj, '\r');
@@ -178,16 +169,24 @@ void uart_tx_strn_cooked(machine_hard_uart_obj_t *uart_obj, const char *str, uin
 /******************************************************************************/
 /* MicroPython bindings                                                      */
 
-STATIC void machine_hard_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+// The UART class doesn't have any constants for this port.
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS
+
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     mp_printf(print, "UART(0)");
 }
 
-/// \method init(id, baudrate)
-///
-/// Initialise the UART bus with the given parameters:
-///   - `id`is bus id.
-///   - `baudrate` is the clock rate.
-STATIC mp_obj_t machine_hard_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    // Parse args (none supported at this stage).
+    mp_arg_parse_all(n_args, pos_args, kw_args, 0, NULL, NULL);
+}
+
+// UART(id, baudrate)
+//
+// Initialise the UART bus with the given parameters:
+//   - `id`is bus id.
+//   - `baudrate` is the clock rate.
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     enum { ARG_id, ARG_baudrate, ARG_timeout, ARG_timeout_char };
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_id,       MP_ARG_REQUIRED | MP_ARG_OBJ },
@@ -202,7 +201,7 @@ STATIC mp_obj_t machine_hard_uart_make_new(const mp_obj_type_t *type, size_t n_a
 
     // get static peripheral object
     int uart_id = uart_find(args[ARG_id].u_obj);
-    machine_hard_uart_obj_t *self = &machine_hard_uart_obj[uart_id];
+    machine_uart_obj_t *self = &machine_uart_obj[uart_id];
 
     nrfx_uart_config_t config;
 
@@ -267,78 +266,36 @@ STATIC mp_obj_t machine_hard_uart_make_new(const mp_obj_type_t *type, size_t n_a
     return MP_OBJ_FROM_PTR(self);
 }
 
-/// \method writechar(char)
-/// Write a single character on the bus.  `char` is an integer to write.
-/// Return value: `None`.
-STATIC mp_obj_t machine_hard_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
-    machine_hard_uart_obj_t *self = self_in;
-
-    // get the character to write (might be 9 bits)
-    int data = mp_obj_get_int(char_in);
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
+    (void)self;
+}
 
+// Write a single character on the bus.  `data` is an integer to write.
+STATIC void mp_machine_uart_writechar(machine_uart_obj_t *self, uint16_t data) {
     nrfx_err_t err = uart_tx_char(self, data);
     if (err != NRFX_SUCCESS) {
         mp_hal_raise(err);
     }
-
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_hard_uart_writechar_obj, machine_hard_uart_writechar);
 
-/// \method readchar()
-/// Receive a single character on the bus.
-/// Return value: The character read, as an integer.  Returns -1 on timeout.
-STATIC mp_obj_t machine_hard_uart_readchar(mp_obj_t self_in) {
-    machine_hard_uart_obj_t *self = self_in;
-    return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self));
+// Receive a single character on the bus.
+// Return value: The character read, as an integer.  Returns -1 on timeout.
+STATIC mp_int_t mp_machine_uart_readchar(machine_uart_obj_t *self) {
+    return uart_rx_char(self);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_hard_uart_readchar_obj, machine_hard_uart_readchar);
 
 // uart.any()
-STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) {
-    machine_hard_uart_obj_t *self = self_in;
-    return MP_OBJ_NEW_SMALL_INT(ringbuf_avail((ringbuf_t *)&self->buf.rx_ringbuf));
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
+    return ringbuf_avail((ringbuf_t *)&self->buf.rx_ringbuf);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any);
-
-// uart.sendbreak()
-STATIC mp_obj_t machine_hard_uart_sendbreak(mp_obj_t self_in) {
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_hard_uart_sendbreak_obj, machine_hard_uart_sendbreak);
 
 // uart.txdone()
-STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
-    machine_hard_uart_obj_t *self = self_in;
-    return mp_obj_new_bool(!nrfx_uart_tx_in_progress(self->p_uart));
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    return !nrfx_uart_tx_in_progress(self->p_uart);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
 
-STATIC const mp_rom_map_elem_t machine_hard_uart_locals_dict_table[] = {
-    // instance methods
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&machine_hard_uart_writechar_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&machine_hard_uart_readchar_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_hard_uart_sendbreak_obj) },
-    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
-    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
-
-    // class constants
-/*
-    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) },
-    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) },
-*/
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_hard_uart_locals_dict, machine_hard_uart_locals_dict_table);
-
-STATIC mp_uint_t machine_hard_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
-    machine_hard_uart_obj_t *self = self_in;
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+    machine_uart_obj_t *self = self_in;
     byte *buf = buf_in;
     uint32_t t = self->timeout + mp_hal_ticks_ms();
 
@@ -362,8 +319,8 @@ STATIC mp_uint_t machine_hard_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_
     return size;
 }
 
-STATIC mp_uint_t machine_hard_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
-    machine_hard_uart_obj_t *self = self_in;
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+    machine_uart_obj_t *self = self_in;
 
     nrfx_err_t err = nrfx_uart_tx(self->p_uart, buf_in, size);
     if (err == NRFX_SUCCESS) {
@@ -378,8 +335,8 @@ STATIC mp_uint_t machine_hard_uart_write(mp_obj_t self_in, const void *buf_in, m
     }
 }
 
-STATIC mp_uint_t machine_hard_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
-    machine_hard_uart_obj_t *self = self_in;
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+    machine_uart_obj_t *self = self_in;
     (void)self;
     mp_uint_t ret = 0;
 
@@ -399,22 +356,3 @@ STATIC mp_uint_t machine_hard_uart_ioctl(mp_obj_t self_in, mp_uint_t request, ui
     }
     return MP_STREAM_ERROR;
 }
-
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = machine_hard_uart_read,
-    .write = machine_hard_uart_write,
-    .ioctl = machine_hard_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_hard_uart_make_new,
-    print, machine_hard_uart_print,
-    protocol, &uart_stream_p,
-    locals_dict, &machine_hard_uart_locals_dict
-    );
-
-#endif // MICROPY_PY_MACHINE_UART
diff --git a/ports/nrf/modules/machine/uart.h b/ports/nrf/modules/machine/uart.h
index eee0738fe1..741473ab7a 100644
--- a/ports/nrf/modules/machine/uart.h
+++ b/ports/nrf/modules/machine/uart.h
@@ -31,16 +31,15 @@
 #include "pin.h"
 #include "genhdr/pins.h"
 
-typedef struct _machine_hard_uart_obj_t machine_hard_uart_obj_t;
-extern const mp_obj_type_t machine_uart_type;
+typedef struct _machine_uart_obj_t machine_uart_obj_t;
 
 void uart_init0(void);
 void uart_deinit(void);
 void uart_irq_handler(mp_uint_t uart_id);
 
-bool uart_rx_any(machine_hard_uart_obj_t *uart_obj);
-int uart_rx_char(machine_hard_uart_obj_t *uart_obj);
-void uart_tx_strn(machine_hard_uart_obj_t *uart_obj, const char *str, uint len);
-void uart_tx_strn_cooked(machine_hard_uart_obj_t *uart_obj, const char *str, uint len);
+bool uart_rx_any(machine_uart_obj_t *uart_obj);
+int uart_rx_char(machine_uart_obj_t *uart_obj);
+void uart_tx_strn(machine_uart_obj_t *uart_obj, const char *str, uint len);
+void uart_tx_strn_cooked(machine_uart_obj_t *uart_obj, const char *str, uint len);
 
 #endif
diff --git a/ports/nrf/modules/os/modos.c b/ports/nrf/modules/os/modos.c
index 7654ac119b..ebe5045515 100644
--- a/ports/nrf/modules/os/modos.c
+++ b/ports/nrf/modules/os/modos.c
@@ -34,11 +34,11 @@
 #include "lib/oofatfs/ff.h"
 #include "lib/oofatfs/diskio.h"
 #include "modules/os/microbitfs.h"
+#include "extmod/modmachine.h"
 #include "extmod/vfs.h"
 #include "extmod/vfs_fat.h"
 #include "extmod/vfs_lfs.h"
 #include "genhdr/mpversion.h"
-#include "uart.h"
 
 #if MICROPY_HW_ENABLE_RNG
 #include "drivers/rng.h"
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 79a74e8566..929065b49a 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -206,6 +206,9 @@
 #define MICROPY_PY_MACHINE_PWM_INCLUDEFILE "ports/nrf/modules/machine/soft_pwm.c"
 #endif
 
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/nrf/modules/machine/uart.c"
+#define MICROPY_PY_MACHINE_UART_READCHAR_WRITECHAR (1)
+
 #ifndef MICROPY_PY_MACHINE_TIMER_NRF
 #define MICROPY_PY_MACHINE_TIMER_NRF (1)
 #endif
diff --git a/ports/nrf/mphalport.c b/ports/nrf/mphalport.c
index a2eec7fceb..7a51e187b7 100644
--- a/ports/nrf/mphalport.c
+++ b/ports/nrf/mphalport.c
@@ -378,4 +378,4 @@ const char *nrfx_error_code_lookup(uint32_t err_code) {
 
 #endif // NRFX_LOG_ENABLED
 
-MP_REGISTER_ROOT_POINTER(struct _machine_hard_uart_obj_t *board_stdio_uart);
+MP_REGISTER_ROOT_POINTER(struct _machine_uart_obj_t *board_stdio_uart);
diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index 4630c30fc0..fb7bb67e48 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -322,7 +322,6 @@ SRC_C += \
 	machine_dac.c \
 	machine_i2c.c \
 	machine_spi.c \
-	machine_uart.c \
 	machine_pin.c \
 	machine_rtc.c \
 	machine_sdcard.c \
diff --git a/ports/renesas-ra/machine_uart.c b/ports/renesas-ra/machine_uart.c
index f365223afa..6c520f941f 100644
--- a/ports/renesas-ra/machine_uart.c
+++ b/ports/renesas-ra/machine_uart.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013-2018 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2021,2022 Renesas Electronics Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -25,12 +25,9 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <string.h>
-#include <stdarg.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
 
-#include "py/runtime.h"
-#include "py/stream.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "shared/runtime/interrupt_char.h"
@@ -41,44 +38,13 @@
 
 #define DEFAULT_UART_BAUDRATE (115200)
 
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) }, \
+
 STATIC const char *_parity_name[] = {"None", "ODD", "EVEN"};
 
-/// \moduleref pyb
-/// \class UART - duplex serial communication bus
-///
-/// UART implements the standard UART/USART duplex serial communications protocol.  At
-/// the physical level it consists of 2 lines: RX and TX.  The unit of communication
-/// is a character (not to be confused with a string character) which can be 8 or 9
-/// bits wide.
-///
-/// UART objects can be created and initialised using:
-///
-///     from pyb import UART
-///
-///     uart = UART(1, 9600)                         # init with given baudrate
-///     uart.init(9600, bits=8, parity=None, stop=1) # init with given parameters
-///
-/// Bits can be 8 or 9.  Parity can be None, 0 (even) or 1 (odd).  Stop can be 1 or 2.
-///
-/// A UART object acts like a stream object and reading and writing is done
-/// using the standard stream methods:
-///
-///     uart.read(10)       # read 10 characters, returns a bytes object
-///     uart.read()         # read all available characters
-///     uart.readline()     # read a line
-///     uart.readinto(buf)  # read and store into the given buffer
-///     uart.write('abc')   # write the 3 characters
-///
-/// Individual characters can be read/written using:
-///
-///     uart.readchar()     # read 1 character and returns it as an integer
-///     uart.writechar(42)  # write 1 character
-///
-/// To check if there is anything to be read, use:
-///
-///     uart.any()               # returns True if any characters waiting
-
-STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     if (!self->is_enabled) {
         mp_printf(print, "UART(%u)", self->uart_id);
@@ -116,7 +82,7 @@ STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_pri
 ///   - `timeout_char` is the timeout in milliseconds to wait between characters.
 ///   - `flow` is RTS | CTS where RTS == 256, CTS == 512
 ///   - `read_buf_len` is the character length of the read buffer (0 to disable).
-STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_baudrate, MP_ARG_INT | MP_ARG_INT, {.u_int = 0} },
         { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
@@ -238,7 +204,6 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
     #endif
 
     // enable_irq(irq_state);
-    return mp_const_none;
 }
 
 /// \classmethod \constructor(bus, ...)
@@ -256,7 +221,7 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
 ///   - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)`
 ///   - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)`
 ///   - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)`
-STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     // check arguments
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
@@ -335,43 +300,33 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args,
     // start the peripheral
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+    mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
 
     return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC mp_obj_t machine_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    return machine_uart_init_helper(MP_OBJ_TO_PTR(args[0]), n_args - 1, args + 1, kw_args);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init);
-
-/// \method deinit()
-/// Turn off the UART bus.
-STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+// Turn off the UART bus.
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
     uart_deinit(self);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_deinit_obj, machine_uart_deinit);
 
-/// \method any()
-/// Return `True` if any characters waiting, else `False`.
-STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self));
+// Return number of characters waiting.
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
+    return uart_rx_any(self);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any);
 
-/// \method writechar(char)
-/// Write a single character on the bus.  `char` is an integer to write.
-/// Return value: `None`.
-STATIC mp_obj_t machine_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+// Return `true` if all characters have been sent.
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    return !uart_tx_busy(self);
+}
 
-    // get the character to write (might be 9 bits)
-    uint16_t data = mp_obj_get_int(char_in);
+// Send a break condition.
+STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self) {
+    ra_sci_tx_break((uint32_t)self->uart_id);
+}
 
-    // write the character
+// Write a single character on the bus.  `data` is an integer to write.
+STATIC void mp_machine_uart_writechar(machine_uart_obj_t *self, uint16_t data) {
     int errcode;
     if (uart_tx_wait(self, self->timeout)) {
         uart_tx_data(self, &data, 1, &errcode);
@@ -382,53 +337,26 @@ STATIC mp_obj_t machine_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
     if (errcode != 0) {
         mp_raise_OSError(errcode);
     }
-
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_uart_writechar_obj, machine_uart_writechar);
 
-/// \method readchar()
-/// Receive a single character on the bus.
-/// Return value: The character read, as an integer.  Returns -1 on timeout.
-STATIC mp_obj_t machine_uart_readchar(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+// Receive a single character on the bus.
+// Return value: The character read, as an integer.  Returns -1 on timeout.
+STATIC mp_int_t mp_machine_uart_readchar(machine_uart_obj_t *self) {
     if (uart_rx_wait(self, self->timeout)) {
-        return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self));
+        return uart_rx_char(self);
     } else {
         // return -1 on timeout
-        return MP_OBJ_NEW_SMALL_INT(-1);
+        return -1;
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_readchar_obj, machine_uart_readchar);
-
-// uart.sendbreak()
-STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    ra_sci_tx_break((uint32_t)self->uart_id);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_sendbreak_obj, machine_uart_sendbreak);
-
-// \method uart.txdone()
-// Return `True` if all characters have been sent.
-STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return uart_tx_busy(self) ? mp_const_false : mp_const_true;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
-
-// irq(handler, trigger, hard)
-STATIC mp_obj_t machine_uart_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    mp_arg_val_t args[MP_IRQ_ARG_INIT_NUM_ARGS];
-    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_IRQ_ARG_INIT_NUM_ARGS, mp_irq_init_args, args);
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
 
+STATIC mp_irq_obj_t *mp_machine_uart_irq(machine_uart_obj_t *self, bool any_args, mp_arg_val_t *args) {
     if (self->mp_irq_obj == NULL) {
         self->mp_irq_trigger = 0;
         self->mp_irq_obj = mp_irq_new(&uart_irq_methods, MP_OBJ_FROM_PTR(self));
     }
 
-    if (n_args > 1 || kw_args->used != 0) {
+    if (any_args) {
         // Check the handler
         mp_obj_t handler = args[MP_IRQ_ARG_INIT_handler].u_obj;
         if (handler != mp_const_none && !mp_obj_is_callable(handler)) {
@@ -450,41 +378,10 @@ STATIC mp_obj_t machine_uart_irq(size_t n_args, const mp_obj_t *pos_args, mp_map
         uart_irq_config(self, true);
     }
 
-    return MP_OBJ_FROM_PTR(self->mp_irq_obj);
+    return self->mp_irq_obj;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_irq_obj, 1, machine_uart_irq);
 
-STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = {
-    // instance methods
-
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_uart_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) },
-    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
-    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
-
-    /// \method read([nbytes])
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    /// \method readline()
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)},
-    /// \method readinto(buf[, nbytes])
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    /// \method write(buf)
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-    { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_uart_irq_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&machine_uart_writechar_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&machine_uart_readchar_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_uart_sendbreak_obj) },
-
-    // class constants
-    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) },
-    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table);
-
-STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     byte *buf = buf_in;
 
@@ -526,7 +423,7 @@ STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t siz
     }
 }
 
-STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     const byte *buf = buf_in;
 
@@ -555,7 +452,7 @@ STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uin
     }
 }
 
-STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_uint_t ret;
     if (request == MP_STREAM_POLL) {
@@ -587,21 +484,4 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr
     return ret;
 }
 
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = machine_uart_read,
-    .write = machine_uart_write,
-    .ioctl = machine_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_uart_make_new,
-    locals_dict, &machine_uart_locals_dict,
-    print, machine_uart_print,
-    protocol, &uart_stream_p
-    );
-
 MP_REGISTER_ROOT_POINTER(struct _machine_uart_obj_t *machine_uart_obj_all[MICROPY_HW_MAX_UART + MICROPY_HW_MAX_LPUART]);
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index 9b93b69480..62c9a392c0 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -296,7 +296,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
     #endif
+    #if MICROPY_PY_MACHINE_UART
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
     #if MICROPY_PY_MACHINE_PWM
     #if MICROPY_HW_ENABLE_HW_PWM
diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h
index 1dd0eec758..ddf212221d 100644
--- a/ports/renesas-ra/modmachine.h
+++ b/ports/renesas-ra/modmachine.h
@@ -37,7 +37,6 @@ extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_i2s_type;
-extern const mp_obj_type_t machine_uart_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
 
diff --git a/ports/renesas-ra/mpconfigport.h b/ports/renesas-ra/mpconfigport.h
index 71d5cab820..d3bc3235fd 100644
--- a/ports/renesas-ra/mpconfigport.h
+++ b/ports/renesas-ra/mpconfigport.h
@@ -151,6 +151,11 @@
 #define MICROPY_PY_MACHINE_PWM_DUTY (1)
 #define MICROPY_PY_MACHINE_PWM_INCLUDEFILE  "ports/renesas-ra/machine_pwm.c"
 #endif
+#define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/renesas-ra/machine_uart.c"
+#define MICROPY_PY_MACHINE_UART_IRQ (1)
+#define MICROPY_PY_MACHINE_UART_READCHAR_WRITECHAR (1)
+#define MICROPY_PY_MACHINE_UART_SENDBREAK (1)
 #if MICROPY_HW_ENABLE_HW_DAC
 #define MICROPY_PY_MACHINE_DAC      (1)
 #endif
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index c93a8a55d8..16f2d8a247 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -123,7 +123,6 @@ set(MICROPY_SOURCE_PORT
     machine_rtc.c
     machine_spi.c
     machine_timer.c
-    machine_uart.c
     main.c
     modmachine.c
     modrp2.c
diff --git a/ports/rp2/machine_uart.c b/ports/rp2/machine_uart.c
index 09870e78f0..044c905ff2 100644
--- a/ports/rp2/machine_uart.c
+++ b/ports/rp2/machine_uart.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2020-2021 Damien P. George
+ * Copyright (c) 2020-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,12 +24,12 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "py/stream.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
+
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "py/ringbuf.h"
-#include "modmachine.h"
 
 #include "hardware/irq.h"
 #include "hardware/uart.h"
@@ -183,7 +183,13 @@ STATIC void uart1_irq_handler(void) {
 /******************************************************************************/
 // MicroPython bindings for UART
 
-STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_INV_TX), MP_ROM_INT(UART_INVERT_TX) }, \
+    { MP_ROM_QSTR(MP_QSTR_INV_RX), MP_ROM_INT(UART_INVERT_RX) }, \
+    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) }, \
+
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, tx=%d, rx=%d, "
         "txbuf=%d, rxbuf=%d, timeout=%u, timeout_char=%u, invert=%s)",
@@ -192,7 +198,7 @@ STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_pri
         self->timeout, self->timeout_char, _invert_name[self->invert]);
 }
 
-STATIC void machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_tx, ARG_rx, ARG_cts, ARG_rts,
            ARG_timeout, ARG_timeout_char, ARG_invert, ARG_flow, ARG_txbuf, ARG_rxbuf};
     static const mp_arg_t allowed_args[] = {
@@ -378,7 +384,7 @@ STATIC void machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, co
     }
 }
 
-STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
     // Get UART bus.
@@ -393,20 +399,12 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args,
     // Initialise the UART peripheral.
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+    mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
 
     return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC mp_obj_t machine_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    // Initialise the UART peripheral.
-    machine_uart_init_helper(args[0], n_args - 1, args + 1, kw_args);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init);
-
-STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
     uart_deinit(self->uart);
     if (self->uart_id == 0) {
         irq_set_enabled(UART0_IRQ, false);
@@ -416,63 +414,26 @@ STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) {
     self->baudrate = 0;
     MP_STATE_PORT(rp2_uart_rx_buffer[self->uart_id]) = NULL;
     MP_STATE_PORT(rp2_uart_tx_buffer[self->uart_id]) = NULL;
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_deinit_obj, machine_uart_deinit);
 
-STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
     // get all bytes from the fifo first
     uart_drain_rx_fifo(self);
-    return MP_OBJ_NEW_SMALL_INT(ringbuf_avail(&self->read_buffer));
+    return ringbuf_avail(&self->read_buffer);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any);
 
-STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    return ringbuf_avail(&self->write_buffer) == 0
+           && (uart_get_hw(self->uart)->fr & UART_UARTFR_TXFE_BITS);
+}
+
+STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self) {
     uart_set_break(self->uart, true);
     mp_hal_delay_us(13000000 / self->baudrate + 1);
     uart_set_break(self->uart, false);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_sendbreak_obj, machine_uart_sendbreak);
 
-STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
-    if (ringbuf_avail(&self->write_buffer) == 0 &&
-        uart_get_hw(self->uart)->fr & UART_UARTFR_TXFE_BITS) {
-        return mp_const_true;
-    } else {
-        return mp_const_false;
-    }
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
-
-STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_uart_deinit_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) },
-    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_uart_sendbreak_obj) },
-    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_INV_TX), MP_ROM_INT(UART_INVERT_TX) },
-    { MP_ROM_QSTR(MP_QSTR_INV_RX), MP_ROM_INT(UART_INVERT_RX) },
-
-    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) },
-    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) },
-
-};
-STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table);
-
-STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint64_t t = time_us_64() + (uint64_t)self->timeout * 1000;
     uint64_t timeout_char_us = (uint64_t)self->timeout_char * 1000;
@@ -502,7 +463,7 @@ STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t siz
     return size;
 }
 
-STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint64_t t = time_us_64() + (uint64_t)self->timeout * 1000;
     uint64_t timeout_char_us = (uint64_t)self->timeout_char * 1000;
@@ -542,7 +503,7 @@ STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uin
     return size;
 }
 
-STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
     machine_uart_obj_t *self = self_in;
     mp_uint_t ret;
     if (request == MP_STREAM_POLL) {
@@ -560,7 +521,7 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint
         uint64_t timeout = time_us_64() +
             (uint64_t)(33 + self->write_buffer.size) * 13000000ll * 2 / self->baudrate;
         do {
-            if (machine_uart_txdone((mp_obj_t)self) == mp_const_true) {
+            if (mp_machine_uart_txdone(self)) {
                 return 0;
             }
             MICROPY_EVENT_POLL_HOOK
@@ -574,22 +535,5 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint
     return ret;
 }
 
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = machine_uart_read,
-    .write = machine_uart_write,
-    .ioctl = machine_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_uart_make_new,
-    print, machine_uart_print,
-    protocol, &uart_stream_p,
-    locals_dict, &machine_uart_locals_dict
-    );
-
 MP_REGISTER_ROOT_POINTER(void *rp2_uart_rx_buffer[2]);
 MP_REGISTER_ROOT_POINTER(void *rp2_uart_tx_buffer[2]);
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index b47af1aba0..94d87cf314 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -267,7 +267,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
+    #if MICROPY_PY_MACHINE_UART
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
+    #endif
     #if MICROPY_PY_MACHINE_WDT
     { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
     #endif
diff --git a/ports/rp2/modmachine.h b/ports/rp2/modmachine.h
index 5feafdcea8..4e4245ed38 100644
--- a/ports/rp2/modmachine.h
+++ b/ports/rp2/modmachine.h
@@ -8,7 +8,6 @@ extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
-extern const mp_obj_type_t machine_uart_type;
 
 void machine_pin_init(void);
 void machine_pin_deinit(void);
diff --git a/ports/rp2/mpbthciport.c b/ports/rp2/mpbthciport.c
index 7722360920..16d50ddacc 100644
--- a/ports/rp2/mpbthciport.c
+++ b/ports/rp2/mpbthciport.c
@@ -28,6 +28,7 @@
 #include "py/stream.h"
 #include "py/mphal.h"
 #include "extmod/modbluetooth.h"
+#include "extmod/modmachine.h"
 #include "extmod/mpbthci.h"
 #include "modmachine.h"
 #include "mpbthciport.h"
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index b69a06387e..0a63312734 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -129,6 +129,9 @@
 #define MICROPY_PY_MACHINE_SPI_MSB              (SPI_MSB_FIRST)
 #define MICROPY_PY_MACHINE_SPI_LSB              (SPI_LSB_FIRST)
 #define MICROPY_PY_MACHINE_SOFTSPI              (1)
+#define MICROPY_PY_MACHINE_UART                 (1)
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE     "ports/rp2/machine_uart.c"
+#define MICROPY_PY_MACHINE_UART_SENDBREAK       (1)
 #define MICROPY_PY_MACHINE_WDT                  (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE      "ports/rp2/machine_wdt.c"
 #define MICROPY_PY_ONEWIRE                      (1)
diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index 841e6a9928..7d27367b6b 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -102,7 +102,6 @@ SRC_C += \
 	machine_pin.c \
 	machine_rtc.c \
 	machine_spi.c \
-	machine_uart.c \
 	main.c \
 	modmachine.c \
 	modsamd.c \
diff --git a/ports/samd/machine_i2c.c b/ports/samd/machine_i2c.c
index f3364950bd..5606d7b627 100644
--- a/ports/samd/machine_i2c.c
+++ b/ports/samd/machine_i2c.c
@@ -71,8 +71,6 @@ typedef struct _machine_i2c_obj_t {
     uint8_t *buf;
 } machine_i2c_obj_t;
 
-extern Sercom *sercom_instance[];
-
 STATIC void i2c_send_command(Sercom *i2c, uint8_t command) {
     i2c->I2CM.CTRLB.bit.CMD = command;
     while (i2c->I2CM.SYNCBUSY.bit.SYSOP) {
diff --git a/ports/samd/machine_spi.c b/ports/samd/machine_spi.c
index 99eb4e17f6..b00eb42716 100644
--- a/ports/samd/machine_spi.c
+++ b/ports/samd/machine_spi.c
@@ -60,8 +60,6 @@ typedef struct _machine_spi_obj_t {
     size_t rxlen;
 } machine_spi_obj_t;
 
-extern Sercom *sercom_instance[];
-
 void common_spi_irq_handler(int spi_id) {
     // handle Sercom IRQ RXC
     machine_spi_obj_t *self = MP_STATE_PORT(sercom_table[spi_id]);
diff --git a/ports/samd/machine_uart.c b/ports/samd/machine_uart.c
index b95e158b3c..c081b8814b 100644
--- a/ports/samd/machine_uart.c
+++ b/ports/samd/machine_uart.c
@@ -24,17 +24,14 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
-#include "py/runtime.h"
 
-#if MICROPY_PY_MACHINE_I2C || MICROPY_PY_MACHINE_SPI || MICROPY_PY_MACHINE_UART
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
 
 #include "py/mphal.h"
-#include "py/stream.h"
 #include "py/ringbuf.h"
-#include "modmachine.h"
 #include "samd_soc.h"
 #include "pin_af.h"
-#include "clock_config.h"
 
 #define DEFAULT_UART_BAUDRATE (115200)
 #define DEFAULT_BUFFER_SIZE (256)
@@ -43,6 +40,8 @@
 #define FLOW_CONTROL_RTS (1)
 #define FLOW_CONTROL_CTS (2)
 
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS
+
 typedef struct _machine_uart_obj_t {
     mp_obj_base_t base;
     uint8_t id;
@@ -69,30 +68,6 @@ typedef struct _machine_uart_obj_t {
     #endif
 } machine_uart_obj_t;
 
-Sercom *sercom_instance[] = SERCOM_INSTS;
-MP_REGISTER_ROOT_POINTER(void *sercom_table[SERCOM_INST_NUM]);
-
-// Common Sercom functions used by all Serial devices
-void sercom_enable(Sercom *uart, int state) {
-    uart->USART.CTRLA.bit.ENABLE = state; // Set the state on/off
-    // Wait for the Registers to update.
-    while (uart->USART.SYNCBUSY.bit.ENABLE) {
-    }
-}
-
-void sercom_deinit_all(void) {
-    for (int i = 0; i < SERCOM_INST_NUM; i++) {
-        Sercom *uart = sercom_instance[i];
-        uart->USART.INTENCLR.reg = 0xff;
-        sercom_register_irq(i, NULL);
-        sercom_enable(uart, 0);
-        MP_STATE_PORT(sercom_table[i]) = NULL;
-    }
-}
-#endif
-
-#if MICROPY_PY_MACHINE_UART
-
 STATIC const char *_parity_name[] = {"None", "", "0", "1"};  // Is defined as 0, 2, 3
 
 // Irq handler
@@ -137,7 +112,7 @@ void common_uart_irq_handler(int uart_id) {
     }
 }
 
-STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, "
         "timeout=%u, timeout_char=%u, rxbuf=%d"
@@ -160,7 +135,7 @@ STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_pri
         );
 }
 
-STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_tx, ARG_rx,
            ARG_timeout, ARG_timeout_char, ARG_rxbuf, ARG_txbuf, ARG_rts, ARG_cts };
     static const mp_arg_t allowed_args[] = {
@@ -373,11 +348,9 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
 
         sercom_enable(uart, 1);
     }
-
-    return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
     // Get UART bus.
@@ -405,17 +378,12 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args,
 
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    return machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+    mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+
+    return MP_OBJ_FROM_PTR(self);
 }
 
-// uart.init(baud, [kwargs])
-STATIC mp_obj_t machine_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    return machine_uart_init_helper(args[0], n_args - 1, args + 1, kw_args);
-}
-MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init);
-
-STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
     // Check if it is the active object.
     if (MP_STATE_PORT(sercom_table)[self->id] == self) {
         Sercom *uart = sercom_instance[self->id];
@@ -426,18 +394,23 @@ STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) {
             sercom_enable(uart, 0);
         }
     }
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_deinit_obj, machine_uart_deinit);
 
-STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return MP_OBJ_NEW_SMALL_INT(ringbuf_avail(&self->read_buffer));
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
+    return ringbuf_avail(&self->read_buffer);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any);
 
-STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    Sercom *uart = sercom_instance[self->id];
+
+    return uart->USART.INTFLAG.bit.DRE
+           #if MICROPY_HW_UART_TXBUF
+           && ringbuf_avail(&self->write_buffer) == 0
+           #endif
+           && uart->USART.INTFLAG.bit.TXC;
+}
+
+STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self) {
     uint32_t break_time_us = 13 * 1000000 / self->baudrate;
 
     // Wait for the tx buffer to drain.
@@ -457,43 +430,9 @@ STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) {
     mp_hal_pin_high(self->tx);
     // Enable Mux again
     mp_hal_set_pin_mux(self->tx, self->tx_pad_config.alt_fct);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_sendbreak_obj, machine_uart_sendbreak);
 
-STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
-    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    Sercom *uart = sercom_instance[self->id];
-
-    if (uart->USART.INTFLAG.bit.DRE
-        #if MICROPY_HW_UART_TXBUF
-        && ringbuf_avail(&self->write_buffer) == 0
-        #endif
-        && uart->USART.INTFLAG.bit.TXC) {
-        return mp_const_true;
-    } else {
-        return mp_const_false;
-    }
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
-
-STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_uart_deinit_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_uart_sendbreak_obj) },
-    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table);
-
-STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     Sercom *uart = sercom_instance[self->id];
     uint64_t t = mp_hal_ticks_ms_64() + self->timeout;
@@ -523,7 +462,7 @@ STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t siz
     return size;
 }
 
-STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     size_t i = 0;
     const uint8_t *src = buf_in;
@@ -562,7 +501,7 @@ STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uin
     return size;
 }
 
-STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
     machine_uart_obj_t *self = self_in;
     mp_uint_t ret;
     Sercom *uart = sercom_instance[self->id];
@@ -588,7 +527,7 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint
             #endif
             ) * 13000 * 2 / self->baudrate;
         do {
-            if (machine_uart_txdone((mp_obj_t)self) == mp_const_true) {
+            if (mp_machine_uart_txdone(self)) {
                 return 0;
             }
             MICROPY_EVENT_POLL_HOOK
@@ -601,21 +540,3 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint
     }
     return ret;
 }
-
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = machine_uart_read,
-    .write = machine_uart_write,
-    .ioctl = machine_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_uart_make_new,
-    print, machine_uart_print,
-    protocol, &uart_stream_p,
-    locals_dict, &machine_uart_locals_dict
-    );
-#endif
diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h
index 81b3078171..4f287bde35 100644
--- a/ports/samd/modmachine.h
+++ b/ports/samd/modmachine.h
@@ -40,9 +40,6 @@ extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_spi_type;
 #endif
 extern const mp_obj_type_t machine_timer_type;
-#if MICROPY_PY_MACHINE_UART
-extern const mp_obj_type_t machine_uart_type;
-#endif
 #if MICROPY_PY_MACHINE_RTC
 extern const mp_obj_type_t machine_rtc_type;
 #endif
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 201e657c68..801408ed47 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -116,6 +116,8 @@
 #ifndef MICROPY_PY_MACHINE_UART
 #define MICROPY_PY_MACHINE_UART             (1)
 #endif
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/samd/machine_uart.c"
+#define MICROPY_PY_MACHINE_UART_SENDBREAK   (1)
 #define MICROPY_PY_MACHINE_TIMER            (1)
 #define MICROPY_SOFT_TIMER_TICKS_MS         systick_ms
 #define MICROPY_PY_OS_DUPTERM               (3)
diff --git a/ports/samd/samd_soc.c b/ports/samd/samd_soc.c
index a81e7c6881..ad5910301c 100644
--- a/ports/samd/samd_soc.c
+++ b/ports/samd/samd_soc.c
@@ -128,3 +128,28 @@ void samd_init(void) {
     machine_rtc_start(false);
     #endif
 }
+
+#if MICROPY_PY_MACHINE_I2C || MICROPY_PY_MACHINE_SPI || MICROPY_PY_MACHINE_UART
+
+Sercom *sercom_instance[] = SERCOM_INSTS;
+MP_REGISTER_ROOT_POINTER(void *sercom_table[SERCOM_INST_NUM]);
+
+// Common Sercom functions used by all Serial devices
+void sercom_enable(Sercom *uart, int state) {
+    uart->USART.CTRLA.bit.ENABLE = state; // Set the state on/off
+    // Wait for the Registers to update.
+    while (uart->USART.SYNCBUSY.bit.ENABLE) {
+    }
+}
+
+void sercom_deinit_all(void) {
+    for (int i = 0; i < SERCOM_INST_NUM; i++) {
+        Sercom *uart = sercom_instance[i];
+        uart->USART.INTENCLR.reg = 0xff;
+        sercom_register_irq(i, NULL);
+        sercom_enable(uart, 0);
+        MP_STATE_PORT(sercom_table[i]) = NULL;
+    }
+}
+
+#endif
diff --git a/ports/samd/samd_soc.h b/ports/samd/samd_soc.h
index e8560b50e8..1848cf7db1 100644
--- a/ports/samd/samd_soc.h
+++ b/ports/samd/samd_soc.h
@@ -30,6 +30,8 @@
 #include "sam.h"
 #include "clock_config.h"
 
+extern Sercom *sercom_instance[];
+
 void samd_init(void);
 void samd_main(void);
 
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index d1248e0bb8..d3b80ab5b1 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -335,7 +335,6 @@ SRC_C += \
 	machine_bitstream.c \
 	machine_i2c.c \
 	machine_spi.c \
-	machine_uart.c \
 	modmachine.c \
 	modpyb.c \
 	modstm.c \
diff --git a/ports/stm32/machine_uart.c b/ports/stm32/machine_uart.c
index ba8c1a9111..6f1a7f9a2d 100644
--- a/ports/stm32/machine_uart.c
+++ b/ports/stm32/machine_uart.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013-2018 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,12 +24,11 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <string.h>
-#include <stdarg.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
+
+#include <string.h>
 
-#include "py/runtime.h"
-#include "py/stream.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "shared/runtime/interrupt_char.h"
@@ -38,43 +37,13 @@
 #include "irq.h"
 #include "pendsv.h"
 
-/// \moduleref pyb
-/// \class UART - duplex serial communication bus
-///
-/// UART implements the standard UART/USART duplex serial communications protocol.  At
-/// the physical level it consists of 2 lines: RX and TX.  The unit of communication
-/// is a character (not to be confused with a string character) which can be 8 or 9
-/// bits wide.
-///
-/// UART objects can be created and initialised using:
-///
-///     from pyb import UART
-///
-///     uart = UART(1, 9600)                         # init with given baudrate
-///     uart.init(9600, bits=8, parity=None, stop=1) # init with given parameters
-///
-/// Bits can be 8 or 9.  Parity can be None, 0 (even) or 1 (odd).  Stop can be 1 or 2.
-///
-/// A UART object acts like a stream object and reading and writing is done
-/// using the standard stream methods:
-///
-///     uart.read(10)       # read 10 characters, returns a bytes object
-///     uart.read()         # read all available characters
-///     uart.readline()     # read a line
-///     uart.readinto(buf)  # read and store into the given buffer
-///     uart.write('abc')   # write the 3 characters
-///
-/// Individual characters can be read/written using:
-///
-///     uart.readchar()     # read 1 character and returns it as an integer
-///     uart.writechar(42)  # write 1 character
-///
-/// To check if there is anything to be read, use:
-///
-///     uart.any()               # returns True if any characters waiting
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_IRQ_RXIDLE), MP_ROM_INT(UART_FLAG_IDLE) }, \
 
-STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     if (!self->is_enabled) {
         #if defined(LPUART1)
         if (self->uart_id == PYB_LPUART_1) {
@@ -171,7 +140,7 @@ STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_k
 ///   - `timeout_char` is the timeout in milliseconds to wait between characters.
 ///   - `flow` is RTS | CTS where RTS == 256, CTS == 512
 ///   - `read_buf_len` is the character length of the read buffer (0 to disable).
-STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} },
         { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
@@ -292,8 +261,6 @@ STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const
     if (20 * baudrate_diff > actual_baudrate) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("set baudrate %d is not within 5%% of desired value"), actual_baudrate);
     }
-
-    return mp_const_none;
 }
 
 /// \classmethod \constructor(bus, ...)
@@ -311,7 +278,7 @@ STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const
 ///   - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)`
 ///   - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)`
 ///   - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)`
-STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     // check arguments
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
@@ -391,59 +358,56 @@ STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("UART(%d) is reserved"), uart_id);
     }
 
-    pyb_uart_obj_t *self;
-    if (MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] == NULL) {
+    machine_uart_obj_t *self;
+    if (MP_STATE_PORT(machine_uart_obj_all)[uart_id - 1] == NULL) {
         // create new UART object
-        self = m_new0(pyb_uart_obj_t, 1);
-        self->base.type = &pyb_uart_type;
+        self = m_new0(machine_uart_obj_t, 1);
+        self->base.type = &machine_uart_type;
         self->uart_id = uart_id;
-        MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] = self;
+        MP_STATE_PORT(machine_uart_obj_all)[uart_id - 1] = self;
     } else {
         // reference existing UART object
-        self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1];
+        self = MP_STATE_PORT(machine_uart_obj_all)[uart_id - 1];
     }
 
     if (n_args > 1 || n_kw > 0) {
         // start the peripheral
         mp_map_t kw_args;
         mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-        pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+        mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
     }
 
     return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    return pyb_uart_init_helper(MP_OBJ_TO_PTR(args[0]), n_args - 1, args + 1, kw_args);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init);
-
-/// \method deinit()
-/// Turn off the UART bus.
-STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+// Turn off the UART bus.
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
     uart_deinit(self);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit);
 
-/// \method any()
-/// Return `True` if any characters waiting, else `False`.
-STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self));
+// Return number of characters waiting.
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
+    return uart_rx_any(self);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any);
 
-/// \method writechar(char)
-/// Write a single character on the bus.  `char` is an integer to write.
-/// Return value: `None`.
-STATIC mp_obj_t pyb_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+// Since uart.write() waits up to the last byte, uart.txdone() always returns True.
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    (void)self;
+    return true;
+}
 
-    // get the character to write (might be 9 bits)
-    uint16_t data = mp_obj_get_int(char_in);
+// Send a break condition.
+STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self) {
+    #if defined(STM32F0) || defined(STM32F7) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
+    self->uartx->RQR = USART_RQR_SBKRQ; // write-only register
+    #else
+    self->uartx->CR1 |= USART_CR1_SBK;
+    #endif
+}
 
+// Write a single character on the bus.  `data` is an integer to write.
+// The `data` can be up to 9 bits.
+STATIC void mp_machine_uart_writechar(machine_uart_obj_t *self, uint16_t data) {
     // write the character
     int errcode;
     if (uart_tx_wait(self, self->timeout)) {
@@ -455,49 +419,26 @@ STATIC mp_obj_t pyb_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
     if (errcode != 0) {
         mp_raise_OSError(errcode);
     }
-
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_uart_writechar_obj, pyb_uart_writechar);
 
-/// \method readchar()
-/// Receive a single character on the bus.
-/// Return value: The character read, as an integer.  Returns -1 on timeout.
-STATIC mp_obj_t pyb_uart_readchar(mp_obj_t self_in) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+// Receive a single character on the bus.
+// Return value: The character read, as an integer.  Returns -1 on timeout.
+STATIC mp_int_t mp_machine_uart_readchar(machine_uart_obj_t *self) {
     if (uart_rx_wait(self, self->timeout)) {
-        return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self));
+        return uart_rx_char(self);
     } else {
         // return -1 on timeout
-        return MP_OBJ_NEW_SMALL_INT(-1);
+        return -1;
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_readchar_obj, pyb_uart_readchar);
-
-// uart.sendbreak()
-STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    #if defined(STM32F0) || defined(STM32F7) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
-    self->uartx->RQR = USART_RQR_SBKRQ; // write-only register
-    #else
-    self->uartx->CR1 |= USART_CR1_SBK;
-    #endif
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak);
-
-// irq(handler, trigger, hard)
-STATIC mp_obj_t pyb_uart_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    mp_arg_val_t args[MP_IRQ_ARG_INIT_NUM_ARGS];
-    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_IRQ_ARG_INIT_NUM_ARGS, mp_irq_init_args, args);
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
 
+STATIC mp_irq_obj_t *mp_machine_uart_irq(machine_uart_obj_t *self, bool any_args, mp_arg_val_t *args) {
     if (self->mp_irq_obj == NULL) {
         self->mp_irq_trigger = 0;
         self->mp_irq_obj = mp_irq_new(&uart_irq_methods, MP_OBJ_FROM_PTR(self));
     }
 
-    if (n_args > 1 || kw_args->used != 0) {
+    if (any_args) {
         // Check the handler
         mp_obj_t handler = args[MP_IRQ_ARG_INIT_handler].u_obj;
         if (handler != mp_const_none && !mp_obj_is_callable(handler)) {
@@ -519,51 +460,11 @@ STATIC mp_obj_t pyb_uart_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
         uart_irq_config(self, true);
     }
 
-    return MP_OBJ_FROM_PTR(self->mp_irq_obj);
+    return self->mp_irq_obj;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_irq_obj, 1, pyb_uart_irq);
 
-// Since uart.write() waits up to the last byte, uart.txdone() always returns True.
-STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) {
-    return mp_const_true;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone);
-
-STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = {
-    // instance methods
-
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) },
-
-    /// \method read([nbytes])
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    /// \method readline()
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)},
-    /// \method readinto(buf[, nbytes])
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    /// \method write(buf)
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-    { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
-    { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_uart_irq_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&pyb_uart_writechar_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&pyb_uart_readchar_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&pyb_uart_sendbreak_obj) },
-    { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) },
-
-    // class constants
-    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) },
-    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) },
-
-    // IRQ flags
-    { MP_ROM_QSTR(MP_QSTR_IRQ_RXIDLE), MP_ROM_INT(UART_FLAG_IDLE) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table);
-
-STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     byte *buf = buf_in;
 
     // check that size is a multiple of character width
@@ -604,8 +505,8 @@ STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, i
     }
 }
 
-STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     const byte *buf = buf_in;
 
     // check that size is a multiple of character width
@@ -631,8 +532,8 @@ STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t
     }
 }
 
-STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_uint_t ret;
     if (request == MP_STREAM_POLL) {
         uintptr_t flags = arg;
@@ -652,20 +553,3 @@ STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t a
     }
     return ret;
 }
-
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = pyb_uart_read,
-    .write = pyb_uart_write,
-    .ioctl = pyb_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    pyb_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, pyb_uart_make_new,
-    print, pyb_uart_print,
-    protocol, &uart_stream_p,
-    locals_dict, &pyb_uart_locals_dict
-    );
diff --git a/ports/stm32/main.c b/ports/stm32/main.c
index 9e5dafc9f6..06ba74f759 100644
--- a/ports/stm32/main.c
+++ b/ports/stm32/main.c
@@ -40,6 +40,7 @@
 #include "lib/littlefs/lfs1_util.h"
 #include "lib/littlefs/lfs2.h"
 #include "lib/littlefs/lfs2_util.h"
+#include "extmod/modmachine.h"
 #include "extmod/modnetwork.h"
 #include "extmod/vfs.h"
 #include "extmod/vfs_fat.h"
@@ -96,7 +97,7 @@ STATIC pyb_thread_t pyb_thread_main;
 #ifndef MICROPY_HW_UART_REPL_RXBUF
 #define MICROPY_HW_UART_REPL_RXBUF (260)
 #endif
-STATIC pyb_uart_obj_t pyb_uart_repl_obj;
+STATIC machine_uart_obj_t pyb_uart_repl_obj;
 STATIC uint8_t pyb_uart_repl_rxbuf[MICROPY_HW_UART_REPL_RXBUF];
 #endif
 
@@ -431,7 +432,7 @@ void stm32_main(uint32_t reset_mode) {
 
     #if defined(MICROPY_HW_UART_REPL)
     // Set up a UART REPL using a statically allocated object
-    pyb_uart_repl_obj.base.type = &pyb_uart_type;
+    pyb_uart_repl_obj.base.type = &machine_uart_type;
     pyb_uart_repl_obj.uart_id = MICROPY_HW_UART_REPL;
     pyb_uart_repl_obj.is_static = true;
     pyb_uart_repl_obj.timeout = 0;
@@ -439,7 +440,7 @@ void stm32_main(uint32_t reset_mode) {
     uart_init(&pyb_uart_repl_obj, MICROPY_HW_UART_REPL_BAUD, UART_WORDLENGTH_8B, UART_PARITY_NONE, UART_STOPBITS_1, 0);
     uart_set_rxbuf(&pyb_uart_repl_obj, sizeof(pyb_uart_repl_rxbuf), pyb_uart_repl_rxbuf);
     uart_attach_to_repl(&pyb_uart_repl_obj, true);
-    MP_STATE_PORT(pyb_uart_obj_all)[MICROPY_HW_UART_REPL - 1] = &pyb_uart_repl_obj;
+    MP_STATE_PORT(machine_uart_obj_all)[MICROPY_HW_UART_REPL - 1] = &pyb_uart_repl_obj;
     MP_STATE_PORT(pyb_stdio_uart) = &pyb_uart_repl_obj;
     #endif
 
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 070d0e1169..3bbac66879 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -448,7 +448,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     #if MICROPY_PY_MACHINE_I2S
     { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
     #endif
-    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&pyb_uart_type) },
+    #if MICROPY_PY_MACHINE_UART
+    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
+    #endif
     #if MICROPY_PY_MACHINE_WDT
     { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
     #endif
diff --git a/ports/stm32/modos.c b/ports/stm32/modos.c
index 43543aa55e..bd0101cab9 100644
--- a/ports/stm32/modos.c
+++ b/ports/stm32/modos.c
@@ -25,6 +25,7 @@
  */
 
 #include "py/runtime.h"
+#include "extmod/modmachine.h"
 #include "rng.h"
 #include "usb.h"
 #include "uart.h"
@@ -47,7 +48,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_urandom_obj, mp_os_urandom);
 
 bool mp_os_dupterm_is_builtin_stream(mp_const_obj_t stream) {
     const mp_obj_type_t *type = mp_obj_get_type(stream);
-    return type == &pyb_uart_type
+    return type == &machine_uart_type
            #if MICROPY_HW_ENABLE_USB
            || type == &pyb_usb_vcp_type
            #endif
@@ -55,7 +56,7 @@ bool mp_os_dupterm_is_builtin_stream(mp_const_obj_t stream) {
 }
 
 void mp_os_dupterm_stream_detached_attached(mp_obj_t stream_detached, mp_obj_t stream_attached) {
-    if (mp_obj_get_type(stream_detached) == &pyb_uart_type) {
+    if (mp_obj_get_type(stream_detached) == &machine_uart_type) {
         uart_attach_to_repl(MP_OBJ_TO_PTR(stream_detached), false);
     }
     #if MICROPY_HW_ENABLE_USB
@@ -64,7 +65,7 @@ void mp_os_dupterm_stream_detached_attached(mp_obj_t stream_detached, mp_obj_t s
     }
     #endif
 
-    if (mp_obj_get_type(stream_attached) == &pyb_uart_type) {
+    if (mp_obj_get_type(stream_attached) == &machine_uart_type) {
         uart_attach_to_repl(MP_OBJ_TO_PTR(stream_attached), true);
     }
     #if MICROPY_HW_ENABLE_USB
diff --git a/ports/stm32/modpyb.c b/ports/stm32/modpyb.c
index 831ece74a9..0bf2d6a2c3 100644
--- a/ports/stm32/modpyb.c
+++ b/ports/stm32/modpyb.c
@@ -52,6 +52,7 @@
 #include "usb.h"
 #include "portmodules.h"
 #include "modmachine.h"
+#include "extmod/modmachine.h"
 #include "extmod/modnetwork.h"
 #include "extmod/vfs.h"
 #include "extmod/modtime.h"
@@ -103,7 +104,7 @@ STATIC mp_obj_t pyb_repl_uart(size_t n_args, const mp_obj_t *args) {
                 uart_attach_to_repl(MP_STATE_PORT(pyb_stdio_uart), false);
                 MP_STATE_PORT(pyb_stdio_uart) = NULL;
             }
-        } else if (mp_obj_get_type(args[0]) == &pyb_uart_type) {
+        } else if (mp_obj_get_type(args[0]) == &machine_uart_type) {
             MP_STATE_PORT(pyb_stdio_uart) = MP_OBJ_TO_PTR(args[0]);
             uart_attach_to_repl(MP_STATE_PORT(pyb_stdio_uart), true);
         } else {
@@ -232,7 +233,7 @@ STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&pyb_i2c_type) },
     #endif
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&pyb_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) },
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
     #if MICROPY_HW_ENABLE_CAN
     { MP_ROM_QSTR(MP_QSTR_CAN), MP_ROM_PTR(&pyb_can_type) },
     #endif
diff --git a/ports/stm32/mpbthciport.c b/ports/stm32/mpbthciport.c
index fe061a1240..e764c69844 100644
--- a/ports/stm32/mpbthciport.c
+++ b/ports/stm32/mpbthciport.c
@@ -150,9 +150,10 @@ int mp_bluetooth_hci_uart_readpacket(mp_bluetooth_hci_uart_readchar_t handler) {
 /******************************************************************************/
 // HCI over UART
 
+#include "extmod/modmachine.h"
 #include "uart.h"
 
-pyb_uart_obj_t mp_bluetooth_hci_uart_obj;
+machine_uart_obj_t mp_bluetooth_hci_uart_obj;
 mp_irq_obj_t mp_bluetooth_hci_uart_irq_obj;
 
 static uint8_t hci_uart_rxbuf[768];
@@ -169,13 +170,13 @@ int mp_bluetooth_hci_uart_init(uint32_t port, uint32_t baudrate) {
     DEBUG_printf("mp_bluetooth_hci_uart_init (stm32)\n");
 
     // bits (8), stop (1), parity (none) and flow (rts/cts) are assumed to match MYNEWT_VAL_BLE_HCI_UART_ constants in syscfg.h.
-    mp_bluetooth_hci_uart_obj.base.type = &pyb_uart_type;
+    mp_bluetooth_hci_uart_obj.base.type = &machine_uart_type;
     mp_bluetooth_hci_uart_obj.uart_id = port;
     mp_bluetooth_hci_uart_obj.is_static = true;
     // We don't want to block indefinitely, but expect flow control is doing its job.
     mp_bluetooth_hci_uart_obj.timeout = 200;
     mp_bluetooth_hci_uart_obj.timeout_char = 200;
-    MP_STATE_PORT(pyb_uart_obj_all)[mp_bluetooth_hci_uart_obj.uart_id - 1] = &mp_bluetooth_hci_uart_obj;
+    MP_STATE_PORT(machine_uart_obj_all)[mp_bluetooth_hci_uart_obj.uart_id - 1] = &mp_bluetooth_hci_uart_obj;
 
     // Initialise the UART.
     uart_init(&mp_bluetooth_hci_uart_obj, baudrate, UART_WORDLENGTH_8B, UART_PARITY_NONE, UART_STOPBITS_1, UART_HWCONTROL_RTS | UART_HWCONTROL_CTS);
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index 0cb929f558..00ded86e16 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -128,6 +128,11 @@
 #define MICROPY_PY_MACHINE_SPI_LSB  (SPI_FIRSTBIT_LSB)
 #define MICROPY_PY_MACHINE_SOFTSPI  (1)
 #define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/stm32/machine_uart.c"
+#define MICROPY_PY_MACHINE_UART_IRQ (1)
+#define MICROPY_PY_MACHINE_UART_READCHAR_WRITECHAR (1)
+#define MICROPY_PY_MACHINE_UART_SENDBREAK (1)
 #define MICROPY_PY_MACHINE_WDT      (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE "ports/stm32/machine_wdt.c"
 #endif
diff --git a/ports/stm32/mphalport.c b/ports/stm32/mphalport.c
index 8edafa9bfc..f8a5d66fc9 100644
--- a/ports/stm32/mphalport.c
+++ b/ports/stm32/mphalport.c
@@ -182,4 +182,4 @@ void mp_hal_get_mac_ascii(int idx, size_t chr_off, size_t chr_len, char *dest) {
     }
 }
 
-MP_REGISTER_ROOT_POINTER(struct _pyb_uart_obj_t *pyb_stdio_uart);
+MP_REGISTER_ROOT_POINTER(struct _machine_uart_obj_t *pyb_stdio_uart);
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
index 908361874d..0d648a6fc1 100644
--- a/ports/stm32/uart.c
+++ b/ports/stm32/uart.c
@@ -117,12 +117,12 @@
 
 #endif
 
-typedef struct _pyb_uart_irq_map_t {
+typedef struct _machine_uart_irq_map_t {
     uint16_t irq_en;
     uint16_t flag;
-} pyb_uart_irq_map_t;
+} machine_uart_irq_map_t;
 
-STATIC const pyb_uart_irq_map_t mp_uart_irq_map[] = {
+STATIC const machine_uart_irq_map_t mp_uart_irq_map[] = {
     { USART_CR1_IDLEIE, UART_FLAG_IDLE}, // RX idle
     { USART_CR1_PEIE,   UART_FLAG_PE},   // parity error
     #if defined(STM32G0) || defined(STM32WL)
@@ -162,18 +162,18 @@ void uart_init0(void) {
 
 // unregister all interrupt sources
 void uart_deinit_all(void) {
-    for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) {
-        pyb_uart_obj_t *uart_obj = MP_STATE_PORT(pyb_uart_obj_all)[i];
+    for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(machine_uart_obj_all)); i++) {
+        machine_uart_obj_t *uart_obj = MP_STATE_PORT(machine_uart_obj_all)[i];
         if (uart_obj != NULL && !uart_obj->is_static) {
             uart_deinit(uart_obj);
-            MP_STATE_PORT(pyb_uart_obj_all)[i] = NULL;
+            MP_STATE_PORT(machine_uart_obj_all)[i] = NULL;
         }
     }
 }
 
 bool uart_exists(int uart_id) {
-    if (uart_id > MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all))) {
-        // safeguard against pyb_uart_obj_all array being configured too small
+    if (uart_id > MP_ARRAY_SIZE(MP_STATE_PORT(machine_uart_obj_all))) {
+        // safeguard against machine_uart_obj_all array being configured too small
         return false;
     }
     switch (uart_id) {
@@ -243,7 +243,7 @@ bool uart_exists(int uart_id) {
 }
 
 // assumes Init parameters have been set up correctly
-bool uart_init(pyb_uart_obj_t *uart_obj,
+bool uart_init(machine_uart_obj_t *uart_obj,
     uint32_t baudrate, uint32_t bits, uint32_t parity, uint32_t stop, uint32_t flow) {
     USART_TypeDef *UARTx;
     IRQn_Type irqn;
@@ -641,7 +641,7 @@ bool uart_init(pyb_uart_obj_t *uart_obj,
     return true;
 }
 
-void uart_irq_config(pyb_uart_obj_t *self, bool enable) {
+void uart_irq_config(machine_uart_obj_t *self, bool enable) {
     if (self->mp_irq_trigger) {
         for (size_t entry = 0; entry < MP_ARRAY_SIZE(mp_uart_irq_map); ++entry) {
             if (mp_uart_irq_map[entry].flag & MP_UART_RESERVED_FLAGS) {
@@ -658,7 +658,7 @@ void uart_irq_config(pyb_uart_obj_t *self, bool enable) {
     }
 }
 
-void uart_set_rxbuf(pyb_uart_obj_t *self, size_t len, void *buf) {
+void uart_set_rxbuf(machine_uart_obj_t *self, size_t len, void *buf) {
     self->read_buf_head = 0;
     self->read_buf_tail = 0;
     self->read_buf_len = len;
@@ -670,7 +670,7 @@ void uart_set_rxbuf(pyb_uart_obj_t *self, size_t len, void *buf) {
     }
 }
 
-void uart_deinit(pyb_uart_obj_t *self) {
+void uart_deinit(machine_uart_obj_t *self) {
     self->is_enabled = false;
 
     // Disable UART
@@ -809,11 +809,11 @@ void uart_deinit(pyb_uart_obj_t *self) {
     }
 }
 
-void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached) {
+void uart_attach_to_repl(machine_uart_obj_t *self, bool attached) {
     self->attached_to_repl = attached;
 }
 
-uint32_t uart_get_source_freq(pyb_uart_obj_t *self) {
+uint32_t uart_get_source_freq(machine_uart_obj_t *self) {
     uint32_t uart_clk = 0;
 
     #if defined(STM32F0) || defined(STM32G0)
@@ -921,7 +921,7 @@ uint32_t uart_get_source_freq(pyb_uart_obj_t *self) {
     return uart_clk;
 }
 
-uint32_t uart_get_baudrate(pyb_uart_obj_t *self) {
+uint32_t uart_get_baudrate(machine_uart_obj_t *self) {
     #if defined(LPUART1)
     if (self->uart_id == PYB_LPUART_1) {
         return LL_LPUART_GetBaudRate(self->uartx, uart_get_source_freq(self)
@@ -938,7 +938,7 @@ uint32_t uart_get_baudrate(pyb_uart_obj_t *self) {
         LL_USART_OVERSAMPLING_16);
 }
 
-void uart_set_baudrate(pyb_uart_obj_t *self, uint32_t baudrate) {
+void uart_set_baudrate(machine_uart_obj_t *self, uint32_t baudrate) {
     #if defined(LPUART1)
     if (self->uart_id == PYB_LPUART_1) {
         LL_LPUART_SetBaudRate(self->uartx, uart_get_source_freq(self),
@@ -956,7 +956,7 @@ void uart_set_baudrate(pyb_uart_obj_t *self, uint32_t baudrate) {
         LL_USART_OVERSAMPLING_16, baudrate);
 }
 
-mp_uint_t uart_rx_any(pyb_uart_obj_t *self) {
+mp_uint_t uart_rx_any(machine_uart_obj_t *self) {
     int buffer_bytes = self->read_buf_head - self->read_buf_tail;
     if (buffer_bytes < 0) {
         return buffer_bytes + self->read_buf_len;
@@ -970,7 +970,7 @@ mp_uint_t uart_rx_any(pyb_uart_obj_t *self) {
 // Waits at most timeout milliseconds for at least 1 char to become ready for
 // reading (from buf or for direct reading).
 // Returns true if something available, false if not.
-bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
+bool uart_rx_wait(machine_uart_obj_t *self, uint32_t timeout) {
     uint32_t start = HAL_GetTick();
     for (;;) {
         if (self->read_buf_tail != self->read_buf_head || UART_RXNE_IS_SET(self->uartx)) {
@@ -984,7 +984,7 @@ bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
 }
 
 // assumes there is a character available
-int uart_rx_char(pyb_uart_obj_t *self) {
+int uart_rx_char(machine_uart_obj_t *self) {
     if (self->read_buf_tail != self->read_buf_head) {
         // buffering via IRQ
         int data;
@@ -1023,7 +1023,7 @@ int uart_rx_char(pyb_uart_obj_t *self) {
 
 // Waits at most timeout milliseconds for TX register to become empty.
 // Returns true if can write, false if can't.
-bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
+bool uart_tx_wait(machine_uart_obj_t *self, uint32_t timeout) {
     uint32_t start = HAL_GetTick();
     for (;;) {
         if (uart_tx_avail(self)) {
@@ -1038,7 +1038,7 @@ bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
 
 // Waits at most timeout milliseconds for UART flag to be set.
 // Returns true if flag is/was set, false on timeout.
-STATIC bool uart_wait_flag_set(pyb_uart_obj_t *self, uint32_t flag, uint32_t timeout) {
+STATIC bool uart_wait_flag_set(machine_uart_obj_t *self, uint32_t flag, uint32_t timeout) {
     // Note: we don't use WFI to idle in this loop because UART tx doesn't generate
     // an interrupt and the flag can be set quickly if the baudrate is large.
     uint32_t start = HAL_GetTick();
@@ -1062,7 +1062,7 @@ STATIC bool uart_wait_flag_set(pyb_uart_obj_t *self, uint32_t flag, uint32_t tim
 // num_chars - number of characters to send (9-bit chars count for 2 bytes from src)
 // *errcode - returns 0 for success, MP_Exxx on error
 // returns the number of characters sent (valid even if there was an error)
-size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode) {
+size_t uart_tx_data(machine_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode) {
     if (num_chars == 0) {
         *errcode = 0;
         return 0;
@@ -1124,7 +1124,7 @@ size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars,
     return num_tx;
 }
 
-void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) {
+void uart_tx_strn(machine_uart_obj_t *uart_obj, const char *str, uint len) {
     int errcode;
     uart_tx_data(uart_obj, str, len, &errcode);
 }
@@ -1135,7 +1135,7 @@ void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) {
 // - On STM32F4 the IRQ flags are cleared by reading SR then DR.
 void uart_irq_handler(mp_uint_t uart_id) {
     // get the uart object
-    pyb_uart_obj_t *self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1];
+    machine_uart_obj_t *self = MP_STATE_PORT(machine_uart_obj_all)[uart_id - 1];
 
     if (self == NULL) {
         // UART object has not been set, so we can't do anything, not
@@ -1216,7 +1216,7 @@ void uart_irq_handler(mp_uint_t uart_id) {
 }
 
 STATIC mp_uint_t uart_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uart_irq_config(self, false);
     self->mp_irq_trigger = new_trigger;
     uart_irq_config(self, true);
@@ -1224,7 +1224,7 @@ STATIC mp_uint_t uart_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) {
 }
 
 STATIC mp_uint_t uart_irq_info(mp_obj_t self_in, mp_uint_t info_type) {
-    pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     if (info_type == MP_IRQ_INFO_FLAGS) {
         return self->mp_irq_flags;
     } else if (info_type == MP_IRQ_INFO_TRIGGERS) {
@@ -1238,4 +1238,4 @@ const mp_irq_methods_t uart_irq_methods = {
     .info = uart_irq_info,
 };
 
-MP_REGISTER_ROOT_POINTER(struct _pyb_uart_obj_t *pyb_uart_obj_all[MICROPY_HW_MAX_UART + MICROPY_HW_MAX_LPUART]);
+MP_REGISTER_ROOT_POINTER(struct _machine_uart_obj_t *machine_uart_obj_all[MICROPY_HW_MAX_UART + MICROPY_HW_MAX_LPUART]);
diff --git a/ports/stm32/uart.h b/ports/stm32/uart.h
index 61d1ac4397..956cbb044f 100644
--- a/ports/stm32/uart.h
+++ b/ports/stm32/uart.h
@@ -57,7 +57,7 @@ typedef enum {
 // OR-ed IRQ flags which should not be touched by the user
 #define MP_UART_RESERVED_FLAGS UART_FLAG_RXNE
 
-typedef struct _pyb_uart_obj_t {
+typedef struct _machine_uart_obj_t {
     mp_obj_base_t base;
     USART_TypeDef *uartx;
     pyb_uart_t uart_id : 8;
@@ -75,34 +75,33 @@ typedef struct _pyb_uart_obj_t {
     uint16_t mp_irq_trigger;            // user IRQ trigger mask
     uint16_t mp_irq_flags;              // user IRQ active IRQ flags
     mp_irq_obj_t *mp_irq_obj;           // user IRQ object
-} pyb_uart_obj_t;
+} machine_uart_obj_t;
 
-extern const mp_obj_type_t pyb_uart_type;
 extern const mp_irq_methods_t uart_irq_methods;
 
 void uart_init0(void);
 void uart_deinit_all(void);
 bool uart_exists(int uart_id);
-bool uart_init(pyb_uart_obj_t *uart_obj,
+bool uart_init(machine_uart_obj_t *uart_obj,
     uint32_t baudrate, uint32_t bits, uint32_t parity, uint32_t stop, uint32_t flow);
-void uart_irq_config(pyb_uart_obj_t *self, bool enable);
-void uart_set_rxbuf(pyb_uart_obj_t *self, size_t len, void *buf);
-void uart_deinit(pyb_uart_obj_t *uart_obj);
+void uart_irq_config(machine_uart_obj_t *self, bool enable);
+void uart_set_rxbuf(machine_uart_obj_t *self, size_t len, void *buf);
+void uart_deinit(machine_uart_obj_t *uart_obj);
 void uart_irq_handler(mp_uint_t uart_id);
 
-void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached);
-uint32_t uart_get_source_freq(pyb_uart_obj_t *self);
-uint32_t uart_get_baudrate(pyb_uart_obj_t *self);
-void uart_set_baudrate(pyb_uart_obj_t *self, uint32_t baudrate);
+void uart_attach_to_repl(machine_uart_obj_t *self, bool attached);
+uint32_t uart_get_source_freq(machine_uart_obj_t *self);
+uint32_t uart_get_baudrate(machine_uart_obj_t *self);
+void uart_set_baudrate(machine_uart_obj_t *self, uint32_t baudrate);
 
-mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj);
-bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout);
-int uart_rx_char(pyb_uart_obj_t *uart_obj);
-bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout);
-size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode);
-void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len);
+mp_uint_t uart_rx_any(machine_uart_obj_t *uart_obj);
+bool uart_rx_wait(machine_uart_obj_t *self, uint32_t timeout);
+int uart_rx_char(machine_uart_obj_t *uart_obj);
+bool uart_tx_wait(machine_uart_obj_t *self, uint32_t timeout);
+size_t uart_tx_data(machine_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode);
+void uart_tx_strn(machine_uart_obj_t *uart_obj, const char *str, uint len);
 
-static inline bool uart_tx_avail(pyb_uart_obj_t *self) {
+static inline bool uart_tx_avail(machine_uart_obj_t *self) {
     #if defined(STM32F4) || defined(STM32L1)
     return self->uartx->SR & USART_SR_TXE;
     #elif defined(STM32G0) || defined(STM32H7) || defined(STM32WL)
diff --git a/ports/zephyr/CMakeLists.txt b/ports/zephyr/CMakeLists.txt
index ddc613a2c0..8834aae96f 100644
--- a/ports/zephyr/CMakeLists.txt
+++ b/ports/zephyr/CMakeLists.txt
@@ -40,7 +40,6 @@ set(MICROPY_SOURCE_PORT
     machine_i2c.c
     machine_spi.c
     machine_pin.c
-    machine_uart.c
     modbluetooth_zephyr.c
     modmachine.c
     modsocket.c
diff --git a/ports/zephyr/machine_uart.c b/ports/zephyr/machine_uart.c
index b989c0f481..2c4b3a470b 100644
--- a/ports/zephyr/machine_uart.c
+++ b/ports/zephyr/machine_uart.c
@@ -25,18 +25,16 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
 
 #include <zephyr/zephyr.h>
 #include <zephyr/drivers/uart.h>
 
-#include "py/runtime.h"
-#include "py/stream.h"
 #include "py/mperrno.h"
-#include "py/objstr.h"
-#include "modmachine.h"
+
+// The UART class doesn't have any constants for this port.
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS
 
 typedef struct _machine_uart_obj_t {
     mp_obj_base_t base;
@@ -50,7 +48,7 @@ STATIC const char *_stop_bits_name[] = {"0.5", "1", "1.5", "2"};
 STATIC const char *_data_bits_name[] = {"5", "6", "7", "8", "9"};
 STATIC const char *_flow_control_name[] = {"None", "RTS/CTS", "DTR/DSR"};
 
-STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     struct uart_config config;
     uart_config_get(self->dev, &config);
@@ -60,7 +58,7 @@ STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_pri
         self->timeout, self->timeout_char);
 }
 
-STATIC void machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_timeout, ARG_timeout_char };
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
@@ -73,7 +71,7 @@ STATIC void machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, co
     self->timeout_char = args[ARG_timeout_char].u_int;
 }
 
-STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
     machine_uart_obj_t *self = mp_obj_malloc(machine_uart_obj_t, &machine_uart_type);
@@ -84,20 +82,26 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args,
 
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+    mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
 
     return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table);
+STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
+    (void)self;
+}
 
-STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
+    (void)self;
+    mp_raise_NotImplementedError(NULL); // TODO
+}
+
+STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    (void)self;
+    mp_raise_NotImplementedError(NULL); // TODO
+}
+
+STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint8_t *buffer = (uint8_t *)buf_in;
     uint8_t data;
@@ -118,7 +122,7 @@ STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t siz
     return bytes_read;
 }
 
-STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint8_t *buffer = (uint8_t *)buf_in;
 
@@ -129,7 +133,7 @@ STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uin
     return size;
 }
 
-STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
     mp_uint_t ret;
 
     if (request == MP_STREAM_POLL) {
@@ -146,20 +150,3 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr
     }
     return ret;
 }
-
-STATIC const mp_stream_p_t uart_stream_p = {
-    .read = machine_uart_read,
-    .write = machine_uart_write,
-    .ioctl = machine_uart_ioctl,
-    .is_text = false,
-};
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_ITER_IS_STREAM,
-    make_new, machine_uart_make_new,
-    print, machine_uart_print,
-    protocol, &uart_stream_p,
-    locals_dict, &machine_uart_locals_dict
-    );
diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c
index 6334168054..14ddf027ad 100644
--- a/ports/zephyr/modmachine.c
+++ b/ports/zephyr/modmachine.c
@@ -37,6 +37,7 @@
 #include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "modmachine.h"
 
 #if MICROPY_PY_MACHINE
@@ -74,7 +75,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     #if MICROPY_PY_MACHINE_SPI
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
     #endif
+    #if MICROPY_PY_MACHINE_UART
     { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) },
     { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
 
diff --git a/ports/zephyr/modmachine.h b/ports/zephyr/modmachine.h
index a605ada0de..520b363965 100644
--- a/ports/zephyr/modmachine.h
+++ b/ports/zephyr/modmachine.h
@@ -6,7 +6,6 @@
 extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_spi_type;
-extern const mp_obj_type_t machine_uart_type;
 
 MP_DECLARE_CONST_FUN_OBJ_0(machine_info_obj);
 
diff --git a/ports/zephyr/mpconfigport.h b/ports/zephyr/mpconfigport.h
index 2f3e314db6..49d00f4ca6 100644
--- a/ports/zephyr/mpconfigport.h
+++ b/ports/zephyr/mpconfigport.h
@@ -69,6 +69,8 @@
 #define MICROPY_PY_MACHINE_SPI_MSB (SPI_TRANSFER_MSB)
 #define MICROPY_PY_MACHINE_SPI_LSB (SPI_TRANSFER_LSB)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
+#define MICROPY_PY_MACHINE_UART     (1)
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/zephyr/machine_uart.c"
 #define MICROPY_PY_STRUCT           (0)
 #ifdef CONFIG_NETWORKING
 // If we have networking, we likely want errno comfort

From 90023b4dcf7bfeb6eccd5d0d13efc4832cf187e7 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 26 Oct 2023 11:39:40 +1100
Subject: [PATCH 057/310] extmod/modmachine: Clean up decls of machine types to
 use common ones.

The machine_i2c_type, machine_spi_type and machine_timer_type symbols are
already declared in extmod/modmachine.h and should not be declared anywhere
else.

Also move declarations of machine_pin_type and machine_rtc_type to the
common header in extmod.

Signed-off-by: Damien George <damien@micropython.org>
---
 drivers/esp-hosted/esp_hosted_hal.c     |  3 +--
 drivers/ninaw10/nina_wifi_bsp.c         |  3 +--
 extmod/modmachine.h                     |  2 ++
 ports/esp32/boards/pins_prefix.c        |  2 +-
 ports/esp32/machine_hw_spi.c            |  2 +-
 ports/esp32/machine_i2c.c               |  2 +-
 ports/esp32/machine_pin.c               |  3 ++-
 ports/esp32/machine_rtc.c               |  2 +-
 ports/esp32/modmachine.h                |  5 -----
 ports/esp8266/modmachine.h              |  1 -
 ports/mimxrt/boards/mimxrt_prefix.c     |  1 +
 ports/mimxrt/machine_i2c.c              |  2 +-
 ports/mimxrt/machine_rtc.c              |  1 +
 ports/mimxrt/machine_spi.c              |  2 +-
 ports/mimxrt/machine_uart.c             |  2 --
 ports/mimxrt/modmachine.h               |  4 ----
 ports/mimxrt/pin.c                      |  1 +
 ports/mimxrt/pin.h                      |  1 -
 ports/nrf/modules/machine/i2c.c         |  1 +
 ports/nrf/modules/machine/i2c.h         |  2 --
 ports/nrf/modules/machine/modmachine.h  |  2 --
 ports/nrf/modules/machine/spi.c         |  1 +
 ports/nrf/modules/machine/spi.h         |  1 -
 ports/nrf/modules/machine/timer.c       |  2 +-
 ports/nrf/modules/machine/timer.h       |  2 --
 ports/renesas-ra/boards/ra_pin_prefix.c |  1 +
 ports/renesas-ra/machine_i2c.c          |  2 +-
 ports/renesas-ra/machine_pin.c          |  3 ++-
 ports/renesas-ra/machine_rtc.c          |  1 +
 ports/renesas-ra/machine_spi.c          |  2 +-
 ports/renesas-ra/main.c                 |  1 +
 ports/renesas-ra/modmachine.h           |  6 ------
 ports/renesas-ra/modos.c                |  1 +
 ports/renesas-ra/mpbthciport.c          |  2 +-
 ports/renesas-ra/pin.h                  |  1 -
 ports/renesas-ra/rtc.h                  |  1 -
 ports/renesas-ra/uart.h                 |  1 -
 ports/rp2/boards/rp2_prefix.c           |  1 +
 ports/rp2/machine_i2c.c                 |  2 +-
 ports/rp2/machine_pin.c                 |  3 ++-
 ports/rp2/machine_pin.h                 |  1 -
 ports/rp2/machine_rtc.c                 |  2 +-
 ports/rp2/machine_spi.c                 |  2 +-
 ports/rp2/modmachine.h                  |  6 ------
 ports/samd/machine_i2c.c                |  2 +-
 ports/samd/machine_rtc.c                |  2 +-
 ports/samd/machine_spi.c                |  2 +-
 ports/samd/modmachine.h                 | 11 -----------
 ports/samd/pin_af.c                     |  2 +-
 ports/samd/samd_spiflash.c              |  2 +-
 ports/stm32/machine_i2c.c               |  5 +----
 ports/stm32/machine_spi.c               |  1 +
 ports/stm32/modmachine.h                |  4 ----
 ports/stm32/spi.c                       |  1 +
 ports/stm32/spi.h                       |  1 -
 ports/zephyr/machine_i2c.c              |  2 +-
 ports/zephyr/machine_pin.c              |  1 +
 ports/zephyr/machine_spi.c              |  2 +-
 ports/zephyr/modmachine.h               |  4 ----
 59 files changed, 44 insertions(+), 87 deletions(-)

diff --git a/drivers/esp-hosted/esp_hosted_hal.c b/drivers/esp-hosted/esp_hosted_hal.c
index 4c3ecad130..e33b2cce47 100644
--- a/drivers/esp-hosted/esp_hosted_hal.c
+++ b/drivers/esp-hosted/esp_hosted_hal.c
@@ -34,9 +34,8 @@
 #include <string.h>
 
 #include "py/runtime.h"
-#include "modmachine.h"
 #include "extmod/machine_spi.h"
-#include "mpconfigboard.h"
+#include "extmod/modmachine.h"
 #ifdef MICROPY_HW_WIFI_LED
 #include "led.h"
 #endif
diff --git a/drivers/ninaw10/nina_wifi_bsp.c b/drivers/ninaw10/nina_wifi_bsp.c
index c65fb111fb..42770a33cc 100644
--- a/drivers/ninaw10/nina_wifi_bsp.c
+++ b/drivers/ninaw10/nina_wifi_bsp.c
@@ -35,9 +35,8 @@
 #include <string.h>
 
 #include "py/runtime.h"
-#include "modmachine.h"
 #include "extmod/machine_spi.h"
-#include "mpconfigboard.h"
+#include "extmod/modmachine.h"
 
 #include "nina_bsp.h"
 #include "nina_wifi_drv.h"
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index c18c55553b..2a7ce336e9 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -96,7 +96,9 @@ typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
 extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_i2s_type;
+extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_pwm_type;
+extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_uart_type;
diff --git a/ports/esp32/boards/pins_prefix.c b/ports/esp32/boards/pins_prefix.c
index 2733ddaab8..61988be7e9 100644
--- a/ports/esp32/boards/pins_prefix.c
+++ b/ports/esp32/boards/pins_prefix.c
@@ -1,4 +1,4 @@
 #include "py/obj.h"
+#include "extmod/modmachine.h"
 #include "machine_pin.h"
-#include "modmachine.h"
 #include "genhdr/pins.h"
diff --git a/ports/esp32/machine_hw_spi.c b/ports/esp32/machine_hw_spi.c
index e09c493f5b..3a1dd1064c 100644
--- a/ports/esp32/machine_hw_spi.c
+++ b/ports/esp32/machine_hw_spi.c
@@ -32,7 +32,7 @@
 #include "py/stream.h"
 #include "py/mphal.h"
 #include "extmod/machine_spi.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 
 #include "driver/spi_master.h"
 #include "soc/gpio_sig_map.h"
diff --git a/ports/esp32/machine_i2c.c b/ports/esp32/machine_i2c.c
index d498aa058d..4e3a9ee816 100644
--- a/ports/esp32/machine_i2c.c
+++ b/ports/esp32/machine_i2c.c
@@ -28,7 +28,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_i2c.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 
 #include "driver/i2c.h"
 #include "hal/i2c_ll.h"
diff --git a/ports/esp32/machine_pin.c b/ports/esp32/machine_pin.c
index 9f1bc57985..d521e08e51 100644
--- a/ports/esp32/machine_pin.c
+++ b/ports/esp32/machine_pin.c
@@ -35,9 +35,10 @@
 
 #include "py/runtime.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
+#include "extmod/virtpin.h"
 #include "mphalport.h"
 #include "modmachine.h"
-#include "extmod/virtpin.h"
 #include "machine_pin.h"
 #include "machine_rtc.h"
 #include "modesp32.h"
diff --git a/ports/esp32/machine_rtc.c b/ports/esp32/machine_rtc.c
index 3d620336c9..f7b3ae66f2 100644
--- a/ports/esp32/machine_rtc.c
+++ b/ports/esp32/machine_rtc.c
@@ -36,8 +36,8 @@
 #include "py/obj.h"
 #include "py/runtime.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
 #include "shared/timeutils/timeutils.h"
-#include "modmachine.h"
 #include "machine_rtc.h"
 
 typedef struct _machine_rtc_obj_t {
diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h
index f60715f77a..7b26df609d 100644
--- a/ports/esp32/modmachine.h
+++ b/ports/esp32/modmachine.h
@@ -9,14 +9,9 @@ typedef enum {
     MACHINE_WAKE_DEEPSLEEP=0x04
 } wake_type_t;
 
-extern const mp_obj_type_t machine_timer_type;
-extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_touchpad_type;
 extern const mp_obj_type_t machine_adcblock_type;
 extern const mp_obj_type_t machine_dac_type;
-extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_spi_type;
-extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
 
 void machine_init(void);
diff --git a/ports/esp8266/modmachine.h b/ports/esp8266/modmachine.h
index 0c6a6afbba..5a90a6c6fe 100644
--- a/ports/esp8266/modmachine.h
+++ b/ports/esp8266/modmachine.h
@@ -5,7 +5,6 @@
 
 extern const mp_obj_type_t pyb_pin_type;
 extern const mp_obj_type_t pyb_rtc_type;
-extern const mp_obj_type_t pyb_i2c_type;
 extern const mp_obj_type_t machine_hspi_type;
 
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj);
diff --git a/ports/mimxrt/boards/mimxrt_prefix.c b/ports/mimxrt/boards/mimxrt_prefix.c
index d7a2bcfc80..3097535c52 100644
--- a/ports/mimxrt/boards/mimxrt_prefix.c
+++ b/ports/mimxrt/boards/mimxrt_prefix.c
@@ -2,6 +2,7 @@
 
 #include "py/obj.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
 #include "pin.h"
 
 #define PIN_AF(_name, _af_mode, _input_daisy, _instance, _input_register, _pad_config) \
diff --git a/ports/mimxrt/machine_i2c.c b/ports/mimxrt/machine_i2c.c
index c0a3dee98a..379001acdd 100644
--- a/ports/mimxrt/machine_i2c.c
+++ b/ports/mimxrt/machine_i2c.c
@@ -28,7 +28,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_i2c.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 #include CLOCK_CONFIG_H
 #include "pin.h"
 
diff --git a/ports/mimxrt/machine_rtc.c b/ports/mimxrt/machine_rtc.c
index 169ec6b910..61b410a652 100644
--- a/ports/mimxrt/machine_rtc.c
+++ b/ports/mimxrt/machine_rtc.c
@@ -29,6 +29,7 @@
 #include "py/runtime.h"
 #include "shared/runtime/mpirq.h"
 #include "shared/timeutils/timeutils.h"
+#include "extmod/modmachine.h"
 #include "modmachine.h"
 #include "ticks.h"
 #include "fsl_snvs_lp.h"
diff --git a/ports/mimxrt/machine_spi.c b/ports/mimxrt/machine_spi.c
index bafe94b970..879687bd11 100644
--- a/ports/mimxrt/machine_spi.c
+++ b/ports/mimxrt/machine_spi.c
@@ -29,7 +29,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_spi.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 #include CLOCK_CONFIG_H
 
 #include "fsl_cache.h"
diff --git a/ports/mimxrt/machine_uart.c b/ports/mimxrt/machine_uart.c
index 7d228d9159..4dbe1d2e5e 100644
--- a/ports/mimxrt/machine_uart.c
+++ b/ports/mimxrt/machine_uart.c
@@ -73,8 +73,6 @@ typedef struct _iomux_table_t {
     uint32_t configRegister;
 } iomux_table_t;
 
-extern const mp_obj_type_t machine_uart_type;
-
 STATIC const uint8_t uart_index_table[] = MICROPY_HW_UART_INDEX;
 STATIC LPUART_Type *uart_base_ptr_table[] = LPUART_BASE_PTRS;
 static const iomux_table_t iomux_table_uart[] = {
diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h
index c6ac4eb390..34e93260f2 100644
--- a/ports/mimxrt/modmachine.h
+++ b/ports/mimxrt/modmachine.h
@@ -29,11 +29,7 @@
 
 #include "py/obj.h"
 
-extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
-extern const mp_obj_type_t machine_spi_type;
-extern const mp_obj_type_t machine_timer_type;
 
 void machine_adc_init(void);
 void machine_pin_irq_deinit(void);
diff --git a/ports/mimxrt/pin.c b/ports/mimxrt/pin.c
index fcc9863286..4403f6ac77 100644
--- a/ports/mimxrt/pin.c
+++ b/ports/mimxrt/pin.c
@@ -25,6 +25,7 @@
  */
 
 #include "py/runtime.h"
+#include "extmod/modmachine.h"
 #include "pin.h"
 
 
diff --git a/ports/mimxrt/pin.h b/ports/mimxrt/pin.h
index aa86f05e82..bf611aa989 100644
--- a/ports/mimxrt/pin.h
+++ b/ports/mimxrt/pin.h
@@ -140,7 +140,6 @@ typedef struct _machine_pin_irq_obj_t {
 
 // ------------------------------------------------------------------------------------------------------------------ //
 
-extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_pin_af_type;
 
 // ------------------------------------------------------------------------------------------------------------------ //
diff --git a/ports/nrf/modules/machine/i2c.c b/ports/nrf/modules/machine/i2c.c
index fad1b7336c..8bb9613df8 100644
--- a/ports/nrf/modules/machine/i2c.c
+++ b/ports/nrf/modules/machine/i2c.c
@@ -35,6 +35,7 @@
 #if MICROPY_PY_MACHINE_I2C
 
 #include "extmod/machine_i2c.h"
+#include "extmod/modmachine.h"
 #include "i2c.h"
 #if NRFX_TWI_ENABLED
 #include "nrfx_twi.h"
diff --git a/ports/nrf/modules/machine/i2c.h b/ports/nrf/modules/machine/i2c.h
index 5c5befc285..3c4fde983a 100644
--- a/ports/nrf/modules/machine/i2c.h
+++ b/ports/nrf/modules/machine/i2c.h
@@ -29,8 +29,6 @@
 
 #include "extmod/machine_i2c.h"
 
-extern const mp_obj_type_t machine_i2c_type;
-
 void i2c_init0(void);
 
 #endif // I2C_H__
diff --git a/ports/nrf/modules/machine/modmachine.h b/ports/nrf/modules/machine/modmachine.h
index e5412673f8..45847d407f 100644
--- a/ports/nrf/modules/machine/modmachine.h
+++ b/ports/nrf/modules/machine/modmachine.h
@@ -28,8 +28,6 @@
 #ifndef __MICROPY_INCLUDED_NRF5_MODMACHINE_H__
 #define __MICROPY_INCLUDED_NRF5_MODMACHINE_H__
 
-#include "py/mpstate.h"
-#include "py/nlr.h"
 #include "py/obj.h"
 
 void machine_init(void);
diff --git a/ports/nrf/modules/machine/spi.c b/ports/nrf/modules/machine/spi.c
index 0dee20027b..46f2eba292 100644
--- a/ports/nrf/modules/machine/spi.c
+++ b/ports/nrf/modules/machine/spi.c
@@ -36,6 +36,7 @@
 #include "py/nlr.h"
 #include "py/mphal.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "pin.h"
 #include "genhdr/pins.h"
 #include "spi.h"
diff --git a/ports/nrf/modules/machine/spi.h b/ports/nrf/modules/machine/spi.h
index e1505781ac..1a1998d25a 100644
--- a/ports/nrf/modules/machine/spi.h
+++ b/ports/nrf/modules/machine/spi.h
@@ -27,7 +27,6 @@
 #include "py/obj.h"
 
 typedef struct _machine_hard_spi_obj_t machine_hard_spi_obj_t;
-extern const mp_obj_type_t machine_spi_type;
 
 void spi_init0(void);
 void spi_transfer(const machine_hard_spi_obj_t * self,
diff --git a/ports/nrf/modules/machine/timer.c b/ports/nrf/modules/machine/timer.c
index fbef0b0ef6..db9f04c2fa 100644
--- a/ports/nrf/modules/machine/timer.c
+++ b/ports/nrf/modules/machine/timer.c
@@ -24,8 +24,8 @@
  * THE SOFTWARE.
  */
 
-#include "py/nlr.h"
 #include "py/runtime.h"
+#include "extmod/modmachine.h"
 #include "timer.h"
 #include "nrfx_timer.h"
 
diff --git a/ports/nrf/modules/machine/timer.h b/ports/nrf/modules/machine/timer.h
index bfbe07974b..e483c3928e 100644
--- a/ports/nrf/modules/machine/timer.h
+++ b/ports/nrf/modules/machine/timer.h
@@ -27,8 +27,6 @@
 #ifndef TIMER_H__
 #define TIMER_H__
 
-extern const mp_obj_type_t machine_timer_type;
-
 void timer_init0(void);
 
 #endif // TIMER_H__
diff --git a/ports/renesas-ra/boards/ra_pin_prefix.c b/ports/renesas-ra/boards/ra_pin_prefix.c
index c9aa3d8882..918c84e632 100644
--- a/ports/renesas-ra/boards/ra_pin_prefix.c
+++ b/ports/renesas-ra/boards/ra_pin_prefix.c
@@ -4,6 +4,7 @@
 
 #include "py/obj.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
 #include "pin.h"
 
 #define PIN_AD(p_name, p_pin, ad_bit, ad_channel) \
diff --git a/ports/renesas-ra/machine_i2c.c b/ports/renesas-ra/machine_i2c.c
index 16bd589964..a642b81176 100644
--- a/ports/renesas-ra/machine_i2c.c
+++ b/ports/renesas-ra/machine_i2c.c
@@ -32,7 +32,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_i2c.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 
 #include "ra_i2c.h"
 
diff --git a/ports/renesas-ra/machine_pin.c b/ports/renesas-ra/machine_pin.c
index 0e393b64e5..70f98cd03a 100644
--- a/ports/renesas-ra/machine_pin.c
+++ b/ports/renesas-ra/machine_pin.c
@@ -31,9 +31,10 @@
 
 #include "py/runtime.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
+#include "extmod/virtpin.h"
 #include "shared/runtime/mpirq.h"
 #include "modmachine.h"
-#include "extmod/virtpin.h"
 
 #include "pin.h"
 #include "extint.h"
diff --git a/ports/renesas-ra/machine_rtc.c b/ports/renesas-ra/machine_rtc.c
index e699bea0bc..6637ea44cc 100644
--- a/ports/renesas-ra/machine_rtc.c
+++ b/ports/renesas-ra/machine_rtc.c
@@ -28,6 +28,7 @@
 #include <stdio.h>
 
 #include "py/runtime.h"
+#include "extmod/modmachine.h"
 #include "shared/timeutils/timeutils.h"
 #include "extint.h"
 #include "rtc.h"
diff --git a/ports/renesas-ra/machine_spi.c b/ports/renesas-ra/machine_spi.c
index 6755ab73c2..977635f167 100644
--- a/ports/renesas-ra/machine_spi.c
+++ b/ports/renesas-ra/machine_spi.c
@@ -32,10 +32,10 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "pin.h"
 #include "spi.h"
 #include "ra/ra_spi.h"
-#include "modmachine.h"
 
 typedef struct _machine_hard_spi_obj_t {
     mp_obj_base_t base;
diff --git a/ports/renesas-ra/main.c b/ports/renesas-ra/main.c
index c4cb7cc9df..761420423e 100644
--- a/ports/renesas-ra/main.c
+++ b/ports/renesas-ra/main.c
@@ -41,6 +41,7 @@
 #include "lib/littlefs/lfs1_util.h"
 #include "lib/littlefs/lfs2.h"
 #include "lib/littlefs/lfs2_util.h"
+#include "extmod/modmachine.h"
 #include "extmod/vfs.h"
 #include "extmod/vfs_fat.h"
 #include "extmod/vfs_lfs.h"
diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h
index ddf212221d..9bb3196b37 100644
--- a/ports/renesas-ra/modmachine.h
+++ b/ports/renesas-ra/modmachine.h
@@ -29,15 +29,9 @@
 
 #include "py/obj.h"
 
-extern const mp_obj_type_t machine_timer_type;
-extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_touchpad_type;
 extern const mp_obj_type_t machine_adcblock_type;
 extern const mp_obj_type_t machine_dac_type;
-extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_spi_type;
-extern const mp_obj_type_t machine_i2s_type;
-extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
 
 
diff --git a/ports/renesas-ra/modos.c b/ports/renesas-ra/modos.c
index 0884a0b2c0..8fd11007ea 100644
--- a/ports/renesas-ra/modos.c
+++ b/ports/renesas-ra/modos.c
@@ -26,6 +26,7 @@
  */
 
 #include "py/runtime.h"
+#include "extmod/modmachine.h"
 #include "uart.h"
 #include "rng.h"
 
diff --git a/ports/renesas-ra/mpbthciport.c b/ports/renesas-ra/mpbthciport.c
index 5092f8709a..2e9f6d9166 100644
--- a/ports/renesas-ra/mpbthciport.c
+++ b/ports/renesas-ra/mpbthciport.c
@@ -29,9 +29,9 @@
 #include "py/stream.h"
 #include "py/mphal.h"
 #include "extmod/modbluetooth.h"
+#include "extmod/modmachine.h"
 #include "extmod/mpbthci.h"
 #include "shared/runtime/softtimer.h"
-#include "modmachine.h"
 #include "mpbthciport.h"
 #include "uart.h"
 
diff --git a/ports/renesas-ra/pin.h b/ports/renesas-ra/pin.h
index 32aa960754..ac84b7f66b 100644
--- a/ports/renesas-ra/pin.h
+++ b/ports/renesas-ra/pin.h
@@ -58,7 +58,6 @@ typedef struct {
     const pin_ad_obj_t *ad;
 } machine_pin_obj_t;
 
-extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t pin_af_type;
 
 // Include all of the individual pin objects
diff --git a/ports/renesas-ra/rtc.h b/ports/renesas-ra/rtc.h
index 7937203418..5f77011851 100644
--- a/ports/renesas-ra/rtc.h
+++ b/ports/renesas-ra/rtc.h
@@ -28,7 +28,6 @@
 #define MICROPY_INCLUDED_RA_RTC_H
 
 #include "py/obj.h"
-extern const mp_obj_type_t machine_rtc_type;
 
 typedef struct
 {
diff --git a/ports/renesas-ra/uart.h b/ports/renesas-ra/uart.h
index 245be24d1a..ee8eb321d5 100644
--- a/ports/renesas-ra/uart.h
+++ b/ports/renesas-ra/uart.h
@@ -89,7 +89,6 @@ typedef struct _machine_uart_obj_t {
     mp_irq_obj_t *mp_irq_obj;           // user IRQ object
 } machine_uart_obj_t;
 
-extern const mp_obj_type_t machine_uart_type;
 extern const mp_irq_methods_t uart_irq_methods;
 
 void uart_init0(void);
diff --git a/ports/rp2/boards/rp2_prefix.c b/ports/rp2/boards/rp2_prefix.c
index 50f2852a8a..5e27364cc4 100644
--- a/ports/rp2/boards/rp2_prefix.c
+++ b/ports/rp2/boards/rp2_prefix.c
@@ -1,6 +1,7 @@
 #include <stdint.h>
 #include "py/obj.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
 #include "machine_pin.h"
 
 #define AF(af_idx, af_fn, af_unit)                      \
diff --git a/ports/rp2/machine_i2c.c b/ports/rp2/machine_i2c.c
index fc4c0723a5..467c4e7e63 100644
--- a/ports/rp2/machine_i2c.c
+++ b/ports/rp2/machine_i2c.c
@@ -28,7 +28,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_i2c.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 
 #include "hardware/i2c.h"
 
diff --git a/ports/rp2/machine_pin.c b/ports/rp2/machine_pin.c
index 3470f38696..77d9e13480 100644
--- a/ports/rp2/machine_pin.c
+++ b/ports/rp2/machine_pin.c
@@ -29,10 +29,11 @@
 
 #include "py/runtime.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
+#include "extmod/virtpin.h"
 #include "shared/runtime/mpirq.h"
 #include "modmachine.h"
 #include "machine_pin.h"
-#include "extmod/virtpin.h"
 
 #include "hardware/irq.h"
 #include "hardware/regs/intctrl.h"
diff --git a/ports/rp2/machine_pin.h b/ports/rp2/machine_pin.h
index aa5ea641b7..d2a39f8e37 100644
--- a/ports/rp2/machine_pin.h
+++ b/ports/rp2/machine_pin.h
@@ -59,7 +59,6 @@ typedef struct _machine_pin_obj_t {
     const machine_pin_af_obj_t *af;
 } machine_pin_obj_t;
 
-extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_pin_af_type;
 
 // Include all of the individual pin objects
diff --git a/ports/rp2/machine_rtc.c b/ports/rp2/machine_rtc.c
index 25d65eda69..eb2e1615b4 100644
--- a/ports/rp2/machine_rtc.c
+++ b/ports/rp2/machine_rtc.c
@@ -35,10 +35,10 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
+#include "extmod/modmachine.h"
 #include "shared/timeutils/timeutils.h"
 #include "hardware/rtc.h"
 #include "pico/util/datetime.h"
-#include "modmachine.h"
 
 typedef struct _machine_rtc_obj_t {
     mp_obj_base_t base;
diff --git a/ports/rp2/machine_spi.c b/ports/rp2/machine_spi.c
index b2b879c9a8..3d7f2d6ab8 100644
--- a/ports/rp2/machine_spi.c
+++ b/ports/rp2/machine_spi.c
@@ -28,7 +28,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_spi.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 
 #include "hardware/spi.h"
 #include "hardware/dma.h"
diff --git a/ports/rp2/modmachine.h b/ports/rp2/modmachine.h
index 4e4245ed38..6ef7222791 100644
--- a/ports/rp2/modmachine.h
+++ b/ports/rp2/modmachine.h
@@ -3,12 +3,6 @@
 
 #include "py/obj.h"
 
-extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_pin_type;
-extern const mp_obj_type_t machine_rtc_type;
-extern const mp_obj_type_t machine_spi_type;
-extern const mp_obj_type_t machine_timer_type;
-
 void machine_pin_init(void);
 void machine_pin_deinit(void);
 void machine_i2s_init0(void);
diff --git a/ports/samd/machine_i2c.c b/ports/samd/machine_i2c.c
index 5606d7b627..afd5921d51 100644
--- a/ports/samd/machine_i2c.c
+++ b/ports/samd/machine_i2c.c
@@ -32,7 +32,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_i2c.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 #include "samd_soc.h"
 #include "pin_af.h"
 #include "clock_config.h"
diff --git a/ports/samd/machine_rtc.c b/ports/samd/machine_rtc.c
index 57bfa998e5..e6237f3f36 100644
--- a/ports/samd/machine_rtc.c
+++ b/ports/samd/machine_rtc.c
@@ -27,8 +27,8 @@
 
 #include "py/runtime.h"
 #include "shared/timeutils/timeutils.h"
-#include "modmachine.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
 #include "sam.h"
 
 #if MICROPY_PY_MACHINE_RTC
diff --git a/ports/samd/machine_spi.c b/ports/samd/machine_spi.c
index b00eb42716..9d9928bb04 100644
--- a/ports/samd/machine_spi.c
+++ b/ports/samd/machine_spi.c
@@ -31,7 +31,7 @@
 
 #include "py/mphal.h"
 #include "extmod/machine_spi.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 #include "samd_soc.h"
 #include "pin_af.h"
 #include "clock_config.h"
diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h
index 4f287bde35..5baaf5f7e1 100644
--- a/ports/samd/modmachine.h
+++ b/ports/samd/modmachine.h
@@ -32,17 +32,6 @@
 #if MICROPY_PY_MACHINE_DAC
 extern const mp_obj_type_t machine_dac_type;
 #endif
-#if MICROPY_PY_MACHINE_I2C
-extern const mp_obj_type_t machine_i2c_type;
-#endif
-extern const mp_obj_type_t machine_pin_type;
-#if MICROPY_PY_MACHINE_SPI
-extern const mp_obj_type_t machine_spi_type;
-#endif
-extern const mp_obj_type_t machine_timer_type;
-#if MICROPY_PY_MACHINE_RTC
-extern const mp_obj_type_t machine_rtc_type;
-#endif
 
 NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 
diff --git a/ports/samd/pin_af.c b/ports/samd/pin_af.c
index 419b814776..6de9a74778 100644
--- a/ports/samd/pin_af.c
+++ b/ports/samd/pin_af.c
@@ -31,9 +31,9 @@
 #include <stdint.h>
 #include "string.h"
 
-#include "modmachine.h"
 #include "py/runtime.h"
 #include "py/misc.h"
+#include "extmod/modmachine.h"
 #include "pin_af.h"
 #include "sam.h"
 
diff --git a/ports/samd/samd_spiflash.c b/ports/samd/samd_spiflash.c
index eaa0ec1434..833e3efa8d 100644
--- a/ports/samd/samd_spiflash.c
+++ b/ports/samd/samd_spiflash.c
@@ -31,8 +31,8 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "extmod/vfs.h"
-#include "modmachine.h"
 #include "pin_af.h"
 
 #if MICROPY_HW_SPIFLASH
diff --git a/ports/stm32/machine_i2c.c b/ports/stm32/machine_i2c.c
index f4b0b33125..1876c9a142 100644
--- a/ports/stm32/machine_i2c.c
+++ b/ports/stm32/machine_i2c.c
@@ -24,15 +24,12 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <string.h>
-
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_i2c.h"
+#include "extmod/modmachine.h"
 #include "i2c.h"
-#include "modmachine.h"
 
 #if MICROPY_HW_ENABLE_HW_I2C
 
diff --git a/ports/stm32/machine_spi.c b/ports/stm32/machine_spi.c
index c6d6015731..bc526635b4 100644
--- a/ports/stm32/machine_spi.c
+++ b/ports/stm32/machine_spi.c
@@ -26,6 +26,7 @@
 
 #include "py/runtime.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "spi.h"
 
 /******************************************************************************/
diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h
index 882057c601..096666eb5a 100644
--- a/ports/stm32/modmachine.h
+++ b/ports/stm32/modmachine.h
@@ -28,10 +28,6 @@
 
 #include "py/obj.h"
 
-extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_spi_type;
-extern const mp_obj_type_t machine_timer_type;
-
 void machine_init(void);
 void machine_deinit(void);
 void machine_i2s_init0();
diff --git a/ports/stm32/spi.c b/ports/stm32/spi.c
index 1f5996165e..a2a337f1e6 100644
--- a/ports/stm32/spi.c
+++ b/ports/stm32/spi.c
@@ -29,6 +29,7 @@
 #include "py/mphal.h"
 #include "spi.h"
 #include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 
 // Possible DMA configurations for SPI buses:
 // SPI1_TX: DMA2_Stream3.CHANNEL_3 or DMA2_Stream5.CHANNEL_3
diff --git a/ports/stm32/spi.h b/ports/stm32/spi.h
index fe7f2f6614..a8bc9d2cfd 100644
--- a/ports/stm32/spi.h
+++ b/ports/stm32/spi.h
@@ -58,7 +58,6 @@ extern const spi_t spi_obj[6];
 
 extern const mp_spi_proto_t spi_proto;
 extern const mp_obj_type_t pyb_spi_type;
-extern const mp_obj_type_t machine_spi_type;
 
 // A transfer of "len" bytes should take len*8*1000/baudrate milliseconds.
 // To simplify the calculation we assume the baudrate is never less than 8kHz
diff --git a/ports/zephyr/machine_i2c.c b/ports/zephyr/machine_i2c.c
index c261ffad0d..a4b48e996f 100644
--- a/ports/zephyr/machine_i2c.c
+++ b/ports/zephyr/machine_i2c.c
@@ -37,7 +37,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_i2c.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE_I2C
 
diff --git a/ports/zephyr/machine_pin.c b/ports/zephyr/machine_pin.c
index be0698651b..d27b590092 100644
--- a/ports/zephyr/machine_pin.c
+++ b/ports/zephyr/machine_pin.c
@@ -35,6 +35,7 @@
 #include "py/runtime.h"
 #include "py/gc.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
 #include "shared/runtime/mpirq.h"
 #include "modmachine.h"
 
diff --git a/ports/zephyr/machine_spi.c b/ports/zephyr/machine_spi.c
index 507d839c66..6475018b09 100644
--- a/ports/zephyr/machine_spi.c
+++ b/ports/zephyr/machine_spi.c
@@ -36,7 +36,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "extmod/machine_spi.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE_SPI
 
diff --git a/ports/zephyr/modmachine.h b/ports/zephyr/modmachine.h
index 520b363965..e3a69d8c1b 100644
--- a/ports/zephyr/modmachine.h
+++ b/ports/zephyr/modmachine.h
@@ -3,10 +3,6 @@
 
 #include "py/obj.h"
 
-extern const mp_obj_type_t machine_pin_type;
-extern const mp_obj_type_t machine_i2c_type;
-extern const mp_obj_type_t machine_spi_type;
-
 MP_DECLARE_CONST_FUN_OBJ_0(machine_info_obj);
 
 typedef struct _machine_pin_obj_t {

From d336c1b79b38ac4024c2342e67640400e1f81532 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 26 Oct 2023 12:06:19 +1100
Subject: [PATCH 058/310] extmod/modmachine: Consolidate simple machine headers
 into modmachine.h.

The contents of machine_bitstream.h, machine_pinbase.h, machine_pulse.h and
machine_signal.h have been moved into extmod/modmachine.h.

Signed-off-by: Damien George <damien@micropython.org>
---
 drivers/dht/dht.c                      |  2 +-
 extmod/machine_bitstream.c             |  2 +-
 extmod/machine_bitstream.h             | 37 --------------------------
 extmod/machine_pinbase.c               |  3 +--
 extmod/machine_pinbase.h               | 33 -----------------------
 extmod/machine_pulse.c                 |  2 +-
 extmod/machine_pulse.h                 | 36 -------------------------
 extmod/machine_signal.c                |  3 +--
 extmod/machine_signal.h                | 33 -----------------------
 extmod/modmachine.h                    |  9 +++++++
 ports/esp32/modmachine.c               |  3 ---
 ports/esp8266/modmachine.c             |  3 ---
 ports/esp8266/modos.c                  |  1 -
 ports/mimxrt/modmachine.c              |  3 ---
 ports/nrf/modules/machine/modmachine.c |  1 -
 ports/qemu-arm/modmachine.c            |  3 +--
 ports/renesas-ra/modmachine.c          |  2 --
 ports/rp2/modmachine.c                 |  3 ---
 ports/samd/modmachine.c                |  3 ---
 ports/stm32/machine_bitstream.c        |  2 +-
 ports/stm32/modmachine.c               |  3 ---
 ports/unix/modmachine.c                |  4 +--
 ports/zephyr/modmachine.c              |  2 --
 23 files changed, 17 insertions(+), 176 deletions(-)
 delete mode 100644 extmod/machine_bitstream.h
 delete mode 100644 extmod/machine_pinbase.h
 delete mode 100644 extmod/machine_pulse.h
 delete mode 100644 extmod/machine_signal.h

diff --git a/drivers/dht/dht.c b/drivers/dht/dht.c
index 81754ac15f..73afdee581 100644
--- a/drivers/dht/dht.c
+++ b/drivers/dht/dht.c
@@ -29,7 +29,7 @@
 #include "py/runtime.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
-#include "extmod/machine_pulse.h"
+#include "extmod/modmachine.h"
 #include "drivers/dht/dht.h"
 
 // Allow the open-drain-high call to be DHT specific for ports that need it
diff --git a/extmod/machine_bitstream.c b/extmod/machine_bitstream.c
index 30f1ff1ea3..af093a4b54 100644
--- a/extmod/machine_bitstream.c
+++ b/extmod/machine_bitstream.c
@@ -27,7 +27,7 @@
 
 #include "py/runtime.h"
 #include "py/mphal.h"
-#include "extmod/machine_bitstream.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE_BITSTREAM
 
diff --git a/extmod/machine_bitstream.h b/extmod/machine_bitstream.h
deleted file mode 100644
index 2e759aedd5..0000000000
--- a/extmod/machine_bitstream.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2021 Jim Mussared
- * Copyright (c) 2021 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_BITSTREAM_H
-#define MICROPY_INCLUDED_EXTMOD_MACHINE_BITSTREAM_H
-
-#include "py/obj.h"
-#include "py/mphal.h"
-
-void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len);
-
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bitstream_obj);
-
-#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_BITSTREAM_H
diff --git a/extmod/machine_pinbase.c b/extmod/machine_pinbase.c
index 8607e6ed3d..90c17d7ab6 100644
--- a/extmod/machine_pinbase.c
+++ b/extmod/machine_pinbase.c
@@ -27,10 +27,9 @@
 #include "py/mpconfig.h"
 #if MICROPY_PY_MACHINE
 
-#include "py/obj.h"
 #include "py/runtime.h"
+#include "extmod/modmachine.h"
 #include "extmod/virtpin.h"
-#include "extmod/machine_pinbase.h"
 
 // PinBase class
 
diff --git a/extmod/machine_pinbase.h b/extmod/machine_pinbase.h
deleted file mode 100644
index c96abbc46c..0000000000
--- a/extmod/machine_pinbase.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2016 Paul Sokolovsky
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_PINBASE_H
-#define MICROPY_INCLUDED_EXTMOD_MACHINE_PINBASE_H
-
-#include "py/obj.h"
-
-extern const mp_obj_type_t machine_pinbase_type;
-
-#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_PINBASE_H
diff --git a/extmod/machine_pulse.c b/extmod/machine_pulse.c
index 7178b22d79..157566d984 100644
--- a/extmod/machine_pulse.c
+++ b/extmod/machine_pulse.c
@@ -26,7 +26,7 @@
 
 #include "py/runtime.h"
 #include "py/mperrno.h"
-#include "extmod/machine_pulse.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE_PULSE
 
diff --git a/extmod/machine_pulse.h b/extmod/machine_pulse.h
deleted file mode 100644
index e303dca02e..0000000000
--- a/extmod/machine_pulse.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2016 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_PULSE_H
-#define MICROPY_INCLUDED_EXTMOD_MACHINE_PULSE_H
-
-#include "py/obj.h"
-#include "py/mphal.h"
-
-mp_uint_t machine_time_pulse_us(mp_hal_pin_obj_t pin, int pulse_level, mp_uint_t timeout_us);
-
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_time_pulse_us_obj);
-
-#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_PULSE_H
diff --git a/extmod/machine_signal.c b/extmod/machine_signal.c
index 7922ed7077..63fd0fe479 100644
--- a/extmod/machine_signal.c
+++ b/extmod/machine_signal.c
@@ -29,10 +29,9 @@
 
 #include <string.h>
 
-#include "py/obj.h"
 #include "py/runtime.h"
+#include "extmod/modmachine.h"
 #include "extmod/virtpin.h"
-#include "extmod/machine_signal.h"
 
 // Signal class
 
diff --git a/extmod/machine_signal.h b/extmod/machine_signal.h
deleted file mode 100644
index df1c3e2e90..0000000000
--- a/extmod/machine_signal.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2017 Paul Sokolovsky
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_SIGNAL_H
-#define MICROPY_INCLUDED_EXTMOD_MACHINE_SIGNAL_H
-
-#include "py/obj.h"
-
-extern const mp_obj_type_t machine_signal_type;
-
-#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_SIGNAL_H
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index 2a7ce336e9..4ef2bb3adb 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -27,6 +27,7 @@
 #ifndef MICROPY_INCLUDED_EXTMOD_MODMACHINE_H
 #define MICROPY_INCLUDED_EXTMOD_MODMACHINE_H
 
+#include "py/mphal.h"
 #include "py/obj.h"
 
 // Whether to enable the ADC.init() method.
@@ -97,11 +98,19 @@ extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_pin_type;
+extern const mp_obj_type_t machine_pinbase_type;
 extern const mp_obj_type_t machine_pwm_type;
 extern const mp_obj_type_t machine_rtc_type;
+extern const mp_obj_type_t machine_signal_type;
 extern const mp_obj_type_t machine_spi_type;
 extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_uart_type;
 extern const mp_obj_type_t machine_wdt_type;
 
+void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len);
+mp_uint_t machine_time_pulse_us(mp_hal_pin_obj_t pin, int pulse_level, mp_uint_t timeout_us);
+
+MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bitstream_obj);
+MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_time_pulse_us_obj);
+
 #endif // MICROPY_INCLUDED_EXTMOD_MODMACHINE_H
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 96df32d435..bed29f7c04 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -40,10 +40,7 @@
 #include "py/runtime.h"
 #include "shared/runtime/pyexec.h"
 #include "drivers/dht/dht.h"
-#include "extmod/machine_bitstream.h"
 #include "extmod/machine_mem.h"
-#include "extmod/machine_signal.h"
-#include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index d7e8ed0333..a28c7c87fe 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -36,10 +36,7 @@
 // This needs to be set before we include the RTOS headers
 #define USE_US_TIMER 1
 
-#include "extmod/machine_bitstream.h"
 #include "extmod/machine_mem.h"
-#include "extmod/machine_signal.h"
-#include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
diff --git a/ports/esp8266/modos.c b/ports/esp8266/modos.c
index 0194bf25f0..0ddcba2a32 100644
--- a/ports/esp8266/modos.c
+++ b/ports/esp8266/modos.c
@@ -35,7 +35,6 @@
 #include "extmod/vfs_fat.h"
 #include "extmod/vfs_lfs.h"
 #include "genhdr/mpversion.h"
-#include "esp_mphal.h"
 #include "user_interface.h"
 
 STATIC const char *mp_os_uname_release(void) {
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index ab7f1de485..c7d507074f 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -27,11 +27,8 @@
 
 #include "py/runtime.h"
 #include "drivers/dht/dht.h"
-#include "extmod/machine_bitstream.h"
 #include "extmod/machine_mem.h"
 #include "extmod/machine_i2c.h"
-#include "extmod/machine_pulse.h"
-#include "extmod/machine_signal.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index 4d39a29b03..df2662c62c 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -31,7 +31,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "extmod/machine_mem.h"
-#include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
diff --git a/ports/qemu-arm/modmachine.c b/ports/qemu-arm/modmachine.c
index 0d712f792e..026ab8974d 100644
--- a/ports/qemu-arm/modmachine.c
+++ b/ports/qemu-arm/modmachine.c
@@ -25,8 +25,7 @@
  */
 
 #include "extmod/machine_mem.h"
-#include "extmod/machine_pinbase.h"
-#include "extmod/machine_signal.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE
 
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index 62c9a392c0..8dbace21da 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -36,8 +36,6 @@
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "extmod/machine_mem.h"
-#include "extmod/machine_signal.h"
-#include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 94d87cf314..a111da0f00 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -28,11 +28,8 @@
 #include "py/mphal.h"
 #include "drivers/dht/dht.h"
 #include "shared/runtime/pyexec.h"
-#include "extmod/machine_bitstream.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_mem.h"
-#include "extmod/machine_pulse.h"
-#include "extmod/machine_signal.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 97718401a3..4060ea5153 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -25,11 +25,8 @@
  */
 
 #include "py/runtime.h"
-#include "extmod/machine_bitstream.h"
 #include "extmod/machine_mem.h"
-#include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
-#include "extmod/machine_signal.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "drivers/dht/dht.h"
diff --git a/ports/stm32/machine_bitstream.c b/ports/stm32/machine_bitstream.c
index 3e1a7d6f1b..ed5cf1802e 100644
--- a/ports/stm32/machine_bitstream.c
+++ b/ports/stm32/machine_bitstream.c
@@ -26,7 +26,7 @@
 
 #include "py/runtime.h"
 #include "py/mphal.h"
-#include "extmod/machine_bitstream.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE_BITSTREAM
 
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 3bbac66879..98456dc6cb 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -32,10 +32,7 @@
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "drivers/dht/dht.h"
-#include "extmod/machine_bitstream.h"
 #include "extmod/machine_mem.h"
-#include "extmod/machine_signal.h"
-#include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
diff --git a/ports/unix/modmachine.c b/ports/unix/modmachine.c
index dd3cbf96c0..2c1e0bed60 100644
--- a/ports/unix/modmachine.c
+++ b/ports/unix/modmachine.c
@@ -32,9 +32,7 @@
 #include "py/obj.h"
 
 #include "extmod/machine_mem.h"
-#include "extmod/machine_pinbase.h"
-#include "extmod/machine_signal.h"
-#include "extmod/machine_pulse.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_PLAT_DEV_MEM
 #include <errno.h>
diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c
index 14ddf027ad..8498db1f03 100644
--- a/ports/zephyr/modmachine.c
+++ b/ports/zephyr/modmachine.c
@@ -33,8 +33,6 @@
 #include "py/obj.h"
 #include "py/runtime.h"
 #include "extmod/machine_mem.h"
-#include "extmod/machine_signal.h"
-#include "extmod/machine_pulse.h"
 #include "extmod/machine_i2c.h"
 #include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"

From 6989aba93b917fd30ea81b2660d6518c84108db2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 26 Oct 2023 17:37:39 +1100
Subject: [PATCH 059/310] nrf/modules/machine: Use SPI Python bindings provided
 by extmod.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/nrf/modules/machine/spi.c | 152 +++++++-------------------------
 ports/nrf/mpconfigport.h        |   5 +-
 2 files changed, 34 insertions(+), 123 deletions(-)

diff --git a/ports/nrf/modules/machine/spi.c b/ports/nrf/modules/machine/spi.c
index 46f2eba292..663e71c072 100644
--- a/ports/nrf/modules/machine/spi.c
+++ b/ports/nrf/modules/machine/spi.c
@@ -188,13 +188,14 @@ enum {
     ARG_INIT_firstbit
 };
 
-STATIC mp_obj_t machine_hard_spi_make_new(mp_arg_val_t *args);
-STATIC void machine_hard_spi_init(mp_obj_t self, mp_arg_val_t *args);
-STATIC void machine_hard_spi_deinit(mp_obj_t self);
+STATIC void machine_hard_spi_init_helper(const machine_hard_spi_obj_t *self, mp_arg_val_t *args);
 
-/* common code for both soft and hard implementations *************************/
+STATIC void machine_hard_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_hard_spi_obj_t *self = self_in;
+    mp_printf(print, "SPI(%u)", self->p_spi->drv_inst_idx);
+}
 
-STATIC mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+STATIC mp_obj_t machine_hard_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_id,       MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} },
         { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 1000000} },
@@ -211,71 +212,6 @@ STATIC mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, s
     mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
     mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
-    if (args[ARG_NEW_id].u_obj == MP_OBJ_NEW_SMALL_INT(-1)) {
-        // TODO: implement soft SPI
-        // return machine_soft_spi_make_new(args);
-        return mp_const_none;
-    } else {
-        // hardware peripheral id given
-        return machine_hard_spi_make_new(args);
-    }
-}
-
-STATIC mp_obj_t machine_spi_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000000} },
-        { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
-        { MP_QSTR_phase,    MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
-        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
-        { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
-    };
-
-    // parse args
-    mp_obj_t self = pos_args[0];
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    // dispatch to specific implementation
-    if (mp_obj_get_type(self) == &machine_spi_type) {
-        machine_hard_spi_init(self, args);
-    }
-
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_spi_init_obj, 1, machine_spi_init);
-
-STATIC mp_obj_t machine_spi_deinit(mp_obj_t self) {
-    // dispatch to specific implementation
-    if (mp_obj_get_type(self) == &machine_spi_type) {
-        machine_hard_spi_deinit(self);
-    }
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_spi_deinit_obj, machine_spi_deinit);
-
-STATIC const mp_rom_map_elem_t machine_spi_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_spi_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_spi_deinit_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_machine_spi_read_obj) },
-    { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_machine_spi_readinto_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_machine_spi_write_obj) },
-    { MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&mp_machine_spi_write_readinto_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(NRF_SPI_BIT_ORDER_MSB_FIRST) },
-    { MP_ROM_QSTR(MP_QSTR_LSB), MP_ROM_INT(NRF_SPI_BIT_ORDER_LSB_FIRST) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_spi_locals_dict, machine_spi_locals_dict_table);
-
-/* code for hard implementation ***********************************************/
-
-STATIC void machine_hard_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    machine_hard_spi_obj_t *self = self_in;
-    mp_printf(print, "SPI(%u)", self->p_spi->drv_inst_idx);
-}
-
-STATIC mp_obj_t machine_hard_spi_make_new(mp_arg_val_t *args) {
     // get static peripheral object
     int spi_id = spi_find(args[ARG_NEW_id].u_obj);
     const machine_hard_spi_obj_t *self = &machine_hard_spi_obj[spi_id];
@@ -303,16 +239,12 @@ STATIC mp_obj_t machine_hard_spi_make_new(mp_arg_val_t *args) {
     self->p_config->irq_priority = 6;
 #endif
 
-    mp_obj_t self_obj = MP_OBJ_FROM_PTR(self);
-    machine_hard_spi_init(self_obj, &args[1]); // Skip instance id param.
+    machine_hard_spi_init_helper(self, &args[1]); // Skip instance id param.
 
-    return self_obj;
+    return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC void machine_hard_spi_init(mp_obj_t self_in, mp_arg_val_t *args) {
-
-    const machine_hard_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
+STATIC void machine_hard_spi_init_helper(const machine_hard_spi_obj_t *self, mp_arg_val_t *args) {
     int baudrate = args[ARG_INIT_baudrate].u_int;
 
     if (baudrate <= 125000) {
@@ -373,7 +305,24 @@ STATIC void machine_hard_spi_init(mp_obj_t self_in, mp_arg_val_t *args) {
     }
 }
 
-STATIC void machine_hard_spi_deinit(mp_obj_t self_in) {
+STATIC void machine_hard_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000000} },
+        { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_phase,    MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
+        { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+    };
+
+    // parse args
+    machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t *)self_in;
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    machine_hard_spi_init_helper(self, args);
+}
+
+STATIC void machine_hard_spi_deinit(mp_obj_base_t *self_in) {
     const machine_hard_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
     nrfx_spi_uninit(self->p_spi);
 }
@@ -383,48 +332,9 @@ STATIC void machine_hard_spi_transfer(mp_obj_base_t *self_in, size_t len, const
     spi_transfer(self, len, src, dest);
 }
 
-
-STATIC mp_obj_t mp_machine_spi_read(size_t n_args, const mp_obj_t *args) {
-    vstr_t vstr;
-    vstr_init_len(&vstr, mp_obj_get_int(args[1]));
-    memset(vstr.buf, n_args == 3 ? mp_obj_get_int(args[2]) : 0, vstr.len);
-    spi_transfer(args[0], vstr.len, vstr.buf, vstr.buf);
-    return mp_obj_new_bytes_from_vstr(&vstr);
-}
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_read_obj, 2, 3, mp_machine_spi_read);
-
-STATIC mp_obj_t mp_machine_spi_readinto(size_t n_args, const mp_obj_t *args) {
-    mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE);
-    memset(bufinfo.buf, n_args == 3 ? mp_obj_get_int(args[2]) : 0, bufinfo.len);
-    spi_transfer(args[0], bufinfo.len, bufinfo.buf, bufinfo.buf);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_readinto_obj, 2, 3, mp_machine_spi_readinto);
-
-STATIC mp_obj_t mp_machine_spi_write(mp_obj_t self, mp_obj_t wr_buf) {
-    mp_buffer_info_t src;
-    mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ);
-    spi_transfer(self, src.len, (const uint8_t*)src.buf, NULL);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_2(mp_machine_spi_write_obj, mp_machine_spi_write);
-
-STATIC mp_obj_t mp_machine_spi_write_readinto(mp_obj_t self, mp_obj_t wr_buf, mp_obj_t rd_buf) {
-    mp_buffer_info_t src;
-    mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ);
-    mp_buffer_info_t dest;
-    mp_get_buffer_raise(rd_buf, &dest, MP_BUFFER_WRITE);
-    if (src.len != dest.len) {
-        mp_raise_ValueError(MP_ERROR_TEXT("buffers must be the same length"));
-    }
-    spi_transfer(self, src.len, src.buf, dest.buf);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_3(mp_machine_spi_write_readinto_obj, mp_machine_spi_write_readinto);
-
-
 STATIC const mp_machine_spi_p_t machine_hard_spi_p = {
+    .init = machine_hard_spi_init,
+    .deinit = machine_hard_spi_deinit,
     .transfer = machine_hard_spi_transfer,
 };
 
@@ -432,10 +342,10 @@ MP_DEFINE_CONST_OBJ_TYPE(
     machine_spi_type,
     MP_QSTR_SPI,
     MP_TYPE_FLAG_NONE,
-    make_new, machine_spi_make_new,
+    make_new, machine_hard_spi_make_new,
     print, machine_hard_spi_print,
     protocol, &machine_hard_spi_p,
-    locals_dict, &machine_spi_locals_dict
+    locals_dict, &mp_machine_spi_locals_dict
     );
 
 #endif // MICROPY_PY_MACHINE_HW_SPI
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 929065b49a..61e2421038 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -161,8 +161,6 @@
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_PULSE    (0)
 #define MICROPY_PY_MACHINE_SOFTI2C  (MICROPY_PY_MACHINE_I2C)
-#define MICROPY_PY_MACHINE_SPI      (0)
-#define MICROPY_PY_MACHINE_SPI_MIN_DELAY (0)
 
 #ifndef MICROPY_HW_LED_COUNT
 #define MICROPY_HW_LED_COUNT        (0)
@@ -189,6 +187,9 @@
 #define MICROPY_PY_MACHINE_HW_SPI   (1)
 #endif
 
+#define MICROPY_PY_MACHINE_SPI      (MICROPY_PY_MACHINE_HW_SPI)
+#define MICROPY_PY_MACHINE_SPI_MIN_DELAY (0)
+
 #ifndef MICROPY_PY_MACHINE_HW_PWM
 #define MICROPY_PY_MACHINE_HW_PWM   (0)
 #endif

From 3e2706a18dd4071d2d3040549786e659fc3b46b7 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 26 Oct 2023 15:20:03 +1100
Subject: [PATCH 060/310] extmod/modmachine: Consolidate mem, i2c and spi
 headers to modmachine.h.

The contents of machine_mem.h, machine_i2c.h and machine_spi.h have been
moved into extmod/modmachine.h.

Signed-off-by: Damien George <damien@micropython.org>
---
 drivers/esp-hosted/esp_hosted_hal.c    |   1 -
 drivers/ninaw10/nina_wifi_bsp.c        |   1 -
 extmod/machine_i2c.c                   |   2 +-
 extmod/machine_i2c.h                   |  90 ----------------
 extmod/machine_mem.c                   |   2 +-
 extmod/machine_mem.h                   |  49 ---------
 extmod/machine_spi.c                   |   2 +-
 extmod/machine_spi.h                   |  69 ------------
 extmod/modmachine.h                    | 139 +++++++++++++++++++++++++
 extmod/network_wiznet5k.c              |   2 +-
 ports/cc3200/mpconfigport.h            |   1 +
 ports/esp32/machine_hw_spi.c           |   1 -
 ports/esp32/machine_i2c.c              |   1 -
 ports/esp32/modmachine.c               |   3 -
 ports/esp8266/machine_hspi.c           |   2 +-
 ports/esp8266/modmachine.c             |   3 -
 ports/mimxrt/machine_i2c.c             |   1 -
 ports/mimxrt/machine_spi.c             |   1 -
 ports/mimxrt/modmachine.c              |   3 -
 ports/nrf/modules/machine/i2c.c        |   1 -
 ports/nrf/modules/machine/i2c.h        |   2 +-
 ports/nrf/modules/machine/modmachine.c |   2 -
 ports/nrf/modules/machine/spi.c        |   1 -
 ports/qemu-arm/modmachine.c            |   1 -
 ports/renesas-ra/machine_i2c.c         |   1 -
 ports/renesas-ra/machine_spi.c         |   1 -
 ports/renesas-ra/modmachine.c          |   3 -
 ports/rp2/machine_i2c.c                |   1 -
 ports/rp2/machine_spi.c                |   1 -
 ports/rp2/modmachine.c                 |   3 -
 ports/samd/machine_i2c.c               |   1 -
 ports/samd/machine_spi.c               |   1 -
 ports/samd/modmachine.c                |   3 -
 ports/samd/samd_qspiflash.c            |   2 +-
 ports/samd/samd_spiflash.c             |   1 -
 ports/stm32/machine_i2c.c              |   1 -
 ports/stm32/machine_spi.c              |   1 -
 ports/stm32/modmachine.c               |   3 -
 ports/stm32/modstm.c                   |   2 +-
 ports/stm32/pyb_spi.c                  |   2 +-
 ports/stm32/spi.c                      |   1 -
 ports/unix/modmachine.c                |   1 -
 ports/zephyr/machine_i2c.c             |   1 -
 ports/zephyr/machine_spi.c             |   1 -
 ports/zephyr/modmachine.c              |   3 -
 45 files changed, 149 insertions(+), 265 deletions(-)
 delete mode 100644 extmod/machine_i2c.h
 delete mode 100644 extmod/machine_mem.h
 delete mode 100644 extmod/machine_spi.h

diff --git a/drivers/esp-hosted/esp_hosted_hal.c b/drivers/esp-hosted/esp_hosted_hal.c
index e33b2cce47..bac8a89bd0 100644
--- a/drivers/esp-hosted/esp_hosted_hal.c
+++ b/drivers/esp-hosted/esp_hosted_hal.c
@@ -34,7 +34,6 @@
 #include <string.h>
 
 #include "py/runtime.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #ifdef MICROPY_HW_WIFI_LED
 #include "led.h"
diff --git a/drivers/ninaw10/nina_wifi_bsp.c b/drivers/ninaw10/nina_wifi_bsp.c
index 42770a33cc..dc71c8260c 100644
--- a/drivers/ninaw10/nina_wifi_bsp.c
+++ b/drivers/ninaw10/nina_wifi_bsp.c
@@ -35,7 +35,6 @@
 #include <string.h>
 
 #include "py/runtime.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 
 #include "nina_bsp.h"
diff --git a/extmod/machine_i2c.c b/extmod/machine_i2c.c
index 3563b3243c..44e6921309 100644
--- a/extmod/machine_i2c.c
+++ b/extmod/machine_i2c.c
@@ -31,7 +31,7 @@
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "py/runtime.h"
-#include "extmod/machine_i2c.h"
+#include "extmod/modmachine.h"
 
 #define SOFT_I2C_DEFAULT_TIMEOUT_US (50000) // 50ms
 
diff --git a/extmod/machine_i2c.h b/extmod/machine_i2c.h
deleted file mode 100644
index 600145bfed..0000000000
--- a/extmod/machine_i2c.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2016 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_I2C_H
-#define MICROPY_INCLUDED_EXTMOD_MACHINE_I2C_H
-
-#include "py/obj.h"
-#include "py/mphal.h"
-
-// Temporary support for legacy construction of SoftI2C via I2C type.
-#define MP_MACHINE_I2C_CHECK_FOR_LEGACY_SOFTI2C_CONSTRUCTION(n_args, n_kw, all_args) \
-    do { \
-        if (n_args == 0 || all_args[0] == MP_OBJ_NEW_SMALL_INT(-1)) { \
-            mp_print_str(MICROPY_ERROR_PRINTER, "Warning: I2C(-1, ...) is deprecated, use SoftI2C(...) instead\n"); \
-            if (n_args != 0) { \
-                --n_args; \
-                ++all_args; \
-            } \
-            return MP_OBJ_TYPE_GET_SLOT(&mp_machine_soft_i2c_type, make_new)(&mp_machine_soft_i2c_type, n_args, n_kw, all_args); \
-        } \
-    } while (0)
-
-#define MP_MACHINE_I2C_FLAG_READ (0x01) // if not set then it's a write
-#define MP_MACHINE_I2C_FLAG_STOP (0x02)
-
-#if MICROPY_PY_MACHINE_I2C_TRANSFER_WRITE1
-// If set, the first mp_machine_i2c_buf_t in a transfer is a write.
-#define MP_MACHINE_I2C_FLAG_WRITE1 (0x04)
-#endif
-
-typedef struct _mp_machine_i2c_buf_t {
-    size_t len;
-    uint8_t *buf;
-} mp_machine_i2c_buf_t;
-
-// I2C protocol
-// - init must be non-NULL
-// - start/stop/read/write can be NULL, meaning operation is not supported
-// - transfer must be non-NULL
-// - transfer_single only needs to be set if transfer=mp_machine_i2c_transfer_adaptor
-typedef struct _mp_machine_i2c_p_t {
-    #if MICROPY_PY_MACHINE_I2C_TRANSFER_WRITE1
-    bool transfer_supports_write1;
-    #endif
-    void (*init)(mp_obj_base_t *obj, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
-    int (*start)(mp_obj_base_t *obj);
-    int (*stop)(mp_obj_base_t *obj);
-    int (*read)(mp_obj_base_t *obj, uint8_t *dest, size_t len, bool nack);
-    int (*write)(mp_obj_base_t *obj, const uint8_t *src, size_t len);
-    int (*transfer)(mp_obj_base_t *obj, uint16_t addr, size_t n, mp_machine_i2c_buf_t *bufs, unsigned int flags);
-    int (*transfer_single)(mp_obj_base_t *obj, uint16_t addr, size_t len, uint8_t *buf, unsigned int flags);
-} mp_machine_i2c_p_t;
-
-typedef struct _mp_machine_soft_i2c_obj_t {
-    mp_obj_base_t base;
-    uint32_t us_delay;
-    uint32_t us_timeout;
-    mp_hal_pin_obj_t scl;
-    mp_hal_pin_obj_t sda;
-} mp_machine_soft_i2c_obj_t;
-
-extern const mp_obj_type_t mp_machine_soft_i2c_type;
-extern const mp_obj_dict_t mp_machine_i2c_locals_dict;
-
-int mp_machine_i2c_transfer_adaptor(mp_obj_base_t *self, uint16_t addr, size_t n, mp_machine_i2c_buf_t *bufs, unsigned int flags);
-int mp_machine_soft_i2c_transfer(mp_obj_base_t *self, uint16_t addr, size_t n, mp_machine_i2c_buf_t *bufs, unsigned int flags);
-
-#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_I2C_H
diff --git a/extmod/machine_mem.c b/extmod/machine_mem.c
index f27356e028..217c7ca088 100644
--- a/extmod/machine_mem.c
+++ b/extmod/machine_mem.c
@@ -25,7 +25,7 @@
  */
 
 #include "py/runtime.h"
-#include "extmod/machine_mem.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE
 
diff --git a/extmod/machine_mem.h b/extmod/machine_mem.h
deleted file mode 100644
index a48a52c820..0000000000
--- a/extmod/machine_mem.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_MEM_H
-#define MICROPY_INCLUDED_EXTMOD_MACHINE_MEM_H
-
-#include "py/obj.h"
-
-typedef struct _machine_mem_obj_t {
-    mp_obj_base_t base;
-    unsigned elem_size; // in bytes
-} machine_mem_obj_t;
-
-extern const mp_obj_type_t machine_mem_type;
-
-extern const machine_mem_obj_t machine_mem8_obj;
-extern const machine_mem_obj_t machine_mem16_obj;
-extern const machine_mem_obj_t machine_mem32_obj;
-
-#if defined(MICROPY_MACHINE_MEM_GET_READ_ADDR)
-uintptr_t MICROPY_MACHINE_MEM_GET_READ_ADDR(mp_obj_t addr_o, uint align);
-#endif
-#if defined(MICROPY_MACHINE_MEM_GET_WRITE_ADDR)
-uintptr_t MICROPY_MACHINE_MEM_GET_WRITE_ADDR(mp_obj_t addr_o, uint align);
-#endif
-
-#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_MEM_H
diff --git a/extmod/machine_spi.c b/extmod/machine_spi.c
index 8c4d91a3cf..e35e8b7fcc 100644
--- a/extmod/machine_spi.c
+++ b/extmod/machine_spi.c
@@ -31,7 +31,7 @@
 
 #if MICROPY_PY_MACHINE_SPI || MICROPY_PY_MACHINE_SOFTSPI
 
-#include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 
 // if a port didn't define MSB/LSB constants then provide them
 #ifndef MICROPY_PY_MACHINE_SPI_MSB
diff --git a/extmod/machine_spi.h b/extmod/machine_spi.h
deleted file mode 100644
index 93ee8d00ca..0000000000
--- a/extmod/machine_spi.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2016 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_SPI_H
-#define MICROPY_INCLUDED_EXTMOD_MACHINE_SPI_H
-
-#include "py/obj.h"
-#include "py/mphal.h"
-#include "drivers/bus/spi.h"
-
-// Temporary support for legacy construction of SoftSPI via SPI type.
-#define MP_MACHINE_SPI_CHECK_FOR_LEGACY_SOFTSPI_CONSTRUCTION(n_args, n_kw, all_args) \
-    do { \
-        if (n_args == 0 || all_args[0] == MP_OBJ_NEW_SMALL_INT(-1)) { \
-            mp_print_str(MICROPY_ERROR_PRINTER, "Warning: SPI(-1, ...) is deprecated, use SoftSPI(...) instead\n"); \
-            if (n_args != 0) { \
-                --n_args; \
-                ++all_args; \
-            } \
-            return MP_OBJ_TYPE_GET_SLOT(&mp_machine_soft_spi_type, make_new)(&mp_machine_soft_spi_type, n_args, n_kw, all_args); \
-        } \
-    } while (0)
-
-// SPI protocol
-typedef struct _mp_machine_spi_p_t {
-    void (*init)(mp_obj_base_t *obj, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
-    void (*deinit)(mp_obj_base_t *obj); // can be NULL
-    void (*transfer)(mp_obj_base_t *obj, size_t len, const uint8_t *src, uint8_t *dest);
-} mp_machine_spi_p_t;
-
-typedef struct _mp_machine_soft_spi_obj_t {
-    mp_obj_base_t base;
-    mp_soft_spi_obj_t spi;
-} mp_machine_soft_spi_obj_t;
-
-extern const mp_machine_spi_p_t mp_machine_soft_spi_p;
-extern const mp_obj_type_t mp_machine_soft_spi_type;
-extern const mp_obj_dict_t mp_machine_spi_locals_dict;
-
-mp_obj_t mp_machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args);
-
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_read_obj);
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_readinto_obj);
-MP_DECLARE_CONST_FUN_OBJ_2(mp_machine_spi_write_obj);
-MP_DECLARE_CONST_FUN_OBJ_3(mp_machine_spi_write_readinto_obj);
-
-#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_SPI_H
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index 4ef2bb3adb..6cace4f851 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -30,6 +30,10 @@
 #include "py/mphal.h"
 #include "py/obj.h"
 
+#if MICROPY_PY_MACHINE
+
+#include "drivers/bus/spi.h"
+
 // Whether to enable the ADC.init() method.
 // Requires a port to implement mp_machine_adc_init_helper().
 #ifndef MICROPY_PY_MACHINE_ADC_INIT
@@ -84,6 +88,44 @@
 #define MICROPY_PY_MACHINE_UART_IRQ (0)
 #endif
 
+// Temporary support for legacy construction of SoftI2C via I2C type.
+#define MP_MACHINE_I2C_CHECK_FOR_LEGACY_SOFTI2C_CONSTRUCTION(n_args, n_kw, all_args) \
+    do { \
+        if (n_args == 0 || all_args[0] == MP_OBJ_NEW_SMALL_INT(-1)) { \
+            mp_print_str(MICROPY_ERROR_PRINTER, "Warning: I2C(-1, ...) is deprecated, use SoftI2C(...) instead\n"); \
+            if (n_args != 0) { \
+                --n_args; \
+                ++all_args; \
+            } \
+            return MP_OBJ_TYPE_GET_SLOT(&mp_machine_soft_i2c_type, make_new)(&mp_machine_soft_i2c_type, n_args, n_kw, all_args); \
+        } \
+    } while (0)
+
+// Temporary support for legacy construction of SoftSPI via SPI type.
+#define MP_MACHINE_SPI_CHECK_FOR_LEGACY_SOFTSPI_CONSTRUCTION(n_args, n_kw, all_args) \
+    do { \
+        if (n_args == 0 || all_args[0] == MP_OBJ_NEW_SMALL_INT(-1)) { \
+            mp_print_str(MICROPY_ERROR_PRINTER, "Warning: SPI(-1, ...) is deprecated, use SoftSPI(...) instead\n"); \
+            if (n_args != 0) { \
+                --n_args; \
+                ++all_args; \
+            } \
+            return MP_OBJ_TYPE_GET_SLOT(&mp_machine_soft_spi_type, make_new)(&mp_machine_soft_spi_type, n_args, n_kw, all_args); \
+        } \
+    } while (0)
+
+#if MICROPY_PY_MACHINE_I2C
+
+#define MP_MACHINE_I2C_FLAG_READ (0x01) // if not set then it's a write
+#define MP_MACHINE_I2C_FLAG_STOP (0x02)
+
+#if MICROPY_PY_MACHINE_I2C_TRANSFER_WRITE1
+// If set, the first mp_machine_i2c_buf_t in a transfer is a write.
+#define MP_MACHINE_I2C_FLAG_WRITE1 (0x04)
+#endif
+
+#endif
+
 // A port must provide these types, but they are otherwise opaque.
 typedef struct _machine_adc_obj_t machine_adc_obj_t;
 typedef struct _machine_i2s_obj_t machine_i2s_obj_t;
@@ -91,12 +133,76 @@ typedef struct _machine_pwm_obj_t machine_pwm_obj_t;
 typedef struct _machine_uart_obj_t machine_uart_obj_t;
 typedef struct _machine_wdt_obj_t machine_wdt_obj_t;
 
+typedef struct _machine_mem_obj_t {
+    mp_obj_base_t base;
+    unsigned elem_size; // in bytes
+} machine_mem_obj_t;
+
+#if MICROPY_PY_MACHINE_I2C
+
+typedef struct _mp_machine_i2c_buf_t {
+    size_t len;
+    uint8_t *buf;
+} mp_machine_i2c_buf_t;
+
+// I2C protocol:
+// - init must be non-NULL
+// - start/stop/read/write can be NULL, meaning operation is not supported
+// - transfer must be non-NULL
+// - transfer_single only needs to be set if transfer=mp_machine_i2c_transfer_adaptor
+typedef struct _mp_machine_i2c_p_t {
+    #if MICROPY_PY_MACHINE_I2C_TRANSFER_WRITE1
+    bool transfer_supports_write1;
+    #endif
+    void (*init)(mp_obj_base_t *obj, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+    int (*start)(mp_obj_base_t *obj);
+    int (*stop)(mp_obj_base_t *obj);
+    int (*read)(mp_obj_base_t *obj, uint8_t *dest, size_t len, bool nack);
+    int (*write)(mp_obj_base_t *obj, const uint8_t *src, size_t len);
+    int (*transfer)(mp_obj_base_t *obj, uint16_t addr, size_t n, mp_machine_i2c_buf_t *bufs, unsigned int flags);
+    int (*transfer_single)(mp_obj_base_t *obj, uint16_t addr, size_t len, uint8_t *buf, unsigned int flags);
+} mp_machine_i2c_p_t;
+
+// SoftI2C object.
+typedef struct _mp_machine_soft_i2c_obj_t {
+    mp_obj_base_t base;
+    uint32_t us_delay;
+    uint32_t us_timeout;
+    mp_hal_pin_obj_t scl;
+    mp_hal_pin_obj_t sda;
+} mp_machine_soft_i2c_obj_t;
+
+#endif
+
+#if MICROPY_PY_MACHINE_SPI
+
+// SPI protocol.
+typedef struct _mp_machine_spi_p_t {
+    void (*init)(mp_obj_base_t *obj, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+    void (*deinit)(mp_obj_base_t *obj); // can be NULL
+    void (*transfer)(mp_obj_base_t *obj, size_t len, const uint8_t *src, uint8_t *dest);
+} mp_machine_spi_p_t;
+
+// SoftSPI object.
+typedef struct _mp_machine_soft_spi_obj_t {
+    mp_obj_base_t base;
+    mp_soft_spi_obj_t spi;
+} mp_machine_soft_spi_obj_t;
+
+#endif
+
+// Objects for machine.mem8, machine.mem16 and machine.mem32.
+extern const machine_mem_obj_t machine_mem8_obj;
+extern const machine_mem_obj_t machine_mem16_obj;
+extern const machine_mem_obj_t machine_mem32_obj;
+
 // These classes correspond to machine.Type entries in the machine module.
 // Their Python bindings are implemented in extmod, and their implementation
 // is provided by a port.
 extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_i2s_type;
+extern const mp_obj_type_t machine_mem_type;
 extern const mp_obj_type_t machine_pin_type;
 extern const mp_obj_type_t machine_pinbase_type;
 extern const mp_obj_type_t machine_pwm_type;
@@ -107,10 +213,43 @@ extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_uart_type;
 extern const mp_obj_type_t machine_wdt_type;
 
+#if MICROPY_PY_MACHINE_I2C
+extern const mp_obj_type_t mp_machine_soft_i2c_type;
+extern const mp_obj_dict_t mp_machine_i2c_locals_dict;
+#endif
+
+#if MICROPY_PY_MACHINE_SPI
+extern const mp_obj_type_t mp_machine_soft_spi_type;
+extern const mp_obj_dict_t mp_machine_spi_locals_dict;
+extern const mp_machine_spi_p_t mp_machine_soft_spi_p;
+#endif
+
+#if defined(MICROPY_MACHINE_MEM_GET_READ_ADDR)
+uintptr_t MICROPY_MACHINE_MEM_GET_READ_ADDR(mp_obj_t addr_o, uint align);
+#endif
+#if defined(MICROPY_MACHINE_MEM_GET_WRITE_ADDR)
+uintptr_t MICROPY_MACHINE_MEM_GET_WRITE_ADDR(mp_obj_t addr_o, uint align);
+#endif
+
 void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len);
 mp_uint_t machine_time_pulse_us(mp_hal_pin_obj_t pin, int pulse_level, mp_uint_t timeout_us);
 
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bitstream_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_time_pulse_us_obj);
 
+#if MICROPY_PY_MACHINE_I2C
+int mp_machine_i2c_transfer_adaptor(mp_obj_base_t *self, uint16_t addr, size_t n, mp_machine_i2c_buf_t *bufs, unsigned int flags);
+int mp_machine_soft_i2c_transfer(mp_obj_base_t *self, uint16_t addr, size_t n, mp_machine_i2c_buf_t *bufs, unsigned int flags);
+#endif
+
+#if MICROPY_PY_MACHINE_SPI
+mp_obj_t mp_machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args);
+MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_read_obj);
+MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_readinto_obj);
+MP_DECLARE_CONST_FUN_OBJ_2(mp_machine_spi_write_obj);
+MP_DECLARE_CONST_FUN_OBJ_3(mp_machine_spi_write_readinto_obj);
+#endif
+
+#endif // MICROPY_PY_MACHINE
+
 #endif // MICROPY_INCLUDED_EXTMOD_MODMACHINE_H
diff --git a/extmod/network_wiznet5k.c b/extmod/network_wiznet5k.c
index eed656ee24..d49ee8614e 100644
--- a/extmod/network_wiznet5k.c
+++ b/extmod/network_wiznet5k.c
@@ -38,7 +38,7 @@
 
 #include "shared/netutils/netutils.h"
 #include "extmod/modnetwork.h"
-#include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "extmod/virtpin.h"
 #include "modmachine.h"
 #include "drivers/bus/spi.h"
diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h
index 6b2dc7ca09..c19288fe89 100644
--- a/ports/cc3200/mpconfigport.h
+++ b/ports/cc3200/mpconfigport.h
@@ -120,6 +120,7 @@
 #define MICROPY_PY_TIME_GMTIME_LOCALTIME_MKTIME     (1)
 #define MICROPY_PY_TIME_TIME_TIME_NS                (1)
 #define MICROPY_PY_TIME_INCLUDEFILE                 "ports/cc3200/mods/modtime.c"
+#define MICROPY_PY_MACHINE                          (1)
 #define MICROPY_PY_MACHINE_WDT                      (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE          "ports/cc3200/mods/machine_wdt.c"
 
diff --git a/ports/esp32/machine_hw_spi.c b/ports/esp32/machine_hw_spi.c
index 3a1dd1064c..399cb902e8 100644
--- a/ports/esp32/machine_hw_spi.c
+++ b/ports/esp32/machine_hw_spi.c
@@ -31,7 +31,6 @@
 #include "py/runtime.h"
 #include "py/stream.h"
 #include "py/mphal.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 
 #include "driver/spi_master.h"
diff --git a/ports/esp32/machine_i2c.c b/ports/esp32/machine_i2c.c
index 4e3a9ee816..50d5681514 100644
--- a/ports/esp32/machine_i2c.c
+++ b/ports/esp32/machine_i2c.c
@@ -27,7 +27,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 
 #include "driver/i2c.h"
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index bed29f7c04..be5348f0e6 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -40,9 +40,6 @@
 #include "py/runtime.h"
 #include "shared/runtime/pyexec.h"
 #include "drivers/dht/dht.h"
-#include "extmod/machine_mem.h"
-#include "extmod/machine_i2c.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "modmachine.h"
 #include "machine_rtc.h"
diff --git a/ports/esp8266/machine_hspi.c b/ports/esp8266/machine_hspi.c
index 2edb294ade..1a7de7f49b 100644
--- a/ports/esp8266/machine_hspi.c
+++ b/ports/esp8266/machine_hspi.c
@@ -35,7 +35,7 @@
 #include "py/runtime.h"
 #include "py/stream.h"
 #include "py/mphal.h"
-#include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "modmachine.h"
 #include "hspi.h"
 
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index a28c7c87fe..78d5bde26d 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -36,9 +36,6 @@
 // This needs to be set before we include the RTOS headers
 #define USE_US_TIMER 1
 
-#include "extmod/machine_mem.h"
-#include "extmod/machine_i2c.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "modmachine.h"
 
diff --git a/ports/mimxrt/machine_i2c.c b/ports/mimxrt/machine_i2c.c
index 379001acdd..cef17272c4 100644
--- a/ports/mimxrt/machine_i2c.c
+++ b/ports/mimxrt/machine_i2c.c
@@ -27,7 +27,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 #include CLOCK_CONFIG_H
 #include "pin.h"
diff --git a/ports/mimxrt/machine_spi.c b/ports/mimxrt/machine_spi.c
index 879687bd11..35deaa7ae6 100644
--- a/ports/mimxrt/machine_spi.c
+++ b/ports/mimxrt/machine_spi.c
@@ -28,7 +28,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include CLOCK_CONFIG_H
 
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index c7d507074f..aa12f44d47 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -27,9 +27,6 @@
 
 #include "py/runtime.h"
 #include "drivers/dht/dht.h"
-#include "extmod/machine_mem.h"
-#include "extmod/machine_i2c.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "led.h"
diff --git a/ports/nrf/modules/machine/i2c.c b/ports/nrf/modules/machine/i2c.c
index 8bb9613df8..6d2b83a454 100644
--- a/ports/nrf/modules/machine/i2c.c
+++ b/ports/nrf/modules/machine/i2c.c
@@ -34,7 +34,6 @@
 
 #if MICROPY_PY_MACHINE_I2C
 
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 #include "i2c.h"
 #if NRFX_TWI_ENABLED
diff --git a/ports/nrf/modules/machine/i2c.h b/ports/nrf/modules/machine/i2c.h
index 3c4fde983a..9c69e3f4f9 100644
--- a/ports/nrf/modules/machine/i2c.h
+++ b/ports/nrf/modules/machine/i2c.h
@@ -27,7 +27,7 @@
 #ifndef I2C_H__
 #define I2C_H__
 
-#include "extmod/machine_i2c.h"
+#include "extmod/modmachine.h"
 
 void i2c_init0(void);
 
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index df2662c62c..9043b7a441 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -30,8 +30,6 @@
 #include "py/gc.h"
 #include "py/runtime.h"
 #include "py/mphal.h"
-#include "extmod/machine_mem.h"
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
diff --git a/ports/nrf/modules/machine/spi.c b/ports/nrf/modules/machine/spi.c
index 663e71c072..d0234244af 100644
--- a/ports/nrf/modules/machine/spi.c
+++ b/ports/nrf/modules/machine/spi.c
@@ -35,7 +35,6 @@
 
 #include "py/nlr.h"
 #include "py/mphal.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "pin.h"
 #include "genhdr/pins.h"
diff --git a/ports/qemu-arm/modmachine.c b/ports/qemu-arm/modmachine.c
index 026ab8974d..8a22fe2bd8 100644
--- a/ports/qemu-arm/modmachine.c
+++ b/ports/qemu-arm/modmachine.c
@@ -24,7 +24,6 @@
  * THE SOFTWARE.
  */
 
-#include "extmod/machine_mem.h"
 #include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE
diff --git a/ports/renesas-ra/machine_i2c.c b/ports/renesas-ra/machine_i2c.c
index a642b81176..0e2d62f8a4 100644
--- a/ports/renesas-ra/machine_i2c.c
+++ b/ports/renesas-ra/machine_i2c.c
@@ -31,7 +31,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 
 #include "ra_i2c.h"
diff --git a/ports/renesas-ra/machine_spi.c b/ports/renesas-ra/machine_spi.c
index 977635f167..04505178da 100644
--- a/ports/renesas-ra/machine_spi.c
+++ b/ports/renesas-ra/machine_spi.c
@@ -31,7 +31,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "pin.h"
 #include "spi.h"
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index 8dbace21da..c8edf61268 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -35,9 +35,6 @@
 #include "py/objstr.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
-#include "extmod/machine_mem.h"
-#include "extmod/machine_i2c.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
diff --git a/ports/rp2/machine_i2c.c b/ports/rp2/machine_i2c.c
index 467c4e7e63..570f05aaaf 100644
--- a/ports/rp2/machine_i2c.c
+++ b/ports/rp2/machine_i2c.c
@@ -27,7 +27,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 
 #include "hardware/i2c.h"
diff --git a/ports/rp2/machine_spi.c b/ports/rp2/machine_spi.c
index 3d7f2d6ab8..a3b82a0bc4 100644
--- a/ports/rp2/machine_spi.c
+++ b/ports/rp2/machine_spi.c
@@ -27,7 +27,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 
 #include "hardware/spi.h"
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index a111da0f00..29a8dbed2c 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -28,9 +28,6 @@
 #include "py/mphal.h"
 #include "drivers/dht/dht.h"
 #include "shared/runtime/pyexec.h"
-#include "extmod/machine_i2c.h"
-#include "extmod/machine_mem.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 
 #include "modmachine.h"
diff --git a/ports/samd/machine_i2c.c b/ports/samd/machine_i2c.c
index afd5921d51..ea5178dc06 100644
--- a/ports/samd/machine_i2c.c
+++ b/ports/samd/machine_i2c.c
@@ -31,7 +31,6 @@
 
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 #include "samd_soc.h"
 #include "pin_af.h"
diff --git a/ports/samd/machine_spi.c b/ports/samd/machine_spi.c
index 9d9928bb04..3d5729c1f4 100644
--- a/ports/samd/machine_spi.c
+++ b/ports/samd/machine_spi.c
@@ -30,7 +30,6 @@
 #if MICROPY_PY_MACHINE_SPI
 
 #include "py/mphal.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "samd_soc.h"
 #include "pin_af.h"
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 4060ea5153..7c3d96eb01 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -25,9 +25,6 @@
  */
 
 #include "py/runtime.h"
-#include "extmod/machine_mem.h"
-#include "extmod/machine_i2c.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "drivers/dht/dht.h"
 #include "shared/runtime/pyexec.h"
diff --git a/ports/samd/samd_qspiflash.c b/ports/samd/samd_qspiflash.c
index 9bb79de5c5..054bfd231e 100644
--- a/ports/samd/samd_qspiflash.c
+++ b/ports/samd/samd_qspiflash.c
@@ -35,7 +35,7 @@
 #include "py/mphal.h"
 #include "py/mperrno.h"
 #include "modmachine.h"
-#include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "extmod/vfs.h"
 #include "pin_af.h"
 #include "clock_config.h"
diff --git a/ports/samd/samd_spiflash.c b/ports/samd/samd_spiflash.c
index 833e3efa8d..f17d3c45ca 100644
--- a/ports/samd/samd_spiflash.c
+++ b/ports/samd/samd_spiflash.c
@@ -30,7 +30,6 @@
 #include "py/obj.h"
 #include "py/runtime.h"
 #include "py/mphal.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "extmod/vfs.h"
 #include "pin_af.h"
diff --git a/ports/stm32/machine_i2c.c b/ports/stm32/machine_i2c.c
index 1876c9a142..8beefcad6d 100644
--- a/ports/stm32/machine_i2c.c
+++ b/ports/stm32/machine_i2c.c
@@ -27,7 +27,6 @@
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 #include "i2c.h"
 
diff --git a/ports/stm32/machine_spi.c b/ports/stm32/machine_spi.c
index bc526635b4..b916252da3 100644
--- a/ports/stm32/machine_spi.c
+++ b/ports/stm32/machine_spi.c
@@ -25,7 +25,6 @@
  */
 
 #include "py/runtime.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "spi.h"
 
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 98456dc6cb..83327bede0 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -32,9 +32,6 @@
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "drivers/dht/dht.h"
-#include "extmod/machine_mem.h"
-#include "extmod/machine_i2c.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
diff --git a/ports/stm32/modstm.c b/ports/stm32/modstm.c
index 251360594a..896465d0cc 100644
--- a/ports/stm32/modstm.c
+++ b/ports/stm32/modstm.c
@@ -29,7 +29,7 @@
 
 #include "py/obj.h"
 #include "py/objint.h"
-#include "extmod/machine_mem.h"
+#include "extmod/modmachine.h"
 #include "rfcore.h"
 #include "portmodules.h"
 #include "subghz.h"
diff --git a/ports/stm32/pyb_spi.c b/ports/stm32/pyb_spi.c
index a612f69505..f36c048747 100644
--- a/ports/stm32/pyb_spi.c
+++ b/ports/stm32/pyb_spi.c
@@ -25,7 +25,7 @@
  */
 
 #include "py/runtime.h"
-#include "extmod/machine_spi.h"
+#include "extmod/modmachine.h"
 #include "bufhelper.h"
 #include "spi.h"
 
diff --git a/ports/stm32/spi.c b/ports/stm32/spi.c
index a2a337f1e6..7b89b48b53 100644
--- a/ports/stm32/spi.c
+++ b/ports/stm32/spi.c
@@ -28,7 +28,6 @@
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "spi.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 
 // Possible DMA configurations for SPI buses:
diff --git a/ports/unix/modmachine.c b/ports/unix/modmachine.c
index 2c1e0bed60..d0c6a43bf8 100644
--- a/ports/unix/modmachine.c
+++ b/ports/unix/modmachine.c
@@ -31,7 +31,6 @@
 #include "py/runtime.h"
 #include "py/obj.h"
 
-#include "extmod/machine_mem.h"
 #include "extmod/modmachine.h"
 
 #if MICROPY_PLAT_DEV_MEM
diff --git a/ports/zephyr/machine_i2c.c b/ports/zephyr/machine_i2c.c
index a4b48e996f..36d88204f4 100644
--- a/ports/zephyr/machine_i2c.c
+++ b/ports/zephyr/machine_i2c.c
@@ -36,7 +36,6 @@
 #include "py/gc.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_i2c.h"
 #include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE_I2C
diff --git a/ports/zephyr/machine_spi.c b/ports/zephyr/machine_spi.c
index 6475018b09..5c882a6ae3 100644
--- a/ports/zephyr/machine_spi.c
+++ b/ports/zephyr/machine_spi.c
@@ -35,7 +35,6 @@
 #include "py/gc.h"
 #include "py/mphal.h"
 #include "py/mperrno.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 
 #if MICROPY_PY_MACHINE_SPI
diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c
index 8498db1f03..24e004b40c 100644
--- a/ports/zephyr/modmachine.c
+++ b/ports/zephyr/modmachine.c
@@ -32,9 +32,6 @@
 
 #include "py/obj.h"
 #include "py/runtime.h"
-#include "extmod/machine_mem.h"
-#include "extmod/machine_i2c.h"
-#include "extmod/machine_spi.h"
 #include "extmod/modmachine.h"
 #include "modmachine.h"
 

From 3bf70f16e964370475114ff9658f58870ffaf768 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Tue, 10 Oct 2023 16:50:28 +1100
Subject: [PATCH 061/310] py/mkrules.mk: Add MICROPY_PREVIEW_VERSION_2.

This provides a way to enable features and changes slated for MicroPython
2.x, by running `make MICROPY_PREVIEW_VERSION_2=1`. Also supported for
the cmake ports (except Zephyr).

This is an alternative to having a 2.x development branch (or equivalently,
keeping a 1.x release branch). Any feature or change that needs to be
"hidden" until 2.x can use this flag (either in the Makefile or the
preprocessor).

A good example is changing function arguments or other public API features,
in particular to aid in improving consistency between ports.

When `MICROPY_PREVIEW_VERSION_2` is enabled, the REPL banner is amended to
say "MicroPython (with v2.0 preview) vX.Y.Z", and sys.implementation gets a
new field `_v2` set to `True`.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 .github/workflows/ports_unix.yml | 12 ++++++++++
 ports/esp32/Makefile             |  4 ++++
 ports/rp2/Makefile               |  4 ++++
 py/mkrules.cmake                 | 10 ++++++++
 py/mkrules.mk                    |  7 ++++++
 py/modsys.c                      | 40 +++++++++++++++++++++++---------
 py/mpconfig.h                    | 10 ++++++++
 tools/ci.sh                      |  9 +++++++
 8 files changed, 85 insertions(+), 11 deletions(-)

diff --git a/.github/workflows/ports_unix.yml b/.github/workflows/ports_unix.yml
index 04dfd78525..25dd52f31d 100644
--- a/.github/workflows/ports_unix.yml
+++ b/.github/workflows/ports_unix.yml
@@ -55,6 +55,18 @@ jobs:
       if: failure()
       run: tests/run-tests.py --print-failures
 
+  standard_v2:
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v4
+    - name: Build
+      run: source tools/ci.sh && ci_unix_standard_v2_build
+    - name: Run main test suite
+      run: source tools/ci.sh && ci_unix_standard_v2_run_tests
+    - name: Print failures
+      if: failure()
+      run: tests/run-tests.py --print-failures
+
   coverage:
     runs-on: ubuntu-latest
     steps:
diff --git a/ports/esp32/Makefile b/ports/esp32/Makefile
index bf275ffe66..ce574ce799 100644
--- a/ports/esp32/Makefile
+++ b/ports/esp32/Makefile
@@ -52,6 +52,10 @@ ifdef BOARD_VARIANT
 	IDFPY_FLAGS += -D MICROPY_BOARD_VARIANT=$(BOARD_VARIANT)
 endif
 
+ifdef MICROPY_PREVIEW_VERSION_2
+	IDFPY_FLAGS += -D MICROPY_PREVIEW_VERSION_2=1
+endif
+
 HELP_BUILD_ERROR ?= "See \033[1;31mhttps://github.com/micropython/micropython/wiki/Build-Troubleshooting\033[0m"
 
 define RUN_IDF_PY
diff --git a/ports/rp2/Makefile b/ports/rp2/Makefile
index 8399b9e98a..11d2115a2f 100644
--- a/ports/rp2/Makefile
+++ b/ports/rp2/Makefile
@@ -48,6 +48,10 @@ ifdef BOARD_VARIANT
 CMAKE_ARGS += -DMICROPY_BOARD_VARIANT=$(BOARD_VARIANT)
 endif
 
+ifdef MICROPY_PREVIEW_VERSION_2
+CMAKE_ARGS += -DMICROPY_PREVIEW_VERSION_2=1
+endif
+
 HELP_BUILD_ERROR ?= "See \033[1;31mhttps://github.com/micropython/micropython/wiki/Build-Troubleshooting\033[0m"
 
 all:
diff --git a/py/mkrules.cmake b/py/mkrules.cmake
index 02e3148f2b..6415b549aa 100644
--- a/py/mkrules.cmake
+++ b/py/mkrules.cmake
@@ -15,6 +15,10 @@ set(MICROPY_ROOT_POINTERS_SPLIT "${MICROPY_GENHDR_DIR}/root_pointers.split")
 set(MICROPY_ROOT_POINTERS_COLLECTED "${MICROPY_GENHDR_DIR}/root_pointers.collected")
 set(MICROPY_ROOT_POINTERS "${MICROPY_GENHDR_DIR}/root_pointers.h")
 
+if(NOT MICROPY_PREVIEW_VERSION_2)
+    set(MICROPY_PREVIEW_VERSION_2 0)
+endif()
+
 # Need to do this before extracting MICROPY_CPP_DEF below. Rest of frozen
 # manifest handling is at the end of this file.
 if(MICROPY_FROZEN_MANIFEST)
@@ -24,6 +28,12 @@ if(MICROPY_FROZEN_MANIFEST)
     )
 endif()
 
+if(MICROPY_PREVIEW_VERSION_2)
+    target_compile_definitions(${MICROPY_TARGET} PUBLIC
+        MICROPY_PREVIEW_VERSION_2=\(1\)
+    )
+endif()
+
 # Provide defaults for preprocessor flags if not already defined
 if(NOT MICROPY_CPP_FLAGS)
     get_target_property(MICROPY_CPP_INC ${MICROPY_TARGET} INCLUDE_DIRECTORIES)
diff --git a/py/mkrules.mk b/py/mkrules.mk
index 421e638c22..8b21c7974d 100644
--- a/py/mkrules.mk
+++ b/py/mkrules.mk
@@ -4,6 +4,13 @@ THIS_MAKEFILE = $(lastword $(MAKEFILE_LIST))
 include $(dir $(THIS_MAKEFILE))mkenv.mk
 endif
 
+# Enable in-progress/breaking changes that are slated for MicroPython 2.x.
+MICROPY_PREVIEW_VERSION_2 ?= 0
+
+ifeq ($(MICROPY_PREVIEW_VERSION_2),1)
+CFLAGS += -DMICROPY_PREVIEW_VERSION_2=1
+endif
+
 HELP_BUILD_ERROR ?= "See \033[1;31mhttps://github.com/micropython/micropython/wiki/Build-Troubleshooting\033[0m"
 HELP_MPY_LIB_SUBMODULE ?= "\033[1;31mError: micropython-lib submodule is not initialized.\033[0m Run 'make submodules'"
 
diff --git a/py/modsys.c b/py/modsys.c
index e40542467b..12fa1101b9 100644
--- a/py/modsys.c
+++ b/py/modsys.c
@@ -79,19 +79,26 @@ STATIC const mp_rom_obj_tuple_t mp_sys_implementation_version_info_obj = {
     }
 };
 STATIC const MP_DEFINE_STR_OBJ(mp_sys_implementation_machine_obj, MICROPY_BANNER_MACHINE);
-#if MICROPY_PERSISTENT_CODE_LOAD
-#define SYS_IMPLEMENTATION_ELEMS \
-    MP_ROM_QSTR(MP_QSTR_micropython), \
-    MP_ROM_PTR(&mp_sys_implementation_version_info_obj), \
-    MP_ROM_PTR(&mp_sys_implementation_machine_obj), \
-    MP_ROM_INT(MPY_FILE_HEADER_INT)
-#else
-#define SYS_IMPLEMENTATION_ELEMS \
+#define SYS_IMPLEMENTATION_ELEMS_BASE \
     MP_ROM_QSTR(MP_QSTR_micropython), \
     MP_ROM_PTR(&mp_sys_implementation_version_info_obj), \
     MP_ROM_PTR(&mp_sys_implementation_machine_obj)
+
+#if MICROPY_PERSISTENT_CODE_LOAD
+#define SYS_IMPLEMENTATION_ELEMS__MPY \
+    , MP_ROM_INT(MPY_FILE_HEADER_INT)
+#else
+#define SYS_IMPLEMENTATION_ELEMS__MPY
 #endif
+
 #if MICROPY_PY_ATTRTUPLE
+#if MICROPY_PREVIEW_VERSION_2
+#define SYS_IMPLEMENTATION_ELEMS__V2 \
+    , MP_ROM_TRUE
+#else
+#define SYS_IMPLEMENTATION_ELEMS__V2
+#endif
+
 STATIC const qstr impl_fields[] = {
     MP_QSTR_name,
     MP_QSTR_version,
@@ -99,19 +106,30 @@ STATIC const qstr impl_fields[] = {
     #if MICROPY_PERSISTENT_CODE_LOAD
     MP_QSTR__mpy,
     #endif
+    #if MICROPY_PREVIEW_VERSION_2
+    MP_QSTR__v2,
+    #endif
 };
 STATIC MP_DEFINE_ATTRTUPLE(
     mp_sys_implementation_obj,
     impl_fields,
-    3 + MICROPY_PERSISTENT_CODE_LOAD,
-    SYS_IMPLEMENTATION_ELEMS
+    3 + MICROPY_PERSISTENT_CODE_LOAD + MICROPY_PREVIEW_VERSION_2,
+    SYS_IMPLEMENTATION_ELEMS_BASE
+    SYS_IMPLEMENTATION_ELEMS__MPY
+    SYS_IMPLEMENTATION_ELEMS__V2
     );
 #else
 STATIC const mp_rom_obj_tuple_t mp_sys_implementation_obj = {
     {&mp_type_tuple},
     3 + MICROPY_PERSISTENT_CODE_LOAD,
+    // Do not include SYS_IMPLEMENTATION_ELEMS__V2 because
+    // SYS_IMPLEMENTATION_ELEMS__MPY may be empty if
+    // MICROPY_PERSISTENT_CODE_LOAD is disabled, which means they'll share
+    // the same index. Cannot query _v2 if MICROPY_PY_ATTRTUPLE is
+    // disabled.
     {
-        SYS_IMPLEMENTATION_ELEMS
+        SYS_IMPLEMENTATION_ELEMS_BASE
+                                SYS_IMPLEMENTATION_ELEMS__MPY
     }
 };
 #endif
diff --git a/py/mpconfig.h b/py/mpconfig.h
index a36f9658fb..6995600abe 100644
--- a/py/mpconfig.h
+++ b/py/mpconfig.h
@@ -53,6 +53,12 @@
 #define MICROPY_VERSION_STRING MICROPY_VERSION_STRING_BASE
 #endif
 
+// If this is enabled, then in-progress/breaking changes slated for the 2.x
+// release will be enabled.
+#ifndef MICROPY_PREVIEW_VERSION_2
+#define MICROPY_PREVIEW_VERSION_2 (0)
+#endif
+
 // This file contains default configuration settings for MicroPython.
 // You can override any of the options below using mpconfigport.h file
 // located in a directory of your port.
@@ -1828,8 +1834,12 @@ typedef double mp_float_t;
 
 // String used for the banner, and sys.version additional information
 #ifndef MICROPY_BANNER_NAME_AND_VERSION
+#if MICROPY_PREVIEW_VERSION_2
+#define MICROPY_BANNER_NAME_AND_VERSION "MicroPython (with v2.0 preview) " MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE
+#else
 #define MICROPY_BANNER_NAME_AND_VERSION "MicroPython " MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE
 #endif
+#endif
 
 // String used for the second part of the banner, and sys.implementation._machine
 #ifndef MICROPY_BANNER_MACHINE
diff --git a/tools/ci.sh b/tools/ci.sh
index 975ce86172..a4cbb045a4 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -462,6 +462,15 @@ function ci_unix_standard_run_tests {
     ci_unix_run_tests_full_helper standard
 }
 
+function ci_unix_standard_v2_build {
+    ci_unix_build_helper VARIANT=standard MICROPY_PREVIEW_VERSION_2=1
+    ci_unix_build_ffi_lib_helper gcc
+}
+
+function ci_unix_standard_v2_run_tests {
+    ci_unix_run_tests_full_helper standard
+}
+
 function ci_unix_coverage_setup {
     sudo pip3 install setuptools
     sudo pip3 install pyelftools

From 6cd99910cdb1e7a51cf41ed97e7fda077063df8c Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Tue, 24 Oct 2023 13:58:59 +1100
Subject: [PATCH 062/310] docs/reference/micropython2_migration: Add migration
 guide.

This is just scaffolding for now, but the idea is that there should be an
addition to this file for every commit that uses the
`MICROPY_PREVIEW_VERSION_2` macro.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 docs/reference/index.rst                  |  1 +
 docs/reference/micropython2_migration.rst | 74 +++++++++++++++++++++++
 2 files changed, 75 insertions(+)
 create mode 100644 docs/reference/micropython2_migration.rst

diff --git a/docs/reference/index.rst b/docs/reference/index.rst
index 8ac92c22eb..98f6b65737 100644
--- a/docs/reference/index.rst
+++ b/docs/reference/index.rst
@@ -31,3 +31,4 @@ implementation and the best practices to use them.
    asm_thumb2_index.rst
    filesystem.rst
    pyboard.py.rst
+   micropython2_migration.rst
diff --git a/docs/reference/micropython2_migration.rst b/docs/reference/micropython2_migration.rst
new file mode 100644
index 0000000000..954488b8cd
--- /dev/null
+++ b/docs/reference/micropython2_migration.rst
@@ -0,0 +1,74 @@
+.. _micropython2_migration:
+
+MicroPython 2.0 Migration Guide
+===============================
+
+MicroPython 2.0 is the (currently in development, not yet available) next major
+release of MicroPython.
+
+After maintaining API compatibility for almost a decade with the ``1.x`` series, in
+order to unblock some project-wide improvements MicroPython 2.0 will introduce a
+small number of breaking API changes that will require some programs to be
+updated. This guide explains how to update your Python code to accommodate these
+changes.
+
+This document is a work-in-progress. As more work is done on MicroPython 2.0,
+more items will be added to the lists below.
+
+**Note:** There are currently no MicroPython 2.0 firmware builds available for
+download. You can build it yourself by enabling the ``MICROPY_PREVIEW_VERSION_2``
+config option. As it gets closer to being ready for release, builds will be
+provided for both ``1.x.y`` and ``2.0.0-preview``.
+
+Hardware and peripherals
+------------------------
+
+Overview
+~~~~~~~~
+
+The goal is to improve consistency in the :mod:`machine` APIs across different
+ports, making it easier to write code, documentation, and tutorials that work on
+any supported microcontroller.
+
+This means that some ports' APIs need to change to match other ports.
+
+Changes
+~~~~~~~
+
+*None yet*
+
+OS & filesystem
+---------------
+
+Overview
+~~~~~~~~
+
+The primary goal is to support the ability to execute :term:`.mpy files <.mpy
+file>` directly from the filesystem without first copying them into RAM. This
+improves code deployment time and reduces memory overhead and fragmentation.
+
+Additionally, a further goal is to support a more flexible way of configuring
+partitions, filesystem types, and options like USB mass storage.
+
+Changes
+~~~~~~~
+
+*None yet*
+
+CPython compatibility
+---------------------
+
+Overview
+~~~~~~~~
+
+The goal is to improve compatibility with CPython by removing MicroPython
+extensions from CPython APIs. In most cases this means moving existing
+MicroPython-specific functions or classes to new modules.
+
+This makes it easier to write code that works on both CPython and MicroPython,
+which is useful for development and testing.
+
+Changes
+~~~~~~~
+
+*None yet*

From b6c369a396d259ab237acec5570392a96d3f443f Mon Sep 17 00:00:00 2001
From: Alessandro Gatti <a.gatti@frob.it>
Date: Mon, 23 Oct 2023 15:57:09 +0200
Subject: [PATCH 063/310] py/asm{arm,thumb,x64,x86,xtensa}: Remove unused
 macros.

`ASM_MOV_REG_IMM_FIX_U16` and `ASM_MOV_REG_IMM_FIX_WORD` are no longer
used anywhere in the code.

See discussion in #12771.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
---
 py/asmarm.h    | 2 --
 py/asmthumb.h  | 1 -
 py/asmx64.h    | 2 --
 py/asmx86.h    | 2 --
 py/asmxtensa.h | 2 --
 5 files changed, 9 deletions(-)

diff --git a/py/asmarm.h b/py/asmarm.h
index 561d69a4b1..81c3f7b1cf 100644
--- a/py/asmarm.h
+++ b/py/asmarm.h
@@ -183,8 +183,6 @@ void asm_arm_bx_reg(asm_arm_t *as, uint reg_src);
 
 #define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_arm_mov_local_reg((as), (local_num), (reg_src))
 #define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_arm_mov_reg_i32_optimised((as), (reg_dest), (imm))
-#define ASM_MOV_REG_IMM_FIX_U16(as, reg_dest, imm) asm_arm_mov_reg_i32((as), (reg_dest), (imm))
-#define ASM_MOV_REG_IMM_FIX_WORD(as, reg_dest, imm) asm_arm_mov_reg_i32((as), (reg_dest), (imm))
 #define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_arm_mov_reg_local((as), (reg_dest), (local_num))
 #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_arm_mov_reg_reg((as), (reg_dest), (reg_src))
 #define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_arm_mov_reg_local_addr((as), (reg_dest), (local_num))
diff --git a/py/asmthumb.h b/py/asmthumb.h
index 86b8166575..2829ac4c7e 100644
--- a/py/asmthumb.h
+++ b/py/asmthumb.h
@@ -401,7 +401,6 @@ void asm_thumb_b_rel12(asm_thumb_t *as, int rel);
 
 #define ASM_MOV_LOCAL_REG(as, local_num, reg) asm_thumb_mov_local_reg((as), (local_num), (reg))
 #define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_thumb_mov_reg_i32_optimised((as), (reg_dest), (imm))
-#define ASM_MOV_REG_IMM_FIX_WORD(as, reg_dest, imm) asm_thumb_mov_reg_i32((as), (reg_dest), (imm))
 #define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_thumb_mov_reg_local((as), (reg_dest), (local_num))
 #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_thumb_mov_reg_reg((as), (reg_dest), (reg_src))
 #define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_thumb_mov_reg_local_addr((as), (reg_dest), (local_num))
diff --git a/py/asmx64.h b/py/asmx64.h
index d132ee193c..a8efc2bf60 100644
--- a/py/asmx64.h
+++ b/py/asmx64.h
@@ -186,8 +186,6 @@ void asm_x64_call_ind(asm_x64_t *as, size_t fun_id, int temp_r32);
 
 #define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_x64_mov_r64_to_local((as), (reg_src), (local_num))
 #define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_x64_mov_i64_to_r64_optimised((as), (imm), (reg_dest))
-#define ASM_MOV_REG_IMM_FIX_U16(as, reg_dest, imm) asm_x64_mov_i32_to_r64((as), (imm), (reg_dest))
-#define ASM_MOV_REG_IMM_FIX_WORD(as, reg_dest, imm) asm_x64_mov_i32_to_r64((as), (imm), (reg_dest))
 #define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_x64_mov_local_to_r64((as), (local_num), (reg_dest))
 #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_x64_mov_r64_r64((as), (reg_dest), (reg_src))
 #define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_x64_mov_local_addr_to_r64((as), (local_num), (reg_dest))
diff --git a/py/asmx86.h b/py/asmx86.h
index e02e6c9545..ac98643a6a 100644
--- a/py/asmx86.h
+++ b/py/asmx86.h
@@ -181,8 +181,6 @@ void asm_x86_call_ind(asm_x86_t *as, size_t fun_id, mp_uint_t n_args, int temp_r
 
 #define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_x86_mov_r32_to_local((as), (reg_src), (local_num))
 #define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_x86_mov_i32_to_r32((as), (imm), (reg_dest))
-#define ASM_MOV_REG_IMM_FIX_U16(as, reg_dest, imm) asm_x86_mov_i32_to_r32((as), (imm), (reg_dest))
-#define ASM_MOV_REG_IMM_FIX_WORD(as, reg_dest, imm) asm_x86_mov_i32_to_r32((as), (imm), (reg_dest))
 #define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_x86_mov_local_to_r32((as), (local_num), (reg_dest))
 #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_x86_mov_r32_r32((as), (reg_dest), (reg_src))
 #define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_x86_mov_local_addr_to_r32((as), (local_num), (reg_dest))
diff --git a/py/asmxtensa.h b/py/asmxtensa.h
index 5aa86d3b24..5bd6426a14 100644
--- a/py/asmxtensa.h
+++ b/py/asmxtensa.h
@@ -366,8 +366,6 @@ void asm_xtensa_call_ind_win(asm_xtensa_t *as, uint idx);
 
 #define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_xtensa_mov_local_reg((as), ASM_NUM_REGS_SAVED + (local_num), (reg_src))
 #define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_xtensa_mov_reg_i32_optimised((as), (reg_dest), (imm))
-#define ASM_MOV_REG_IMM_FIX_U16(as, reg_dest, imm) asm_xtensa_mov_reg_i32((as), (reg_dest), (imm))
-#define ASM_MOV_REG_IMM_FIX_WORD(as, reg_dest, imm) asm_xtensa_mov_reg_i32((as), (reg_dest), (imm))
 #define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_xtensa_mov_reg_local((as), (reg_dest), ASM_NUM_REGS_SAVED + (local_num))
 #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_mov_n((as), (reg_dest), (reg_src))
 #define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_xtensa_mov_reg_local_addr((as), (reg_dest), ASM_NUM_REGS_SAVED + (local_num))

From 2fda94c28629f7c12dcab931b2bf4cc0f9c8f734 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Mon, 23 Oct 2023 12:08:17 +0200
Subject: [PATCH 064/310] extmod/network_ninaw10: Fix select flags handling in
 socket poll.

The flags returned from `select()` were misinterpreted to mean an error had
occurred for the socket, when it's actually just an exceptional condition
for the socket, such as OOB data.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 extmod/network_ninaw10.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/extmod/network_ninaw10.c b/extmod/network_ninaw10.c
index 399d02cd6e..264eb1437e 100644
--- a/extmod/network_ninaw10.c
+++ b/extmod/network_ninaw10.c
@@ -92,13 +92,8 @@ STATIC void network_ninaw10_poll_sockets(mp_sched_node_t *node) {
             // remove from poll list on error.
             socket->callback = MP_OBJ_NULL;
             mp_obj_list_remove(MP_STATE_PORT(mp_wifi_sockpoll_list), socket);
-        } else if (flags) {
+        } else if (flags & SOCKET_POLL_RD) {
             mp_call_function_1(socket->callback, MP_OBJ_FROM_PTR(socket));
-            if (flags & SOCKET_POLL_ERR) {
-                // remove from poll list on error.
-                socket->callback = MP_OBJ_NULL;
-                mp_obj_list_remove(MP_STATE_PORT(mp_wifi_sockpoll_list), socket);
-            }
         }
     }
 }
@@ -451,7 +446,7 @@ STATIC int network_ninaw10_socket_poll(mod_network_socket_obj_t *socket, uint32_
     }
     mp_uint_t start = mp_hal_ticks_ms();
     for (; !(flags & rwf); mp_hal_delay_ms(5)) {
-        if (nina_socket_poll(socket->fileno, &flags) < 0 || (flags & SOCKET_POLL_ERR)) {
+        if (nina_socket_poll(socket->fileno, &flags) < 0) {
             nina_socket_errno(_errno);
             debug_printf("socket_poll(%d) -> errno %d flags %d\n", socket->fileno, *_errno, flags);
             return -1;

From 1a017511d0b25b8b4a6c3aaa2f2bc17e06b32fa2 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Fri, 13 Oct 2023 14:47:59 +1100
Subject: [PATCH 065/310] tests/perf_bench: Add string/qstr/map tests.

These tests are designed to measure changes in performance relating to:
 - string interning / searching for existing strings
 - map lookup
 - string operations
 - string hashing

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 tests/perf_bench/bm_wordcount.py |  45 ++++++++
 tests/perf_bench/core_locals.py  | 191 +++++++++++++++++++++++++++++++
 tests/perf_bench/core_str.py     |  65 +++++++++++
 3 files changed, 301 insertions(+)
 create mode 100644 tests/perf_bench/bm_wordcount.py
 create mode 100644 tests/perf_bench/core_locals.py
 create mode 100644 tests/perf_bench/core_str.py

diff --git a/tests/perf_bench/bm_wordcount.py b/tests/perf_bench/bm_wordcount.py
new file mode 100644
index 0000000000..ef55046956
--- /dev/null
+++ b/tests/perf_bench/bm_wordcount.py
@@ -0,0 +1,45 @@
+# This tests using string as dictionary keys when they are not qstrs
+
+ZEN = "the zen of python beautiful is better than ugly explicit is better than implicit simple is better than complex complex is better than complicated flat is better than nested sparse is better than dense readability counts special cases arent special enough to break the rules although practicality beats purity errors should never pass silently unless explicitly silenced in the face of ambiguity refuse the temptation to guess there should be one and preferably only one obvious way to do it although that way may not be obvious at first unless youre dutch now is better than never although never is often better than right now if the implementation is hard to explain its a bad idea if the implementation is easy to explain it may be a good idea namespaces are one honking great idea  lets do more of those"
+
+
+def test(niter):
+    words = ZEN.split(" ")
+    for _ in range(niter):
+        counts = {}
+        for _ in range(niter):
+            for word in words:
+                counts[word] = counts.get(word, 0) + 1
+
+    return (
+        counts["python"],
+        counts["is"],
+        counts["than"],
+    )
+
+
+###########################################################################
+# Benchmark interface
+
+bm_params = {
+    (32, 10): (2,),
+    (50, 10): (4,),
+    (100, 10): (8,),
+    (500, 10): (40,),
+    (1000, 10): (80,),
+    (5000, 10): (400,),
+}
+
+
+def bm_setup(params):
+    (niter,) = params
+    state = None
+
+    def run():
+        nonlocal state
+        state = test(niter)
+
+    def result():
+        return niter, state
+
+    return run, result
diff --git a/tests/perf_bench/core_locals.py b/tests/perf_bench/core_locals.py
new file mode 100644
index 0000000000..d28e078b26
--- /dev/null
+++ b/tests/perf_bench/core_locals.py
@@ -0,0 +1,191 @@
+# This tests the performance of an instance class locals dict (importantly, that has all keys as qstrs)
+
+# These are all shorter than 10 characters, so will be interned by the parser.
+ZEN = [
+    "the",
+    "zen",
+    "of",
+    "python",
+    "beautiful",
+    "is",
+    "better",
+    "than",
+    "ugly",
+    "explicit",
+    "is",
+    "better",
+    "than",
+    "implicit",
+    "simple",
+    "is",
+    "better",
+    "than",
+    "complex",
+    "complex",
+    "is",
+    "better",
+    "than",
+    "complicate",
+    "flat",
+    "is",
+    "better",
+    "than",
+    "nested",
+    "sparse",
+    "is",
+    "better",
+    "than",
+    "dense",
+    "readabilit",
+    "counts",
+    "special",
+    "cases",
+    "arent",
+    "special",
+    "enough",
+    "to",
+    "break",
+    "the",
+    "rules",
+    "although",
+    "practicali",
+    "beats",
+    "purity",
+    "errors",
+    "should",
+    "never",
+    "pass",
+    "silently",
+    "unless",
+    "explicitly",
+    "silenced",
+    "in",
+    "the",
+    "face",
+    "of",
+    "ambiguity",
+    "refuse",
+    "the",
+    "temptation",
+    "to",
+    "guess",
+    "there",
+    "should",
+    "be",
+    "one",
+    "and",
+    "preferably",
+    "only",
+    "one",
+    "obvious",
+    "way",
+    "to",
+    "do",
+    "it",
+    "although",
+    "that",
+    "way",
+    "may",
+    "not",
+    "be",
+    "obvious",
+    "at",
+    "first",
+    "unless",
+    "youre",
+    "dutch",
+    "now",
+    "is",
+    "better",
+    "than",
+    "never",
+    "although",
+    "never",
+    "is",
+    "often",
+    "better",
+    "than",
+    "right",
+    "now",
+    "if",
+    "the",
+    "implementa",
+    "is",
+    "hard",
+    "to",
+    "explain",
+    "its",
+    "a",
+    "bad",
+    "idea",
+    "if",
+    "the",
+    "implementa",
+    "is",
+    "easy",
+    "to",
+    "explain",
+    "it",
+    "may",
+    "be",
+    "a",
+    "good",
+    "idea",
+    "namespaces",
+    "are",
+    "one",
+    "honking",
+    "great",
+    "idea",
+    "",
+    "lets",
+    "do",
+    "more",
+    "of",
+    "those",
+]
+
+
+class A:
+    pass
+
+
+def test(niter):
+    for _ in range(niter):
+        a = A()
+        for _ in range(niter):
+            for word in ZEN:
+                setattr(a, word, getattr(a, word, 0) + 1)
+
+    return (
+        getattr(a, "python"),
+        getattr(a, "is"),
+        getattr(a, "than"),
+    )
+
+
+###########################################################################
+# Benchmark interface
+
+bm_params = {
+    (32, 10): (2,),
+    (50, 10): (4,),
+    (100, 10): (8,),
+    (500, 10): (40,),
+    (1000, 10): (80,),
+    (5000, 10): (400,),
+}
+
+
+def bm_setup(params):
+    (niter,) = params
+    state = None
+
+    def run():
+        nonlocal state
+        state = test(niter)
+
+    def result():
+        return niter, state
+
+    return run, result
diff --git a/tests/perf_bench/core_str.py b/tests/perf_bench/core_str.py
new file mode 100644
index 0000000000..ca827194d6
--- /dev/null
+++ b/tests/perf_bench/core_str.py
@@ -0,0 +1,65 @@
+# This tests string handling operations
+
+ZEN = """
+The Zen of Python
+Beautiful is better than ugly.
+Explicit is better than implicit.
+Simple is better than complex.
+Complex is better than complicated.
+Flat is better than nested.
+Sparse is better than dense.
+Readability counts.
+Special cases aren't special enough to break the rules.
+Although practicality beats purity.
+Errors should never pass silently.
+Unless explicitly silenced.
+In the face of ambiguity, refuse the temptation to guess.
+There should be one-- and preferably only one --obvious way to do it.
+Although that way may not be obvious at first unless you're Dutch.
+Now is better than never.
+Although never is often better than *right* now.
+If the implementation is hard to explain, it's a bad idea.
+If the implementation is easy to explain, it may be a good idea.
+Namespaces are one honking great idea -- let's do more of those!
+"""
+
+
+def test(niter):
+    counts = {}
+    for _ in range(niter):
+        x = ZEN.replace("\n", " ").split(" ")
+        y = " ".join(x)
+        for i in range(50):
+            a = ZEN[i : i * 2]
+            b = a + "hello world"
+        for c in ZEN:
+            i = ord(c)
+            c = chr(i)
+    return (x[0], a)
+
+
+###########################################################################
+# Benchmark interface
+
+bm_params = {
+    (32, 10): (2,),
+    (50, 10): (3,),
+    (100, 10): (6,),
+    (500, 10): (30,),
+    (1000, 10): (60,),
+    (5000, 10): (300,),
+}
+
+
+def bm_setup(params):
+    (niter,) = params
+    state = None
+
+    def run():
+        nonlocal state
+        state = test(niter)
+
+    def result():
+        return niter, state
+
+    return run, result

From 78f4f30cb1aadbb46ad39220de5369e72c093509 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Mon, 9 Oct 2023 14:07:28 +1100
Subject: [PATCH 066/310] tests/extmod/asyncio_as_uasyncio.py: Fix qstr order
 dependency.

This test depends on the order in which qstrs are stored in ROM, which
affects the order in which `dir()` will probe the object to see what it
supports.  Because of the lazy-loading in asyncio/__init__.py, if it
tries to do e.g. `wait_for_ms` before `funcs` then it will import funcs,
making `funcs` later succeed. But in the other way around, `funcs` will
initially not be found.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 tests/extmod/asyncio_as_uasyncio.py     | 31 +++++++++++++++++++++----
 tests/extmod/asyncio_as_uasyncio.py.exp |  2 --
 2 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/tests/extmod/asyncio_as_uasyncio.py b/tests/extmod/asyncio_as_uasyncio.py
index 612292299c..b021980590 100644
--- a/tests/extmod/asyncio_as_uasyncio.py
+++ b/tests/extmod/asyncio_as_uasyncio.py
@@ -1,12 +1,33 @@
 try:
     import uasyncio
-    import asyncio
 except ImportError:
     print("SKIP")
     raise SystemExit
 
-x = set(dir(uasyncio))
-y = set(dir(asyncio)) - set(["event", "lock", "stream", "funcs"])
 
-print(x - y)
-print(y - x)
+# Sample of public symbols we expect to see from `asyncio`. Verify they're all
+# available on `uasyncio`.
+expected = [
+    "CancelledError",
+    "create_task",
+    "current_task",
+    "Event",
+    "gather",
+    "get_event_loop",
+    "Lock",
+    "Loop",
+    "open_connection",
+    "run",
+    "run_until_complete",
+    "sleep",
+    "sleep_ms",
+    "start_server",
+    "StreamReader",
+    "StreamWriter",
+    "Task",
+    "ThreadSafeFlag",
+    "wait_for",
+]
+
+for e in expected:
+    getattr(uasyncio, e)
diff --git a/tests/extmod/asyncio_as_uasyncio.py.exp b/tests/extmod/asyncio_as_uasyncio.py.exp
index 9405b80109..e69de29bb2 100644
--- a/tests/extmod/asyncio_as_uasyncio.py.exp
+++ b/tests/extmod/asyncio_as_uasyncio.py.exp
@@ -1,2 +0,0 @@
-set()
-set()

From e910533012b7298f5c11622d501878c678dbf45e Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Fri, 27 Oct 2023 17:41:55 +1100
Subject: [PATCH 067/310] bare-arm/lib: Add minimal strncmp implementation.

Required by upcoming qstr sorting.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/bare-arm/lib.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/ports/bare-arm/lib.c b/ports/bare-arm/lib.c
index 6ef450bea0..61d3be64e3 100644
--- a/ports/bare-arm/lib.c
+++ b/ports/bare-arm/lib.c
@@ -109,16 +109,23 @@ char *strchr(const char *s, int c) {
     return NULL;
 }
 
-int strcmp(const char *s1, const char *s2) {
-    while (*s1 && *s2) {
+int strncmp(const char *s1, const char *s2, size_t n) {
+    while (*s1 && *s2 && n-- > 0) {
         int c = *s1++ - *s2++;
         if (c) {
             return c;
         }
     }
+    if (n == 0) {
+        return 0;
+    }
     return *s1 - *s2;
 }
 
+int strcmp(const char *s1, const char *s2) {
+    return strncmp(s1, s2, 0x7fffffff);
+}
+
 size_t strlen(const char *s) {
     const char *ss = s;
     while (*ss) {

From 64c79a54239d700ecb8d7f07b13388dc79f28993 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 15 Feb 2023 16:09:04 +1100
Subject: [PATCH 068/310] py/qstr: Add support for sorted qstr pools.

This provides a significant performance boost for qstr_find_strn, which is
called a lot during parsing and loading of .mpy files, as well as interning
of string objects (which happens in most string methods that return new
strings).

Also adds comments to explain the "static" qstrs.  These are part of the
.mpy ABI and avoid needing to duplicate string data for QSTRs known to
already be in the firmware.  The static pool isn't currently sorted, but in
the future we could either split the static pool into the sorted regions,
or in the next .mpy version just sort them.

Based on initial work done by @amirgon in #6896.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 py/makeqstrdata.py  | 114 ++++++++++++++++++++++++++++++++------------
 py/persistentcode.c |   5 ++
 py/qstr.c           |  98 +++++++++++++++++++++++++++++++------
 py/qstr.h           |  19 ++++++--
 tools/mpy-tool.py   |  18 ++++---
 5 files changed, 200 insertions(+), 54 deletions(-)

diff --git a/py/makeqstrdata.py b/py/makeqstrdata.py
index 71f529fb62..2350fe04d2 100644
--- a/py/makeqstrdata.py
+++ b/py/makeqstrdata.py
@@ -52,7 +52,8 @@ codepoint2name[ord("^")] = "caret"
 codepoint2name[ord("|")] = "pipe"
 codepoint2name[ord("~")] = "tilde"
 
-# static qstrs, should be sorted
+# static qstrs, these must maintain a specific order for .mpy compatibility
+# See QSTR_LAST_STATIC at the top of py/persistentcode.c
 
 static_qstr_list = [
     "",
@@ -222,6 +223,71 @@ static_qstr_list = [
     "zip",
 ]
 
+# Additional QSTRs that must have index <255 because they are stored in
+# `mp_binary_op_method_name` and `mp_unary_op_method_name` (see py/objtype.c).
+# These are not part of the .mpy compatibility list, but we place them in the
+# fixed unsorted pool (i.e. QDEF0) to ensure their indices are small.
+operator_qstr_list = {
+    "__bool__",
+    "__pos__",
+    "__neg__",
+    "__invert__",
+    "__abs__",
+    "__float__",
+    "__complex__",
+    "__sizeof__",
+    "__lt__",
+    "__gt__",
+    "__eq__",
+    "__le__",
+    "__ge__",
+    "__ne__",
+    "__contains__",
+    "__iadd__",
+    "__isub__",
+    "__imul__",
+    "__imatmul__",
+    "__ifloordiv__",
+    "__itruediv__",
+    "__imod__",
+    "__ipow__",
+    "__ior__",
+    "__ixor__",
+    "__iand__",
+    "__ilshift__",
+    "__irshift__",
+    "__add__",
+    "__sub__",
+    "__mul__",
+    "__matmul__",
+    "__floordiv__",
+    "__truediv__",
+    "__mod__",
+    "__divmod__",
+    "__pow__",
+    "__or__",
+    "__xor__",
+    "__and__",
+    "__lshift__",
+    "__rshift__",
+    "__radd__",
+    "__rsub__",
+    "__rmul__",
+    "__rmatmul__",
+    "__rfloordiv__",
+    "__rtruediv__",
+    "__rmod__",
+    "__rpow__",
+    "__ror__",
+    "__rxor__",
+    "__rand__",
+    "__rlshift__",
+    "__rrshift__",
+    "__get__",
+    "__set__",
+    "__delete__",
+}
+
 
 # this must match the equivalent function in qstr.c
 def compute_hash(qstr, bytes_hash):
@@ -244,22 +310,13 @@ def qstr_escape(qst):
     return re.sub(r"[^A-Za-z0-9_]", esc_char, qst)
 
 
+static_qstr_list_ident = list(map(qstr_escape, static_qstr_list))
+
+
 def parse_input_headers(infiles):
     qcfgs = {}
     qstrs = {}
 
-    # add static qstrs
-    for qstr in static_qstr_list:
-        # work out the corresponding qstr name
-        ident = qstr_escape(qstr)
-
-        # don't add duplicates
-        assert ident not in qstrs
-
-        # add the qstr to the list, with order number to retain original order in file
-        order = len(qstrs) - 300000
-        qstrs[ident] = (order, ident, qstr)
-
     # read the qstrs in from the input files
     for infile in infiles:
         with open(infile, "rt") as f:
@@ -294,22 +351,12 @@ def parse_input_headers(infiles):
                 ident = qstr_escape(qstr)
 
                 # don't add duplicates
+                if ident in static_qstr_list_ident:
+                    continue
                 if ident in qstrs:
                     continue
 
-                # add the qstr to the list, with order number to retain original order in file
-                order = len(qstrs)
-                # but put special method names like __add__ at the top of list, so
-                # that their id's fit into a byte
-                if ident == "":
-                    # Sort empty qstr above all still
-                    order = -200000
-                elif ident == "__dir__":
-                    # Put __dir__ after empty qstr for builtin dir() to work
-                    order = -190000
-                elif ident.startswith("__"):
-                    order -= 100000
-                qstrs[ident] = (order, ident, qstr)
+                qstrs[ident] = (ident, qstr)
 
     if not qcfgs:
         sys.stderr.write("ERROR: Empty preprocessor output - check for errors above\n")
@@ -348,12 +395,19 @@ def print_qstr_data(qcfgs, qstrs):
     print("")
 
     # add NULL qstr with no hash or data
-    print('QDEF(MP_QSTRnull, 0, 0, "")')
+    print('QDEF0(MP_QSTRnull, 0, 0, "")')
 
-    # go through each qstr and print it out
-    for order, ident, qstr in sorted(qstrs.values(), key=lambda x: x[0]):
+    # add static qstrs to the first unsorted pool
+    for qstr in static_qstr_list:
         qbytes = make_bytes(cfg_bytes_len, cfg_bytes_hash, qstr)
-        print("QDEF(MP_QSTR_%s, %s)" % (ident, qbytes))
+        print("QDEF0(MP_QSTR_%s, %s)" % (qstr_escape(qstr), qbytes))
+
+    # add remaining qstrs to the sorted (by value) pool (unless they're in
+    # operator_qstr_list, in which case add them to the unsorted pool)
+    for ident, qstr in sorted(qstrs.values(), key=lambda x: x[1]):
+        qbytes = make_bytes(cfg_bytes_len, cfg_bytes_hash, qstr)
+        pool = 0 if qstr in operator_qstr_list else 1
+        print("QDEF%d(MP_QSTR_%s, %s)" % (pool, ident, qbytes))
 
 
 def do_work(infiles):
diff --git a/py/persistentcode.c b/py/persistentcode.c
index 0feb93bdbe..df1003babf 100644
--- a/py/persistentcode.c
+++ b/py/persistentcode.c
@@ -40,6 +40,11 @@
 
 #include "py/smallint.h"
 
+// makeqstrdata.py has a fixed list of qstrs at the start that we can assume
+// are available with know indices on all MicroPython implementations, and
+// avoid needing to duplicate the string data in the .mpy file. This is the
+// last one in that list (anything with a qstr less than or equal to this is
+// assumed to be in the list).
 #define QSTR_LAST_STATIC MP_QSTR_zip
 
 #if MICROPY_DYNAMIC_COMPILER
diff --git a/py/qstr.c b/py/qstr.c
index ea700566f4..0ae08354a5 100644
--- a/py/qstr.c
+++ b/py/qstr.c
@@ -33,9 +33,6 @@
 #include "py/gc.h"
 #include "py/runtime.h"
 
-// NOTE: we are using linear arrays to store and search for qstr's (unique strings, interned strings)
-// ultimately we will replace this with a static hash table of some kind
-
 #if MICROPY_DEBUG_VERBOSE // print debugging info
 #define DEBUG_printf DEBUG_printf
 #else // don't print debugging info
@@ -74,38 +71,94 @@ size_t qstr_compute_hash(const byte *data, size_t len) {
     return hash;
 }
 
+// The first pool is the static qstr table. The contents must remain stable as
+// it is part of the .mpy ABI. See the top of py/persistentcode.c and
+// static_qstr_list in makeqstrdata.py. This pool is unsorted (although in a
+// future .mpy version we could re-order them and make it sorted). It also
+// contains additional qstrs that must have IDs <256, see operator_qstr_list
+// in makeqstrdata.py.
+const qstr_hash_t mp_qstr_const_hashes_static[] = {
+    #ifndef NO_QSTR
+#define QDEF0(id, hash, len, str) hash,
+#define QDEF1(id, hash, len, str)
+    #include "genhdr/qstrdefs.generated.h"
+#undef QDEF0
+#undef QDEF1
+    #endif
+};
+
+const qstr_len_t mp_qstr_const_lengths_static[] = {
+    #ifndef NO_QSTR
+#define QDEF0(id, hash, len, str) len,
+#define QDEF1(id, hash, len, str)
+    #include "genhdr/qstrdefs.generated.h"
+#undef QDEF0
+#undef QDEF1
+    #endif
+};
+
+const qstr_pool_t mp_qstr_const_pool_static = {
+    NULL,               // no previous pool
+    0,                  // no previous pool
+    false,              // is_sorted
+    MICROPY_ALLOC_QSTR_ENTRIES_INIT,
+    MP_QSTRnumber_of_static,   // corresponds to number of strings in array just below
+    (qstr_hash_t *)mp_qstr_const_hashes_static,
+    (qstr_len_t *)mp_qstr_const_lengths_static,
+    {
+        #ifndef NO_QSTR
+#define QDEF0(id, hash, len, str) str,
+#define QDEF1(id, hash, len, str)
+        #include "genhdr/qstrdefs.generated.h"
+#undef QDEF0
+#undef QDEF1
+        #endif
+    },
+};
+
+// The next pool is the remainder of the qstrs defined in the firmware. This
+// is sorted.
 const qstr_hash_t mp_qstr_const_hashes[] = {
     #ifndef NO_QSTR
-#define QDEF(id, hash, len, str) hash,
+#define QDEF0(id, hash, len, str)
+#define QDEF1(id, hash, len, str) hash,
     #include "genhdr/qstrdefs.generated.h"
-#undef QDEF
+#undef QDEF0
+#undef QDEF1
     #endif
 };
 
 const qstr_len_t mp_qstr_const_lengths[] = {
     #ifndef NO_QSTR
-#define QDEF(id, hash, len, str) len,
+#define QDEF0(id, hash, len, str)
+#define QDEF1(id, hash, len, str) len,
     #include "genhdr/qstrdefs.generated.h"
-#undef QDEF
+#undef QDEF0
+#undef QDEF1
     #endif
 };
 
 const qstr_pool_t mp_qstr_const_pool = {
-    NULL,               // no previous pool
-    0,                  // no previous pool
+    &mp_qstr_const_pool_static,
+    MP_QSTRnumber_of_static,
+    true,               // is_sorted
     MICROPY_ALLOC_QSTR_ENTRIES_INIT,
-    MP_QSTRnumber_of,   // corresponds to number of strings in array just below
+    MP_QSTRnumber_of - MP_QSTRnumber_of_static,   // corresponds to number of strings in array just below
     (qstr_hash_t *)mp_qstr_const_hashes,
     (qstr_len_t *)mp_qstr_const_lengths,
     {
         #ifndef NO_QSTR
-#define QDEF(id, hash, len, str) str,
+#define QDEF0(id, hash, len, str)
+#define QDEF1(id, hash, len, str) str,
         #include "genhdr/qstrdefs.generated.h"
-#undef QDEF
+#undef QDEF0
+#undef QDEF1
         #endif
     },
 };
 
+// If frozen code is enabled, then there is an additional, sorted, ROM pool
+// containing additional qstrs required by the frozen code.
 #ifdef MICROPY_QSTR_EXTRA_POOL
 extern const qstr_pool_t MICROPY_QSTR_EXTRA_POOL;
 #define CONST_POOL MICROPY_QSTR_EXTRA_POOL
@@ -185,7 +238,24 @@ qstr qstr_find_strn(const char *str, size_t str_len) {
 
     // search pools for the data
     for (const qstr_pool_t *pool = MP_STATE_VM(last_pool); pool != NULL; pool = pool->prev) {
-        for (mp_uint_t at = 0, top = pool->len; at < top; at++) {
+        size_t low = 0;
+        size_t high = pool->len - 1;
+
+        // binary search inside the pool
+        if (pool->is_sorted) {
+            while (high - low > 1) {
+                size_t mid = (low + high) / 2;
+                int cmp = strncmp(str, pool->qstrs[mid], str_len);
+                if (cmp <= 0) {
+                    high = mid;
+                } else {
+                    low = mid;
+                }
+            }
+        }
+
+        // sequential search for the remaining strings
+        for (mp_uint_t at = low; at < high + 1; at++) {
             if (pool->hashes[at] == str_hash && pool->lengths[at] == str_len
                 && memcmp(pool->qstrs[at], str, str_len) == 0) {
                 return pool->total_prev_len + at;
@@ -194,7 +264,7 @@ qstr qstr_find_strn(const char *str, size_t str_len) {
     }
 
     // not found; return null qstr
-    return 0;
+    return MP_QSTRnull;
 }
 
 qstr qstr_from_str(const char *str) {
diff --git a/py/qstr.h b/py/qstr.h
index 0ef861f33e..0c4fc4632c 100644
--- a/py/qstr.h
+++ b/py/qstr.h
@@ -38,9 +38,21 @@
 // first entry in enum will be MP_QSTRnull=0, which indicates invalid/no qstr
 enum {
     #ifndef NO_QSTR
-#define QDEF(id, hash, len, str) id,
+#define QDEF0(id, hash, len, str) id,
+#define QDEF1(id, hash, len, str)
     #include "genhdr/qstrdefs.generated.h"
-#undef QDEF
+#undef QDEF0
+#undef QDEF1
+    #endif
+    MP_QSTRnumber_of_static,
+    MP_QSTRstart_of_main = MP_QSTRnumber_of_static - 1, // unused but shifts the enum counter back one
+
+    #ifndef NO_QSTR
+#define QDEF0(id, hash, len, str)
+#define QDEF1(id, hash, len, str) id,
+    #include "genhdr/qstrdefs.generated.h"
+#undef QDEF0
+#undef QDEF1
     #endif
     MP_QSTRnumber_of, // no underscore so it can't clash with any of the above
 };
@@ -66,7 +78,8 @@ typedef uint16_t qstr_len_t;
 
 typedef struct _qstr_pool_t {
     const struct _qstr_pool_t *prev;
-    size_t total_prev_len;
+    size_t total_prev_len : (8 * sizeof(size_t) - 1);
+    size_t is_sorted : 1;
     size_t alloc;
     size_t len;
     qstr_hash_t *hashes;
diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py
index fc3518d359..95b2c492d9 100755
--- a/tools/mpy-tool.py
+++ b/tools/mpy-tool.py
@@ -1396,15 +1396,16 @@ def disassemble_mpy(compiled_modules):
         cm.disassemble()
 
 
-def freeze_mpy(base_qstrs, compiled_modules):
+def freeze_mpy(firmware_qstr_idents, compiled_modules):
     # add to qstrs
     new = {}
     for q in global_qstrs.qstrs:
-        # don't add duplicates
-        if q is None or q.qstr_esc in base_qstrs or q.qstr_esc in new:
+        # don't add duplicates that are already in the firmware
+        if q is None or q.qstr_esc in firmware_qstr_idents or q.qstr_esc in new:
             continue
         new[q.qstr_esc] = (len(new), q.qstr_esc, q.str, bytes_cons(q.str, "utf8"))
-    new = sorted(new.values(), key=lambda x: x[0])
+    # Sort by string value (because this is a sorted pool).
+    new = sorted(new.values(), key=lambda x: x[2])
 
     print('#include "py/mpconfig.h"')
     print('#include "py/objint.h"')
@@ -1485,6 +1486,7 @@ def freeze_mpy(base_qstrs, compiled_modules):
     print("const qstr_pool_t mp_qstr_frozen_const_pool = {")
     print("    &mp_qstr_const_pool, // previous pool")
     print("    MP_QSTRnumber_of, // previous pool size")
+    print("    true, // is_sorted")
     print("    %u, // allocated entries" % qstr_pool_alloc)
     print("    %u, // used entries" % len(new))
     print("    (qstr_hash_t *)mp_qstr_frozen_const_hashes,")
@@ -1779,14 +1781,16 @@ def main():
     config.native_arch = MP_NATIVE_ARCH_NONE
 
     # set config values for qstrs, and get the existing base set of qstrs
+    # already in the firmware
     if args.qstr_header:
-        qcfgs, base_qstrs = qstrutil.parse_input_headers([args.qstr_header])
+        qcfgs, extra_qstrs = qstrutil.parse_input_headers([args.qstr_header])
+        firmware_qstr_idents = set(qstrutil.static_qstr_list_ident) | set(extra_qstrs.keys())
         config.MICROPY_QSTR_BYTES_IN_LEN = int(qcfgs["BYTES_IN_LEN"])
         config.MICROPY_QSTR_BYTES_IN_HASH = int(qcfgs["BYTES_IN_HASH"])
     else:
         config.MICROPY_QSTR_BYTES_IN_LEN = 1
         config.MICROPY_QSTR_BYTES_IN_HASH = 1
-        base_qstrs = list(qstrutil.static_qstr_list)
+        firmware_qstr_idents = set(qstrutil.static_qstr_list)
 
     # Create initial list of global qstrs.
     global_qstrs = GlobalQStrList()
@@ -1808,7 +1812,7 @@ def main():
 
     if args.freeze:
         try:
-            freeze_mpy(base_qstrs, compiled_modules)
+            freeze_mpy(firmware_qstr_idents, compiled_modules)
         except FreezeError as er:
             print(er, file=sys.stderr)
             sys.exit(1)

From bdae847082bb38c8b14c9711f74bcc91040d33ff Mon Sep 17 00:00:00 2001
From: Seon Rozenblum <seon@unexpectedmaker.com>
Date: Sun, 22 Oct 2023 18:58:44 +1100
Subject: [PATCH 069/310] esp32/boards/UM_TINYWATCHS3: Add new UM TinyWATCH S3
 board.

Signed-off-by: Seon Rozenblum <seon@unexpectedmaker.com>
---
 ports/esp32/boards/UM_TINYWATCHS3/board.json  | 25 +++++++++
 ports/esp32/boards/UM_TINYWATCHS3/board.md    |  1 +
 ports/esp32/boards/UM_TINYWATCHS3/deploy.md   | 52 +++++++++++++++++++
 .../boards/UM_TINYWATCHS3/mpconfigboard.cmake | 10 ++++
 .../boards/UM_TINYWATCHS3/mpconfigboard.h     | 12 +++++
 ports/esp32/boards/UM_TINYWATCHS3/pins.csv    | 25 +++++++++
 .../boards/UM_TINYWATCHS3/sdkconfig.board     | 19 +++++++
 7 files changed, 144 insertions(+)
 create mode 100644 ports/esp32/boards/UM_TINYWATCHS3/board.json
 create mode 100644 ports/esp32/boards/UM_TINYWATCHS3/board.md
 create mode 100644 ports/esp32/boards/UM_TINYWATCHS3/deploy.md
 create mode 100644 ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.cmake
 create mode 100644 ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.h
 create mode 100644 ports/esp32/boards/UM_TINYWATCHS3/pins.csv
 create mode 100644 ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board

diff --git a/ports/esp32/boards/UM_TINYWATCHS3/board.json b/ports/esp32/boards/UM_TINYWATCHS3/board.json
new file mode 100644
index 0000000000..61dadcfb64
--- /dev/null
+++ b/ports/esp32/boards/UM_TINYWATCHS3/board.json
@@ -0,0 +1,25 @@
+{
+    "deploy": [
+        "deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "BLE",
+        "Battery Charging",
+        "External Flash",
+        "External RAM",
+        "USB-C",
+        "WiFi"
+    ],
+    "features_non_filterable": [
+        "Watch"
+    ],
+    "images": [
+        "unexpectedmaker_tinywatchs3.jpg"
+    ],
+    "mcu": "esp32s3",
+    "product": "TinyWATCH S3",
+    "thumbnail": "",
+    "url": "https://tinywatch.io",
+    "vendor": "Unexpected Maker"
+}
diff --git a/ports/esp32/boards/UM_TINYWATCHS3/board.md b/ports/esp32/boards/UM_TINYWATCHS3/board.md
new file mode 100644
index 0000000000..a0925ac49b
--- /dev/null
+++ b/ports/esp32/boards/UM_TINYWATCHS3/board.md
@@ -0,0 +1 @@
+The following files are firmware for the TinyWATCH S3.
diff --git a/ports/esp32/boards/UM_TINYWATCHS3/deploy.md b/ports/esp32/boards/UM_TINYWATCHS3/deploy.md
new file mode 100644
index 0000000000..bad7d7c7d8
--- /dev/null
+++ b/ports/esp32/boards/UM_TINYWATCHS3/deploy.md
@@ -0,0 +1,52 @@
+Program your board using the latest version of the esptool.py program, found [here](https://github.com/espressif/esptool).
+
+To flash or erase your TinyWATCH S3, you have to first put it into download mode.
+To do this, follow these steps:
+
+- Press and hold the [BOOT] button
+- Press and release the [RESET] button
+- Release the [BOOT] button
+
+Now the board is in download mode and the native USB will have enumerated as a serial device.
+
+If you are putting MicroPython on your board for the first time then you should
+first erase the entire flash using:
+
+### Linux
+```bash
+esptool.py --chip esp32s3 --port /dev/ttyACM0 erase_flash
+```
+
+### Mac
+Please do a `ls /dev/cu.usbm*` to determine the port your board has enumerated as.
+```bash
+esptool.py --chip esp32s3 --port /dev/cu.usbmodem01 erase_flash
+```
+
+### Windows
+Change (X) to whatever COM port is being used by the board
+```bash
+esptool --chip esp32s3 --port COM(X) erase_flash
+```
+
+Now download the version of the firmware you would like to install from the options below,
+then use the following command to program the firmware starting at address 0x0,
+remembering to replace `tinywatchs3-micropython-firmware-version.bin` with the name of
+the firmware you just downloaded:
+
+### Linux
+```bash
+esptool.py --chip esp32s3 --port /dev/ttyACM0 write_flash -z 0x0 tinywatchs3-micropython-firmware-version.bin
+```
+
+### Mac
+Please do a `ls /dev/cu.usbm*` to determine the port your board has enumerated as.
+```bash
+esptool.py --chip esp32s3 --port /dev/cu.usbmodem01 write_flash -z 0x0 tinywatchs3-micropython-firmware-version.bin
+```
+
+### Windows
+Change (X) to whatever COM port is being used by the board
+```bash
+esptool --chip esp32s3 --port COM(X) write_flash -z 0x0 tinywatchs3-micropython-firmware-version.bin
+```
diff --git a/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.cmake b/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.cmake
new file mode 100644
index 0000000000..089149c44c
--- /dev/null
+++ b/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.cmake
@@ -0,0 +1,10 @@
+set(IDF_TARGET esp32s3)
+
+set(SDKCONFIG_DEFAULTS
+    boards/sdkconfig.base
+    boards/sdkconfig.usb
+    boards/sdkconfig.ble
+    boards/sdkconfig.240mhz
+    boards/sdkconfig.spiram_sx
+    boards/UM_TINYWATCHS3/sdkconfig.board
+)
diff --git a/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.h b/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.h
new file mode 100644
index 0000000000..ce8de58a01
--- /dev/null
+++ b/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.h
@@ -0,0 +1,12 @@
+#define MICROPY_HW_BOARD_NAME               "TinyWATCH S3"
+#define MICROPY_HW_MCU_NAME                 "ESP32-S3-PICO-1-N8R2"
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "TinyWATCHS3"
+
+#define MICROPY_PY_MACHINE_DAC              (0)
+
+#define MICROPY_HW_I2C0_SCL                 (9)
+#define MICROPY_HW_I2C0_SDA                 (8)
+
+#define MICROPY_HW_SPI1_MOSI                (35)
+#define MICROPY_HW_SPI1_MISO                (37)
+#define MICROPY_HW_SPI1_SCK                 (36)
diff --git a/ports/esp32/boards/UM_TINYWATCHS3/pins.csv b/ports/esp32/boards/UM_TINYWATCHS3/pins.csv
new file mode 100644
index 0000000000..8a4bc46cd5
--- /dev/null
+++ b/ports/esp32/boards/UM_TINYWATCHS3/pins.csv
@@ -0,0 +1,25 @@
+BMI_INT1,GPIO6
+BMI_INT2,GPIO7
+BUZZER,GPIO18
+FG_ALERT,GPIO14
+I2C_SCL,GPIO8
+I2C_SDA,GPIO9
+I2S_MIC_DATA,GPIO1
+I2S_MIC_BCLK,GPIO2
+I2S_MIC_WS,GPIO3
+RTC_INT,GPIO4
+SPI_USER_FLASH_CS,GPIO33
+SPI_MOSI,GPIO35
+SPI_SCK,GPIO36
+SPI_MISO,GPIO37
+TFT_CS,GPIO16
+TFT_DC,GPIO15
+TFT_RESET,GPIO17
+TFT_BACKLIGHT,GPIO13
+TOUCH_I2C_SCL,GPIO10
+TOUCH_I2C_SDA,GPIO5
+TOUCH_INT,GPIO11
+TOUCH_RESET,GPIO12
+USER_BUTTON,GPIO0
+USER_PWR_SHUTDOWN,GPIO21
+VBUS_SENSE,GPIO34
diff --git a/ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board b/ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board
new file mode 100644
index 0000000000..8dec1b8c18
--- /dev/null
+++ b/ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board
@@ -0,0 +1,19 @@
+CONFIG_ESPTOOLPY_FLASHMODE_QIO=y
+CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
+CONFIG_ESPTOOLPY_AFTER_NORESET=y
+
+CONFIG_ESPTOOLPY_FLASHSIZE_4MB=
+CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y
+CONFIG_ESPTOOLPY_FLASHSIZE_16MB=
+CONFIG_SPIRAM_MEMTEST=
+CONFIG_PARTITION_TABLE_CUSTOM=y
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-8MiB.csv"
+
+CONFIG_LWIP_LOCAL_HOSTNAME="UMTinyWATCHS3"
+
+CONFIG_TINYUSB_DESC_CUSTOM_VID=0x303A
+CONFIG_TINYUSB_DESC_CUSTOM_PID=0x81B1
+CONFIG_TINYUSB_DESC_BCD_DEVICE=0x0100
+CONFIG_TINYUSB_DESC_MANUFACTURER_STRING="Unexpected Maker"
+CONFIG_TINYUSB_DESC_PRODUCT_STRING="TinyWATCHS3"
+CONFIG_TINYUSB_DESC_SERIAL_STRING="_tws3_"

From c146017f8ac9930bd1ae7ce6d8064f3681ba2feb Mon Sep 17 00:00:00 2001
From: Seon Rozenblum <seon@unexpectedmaker.com>
Date: Fri, 27 Oct 2023 18:57:52 +1100
Subject: [PATCH 070/310] esp32/boards: Update UM board settings to use custom
 PID/VID.

Signed-off-by: Seon Rozenblum <seon@unexpectedmaker.com>
---
 ports/esp32/boards/UM_FEATHERS3/sdkconfig.board   | 2 ++
 ports/esp32/boards/UM_NANOS3/sdkconfig.board      | 2 ++
 ports/esp32/boards/UM_PROS3/sdkconfig.board       | 2 ++
 ports/esp32/boards/UM_TINYS3/sdkconfig.board      | 2 ++
 ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board | 2 ++
 5 files changed, 10 insertions(+)

diff --git a/ports/esp32/boards/UM_FEATHERS3/sdkconfig.board b/ports/esp32/boards/UM_FEATHERS3/sdkconfig.board
index 3c8df5e2a8..c557141ebf 100644
--- a/ports/esp32/boards/UM_FEATHERS3/sdkconfig.board
+++ b/ports/esp32/boards/UM_FEATHERS3/sdkconfig.board
@@ -14,6 +14,8 @@ CONFIG_LWIP_LOCAL_HOSTNAME="UMFeatherS3"
 CONFIG_TINYUSB_DESC_CUSTOM_VID=0x303A
 CONFIG_TINYUSB_DESC_CUSTOM_PID=0x80D7
 CONFIG_TINYUSB_DESC_BCD_DEVICE=0x0100
+CONFIG_TINYUSB_DESC_USE_ESPRESSIF_VID=n
+CONFIG_TINYUSB_DESC_USE_DEFAULT_PID=n
 CONFIG_TINYUSB_DESC_MANUFACTURER_STRING="Unexpected Maker"
 CONFIG_TINYUSB_DESC_PRODUCT_STRING="FeatherS3"
 CONFIG_TINYUSB_DESC_SERIAL_STRING="_fs3_"
diff --git a/ports/esp32/boards/UM_NANOS3/sdkconfig.board b/ports/esp32/boards/UM_NANOS3/sdkconfig.board
index 969bbc5be7..31d7528317 100644
--- a/ports/esp32/boards/UM_NANOS3/sdkconfig.board
+++ b/ports/esp32/boards/UM_NANOS3/sdkconfig.board
@@ -14,6 +14,8 @@ CONFIG_LWIP_LOCAL_HOSTNAME="UMNanoS3"
 CONFIG_TINYUSB_DESC_CUSTOM_VID=0x303A
 CONFIG_TINYUSB_DESC_CUSTOM_PID=0x817A
 CONFIG_TINYUSB_DESC_BCD_DEVICE=0x0100
+CONFIG_TINYUSB_DESC_USE_ESPRESSIF_VID=n
+CONFIG_TINYUSB_DESC_USE_DEFAULT_PID=n
 CONFIG_TINYUSB_DESC_MANUFACTURER_STRING="Unexpected Maker"
 CONFIG_TINYUSB_DESC_PRODUCT_STRING="NanoS3"
 CONFIG_TINYUSB_DESC_SERIAL_STRING="_ns3_"
diff --git a/ports/esp32/boards/UM_PROS3/sdkconfig.board b/ports/esp32/boards/UM_PROS3/sdkconfig.board
index 5d1ac0f684..0de84d57d0 100644
--- a/ports/esp32/boards/UM_PROS3/sdkconfig.board
+++ b/ports/esp32/boards/UM_PROS3/sdkconfig.board
@@ -14,6 +14,8 @@ CONFIG_LWIP_LOCAL_HOSTNAME="UMProS3"
 CONFIG_TINYUSB_DESC_CUSTOM_VID=0x303A
 CONFIG_TINYUSB_DESC_CUSTOM_PID=0x80D4
 CONFIG_TINYUSB_DESC_BCD_DEVICE=0x0100
+CONFIG_TINYUSB_DESC_USE_ESPRESSIF_VID=n
+CONFIG_TINYUSB_DESC_USE_DEFAULT_PID=n
 CONFIG_TINYUSB_DESC_MANUFACTURER_STRING="Unexpected Maker"
 CONFIG_TINYUSB_DESC_PRODUCT_STRING="ProS3"
 CONFIG_TINYUSB_DESC_SERIAL_STRING="_ps3_"
diff --git a/ports/esp32/boards/UM_TINYS3/sdkconfig.board b/ports/esp32/boards/UM_TINYS3/sdkconfig.board
index 7b913a565f..d1689aaf39 100644
--- a/ports/esp32/boards/UM_TINYS3/sdkconfig.board
+++ b/ports/esp32/boards/UM_TINYS3/sdkconfig.board
@@ -14,6 +14,8 @@ CONFIG_LWIP_LOCAL_HOSTNAME="UMTinyS3"
 CONFIG_TINYUSB_DESC_CUSTOM_VID=0x303A
 CONFIG_TINYUSB_DESC_CUSTOM_PID=0x80D1
 CONFIG_TINYUSB_DESC_BCD_DEVICE=0x0100
+CONFIG_TINYUSB_DESC_USE_ESPRESSIF_VID=n
+CONFIG_TINYUSB_DESC_USE_DEFAULT_PID=n
 CONFIG_TINYUSB_DESC_MANUFACTURER_STRING="Unexpected Maker"
 CONFIG_TINYUSB_DESC_PRODUCT_STRING="TinyS3"
 CONFIG_TINYUSB_DESC_SERIAL_STRING="_ts3_"
diff --git a/ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board b/ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board
index 8dec1b8c18..d73f4fe0bc 100644
--- a/ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board
+++ b/ports/esp32/boards/UM_TINYWATCHS3/sdkconfig.board
@@ -14,6 +14,8 @@ CONFIG_LWIP_LOCAL_HOSTNAME="UMTinyWATCHS3"
 CONFIG_TINYUSB_DESC_CUSTOM_VID=0x303A
 CONFIG_TINYUSB_DESC_CUSTOM_PID=0x81B1
 CONFIG_TINYUSB_DESC_BCD_DEVICE=0x0100
+CONFIG_TINYUSB_DESC_USE_ESPRESSIF_VID=n
+CONFIG_TINYUSB_DESC_USE_DEFAULT_PID=n
 CONFIG_TINYUSB_DESC_MANUFACTURER_STRING="Unexpected Maker"
 CONFIG_TINYUSB_DESC_PRODUCT_STRING="TinyWATCHS3"
 CONFIG_TINYUSB_DESC_SERIAL_STRING="_tws3_"

From 1cf3085c575095f7f027171759f112033b4060af Mon Sep 17 00:00:00 2001
From: Alessandro Gatti <a.gatti@frob.it>
Date: Sun, 8 Oct 2023 15:41:20 +0200
Subject: [PATCH 071/310] esp32/network_ppp: Allow building with IPv6 disabled.

PPP code assumes that IPv6 support is enabled.  Whilst this is the default,
certain applications may want to disable IPv6 support if not needed (or to
reduce code size).

This makes the code build with CONFIG_LWIP_IPV6 disabled, reducing code by
about 30k in that case.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
---
 ports/esp32/network_ppp.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/ports/esp32/network_ppp.c b/ports/esp32/network_ppp.c
index ea0dd1706e..d5f6715ea9 100644
--- a/ports/esp32/network_ppp.c
+++ b/ports/esp32/network_ppp.c
@@ -65,7 +65,11 @@ static void ppp_status_cb(ppp_pcb *pcb, int err_code, void *ctx) {
 
     switch (err_code) {
         case PPPERR_NONE:
+            #if CONFIG_LWIP_IPV6
             self->connected = (pppif->ip_addr.u_addr.ip4.addr != 0);
+            #else
+            self->connected = (pppif->ip_addr.addr != 0);
+            #endif // CONFIG_LWIP_IPV6
             break;
         case PPPERR_USER:
             self->clean_close = true;
@@ -250,7 +254,11 @@ STATIC mp_obj_t ppp_ifconfig(size_t n_args, const mp_obj_t *args) {
         ip_addr_t dns;
         mp_obj_t *items;
         mp_obj_get_array_fixed_n(args[1], 4, &items);
+        #if CONFIG_LWIP_IPV6
         netutils_parse_ipv4_addr(items[3], (uint8_t *)&dns.u_addr.ip4, NETUTILS_BIG);
+        #else
+        netutils_parse_ipv4_addr(items[3], (uint8_t *)&dns, NETUTILS_BIG);
+        #endif // CONFIG_LWIP_IPV6
         dns_setserver(0, &dns);
         return mp_const_none;
     }

From f74131134c7af52638348c65ecf1be5e769a5f4b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Fri, 25 Aug 2023 15:40:46 +0200
Subject: [PATCH 072/310] esp32: Poll serial/JTAG for unread data to prevent
 blocking.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

If data is pushed over serial/JTAG too fast we may fill up stdin_ringbuf
and not be able to read all the data out of the serial/JTAG buffer. Thus
we need to explicitly poll and read the serial/JTAG RX buffer to prevent
blocking (since if the serial/JTAG buffer is already filled, we will not
get another interrupt to transfer it to the stdin ringbuffer).

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 ports/esp32/mphalport.c       |  6 +++++
 ports/esp32/usb_serial_jtag.c | 46 ++++++++++++++++++++++++++---------
 ports/esp32/usb_serial_jtag.h |  1 +
 3 files changed, 41 insertions(+), 12 deletions(-)

diff --git a/ports/esp32/mphalport.c b/ports/esp32/mphalport.c
index 538b3e405c..79ddcd4827 100644
--- a/ports/esp32/mphalport.c
+++ b/ports/esp32/mphalport.c
@@ -100,6 +100,9 @@ void check_esp_err_(esp_err_t code, const char *func, const int line, const char
 
 uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags) {
     uintptr_t ret = 0;
+    #if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
+    usb_serial_jtag_poll_rx();
+    #endif
     if ((poll_flags & MP_STREAM_POLL_RD) && stdin_ringbuf.iget != stdin_ringbuf.iput) {
         ret |= MP_STREAM_POLL_RD;
     }
@@ -111,6 +114,9 @@ uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags) {
 
 int mp_hal_stdin_rx_chr(void) {
     for (;;) {
+        #if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
+        usb_serial_jtag_poll_rx();
+        #endif
         int c = ringbuf_get(&stdin_ringbuf);
         if (c != -1) {
             return c;
diff --git a/ports/esp32/usb_serial_jtag.c b/ports/esp32/usb_serial_jtag.c
index 3289a1b5c0..f4b4b7cb95 100644
--- a/ports/esp32/usb_serial_jtag.c
+++ b/ports/esp32/usb_serial_jtag.c
@@ -33,12 +33,39 @@
 #include "hal/usb_serial_jtag_ll.h"
 #include "esp_intr_alloc.h"
 #include "soc/periph_defs.h"
+#include "freertos/portmacro.h"
 
 #define USB_SERIAL_JTAG_BUF_SIZE (64)
 
+static DRAM_ATTR portMUX_TYPE rx_mux = portMUX_INITIALIZER_UNLOCKED;
 static uint8_t rx_buf[USB_SERIAL_JTAG_BUF_SIZE];
 static volatile bool terminal_connected = false;
 
+static void usb_serial_jtag_handle_rx(void) {
+    if (xPortInIsrContext()) {
+        portENTER_CRITICAL_ISR(&rx_mux);
+    } else {
+        portENTER_CRITICAL(&rx_mux);
+    }
+    size_t req_len = ringbuf_free(&stdin_ringbuf);
+    if (req_len > USB_SERIAL_JTAG_BUF_SIZE) {
+        req_len = USB_SERIAL_JTAG_BUF_SIZE;
+    }
+    size_t len = usb_serial_jtag_ll_read_rxfifo(rx_buf, req_len);
+    for (size_t i = 0; i < len; ++i) {
+        if (rx_buf[i] == mp_interrupt_char) {
+            mp_sched_keyboard_interrupt();
+        } else {
+            ringbuf_put(&stdin_ringbuf, rx_buf[i]);
+        }
+    }
+    if (xPortInIsrContext()) {
+        portEXIT_CRITICAL_ISR(&rx_mux);
+    } else {
+        portEXIT_CRITICAL(&rx_mux);
+    }
+}
+
 static void usb_serial_jtag_isr_handler(void *arg) {
     uint32_t flags = usb_serial_jtag_ll_get_intsts_mask();
 
@@ -48,18 +75,7 @@ static void usb_serial_jtag_isr_handler(void *arg) {
 
     if (flags & USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT) {
         usb_serial_jtag_ll_clr_intsts_mask(USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT);
-        size_t req_len = ringbuf_free(&stdin_ringbuf);
-        if (req_len > USB_SERIAL_JTAG_BUF_SIZE) {
-            req_len = USB_SERIAL_JTAG_BUF_SIZE;
-        }
-        size_t len = usb_serial_jtag_ll_read_rxfifo(rx_buf, req_len);
-        for (size_t i = 0; i < len; ++i) {
-            if (rx_buf[i] == mp_interrupt_char) {
-                mp_sched_keyboard_interrupt();
-            } else {
-                ringbuf_put(&stdin_ringbuf, rx_buf[i]);
-            }
-        }
+        usb_serial_jtag_handle_rx();
         mp_hal_wake_main_task_from_isr();
     }
 }
@@ -73,6 +89,12 @@ void usb_serial_jtag_init(void) {
         usb_serial_jtag_isr_handler, NULL, NULL));
 }
 
+void usb_serial_jtag_poll_rx(void) {
+    if (usb_serial_jtag_ll_rxfifo_data_available() && ringbuf_free(&stdin_ringbuf)) {
+        usb_serial_jtag_handle_rx();
+    }
+}
+
 void usb_serial_jtag_tx_strn(const char *str, size_t len) {
     while (len) {
         size_t l = len;
diff --git a/ports/esp32/usb_serial_jtag.h b/ports/esp32/usb_serial_jtag.h
index 4eebb19e4b..9e108e82cc 100644
--- a/ports/esp32/usb_serial_jtag.h
+++ b/ports/esp32/usb_serial_jtag.h
@@ -27,6 +27,7 @@
 #define MICROPY_INCLUDED_ESP32_USB_SERIAL_JTAG_H
 
 void usb_serial_jtag_init(void);
+void usb_serial_jtag_poll_rx(void);
 void usb_serial_jtag_tx_strn(const char *str, size_t len);
 
 #endif // MICROPY_INCLUDED_ESP32_USB_SERIAL_JTAG_H

From e676edac793c7722bc492a0099fb2f6ffa422184 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Wed, 13 Sep 2023 15:09:25 +0200
Subject: [PATCH 073/310] esp32/mpconfigport: Remove port-specific GAP name.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Instead use the generic default defined in modbluetooth_nimble.c.
This then also allows custom boards to easily override the default
Bluetooth GAP name.

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 ports/esp32/mpconfigport.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 39f91ab831..b4ec082092 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -160,7 +160,6 @@
 #define MICROPY_PY_ONEWIRE                  (1)
 #define MICROPY_PY_SOCKET_EVENTS            (MICROPY_PY_WEBREPL)
 #define MICROPY_PY_BLUETOOTH_RANDOM_ADDR    (1)
-#define MICROPY_PY_BLUETOOTH_DEFAULT_GAP_NAME ("ESP32")
 
 // fatfs configuration
 #define MICROPY_FATFS_ENABLE_LFN            (1)

From f1d6af9819d2fd3d70c5d09005c0b460888f8301 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Wed, 13 Sep 2023 15:07:47 +0200
Subject: [PATCH 074/310] esp32/machine_uart: Add error checking for IDF API's.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 ports/esp32/machine_uart.c | 76 +++++++++++++++++++-------------------
 1 file changed, 38 insertions(+), 38 deletions(-)

diff --git a/ports/esp32/machine_uart.c b/ports/esp32/machine_uart.c
index f498ab5b32..0e384dc07a 100644
--- a/ports/esp32/machine_uart.c
+++ b/ports/esp32/machine_uart.c
@@ -84,7 +84,7 @@ STATIC const char *_parity_name[] = {"None", "1", "0"};
 STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint32_t baudrate;
-    uart_get_baudrate(self->uart_num, &baudrate);
+    check_esp_err(uart_get_baudrate(self->uart_num, &baudrate));
     mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, tx=%d, rx=%d, rts=%d, cts=%d, txbuf=%u, rxbuf=%u, timeout=%u, timeout_char=%u",
         self->uart_num, baudrate, self->bits, _parity_name[self->parity],
         self->stop, self->tx, self->rx, self->rts, self->cts, self->txbuf, self->rxbuf, self->timeout, self->timeout_char);
@@ -177,22 +177,22 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
             .source_clk = UART_SOURCE_CLK,
         };
         uint32_t baudrate;
-        uart_get_baudrate(self->uart_num, &baudrate);
+        check_esp_err(uart_get_baudrate(self->uart_num, &baudrate));
         uartcfg.baud_rate = baudrate;
-        uart_get_word_length(self->uart_num, &uartcfg.data_bits);
-        uart_get_parity(self->uart_num, &uartcfg.parity);
-        uart_get_stop_bits(self->uart_num, &uartcfg.stop_bits);
-        uart_driver_delete(self->uart_num);
-        uart_param_config(self->uart_num, &uartcfg);
-        uart_driver_install(self->uart_num, self->rxbuf, self->txbuf, 0, NULL, 0);
+        check_esp_err(uart_get_word_length(self->uart_num, &uartcfg.data_bits));
+        check_esp_err(uart_get_parity(self->uart_num, &uartcfg.parity));
+        check_esp_err(uart_get_stop_bits(self->uart_num, &uartcfg.stop_bits));
+        check_esp_err(uart_driver_delete(self->uart_num));
+        check_esp_err(uart_param_config(self->uart_num, &uartcfg));
+        check_esp_err(uart_driver_install(self->uart_num, self->rxbuf, self->txbuf, 0, NULL, 0));
     }
 
     // set baudrate
     uint32_t baudrate = 115200;
     if (args[ARG_baudrate].u_int > 0) {
-        uart_set_baudrate(self->uart_num, args[ARG_baudrate].u_int);
+        check_esp_err(uart_set_baudrate(self->uart_num, args[ARG_baudrate].u_int));
     }
-    uart_get_baudrate(self->uart_num, &baudrate);
+    check_esp_err(uart_get_baudrate(self->uart_num, &baudrate));
 
     if (args[ARG_tx].u_obj != MP_OBJ_NULL) {
         self->tx = machine_pin_get_id(args[ARG_tx].u_obj);
@@ -209,26 +209,26 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
     if (args[ARG_cts].u_obj != MP_OBJ_NULL) {
         self->cts = machine_pin_get_id(args[ARG_cts].u_obj);
     }
-    uart_set_pin(self->uart_num, self->tx, self->rx, self->rts, self->cts);
+    check_esp_err(uart_set_pin(self->uart_num, self->tx, self->rx, self->rts, self->cts));
 
     // set data bits
     switch (args[ARG_bits].u_int) {
         case 0:
             break;
         case 5:
-            uart_set_word_length(self->uart_num, UART_DATA_5_BITS);
+            check_esp_err(uart_set_word_length(self->uart_num, UART_DATA_5_BITS));
             self->bits = 5;
             break;
         case 6:
-            uart_set_word_length(self->uart_num, UART_DATA_6_BITS);
+            check_esp_err(uart_set_word_length(self->uart_num, UART_DATA_6_BITS));
             self->bits = 6;
             break;
         case 7:
-            uart_set_word_length(self->uart_num, UART_DATA_7_BITS);
+            check_esp_err(uart_set_word_length(self->uart_num, UART_DATA_7_BITS));
             self->bits = 7;
             break;
         case 8:
-            uart_set_word_length(self->uart_num, UART_DATA_8_BITS);
+            check_esp_err(uart_set_word_length(self->uart_num, UART_DATA_8_BITS));
             self->bits = 8;
             break;
         default:
@@ -239,15 +239,15 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
     // set parity
     if (args[ARG_parity].u_obj != MP_OBJ_NULL) {
         if (args[ARG_parity].u_obj == mp_const_none) {
-            uart_set_parity(self->uart_num, UART_PARITY_DISABLE);
+            check_esp_err(uart_set_parity(self->uart_num, UART_PARITY_DISABLE));
             self->parity = 0;
         } else {
             mp_int_t parity = mp_obj_get_int(args[ARG_parity].u_obj);
             if (parity & 1) {
-                uart_set_parity(self->uart_num, UART_PARITY_ODD);
+                check_esp_err(uart_set_parity(self->uart_num, UART_PARITY_ODD));
                 self->parity = 1;
             } else {
-                uart_set_parity(self->uart_num, UART_PARITY_EVEN);
+                check_esp_err(uart_set_parity(self->uart_num, UART_PARITY_EVEN));
                 self->parity = 2;
             }
         }
@@ -259,11 +259,11 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         case 0:
             break;
         case 1:
-            uart_set_stop_bits(self->uart_num, UART_STOP_BITS_1);
+            check_esp_err(uart_set_stop_bits(self->uart_num, UART_STOP_BITS_1));
             self->stop = 1;
             break;
         case 2:
-            uart_set_stop_bits(self->uart_num, UART_STOP_BITS_2);
+            check_esp_err(uart_set_stop_bits(self->uart_num, UART_STOP_BITS_2));
             self->stop = 2;
             break;
         default:
@@ -283,10 +283,10 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         uint32_t char_time_ms = 12000 / baudrate + 1;
         uint32_t rx_timeout = self->timeout_char / char_time_ms;
         if (rx_timeout < 1) {
-            uart_set_rx_full_threshold(self->uart_num, 1);
-            uart_set_rx_timeout(self->uart_num, 1);
+            check_esp_err(uart_set_rx_full_threshold(self->uart_num, 1));
+            check_esp_err(uart_set_rx_timeout(self->uart_num, 1));
         } else {
-            uart_set_rx_timeout(self->uart_num, rx_timeout);
+            check_esp_err(uart_set_rx_timeout(self->uart_num, rx_timeout));
         }
     }
 
@@ -297,7 +297,7 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         }
         self->invert = args[ARG_invert].u_int;
     }
-    uart_set_line_inverse(self->uart_num, self->invert);
+    check_esp_err(uart_set_line_inverse(self->uart_num, self->invert));
 
     // set hardware flow control
     if (args[ARG_flow].u_int != -1) {
@@ -306,7 +306,7 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         }
         self->flowcontrol = args[ARG_flow].u_int;
     }
-    uart_set_hw_flow_ctrl(self->uart_num, self->flowcontrol, UART_FIFO_LEN - UART_FIFO_LEN / 4);
+    check_esp_err(uart_set_hw_flow_ctrl(self->uart_num, self->flowcontrol, UART_FIFO_LEN - UART_FIFO_LEN / 4));
 }
 
 STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
@@ -367,13 +367,13 @@ STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
     #endif
     {
         // Remove any existing configuration
-        uart_driver_delete(self->uart_num);
+        check_esp_err(uart_driver_delete(self->uart_num));
 
         // init the peripheral
         // Setup
-        uart_param_config(self->uart_num, &uartcfg);
+        check_esp_err(uart_param_config(self->uart_num, &uartcfg));
 
-        uart_driver_install(uart_num, self->rxbuf, self->txbuf, 0, NULL, 0);
+        check_esp_err(uart_driver_install(uart_num, self->rxbuf, self->txbuf, 0, NULL, 0));
     }
 
     mp_map_t kw_args;
@@ -381,18 +381,18 @@ STATIC mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
     mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
 
     // Make sure pins are connected.
-    uart_set_pin(self->uart_num, self->tx, self->rx, self->rts, self->cts);
+    check_esp_err(uart_set_pin(self->uart_num, self->tx, self->rx, self->rts, self->cts));
 
     return MP_OBJ_FROM_PTR(self);
 }
 
 STATIC void mp_machine_uart_deinit(machine_uart_obj_t *self) {
-    uart_driver_delete(self->uart_num);
+    check_esp_err(uart_driver_delete(self->uart_num));
 }
 
 STATIC mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
     size_t rxbufsize;
-    uart_get_buffered_data_len(self->uart_num, &rxbufsize);
+    check_esp_err(uart_get_buffered_data_len(self->uart_num, &rxbufsize));
     return rxbufsize;
 }
 
@@ -403,18 +403,18 @@ STATIC bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
 STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self) {
     // Save settings
     uint32_t baudrate;
-    uart_get_baudrate(self->uart_num, &baudrate);
+    check_esp_err(uart_get_baudrate(self->uart_num, &baudrate));
 
     // Synthesise the break condition by reducing the baud rate,
     // and cater for the worst case of 5 data bits, no parity.
-    uart_wait_tx_done(self->uart_num, pdMS_TO_TICKS(1000));
-    uart_set_baudrate(self->uart_num, baudrate * 6 / 15);
+    check_esp_err(uart_wait_tx_done(self->uart_num, pdMS_TO_TICKS(1000)));
+    check_esp_err(uart_set_baudrate(self->uart_num, baudrate * 6 / 15));
     char buf[1] = {0};
     uart_write_bytes(self->uart_num, buf, 1);
-    uart_wait_tx_done(self->uart_num, pdMS_TO_TICKS(1000));
+    check_esp_err(uart_wait_tx_done(self->uart_num, pdMS_TO_TICKS(1000)));
 
     // Restore original setting
-    uart_set_baudrate(self->uart_num, baudrate);
+    check_esp_err(uart_set_baudrate(self->uart_num, baudrate));
 }
 
 STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
@@ -472,7 +472,7 @@ STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uint
         mp_uint_t flags = arg;
         ret = 0;
         size_t rxbufsize;
-        uart_get_buffered_data_len(self->uart_num, &rxbufsize);
+        check_esp_err(uart_get_buffered_data_len(self->uart_num, &rxbufsize));
         if ((flags & MP_STREAM_POLL_RD) && rxbufsize > 0) {
             ret |= MP_STREAM_POLL_RD;
         }
@@ -483,7 +483,7 @@ STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uint
         // The timeout is estimated using the buffer size and the baudrate.
         // Take the worst case assumptions at 13 bit symbol size times 2.
         uint32_t baudrate;
-        uart_get_baudrate(self->uart_num, &baudrate);
+        check_esp_err(uart_get_baudrate(self->uart_num, &baudrate));
         uint32_t timeout = (3 + self->txbuf) * 13000 * 2 / baudrate;
         if (uart_wait_tx_done(self->uart_num, timeout) == ESP_OK) {
             ret = 0;

From a1d20e0747b4e140786d0a0fcdb6f7808714ed68 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Fri, 25 Aug 2023 15:17:04 +0200
Subject: [PATCH 075/310] esp32/network_ppp: Reduce PPP thread CPU usage.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Reduces the CPU usage by the PPP thread by sleeping for one tick if
there was nothing to read; preventing the loop using 100% CPU when the
read operation has a zero timeout and immediately returns.

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 ports/esp32/network_ppp.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/ports/esp32/network_ppp.c b/ports/esp32/network_ppp.c
index d5f6715ea9..0d8046c97d 100644
--- a/ports/esp32/network_ppp.c
+++ b/ports/esp32/network_ppp.c
@@ -108,9 +108,10 @@ static void pppos_client_task(void *self_in) {
     ppp_if_obj_t *self = (ppp_if_obj_t *)self_in;
     uint8_t buf[256];
 
-    while (ulTaskNotifyTake(pdTRUE, 0) == 0) {
+    int len = 0;
+    while (ulTaskNotifyTake(pdTRUE, len <= 0) == 0) {
         int err;
-        int len = mp_stream_rw(self->stream, buf, sizeof(buf), &err, 0);
+        len = mp_stream_rw(self->stream, buf, sizeof(buf), &err, 0);
         if (len > 0) {
             pppos_input_tcpip(self->pcb, (u8_t *)buf, len);
         }

From b2f220dff8b262bdd77c8ed6e2a9b2b8629411ca Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Thu, 29 Jun 2023 15:21:32 +0200
Subject: [PATCH 076/310] esp32/boards: Disable ALPN support.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 ports/esp32/boards/sdkconfig.base | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ports/esp32/boards/sdkconfig.base b/ports/esp32/boards/sdkconfig.base
index 6526a80355..5bd9b1aa6c 100644
--- a/ports/esp32/boards/sdkconfig.base
+++ b/ports/esp32/boards/sdkconfig.base
@@ -51,6 +51,9 @@ CONFIG_LWIP_PPP_CHAP_SUPPORT=y
 # Use 4kiB output buffer instead of default 16kiB
 CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
 
+# Disable ALPN support as it's not implemented in MicroPython
+CONFIG_MBEDTLS_SSL_ALPN=n
+
 # Allow mbedTLS to allocate from PSRAM or internal memory
 #
 # (The ESP-IDF default is internal-only, partly for physical security to prevent

From c4e63ace661df9748cfae451bde7781e61e0b3d9 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Tue, 17 Oct 2023 21:48:18 +0200
Subject: [PATCH 077/310] esp32/network_lan: Fix and simplify the code for
 ETH-SPI devices.

SPI support was not enabled, and was not adapted for esp-idf v5.x.  This
change enables SPI ethernet for all boards and adapts the code for esp-idf
v5.x.  The change follows the sample implementation of @hemakumarm72, but
adds the changes for the other adapters as well.  Further, it simplifies
the code by removing actions from netwwork_lan.c which are done in the
esp-idf drivers later, like setting the default values for .command_bits
and .address_bits, and registering the SPI interface.

Tested with a Wiznet W5500 breakout.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/esp32/boards/sdkconfig.base |  5 ++++
 ports/esp32/network_lan.c         | 47 +++++++++----------------------
 2 files changed, 19 insertions(+), 33 deletions(-)

diff --git a/ports/esp32/boards/sdkconfig.base b/ports/esp32/boards/sdkconfig.base
index 5bd9b1aa6c..372633e711 100644
--- a/ports/esp32/boards/sdkconfig.base
+++ b/ports/esp32/boards/sdkconfig.base
@@ -91,3 +91,8 @@ CONFIG_UART_ISR_IN_IRAM=y
 CONFIG_ADC_SUPPRESS_DEPRECATE_WARN=y
 CONFIG_RMT_SUPPRESS_DEPRECATE_WARN=y
 CONFIG_I2S_SUPPRESS_DEPRECATE_WARN=y
+
+CONFIG_ETH_USE_SPI_ETHERNET=y
+CONFIG_ETH_SPI_ETHERNET_W5500=y
+CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL=y
+CONFIG_ETH_SPI_ETHERNET_DM9051=y
diff --git a/ports/esp32/network_lan.c b/ports/esp32/network_lan.c
index 8557700446..0e42f403c5 100644
--- a/ports/esp32/network_lan.c
+++ b/ports/esp32/network_lan.c
@@ -180,37 +180,15 @@ STATIC mp_obj_t get_lan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ar
     phy_config.phy_addr = self->phy_addr;
     phy_config.reset_gpio_num = self->phy_power_pin;
     self->phy = NULL;
-
     #if CONFIG_ETH_USE_SPI_ETHERNET
-    spi_device_handle_t spi_handle = NULL;
-    if (IS_SPI_PHY(args[ARG_phy_type].u_int)) {
-        spi_device_interface_config_t devcfg = {
-            .mode = 0,
-            .clock_speed_hz = MICROPY_PY_NETWORK_LAN_SPI_CLOCK_SPEED_MZ * 1000 * 1000,
-            .queue_size = 20,
-            .spics_io_num = self->phy_cs_pin,
-        };
-        switch (args[ARG_phy_type].u_int) {
-            #if CONFIG_ETH_SPI_ETHERNET_DM9051
-            case PHY_DM9051: {
-                devcfg.command_bits = 1;
-                devcfg.address_bits = 7;
-                break;
-            }
-            #endif
-            #if CONFIG_ETH_SPI_ETHERNET_W5500
-            case PHY_W5500: {
-                devcfg.command_bits = 16;
-                devcfg.address_bits = 8;
-                break;
-            }
-            #endif
-        }
-        spi_host_device_t host = machine_hw_spi_get_host(args[ARG_spi].u_obj);
-        if (spi_bus_add_device(host, &devcfg, &spi_handle) != ESP_OK) {
-            mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("spi_bus_add_device failed"));
-        }
-    }
+    spi_device_interface_config_t devcfg = {
+        .mode = 0,
+        .clock_speed_hz = MICROPY_PY_NETWORK_LAN_SPI_CLOCK_SPEED_MZ * 1000 * 1000,
+        .queue_size = 20,
+        .spics_io_num = self->phy_cs_pin,
+        .command_bits = 0, // Can both be set to 0, as the respective
+        .address_bits = 0, // driver fills in proper default values.
+    };
     #endif
 
     switch (args[ARG_phy_type].u_int) {
@@ -236,7 +214,8 @@ STATIC mp_obj_t get_lan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ar
         #if CONFIG_ETH_USE_SPI_ETHERNET
         #if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
         case PHY_KSZ8851SNL: {
-            eth_ksz8851snl_config_t chip_config = ETH_KSZ8851SNL_DEFAULT_CONFIG(spi_handle);
+            spi_host_device_t host = machine_hw_spi_get_host(args[ARG_spi].u_obj);
+            eth_ksz8851snl_config_t chip_config = ETH_KSZ8851SNL_DEFAULT_CONFIG(host, &devcfg);
             chip_config.int_gpio_num = self->phy_int_pin;
             mac = esp_eth_mac_new_ksz8851snl(&chip_config, &mac_config);
             self->phy = esp_eth_phy_new_ksz8851snl(&phy_config);
@@ -245,7 +224,8 @@ STATIC mp_obj_t get_lan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ar
         #endif
         #if CONFIG_ETH_SPI_ETHERNET_DM9051
         case PHY_DM9051: {
-            eth_dm9051_config_t chip_config = ETH_DM9051_DEFAULT_CONFIG(spi_handle);
+            spi_host_device_t host = machine_hw_spi_get_host(args[ARG_spi].u_obj);
+            eth_dm9051_config_t chip_config = ETH_DM9051_DEFAULT_CONFIG(host, &devcfg);
             chip_config.int_gpio_num = self->phy_int_pin;
             mac = esp_eth_mac_new_dm9051(&chip_config, &mac_config);
             self->phy = esp_eth_phy_new_dm9051(&phy_config);
@@ -254,7 +234,8 @@ STATIC mp_obj_t get_lan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ar
         #endif
         #if CONFIG_ETH_SPI_ETHERNET_W5500
         case PHY_W5500: {
-            eth_w5500_config_t chip_config = ETH_W5500_DEFAULT_CONFIG(spi_handle);
+            spi_host_device_t host = machine_hw_spi_get_host(args[ARG_spi].u_obj);
+            eth_w5500_config_t chip_config = ETH_W5500_DEFAULT_CONFIG(host, &devcfg);
             chip_config.int_gpio_num = self->phy_int_pin;
             mac = esp_eth_mac_new_w5500(&chip_config, &mac_config);
             self->phy = esp_eth_phy_new_w5500(&phy_config);

From 9c244134fb4db921f721737763f81cd9300c2e86 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Thu, 19 Oct 2023 15:05:59 +0200
Subject: [PATCH 078/310] esp32/network_lan: Fix LAN.isconnected().

nic.isconnected() returns now "True", if a) the physical link is up and b)
an IP address is assigned.  The latter happens often by DHCP, in which case
an active connection can be assumed.  If the IP address is set manually,
nic.isconnected() would report "True" as well, if at least the physical
link is up.  This matches WLAN behaviour which returns "True" when the WLAN
has an IP address.

Before, the behaviour of nic.isconneceted() was erratic, returning "True"
sometimes even without a Ethernet cable attached.

Fixes issue #12741.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/esp32/network_lan.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/esp32/network_lan.c b/ports/esp32/network_lan.c
index 0e42f403c5..15a5110b1e 100644
--- a/ports/esp32/network_lan.c
+++ b/ports/esp32/network_lan.c
@@ -325,7 +325,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(lan_status_obj, lan_status);
 
 STATIC mp_obj_t lan_isconnected(mp_obj_t self_in) {
     lan_if_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return self->base.active ? mp_obj_new_bool(self->phy->get_link(self->phy) == ETH_LINK_UP) : mp_const_false;
+    return mp_obj_new_bool(self->base.active && (eth_status == ETH_GOT_IP));
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(lan_isconnected_obj, lan_isconnected);
 

From bbbd484f5ba27f31c142a6402662422c0634e271 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Fri, 20 Oct 2023 21:34:46 +0200
Subject: [PATCH 079/310] esp32/network_lan: Register the hostname setting for
 Ethernet.

Fixes issue #12817.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/esp32/network_lan.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/ports/esp32/network_lan.c b/ports/esp32/network_lan.c
index 15a5110b1e..f66895f9e0 100644
--- a/ports/esp32/network_lan.c
+++ b/ports/esp32/network_lan.c
@@ -44,6 +44,7 @@
 #endif
 
 #include "modnetwork.h"
+#include "extmod/modnetwork.h"
 
 typedef struct _lan_if_obj_t {
     base_if_obj_t base;
@@ -302,6 +303,7 @@ STATIC mp_obj_t lan_active(size_t n_args, const mp_obj_t *args) {
 
     if (n_args > 1) {
         if (mp_obj_is_true(args[1])) {
+            esp_netif_set_hostname(self->base.netif, mod_network_hostname_data);
             self->base.active = (esp_eth_start(self->eth_handle) == ESP_OK);
             if (!self->base.active) {
                 mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("ethernet enable failed"));

From a8dd69f20696d8135b6c4e05b9f1b2c934fad4a3 Mon Sep 17 00:00:00 2001
From: Pascal Brunot <pascal.brunot@gmail.com>
Date: Mon, 23 Oct 2023 20:28:38 +0200
Subject: [PATCH 080/310] esp32/modmachine: Fix deepsleep() when previous sleep
 delay was set.

Fixes issue #7158.

Signed-off-by: Pascal Brunot <pascal.brunot@gmail.com>
---
 ports/esp32/modmachine.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index be5348f0e6..1e83935a8b 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -115,6 +115,9 @@ STATIC mp_obj_t machine_sleep_helper(wake_type_t wake_type, size_t n_args, const
 
     mp_int_t expiry = args[ARG_sleep_ms].u_int;
 
+    // First, disable any previously set wake-up source
+    esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_ALL);
+
     if (expiry != 0) {
         esp_sleep_enable_timer_wakeup(((uint64_t)expiry) * 1000);
     }

From e579ebb11b199ab04210fd8a82a3af5be6e4fdc5 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 26 Oct 2023 17:42:10 +1100
Subject: [PATCH 081/310] teensy: Remove the teensy port.

This port is largely unmaintained, has limited features (the only hardware
support is for GPIO and timer, and no machine module), only supports a
small number of Teensy boards, and can be confused with the mimxrt support
for Teensy 4.x.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Signed-off-by: Damien George <damien@micropython.org>
---
 .github/workflows/ports_teensy.yml |   28 -
 LICENSE                            |    2 -
 README.md                          |    1 -
 ports/teensy/Makefile              |  237 ---
 ports/teensy/README.md             |   72 -
 ports/teensy/add-memzip.sh         |   27 -
 ports/teensy/core/Arduino.h        |    3 -
 ports/teensy/core/HardwareSerial.h |  227 ---
 ports/teensy/core/analog.c         |  463 ------
 ports/teensy/core/avr_functions.h  |  107 --
 ports/teensy/core/core_pins.h      |  841 ----------
 ports/teensy/core/mk20dx128.c      |  662 --------
 ports/teensy/core/mk20dx128.h      | 2385 ----------------------------
 ports/teensy/core/pins_arduino.h   |  113 --
 ports/teensy/core/pins_teensy.c    |  817 ----------
 ports/teensy/core/usb_desc.c       |  895 -----------
 ports/teensy/core/usb_desc.h       |  313 ----
 ports/teensy/core/usb_dev.c        |  980 ------------
 ports/teensy/core/usb_dev.h        |  108 --
 ports/teensy/core/usb_mem.c        |  109 --
 ports/teensy/core/usb_mem.h        |   55 -
 ports/teensy/core/usb_names.h      |   57 -
 ports/teensy/core/usb_serial.c     |  273 ----
 ports/teensy/core/usb_serial.h     |  144 --
 ports/teensy/core/yield.c          |   32 -
 ports/teensy/hal_ftm.c             |  201 ---
 ports/teensy/hal_ftm.h             |  186 ---
 ports/teensy/hal_gpio.c            |  115 --
 ports/teensy/help.c                |   69 -
 ports/teensy/lcd.c                 |   14 -
 ports/teensy/led.c                 |  144 --
 ports/teensy/led.h                 |   14 -
 ports/teensy/lexerfrozen.c         |   14 -
 ports/teensy/lexermemzip.h         |    6 -
 ports/teensy/main.c                |  386 -----
 ports/teensy/make-pins.py          |  429 -----
 ports/teensy/manifest.py           |    1 -
 ports/teensy/memzip_files/boot.py  |   15 -
 ports/teensy/memzip_files/main.py  |   13 -
 ports/teensy/mk20dx256.ld          |  176 --
 ports/teensy/mk20dx256_af.csv      |   65 -
 ports/teensy/mk20dx256_prefix.c    |   33 -
 ports/teensy/modpyb.c              |  364 -----
 ports/teensy/mpconfigport.h        |  118 --
 ports/teensy/pin_defs_teensy.c     |   71 -
 ports/teensy/pin_defs_teensy.h     |   43 -
 ports/teensy/qstrdefsport.h        |    2 -
 ports/teensy/reg.c                 |   47 -
 ports/teensy/reg.h                 |   13 -
 ports/teensy/servo.c               |  264 ---
 ports/teensy/servo.h               |   11 -
 ports/teensy/std.h                 |   25 -
 ports/teensy/teensy_hal.c          |   86 -
 ports/teensy/teensy_hal.h          |  128 --
 ports/teensy/teensy_pins.csv       |   56 -
 ports/teensy/timer.c               | 1003 ------------
 ports/teensy/timer.h               |   34 -
 ports/teensy/uart.c                |  493 ------
 ports/teensy/uart.h                |   16 -
 ports/teensy/usb.c                 |   46 -
 ports/teensy/usb.h                 |   12 -
 tools/ci.sh                        |   13 -
 tools/codeformat.py                |    2 -
 63 files changed, 13679 deletions(-)
 delete mode 100644 .github/workflows/ports_teensy.yml
 delete mode 100644 ports/teensy/Makefile
 delete mode 100644 ports/teensy/README.md
 delete mode 100755 ports/teensy/add-memzip.sh
 delete mode 100644 ports/teensy/core/Arduino.h
 delete mode 100644 ports/teensy/core/HardwareSerial.h
 delete mode 100644 ports/teensy/core/analog.c
 delete mode 100644 ports/teensy/core/avr_functions.h
 delete mode 100644 ports/teensy/core/core_pins.h
 delete mode 100644 ports/teensy/core/mk20dx128.c
 delete mode 100644 ports/teensy/core/mk20dx128.h
 delete mode 100644 ports/teensy/core/pins_arduino.h
 delete mode 100644 ports/teensy/core/pins_teensy.c
 delete mode 100644 ports/teensy/core/usb_desc.c
 delete mode 100644 ports/teensy/core/usb_desc.h
 delete mode 100644 ports/teensy/core/usb_dev.c
 delete mode 100644 ports/teensy/core/usb_dev.h
 delete mode 100644 ports/teensy/core/usb_mem.c
 delete mode 100644 ports/teensy/core/usb_mem.h
 delete mode 100644 ports/teensy/core/usb_names.h
 delete mode 100644 ports/teensy/core/usb_serial.c
 delete mode 100644 ports/teensy/core/usb_serial.h
 delete mode 100644 ports/teensy/core/yield.c
 delete mode 100644 ports/teensy/hal_ftm.c
 delete mode 100644 ports/teensy/hal_ftm.h
 delete mode 100644 ports/teensy/hal_gpio.c
 delete mode 100644 ports/teensy/help.c
 delete mode 100644 ports/teensy/lcd.c
 delete mode 100644 ports/teensy/led.c
 delete mode 100644 ports/teensy/led.h
 delete mode 100644 ports/teensy/lexerfrozen.c
 delete mode 100644 ports/teensy/lexermemzip.h
 delete mode 100644 ports/teensy/main.c
 delete mode 100755 ports/teensy/make-pins.py
 delete mode 100644 ports/teensy/manifest.py
 delete mode 100644 ports/teensy/memzip_files/boot.py
 delete mode 100644 ports/teensy/memzip_files/main.py
 delete mode 100644 ports/teensy/mk20dx256.ld
 delete mode 100644 ports/teensy/mk20dx256_af.csv
 delete mode 100644 ports/teensy/mk20dx256_prefix.c
 delete mode 100644 ports/teensy/modpyb.c
 delete mode 100644 ports/teensy/mpconfigport.h
 delete mode 100644 ports/teensy/pin_defs_teensy.c
 delete mode 100644 ports/teensy/pin_defs_teensy.h
 delete mode 100644 ports/teensy/qstrdefsport.h
 delete mode 100644 ports/teensy/reg.c
 delete mode 100644 ports/teensy/reg.h
 delete mode 100644 ports/teensy/servo.c
 delete mode 100644 ports/teensy/servo.h
 delete mode 100644 ports/teensy/std.h
 delete mode 100644 ports/teensy/teensy_hal.c
 delete mode 100644 ports/teensy/teensy_hal.h
 delete mode 100644 ports/teensy/teensy_pins.csv
 delete mode 100644 ports/teensy/timer.c
 delete mode 100644 ports/teensy/timer.h
 delete mode 100644 ports/teensy/uart.c
 delete mode 100644 ports/teensy/uart.h
 delete mode 100644 ports/teensy/usb.c
 delete mode 100644 ports/teensy/usb.h

diff --git a/.github/workflows/ports_teensy.yml b/.github/workflows/ports_teensy.yml
deleted file mode 100644
index 291c8e303c..0000000000
--- a/.github/workflows/ports_teensy.yml
+++ /dev/null
@@ -1,28 +0,0 @@
-name: teensy port
-
-on:
-  push:
-  pull_request:
-    paths:
-      - '.github/workflows/*.yml'
-      - 'tools/**'
-      - 'py/**'
-      - 'extmod/**'
-      - 'shared/**'
-      - 'lib/**'
-      - 'drivers/**'
-      - 'ports/teensy/**'
-
-concurrency:
-  group: ${{ github.workflow }}-${{ github.ref }}
-  cancel-in-progress: true
-
-jobs:
-  build:
-    runs-on: ubuntu-latest
-    steps:
-    - uses: actions/checkout@v4
-    - name: Install packages
-      run: source tools/ci.sh && ci_teensy_setup
-    - name: Build
-      run: source tools/ci.sh && ci_teensy_build
diff --git a/LICENSE b/LICENSE
index 07c88b0a03..9bd457b42a 100644
--- a/LICENSE
+++ b/LICENSE
@@ -78,8 +78,6 @@ used during the build process and is not part of the compiled source code.
                 /*/stm32*.h (BSD-3-clause)
             /usbdev (MCD-ST Liberty SW License Agreement V2)
             /usbhost (MCD-ST Liberty SW License Agreement V2)
-        /teensy
-            /core (PJRC.COM)
         /zephyr
             /src (Apache-2.0)
     /tools
diff --git a/README.md b/README.md
index e6c0a09b8b..f5bc6d78f0 100644
--- a/README.md
+++ b/README.md
@@ -119,7 +119,6 @@ In addition, the following ports are provided in this repository:
  - [rp2](ports/rp2) -- Raspberry Pi RP2040 (including Pico and Pico W).
  - [samd](ports/samd) -- Microchip (formerly Atmel) SAMD21 and SAMD51.
  - [stm32](ports/stm32) -- STMicroelectronics STM32 family (including F0, F4, F7, G0, G4, H7, L0, L4, WB)
- - [teensy](ports/teensy) -- Teensy 3.x.
  - [webassembly](ports/webassembly) -- Emscripten port targeting browsers and NodeJS.
  - [zephyr](ports/zephyr) -- Zephyr RTOS.
 
diff --git a/ports/teensy/Makefile b/ports/teensy/Makefile
deleted file mode 100644
index 8f55e4bcba..0000000000
--- a/ports/teensy/Makefile
+++ /dev/null
@@ -1,237 +0,0 @@
-include ../../py/mkenv.mk
-
-# qstr definitions (must come before including py.mk)
-QSTR_DEFS = qstrdefsport.h $(GEN_PINS_QSTR)
-
-# MicroPython feature configurations
-MICROPY_ROM_TEXT_COMPRESSION ?= 1
-
-USE_FROZEN = 1
-USE_MEMZIP = 0
-
-ifeq ($(USE_MEMZIP),1)
-SRC_C += \
-	shared/memzip/import.c \
-	shared/memzip/lexermemzip.c \
-	shared/memzip/memzip.c \
-
-OBJ += $(BUILD)/memzip-files.o
-
-MAKE_MEMZIP = $(TOP)/shared/memzip/make-memzip.py
-ifeq ($(MEMZIP_DIR),)
-MEMZIP_DIR = memzip_files
-endif
-
-$(BUILD)/memzip-files.o: $(BUILD)/memzip-files.c
-	$(call compile_c)
-
-$(BUILD)/memzip-files.c: $(shell find ${MEMZIP_DIR} -type f)
-	@$(ECHO) "Creating $@"
-	$(Q)$(PYTHON) $(MAKE_MEMZIP) --zip-file $(BUILD)/memzip-files.zip --c-file $@ $(MEMZIP_DIR)
-
-endif # USE_MEMZIP
-
-ifeq ($(USE_FROZEN),1)
-
-FROZEN_MANIFEST ?= "manifest.py"
-
-CFLAGS += -DMICROPY_MODULE_FROZEN_STR
-
-SRC_C += \
-	lexerfrozen.c
-
-endif # USE_FROZEN
-
-# include py core make definitions
-include $(TOP)/py/py.mk
-include $(TOP)/extmod/extmod.mk
-
-# If you set USE_ARDUINO_TOOLCHAIN=1 then this makefile will attempt to use
-# the toolchain that comes with Teensyduino
-ifeq ($(USE_ARDUINO_TOOLCHAIN),)
-USE_ARDUINO_TOOLCHAIN = 0
-endif
-
-ifeq ($(USE_ARDUINO_TOOLCHAIN),1)
-ifeq ($(ARDUINO),)
-$(error USE_ARDUINO_TOOLCHAIN requires that ARDUINO be set)
-endif
-endif
-
-ifeq ($(USE_ARDUINO_TOOLCHAIN),1)
-$(info Using ARDUINO toolchain)
-CROSS_COMPILE ?= $(ARDUINO)/hardware/tools/arm-none-eabi/bin/arm-none-eabi-
-else
-$(info Using toolchain from PATH)
-CROSS_COMPILE ?= arm-none-eabi-
-endif
-
-MAKE_PINS = make-pins.py
-BOARD_PINS = teensy_pins.csv
-AF_FILE = mk20dx256_af.csv
-PREFIX_FILE = mk20dx256_prefix.c
-GEN_PINS_SRC = $(BUILD)/pins_gen.c
-GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
-GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
-GEN_PINS_AF_PY = $(BUILD)/pins_af.py
-
-CFLAGS_TEENSY = -DF_CPU=96000000 -DUSB_SERIAL -D__MK20DX256__
-CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mcpu=cortex-m4 -msoft-float -mfloat-abi=soft -fsingle-precision-constant -Wdouble-promotion $(CFLAGS_TEENSY)
-
-INC += -I.
-INC += -I$(TOP)
-INC += -I$(TOP)/ports/stm32
-INC += -I$(BUILD)
-INC += -Icore
-
-CFLAGS += $(INC) -Wall -Wpointer-arith -Werror -std=c99 -nostdlib $(CFLAGS_CORTEX_M4)
-LDFLAGS += -nostdlib -T mk20dx256.ld -msoft-float -mfloat-abi=soft
-
-ifeq ($(USE_ARDUINO_TOOLCHAIN),1)
-
-LIBGCC_FILE_NAME = $(ARDUINO)/hardware/tools/arm-none-eabi/lib/gcc/arm-none-eabi/4.7.2/thumb2/libgcc.a
-LIBM_FILE_NAME   = $(ARDUINO)/hardware/tools/arm-none-eabi/arm-none-eabi/lib/thumb2/libm.a
-LIBC_FILE_NAME   = $(ARDUINO)/hardware/tools/arm-none-eabi/arm-none-eabi/lib/thumb2/libc.a
-
-else
-
-LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
-LIBM_FILE_NAME   = $(shell $(CC) $(CFLAGS) -print-file-name=libm.a)
-LIBC_FILE_NAME   = $(shell $(CC) $(CFLAGS) -print-file-name=libc.a)
-
-endif
-
-#$(info %%%%% LIBGCC_FILE_NAME = $(LIBGCC_FILE_NAME))
-#$(info %%%%% LIBM_FILE_NAME = $(LIBM_FILE_NAME))
-#$(info %%%%% LIBC_FILE_NAME = $(LIBC_FILE_NAME))
-
-#$(info %%%%% dirname LIBGCC_FILE_NAME = $(dir $(LIBGCC_FILE_NAME)))
-#$(info %%%%% dirname LIBM_FILE_NAME = $(dir $(LIBM_FILE_NAME)))
-#$(info %%%%% dirname LIBC_FILE_NAME = $(dir $(LIBC_FILE_NAME)))
-
-LIBS  = -L $(dir $(LIBM_FILE_NAME)) -lm
-LIBS += -L $(dir $(LIBC_FILE_NAME)) -lc
-LIBS += -L $(dir $(LIBGCC_FILE_NAME)) -lgcc
-
-#Debugging/Optimization
-CFLAGS += -g  # always include debug info in the ELF
-ifdef DEBUG
-CFLAGS += -Og
-else
-CFLAGS += -Os #-DNDEBUG
-endif
-CFLAGS += -fdata-sections -ffunction-sections
-LDFLAGS += -Wl,--gc-sections
-
-SRC_C += \
-	hal_ftm.c \
-	hal_gpio.c \
-	help.c \
-	main.c \
-	lcd.c \
-	led.c \
-	modpyb.c \
-	pin_defs_teensy.c \
-	reg.c \
-	teensy_hal.c \
-	timer.c \
-	uart.c \
-	usb.c \
-
-STM_SRC_C = $(addprefix ports/stm32/,\
-	irq.c \
-	pin.c \
-	pin_named_pins.c \
-	)
-
-SHARED_SRC_C = $(addprefix shared/,\
-	libc/string0.c \
-	readline/readline.c \
-	runtime/gchelper_native.c \
-	runtime/pyexec.c \
-	runtime/sys_stdio_mphal.c \
-	)
-
-SRC_TEENSY = $(addprefix core/,\
-	mk20dx128.c \
-	pins_teensy.c \
-	analog.c \
-	usb_desc.c \
-	usb_dev.c \
-	usb_mem.c \
-	usb_serial.c \
-	yield.c \
-	)
-
-OBJ += $(PY_O)
-OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(STM_SRC_C:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(SRC_TEENSY:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(SHARED_SRC_C:.c=.o))
-OBJ += $(BUILD)/shared/runtime/gchelper_thumb2.o
-OBJ += $(GEN_PINS_SRC:.c=.o)
-
-all: hex
-hex: $(BUILD)/micropython.hex
-
-ifeq ($(ARDUINO),)
-post_compile: $(BUILD)/micropython.hex
-	$(ECHO) "Please define ARDUINO (where TeensyDuino is installed)"
-	exit 1
-
-reboot:
-	$(ECHO) "Please define ARDUINO (where TeensyDuino is installed)"
-	exit 1
-
-else
-TOOLS_PATH = $(ARDUINO)/hardware/tools
-
-post_compile: $(BUILD)/micropython.hex
-	$(ECHO) "Preparing $@ for upload"
-	$(Q)$(TOOLS_PATH)/teensy_post_compile -file="$(basename $(<F))" -path="$(abspath $(<D))" -tools="$(TOOLS_PATH)"
-
-reboot:
-	$(ECHO) "REBOOT"
-	-$(Q)$(TOOLS_PATH)/teensy_reboot
-endif
-
-.PHONY: deploy
-deploy: post_compile reboot
-
-$(BUILD)/micropython.elf: $(OBJ)
-	$(ECHO) "LINK $@"
-	$(Q)$(CC) $(LDFLAGS) -o "$@" -Wl,-Map,$(@:.elf=.map) $^ $(LIBS)
-	$(Q)$(SIZE) $@
-
-$(BUILD)/%.hex: $(BUILD)/%.elf
-	$(ECHO) "HEX $<"
-	$(Q)$(OBJCOPY) -O ihex -R .eeprom "$<" "$@"
-
-# List of sources for qstr extraction
-SRC_QSTR += $(SRC_C) $(STM_SRC_C) $(SHARED_SRC_C)
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
-
-# Making OBJ use an order-only dependency on the generated pins.h file
-# has the side effect of making the pins.h file before we actually compile
-# any of the objects. The normal dependency generation will deal with the
-# case when pins.h is modified. But when it doesn't exist, we don't know
-# which source files might need it.
-$(OBJ): | $(HEADER_BUILD)/pins.h
-
-# Use a pattern rule here so that make will only call make-pins.py once to make
-# both pins_$(BOARD).c and pins.h
-$(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: teensy_%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
-	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
-
-$(GEN_PINS_SRC:.c=.o): $(GEN_PINS_SRC)
-	$(call compile_c)
-
-$(BUILD)/%.pp: $(BUILD)/%.c
-	$(ECHO) "PreProcess $<"
-	$(Q)$(CC) $(CFLAGS) -E -Wp,-C,-dD,-dI -o $@ $<
-
-include $(TOP)/py/mkrules.mk
diff --git a/ports/teensy/README.md b/ports/teensy/README.md
deleted file mode 100644
index dacc463ccd..0000000000
--- a/ports/teensy/README.md
+++ /dev/null
@@ -1,72 +0,0 @@
-# Build Instructions for Teensy 3.1
-
-Currently the Teensy 3.1 port of MicroPython builds under Linux and not under Windows.
-
-The tool chain required for the build can be found at <https://launchpad.net/gcc-arm-embedded>.
-
-Download the current Linux *.tar.bz2 file. Instructions regarding unpacking the file and moving it to the correct location
-as well as adding the extracted folders to the environment variable can be found at
-<http://eliaselectronics.com/stm32f4-tutorials/setting-up-the-stm32f4-arm-development-toolchain/>
-
-In order to download the firmware image to the teensy, you'll need to use the
-downloader included with TeensyDuino. The following assumes that you have
-TeensyDuino installed and set the ARDUINO environment variable pointing to the
-where Arduino with TeensyDuino is installed.
-
-```bash
-cd teensy
-ARDUINO=~/arduino-1.0.5 make
-```
-
-To upload MicroPython to the Teensy 3.1.
-
-Press the Program button on the Teensy 3.1
-```bash
-sudo ARDUINO=~/arduino-1.0.5/ make deploy
-```
-
-Currently, the Python prompt is through the USB serial interface, i.e.
-
-```bash
-minicom -D /dev/ttyACM0
-```
-
-## TIPS
-
-### Install 49-teensy.rules into /etc/udev/rules.d
-If you install the 49-teensy.rules file from http://www.pjrc.com/teensy/49-teensy.rules
-into your ```/etc/udev/rules.d``` folder then you won't need to use sudo:
-```bash
-sudo cp ~/Downloads/49-teensy.rules /etc/udev/rules.d
-sudo udevadm control --reload-rules
-```
-Unplug and replug the teensy board, and then you can use: ```ARDUINO=~/arduino-1.0.5/ make deploy```
-
-### Create a GNUmakefile to hold your ARDUINO setting.
-Create a file call GNUmakefile (note the lowercase m) in the teensy folder
-with the following contents:
-```make
-$(info Executing GNUmakefile)
-
-ARDUINO=${HOME}/arduino-1.0.5
-$(info ARDUINO=${ARDUINO})
-
-include Makefile
-```
-GNUmakefile is not checked into the source code control system, so it will
-retain your settings when updating your source tree. You can also add
-additional Makefile customizations this way.
-
-### Tips for OSX
-
-Set the ARDUINO environment variable to the location where Arduino with TeensyDuino is installed.
-```bash
-export ARDUINO=~/Downloads/Arduino.app/Contents/Java/
-```
-
-Search /dev/ for USB port name, which will be cu.usbmodem followed by a few numbers. The name of the port maybe different depending on the version of OSX.
-To access the Python prompt type: 
-
-```bash
-screen <devicename> 115200
-```
diff --git a/ports/teensy/add-memzip.sh b/ports/teensy/add-memzip.sh
deleted file mode 100755
index a00489effd..0000000000
--- a/ports/teensy/add-memzip.sh
+++ /dev/null
@@ -1,27 +0,0 @@
-#!/bin/bash
-
-if [ "$#" != 3 ]; then
-    echo "Usage: add-memzip.sh input.hex output.hex file-directory"
-    exit 1
-fi
-
-#set -x
-
-input_hex=$1
-output_hex=$2
-memzip_src_dir=$3
-
-input_bin=${input_hex}.bin
-output_bin=${output_hex}.bin
-zip_file=${output_hex}.zip
-zip_base=$(basename ${zip_file})
-zip_dir=$(dirname ${zip_file})
-abs_zip_dir=$(realpath ${zip_dir})
-
-rm -f ${zip_file}
-(cd ${memzip_src_dir}; zip -0 -r -D ${abs_zip_dir}/${zip_base} .)
-objcopy -I ihex -O binary ${input_hex} ${input_bin}
-cat ${input_bin} ${zip_file} > ${output_bin}
-objcopy -I binary -O ihex ${output_bin} ${output_hex}
-echo "Added ${memzip_src_dir} to ${input_hex} creating ${output_hex}"
-
diff --git a/ports/teensy/core/Arduino.h b/ports/teensy/core/Arduino.h
deleted file mode 100644
index 1b053f0507..0000000000
--- a/ports/teensy/core/Arduino.h
+++ /dev/null
@@ -1,3 +0,0 @@
-//#include "WProgram.h"
-#include "core_pins.h"
-#include "pins_arduino.h"
diff --git a/ports/teensy/core/HardwareSerial.h b/ports/teensy/core/HardwareSerial.h
deleted file mode 100644
index 439e0f7364..0000000000
--- a/ports/teensy/core/HardwareSerial.h
+++ /dev/null
@@ -1,227 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef HardwareSerial_h
-#define HardwareSerial_h
-
-#include "mk20dx128.h"
-#include <inttypes.h>
-
-// uncomment to enable 9 bit formats
-//#define SERIAL_9BIT_SUPPORT
-
-
-#define SERIAL_7E1 0x02
-#define SERIAL_7O1 0x03
-#define SERIAL_8N1 0x00
-#define SERIAL_8N2 0x04
-#define SERIAL_8E1 0x06
-#define SERIAL_8O1 0x07
-#define SERIAL_7E1_RXINV 0x12
-#define SERIAL_7O1_RXINV 0x13
-#define SERIAL_8N1_RXINV 0x10
-#define SERIAL_8N2_RXINV 0x14
-#define SERIAL_8E1_RXINV 0x16
-#define SERIAL_8O1_RXINV 0x17
-#define SERIAL_7E1_TXINV 0x22
-#define SERIAL_7O1_TXINV 0x23
-#define SERIAL_8N1_TXINV 0x20
-#define SERIAL_8N2_TXINV 0x24
-#define SERIAL_8E1_TXINV 0x26
-#define SERIAL_8O1_TXINV 0x27
-#define SERIAL_7E1_RXINV_TXINV 0x32
-#define SERIAL_7O1_RXINV_TXINV 0x33
-#define SERIAL_8N1_RXINV_TXINV 0x30
-#define SERIAL_8N2_RXINV_TXINV 0x34
-#define SERIAL_8E1_RXINV_TXINV 0x36
-#define SERIAL_8O1_RXINV_TXINV 0x37
-#ifdef SERIAL_9BIT_SUPPORT
-#define SERIAL_9N1 0x84
-#define SERIAL_9E1 0x8E
-#define SERIAL_9O1 0x8F
-#define SERIAL_9N1_RXINV 0x94
-#define SERIAL_9E1_RXINV 0x9E
-#define SERIAL_9O1_RXINV 0x9F
-#define SERIAL_9N1_TXINV 0xA4
-#define SERIAL_9E1_TXINV 0xAE
-#define SERIAL_9O1_TXINV 0xAF
-#define SERIAL_9N1_RXINV_TXINV 0xB4
-#define SERIAL_9E1_RXINV_TXINV 0xBE
-#define SERIAL_9O1_RXINV_TXINV 0xBF
-#endif
-// bit0: parity, 0=even, 1=odd
-// bit1: parity, 0=disable, 1=enable
-// bit2: mode, 1=9bit, 0=8bit
-// bit3: mode10: 1=10bit, 0=8bit
-// bit4: rxinv, 0=normal, 1=inverted
-// bit5: txinv, 0=normal, 1=inverted
-// bit6: unused
-// bit7: actual data goes into 9th bit
-
-
-#define BAUD2DIV(baud)  (((F_CPU * 2) + ((baud) >> 1)) / (baud))
-#define BAUD2DIV3(baud) (((F_BUS * 2) + ((baud) >> 1)) / (baud))
-
-// C language implementation
-//
-#ifdef __cplusplus
-extern "C" {
-#endif
-void serial_begin(uint32_t divisor);
-void serial_format(uint32_t format);
-void serial_end(void);
-void serial_set_transmit_pin(uint8_t pin);
-void serial_putchar(uint32_t c);
-void serial_write(const void *buf, unsigned int count);
-void serial_flush(void);
-int serial_available(void);
-int serial_getchar(void);
-int serial_peek(void);
-void serial_clear(void);
-void serial_print(const char *p);
-void serial_phex(uint32_t n);
-void serial_phex16(uint32_t n);
-void serial_phex32(uint32_t n);
-
-void serial2_begin(uint32_t divisor);
-void serial2_format(uint32_t format);
-void serial2_end(void);
-void serial2_putchar(uint32_t c);
-void serial2_write(const void *buf, unsigned int count);
-void serial2_flush(void);
-int serial2_available(void);
-int serial2_getchar(void);
-int serial2_peek(void);
-void serial2_clear(void);
-
-void serial3_begin(uint32_t divisor);
-void serial3_format(uint32_t format);
-void serial3_end(void);
-void serial3_putchar(uint32_t c);
-void serial3_write(const void *buf, unsigned int count);
-void serial3_flush(void);
-int serial3_available(void);
-int serial3_getchar(void);
-int serial3_peek(void);
-void serial3_clear(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-
-// C++ interface
-//
-#ifdef __cplusplus
-#include "Stream.h"
-class HardwareSerial : public Stream
-{
-public:
-	virtual void begin(uint32_t baud) { serial_begin(BAUD2DIV(baud)); }
-	virtual void begin(uint32_t baud, uint32_t format) {
-					  serial_begin(BAUD2DIV(baud));
-					  serial_format(format); }
-	virtual void end(void)		{ serial_end(); }
-	virtual void transmitterEnable(uint8_t pin) { serial_set_transmit_pin(pin); }
-	virtual int available(void)     { return serial_available(); }
-	virtual int peek(void)          { return serial_peek(); }
-	virtual int read(void)          { return serial_getchar(); }
-	virtual void flush(void)        { serial_flush(); }
-	virtual void clear(void)	{ serial_clear(); }
-	virtual size_t write(uint8_t c) { serial_putchar(c); return 1; }
-	virtual size_t write(unsigned long n)   { return write((uint8_t)n); }
-	virtual size_t write(long n)            { return write((uint8_t)n); }
-	virtual size_t write(unsigned int n)    { return write((uint8_t)n); }
-	virtual size_t write(int n)             { return write((uint8_t)n); }
-	virtual size_t write(const uint8_t *buffer, size_t size)
-					{ serial_write(buffer, size); return size; }
-        virtual size_t write(const char *str)	{ size_t len = strlen(str);
-					  serial_write((const uint8_t *)str, len);
-					  return len; }
-	virtual size_t write9bit(uint32_t c)	{ serial_putchar(c); return 1; }
-};
-extern HardwareSerial Serial1;
-
-class HardwareSerial2 : public HardwareSerial
-{
-public:
-	virtual void begin(uint32_t baud) { serial2_begin(BAUD2DIV(baud)); }
-	virtual void begin(uint32_t baud, uint32_t format) {
-					  serial2_begin(BAUD2DIV(baud));
-					  serial2_format(format); }
-	virtual void end(void)		{ serial2_end(); }
-	virtual int available(void)     { return serial2_available(); }
-	virtual int peek(void)          { return serial2_peek(); }
-	virtual int read(void)          { return serial2_getchar(); }
-	virtual void flush(void)        { serial2_flush(); }
-	virtual void clear(void)	{ serial2_clear(); }
-	virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; }
-	virtual size_t write(unsigned long n)   { return write((uint8_t)n); }
-	virtual size_t write(long n)            { return write((uint8_t)n); }
-	virtual size_t write(unsigned int n)    { return write((uint8_t)n); }
-	virtual size_t write(int n)             { return write((uint8_t)n); }
-	virtual size_t write(const uint8_t *buffer, size_t size)
-					{ serial2_write(buffer, size); return size; }
-        virtual size_t write(const char *str)	{ size_t len = strlen(str);
-					  serial2_write((const uint8_t *)str, len);
-					  return len; }
-	virtual size_t write9bit(uint32_t c)	{ serial2_putchar(c); return 1; }
-};
-extern HardwareSerial2 Serial2;
-
-class HardwareSerial3 : public HardwareSerial
-{
-public:
-	virtual void begin(uint32_t baud) { serial3_begin(BAUD2DIV3(baud)); }
-	virtual void begin(uint32_t baud, uint32_t format) {
-					  serial3_begin(BAUD2DIV3(baud));
-					  serial3_format(format); }
-	virtual void end(void)          { serial3_end(); }
-	virtual int available(void)     { return serial3_available(); }
-	virtual int peek(void)          { return serial3_peek(); }
-	virtual int read(void)          { return serial3_getchar(); }
-	virtual void flush(void)        { serial3_flush(); }
-	virtual void clear(void)	{ serial3_clear(); }
-	virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; }
-	virtual size_t write(unsigned long n)   { return write((uint8_t)n); }
-	virtual size_t write(long n)            { return write((uint8_t)n); }
-	virtual size_t write(unsigned int n)    { return write((uint8_t)n); }
-	virtual size_t write(int n)             { return write((uint8_t)n); }
-	virtual size_t write(const uint8_t *buffer, size_t size)
-					{ serial3_write(buffer, size); return size; }
-        virtual size_t write(const char *str)	{ size_t len = strlen(str);
-					  serial3_write((const uint8_t *)str, len);
-					  return len; }
-	virtual size_t write9bit(uint32_t c)	{ serial3_putchar(c); return 1; }
-};
-extern HardwareSerial3 Serial3;
-
-#endif
-#endif
diff --git a/ports/teensy/core/analog.c b/ports/teensy/core/analog.c
deleted file mode 100644
index f408ec9f12..0000000000
--- a/ports/teensy/core/analog.c
+++ /dev/null
@@ -1,463 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be 
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows 
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include "core_pins.h"
-//#include "HardwareSerial.h"
-
-static uint8_t calibrating;
-static uint8_t analog_right_shift = 0;
-static uint8_t analog_config_bits = 10;
-static uint8_t analog_num_average = 4;
-static uint8_t analog_reference_internal = 0;
-
-// the alternate clock is connected to OSCERCLK (16 MHz).
-// datasheet says ADC clock should be 2 to 12 MHz for 16 bit mode
-// datasheet says ADC clock should be 1 to 18 MHz for 8-12 bit mode
-
-#if F_BUS == 60000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1) // 7.5 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz
-#elif F_BUS == 56000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1) // 7 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz
-#elif F_BUS == 48000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 24 MHz
-#elif F_BUS == 40000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 20 MHz
-#elif F_BUS == 36000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 9 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz
-#elif F_BUS == 24000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 24 MHz
-#elif F_BUS == 16000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 16 MHz
-#elif F_BUS == 8000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz
-#elif F_BUS == 4000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz
-#elif F_BUS == 2000000
-  #define ADC_CFG1_16BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz
-  #define ADC_CFG1_12BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz
-  #define ADC_CFG1_10BIT  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz
-  #define ADC_CFG1_8BIT   ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz
-#else
-#error "F_BUS must be 60, 56, 48, 40, 36, 24, 4 or 2 MHz"
-#endif
-
-void analog_init(void)
-{
-	uint32_t num;
-
-	VREF_TRM = 0x60;
-	VREF_SC = 0xE1;		// enable 1.2 volt ref
-
-	if (analog_config_bits == 8) {
-		ADC0_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0);
-		ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3);
-		#if defined(__MK20DX256__)
-		ADC1_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0);
-		ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3);
-		#endif
-	} else if (analog_config_bits == 10) {
-		ADC0_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP;
-		ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3);
-		#if defined(__MK20DX256__)
-		ADC1_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP;
-		ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3);
-		#endif
-	} else if (analog_config_bits == 12) {
-		ADC0_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP;
-		ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2);
-		#if defined(__MK20DX256__)
-		ADC1_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP;
-		ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2);
-		#endif
-	} else {
-		ADC0_CFG1 = ADC_CFG1_16BIT + ADC_CFG1_MODE(3) + ADC_CFG1_ADLSMP;
-		ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2);
-		#if defined(__MK20DX256__)
-		ADC1_CFG1 = ADC_CFG1_16BIT + ADC_CFG1_MODE(3) + ADC_CFG1_ADLSMP;
-		ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2);
-		#endif
-	}
-
-	if (analog_reference_internal) {
-		ADC0_SC2 = ADC_SC2_REFSEL(1); // 1.2V ref
-		#if defined(__MK20DX256__)
-		ADC1_SC2 = ADC_SC2_REFSEL(1); // 1.2V ref
-		#endif
-	} else {
-		ADC0_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref
-		#if defined(__MK20DX256__)
-		ADC1_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref
-		#endif
-	}
-
-	num = analog_num_average;
-	if (num <= 1) {
-		ADC0_SC3 = ADC_SC3_CAL;  // begin cal
-		#if defined(__MK20DX256__)
-		ADC1_SC3 = ADC_SC3_CAL;  // begin cal
-		#endif
-	} else if (num <= 4) {
-		ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0);
-		#if defined(__MK20DX256__)
-		ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0);
-		#endif
-	} else if (num <= 8) {
-		ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1);
-		#if defined(__MK20DX256__)
-		ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1);
-		#endif
-	} else if (num <= 16) {
-		ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2);
-		#if defined(__MK20DX256__)
-		ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2);
-		#endif
-	} else {
-		ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3);
-		#if defined(__MK20DX256__)
-		ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3);
-		#endif
-	}
-	calibrating = 1;
-}
-
-static void wait_for_cal(void)
-{
-	uint16_t sum;
-
-	//serial_print("wait_for_cal\n");
-#if defined(__MK20DX128__)
-	while (ADC0_SC3 & ADC_SC3_CAL) {
-		// wait
-	}
-#elif defined(__MK20DX256__)
-	while ((ADC0_SC3 & ADC_SC3_CAL) || (ADC1_SC3 & ADC_SC3_CAL)) {
-		// wait
-	}
-#endif
-	__disable_irq();
-	if (calibrating) {
-		//serial_print("\n");
-		sum = ADC0_CLPS + ADC0_CLP4 + ADC0_CLP3 + ADC0_CLP2 + ADC0_CLP1 + ADC0_CLP0;
-		sum = (sum / 2) | 0x8000;
-		ADC0_PG = sum;
-		//serial_print("ADC0_PG = ");
-		//serial_phex16(sum);
-		//serial_print("\n");
-		sum = ADC0_CLMS + ADC0_CLM4 + ADC0_CLM3 + ADC0_CLM2 + ADC0_CLM1 + ADC0_CLM0;
-		sum = (sum / 2) | 0x8000;
-		ADC0_MG = sum;
-		//serial_print("ADC0_MG = ");
-		//serial_phex16(sum);
-		//serial_print("\n");
-#if defined(__MK20DX256__)
-		sum = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 + ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0;
-		sum = (sum / 2) | 0x8000;
-		ADC1_PG = sum;
-		sum = ADC1_CLMS + ADC1_CLM4 + ADC1_CLM3 + ADC1_CLM2 + ADC1_CLM1 + ADC1_CLM0;
-		sum = (sum / 2) | 0x8000;
-		ADC1_MG = sum;
-#endif
-		calibrating = 0;
-	}
-	__enable_irq();
-}
-
-// ADCx_SC2[REFSEL] bit selects the voltage reference sources for ADC.
-//   VREFH/VREFL - connected as the primary reference option
-//   1.2 V VREF_OUT - connected as the VALT reference option
-
-
-#define DEFAULT         0
-#define INTERNAL        2
-#define INTERNAL1V2     2
-#define INTERNAL1V1     2
-#define EXTERNAL        0
-
-void analogReference(uint8_t type)
-{
-	if (type) {
-		// internal reference requested
-		if (!analog_reference_internal) {
-			analog_reference_internal = 1;
-			if (calibrating) {
-				ADC0_SC3 = 0; // cancel cal
-#if defined(__MK20DX256__)
-				ADC1_SC3 = 0; // cancel cal
-#endif
-			}
-			analog_init();
-		}
-	} else {
-		// vcc or external reference requested
-		if (analog_reference_internal) {
-			analog_reference_internal = 0;
-			if (calibrating) {
-				ADC0_SC3 = 0; // cancel cal
-#if defined(__MK20DX256__)
-				ADC1_SC3 = 0; // cancel cal
-#endif
-			}
-			analog_init();
-		}
-	}
-}
-
-
-void analogReadRes(unsigned int bits)
-{
-	unsigned int config;
-
-	if (bits >= 13) {
-		if (bits > 16) bits = 16;
-		config = 16;
-	} else if (bits >= 11) {
-		config = 12;
-	} else if (bits >= 9) {
-		config = 10;
-	} else {
-		config = 8;
-	}
-	analog_right_shift = config - bits;
-	if (config != analog_config_bits) {
-		analog_config_bits = config;
-		if (calibrating) ADC0_SC3 = 0; // cancel cal
-		analog_init();
-	}
-}
-
-void analogReadAveraging(unsigned int num)
-{
-
-	if (calibrating) wait_for_cal();
-	if (num <= 1) {
-		num = 0;
-		ADC0_SC3 = 0;
-	} else if (num <= 4) {
-		num = 4;
-		ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(0);
-	} else if (num <= 8) {
-		num = 8;
-		ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(1);
-	} else if (num <= 16) {
-		num = 16;
-		ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(2);
-	} else {
-		num = 32;
-		ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(3);
-	}
-	analog_num_average = num;
-}
-
-// The SC1A register is used for both software and hardware trigger modes of operation.
-
-#if defined(__MK20DX128__)
-static const uint8_t channel2sc1a[] = {
-	5, 14, 8, 9, 13, 12, 6, 7, 15, 4,
-	0, 19, 3, 21, 26, 22, 23
-};
-#elif defined(__MK20DX256__)
-static const uint8_t channel2sc1a[] = {
-	5, 14, 8, 9, 13, 12, 6, 7, 15, 4,
-	0, 19, 3, 19+128, 26, 18+128, 23,
-	5+192, 5+128, 4+128, 6+128, 7+128, 4+192
-// A15  26   E1   ADC1_SE5a  5+64
-// A16  27   C9   ADC1_SE5b  5
-// A17  28   C8   ADC1_SE4b  4
-// A18  29   C10  ADC1_SE6b  6
-// A19  30   C11  ADC1_SE7b  7
-// A20  31   E0   ADC1_SE4a  4+64
-};
-#endif
-
-
-
-// TODO: perhaps this should store the NVIC priority, so it works recursively?
-static volatile uint8_t analogReadBusyADC0 = 0;
-#if defined(__MK20DX256__)
-static volatile uint8_t analogReadBusyADC1 = 0;
-#endif
-
-int analogRead(uint8_t pin)
-{
-	int result;
-	uint8_t index, channel;
-
-	//serial_phex(pin);
-	//serial_print(" ");
-
-	if (pin <= 13) {
-		index = pin;      // 0-13 refer to A0-A13
-	} else if (pin <= 23) {
-		index = pin - 14; // 14-23 are A0-A9
-#if defined(__MK20DX256__)
-	} else if (pin >= 26 && pin <= 31) {
-		index = pin - 9;  // 26-31 are A15-A20
-#endif
-	} else if (pin >= 34 && pin <= 40) {
-		index = pin - 24;  // 34-37 are A10-A13, 38 is temp sensor,
-			    // 39 is vref, 40 is unused (A14 on Teensy 3.1)
-	} else {
-		return 0;   // all others are invalid
-	}
-
-	//serial_phex(index);
-	//serial_print(" ");
-
-	channel = channel2sc1a[index];
-	//serial_phex(channel);
-	//serial_print(" ");
-
-	//serial_print("analogRead");
-	//return 0;
-	if (calibrating) wait_for_cal();
-	//pin = 5; // PTD1/SE5b, pin 14, analog 0
-
-#if defined(__MK20DX256__)
-	if (channel & 0x80) goto beginADC1;
-#endif
-
-	__disable_irq();
-startADC0:
-	//serial_print("startADC0\n");
-	ADC0_SC1A = channel;
-	analogReadBusyADC0 = 1;
-	__enable_irq();
-	while (1) {
-		__disable_irq();
-		if ((ADC0_SC1A & ADC_SC1_COCO)) {
-			result = ADC0_RA;
-			analogReadBusyADC0 = 0;
-			__enable_irq();
-			result >>= analog_right_shift;
-			return result;
-		}
-		// detect if analogRead was used from an interrupt
-		// if so, our analogRead got canceled, so it must
-		// be restarted.
-		if (!analogReadBusyADC0) goto startADC0;
-		__enable_irq();
-		yield();
-	}
-
-#if defined(__MK20DX256__)
-beginADC1:
-	__disable_irq();
-startADC1:
-	//serial_print("startADC0\n");
-	// ADC1_CFG2[MUXSEL] bit selects between ADCx_SEn channels a and b.
-	if (channel & 0x40) {
-		ADC1_CFG2 &= ~ADC_CFG2_MUXSEL;
-	} else {
-		ADC1_CFG2 |= ADC_CFG2_MUXSEL;
-	}
-	ADC1_SC1A = channel & 0x3F;
-	analogReadBusyADC1 = 1;
-	__enable_irq();
-	while (1) {
-		__disable_irq();
-		if ((ADC1_SC1A & ADC_SC1_COCO)) {
-			result = ADC1_RA;
-			analogReadBusyADC1 = 0;
-			__enable_irq();
-			result >>= analog_right_shift;
-			return result;
-		}
-		// detect if analogRead was used from an interrupt
-		// if so, our analogRead got canceled, so it must
-		// be restarted.
-		if (!analogReadBusyADC1) goto startADC1;
-		__enable_irq();
-		yield();
-	}
-#endif
-}
-
-
-
-void analogWriteDAC0(int val)
-{
-#if defined(__MK20DX256__)
-	SIM_SCGC2 |= SIM_SCGC2_DAC0;
-	if (analog_reference_internal) {
-		DAC0_C0 = DAC_C0_DACEN;  // 1.2V ref is DACREF_1
-	} else {
-		DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2
-	}
-	if (val < 0) val = 0;  // TODO: saturate instruction?
-	else if (val > 4095) val = 4095;
-	*(int16_t *)&(DAC0_DAT0L) = val;
-#endif
-}
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/ports/teensy/core/avr_functions.h b/ports/teensy/core/avr_functions.h
deleted file mode 100644
index fe99f26f3e..0000000000
--- a/ports/teensy/core/avr_functions.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _avr_functions_h_
-#define _avr_functions_h_
-
-#include <inttypes.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void eeprom_initialize(void);
-uint8_t eeprom_read_byte(const uint8_t *addr) __attribute__ ((pure));
-uint16_t eeprom_read_word(const uint16_t *addr) __attribute__ ((pure));
-uint32_t eeprom_read_dword(const uint32_t *addr) __attribute__ ((pure));
-void eeprom_read_block(void *buf, const void *addr, uint32_t len);
-void eeprom_write_byte(uint8_t *addr, uint8_t value);
-void eeprom_write_word(uint16_t *addr, uint16_t value);
-void eeprom_write_dword(uint32_t *addr, uint32_t value);
-void eeprom_write_block(const void *buf, void *addr, uint32_t len);
-int eeprom_is_ready(void);
-#define eeprom_busy_wait() do {} while (!eeprom_is_ready())
-
-static inline float eeprom_read_float(const float *addr) __attribute__((pure, always_inline, unused));
-static inline float eeprom_read_float(const float *addr)
-{
-	union {float f; uint32_t u32;} u;
-	u.u32 = eeprom_read_dword((const uint32_t *)addr);
-	return u.f;
-}
-static inline void eeprom_write_float(float *addr, float value) __attribute__((always_inline, unused));
-static inline void eeprom_write_float(float *addr, float value)
-{
-	union {float f; uint32_t u32;} u;
-	u.f = value;
-	eeprom_write_dword((uint32_t *)addr, u.u32);
-}
-static inline void eeprom_update_byte(uint8_t *addr, uint8_t value) __attribute__((always_inline, unused));
-static inline void eeprom_update_byte(uint8_t *addr, uint8_t value)
-{
-	eeprom_write_byte(addr, value);
-}
-static inline void eeprom_update_word(uint16_t *addr, uint16_t value) __attribute__((always_inline, unused));
-static inline void eeprom_update_word(uint16_t *addr, uint16_t value)
-{
-	eeprom_write_word(addr, value);
-}
-static inline void eeprom_update_dword(uint32_t *addr, uint32_t value) __attribute__((always_inline, unused));
-static inline void eeprom_update_dword(uint32_t *addr, uint32_t value)
-{
-	eeprom_write_dword(addr, value);
-}
-static inline void eeprom_update_float(float *addr, float value) __attribute__((always_inline, unused));
-static inline void eeprom_update_float(float *addr, float value)
-{
-	union {float f; uint32_t u32;} u;
-	u.f = value;
-	eeprom_write_dword((uint32_t *)addr, u.u32);
-}
-static inline void eeprom_update_block(const void *buf, void *addr, uint32_t len) __attribute__((always_inline, unused));
-static inline void eeprom_update_block(const void *buf, void *addr, uint32_t len)
-{
-	eeprom_write_block(buf, addr, len);
-}
-
-
-char * ultoa(unsigned long val, char *buf, int radix);
-char * ltoa(long val, char *buf, int radix);
-static inline char * utoa(unsigned int val, char *buf, int radix) __attribute__((always_inline, unused));
-static inline char * utoa(unsigned int val, char *buf, int radix) { return ultoa(val, buf, radix); }
-static inline char * itoa(int val, char *buf, int radix) __attribute__((always_inline, unused));
-static inline char * itoa(int val, char *buf, int radix) { return ltoa(val, buf, radix); }
-char * dtostrf(float val, int width, unsigned int precision, char *buf);
-
-
-#ifdef __cplusplus
-}
-#endif
-#endif
diff --git a/ports/teensy/core/core_pins.h b/ports/teensy/core/core_pins.h
deleted file mode 100644
index 169bf3c160..0000000000
--- a/ports/teensy/core/core_pins.h
+++ /dev/null
@@ -1,841 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _core_pins_h_
-#define _core_pins_h_
-
-#include "mk20dx128.h"
-#include "pins_arduino.h"
-
-
-#define HIGH		1
-#define LOW		0
-#define INPUT		0
-#define OUTPUT		1
-#define INPUT_PULLUP	2
-#define LSBFIRST	0
-#define MSBFIRST	1
-#define _BV(n)		(1<<(n))
-#define CHANGE		4
-#define FALLING		2
-#define RISING		3
-
-// Pin				Arduino
-//  0	B16			RXD
-//  1	B17			TXD
-//  2	D0
-//  3	A12	FTM1_CH0
-//  4	A13	FTM1_CH1
-//  5	D7	FTM0_CH7	OC0B/T1
-//  6	D4	FTM0_CH4	OC0A
-//  7	D2
-//  8	D3			ICP1
-//  9	C3	FTM0_CH2	OC1A
-// 10	C4	FTM0_CH3	SS/OC1B
-// 11	C6			MOSI/OC2A
-// 12	C7			MISO
-// 13	C5			SCK
-// 14	D1
-// 15	C0
-// 16	B0	(FTM1_CH0)
-// 17	B1	(FTM1_CH1)
-// 18	B3			SDA
-// 19	B2			SCL
-// 20	D5	FTM0_CH5
-// 21	D6	FTM0_CH6
-// 22	C1	FTM0_CH0
-// 23	C2	FTM0_CH1
-// 24	A5	(FTM0_CH2)
-// 25	B19
-// 26	E1
-// 27	C9
-// 28	C8
-// 29	C10
-// 30	C11
-// 31	E0
-// 32	B18
-// 33	A4	(FTM0_CH1)
-// (34)	analog only
-// (35)	analog only
-// (36)	analog only
-// (37)	analog only
-
-// not available to user:
-//	A0	FTM0_CH5	SWD Clock
-//	A1	FTM0_CH6	USB ID
-//	A2	FTM0_CH7	SWD Trace
-//	A3	FTM0_CH0	SWD Data
-
-#define CORE_NUM_TOTAL_PINS     34
-#define CORE_NUM_DIGITAL        34
-#define CORE_NUM_INTERRUPT      34
-#if defined(__MK20DX128__)
-#define CORE_NUM_ANALOG         14
-#define CORE_NUM_PWM            10
-#elif defined(__MK20DX256__)
-#define CORE_NUM_ANALOG         21
-#define CORE_NUM_PWM            12
-#endif
-
-#define CORE_PIN0_BIT		16
-#define CORE_PIN1_BIT		17
-#define CORE_PIN2_BIT		0
-#define CORE_PIN3_BIT		12
-#define CORE_PIN4_BIT		13
-#define CORE_PIN5_BIT		7
-#define CORE_PIN6_BIT		4
-#define CORE_PIN7_BIT		2
-#define CORE_PIN8_BIT		3
-#define CORE_PIN9_BIT		3
-#define CORE_PIN10_BIT		4
-#define CORE_PIN11_BIT		6
-#define CORE_PIN12_BIT		7
-#define CORE_PIN13_BIT		5
-#define CORE_PIN14_BIT		1
-#define CORE_PIN15_BIT		0
-#define CORE_PIN16_BIT		0
-#define CORE_PIN17_BIT		1
-#define CORE_PIN18_BIT		3
-#define CORE_PIN19_BIT		2
-#define CORE_PIN20_BIT		5
-#define CORE_PIN21_BIT		6
-#define CORE_PIN22_BIT		1
-#define CORE_PIN23_BIT		2
-#define CORE_PIN24_BIT		5
-#define CORE_PIN25_BIT		19
-#define CORE_PIN26_BIT		1
-#define CORE_PIN27_BIT		9
-#define CORE_PIN28_BIT		8
-#define CORE_PIN29_BIT		10
-#define CORE_PIN30_BIT		11
-#define CORE_PIN31_BIT		0
-#define CORE_PIN32_BIT		18
-#define CORE_PIN33_BIT		4
-
-#define CORE_PIN0_BITMASK	(1<<(CORE_PIN0_BIT))
-#define CORE_PIN1_BITMASK	(1<<(CORE_PIN1_BIT))
-#define CORE_PIN2_BITMASK	(1<<(CORE_PIN2_BIT))
-#define CORE_PIN3_BITMASK	(1<<(CORE_PIN3_BIT))
-#define CORE_PIN4_BITMASK	(1<<(CORE_PIN4_BIT))
-#define CORE_PIN5_BITMASK	(1<<(CORE_PIN5_BIT))
-#define CORE_PIN6_BITMASK	(1<<(CORE_PIN6_BIT))
-#define CORE_PIN7_BITMASK	(1<<(CORE_PIN7_BIT))
-#define CORE_PIN8_BITMASK	(1<<(CORE_PIN8_BIT))
-#define CORE_PIN9_BITMASK	(1<<(CORE_PIN9_BIT))
-#define CORE_PIN10_BITMASK	(1<<(CORE_PIN10_BIT))
-#define CORE_PIN11_BITMASK	(1<<(CORE_PIN11_BIT))
-#define CORE_PIN12_BITMASK	(1<<(CORE_PIN12_BIT))
-#define CORE_PIN13_BITMASK	(1<<(CORE_PIN13_BIT))
-#define CORE_PIN14_BITMASK	(1<<(CORE_PIN14_BIT))
-#define CORE_PIN15_BITMASK	(1<<(CORE_PIN15_BIT))
-#define CORE_PIN16_BITMASK	(1<<(CORE_PIN16_BIT))
-#define CORE_PIN17_BITMASK	(1<<(CORE_PIN17_BIT))
-#define CORE_PIN18_BITMASK	(1<<(CORE_PIN18_BIT))
-#define CORE_PIN19_BITMASK	(1<<(CORE_PIN19_BIT))
-#define CORE_PIN20_BITMASK	(1<<(CORE_PIN20_BIT))
-#define CORE_PIN21_BITMASK	(1<<(CORE_PIN21_BIT))
-#define CORE_PIN22_BITMASK	(1<<(CORE_PIN22_BIT))
-#define CORE_PIN23_BITMASK	(1<<(CORE_PIN23_BIT))
-#define CORE_PIN24_BITMASK	(1<<(CORE_PIN24_BIT))
-#define CORE_PIN25_BITMASK	(1<<(CORE_PIN25_BIT))
-#define CORE_PIN26_BITMASK	(1<<(CORE_PIN26_BIT))
-#define CORE_PIN27_BITMASK	(1<<(CORE_PIN27_BIT))
-#define CORE_PIN28_BITMASK	(1<<(CORE_PIN28_BIT))
-#define CORE_PIN29_BITMASK	(1<<(CORE_PIN29_BIT))
-#define CORE_PIN30_BITMASK	(1<<(CORE_PIN30_BIT))
-#define CORE_PIN31_BITMASK	(1<<(CORE_PIN31_BIT))
-#define CORE_PIN32_BITMASK	(1<<(CORE_PIN32_BIT))
-#define CORE_PIN33_BITMASK	(1<<(CORE_PIN33_BIT))
-
-#define CORE_PIN0_PORTREG	GPIOB_PDOR
-#define CORE_PIN1_PORTREG	GPIOB_PDOR
-#define CORE_PIN2_PORTREG	GPIOD_PDOR
-#define CORE_PIN3_PORTREG	GPIOA_PDOR
-#define CORE_PIN4_PORTREG	GPIOA_PDOR
-#define CORE_PIN5_PORTREG	GPIOD_PDOR
-#define CORE_PIN6_PORTREG	GPIOD_PDOR
-#define CORE_PIN7_PORTREG	GPIOD_PDOR
-#define CORE_PIN8_PORTREG	GPIOD_PDOR
-#define CORE_PIN9_PORTREG	GPIOC_PDOR
-#define CORE_PIN10_PORTREG	GPIOC_PDOR
-#define CORE_PIN11_PORTREG	GPIOC_PDOR
-#define CORE_PIN12_PORTREG	GPIOC_PDOR
-#define CORE_PIN13_PORTREG	GPIOC_PDOR
-#define CORE_PIN14_PORTREG	GPIOD_PDOR
-#define CORE_PIN15_PORTREG	GPIOC_PDOR
-#define CORE_PIN16_PORTREG	GPIOB_PDOR
-#define CORE_PIN17_PORTREG	GPIOB_PDOR
-#define CORE_PIN18_PORTREG	GPIOB_PDOR
-#define CORE_PIN19_PORTREG	GPIOB_PDOR
-#define CORE_PIN20_PORTREG	GPIOD_PDOR
-#define CORE_PIN21_PORTREG	GPIOD_PDOR
-#define CORE_PIN22_PORTREG	GPIOC_PDOR
-#define CORE_PIN23_PORTREG	GPIOC_PDOR
-#define CORE_PIN24_PORTREG	GPIOA_PDOR
-#define CORE_PIN25_PORTREG	GPIOB_PDOR
-#define CORE_PIN26_PORTREG	GPIOE_PDOR
-#define CORE_PIN27_PORTREG	GPIOC_PDOR
-#define CORE_PIN28_PORTREG	GPIOC_PDOR
-#define CORE_PIN29_PORTREG	GPIOC_PDOR
-#define CORE_PIN30_PORTREG	GPIOC_PDOR
-#define CORE_PIN31_PORTREG	GPIOE_PDOR
-#define CORE_PIN32_PORTREG	GPIOB_PDOR
-#define CORE_PIN33_PORTREG	GPIOA_PDOR
-
-#define CORE_PIN0_PORTSET	GPIOB_PSOR
-#define CORE_PIN1_PORTSET	GPIOB_PSOR
-#define CORE_PIN2_PORTSET	GPIOD_PSOR
-#define CORE_PIN3_PORTSET	GPIOA_PSOR
-#define CORE_PIN4_PORTSET	GPIOA_PSOR
-#define CORE_PIN5_PORTSET	GPIOD_PSOR
-#define CORE_PIN6_PORTSET	GPIOD_PSOR
-#define CORE_PIN7_PORTSET	GPIOD_PSOR
-#define CORE_PIN8_PORTSET	GPIOD_PSOR
-#define CORE_PIN9_PORTSET	GPIOC_PSOR
-#define CORE_PIN10_PORTSET	GPIOC_PSOR
-#define CORE_PIN11_PORTSET	GPIOC_PSOR
-#define CORE_PIN12_PORTSET	GPIOC_PSOR
-#define CORE_PIN13_PORTSET	GPIOC_PSOR
-#define CORE_PIN14_PORTSET	GPIOD_PSOR
-#define CORE_PIN15_PORTSET	GPIOC_PSOR
-#define CORE_PIN16_PORTSET	GPIOB_PSOR
-#define CORE_PIN17_PORTSET	GPIOB_PSOR
-#define CORE_PIN18_PORTSET	GPIOB_PSOR
-#define CORE_PIN19_PORTSET	GPIOB_PSOR
-#define CORE_PIN20_PORTSET	GPIOD_PSOR
-#define CORE_PIN21_PORTSET	GPIOD_PSOR
-#define CORE_PIN22_PORTSET	GPIOC_PSOR
-#define CORE_PIN23_PORTSET	GPIOC_PSOR
-#define CORE_PIN24_PORTSET	GPIOA_PSOR
-#define CORE_PIN25_PORTSET	GPIOB_PSOR
-#define CORE_PIN26_PORTSET	GPIOE_PSOR
-#define CORE_PIN27_PORTSET	GPIOC_PSOR
-#define CORE_PIN28_PORTSET	GPIOC_PSOR
-#define CORE_PIN29_PORTSET	GPIOC_PSOR
-#define CORE_PIN30_PORTSET	GPIOC_PSOR
-#define CORE_PIN31_PORTSET	GPIOE_PSOR
-#define CORE_PIN32_PORTSET	GPIOB_PSOR
-#define CORE_PIN33_PORTSET	GPIOA_PSOR
-
-#define CORE_PIN0_PORTCLEAR	GPIOB_PCOR
-#define CORE_PIN1_PORTCLEAR	GPIOB_PCOR
-#define CORE_PIN2_PORTCLEAR	GPIOD_PCOR
-#define CORE_PIN3_PORTCLEAR	GPIOA_PCOR
-#define CORE_PIN4_PORTCLEAR	GPIOA_PCOR
-#define CORE_PIN5_PORTCLEAR	GPIOD_PCOR
-#define CORE_PIN6_PORTCLEAR	GPIOD_PCOR
-#define CORE_PIN7_PORTCLEAR	GPIOD_PCOR
-#define CORE_PIN8_PORTCLEAR	GPIOD_PCOR
-#define CORE_PIN9_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN10_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN11_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN12_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN13_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN14_PORTCLEAR	GPIOD_PCOR
-#define CORE_PIN15_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN16_PORTCLEAR	GPIOB_PCOR
-#define CORE_PIN17_PORTCLEAR	GPIOB_PCOR
-#define CORE_PIN18_PORTCLEAR	GPIOB_PCOR
-#define CORE_PIN19_PORTCLEAR	GPIOB_PCOR
-#define CORE_PIN20_PORTCLEAR	GPIOD_PCOR
-#define CORE_PIN21_PORTCLEAR	GPIOD_PCOR
-#define CORE_PIN22_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN23_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN24_PORTCLEAR	GPIOA_PCOR
-#define CORE_PIN25_PORTCLEAR	GPIOB_PCOR
-#define CORE_PIN26_PORTCLEAR	GPIOE_PCOR
-#define CORE_PIN27_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN28_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN29_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN30_PORTCLEAR	GPIOC_PCOR
-#define CORE_PIN31_PORTCLEAR	GPIOE_PCOR
-#define CORE_PIN32_PORTCLEAR	GPIOB_PCOR
-#define CORE_PIN33_PORTCLEAR	GPIOA_PCOR
-
-#define CORE_PIN0_DDRREG	GPIOB_PDDR
-#define CORE_PIN1_DDRREG	GPIOB_PDDR
-#define CORE_PIN2_DDRREG	GPIOD_PDDR
-#define CORE_PIN3_DDRREG	GPIOA_PDDR
-#define CORE_PIN4_DDRREG	GPIOA_PDDR
-#define CORE_PIN5_DDRREG	GPIOD_PDDR
-#define CORE_PIN6_DDRREG	GPIOD_PDDR
-#define CORE_PIN7_DDRREG	GPIOD_PDDR
-#define CORE_PIN8_DDRREG	GPIOD_PDDR
-#define CORE_PIN9_DDRREG	GPIOC_PDDR
-#define CORE_PIN10_DDRREG	GPIOC_PDDR
-#define CORE_PIN11_DDRREG	GPIOC_PDDR
-#define CORE_PIN12_DDRREG	GPIOC_PDDR
-#define CORE_PIN13_DDRREG	GPIOC_PDDR
-#define CORE_PIN14_DDRREG	GPIOD_PDDR
-#define CORE_PIN15_DDRREG	GPIOC_PDDR
-#define CORE_PIN16_DDRREG	GPIOB_PDDR
-#define CORE_PIN17_DDRREG	GPIOB_PDDR
-#define CORE_PIN18_DDRREG	GPIOB_PDDR
-#define CORE_PIN19_DDRREG	GPIOB_PDDR
-#define CORE_PIN20_DDRREG	GPIOD_PDDR
-#define CORE_PIN21_DDRREG	GPIOD_PDDR
-#define CORE_PIN22_DDRREG	GPIOC_PDDR
-#define CORE_PIN23_DDRREG	GPIOC_PDDR
-#define CORE_PIN24_DDRREG	GPIOA_PDDR
-#define CORE_PIN25_DDRREG	GPIOB_PDDR
-#define CORE_PIN26_DDRREG	GPIOE_PDDR
-#define CORE_PIN27_DDRREG	GPIOC_PDDR
-#define CORE_PIN28_DDRREG	GPIOC_PDDR
-#define CORE_PIN29_DDRREG	GPIOC_PDDR
-#define CORE_PIN30_DDRREG	GPIOC_PDDR
-#define CORE_PIN31_DDRREG	GPIOE_PDDR
-#define CORE_PIN32_DDRREG	GPIOB_PDDR
-#define CORE_PIN33_DDRREG	GPIOA_PDDR
-
-#define CORE_PIN0_PINREG	GPIOB_PDIR
-#define CORE_PIN1_PINREG	GPIOB_PDIR
-#define CORE_PIN2_PINREG	GPIOD_PDIR
-#define CORE_PIN3_PINREG	GPIOA_PDIR
-#define CORE_PIN4_PINREG	GPIOA_PDIR
-#define CORE_PIN5_PINREG	GPIOD_PDIR
-#define CORE_PIN6_PINREG	GPIOD_PDIR
-#define CORE_PIN7_PINREG	GPIOD_PDIR
-#define CORE_PIN8_PINREG	GPIOD_PDIR
-#define CORE_PIN9_PINREG	GPIOC_PDIR
-#define CORE_PIN10_PINREG	GPIOC_PDIR
-#define CORE_PIN11_PINREG	GPIOC_PDIR
-#define CORE_PIN12_PINREG	GPIOC_PDIR
-#define CORE_PIN13_PINREG	GPIOC_PDIR
-#define CORE_PIN14_PINREG	GPIOD_PDIR
-#define CORE_PIN15_PINREG	GPIOC_PDIR
-#define CORE_PIN16_PINREG	GPIOB_PDIR
-#define CORE_PIN17_PINREG	GPIOB_PDIR
-#define CORE_PIN18_PINREG	GPIOB_PDIR
-#define CORE_PIN19_PINREG	GPIOB_PDIR
-#define CORE_PIN20_PINREG	GPIOD_PDIR
-#define CORE_PIN21_PINREG	GPIOD_PDIR
-#define CORE_PIN22_PINREG	GPIOC_PDIR
-#define CORE_PIN23_PINREG	GPIOC_PDIR
-#define CORE_PIN24_PINREG	GPIOA_PDIR
-#define CORE_PIN25_PINREG	GPIOB_PDIR
-#define CORE_PIN26_PINREG	GPIOE_PDIR
-#define CORE_PIN27_PINREG	GPIOC_PDIR
-#define CORE_PIN28_PINREG	GPIOC_PDIR
-#define CORE_PIN29_PINREG	GPIOC_PDIR
-#define CORE_PIN30_PINREG	GPIOC_PDIR
-#define CORE_PIN31_PINREG	GPIOE_PDIR
-#define CORE_PIN32_PINREG	GPIOB_PDIR
-#define CORE_PIN33_PINREG	GPIOA_PDIR
-
-#define CORE_PIN0_CONFIG	PORTB_PCR16
-#define CORE_PIN1_CONFIG	PORTB_PCR17
-#define CORE_PIN2_CONFIG	PORTD_PCR0
-#define CORE_PIN3_CONFIG	PORTA_PCR12
-#define CORE_PIN4_CONFIG	PORTA_PCR13
-#define CORE_PIN5_CONFIG	PORTD_PCR7
-#define CORE_PIN6_CONFIG	PORTD_PCR4
-#define CORE_PIN7_CONFIG	PORTD_PCR2
-#define CORE_PIN8_CONFIG	PORTD_PCR3
-#define CORE_PIN9_CONFIG	PORTC_PCR3
-#define CORE_PIN10_CONFIG	PORTC_PCR4
-#define CORE_PIN11_CONFIG	PORTC_PCR6
-#define CORE_PIN12_CONFIG	PORTC_PCR7
-#define CORE_PIN13_CONFIG	PORTC_PCR5
-#define CORE_PIN14_CONFIG	PORTD_PCR1
-#define CORE_PIN15_CONFIG	PORTC_PCR0
-#define CORE_PIN16_CONFIG	PORTB_PCR0
-#define CORE_PIN17_CONFIG	PORTB_PCR1
-#define CORE_PIN18_CONFIG	PORTB_PCR3
-#define CORE_PIN19_CONFIG	PORTB_PCR2
-#define CORE_PIN20_CONFIG	PORTD_PCR5
-#define CORE_PIN21_CONFIG	PORTD_PCR6
-#define CORE_PIN22_CONFIG	PORTC_PCR1
-#define CORE_PIN23_CONFIG	PORTC_PCR2
-#define CORE_PIN24_CONFIG	PORTA_PCR5
-#define CORE_PIN25_CONFIG	PORTB_PCR19
-#define CORE_PIN26_CONFIG	PORTE_PCR1
-#define CORE_PIN27_CONFIG	PORTC_PCR9
-#define CORE_PIN28_CONFIG	PORTC_PCR8
-#define CORE_PIN29_CONFIG	PORTC_PCR10
-#define CORE_PIN30_CONFIG	PORTC_PCR11
-#define CORE_PIN31_CONFIG	PORTE_PCR0
-#define CORE_PIN32_CONFIG	PORTB_PCR18
-#define CORE_PIN33_CONFIG	PORTA_PCR4
-
-#define CORE_ADC0_PIN		14
-#define CORE_ADC1_PIN		15
-#define CORE_ADC2_PIN		16
-#define CORE_ADC3_PIN		17
-#define CORE_ADC4_PIN		18
-#define CORE_ADC5_PIN		19
-#define CORE_ADC6_PIN		20
-#define CORE_ADC7_PIN		21
-#define CORE_ADC8_PIN		22
-#define CORE_ADC9_PIN		23
-#define CORE_ADC10_PIN		34
-#define CORE_ADC11_PIN		35
-#define CORE_ADC12_PIN		36
-#define CORE_ADC13_PIN		37
-
-#define CORE_RXD0_PIN		0
-#define CORE_TXD0_PIN		1
-#define CORE_RXD1_PIN		9
-#define CORE_TXD1_PIN		10
-#define CORE_RXD2_PIN		7
-#define CORE_TXD2_PIN		8
-
-#define CORE_INT0_PIN		0
-#define CORE_INT1_PIN		1
-#define CORE_INT2_PIN		2
-#define CORE_INT3_PIN		3
-#define CORE_INT4_PIN		4
-#define CORE_INT5_PIN		5
-#define CORE_INT6_PIN		6
-#define CORE_INT7_PIN		7
-#define CORE_INT8_PIN		8
-#define CORE_INT9_PIN		9
-#define CORE_INT10_PIN		10
-#define CORE_INT11_PIN		11
-#define CORE_INT12_PIN		12
-#define CORE_INT13_PIN		13
-#define CORE_INT14_PIN		14
-#define CORE_INT15_PIN		15
-#define CORE_INT16_PIN		16
-#define CORE_INT17_PIN		17
-#define CORE_INT18_PIN		18
-#define CORE_INT19_PIN		19
-#define CORE_INT20_PIN		20
-#define CORE_INT21_PIN		21
-#define CORE_INT22_PIN		22
-#define CORE_INT23_PIN		23
-#define CORE_INT24_PIN		24
-#define CORE_INT25_PIN		25
-#define CORE_INT26_PIN		26
-#define CORE_INT27_PIN		27
-#define CORE_INT28_PIN		28
-#define CORE_INT29_PIN		29
-#define CORE_INT30_PIN		30
-#define CORE_INT31_PIN		31
-#define CORE_INT32_PIN		32
-#define CORE_INT33_PIN		33
-#define CORE_INT_EVERY_PIN	1
-
-
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void digitalWrite(uint8_t pin, uint8_t val);
-static inline void digitalWriteFast(uint8_t pin, uint8_t val) __attribute__((always_inline, unused));
-static inline void digitalWriteFast(uint8_t pin, uint8_t val)
-{
-	if (__builtin_constant_p(pin)) {
-		if (val) {
-			if (pin == 0) {
-				CORE_PIN0_PORTSET = CORE_PIN0_BITMASK;
-			} else if (pin == 1) {
-				CORE_PIN1_PORTSET = CORE_PIN1_BITMASK;
-			} else if (pin == 2) {
-				CORE_PIN2_PORTSET = CORE_PIN2_BITMASK;
-			} else if (pin == 3) {
-				CORE_PIN3_PORTSET = CORE_PIN3_BITMASK;
-			} else if (pin == 4) {
-				CORE_PIN4_PORTSET = CORE_PIN4_BITMASK;
-			} else if (pin == 5) {
-				CORE_PIN5_PORTSET = CORE_PIN5_BITMASK;
-			} else if (pin == 6) {
-				CORE_PIN6_PORTSET = CORE_PIN6_BITMASK;
-			} else if (pin == 7) {
-				CORE_PIN7_PORTSET = CORE_PIN7_BITMASK;
-			} else if (pin == 8) {
-				CORE_PIN8_PORTSET = CORE_PIN8_BITMASK;
-			} else if (pin == 9) {
-				CORE_PIN9_PORTSET = CORE_PIN9_BITMASK;
-			} else if (pin == 10) {
-				CORE_PIN10_PORTSET = CORE_PIN10_BITMASK;
-			} else if (pin == 11) {
-				CORE_PIN11_PORTSET = CORE_PIN11_BITMASK;
-			} else if (pin == 12) {
-				CORE_PIN12_PORTSET = CORE_PIN12_BITMASK;
-			} else if (pin == 13) {
-				CORE_PIN13_PORTSET = CORE_PIN13_BITMASK;
-			} else if (pin == 14) {
-				CORE_PIN14_PORTSET = CORE_PIN14_BITMASK;
-			} else if (pin == 15) {
-				CORE_PIN15_PORTSET = CORE_PIN15_BITMASK;
-			} else if (pin == 16) {
-				CORE_PIN16_PORTSET = CORE_PIN16_BITMASK;
-			} else if (pin == 17) {
-				CORE_PIN17_PORTSET = CORE_PIN17_BITMASK;
-			} else if (pin == 18) {
-				CORE_PIN18_PORTSET = CORE_PIN18_BITMASK;
-			} else if (pin == 19) {
-				CORE_PIN19_PORTSET = CORE_PIN19_BITMASK;
-			} else if (pin == 20) {
-				CORE_PIN20_PORTSET = CORE_PIN20_BITMASK;
-			} else if (pin == 21) {
-				CORE_PIN21_PORTSET = CORE_PIN21_BITMASK;
-			} else if (pin == 22) {
-				CORE_PIN22_PORTSET = CORE_PIN22_BITMASK;
-			} else if (pin == 23) {
-				CORE_PIN23_PORTSET = CORE_PIN23_BITMASK;
-			} else if (pin == 24) {
-				CORE_PIN24_PORTSET = CORE_PIN24_BITMASK;
-			} else if (pin == 25) {
-				CORE_PIN25_PORTSET = CORE_PIN25_BITMASK;
-			} else if (pin == 26) {
-				CORE_PIN26_PORTSET = CORE_PIN26_BITMASK;
-			} else if (pin == 27) {
-				CORE_PIN27_PORTSET = CORE_PIN27_BITMASK;
-			} else if (pin == 28) {
-				CORE_PIN28_PORTSET = CORE_PIN28_BITMASK;
-			} else if (pin == 29) {
-				CORE_PIN29_PORTSET = CORE_PIN29_BITMASK;
-			} else if (pin == 30) {
-				CORE_PIN30_PORTSET = CORE_PIN30_BITMASK;
-			} else if (pin == 31) {
-				CORE_PIN31_PORTSET = CORE_PIN31_BITMASK;
-			} else if (pin == 32) {
-				CORE_PIN32_PORTSET = CORE_PIN32_BITMASK;
-			} else if (pin == 33) {
-				CORE_PIN33_PORTSET = CORE_PIN33_BITMASK;
-			}
-		} else {
-			if (pin == 0) {
-				CORE_PIN0_PORTCLEAR = CORE_PIN0_BITMASK;
-			} else if (pin == 1) {
-				CORE_PIN1_PORTCLEAR = CORE_PIN1_BITMASK;
-			} else if (pin == 2) {
-				CORE_PIN2_PORTCLEAR = CORE_PIN2_BITMASK;
-			} else if (pin == 3) {
-				CORE_PIN3_PORTCLEAR = CORE_PIN3_BITMASK;
-			} else if (pin == 4) {
-				CORE_PIN4_PORTCLEAR = CORE_PIN4_BITMASK;
-			} else if (pin == 5) {
-				CORE_PIN5_PORTCLEAR = CORE_PIN5_BITMASK;
-			} else if (pin == 6) {
-				CORE_PIN6_PORTCLEAR = CORE_PIN6_BITMASK;
-			} else if (pin == 7) {
-				CORE_PIN7_PORTCLEAR = CORE_PIN7_BITMASK;
-			} else if (pin == 8) {
-				CORE_PIN8_PORTCLEAR = CORE_PIN8_BITMASK;
-			} else if (pin == 9) {
-				CORE_PIN9_PORTCLEAR = CORE_PIN9_BITMASK;
-			} else if (pin == 10) {
-				CORE_PIN10_PORTCLEAR = CORE_PIN10_BITMASK;
-			} else if (pin == 11) {
-				CORE_PIN11_PORTCLEAR = CORE_PIN11_BITMASK;
-			} else if (pin == 12) {
-				CORE_PIN12_PORTCLEAR = CORE_PIN12_BITMASK;
-			} else if (pin == 13) {
-				CORE_PIN13_PORTCLEAR = CORE_PIN13_BITMASK;
-			} else if (pin == 14) {
-				CORE_PIN14_PORTCLEAR = CORE_PIN14_BITMASK;
-			} else if (pin == 15) {
-				CORE_PIN15_PORTCLEAR = CORE_PIN15_BITMASK;
-			} else if (pin == 16) {
-				CORE_PIN16_PORTCLEAR = CORE_PIN16_BITMASK;
-			} else if (pin == 17) {
-				CORE_PIN17_PORTCLEAR = CORE_PIN17_BITMASK;
-			} else if (pin == 18) {
-				CORE_PIN18_PORTCLEAR = CORE_PIN18_BITMASK;
-			} else if (pin == 19) {
-				CORE_PIN19_PORTCLEAR = CORE_PIN19_BITMASK;
-			} else if (pin == 20) {
-				CORE_PIN20_PORTCLEAR = CORE_PIN20_BITMASK;
-			} else if (pin == 21) {
-				CORE_PIN21_PORTCLEAR = CORE_PIN21_BITMASK;
-			} else if (pin == 22) {
-				CORE_PIN22_PORTCLEAR = CORE_PIN22_BITMASK;
-			} else if (pin == 23) {
-				CORE_PIN23_PORTCLEAR = CORE_PIN23_BITMASK;
-			} else if (pin == 24) {
-				CORE_PIN24_PORTCLEAR = CORE_PIN24_BITMASK;
-			} else if (pin == 25) {
-				CORE_PIN25_PORTCLEAR = CORE_PIN25_BITMASK;
-			} else if (pin == 26) {
-				CORE_PIN26_PORTCLEAR = CORE_PIN26_BITMASK;
-			} else if (pin == 27) {
-				CORE_PIN27_PORTCLEAR = CORE_PIN27_BITMASK;
-			} else if (pin == 28) {
-				CORE_PIN28_PORTCLEAR = CORE_PIN28_BITMASK;
-			} else if (pin == 29) {
-				CORE_PIN29_PORTCLEAR = CORE_PIN29_BITMASK;
-			} else if (pin == 30) {
-				CORE_PIN30_PORTCLEAR = CORE_PIN30_BITMASK;
-			} else if (pin == 31) {
-				CORE_PIN31_PORTCLEAR = CORE_PIN31_BITMASK;
-			} else if (pin == 32) {
-				CORE_PIN32_PORTCLEAR = CORE_PIN32_BITMASK;
-			} else if (pin == 33) {
-				CORE_PIN33_PORTCLEAR = CORE_PIN33_BITMASK;
-			}
-		}
-	} else {
-		if (val) {
-			*portSetRegister(pin) = 1;
-		} else {
-			*portClearRegister(pin) = 1;
-		}
-	}
-}
-
-uint8_t digitalRead(uint8_t pin);
-static inline uint8_t digitalReadFast(uint8_t pin) __attribute__((always_inline, unused));
-static inline uint8_t digitalReadFast(uint8_t pin)
-{
-	if (__builtin_constant_p(pin)) {
-		if (pin == 0) {
-			return (CORE_PIN0_PINREG & CORE_PIN0_BITMASK) ? 1 : 0;
-		} else if (pin == 1) {
-			return (CORE_PIN1_PINREG & CORE_PIN1_BITMASK) ? 1 : 0;
-		} else if (pin == 2) {
-			return (CORE_PIN2_PINREG & CORE_PIN2_BITMASK) ? 1 : 0;
-		} else if (pin == 3) {
-			return (CORE_PIN3_PINREG & CORE_PIN3_BITMASK) ? 1 : 0;
-		} else if (pin == 4) {
-			return (CORE_PIN4_PINREG & CORE_PIN4_BITMASK) ? 1 : 0;
-		} else if (pin == 5) {
-			return (CORE_PIN5_PINREG & CORE_PIN5_BITMASK) ? 1 : 0;
-		} else if (pin == 6) {
-			return (CORE_PIN6_PINREG & CORE_PIN6_BITMASK) ? 1 : 0;
-		} else if (pin == 7) {
-			return (CORE_PIN7_PINREG & CORE_PIN7_BITMASK) ? 1 : 0;
-		} else if (pin == 8) {
-			return (CORE_PIN8_PINREG & CORE_PIN8_BITMASK) ? 1 : 0;
-		} else if (pin == 9) {
-			return (CORE_PIN9_PINREG & CORE_PIN9_BITMASK) ? 1 : 0;
-		} else if (pin == 10) {
-			return (CORE_PIN10_PINREG & CORE_PIN10_BITMASK) ? 1 : 0;
-		} else if (pin == 11) {
-			return (CORE_PIN11_PINREG & CORE_PIN11_BITMASK) ? 1 : 0;
-		} else if (pin == 12) {
-			return (CORE_PIN12_PINREG & CORE_PIN12_BITMASK) ? 1 : 0;
-		} else if (pin == 13) {
-			return (CORE_PIN13_PINREG & CORE_PIN13_BITMASK) ? 1 : 0;
-		} else if (pin == 14) {
-			return (CORE_PIN14_PINREG & CORE_PIN14_BITMASK) ? 1 : 0;
-		} else if (pin == 15) {
-			return (CORE_PIN15_PINREG & CORE_PIN15_BITMASK) ? 1 : 0;
-		} else if (pin == 16) {
-			return (CORE_PIN16_PINREG & CORE_PIN16_BITMASK) ? 1 : 0;
-		} else if (pin == 17) {
-			return (CORE_PIN17_PINREG & CORE_PIN17_BITMASK) ? 1 : 0;
-		} else if (pin == 18) {
-			return (CORE_PIN18_PINREG & CORE_PIN18_BITMASK) ? 1 : 0;
-		} else if (pin == 19) {
-			return (CORE_PIN19_PINREG & CORE_PIN19_BITMASK) ? 1 : 0;
-		} else if (pin == 20) {
-			return (CORE_PIN20_PINREG & CORE_PIN20_BITMASK) ? 1 : 0;
-		} else if (pin == 21) {
-			return (CORE_PIN21_PINREG & CORE_PIN21_BITMASK) ? 1 : 0;
-		} else if (pin == 22) {
-			return (CORE_PIN22_PINREG & CORE_PIN22_BITMASK) ? 1 : 0;
-		} else if (pin == 23) {
-			return (CORE_PIN23_PINREG & CORE_PIN23_BITMASK) ? 1 : 0;
-		} else if (pin == 24) {
-			return (CORE_PIN24_PINREG & CORE_PIN24_BITMASK) ? 1 : 0;
-		} else if (pin == 25) {
-			return (CORE_PIN25_PINREG & CORE_PIN25_BITMASK) ? 1 : 0;
-		} else if (pin == 26) {
-			return (CORE_PIN26_PINREG & CORE_PIN26_BITMASK) ? 1 : 0;
-		} else if (pin == 27) {
-			return (CORE_PIN27_PINREG & CORE_PIN27_BITMASK) ? 1 : 0;
-		} else if (pin == 28) {
-			return (CORE_PIN28_PINREG & CORE_PIN28_BITMASK) ? 1 : 0;
-		} else if (pin == 29) {
-			return (CORE_PIN29_PINREG & CORE_PIN29_BITMASK) ? 1 : 0;
-		} else if (pin == 30) {
-			return (CORE_PIN30_PINREG & CORE_PIN30_BITMASK) ? 1 : 0;
-		} else if (pin == 31) {
-			return (CORE_PIN31_PINREG & CORE_PIN31_BITMASK) ? 1 : 0;
-		} else if (pin == 32) {
-			return (CORE_PIN32_PINREG & CORE_PIN32_BITMASK) ? 1 : 0;
-		} else if (pin == 33) {
-			return (CORE_PIN33_PINREG & CORE_PIN33_BITMASK) ? 1 : 0;
-		} else {
-			return 0;
-		}
-	} else {
-		return *portInputRegister(pin);
-	}
-}
-
-
-void pinMode(uint8_t pin, uint8_t mode);
-void init_pins(void);
-void analogWrite(uint8_t pin, int val);
-void analogWriteRes(uint32_t bits);
-static inline void analogWriteResolution(uint32_t bits) { analogWriteRes(bits); }
-void analogWriteFrequency(uint8_t pin, uint32_t frequency);
-void analogWriteDAC0(int val);
-void attachInterrupt(uint8_t pin, void (*function)(void), int mode);
-void detachInterrupt(uint8_t pin);
-void _init_Teensyduino_internal_(void);
-
-int analogRead(uint8_t pin);
-void analogReference(uint8_t type);
-void analogReadRes(unsigned int bits);
-static inline void analogReadResolution(unsigned int bits) { analogReadRes(bits); }
-void analogReadAveraging(unsigned int num);
-void analog_init(void);
-
-#define DEFAULT         0
-#define INTERNAL        2
-#define INTERNAL1V2     2
-#define INTERNAL1V1     2
-#define EXTERNAL        0
-
-int touchRead(uint8_t pin);
-
-
-static inline void shiftOut(uint8_t, uint8_t, uint8_t, uint8_t) __attribute__((always_inline, unused));
-extern void _shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value) __attribute__((noinline));
-extern void shiftOut_lsbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) __attribute__((noinline));
-extern void shiftOut_msbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) __attribute__((noinline));
-
-static inline void shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value)
-{
-        if (__builtin_constant_p(bitOrder)) {
-                if (bitOrder == LSBFIRST) {
-                        shiftOut_lsbFirst(dataPin, clockPin, value);
-                } else {
-                        shiftOut_msbFirst(dataPin, clockPin, value);
-                }
-        } else {
-                _shiftOut(dataPin, clockPin, bitOrder, value);
-        }
-}
-
-static inline uint8_t shiftIn(uint8_t, uint8_t, uint8_t) __attribute__((always_inline, unused));
-extern uint8_t _shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder) __attribute__((noinline));
-extern uint8_t shiftIn_lsbFirst(uint8_t dataPin, uint8_t clockPin) __attribute__((noinline));
-extern uint8_t shiftIn_msbFirst(uint8_t dataPin, uint8_t clockPin) __attribute__((noinline));
-
-static inline uint8_t shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder)
-{
-        if (__builtin_constant_p(bitOrder)) {
-                if (bitOrder == LSBFIRST) {
-                        return shiftIn_lsbFirst(dataPin, clockPin);
-                } else {
-                        return shiftIn_msbFirst(dataPin, clockPin);
-                }
-        } else {
-                return _shiftIn(dataPin, clockPin, bitOrder);
-        }
-}
-
-void _reboot_Teensyduino_(void) __attribute__((noreturn));
-void _restart_Teensyduino_(void) __attribute__((noreturn));
-
-void yield(void);
-
-void delay(uint32_t msec);
-
-extern volatile uint32_t systick_millis_count;
-
-static inline uint32_t millis(void) __attribute__((always_inline, unused));
-static inline uint32_t millis(void)
-{
-	volatile uint32_t ret = systick_millis_count; // single aligned 32 bit is atomic;
-	return ret;
-}
-
-uint32_t micros(void);
-
-static inline void delayMicroseconds(uint32_t) __attribute__((always_inline, unused));
-static inline void delayMicroseconds(uint32_t usec)
-{
-#if F_CPU == 168000000
-	uint32_t n = usec * 56;
-#elif F_CPU == 144000000
-	uint32_t n = usec * 48;
-#elif F_CPU == 120000000
-	uint32_t n = usec * 40;
-#elif F_CPU == 96000000
-	uint32_t n = usec << 5;
-#elif F_CPU == 72000000
-	uint32_t n = usec * 24;
-#elif F_CPU == 48000000
-	uint32_t n = usec << 4;
-#elif F_CPU == 24000000
-	uint32_t n = usec << 3;
-#elif F_CPU == 16000000
-	uint32_t n = usec << 2;
-#elif F_CPU == 8000000
-	uint32_t n = usec << 1;
-#elif F_CPU == 4000000
-	uint32_t n = usec;
-#elif F_CPU == 2000000
-	uint32_t n = usec >> 1;
-#endif
-    // changed because a delay of 1 micro Sec @ 2MHz will be 0
-	if (n == 0) return;
-	__asm__ volatile(
-		"L_%=_delayMicroseconds:"		"\n\t"
-#if F_CPU < 24000000
-		"nop"					"\n\t"
-#endif
-		"subs   %0, #1"				"\n\t"
-		"bne    L_%=_delayMicroseconds"		"\n"
-		: "+r" (n) :
-	);
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-
-
-
-
-
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-unsigned long rtc_get(void);
-void rtc_set(unsigned long t);
-void rtc_compensate(int adjust);
-#ifdef __cplusplus
-}
-class teensy3_clock_class
-{
-public:
-	static unsigned long get(void) __attribute__((always_inline)) { return rtc_get(); }
-	static void set(unsigned long t) __attribute__((always_inline)) { rtc_set(t); }
-	static void compensate(int adj) __attribute__((always_inline)) { rtc_compensate(adj); }
-};
-extern teensy3_clock_class Teensy3Clock;
-#endif
-
-
-
-
-#endif
diff --git a/ports/teensy/core/mk20dx128.c b/ports/teensy/core/mk20dx128.c
deleted file mode 100644
index f79bf436f4..0000000000
--- a/ports/teensy/core/mk20dx128.c
+++ /dev/null
@@ -1,662 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be 
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows 
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include "mk20dx128.h"
-
-
-extern unsigned long _stext;
-extern unsigned long _etext;
-extern unsigned long _sdata;
-extern unsigned long _edata;
-extern unsigned long _sbss;
-extern unsigned long _ebss;
-extern unsigned long _estack;
-//extern void __init_array_start(void);
-//extern void __init_array_end(void);
-
-
-
-extern int main (void);
-void ResetHandler(void);
-void _init_Teensyduino_internal_(void);
-void __libc_init_array(void);
-
-
-void fault_isr(void)
-{
-	while (1) {
-		// keep polling some communication while in fault
-		// mode, so we don't completely die.
-		if (SIM_SCGC4 & SIM_SCGC4_USBOTG) usb_isr();
-		if (SIM_SCGC4 & SIM_SCGC4_UART0) uart0_status_isr();
-		if (SIM_SCGC4 & SIM_SCGC4_UART1) uart1_status_isr();
-		if (SIM_SCGC4 & SIM_SCGC4_UART2) uart2_status_isr();
-	}
-}
-
-void unused_isr(void)
-{
-	fault_isr();
-}
-
-extern volatile uint32_t systick_millis_count;
-void systick_default_isr(void)
-{
-	systick_millis_count++;
-}
-
-void nmi_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void hard_fault_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void memmanage_fault_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void bus_fault_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void usage_fault_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void svcall_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void debugmonitor_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void pendablesrvreq_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void systick_isr(void)		__attribute__ ((weak, alias("systick_default_isr")));
-
-void dma_ch0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch1_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch2_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch3_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch4_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch5_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch6_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch7_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch8_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch9_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch10_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch11_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch12_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch13_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch14_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_ch15_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dma_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void mcm_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void flash_cmd_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void flash_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void low_voltage_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void wakeup_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void watchdog_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void i2c0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void i2c1_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void i2c2_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void spi0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void spi1_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void spi2_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void sdhc_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void can0_message_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void can0_bus_off_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void can0_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void can0_tx_warn_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void can0_rx_warn_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void can0_wakeup_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void i2s0_tx_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void i2s0_rx_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void uart0_lon_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart0_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart0_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart1_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart1_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart2_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart2_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart3_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart3_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart4_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart4_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart5_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void uart5_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void adc0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void adc1_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void cmp0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void cmp1_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void cmp2_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void ftm0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void ftm1_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void ftm2_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void ftm3_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void cmt_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void rtc_alarm_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void rtc_seconds_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void pit0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void pit1_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void pit2_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void pit3_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void pdb_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void usb_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void usb_charge_isr(void)	__attribute__ ((weak, alias("unused_isr")));
-void dac0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void dac1_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void tsi0_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void mcg_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void lptmr_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void porta_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void portb_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void portc_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void portd_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void porte_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-void software_isr(void)		__attribute__ ((weak, alias("unused_isr")));
-
-
-// TODO: create AVR-stype ISR() macro, with default linkage to undefined handler
-//
-__attribute__ ((section(".vectors"), used))
-void (* const gVectors[])(void) =
-{
-	(void (*)(void))((unsigned long)&_estack),	//  0 ARM: Initial Stack Pointer
-	ResetHandler,					//  1 ARM: Initial Program Counter
-	nmi_isr,					//  2 ARM: Non-maskable Interrupt (NMI)
-	hard_fault_isr,					//  3 ARM: Hard Fault
-	memmanage_fault_isr,				//  4 ARM: MemManage Fault
-	bus_fault_isr,					//  5 ARM: Bus Fault
-	usage_fault_isr,				//  6 ARM: Usage Fault
-	fault_isr,					//  7 --
-	fault_isr,					//  8 --
-	fault_isr,					//  9 --
-	fault_isr,					// 10 --
-	svcall_isr,					// 11 ARM: Supervisor call (SVCall)
-	debugmonitor_isr,				// 12 ARM: Debug Monitor
-	fault_isr,					// 13 --
-	pendablesrvreq_isr,				// 14 ARM: Pendable req serv(PendableSrvReq)
-	systick_isr,					// 15 ARM: System tick timer (SysTick)
-#if defined(__MK20DX128__)
-	dma_ch0_isr,					// 16 DMA channel 0 transfer complete
-	dma_ch1_isr,					// 17 DMA channel 1 transfer complete
-	dma_ch2_isr,					// 18 DMA channel 2 transfer complete
-	dma_ch3_isr,					// 19 DMA channel 3 transfer complete
-	dma_error_isr,					// 20 DMA error interrupt channel
-	unused_isr,					// 21 DMA --
-	flash_cmd_isr,					// 22 Flash Memory Command complete
-	flash_error_isr,				// 23 Flash Read collision
-	low_voltage_isr,				// 24 Low-voltage detect/warning
-	wakeup_isr,					// 25 Low Leakage Wakeup
-	watchdog_isr,					// 26 Both EWM and WDOG interrupt
-	i2c0_isr,					// 27 I2C0
-	spi0_isr,					// 28 SPI0
-	i2s0_tx_isr,					// 29 I2S0 Transmit
-	i2s0_rx_isr,					// 30 I2S0 Receive
-	uart0_lon_isr,					// 31 UART0 CEA709.1-B (LON) status
-	uart0_status_isr,				// 32 UART0 status
-	uart0_error_isr,				// 33 UART0 error
-	uart1_status_isr,				// 34 UART1 status
-	uart1_error_isr,				// 35 UART1 error
-	uart2_status_isr,				// 36 UART2 status
-	uart2_error_isr,				// 37 UART2 error
-	adc0_isr,					// 38 ADC0
-	cmp0_isr,					// 39 CMP0
-	cmp1_isr,					// 40 CMP1
-	ftm0_isr,					// 41 FTM0
-	ftm1_isr,					// 42 FTM1
-	cmt_isr,					// 43 CMT
-	rtc_alarm_isr,					// 44 RTC Alarm interrupt
-	rtc_seconds_isr,				// 45 RTC Seconds interrupt
-	pit0_isr,					// 46 PIT Channel 0
-	pit1_isr,					// 47 PIT Channel 1
-	pit2_isr,					// 48 PIT Channel 2
-	pit3_isr,					// 49 PIT Channel 3
-	pdb_isr,					// 50 PDB Programmable Delay Block
-	usb_isr,					// 51 USB OTG
-	usb_charge_isr,					// 52 USB Charger Detect
-	tsi0_isr,					// 53 TSI0
-	mcg_isr,					// 54 MCG
-	lptmr_isr,					// 55 Low Power Timer
-	porta_isr,					// 56 Pin detect (Port A)
-	portb_isr,					// 57 Pin detect (Port B)
-	portc_isr,					// 58 Pin detect (Port C)
-	portd_isr,					// 59 Pin detect (Port D)
-	porte_isr,					// 60 Pin detect (Port E)
-	software_isr,					// 61 Software interrupt
-#elif defined(__MK20DX256__)
-	dma_ch0_isr,					// 16 DMA channel 0 transfer complete
-	dma_ch1_isr,					// 17 DMA channel 1 transfer complete
-	dma_ch2_isr,					// 18 DMA channel 2 transfer complete
-	dma_ch3_isr,					// 19 DMA channel 3 transfer complete
-	dma_ch4_isr,					// 20 DMA channel 4 transfer complete
-	dma_ch5_isr,					// 21 DMA channel 5 transfer complete
-	dma_ch6_isr,					// 22 DMA channel 6 transfer complete
-	dma_ch7_isr,					// 23 DMA channel 7 transfer complete
-	dma_ch8_isr,					// 24 DMA channel 8 transfer complete
-	dma_ch9_isr,					// 25 DMA channel 9 transfer complete
-	dma_ch10_isr,					// 26 DMA channel 10 transfer complete
-	dma_ch11_isr,					// 27 DMA channel 10 transfer complete
-	dma_ch12_isr,					// 28 DMA channel 10 transfer complete
-	dma_ch13_isr,					// 29 DMA channel 10 transfer complete
-	dma_ch14_isr,					// 30 DMA channel 10 transfer complete
-	dma_ch15_isr,					// 31 DMA channel 10 transfer complete
-	dma_error_isr,					// 32 DMA error interrupt channel
-	unused_isr,					// 33 --
-	flash_cmd_isr,					// 34 Flash Memory Command complete
-	flash_error_isr,				// 35 Flash Read collision
-	low_voltage_isr,				// 36 Low-voltage detect/warning
-	wakeup_isr,					// 37 Low Leakage Wakeup
-	watchdog_isr,					// 38 Both EWM and WDOG interrupt
-	unused_isr,					// 39 --
-	i2c0_isr,					// 40 I2C0
-	i2c1_isr,					// 41 I2C1
-	spi0_isr,					// 42 SPI0
-	spi1_isr,					// 43 SPI1
-	unused_isr,					// 44 --
-	can0_message_isr,				// 45 CAN OR'ed Message buffer (0-15)
-	can0_bus_off_isr,				// 46 CAN Bus Off
-	can0_error_isr,					// 47 CAN Error
-	can0_tx_warn_isr,				// 48 CAN Transmit Warning
-	can0_rx_warn_isr,				// 49 CAN Receive Warning
-	can0_wakeup_isr,				// 50 CAN Wake Up
-	i2s0_tx_isr,					// 51 I2S0 Transmit
-	i2s0_rx_isr,					// 52 I2S0 Receive
-	unused_isr,					// 53 --
-	unused_isr,					// 54 --
-	unused_isr,					// 55 --
-	unused_isr,					// 56 --
-	unused_isr,					// 57 --
-	unused_isr,					// 58 --
-	unused_isr,					// 59 --
-	uart0_lon_isr,					// 60 UART0 CEA709.1-B (LON) status
-	uart0_status_isr,				// 61 UART0 status
-	uart0_error_isr,				// 62 UART0 error
-	uart1_status_isr,				// 63 UART1 status
-	uart1_error_isr,				// 64 UART1 error
-	uart2_status_isr,				// 65 UART2 status
-	uart2_error_isr,				// 66 UART2 error
-	unused_isr,					// 67 --
-	unused_isr,					// 68 --
-	unused_isr,					// 69 --
-	unused_isr,					// 70 --
-	unused_isr,					// 71 --
-	unused_isr,					// 72 --
-	adc0_isr,					// 73 ADC0
-	adc1_isr,					// 74 ADC1
-	cmp0_isr,					// 75 CMP0
-	cmp1_isr,					// 76 CMP1
-	cmp2_isr,					// 77 CMP2
-	ftm0_isr,					// 78 FTM0
-	ftm1_isr,					// 79 FTM1
-	ftm2_isr,					// 80 FTM2
-	cmt_isr,					// 81 CMT
-	rtc_alarm_isr,					// 82 RTC Alarm interrupt
-	rtc_seconds_isr,				// 83 RTC Seconds interrupt
-	pit0_isr,					// 84 PIT Channel 0
-	pit1_isr,					// 85 PIT Channel 1
-	pit2_isr,					// 86 PIT Channel 2
-	pit3_isr,					// 87 PIT Channel 3
-	pdb_isr,					// 88 PDB Programmable Delay Block
-	usb_isr,					// 89 USB OTG
-	usb_charge_isr,					// 90 USB Charger Detect
-	unused_isr,					// 91 --
-	unused_isr,					// 92 --
-	unused_isr,					// 93 --
-	unused_isr,					// 94 --
-	unused_isr,					// 95 --
-	unused_isr,					// 96 --
-	dac0_isr,					// 97 DAC0
-	unused_isr,					// 98 --
-	tsi0_isr,					// 99 TSI0
-	mcg_isr,					// 100 MCG
-	lptmr_isr,					// 101 Low Power Timer
-	unused_isr,					// 102 --
-	porta_isr,					// 103 Pin detect (Port A)
-	portb_isr,					// 104 Pin detect (Port B)
-	portc_isr,					// 105 Pin detect (Port C)
-	portd_isr,					// 106 Pin detect (Port D)
-	porte_isr,					// 107 Pin detect (Port E)
-	unused_isr,					// 108 --
-	unused_isr,					// 109 --
-	software_isr,					// 110 Software interrupt
-#endif
-};
-
-//void usb_isr(void)
-//{
-//}
-
-__attribute__ ((section(".flashconfig"), used))
-const uint8_t flashconfigbytes[16] = {
-	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-	0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF
-};
-
-
-// Automatically initialize the RTC.  When the build defines the compile
-// time, and the user has added a crystal, the RTC will automatically
-// begin at the time of the first upload.
-#ifndef TIME_T
-#define TIME_T 1349049600 // default 1 Oct 2012 (never used, Arduino sets this)
-#endif
-extern void rtc_set(unsigned long t);
-
-
-static void startup_default_early_hook(void) { WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE; }
-static void startup_default_late_hook(void) {}
-void startup_early_hook(void)		__attribute__ ((weak, alias("startup_default_early_hook")));
-void startup_late_hook(void)		__attribute__ ((weak, alias("startup_default_late_hook")));
-
-__attribute__ ((section(".startup")))
-void ResetHandler(void)
-{
-	uint32_t *src = &_etext;
-	uint32_t *dest = &_sdata;
-	unsigned int i;
-#if F_CPU <= 2000000
-	volatile int n;
-#endif
-
-	WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;
-	WDOG_UNLOCK = WDOG_UNLOCK_SEQ2;
-	__asm__ volatile ("nop");
-	__asm__ volatile ("nop");
-	// programs using the watchdog timer or needing to initialize hardware as
-	// early as possible can implement startup_early_hook()
-	startup_early_hook();
-
-	// enable clocks to always-used peripherals
-#if defined(__MK20DX128__)
-	SIM_SCGC5 = 0x00043F82;		// clocks active to all GPIO
-	SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
-#elif defined(__MK20DX256__)
-	SIM_SCGC3 = SIM_SCGC3_ADC1 | SIM_SCGC3_FTM2;
-	SIM_SCGC5 = 0x00043F82;		// clocks active to all GPIO
-	SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
-#endif
-	// if the RTC oscillator isn't enabled, get it started early
-	if (!(RTC_CR & RTC_CR_OSCE)) {
-		RTC_SR = 0;
-		RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
-	}
-
-	// release I/O pins hold, if we woke up from VLLS mode
-	if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO;
-
-    // since this is a write once register, make it visible to all F_CPU's
-    // so we can into other sleep modes in the future at any speed
-	SMC_PMPROT = SMC_PMPROT_AVLP | SMC_PMPROT_ALLS | SMC_PMPROT_AVLLS;
-    
-	// TODO: do this while the PLL is waiting to lock....
-	while (dest < &_edata) *dest++ = *src++;
-	dest = &_sbss;
-	while (dest < &_ebss) *dest++ = 0;
-	SCB_VTOR = 0;	// use vector table in flash
-
-	// default all interrupts to medium priority level
-	for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128);
-
-	// hardware always starts in FEI mode
-	//  C1[CLKS] bits are written to 00
-	//  C1[IREFS] bit is written to 1
-	//  C6[PLLS] bit is written to 0
-// MCG_SC[FCDIV] defaults to divide by two for internal ref clock
-// I tried changing MSG_SC to divide by 1, it didn't work for me
-#if F_CPU <= 2000000
-	// use the internal oscillator
-	MCG_C1 = MCG_C1_CLKS(1) | MCG_C1_IREFS;
-	// wait for MCGOUT to use oscillator
-	while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(1)) ;
-	for (n=0; n<10; n++) ; // TODO: why do we get 2 mA extra without this delay?
-	MCG_C2 = MCG_C2_IRCS;
-	while (!(MCG_S & MCG_S_IRCST)) ;
-	// now in FBI mode:
-	//  C1[CLKS] bits are written to 01
-	//  C1[IREFS] bit is written to 1
-	//  C6[PLLS] is written to 0
-	//  C2[LP] is written to 0
-	MCG_C2 = MCG_C2_IRCS | MCG_C2_LP;
-	// now in BLPI mode:
-	//  C1[CLKS] bits are written to 01
-	//  C1[IREFS] bit is written to 1
-	//  C6[PLLS] bit is written to 0
-	//  C2[LP] bit is written to 1
-#else
-	// enable capacitors for crystal
-	OSC0_CR = OSC_SC8P | OSC_SC2P;
-	// enable osc, 8-32 MHz range, low power mode
-	MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS;
-	// switch to crystal as clock source, FLL input = 16 MHz / 512
-	MCG_C1 =  MCG_C1_CLKS(2) | MCG_C1_FRDIV(4);
-	// wait for crystal oscillator to begin
-	while ((MCG_S & MCG_S_OSCINIT0) == 0) ;
-	// wait for FLL to use oscillator
-	while ((MCG_S & MCG_S_IREFST) != 0) ;
-	// wait for MCGOUT to use oscillator
-	while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ;
-	// now in FBE mode
-	//  C1[CLKS] bits are written to 10
-	//  C1[IREFS] bit is written to 0
-	//  C1[FRDIV] must be written to divide xtal to 31.25-39 kHz
-	//  C6[PLLS] bit is written to 0
-	//  C2[LP] is written to 0
-  #if F_CPU <= 16000000
-	// if the crystal is fast enough, use it directly (no FLL or PLL)
-	MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS | MCG_C2_LP;
-	// BLPE mode:
-	//   C1[CLKS] bits are written to 10
-	//   C1[IREFS] bit is written to 0
-	//   C2[LP] bit is written to 1
-  #else
-	// if we need faster than the crystal, turn on the PLL
-    #if F_CPU == 72000000
-	MCG_C5 = MCG_C5_PRDIV0(5);		 // config PLL input for 16 MHz Crystal / 6 = 2.667 Hz
-    #else
-	MCG_C5 = MCG_C5_PRDIV0(3);		 // config PLL input for 16 MHz Crystal / 4 = 4 MHz
-    #endif
-    #if F_CPU == 168000000
-	MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(18); // config PLL for 168 MHz output
-    #elif F_CPU == 144000000
-	MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(12); // config PLL for 144 MHz output
-    #elif F_CPU == 120000000
-	MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(6); // config PLL for 120 MHz output
-    #elif F_CPU == 72000000
-	MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(3); // config PLL for 72 MHz output
-    #else
-	MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0); // config PLL for 96 MHz output
-    #endif
-	// wait for PLL to start using xtal as its input
-	while (!(MCG_S & MCG_S_PLLST)) ;
-	// wait for PLL to lock
-	while (!(MCG_S & MCG_S_LOCK0)) ;
-	// now we're in PBE mode
-  #endif
-#endif
-
-	// now program the clock dividers
-#if F_CPU == 168000000
-	// config divisors: 168 MHz core, 56 MHz bus, 33.6 MHz flash, USB = 168 * 2 / 7
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) |	 SIM_CLKDIV1_OUTDIV4(4);
-	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(6) | SIM_CLKDIV2_USBFRAC;
-#elif F_CPU == 144000000
-	// config divisors: 144 MHz core, 48 MHz bus, 28.8 MHz flash, USB = 144 / 3
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) |	 SIM_CLKDIV1_OUTDIV4(4);
-	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(2);
-#elif F_CPU == 120000000
-	// config divisors: 120 MHz core, 60 MHz bus, 24 MHz flash, USB = 128 * 2 / 5
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |	 SIM_CLKDIV1_OUTDIV4(4);
-	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(4) | SIM_CLKDIV2_USBFRAC;
-#elif F_CPU == 96000000
-	// config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |	 SIM_CLKDIV1_OUTDIV4(3);
-	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1);
-#elif F_CPU == 72000000
-	// config divisors: 72 MHz core, 36 MHz bus, 24 MHz flash, USB = 72 * 2 / 3
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |	 SIM_CLKDIV1_OUTDIV4(2);
-	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(2) | SIM_CLKDIV2_USBFRAC;
-#elif F_CPU == 48000000
-	// config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) |	 SIM_CLKDIV1_OUTDIV4(3);
-	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1);
-#elif F_CPU == 24000000
-	// config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash, USB = 96 / 2
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) |	 SIM_CLKDIV1_OUTDIV4(3);
-	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1);
-#elif F_CPU == 16000000
-	// config divisors: 16 MHz core, 16 MHz bus, 16 MHz flash
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) |	 SIM_CLKDIV1_OUTDIV4(0);
-#elif F_CPU == 8000000
-	// config divisors: 8 MHz core, 8 MHz bus, 8 MHz flash
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) |	 SIM_CLKDIV1_OUTDIV4(1);
-#elif F_CPU == 4000000
-    // config divisors: 4 MHz core, 4 MHz bus, 2 MHz flash
-    // since we are running from external clock 16MHz
-    // fix outdiv too -> cpu 16/4, bus 16/4, flash 16/4
-    // here we can go into vlpr?
-	// config divisors: 4 MHz core, 4 MHz bus, 4 MHz flash
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) |	 SIM_CLKDIV1_OUTDIV4(3);
-#elif F_CPU == 2000000
-    // since we are running from the fast internal reference clock 4MHz
-    // but is divided down by 2 so we actually have a 2MHz, MCG_SC[FCDIV] default is 2
-    // fix outdiv -> cpu 2/1, bus 2/1, flash 2/2
-	// config divisors: 2 MHz core, 2 MHz bus, 1 MHz flash
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) |	 SIM_CLKDIV1_OUTDIV4(1);
-#else
-#error "Error, F_CPU must be 168, 144, 120, 96, 72, 48, 24, 16, 8, 4, or 2 MHz"
-#endif
-
-#if F_CPU > 16000000
-	// switch to PLL as clock source, FLL input = 16 MHz / 512
-	MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4);
-	// wait for PLL clock to be used
-	while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ;
-	// now we're in PEE mode
-	// USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0
-	SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6);
-#else
-	SIM_SOPT2 = SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(3);
-#endif
-
-#if F_CPU <= 2000000
-    // since we are not going into "stop mode" i removed it
-	SMC_PMCTRL = SMC_PMCTRL_RUNM(2); // VLPR mode :-)
-#endif
-
-	// initialize the SysTick counter
-	SYST_RVR = (F_CPU / 1000) - 1;
-	SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE;
-
-	//init_pins();
-	__enable_irq();
-
-	_init_Teensyduino_internal_();
-	if (RTC_SR & RTC_SR_TIF) {
-		// TODO: this should probably set the time more aggressively, if
-		// we could reliably detect the first reboot after programming.
-		rtc_set(TIME_T);
-	}
-
-	__libc_init_array();
-
-	startup_late_hook();
-	main();
-	while (1) ;
-}
-
-char *__brkval = (char *)&_ebss;
-
-void * _sbrk(int incr)
-{
-	char *prev = __brkval;
-	__brkval += incr;
-	return prev;
-}
-
-__attribute__((weak)) 
-int _read(int file, char *ptr, int len)
-{
-	return 0;
-}
-
-__attribute__((weak)) 
-int _close(int fd)
-{
-	return -1;
-}
-
-#include <sys/stat.h>
-
-__attribute__((weak)) 
-int _fstat(int fd, struct stat *st)
-{
-	st->st_mode = S_IFCHR;
-	return 0;
-}
-
-__attribute__((weak)) 
-int _isatty(int fd)
-{
-	return 1;
-}
-
-__attribute__((weak)) 
-int _lseek(int fd, long long offset, int whence)
-{
-	return -1;
-}
-
-__attribute__((weak)) 
-void _exit(int status)
-{
-	while (1);
-}
-
-__attribute__((weak)) 
-void __cxa_pure_virtual()
-{
-	while (1);
-}
-
-__attribute__((weak)) 
-int __cxa_guard_acquire (char *g) 
-{
-	return !(*g);
-}
-
-__attribute__((weak)) 
-void __cxa_guard_release(char *g)
-{
-	*g = 1;
-}
-
-int nvic_execution_priority(void)
-{
-	int priority=256;
-	uint32_t primask, faultmask, basepri, ipsr;
-
-	// full algorithm in ARM DDI0403D, page B1-639
-	// this isn't quite complete, but hopefully good enough
-	__asm__ volatile("mrs %0, faultmask\n" : "=r" (faultmask)::);
-	if (faultmask) return -1;
-	__asm__ volatile("mrs %0, primask\n" : "=r" (primask)::);
-	if (primask) return 0;
-	__asm__ volatile("mrs %0, ipsr\n" : "=r" (ipsr)::);
-	if (ipsr) {
-		if (ipsr < 16) priority = 0; // could be non-zero
-		else priority = NVIC_GET_PRIORITY(ipsr - 16);
-	}
-	__asm__ volatile("mrs %0, basepri\n" : "=r" (basepri)::);
-	if (basepri > 0 && basepri < priority) priority = basepri;
-	return priority;
-}
-
diff --git a/ports/teensy/core/mk20dx128.h b/ports/teensy/core/mk20dx128.h
deleted file mode 100644
index c6eda2837f..0000000000
--- a/ports/teensy/core/mk20dx128.h
+++ /dev/null
@@ -1,2385 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _mk20dx128_h_
-#define _mk20dx128_h_
-
-//#ifdef F_CPU
-//#undef F_CPU
-//#endif
-//#define F_CPU 168000000
-//#define F_CPU 144000000
-//#define F_CPU 120000000
-//#define F_CPU 96000000
-//#define F_CPU 72000000
-//#define F_CPU 48000000
-//#define F_CPU 24000000
-
-#if (F_CPU == 168000000)
- #define F_BUS 56000000
- #define F_MEM 33600000
-#elif (F_CPU == 144000000)
- #define F_BUS 48000000
- #define F_MEM 28800000
-#elif (F_CPU == 120000000)
- #define F_BUS 60000000
- #define F_MEM 24000000
-#elif (F_CPU == 96000000)
- #define F_BUS 48000000
- #define F_MEM 24000000
-#elif (F_CPU == 72000000)
- #define F_BUS 36000000
- #define F_MEM 24000000
-#elif (F_CPU == 48000000)
- #define F_BUS 48000000
- #define F_MEM 24000000
-#elif (F_CPU == 24000000)
- #define F_BUS 24000000
- #define F_MEM 24000000
-#elif (F_CPU == 16000000)
- #define F_BUS 16000000
- #define F_MEM 16000000
-#elif (F_CPU == 8000000)
- #define F_BUS 8000000
- #define F_MEM 8000000
-#elif (F_CPU == 4000000)
- #define F_BUS 4000000
- #define F_MEM 4000000
-#elif (F_CPU == 2000000)
- #define F_BUS 2000000
- #define F_MEM 1000000
-#endif
-
-
-#ifndef NULL
-#define NULL ((void *)0)
-#endif
-
-#include <stdint.h>
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// chapter 11: Port control and interrupts (PORT)
-#define PORTA_PCR0		*(volatile uint32_t *)0x40049000 // Pin Control Register n
-#define PORT_PCR_ISF			(uint32_t)0x01000000		// Interrupt Status Flag
-#define PORT_PCR_IRQC(n)		(uint32_t)(((n) & 15) << 16)	// Interrupt Configuration
-#define PORT_PCR_IRQC_MASK		(uint32_t)0x000F0000
-#define PORT_PCR_LK			(uint32_t)0x00008000		// Lock Register
-#define PORT_PCR_MUX(n)			(uint32_t)(((n) & 7) << 8)	// Pin Mux Control
-#define PORT_PCR_MUX_MASK		(uint32_t)0x00000700
-#define PORT_PCR_DSE			(uint32_t)0x00000040		// Drive Strength Enable
-#define PORT_PCR_ODE			(uint32_t)0x00000020		// Open Drain Enable
-#define PORT_PCR_PFE			(uint32_t)0x00000010		// Passive Filter Enable
-#define PORT_PCR_SRE			(uint32_t)0x00000004		// Slew Rate Enable
-#define PORT_PCR_PE			(uint32_t)0x00000002		// Pull Enable
-#define PORT_PCR_PS			(uint32_t)0x00000001		// Pull Select
-#define PORTA_PCR1		*(volatile uint32_t *)0x40049004 // Pin Control Register n
-#define PORTA_PCR2		*(volatile uint32_t *)0x40049008 // Pin Control Register n
-#define PORTA_PCR3		*(volatile uint32_t *)0x4004900C // Pin Control Register n
-#define PORTA_PCR4		*(volatile uint32_t *)0x40049010 // Pin Control Register n
-#define PORTA_PCR5		*(volatile uint32_t *)0x40049014 // Pin Control Register n
-#define PORTA_PCR6		*(volatile uint32_t *)0x40049018 // Pin Control Register n
-#define PORTA_PCR7		*(volatile uint32_t *)0x4004901C // Pin Control Register n
-#define PORTA_PCR8		*(volatile uint32_t *)0x40049020 // Pin Control Register n
-#define PORTA_PCR9		*(volatile uint32_t *)0x40049024 // Pin Control Register n
-#define PORTA_PCR10		*(volatile uint32_t *)0x40049028 // Pin Control Register n
-#define PORTA_PCR11		*(volatile uint32_t *)0x4004902C // Pin Control Register n
-#define PORTA_PCR12		*(volatile uint32_t *)0x40049030 // Pin Control Register n
-#define PORTA_PCR13		*(volatile uint32_t *)0x40049034 // Pin Control Register n
-#define PORTA_PCR14		*(volatile uint32_t *)0x40049038 // Pin Control Register n
-#define PORTA_PCR15		*(volatile uint32_t *)0x4004903C // Pin Control Register n
-#define PORTA_PCR16		*(volatile uint32_t *)0x40049040 // Pin Control Register n
-#define PORTA_PCR17		*(volatile uint32_t *)0x40049044 // Pin Control Register n
-#define PORTA_PCR18		*(volatile uint32_t *)0x40049048 // Pin Control Register n
-#define PORTA_PCR19		*(volatile uint32_t *)0x4004904C // Pin Control Register n
-#define PORTA_PCR20		*(volatile uint32_t *)0x40049050 // Pin Control Register n
-#define PORTA_PCR21		*(volatile uint32_t *)0x40049054 // Pin Control Register n
-#define PORTA_PCR22		*(volatile uint32_t *)0x40049058 // Pin Control Register n
-#define PORTA_PCR23		*(volatile uint32_t *)0x4004905C // Pin Control Register n
-#define PORTA_PCR24		*(volatile uint32_t *)0x40049060 // Pin Control Register n
-#define PORTA_PCR25		*(volatile uint32_t *)0x40049064 // Pin Control Register n
-#define PORTA_PCR26		*(volatile uint32_t *)0x40049068 // Pin Control Register n
-#define PORTA_PCR27		*(volatile uint32_t *)0x4004906C // Pin Control Register n
-#define PORTA_PCR28		*(volatile uint32_t *)0x40049070 // Pin Control Register n
-#define PORTA_PCR29		*(volatile uint32_t *)0x40049074 // Pin Control Register n
-#define PORTA_PCR30		*(volatile uint32_t *)0x40049078 // Pin Control Register n
-#define PORTA_PCR31		*(volatile uint32_t *)0x4004907C // Pin Control Register n
-#define PORTA_GPCLR		*(volatile uint32_t *)0x40049080 // Global Pin Control Low Register
-#define PORTA_GPCHR		*(volatile uint32_t *)0x40049084 // Global Pin Control High Register
-#define PORTA_ISFR		*(volatile uint32_t *)0x400490A0 // Interrupt Status Flag Register
-#define PORTB_PCR0		*(volatile uint32_t *)0x4004A000 // Pin Control Register n
-#define PORTB_PCR1		*(volatile uint32_t *)0x4004A004 // Pin Control Register n
-#define PORTB_PCR2		*(volatile uint32_t *)0x4004A008 // Pin Control Register n
-#define PORTB_PCR3		*(volatile uint32_t *)0x4004A00C // Pin Control Register n
-#define PORTB_PCR4		*(volatile uint32_t *)0x4004A010 // Pin Control Register n
-#define PORTB_PCR5		*(volatile uint32_t *)0x4004A014 // Pin Control Register n
-#define PORTB_PCR6		*(volatile uint32_t *)0x4004A018 // Pin Control Register n
-#define PORTB_PCR7		*(volatile uint32_t *)0x4004A01C // Pin Control Register n
-#define PORTB_PCR8		*(volatile uint32_t *)0x4004A020 // Pin Control Register n
-#define PORTB_PCR9		*(volatile uint32_t *)0x4004A024 // Pin Control Register n
-#define PORTB_PCR10		*(volatile uint32_t *)0x4004A028 // Pin Control Register n
-#define PORTB_PCR11		*(volatile uint32_t *)0x4004A02C // Pin Control Register n
-#define PORTB_PCR12		*(volatile uint32_t *)0x4004A030 // Pin Control Register n
-#define PORTB_PCR13		*(volatile uint32_t *)0x4004A034 // Pin Control Register n
-#define PORTB_PCR14		*(volatile uint32_t *)0x4004A038 // Pin Control Register n
-#define PORTB_PCR15		*(volatile uint32_t *)0x4004A03C // Pin Control Register n
-#define PORTB_PCR16		*(volatile uint32_t *)0x4004A040 // Pin Control Register n
-#define PORTB_PCR17		*(volatile uint32_t *)0x4004A044 // Pin Control Register n
-#define PORTB_PCR18		*(volatile uint32_t *)0x4004A048 // Pin Control Register n
-#define PORTB_PCR19		*(volatile uint32_t *)0x4004A04C // Pin Control Register n
-#define PORTB_PCR20		*(volatile uint32_t *)0x4004A050 // Pin Control Register n
-#define PORTB_PCR21		*(volatile uint32_t *)0x4004A054 // Pin Control Register n
-#define PORTB_PCR22		*(volatile uint32_t *)0x4004A058 // Pin Control Register n
-#define PORTB_PCR23		*(volatile uint32_t *)0x4004A05C // Pin Control Register n
-#define PORTB_PCR24		*(volatile uint32_t *)0x4004A060 // Pin Control Register n
-#define PORTB_PCR25		*(volatile uint32_t *)0x4004A064 // Pin Control Register n
-#define PORTB_PCR26		*(volatile uint32_t *)0x4004A068 // Pin Control Register n
-#define PORTB_PCR27		*(volatile uint32_t *)0x4004A06C // Pin Control Register n
-#define PORTB_PCR28		*(volatile uint32_t *)0x4004A070 // Pin Control Register n
-#define PORTB_PCR29		*(volatile uint32_t *)0x4004A074 // Pin Control Register n
-#define PORTB_PCR30		*(volatile uint32_t *)0x4004A078 // Pin Control Register n
-#define PORTB_PCR31		*(volatile uint32_t *)0x4004A07C // Pin Control Register n
-#define PORTB_GPCLR		*(volatile uint32_t *)0x4004A080 // Global Pin Control Low Register
-#define PORTB_GPCHR		*(volatile uint32_t *)0x4004A084 // Global Pin Control High Register
-#define PORTB_ISFR		*(volatile uint32_t *)0x4004A0A0 // Interrupt Status Flag Register
-#define PORTC_PCR0		*(volatile uint32_t *)0x4004B000 // Pin Control Register n
-#define PORTC_PCR1		*(volatile uint32_t *)0x4004B004 // Pin Control Register n
-#define PORTC_PCR2		*(volatile uint32_t *)0x4004B008 // Pin Control Register n
-#define PORTC_PCR3		*(volatile uint32_t *)0x4004B00C // Pin Control Register n
-#define PORTC_PCR4		*(volatile uint32_t *)0x4004B010 // Pin Control Register n
-#define PORTC_PCR5		*(volatile uint32_t *)0x4004B014 // Pin Control Register n
-#define PORTC_PCR6		*(volatile uint32_t *)0x4004B018 // Pin Control Register n
-#define PORTC_PCR7		*(volatile uint32_t *)0x4004B01C // Pin Control Register n
-#define PORTC_PCR8		*(volatile uint32_t *)0x4004B020 // Pin Control Register n
-#define PORTC_PCR9		*(volatile uint32_t *)0x4004B024 // Pin Control Register n
-#define PORTC_PCR10		*(volatile uint32_t *)0x4004B028 // Pin Control Register n
-#define PORTC_PCR11		*(volatile uint32_t *)0x4004B02C // Pin Control Register n
-#define PORTC_PCR12		*(volatile uint32_t *)0x4004B030 // Pin Control Register n
-#define PORTC_PCR13		*(volatile uint32_t *)0x4004B034 // Pin Control Register n
-#define PORTC_PCR14		*(volatile uint32_t *)0x4004B038 // Pin Control Register n
-#define PORTC_PCR15		*(volatile uint32_t *)0x4004B03C // Pin Control Register n
-#define PORTC_PCR16		*(volatile uint32_t *)0x4004B040 // Pin Control Register n
-#define PORTC_PCR17		*(volatile uint32_t *)0x4004B044 // Pin Control Register n
-#define PORTC_PCR18		*(volatile uint32_t *)0x4004B048 // Pin Control Register n
-#define PORTC_PCR19		*(volatile uint32_t *)0x4004B04C // Pin Control Register n
-#define PORTC_PCR20		*(volatile uint32_t *)0x4004B050 // Pin Control Register n
-#define PORTC_PCR21		*(volatile uint32_t *)0x4004B054 // Pin Control Register n
-#define PORTC_PCR22		*(volatile uint32_t *)0x4004B058 // Pin Control Register n
-#define PORTC_PCR23		*(volatile uint32_t *)0x4004B05C // Pin Control Register n
-#define PORTC_PCR24		*(volatile uint32_t *)0x4004B060 // Pin Control Register n
-#define PORTC_PCR25		*(volatile uint32_t *)0x4004B064 // Pin Control Register n
-#define PORTC_PCR26		*(volatile uint32_t *)0x4004B068 // Pin Control Register n
-#define PORTC_PCR27		*(volatile uint32_t *)0x4004B06C // Pin Control Register n
-#define PORTC_PCR28		*(volatile uint32_t *)0x4004B070 // Pin Control Register n
-#define PORTC_PCR29		*(volatile uint32_t *)0x4004B074 // Pin Control Register n
-#define PORTC_PCR30		*(volatile uint32_t *)0x4004B078 // Pin Control Register n
-#define PORTC_PCR31		*(volatile uint32_t *)0x4004B07C // Pin Control Register n
-#define PORTC_GPCLR		*(volatile uint32_t *)0x4004B080 // Global Pin Control Low Register
-#define PORTC_GPCHR		*(volatile uint32_t *)0x4004B084 // Global Pin Control High Register
-#define PORTC_ISFR		*(volatile uint32_t *)0x4004B0A0 // Interrupt Status Flag Register
-#define PORTD_PCR0		*(volatile uint32_t *)0x4004C000 // Pin Control Register n
-#define PORTD_PCR1		*(volatile uint32_t *)0x4004C004 // Pin Control Register n
-#define PORTD_PCR2		*(volatile uint32_t *)0x4004C008 // Pin Control Register n
-#define PORTD_PCR3		*(volatile uint32_t *)0x4004C00C // Pin Control Register n
-#define PORTD_PCR4		*(volatile uint32_t *)0x4004C010 // Pin Control Register n
-#define PORTD_PCR5		*(volatile uint32_t *)0x4004C014 // Pin Control Register n
-#define PORTD_PCR6		*(volatile uint32_t *)0x4004C018 // Pin Control Register n
-#define PORTD_PCR7		*(volatile uint32_t *)0x4004C01C // Pin Control Register n
-#define PORTD_PCR8		*(volatile uint32_t *)0x4004C020 // Pin Control Register n
-#define PORTD_PCR9		*(volatile uint32_t *)0x4004C024 // Pin Control Register n
-#define PORTD_PCR10		*(volatile uint32_t *)0x4004C028 // Pin Control Register n
-#define PORTD_PCR11		*(volatile uint32_t *)0x4004C02C // Pin Control Register n
-#define PORTD_PCR12		*(volatile uint32_t *)0x4004C030 // Pin Control Register n
-#define PORTD_PCR13		*(volatile uint32_t *)0x4004C034 // Pin Control Register n
-#define PORTD_PCR14		*(volatile uint32_t *)0x4004C038 // Pin Control Register n
-#define PORTD_PCR15		*(volatile uint32_t *)0x4004C03C // Pin Control Register n
-#define PORTD_PCR16		*(volatile uint32_t *)0x4004C040 // Pin Control Register n
-#define PORTD_PCR17		*(volatile uint32_t *)0x4004C044 // Pin Control Register n
-#define PORTD_PCR18		*(volatile uint32_t *)0x4004C048 // Pin Control Register n
-#define PORTD_PCR19		*(volatile uint32_t *)0x4004C04C // Pin Control Register n
-#define PORTD_PCR20		*(volatile uint32_t *)0x4004C050 // Pin Control Register n
-#define PORTD_PCR21		*(volatile uint32_t *)0x4004C054 // Pin Control Register n
-#define PORTD_PCR22		*(volatile uint32_t *)0x4004C058 // Pin Control Register n
-#define PORTD_PCR23		*(volatile uint32_t *)0x4004C05C // Pin Control Register n
-#define PORTD_PCR24		*(volatile uint32_t *)0x4004C060 // Pin Control Register n
-#define PORTD_PCR25		*(volatile uint32_t *)0x4004C064 // Pin Control Register n
-#define PORTD_PCR26		*(volatile uint32_t *)0x4004C068 // Pin Control Register n
-#define PORTD_PCR27		*(volatile uint32_t *)0x4004C06C // Pin Control Register n
-#define PORTD_PCR28		*(volatile uint32_t *)0x4004C070 // Pin Control Register n
-#define PORTD_PCR29		*(volatile uint32_t *)0x4004C074 // Pin Control Register n
-#define PORTD_PCR30		*(volatile uint32_t *)0x4004C078 // Pin Control Register n
-#define PORTD_PCR31		*(volatile uint32_t *)0x4004C07C // Pin Control Register n
-#define PORTD_GPCLR		*(volatile uint32_t *)0x4004C080 // Global Pin Control Low Register
-#define PORTD_GPCHR		*(volatile uint32_t *)0x4004C084 // Global Pin Control High Register
-#define PORTD_ISFR		*(volatile uint32_t *)0x4004C0A0 // Interrupt Status Flag Register
-#define PORTE_PCR0		*(volatile uint32_t *)0x4004D000 // Pin Control Register n
-#define PORTE_PCR1		*(volatile uint32_t *)0x4004D004 // Pin Control Register n
-#define PORTE_PCR2		*(volatile uint32_t *)0x4004D008 // Pin Control Register n
-#define PORTE_PCR3		*(volatile uint32_t *)0x4004D00C // Pin Control Register n
-#define PORTE_PCR4		*(volatile uint32_t *)0x4004D010 // Pin Control Register n
-#define PORTE_PCR5		*(volatile uint32_t *)0x4004D014 // Pin Control Register n
-#define PORTE_PCR6		*(volatile uint32_t *)0x4004D018 // Pin Control Register n
-#define PORTE_PCR7		*(volatile uint32_t *)0x4004D01C // Pin Control Register n
-#define PORTE_PCR8		*(volatile uint32_t *)0x4004D020 // Pin Control Register n
-#define PORTE_PCR9		*(volatile uint32_t *)0x4004D024 // Pin Control Register n
-#define PORTE_PCR10		*(volatile uint32_t *)0x4004D028 // Pin Control Register n
-#define PORTE_PCR11		*(volatile uint32_t *)0x4004D02C // Pin Control Register n
-#define PORTE_PCR12		*(volatile uint32_t *)0x4004D030 // Pin Control Register n
-#define PORTE_PCR13		*(volatile uint32_t *)0x4004D034 // Pin Control Register n
-#define PORTE_PCR14		*(volatile uint32_t *)0x4004D038 // Pin Control Register n
-#define PORTE_PCR15		*(volatile uint32_t *)0x4004D03C // Pin Control Register n
-#define PORTE_PCR16		*(volatile uint32_t *)0x4004D040 // Pin Control Register n
-#define PORTE_PCR17		*(volatile uint32_t *)0x4004D044 // Pin Control Register n
-#define PORTE_PCR18		*(volatile uint32_t *)0x4004D048 // Pin Control Register n
-#define PORTE_PCR19		*(volatile uint32_t *)0x4004D04C // Pin Control Register n
-#define PORTE_PCR20		*(volatile uint32_t *)0x4004D050 // Pin Control Register n
-#define PORTE_PCR21		*(volatile uint32_t *)0x4004D054 // Pin Control Register n
-#define PORTE_PCR22		*(volatile uint32_t *)0x4004D058 // Pin Control Register n
-#define PORTE_PCR23		*(volatile uint32_t *)0x4004D05C // Pin Control Register n
-#define PORTE_PCR24		*(volatile uint32_t *)0x4004D060 // Pin Control Register n
-#define PORTE_PCR25		*(volatile uint32_t *)0x4004D064 // Pin Control Register n
-#define PORTE_PCR26		*(volatile uint32_t *)0x4004D068 // Pin Control Register n
-#define PORTE_PCR27		*(volatile uint32_t *)0x4004D06C // Pin Control Register n
-#define PORTE_PCR28		*(volatile uint32_t *)0x4004D070 // Pin Control Register n
-#define PORTE_PCR29		*(volatile uint32_t *)0x4004D074 // Pin Control Register n
-#define PORTE_PCR30		*(volatile uint32_t *)0x4004D078 // Pin Control Register n
-#define PORTE_PCR31		*(volatile uint32_t *)0x4004D07C // Pin Control Register n
-#define PORTE_GPCLR		*(volatile uint32_t *)0x4004D080 // Global Pin Control Low Register
-#define PORTE_GPCHR		*(volatile uint32_t *)0x4004D084 // Global Pin Control High Register
-#define PORTE_ISFR		*(volatile uint32_t *)0x4004D0A0 // Interrupt Status Flag Register
-
-// Chapter 12: System Integration Module (SIM)
-#define SIM_SOPT1		*(volatile uint32_t *)0x40047000 // System Options Register 1
-#define SIM_SOPT1CFG		*(volatile uint32_t *)0x40047004 // SOPT1 Configuration Register
-#define SIM_SOPT2		*(volatile uint32_t *)0x40048004 // System Options Register 2
-#define SIM_SOPT2_USBSRC		(uint32_t)0x00040000		// 0=USB_CLKIN, 1=FFL/PLL
-#define SIM_SOPT2_PLLFLLSEL		(uint32_t)0x00010000		// 0=FLL, 1=PLL
-#define SIM_SOPT2_TRACECLKSEL		(uint32_t)0x00001000		// 0=MCGOUTCLK, 1=CPU
-#define SIM_SOPT2_PTD7PAD		(uint32_t)0x00000800		// 0=normal, 1=double drive PTD7
-#define SIM_SOPT2_CLKOUTSEL(n)		(uint32_t)(((n) & 7) << 5)	// Selects the clock to output on the CLKOUT pin.
-#define SIM_SOPT2_RTCCLKOUTSEL		(uint32_t)0x00000010		// RTC clock out select
-#define SIM_SOPT4		*(volatile uint32_t *)0x4004800C // System Options Register 4
-#define SIM_SOPT5		*(volatile uint32_t *)0x40048010 // System Options Register 5
-#define SIM_SOPT7		*(volatile uint32_t *)0x40048018 // System Options Register 7
-#define SIM_SDID		*(const	   uint32_t *)0x40048024 // System Device Identification Register
-#define SIM_SCGC2		*(volatile uint32_t *)0x4004802C // System Clock Gating Control Register 2
-#define SIM_SCGC2_DAC0			(uint32_t)0x00001000		// DAC0 Clock Gate Control
-#define SIM_SCGC3		*(volatile uint32_t *)0x40048030 // System Clock Gating Control Register 3
-#define SIM_SCGC3_ADC1			(uint32_t)0x08000000		// ADC1 Clock Gate Control
-#define SIM_SCGC3_FTM2			(uint32_t)0x01000000		// FTM2 Clock Gate Control
-#define SIM_SCGC4		*(volatile uint32_t *)0x40048034 // System Clock Gating Control Register 4
-#define SIM_SCGC4_VREF			(uint32_t)0x00100000		// VREF Clock Gate Control
-#define SIM_SCGC4_CMP			(uint32_t)0x00080000		// Comparator Clock Gate Control
-#define SIM_SCGC4_USBOTG		(uint32_t)0x00040000		// USB Clock Gate Control
-#define SIM_SCGC4_UART2			(uint32_t)0x00001000		// UART2 Clock Gate Control
-#define SIM_SCGC4_UART1			(uint32_t)0x00000800		// UART1 Clock Gate Control
-#define SIM_SCGC4_UART0			(uint32_t)0x00000400		// UART0 Clock Gate Control
-#define SIM_SCGC4_I2C1			(uint32_t)0x00000080		// I2C1 Clock Gate Control
-#define SIM_SCGC4_I2C0			(uint32_t)0x00000040		// I2C0 Clock Gate Control
-#define SIM_SCGC4_CMT			(uint32_t)0x00000004		// CMT Clock Gate Control
-#define SIM_SCGC4_EWM			(uint32_t)0x00000002		// EWM Clock Gate Control
-#define SIM_SCGC5		*(volatile uint32_t *)0x40048038 // System Clock Gating Control Register 5
-#define SIM_SCGC5_PORTE			(uint32_t)0x00002000		// Port E Clock Gate Control
-#define SIM_SCGC5_PORTD			(uint32_t)0x00001000		// Port D Clock Gate Control
-#define SIM_SCGC5_PORTC			(uint32_t)0x00000800		// Port C Clock Gate Control
-#define SIM_SCGC5_PORTB			(uint32_t)0x00000400		// Port B Clock Gate Control
-#define SIM_SCGC5_PORTA			(uint32_t)0x00000200		// Port A Clock Gate Control
-#define SIM_SCGC5_TSI			(uint32_t)0x00000020		// Touch Sense Input TSI Clock Gate Control
-#define SIM_SCGC5_LPTIMER		(uint32_t)0x00000001		// Low Power Timer Access Control
-#define SIM_SCGC6		*(volatile uint32_t *)0x4004803C // System Clock Gating Control Register 6
-#define SIM_SCGC6_RTC			(uint32_t)0x20000000		// RTC Access
-#define SIM_SCGC6_ADC0			(uint32_t)0x08000000		// ADC0 Clock Gate Control
-#define SIM_SCGC6_FTM1			(uint32_t)0x02000000		// FTM1 Clock Gate Control
-#define SIM_SCGC6_FTM0			(uint32_t)0x01000000		// FTM0 Clock Gate Control
-#define SIM_SCGC6_PIT			(uint32_t)0x00800000		// PIT Clock Gate Control
-#define SIM_SCGC6_PDB			(uint32_t)0x00400000		// PDB Clock Gate Control
-#define SIM_SCGC6_USBDCD		(uint32_t)0x00200000		// USB DCD Clock Gate Control
-#define SIM_SCGC6_CRC			(uint32_t)0x00040000		// CRC Clock Gate Control
-#define SIM_SCGC6_I2S			(uint32_t)0x00008000		// I2S Clock Gate Control
-#define SIM_SCGC6_SPI1			(uint32_t)0x00002000		// SPI1 Clock Gate Control
-#define SIM_SCGC6_SPI0			(uint32_t)0x00001000		// SPI0 Clock Gate Control
-#define SIM_SCGC6_FLEXCAN0		(uint32_t)0x00000010		// FlexCAN0 Clock Gate Control
-#define SIM_SCGC6_DMAMUX		(uint32_t)0x00000002		// DMA Mux Clock Gate Control
-#define SIM_SCGC6_FTFL			(uint32_t)0x00000001		// Flash Memory Clock Gate Control
-#define SIM_SCGC7		*(volatile uint32_t *)0x40048040 // System Clock Gating Control Register 7
-#define SIM_SCGC7_DMA			(uint32_t)0x00000002		// DMA Clock Gate Control
-#define SIM_CLKDIV1		*(volatile uint32_t *)0x40048044 // System Clock Divider Register 1
-#define SIM_CLKDIV1_OUTDIV1(n)		(uint32_t)(((n) & 0x0F) << 28)	// divide value for the core/system clock
-#define SIM_CLKDIV1_OUTDIV2(n)		(uint32_t)(((n) & 0x0F) << 24)	// divide value for the peripheral clock
-#define SIM_CLKDIV1_OUTDIV4(n)		(uint32_t)(((n) & 0x0F) << 16)	// divide value for the flash clock
-#define SIM_CLKDIV2		*(volatile uint32_t *)0x40048048 // System Clock Divider Register 2
-#define SIM_CLKDIV2_USBDIV(n)		(uint32_t)(((n) & 0x07) << 1)
-#define SIM_CLKDIV2_USBFRAC		(uint32_t)0x01
-#define SIM_FCFG1		*(const	   uint32_t *)0x4004804C // Flash Configuration Register 1
-#define SIM_FCFG2		*(const	   uint32_t *)0x40048050 // Flash Configuration Register 2
-#define SIM_UIDH		*(const	   uint32_t *)0x40048054 // Unique Identification Register High
-#define SIM_UIDMH		*(const	   uint32_t *)0x40048058 // Unique Identification Register Mid-High
-#define SIM_UIDML		*(const	   uint32_t *)0x4004805C // Unique Identification Register Mid Low
-#define SIM_UIDL		*(const	   uint32_t *)0x40048060 // Unique Identification Register Low
-
-// Chapter 13: Reset Control Module (RCM)
-#define RCM_SRS0		*(volatile uint8_t  *)0x4007F000 // System Reset Status Register 0
-#define RCM_SRS1		*(volatile uint8_t  *)0x4007F001 // System Reset Status Register 1
-#define RCM_RPFC		*(volatile uint8_t  *)0x4007F004 // Reset Pin Filter Control Register
-#define RCM_RPFW		*(volatile uint8_t  *)0x4007F005 // Reset Pin Filter Width Register
-#define RCM_MR			*(volatile uint8_t  *)0x4007F007 // Mode Register
-
-// Chapter 14: System Mode Controller
-#define SMC_PMPROT		*(volatile uint8_t  *)0x4007E000 // Power Mode Protection Register
-#define SMC_PMPROT_AVLP			(uint8_t)0x20			// Allow very low power modes
-#define SMC_PMPROT_ALLS			(uint8_t)0x08			// Allow low leakage stop mode
-#define SMC_PMPROT_AVLLS		(uint8_t)0x02			// Allow very low leakage stop mode
-#define SMC_PMCTRL		*(volatile uint8_t  *)0x4007E001 // Power Mode Control Register
-#define SMC_PMCTRL_LPWUI		(uint8_t)0x80			// Low Power Wake Up on Interrupt
-#define SMC_PMCTRL_RUNM(n)		(uint8_t)(((n) & 0x03) << 5)	// Run Mode Control
-#define SMC_PMCTRL_STOPA		(uint8_t)0x08			// Stop Aborted
-#define SMC_PMCTRL_STOPM(n)		(uint8_t)((n) & 0x07)		// Stop Mode Control
-#define SMC_VLLSCTRL		*(volatile uint8_t  *)0x4007E002 // VLLS Control Register
-#define SMC_VLLSCTRL_PORPO		(uint8_t)0x20			// POR Power Option
-#define SMC_VLLSCTRL_VLLSM(n)		(uint8_t)((n) & 0x07)		// VLLS Mode Control
-#define SMC_PMSTAT		*(volatile uint8_t  *)0x4007E003 // Power Mode Status Register
-#define SMC_PMSTAT_RUN			(uint8_t)0x01			// Current power mode is RUN
-#define SMC_PMSTAT_STOP			(uint8_t)0x02			// Current power mode is STOP
-#define SMC_PMSTAT_VLPR			(uint8_t)0x04			// Current power mode is VLPR
-#define SMC_PMSTAT_VLPW			(uint8_t)0x08			// Current power mode is VLPW
-#define SMC_PMSTAT_VLPS			(uint8_t)0x10			// Current power mode is VLPS
-#define SMC_PMSTAT_LLS			(uint8_t)0x20			// Current power mode is LLS
-#define SMC_PMSTAT_VLLS			(uint8_t)0x40			// Current power mode is VLLS
-
-// Chapter 15: Power Management Controller
-#define PMC_LVDSC1		*(volatile uint8_t  *)0x4007D000 // Low Voltage Detect Status And Control 1 register
-#define PMC_LVDSC1_LVDF			(uint8_t)0x80			// Low-Voltage Detect Flag
-#define PMC_LVDSC1_LVDACK		(uint8_t)0x40			// Low-Voltage Detect Acknowledge
-#define PMC_LVDSC1_LVDIE		(uint8_t)0x20			// Low-Voltage Detect Interrupt Enable
-#define PMC_LVDSC1_LVDRE		(uint8_t)0x10			// Low-Voltage Detect Reset Enable
-#define PMC_LVDSC1_LVDV(n)		(uint8_t)((n) & 0x03)		// Low-Voltage Detect Voltage Select
-#define PMC_LVDSC2		*(volatile uint8_t  *)0x4007D001 // Low Voltage Detect Status And Control 2 register
-#define PMC_LVDSC2_LVWF			(uint8_t)0x80			// Low-Voltage Warning Flag
-#define PMC_LVDSC2_LVWACK		(uint8_t)0x40			// Low-Voltage Warning Acknowledge
-#define PMC_LVDSC2_LVWIE		(uint8_t)0x20			// Low-Voltage Warning Interrupt Enable
-#define PMC_LVDSC2_LVWV(n)		(uint8_t)((n) & 0x03)		// Low-Voltage Warning Voltage Select
-#define PMC_REGSC		*(volatile uint8_t  *)0x4007D002 // Regulator Status And Control register
-#define PMC_REGSC_BGEN			(uint8_t)0x10			// Bandgap Enable In VLPx Operation
-#define PMC_REGSC_ACKISO		(uint8_t)0x08			// Acknowledge Isolation
-#define PMC_REGSC_REGONS		(uint8_t)0x04			// Regulator In Run Regulation Status
-#define PMC_REGSC_BGBE			(uint8_t)0x01			// Bandgap Buffer Enable
-
-// Chapter 16: Low-Leakage Wakeup Unit (LLWU)
-#define LLWU_PE1		*(volatile uint8_t  *)0x4007C000 // LLWU Pin Enable 1 register
-#define LLWU_PE2		*(volatile uint8_t  *)0x4007C001 // LLWU Pin Enable 2 register
-#define LLWU_PE3		*(volatile uint8_t  *)0x4007C002 // LLWU Pin Enable 3 register
-#define LLWU_PE4		*(volatile uint8_t  *)0x4007C003 // LLWU Pin Enable 4 register
-#define LLWU_ME			*(volatile uint8_t  *)0x4007C004 // LLWU Module Enable register
-#define LLWU_F1			*(volatile uint8_t  *)0x4007C005 // LLWU Flag 1 register
-#define LLWU_F2			*(volatile uint8_t  *)0x4007C006 // LLWU Flag 2 register
-#define LLWU_F3			*(volatile uint8_t  *)0x4007C007 // LLWU Flag 3 register
-#define LLWU_FILT1		*(volatile uint8_t  *)0x4007C008 // LLWU Pin Filter 1 register
-#define LLWU_FILT2		*(volatile uint8_t  *)0x4007C009 // LLWU Pin Filter 2 register
-#define LLWU_RST		*(volatile uint8_t  *)0x4007C00A // LLWU Reset Enable register
-
-// Chapter 17: Miscellaneous Control Module (MCM)
-#define MCM_PLASC		*(volatile uint16_t *)0xE0080008 // Crossbar Switch (AXBS) Slave Configuration
-#define MCM_PLAMC		*(volatile uint16_t *)0xE008000A // Crossbar Switch (AXBS) Master Configuration
-#define MCM_PLACR		*(volatile uint32_t *)0xE008000C // Crossbar Switch (AXBS) Control Register (MK20DX128)
-#define MCM_PLACR_ARG			(uint32_t)0x00000200		// Arbitration select, 0=fixed, 1=round-robin
-#define MCM_CR			*(volatile uint32_t *)0xE008000C // RAM arbitration control register (MK20DX256)
-#define MCM_CR_SRAMLWP			(uint32_t)0x40000000		// SRAM_L write protect
-#define MCM_CR_SRAMLAP(n)		(uint32_t)(((n) & 0x03) << 28)	// SRAM_L priority, 0=RR, 1=favor DMA, 2=CPU, 3=DMA
-#define MCM_CR_SRAMUWP			(uint32_t)0x04000000		// SRAM_U write protect
-#define MCM_CR_SRAMUAP(n)		(uint32_t)(((n) & 0x03) << 24)	// SRAM_U priority, 0=RR, 1=favor DMA, 2=CPU, 3=DMA
-
-// Crossbar Switch (AXBS) - only programmable on MK20DX256
-#define AXBS_PRS0		*(volatile uint32_t *)0x40004000 // Priority Registers Slave 0
-#define AXBS_CRS0		*(volatile uint32_t *)0x40004010 // Control Register 0
-#define AXBS_PRS1		*(volatile uint32_t *)0x40004100 // Priority Registers Slave 1
-#define AXBS_CRS1		*(volatile uint32_t *)0x40004110 // Control Register 1
-#define AXBS_PRS2		*(volatile uint32_t *)0x40004200 // Priority Registers Slave 2
-#define AXBS_CRS2		*(volatile uint32_t *)0x40004210 // Control Register 2
-#define AXBS_PRS3		*(volatile uint32_t *)0x40004300 // Priority Registers Slave 3
-#define AXBS_CRS3		*(volatile uint32_t *)0x40004310 // Control Register 3
-#define AXBS_PRS4		*(volatile uint32_t *)0x40004400 // Priority Registers Slave 4
-#define AXBS_CRS4		*(volatile uint32_t *)0x40004410 // Control Register 4
-#define AXBS_PRS5		*(volatile uint32_t *)0x40004500 // Priority Registers Slave 5
-#define AXBS_CRS5		*(volatile uint32_t *)0x40004510 // Control Register 5
-#define AXBS_PRS6		*(volatile uint32_t *)0x40004600 // Priority Registers Slave 6
-#define AXBS_CRS6		*(volatile uint32_t *)0x40004610 // Control Register 6
-#define AXBS_PRS7		*(volatile uint32_t *)0x40004700 // Priority Registers Slave 7
-#define AXBS_CRS7		*(volatile uint32_t *)0x40004710 // Control Register 7
-#define AXBS_MGPCR0		*(volatile uint32_t *)0x40004800 // Master 0 General Purpose Control Register
-#define AXBS_MGPCR1		*(volatile uint32_t *)0x40004900 // Master 1 General Purpose Control Register
-#define AXBS_MGPCR2		*(volatile uint32_t *)0x40004A00 // Master 2 General Purpose Control Register
-#define AXBS_MGPCR3		*(volatile uint32_t *)0x40004B00 // Master 3 General Purpose Control Register
-#define AXBS_MGPCR4		*(volatile uint32_t *)0x40004C00 // Master 4 General Purpose Control Register
-#define AXBS_MGPCR5		*(volatile uint32_t *)0x40004D00 // Master 5 General Purpose Control Register
-#define AXBS_MGPCR6		*(volatile uint32_t *)0x40004E00 // Master 6 General Purpose Control Register
-#define AXBS_MGPCR7		*(volatile uint32_t *)0x40004F00 // Master 7 General Purpose Control Register
-#define AXBS_CRS_READONLY		(uint32_t)0x80000000
-#define AXBS_CRS_HALTLOWPRIORITY	(uint32_t)0x40000000
-#define AXBS_CRS_ARB_FIXED		(uint32_t)0x00000000
-#define AXBS_CRS_ARB_ROUNDROBIN		(uint32_t)0x00010000
-#define AXBS_CRS_PARK_FIXED		(uint32_t)0x00000000
-#define AXBS_CRS_PARK_PREVIOUS		(uint32_t)0x00000010
-#define AXBS_CRS_PARK_NONE		(uint32_t)0x00000020
-#define AXBS_CRS_PARK(n)		(uint32_t)(((n) & 7) << 0)
-
-
-
-// Chapter 20: Direct Memory Access Multiplexer (DMAMUX)
-#define DMAMUX0_CHCFG0		*(volatile uint8_t  *)0x40021000 // Channel Configuration register
-#define DMAMUX0_CHCFG1		*(volatile uint8_t  *)0x40021001 // Channel Configuration register
-#define DMAMUX0_CHCFG2		*(volatile uint8_t  *)0x40021002 // Channel Configuration register
-#define DMAMUX0_CHCFG3		*(volatile uint8_t  *)0x40021003 // Channel Configuration register
-#define DMAMUX0_CHCFG4		*(volatile uint8_t  *)0x40021004 // Channel Configuration register
-#define DMAMUX0_CHCFG5		*(volatile uint8_t  *)0x40021005 // Channel Configuration register
-#define DMAMUX0_CHCFG6		*(volatile uint8_t  *)0x40021006 // Channel Configuration register
-#define DMAMUX0_CHCFG7		*(volatile uint8_t  *)0x40021007 // Channel Configuration register
-#define DMAMUX0_CHCFG8		*(volatile uint8_t  *)0x40021008 // Channel Configuration register
-#define DMAMUX0_CHCFG9		*(volatile uint8_t  *)0x40021009 // Channel Configuration register
-#define DMAMUX0_CHCFG10		*(volatile uint8_t  *)0x4002100A // Channel Configuration register
-#define DMAMUX0_CHCFG11		*(volatile uint8_t  *)0x4002100B // Channel Configuration register
-#define DMAMUX0_CHCFG12		*(volatile uint8_t  *)0x4002100C // Channel Configuration register
-#define DMAMUX0_CHCFG13		*(volatile uint8_t  *)0x4002100D // Channel Configuration register
-#define DMAMUX0_CHCFG14		*(volatile uint8_t  *)0x4002100E // Channel Configuration register
-#define DMAMUX0_CHCFG15		*(volatile uint8_t  *)0x4002100F // Channel Configuration register
-#define DMAMUX_DISABLE			0
-#define DMAMUX_TRIG			64
-#define DMAMUX_ENABLE			128
-#define DMAMUX_SOURCE_UART0_RX		2
-#define DMAMUX_SOURCE_UART0_TX		3
-#define DMAMUX_SOURCE_UART1_RX		4
-#define DMAMUX_SOURCE_UART1_TX		5
-#define DMAMUX_SOURCE_UART2_RX		6
-#define DMAMUX_SOURCE_UART2_TX		7
-#define DMAMUX_SOURCE_I2S0_RX		14
-#define DMAMUX_SOURCE_I2S0_TX		15
-#define DMAMUX_SOURCE_SPI0_RX		16
-#define DMAMUX_SOURCE_SPI0_TX		17
-#define DMAMUX_SOURCE_I2C0		22
-#define DMAMUX_SOURCE_I2C1		23
-#define DMAMUX_SOURCE_FTM0_CH0		24
-#define DMAMUX_SOURCE_FTM0_CH1		25
-#define DMAMUX_SOURCE_FTM0_CH2		26
-#define DMAMUX_SOURCE_FTM0_CH3		27
-#define DMAMUX_SOURCE_FTM0_CH4		28
-#define DMAMUX_SOURCE_FTM0_CH5		29
-#define DMAMUX_SOURCE_FTM0_CH6		30
-#define DMAMUX_SOURCE_FTM0_CH7		31
-#define DMAMUX_SOURCE_FTM1_CH0		32
-#define DMAMUX_SOURCE_FTM1_CH1		33
-#define DMAMUX_SOURCE_FTM2_CH0		34
-#define DMAMUX_SOURCE_FTM2_CH1		35
-#define DMAMUX_SOURCE_ADC0		40
-#define DMAMUX_SOURCE_ADC1		41
-#define DMAMUX_SOURCE_CMP0		42
-#define DMAMUX_SOURCE_CMP1		43
-#define DMAMUX_SOURCE_CMP2		44
-#define DMAMUX_SOURCE_DAC0		45
-#define DMAMUX_SOURCE_CMT		47
-#define DMAMUX_SOURCE_PDB		48
-#define DMAMUX_SOURCE_PORTA		49
-#define DMAMUX_SOURCE_PORTB		50
-#define DMAMUX_SOURCE_PORTC		51
-#define DMAMUX_SOURCE_PORTD		52
-#define DMAMUX_SOURCE_PORTE		53
-#define DMAMUX_SOURCE_ALWAYS0		54
-#define DMAMUX_SOURCE_ALWAYS1		55
-#define DMAMUX_SOURCE_ALWAYS2		56
-#define DMAMUX_SOURCE_ALWAYS3		57
-#define DMAMUX_SOURCE_ALWAYS4		58
-#define DMAMUX_SOURCE_ALWAYS5		59
-#define DMAMUX_SOURCE_ALWAYS6		60
-#define DMAMUX_SOURCE_ALWAYS7		61
-#define DMAMUX_SOURCE_ALWAYS8		62
-#define DMAMUX_SOURCE_ALWAYS9		63
-
-// Chapter 21: Direct Memory Access Controller (eDMA)
-#define DMA_CR			*(volatile uint32_t *)0x40008000 // Control Register
-#define DMA_CR_CX			((uint32_t)(1<<17))	// Cancel Transfer
-#define DMA_CR_ECX			((uint32_t)(1<<16))	// Error Cancel Transfer
-#define DMA_CR_EMLM			((uint32_t)0x80)	// Enable Minor Loop Mapping
-#define DMA_CR_CLM			((uint32_t)0x40)	// Continuous Link Mode
-#define DMA_CR_HALT			((uint32_t)0x20)	// Halt DMA Operations
-#define DMA_CR_HOE			((uint32_t)0x10)	// Halt On Error
-#define DMA_CR_ERCA			((uint32_t)0x04)	// Enable Round Robin Channel Arbitration
-#define DMA_CR_EDBG			((uint32_t)0x02)	// Enable Debug
-#define DMA_ES			*(volatile uint32_t *)0x40008004 // Error Status Register
-#define DMA_ERQ			*(volatile uint32_t *)0x4000800C // Enable Request Register
-#define DMA_ERQ_ERQ0			((uint32_t)1<<0)	// Enable DMA Request 0
-#define DMA_ERQ_ERQ1			((uint32_t)1<<1)	// Enable DMA Request 1
-#define DMA_ERQ_ERQ2			((uint32_t)1<<2)	// Enable DMA Request 2
-#define DMA_ERQ_ERQ3			((uint32_t)1<<3)	// Enable DMA Request 3
-#define DMA_ERQ_ERQ4			((uint32_t)1<<4)	// Enable DMA Request 4
-#define DMA_ERQ_ERQ5			((uint32_t)1<<5)	// Enable DMA Request 5
-#define DMA_ERQ_ERQ6			((uint32_t)1<<6)	// Enable DMA Request 6
-#define DMA_ERQ_ERQ7			((uint32_t)1<<7)	// Enable DMA Request 7
-#define DMA_ERQ_ERQ8			((uint32_t)1<<8)	// Enable DMA Request 8
-#define DMA_ERQ_ERQ9			((uint32_t)1<<9)	// Enable DMA Request 9
-#define DMA_ERQ_ERQ10			((uint32_t)1<<10)	// Enable DMA Request 10
-#define DMA_ERQ_ERQ11			((uint32_t)1<<11)	// Enable DMA Request 11
-#define DMA_ERQ_ERQ12			((uint32_t)1<<12)	// Enable DMA Request 12
-#define DMA_ERQ_ERQ13			((uint32_t)1<<13)	// Enable DMA Request 13
-#define DMA_ERQ_ERQ14			((uint32_t)1<<14)	// Enable DMA Request 14
-#define DMA_ERQ_ERQ15			((uint32_t)1<<15)	// Enable DMA Request 15
-#define DMA_EEI			*(volatile uint32_t *)0x40008014 // Enable Error Interrupt Register
-#define DMA_EEI_EEI0			((uint32_t)1<<0)	// Enable Error Interrupt 0
-#define DMA_EEI_EEI1			((uint32_t)1<<1)	// Enable Error Interrupt 1
-#define DMA_EEI_EEI2			((uint32_t)1<<2)	// Enable Error Interrupt 2
-#define DMA_EEI_EEI3			((uint32_t)1<<3)	// Enable Error Interrupt 3
-#define DMA_EEI_EEI4			((uint32_t)1<<4)	// Enable Error Interrupt 4
-#define DMA_EEI_EEI5			((uint32_t)1<<5)	// Enable Error Interrupt 5
-#define DMA_EEI_EEI6			((uint32_t)1<<6)	// Enable Error Interrupt 6
-#define DMA_EEI_EEI7			((uint32_t)1<<7)	// Enable Error Interrupt 7
-#define DMA_EEI_EEI8			((uint32_t)1<<8)	// Enable Error Interrupt 8
-#define DMA_EEI_EEI9			((uint32_t)1<<9)	// Enable Error Interrupt 9
-#define DMA_EEI_EEI10			((uint32_t)1<<10)	// Enable Error Interrupt 10
-#define DMA_EEI_EEI11			((uint32_t)1<<11)	// Enable Error Interrupt 11
-#define DMA_EEI_EEI12			((uint32_t)1<<12)	// Enable Error Interrupt 12
-#define DMA_EEI_EEI13			((uint32_t)1<<13)	// Enable Error Interrupt 13
-#define DMA_EEI_EEI14			((uint32_t)1<<14)	// Enable Error Interrupt 14
-#define DMA_EEI_EEI15			((uint32_t)1<<15)	// Enable Error Interrupt 15
-#define DMA_CEEI		*(volatile uint8_t  *)0x40008018 // Clear Enable Error Interrupt Register
-#define DMA_CEEI_CEEI(n)		((uint8_t)(n & 15)<<0)	// Clear Enable Error Interrupt
-#define DMA_CEEI_CAEE			((uint8_t)1<<6)		// Clear All Enable Error Interrupts
-#define DMA_CEEI_NOP			((uint8_t)1<<7)		// NOP
-#define DMA_SEEI		*(volatile uint8_t  *)0x40008019 // Set Enable Error Interrupt Register
-#define DMA_SEEI_SEEI(n)		((uint8_t)(n & 15)<<0)	// Set Enable Error Interrupt
-#define DMA_SEEI_SAEE			((uint8_t)1<<6)		// Set All Enable Error Interrupts
-#define DMA_SEEI_NOP			((uint8_t)1<<7)		// NOP
-#define DMA_CERQ		*(volatile uint8_t  *)0x4000801A // Clear Enable Request Register
-#define DMA_CERQ_CERQ(n)		((uint8_t)(n & 15)<<0)	// Clear Enable Request
-#define DMA_CERQ_CAER			((uint8_t)1<<6)		// Clear All Enable Requests
-#define DMA_CERQ_NOP			((uint8_t)1<<7)		// NOP
-#define DMA_SERQ		*(volatile uint8_t  *)0x4000801B // Set Enable Request Register
-#define DMA_SERQ_SERQ(n)		((uint8_t)(n & 15)<<0)	// Set Enable Request
-#define DMA_SERQ_SAER			((uint8_t)1<<6)		// Set All Enable Requests
-#define DMA_SERQ_NOP			((uint8_t)1<<7)		// NOP
-#define DMA_CDNE		*(volatile uint8_t  *)0x4000801C // Clear DONE Status Bit Register
-#define DMA_CDNE_CDNE(n)		((uint8_t)(n & 15)<<0)	// Clear Done Bit
-#define DMA_CDNE_CADN			((uint8_t)1<<6)		// Clear All Done Bits
-#define DMA_CDNE_NOP			((uint8_t)1<<7)		// NOP
-#define DMA_SSRT		*(volatile uint8_t  *)0x4000801D // Set START Bit Register
-#define DMA_SSRT_SSRT(n)		((uint8_t)(n & 15)<<0)	// Set Start Bit
-#define DMA_SSRT_SAST			((uint8_t)1<<6)		// Set All Start Bits
-#define DMA_SSRT_NOP			((uint8_t)1<<7)		// NOP
-#define DMA_CERR		*(volatile uint8_t  *)0x4000801E // Clear Error Register
-#define DMA_CERR_CERR(n)		((uint8_t)(n & 15)<<0)	// Clear Error Indicator
-#define DMA_CERR_CAEI			((uint8_t)1<<6)		// Clear All Error Indicators
-#define DMA_CERR_NOP			((uint8_t)1<<7)		// NOP
-#define DMA_CINT		*(volatile uint8_t  *)0x4000801F // Clear Interrupt Request Register
-#define DMA_CINT_CINT(n)		((uint8_t)(n & 15)<<0)	// Clear Interrupt Request
-#define DMA_CINT_CAIR			((uint8_t)1<<6)		// Clear All Interrupt Requests
-#define DMA_CINT_NOP			((uint8_t)1<<7)		// NOP
-#define DMA_INT			*(volatile uint32_t *)0x40008024 // Interrupt Request Register
-#define DMA_INT_INT0			((uint32_t)1<<0)	// Interrupt Request 0
-#define DMA_INT_INT1			((uint32_t)1<<1)	// Interrupt Request 1
-#define DMA_INT_INT2			((uint32_t)1<<2)	// Interrupt Request 2
-#define DMA_INT_INT3			((uint32_t)1<<3)	// Interrupt Request 3
-#define DMA_INT_INT4			((uint32_t)1<<4)	// Interrupt Request 4
-#define DMA_INT_INT5			((uint32_t)1<<5)	// Interrupt Request 5
-#define DMA_INT_INT6			((uint32_t)1<<6)	// Interrupt Request 6
-#define DMA_INT_INT7			((uint32_t)1<<7)	// Interrupt Request 7
-#define DMA_INT_INT8			((uint32_t)1<<8)	// Interrupt Request 8
-#define DMA_INT_INT9			((uint32_t)1<<9)	// Interrupt Request 9
-#define DMA_INT_INT10			((uint32_t)1<<10)	// Interrupt Request 10
-#define DMA_INT_INT11			((uint32_t)1<<11)	// Interrupt Request 11
-#define DMA_INT_INT12			((uint32_t)1<<12)	// Interrupt Request 12
-#define DMA_INT_INT13			((uint32_t)1<<13)	// Interrupt Request 13
-#define DMA_INT_INT14			((uint32_t)1<<14)	// Interrupt Request 14
-#define DMA_INT_INT15			((uint32_t)1<<15)	// Interrupt Request 15
-#define DMA_ERR			*(volatile uint32_t *)0x4000802C // Error Register
-#define DMA_ERR_ERR0			((uint32_t)1<<0)	// Error in Channel 0
-#define DMA_ERR_ERR1			((uint32_t)1<<1)	// Error in Channel 1
-#define DMA_ERR_ERR2			((uint32_t)1<<2)	// Error in Channel 2
-#define DMA_ERR_ERR3			((uint32_t)1<<3)	// Error in Channel 3
-#define DMA_ERR_ERR4			((uint32_t)1<<4)	// Error in Channel 4
-#define DMA_ERR_ERR5			((uint32_t)1<<5)	// Error in Channel 5
-#define DMA_ERR_ERR6			((uint32_t)1<<6)	// Error in Channel 6
-#define DMA_ERR_ERR7			((uint32_t)1<<7)	// Error in Channel 7
-#define DMA_ERR_ERR8			((uint32_t)1<<8)	// Error in Channel 8
-#define DMA_ERR_ERR9			((uint32_t)1<<9)	// Error in Channel 9
-#define DMA_ERR_ERR10			((uint32_t)1<<10)	// Error in Channel 10
-#define DMA_ERR_ERR11			((uint32_t)1<<11)	// Error in Channel 11
-#define DMA_ERR_ERR12			((uint32_t)1<<12)	// Error in Channel 12
-#define DMA_ERR_ERR13			((uint32_t)1<<13)	// Error in Channel 13
-#define DMA_ERR_ERR14			((uint32_t)1<<14)	// Error in Channel 14
-#define DMA_ERR_ERR15			((uint32_t)1<<15)	// Error in Channel 15
-#define DMA_HRS			*(volatile uint32_t *)0x40008034 // Hardware Request Status Register
-#define DMA_HRS_HRS0			((uint32_t)1<<0)	// Hardware Request Status Channel 0
-#define DMA_HRS_HRS1			((uint32_t)1<<1)	// Hardware Request Status Channel 1
-#define DMA_HRS_HRS2			((uint32_t)1<<2)	// Hardware Request Status Channel 2
-#define DMA_HRS_HRS3			((uint32_t)1<<3)	// Hardware Request Status Channel 3
-#define DMA_HRS_HRS4			((uint32_t)1<<4)	// Hardware Request Status Channel 4
-#define DMA_HRS_HRS5			((uint32_t)1<<5)	// Hardware Request Status Channel 5
-#define DMA_HRS_HRS6			((uint32_t)1<<6)	// Hardware Request Status Channel 6
-#define DMA_HRS_HRS7			((uint32_t)1<<7)	// Hardware Request Status Channel 7
-#define DMA_HRS_HRS8			((uint32_t)1<<8)	// Hardware Request Status Channel 8
-#define DMA_HRS_HRS9			((uint32_t)1<<9)	// Hardware Request Status Channel 9
-#define DMA_HRS_HRS10			((uint32_t)1<<10)	// Hardware Request Status Channel 10
-#define DMA_HRS_HRS11			((uint32_t)1<<11)	// Hardware Request Status Channel 11
-#define DMA_HRS_HRS12			((uint32_t)1<<12)	// Hardware Request Status Channel 12
-#define DMA_HRS_HRS13			((uint32_t)1<<13)	// Hardware Request Status Channel 13
-#define DMA_HRS_HRS14			((uint32_t)1<<14)	// Hardware Request Status Channel 14
-#define DMA_HRS_HRS15			((uint32_t)1<<15)	// Hardware Request Status Channel 15
-#define DMA_DCHPRI3		*(volatile uint8_t  *)0x40008100 // Channel n Priority Register
-#define DMA_DCHPRI2		*(volatile uint8_t  *)0x40008101 // Channel n Priority Register
-#define DMA_DCHPRI1		*(volatile uint8_t  *)0x40008102 // Channel n Priority Register
-#define DMA_DCHPRI0		*(volatile uint8_t  *)0x40008103 // Channel n Priority Register
-#define DMA_DCHPRI_CHPRI(n)		((uint8_t)(n & 15)<<0)	// Channel Arbitration Priority
-#define DMA_DCHPRI_DPA			((uint8_t)1<<6)		// Disable PreEmpt Ability
-#define DMA_DCHPRI_ECP			((uint8_t)1<<7)		// Enable PreEmption
-#define DMA_DCHPRI7		*(volatile uint8_t  *)0x40008104 // Channel n Priority Register
-#define DMA_DCHPRI6		*(volatile uint8_t  *)0x40008105 // Channel n Priority Register
-#define DMA_DCHPRI5		*(volatile uint8_t  *)0x40008106 // Channel n Priority Register
-#define DMA_DCHPRI4		*(volatile uint8_t  *)0x40008107 // Channel n Priority Register
-#define DMA_DCHPRI11		*(volatile uint8_t  *)0x40008108 // Channel n Priority Register
-#define DMA_DCHPRI10		*(volatile uint8_t  *)0x40008109 // Channel n Priority Register
-#define DMA_DCHPRI9		*(volatile uint8_t  *)0x4000810A // Channel n Priority Register
-#define DMA_DCHPRI8		*(volatile uint8_t  *)0x4000810B // Channel n Priority Register
-#define DMA_DCHPRI15		*(volatile uint8_t  *)0x4000810C // Channel n Priority Register
-#define DMA_DCHPRI14		*(volatile uint8_t  *)0x4000810D // Channel n Priority Register
-#define DMA_DCHPRI13		*(volatile uint8_t  *)0x4000810E // Channel n Priority Register
-#define DMA_DCHPRI12		*(volatile uint8_t  *)0x4000810F // Channel n Priority Register
-
-
-#define DMA_TCD_ATTR_SMOD(n)		(((n) & 0x1F) << 11)
-#define DMA_TCD_ATTR_SSIZE(n)		(((n) & 0x7) << 8)
-#define DMA_TCD_ATTR_DMOD(n)		(((n) & 0x1F) << 3)
-#define DMA_TCD_ATTR_DSIZE(n)		(((n) & 0x7) << 0)
-#define DMA_TCD_ATTR_SIZE_8BIT		0
-#define DMA_TCD_ATTR_SIZE_16BIT		1
-#define DMA_TCD_ATTR_SIZE_32BIT		2
-#define DMA_TCD_ATTR_SIZE_16BYTE	4
-#define DMA_TCD_ATTR_SIZE_32BYTE	5
-#define DMA_TCD_CSR_BWC(n)		(((n) & 0x3) << 14)
-#define DMA_TCD_CSR_MAJORLINKCH(n)	(((n) & 0x3) << 8)
-#define DMA_TCD_CSR_DONE		0x0080
-#define DMA_TCD_CSR_ACTIVE		0x0040
-#define DMA_TCD_CSR_MAJORELINK		0x0020
-#define DMA_TCD_CSR_ESG			0x0010
-#define DMA_TCD_CSR_DREQ		0x0008
-#define DMA_TCD_CSR_INTHALF		0x0004
-#define DMA_TCD_CSR_INTMAJOR		0x0002
-#define DMA_TCD_CSR_START		0x0001
-#define DMA_TCD_CITER_MASK		    ((uint16_t)0x7FFF)	   // Loop count mask
-#define DMA_TCD_CITER_ELINK		    ((uint16_t)1<<15)	   // Enable channel linking on minor-loop complete
-#define DMA_TCD_BITER_MASK		    ((uint16_t)0x7FFF)	   // Loop count mask
-#define DMA_TCD_BITER_ELINK		    ((uint16_t)1<<15)	   // Enable channel linking on minor-loop complete
-#define DMA_TCD_NBYTES_SMLOE		    ((uint32_t)1<<31)		    // Source Minor Loop Offset Enable
-#define DMA_TCD_NBYTES_DMLOE		    ((uint32_t)1<<30)		    // Destination Minor Loop Offset Enable
-#define DMA_TCD_NBYTES_MLOFFNO_NBYTES(n)    ((uint32_t)(n))		    // NBytes transfer count when minor loop disabled
-#define DMA_TCD_NBYTES_MLOFFYES_NBYTES(n)   ((uint32_t)(n & 0x1F))	    // NBytes transfer count when minor loop enabled
-#define DMA_TCD_NBYTES_MLOFFYES_MLOFF(n)    ((uint32_t)(n & 0xFFFFF)<<10)   // Offset
-
-#define DMA_TCD0_SADDR		*(volatile const void * volatile *)0x40009000 // TCD Source Address
-#define DMA_TCD0_SOFF		*(volatile int16_t *)0x40009004	 // TCD Signed Source Address Offset
-#define DMA_TCD0_ATTR		*(volatile uint16_t *)0x40009006 // TCD Transfer Attributes
-#define DMA_TCD0_NBYTES_MLNO	*(volatile uint32_t *)0x40009008 // TCD Minor Byte Count (Minor Loop Disabled)
-#define DMA_TCD0_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009008 // TCD Signed Minor Loop Offset (Minor Loop Enabled and Offset Disabled)
-#define DMA_TCD0_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009008 // TCD Signed Minor Loop Offset (Minor Loop and Offset Enabled)
-#define DMA_TCD0_SLAST		*(volatile int32_t *)0x4000900C	 // TCD Last Source Address Adjustment
-#define DMA_TCD0_DADDR		*(volatile void * volatile *)0x40009010 // TCD Destination Address
-#define DMA_TCD0_DOFF		*(volatile int16_t *)0x40009014	 // TCD Signed Destination Address Offset
-#define DMA_TCD0_CITER_ELINKYES *(volatile uint16_t *)0x40009016 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled
-#define DMA_TCD0_CITER_ELINKNO	*(volatile uint16_t *)0x40009016 // ??
-#define DMA_TCD0_DLASTSGA	*(volatile int32_t *)0x40009018	 // TCD Last Destination Address Adjustment/Scatter Gather Address
-#define DMA_TCD0_CSR		*(volatile uint16_t *)0x4000901C // TCD Control and Status
-#define DMA_TCD0_BITER_ELINKYES *(volatile uint16_t *)0x4000901E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Enabled
-#define DMA_TCD0_BITER_ELINKNO	*(volatile uint16_t *)0x4000901E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled
-
-#define DMA_TCD1_SADDR		*(volatile const void * volatile *)0x40009020 // TCD Source Address
-#define DMA_TCD1_SOFF		*(volatile int16_t *)0x40009024	 // TCD Signed Source Address Offset
-#define DMA_TCD1_ATTR		*(volatile uint16_t *)0x40009026 // TCD Transfer Attributes
-#define DMA_TCD1_NBYTES_MLNO	*(volatile uint32_t *)0x40009028 // TCD Minor Byte Count, Minor Loop Disabled
-#define DMA_TCD1_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009028 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled
-#define DMA_TCD1_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009028 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled
-#define DMA_TCD1_SLAST		*(volatile int32_t *)0x4000902C	 // TCD Last Source Address Adjustment
-#define DMA_TCD1_DADDR		*(volatile void * volatile *)0x40009030 // TCD Destination Address
-#define DMA_TCD1_DOFF		*(volatile int16_t *)0x40009034	 // TCD Signed Destination Address Offset
-#define DMA_TCD1_CITER_ELINKYES *(volatile uint16_t *)0x40009036 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled
-#define DMA_TCD1_CITER_ELINKNO	*(volatile uint16_t *)0x40009036 // ??
-#define DMA_TCD1_DLASTSGA	*(volatile int32_t *)0x40009038	 // TCD Last Destination Address Adjustment/Scatter Gather Address
-#define DMA_TCD1_CSR		*(volatile uint16_t *)0x4000903C // TCD Control and Status
-#define DMA_TCD1_BITER_ELINKYES *(volatile uint16_t *)0x4000903E // TCD Beginning Minor Loop Link, Major Loop Count Channel Linking Enabled
-#define DMA_TCD1_BITER_ELINKNO	*(volatile uint16_t *)0x4000903E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled
-
-#define DMA_TCD2_SADDR		*(volatile const void * volatile *)0x40009040 // TCD Source Address
-#define DMA_TCD2_SOFF		*(volatile int16_t *)0x40009044	 // TCD Signed Source Address Offset
-#define DMA_TCD2_ATTR		*(volatile uint16_t *)0x40009046 // TCD Transfer Attributes
-#define DMA_TCD2_NBYTES_MLNO	*(volatile uint32_t *)0x40009048 // TCD Minor Byte Count, Minor Loop Disabled
-#define DMA_TCD2_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009048 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled
-#define DMA_TCD2_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009048 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled
-#define DMA_TCD2_SLAST		*(volatile int32_t *)0x4000904C	 // TCD Last Source Address Adjustment
-#define DMA_TCD2_DADDR		*(volatile void * volatile *)0x40009050 // TCD Destination Address
-#define DMA_TCD2_DOFF		*(volatile int16_t *)0x40009054	 // TCD Signed Destination Address Offset
-#define DMA_TCD2_CITER_ELINKYES *(volatile uint16_t *)0x40009056 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled
-#define DMA_TCD2_CITER_ELINKNO	*(volatile uint16_t *)0x40009056 // ??
-#define DMA_TCD2_DLASTSGA	*(volatile int32_t *)0x40009058	 // TCD Last Destination Address Adjustment/Scatter Gather Address
-#define DMA_TCD2_CSR		*(volatile uint16_t *)0x4000905C // TCD Control and Status
-#define DMA_TCD2_BITER_ELINKYES *(volatile uint16_t *)0x4000905E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Enabled
-#define DMA_TCD2_BITER_ELINKNO	*(volatile uint16_t *)0x4000905E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled
-
-#define DMA_TCD3_SADDR		*(volatile const void * volatile *)0x40009060 // TCD Source Address
-#define DMA_TCD3_SOFF		*(volatile int16_t *)0x40009064	 // TCD Signed Source Address Offset
-#define DMA_TCD3_ATTR		*(volatile uint16_t *)0x40009066 // TCD Transfer Attributes
-#define DMA_TCD3_NBYTES_MLNO	*(volatile uint32_t *)0x40009068 // TCD Minor Byte Count, Minor Loop Disabled
-#define DMA_TCD3_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009068 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled
-#define DMA_TCD3_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009068 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled
-#define DMA_TCD3_SLAST		*(volatile int32_t *)0x4000906C	 // TCD Last Source Address Adjustment
-#define DMA_TCD3_DADDR		*(volatile void * volatile *)0x40009070 // TCD Destination Address
-#define DMA_TCD3_DOFF		*(volatile int16_t *)0x40009074	 // TCD Signed Destination Address Offset
-#define DMA_TCD3_CITER_ELINKYES *(volatile uint16_t *)0x40009076 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled
-#define DMA_TCD3_CITER_ELINKNO	*(volatile uint16_t *)0x40009076 // ??
-#define DMA_TCD3_DLASTSGA	*(volatile int32_t *)0x40009078	 // TCD Last Destination Address Adjustment/Scatter Gather Address
-#define DMA_TCD3_CSR		*(volatile uint16_t *)0x4000907C // TCD Control and Status
-#define DMA_TCD3_BITER_ELINKYES *(volatile uint16_t *)0x4000907E // TCD Beginning Minor Loop Link, Major Loop Count ,Channel Linking Enabled
-#define DMA_TCD3_BITER_ELINKNO	*(volatile uint16_t *)0x4000907E // TCD Beginning Minor Loop Link, Major Loop Count ,Channel Linking Disabled
-
-#define DMA_TCD4_SADDR		*(volatile const void * volatile *)0x40009080 // TCD Source Addr
-#define DMA_TCD4_SOFF		*(volatile int16_t *)0x40009084	 // TCD Signed Source Address Offset
-#define DMA_TCD4_ATTR		*(volatile uint16_t *)0x40009086 // TCD Transfer Attributes
-#define DMA_TCD4_NBYTES_MLNO	*(volatile uint32_t *)0x40009088 // TCD Minor Byte Count
-#define DMA_TCD4_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009088 // TCD Signed Minor Loop Offset
-#define DMA_TCD4_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009088 // TCD Signed Minor Loop Offset
-#define DMA_TCD4_SLAST		*(volatile int32_t *)0x4000908C	 // TCD Last Source Addr Adj.
-#define DMA_TCD4_DADDR		*(volatile void * volatile *)0x40009090 // TCD Destination Address
-#define DMA_TCD4_DOFF		*(volatile int16_t *)0x40009094	 // TCD Signed Dest Address Offset
-#define DMA_TCD4_CITER_ELINKYES *(volatile uint16_t *)0x40009096 // TCD Current Minor Loop Link
-#define DMA_TCD4_CITER_ELINKNO	*(volatile uint16_t *)0x40009096 // ??
-#define DMA_TCD4_DLASTSGA	*(volatile int32_t *)0x40009098	 // TCD Last Destination Addr Adj
-#define DMA_TCD4_CSR		*(volatile uint16_t *)0x4000909C // TCD Control and Status
-#define DMA_TCD4_BITER_ELINKYES *(volatile uint16_t *)0x4000909E // TCD Beginning Minor Loop Link
-#define DMA_TCD4_BITER_ELINKNO	*(volatile uint16_t *)0x4000909E // TCD Beginning Minor Loop Link
-
-#define DMA_TCD5_SADDR		*(volatile const void * volatile *)0x400090A0 // TCD Source Addr
-#define DMA_TCD5_SOFF		*(volatile int16_t *)0x400090A4	 // TCD Signed Source Address Offset
-#define DMA_TCD5_ATTR		*(volatile uint16_t *)0x400090A6 // TCD Transfer Attributes
-#define DMA_TCD5_NBYTES_MLNO	*(volatile uint32_t *)0x400090A8 // TCD Minor Byte Count
-#define DMA_TCD5_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090A8 // TCD Signed Minor Loop Offset
-#define DMA_TCD5_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090A8 // TCD Signed Minor Loop Offset
-#define DMA_TCD5_SLAST		*(volatile int32_t *)0x400090AC	 // TCD Last Source Addr Adj.
-#define DMA_TCD5_DADDR		*(volatile void * volatile *)0x400090B0 // TCD Destination Address
-#define DMA_TCD5_DOFF		*(volatile int16_t *)0x400090B4	 // TCD Signed Dest Address Offset
-#define DMA_TCD5_CITER_ELINKYES *(volatile uint16_t *)0x400090B6 // TCD Current Minor Loop Link
-#define DMA_TCD5_CITER_ELINKNO	*(volatile uint16_t *)0x400090B6 // ??
-#define DMA_TCD5_DLASTSGA	*(volatile int32_t *)0x400090B8	 // TCD Last Destination Addr Adj
-#define DMA_TCD5_CSR		*(volatile uint16_t *)0x400090BC // TCD Control and Status
-#define DMA_TCD5_BITER_ELINKYES *(volatile uint16_t *)0x400090BE // TCD Beginning Minor Loop Link
-#define DMA_TCD5_BITER_ELINKNO	*(volatile uint16_t *)0x400090BE // TCD Beginning Minor Loop Link
-
-#define DMA_TCD6_SADDR		*(volatile const void * volatile *)0x400090C0 // TCD Source Addr
-#define DMA_TCD6_SOFF		*(volatile int16_t *)0x400090C4	 // TCD Signed Source Address Offset
-#define DMA_TCD6_ATTR		*(volatile uint16_t *)0x400090C6 // TCD Transfer Attributes
-#define DMA_TCD6_NBYTES_MLNO	*(volatile uint32_t *)0x400090C8 // TCD Minor Byte Count
-#define DMA_TCD6_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090C8 // TCD Signed Minor Loop Offset
-#define DMA_TCD6_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090C8 // TCD Signed Minor Loop Offset
-#define DMA_TCD6_SLAST		*(volatile int32_t *)0x400090CC	 // TCD Last Source Addr Adj.
-#define DMA_TCD6_DADDR		*(volatile void * volatile *)0x400090D0 // TCD Destination Address
-#define DMA_TCD6_DOFF		*(volatile int16_t *)0x400090D4	 // TCD Signed Dest Address Offset
-#define DMA_TCD6_CITER_ELINKYES *(volatile uint16_t *)0x400090D6 // TCD Current Minor Loop Link
-#define DMA_TCD6_CITER_ELINKNO	*(volatile uint16_t *)0x400090D6 // ??
-#define DMA_TCD6_DLASTSGA	*(volatile int32_t *)0x400090D8	 // TCD Last Destination Addr Adj
-#define DMA_TCD6_CSR		*(volatile uint16_t *)0x400090DC // TCD Control and Status
-#define DMA_TCD6_BITER_ELINKYES *(volatile uint16_t *)0x400090DE // TCD Beginning Minor Loop Link
-#define DMA_TCD6_BITER_ELINKNO	*(volatile uint16_t *)0x400090DE // TCD Beginning Minor Loop Link
-
-#define DMA_TCD7_SADDR		*(volatile const void * volatile *)0x400090E0 // TCD Source Addr
-#define DMA_TCD7_SOFF		*(volatile int16_t *)0x400090E4	 // TCD Signed Source Address Offset
-#define DMA_TCD7_ATTR		*(volatile uint16_t *)0x400090E6 // TCD Transfer Attributes
-#define DMA_TCD7_NBYTES_MLNO	*(volatile uint32_t *)0x400090E8 // TCD Minor Byte Count
-#define DMA_TCD7_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090E8 // TCD Signed Minor Loop Offset
-#define DMA_TCD7_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090E8 // TCD Signed Minor Loop Offset
-#define DMA_TCD7_SLAST		*(volatile int32_t *)0x400090EC	 // TCD Last Source Addr Adj.
-#define DMA_TCD7_DADDR		*(volatile void * volatile *)0x400090F0 // TCD Destination Address
-#define DMA_TCD7_DOFF		*(volatile int16_t *)0x400090F4	 // TCD Signed Dest Address Offset
-#define DMA_TCD7_CITER_ELINKYES *(volatile uint16_t *)0x400090F6 // TCD Current Minor Loop Link
-#define DMA_TCD7_CITER_ELINKNO	*(volatile uint16_t *)0x400090F6 // ??
-#define DMA_TCD7_DLASTSGA	*(volatile int32_t *)0x400090F8	 // TCD Last Destination Addr Adj
-#define DMA_TCD7_CSR		*(volatile uint16_t *)0x400090FC // TCD Control and Status
-#define DMA_TCD7_BITER_ELINKYES *(volatile uint16_t *)0x400090FE // TCD Beginning Minor Loop Link
-#define DMA_TCD7_BITER_ELINKNO	*(volatile uint16_t *)0x400090FE // TCD Beginning Minor Loop Link
-
-#define DMA_TCD8_SADDR		*(volatile const void * volatile *)0x40009100 // TCD Source Addr
-#define DMA_TCD8_SOFF		*(volatile int16_t *)0x40009104	 // TCD Signed Source Address Offset
-#define DMA_TCD8_ATTR		*(volatile uint16_t *)0x40009106 // TCD Transfer Attributes
-#define DMA_TCD8_NBYTES_MLNO	*(volatile uint32_t *)0x40009108 // TCD Minor Byte Count
-#define DMA_TCD8_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009108 // TCD Signed Minor Loop Offset
-#define DMA_TCD8_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009108 // TCD Signed Minor Loop Offset
-#define DMA_TCD8_SLAST		*(volatile int32_t *)0x4000910C	 // TCD Last Source Addr Adj.
-#define DMA_TCD8_DADDR		*(volatile void * volatile *)0x40009110 // TCD Destination Address
-#define DMA_TCD8_DOFF		*(volatile int16_t *)0x40009114	 // TCD Signed Dest Address Offset
-#define DMA_TCD8_CITER_ELINKYES *(volatile uint16_t *)0x40009116 // TCD Current Minor Loop Link
-#define DMA_TCD8_CITER_ELINKNO	*(volatile uint16_t *)0x40009116 // ??
-#define DMA_TCD8_DLASTSGA	*(volatile int32_t *)0x40009118	 // TCD Last Destination Addr Adj
-#define DMA_TCD8_CSR		*(volatile uint16_t *)0x4000911C // TCD Control and Status
-#define DMA_TCD8_BITER_ELINKYES *(volatile uint16_t *)0x4000911E // TCD Beginning Minor Loop Link
-#define DMA_TCD8_BITER_ELINKNO	*(volatile uint16_t *)0x4000911E // TCD Beginning Minor Loop Link
-
-#define DMA_TCD9_SADDR		*(volatile const void * volatile *)0x40009120 // TCD Source Addr
-#define DMA_TCD9_SOFF		*(volatile int16_t *)0x40009124	 // TCD Signed Source Address Offset
-#define DMA_TCD9_ATTR		*(volatile uint16_t *)0x40009126 // TCD Transfer Attributes
-#define DMA_TCD9_NBYTES_MLNO	*(volatile uint32_t *)0x40009128 // TCD Minor Byte Count
-#define DMA_TCD9_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009128 // TCD Signed Minor Loop Offset
-#define DMA_TCD9_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009128 // TCD Signed Minor Loop Offset
-#define DMA_TCD9_SLAST		*(volatile int32_t *)0x4000912C	 // TCD Last Source Addr Adj.
-#define DMA_TCD9_DADDR		*(volatile void * volatile *)0x40009130 // TCD Destination Address
-#define DMA_TCD9_DOFF		*(volatile int16_t *)0x40009134	 // TCD Signed Dest Address Offset
-#define DMA_TCD9_CITER_ELINKYES *(volatile uint16_t *)0x40009136 // TCD Current Minor Loop Link
-#define DMA_TCD9_CITER_ELINKNO	*(volatile uint16_t *)0x40009136 // ??
-#define DMA_TCD9_DLASTSGA	*(volatile int32_t *)0x40009138	 // TCD Last Destination Addr Adj
-#define DMA_TCD9_CSR		*(volatile uint16_t *)0x4000913C // TCD Control and Status
-#define DMA_TCD9_BITER_ELINKYES *(volatile uint16_t *)0x4000913E // TCD Beginning Minor Loop Link
-#define DMA_TCD9_BITER_ELINKNO	*(volatile uint16_t *)0x4000913E // TCD Beginning Minor Loop Link
-
-#define DMA_TCD10_SADDR		*(volatile const void * volatile *)0x40009140 // TCD Source Addr
-#define DMA_TCD10_SOFF		*(volatile int16_t *)0x40009144	 // TCD Signed Source Address Offset
-#define DMA_TCD10_ATTR		*(volatile uint16_t *)0x40009146 // TCD Transfer Attributes
-#define DMA_TCD10_NBYTES_MLNO	*(volatile uint32_t *)0x40009148 // TCD Minor Byte Count
-#define DMA_TCD10_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009148 // TCD Signed Minor Loop Offset
-#define DMA_TCD10_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009148 // TCD Signed Minor Loop Offset
-#define DMA_TCD10_SLAST		*(volatile int32_t *)0x4000914C	 // TCD Last Source Addr Adj.
-#define DMA_TCD10_DADDR		*(volatile void * volatile *)0x40009150 // TCD Destination Address
-#define DMA_TCD10_DOFF		*(volatile int16_t *)0x40009154	 // TCD Signed Dest Address Offset
-#define DMA_TCD10_CITER_ELINKYES *(volatile uint16_t *)0x40009156 // TCD Current Minor Loop Link
-#define DMA_TCD10_CITER_ELINKNO	*(volatile uint16_t *)0x40009156 // ??
-#define DMA_TCD10_DLASTSGA	*(volatile int32_t *)0x40009158	 // TCD Last Destination Addr Adj
-#define DMA_TCD10_CSR		*(volatile uint16_t *)0x4000915C // TCD Control and Status
-#define DMA_TCD10_BITER_ELINKYES *(volatile uint16_t *)0x4000915E // TCD Beginning Minor Loop Link
-#define DMA_TCD10_BITER_ELINKNO	*(volatile uint16_t *)0x4000915E // TCD Beginning Minor Loop Link
-
-#define DMA_TCD11_SADDR		*(volatile const void * volatile *)0x40009160 // TCD Source Addr
-#define DMA_TCD11_SOFF		*(volatile int16_t *)0x40009164	 // TCD Signed Source Address Offset
-#define DMA_TCD11_ATTR		*(volatile uint16_t *)0x40009166 // TCD Transfer Attributes
-#define DMA_TCD11_NBYTES_MLNO	*(volatile uint32_t *)0x40009168 // TCD Minor Byte Count
-#define DMA_TCD11_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009168 // TCD Signed Minor Loop Offset
-#define DMA_TCD11_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009168 // TCD Signed Minor Loop Offset
-#define DMA_TCD11_SLAST		*(volatile int32_t *)0x4000916C	 // TCD Last Source Addr Adj.
-#define DMA_TCD11_DADDR		*(volatile void * volatile *)0x40009170 // TCD Destination Address
-#define DMA_TCD11_DOFF		*(volatile int16_t *)0x40009174	 // TCD Signed Dest Address Offset
-#define DMA_TCD11_CITER_ELINKYES *(volatile uint16_t *)0x40009176 // TCD Current Minor Loop Link
-#define DMA_TCD11_CITER_ELINKNO	*(volatile uint16_t *)0x40009176 // ??
-#define DMA_TCD11_DLASTSGA	*(volatile int32_t *)0x40009178	 // TCD Last Destination Addr Adj
-#define DMA_TCD11_CSR		*(volatile uint16_t *)0x4000917C // TCD Control and Status
-#define DMA_TCD11_BITER_ELINKYES *(volatile uint16_t *)0x4000917E // TCD Beginning Minor Loop Link
-#define DMA_TCD11_BITER_ELINKNO	*(volatile uint16_t *)0x4000917E // TCD Beginning Minor Loop Link
-
-#define DMA_TCD12_SADDR		*(volatile const void * volatile *)0x40009180 // TCD Source Addr
-#define DMA_TCD12_SOFF		*(volatile int16_t *)0x40009184	 // TCD Signed Source Address Offset
-#define DMA_TCD12_ATTR		*(volatile uint16_t *)0x40009186 // TCD Transfer Attributes
-#define DMA_TCD12_NBYTES_MLNO	*(volatile uint32_t *)0x40009188 // TCD Minor Byte Count
-#define DMA_TCD12_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009188 // TCD Signed Minor Loop Offset
-#define DMA_TCD12_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009188 // TCD Signed Minor Loop Offset
-#define DMA_TCD12_SLAST		*(volatile int32_t *)0x4000918C	 // TCD Last Source Addr Adj.
-#define DMA_TCD12_DADDR		*(volatile void * volatile *)0x40009190 // TCD Destination Address
-#define DMA_TCD12_DOFF		*(volatile int16_t *)0x40009194	 // TCD Signed Dest Address Offset
-#define DMA_TCD12_CITER_ELINKYES *(volatile uint16_t *)0x40009196 // TCD Current Minor Loop Link
-#define DMA_TCD12_CITER_ELINKNO	*(volatile uint16_t *)0x40009196 // ??
-#define DMA_TCD12_DLASTSGA	*(volatile int32_t *)0x40009198	 // TCD Last Destination Addr Adj
-#define DMA_TCD12_CSR		*(volatile uint16_t *)0x4000919C // TCD Control and Status
-#define DMA_TCD12_BITER_ELINKYES *(volatile uint16_t *)0x4000919E // TCD Beginning Minor Loop Link
-#define DMA_TCD12_BITER_ELINKNO	*(volatile uint16_t *)0x4000919E // TCD Beginning Minor Loop Link
-
-#define DMA_TCD13_SADDR		*(volatile const void * volatile *)0x400091A0 // TCD Source Addr
-#define DMA_TCD13_SOFF		*(volatile int16_t *)0x400091A4	 // TCD Signed Source Address Offset
-#define DMA_TCD13_ATTR		*(volatile uint16_t *)0x400091A6 // TCD Transfer Attributes
-#define DMA_TCD13_NBYTES_MLNO	*(volatile uint32_t *)0x400091A8 // TCD Minor Byte Count
-#define DMA_TCD13_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091A8 // TCD Signed Minor Loop Offset
-#define DMA_TCD13_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091A8 // TCD Signed Minor Loop Offset
-#define DMA_TCD13_SLAST		*(volatile int32_t *)0x400091AC	 // TCD Last Source Addr Adj.
-#define DMA_TCD13_DADDR		*(volatile void * volatile *)0x400091B0 // TCD Destination Address
-#define DMA_TCD13_DOFF		*(volatile int16_t *)0x400091B4	 // TCD Signed Dest Address Offset
-#define DMA_TCD13_CITER_ELINKYES *(volatile uint16_t *)0x400091B6 // TCD Current Minor Loop Link
-#define DMA_TCD13_CITER_ELINKNO	*(volatile uint16_t *)0x400091B6 // ??
-#define DMA_TCD13_DLASTSGA	*(volatile int32_t *)0x400091B8	 // TCD Last Destination Addr Adj
-#define DMA_TCD13_CSR		*(volatile uint16_t *)0x400091BC // TCD Control and Status
-#define DMA_TCD13_BITER_ELINKYES *(volatile uint16_t *)0x400091BE // TCD Beginning Minor Loop Link
-#define DMA_TCD13_BITER_ELINKNO	*(volatile uint16_t *)0x400091BE // TCD Beginning Minor Loop Link
-
-#define DMA_TCD14_SADDR		*(volatile const void * volatile *)0x400091C0 // TCD Source Addr
-#define DMA_TCD14_SOFF		*(volatile int16_t *)0x400091C4	 // TCD Signed Source Address Offset
-#define DMA_TCD14_ATTR		*(volatile uint16_t *)0x400091C6 // TCD Transfer Attributes
-#define DMA_TCD14_NBYTES_MLNO	*(volatile uint32_t *)0x400091C8 // TCD Minor Byte Count
-#define DMA_TCD14_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091C8 // TCD Signed Minor Loop Offset
-#define DMA_TCD14_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091C8 // TCD Signed Minor Loop Offset
-#define DMA_TCD14_SLAST		*(volatile int32_t *)0x400091CC	 // TCD Last Source Addr Adj.
-#define DMA_TCD14_DADDR		*(volatile void * volatile *)0x400091D0 // TCD Destination Address
-#define DMA_TCD14_DOFF		*(volatile int16_t *)0x400091D4	 // TCD Signed Dest Address Offset
-#define DMA_TCD14_CITER_ELINKYES *(volatile uint16_t *)0x400091D6 // TCD Current Minor Loop Link
-#define DMA_TCD14_CITER_ELINKNO	*(volatile uint16_t *)0x400091D6 // ??
-#define DMA_TCD14_DLASTSGA	*(volatile int32_t *)0x400091D8	 // TCD Last Destination Addr Adj
-#define DMA_TCD14_CSR		*(volatile uint16_t *)0x400091DC // TCD Control and Status
-#define DMA_TCD14_BITER_ELINKYES *(volatile uint16_t *)0x400091DE // TCD Beginning Minor Loop Link
-#define DMA_TCD14_BITER_ELINKNO	*(volatile uint16_t *)0x400091DE // TCD Beginning Minor Loop Link
-
-#define DMA_TCD15_SADDR		*(volatile const void * volatile *)0x400091E0 // TCD Source Addr
-#define DMA_TCD15_SOFF		*(volatile int16_t *)0x400091E4	 // TCD Signed Source Address Offset
-#define DMA_TCD15_ATTR		*(volatile uint16_t *)0x400091E6 // TCD Transfer Attributes
-#define DMA_TCD15_NBYTES_MLNO	*(volatile uint32_t *)0x400091E8 // TCD Minor Byte Count
-#define DMA_TCD15_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091E8 // TCD Signed Minor Loop Offset
-#define DMA_TCD15_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091E8 // TCD Signed Minor Loop Offset
-#define DMA_TCD15_SLAST		*(volatile int32_t *)0x400091EC	 // TCD Last Source Addr Adj.
-#define DMA_TCD15_DADDR		*(volatile void * volatile *)0x400091F0 // TCD Destination Address
-#define DMA_TCD15_DOFF		*(volatile int16_t *)0x400091F4	 // TCD Signed Dest Address Offset
-#define DMA_TCD15_CITER_ELINKYES *(volatile uint16_t *)0x400091F6 // TCD Current Minor Loop Link
-#define DMA_TCD15_CITER_ELINKNO	*(volatile uint16_t *)0x400091F6 // ??
-#define DMA_TCD15_DLASTSGA	*(volatile int32_t *)0x400091F8	 // TCD Last Destination Addr Adj
-#define DMA_TCD15_CSR		*(volatile uint16_t *)0x400091FC // TCD Control and Status
-#define DMA_TCD15_BITER_ELINKYES *(volatile uint16_t *)0x400091FE // TCD Beginning Minor Loop Link
-#define DMA_TCD15_BITER_ELINKNO	*(volatile uint16_t *)0x400091FE // TCD Beginning Minor Loop Link
-
-
-// Chapter 22: External Watchdog Monitor (EWM)
-#define EWM_CTRL		*(volatile uint8_t  *)0x40061000 // Control Register
-#define EWM_SERV		*(volatile uint8_t  *)0x40061001 // Service Register
-#define EWM_CMPL		*(volatile uint8_t  *)0x40061002 // Compare Low Register
-#define EWM_CMPH		*(volatile uint8_t  *)0x40061003 // Compare High Register
-
-// Chapter 23: Watchdog Timer (WDOG)
-#define WDOG_STCTRLH		*(volatile uint16_t *)0x40052000 // Watchdog Status and Control Register High
-#define WDOG_STCTRLH_DISTESTWDOG	(uint16_t)0x4000		// Allows the WDOG's functional test mode to be disabled permanently.
-#define WDOG_STCTRLH_BYTESEL(n)		(uint16_t)(((n) & 3) << 12)	// selects the byte to be tested when the watchdog is in the byte test mode.
-#define WDOG_STCTRLH_TESTSEL		(uint16_t)0x0800
-#define WDOG_STCTRLH_TESTWDOG		(uint16_t)0x0400
-#define WDOG_STCTRLH_WAITEN		(uint16_t)0x0080
-#define WDOG_STCTRLH_STOPEN		(uint16_t)0x0040
-#define WDOG_STCTRLH_DBGEN		(uint16_t)0x0020
-#define WDOG_STCTRLH_ALLOWUPDATE	(uint16_t)0x0010
-#define WDOG_STCTRLH_WINEN		(uint16_t)0x0008
-#define WDOG_STCTRLH_IRQRSTEN		(uint16_t)0x0004
-#define WDOG_STCTRLH_CLKSRC		(uint16_t)0x0002
-#define WDOG_STCTRLH_WDOGEN		(uint16_t)0x0001
-#define WDOG_STCTRLL		*(volatile uint16_t *)0x40052002 // Watchdog Status and Control Register Low
-#define WDOG_TOVALH		*(volatile uint16_t *)0x40052004 // Watchdog Time-out Value Register High
-#define WDOG_TOVALL		*(volatile uint16_t *)0x40052006 // Watchdog Time-out Value Register Low
-#define WDOG_WINH		*(volatile uint16_t *)0x40052008 // Watchdog Window Register High
-#define WDOG_WINL		*(volatile uint16_t *)0x4005200A // Watchdog Window Register Low
-#define WDOG_REFRESH		*(volatile uint16_t *)0x4005200C // Watchdog Refresh register
-#define WDOG_UNLOCK		*(volatile uint16_t *)0x4005200E // Watchdog Unlock register
-#define WDOG_UNLOCK_SEQ1		(uint16_t)0xC520
-#define WDOG_UNLOCK_SEQ2		(uint16_t)0xD928
-#define WDOG_TMROUTH		*(volatile uint16_t *)0x40052010 // Watchdog Timer Output Register High
-#define WDOG_TMROUTL		*(volatile uint16_t *)0x40052012 // Watchdog Timer Output Register Low
-#define WDOG_RSTCNT		*(volatile uint16_t *)0x40052014 // Watchdog Reset Count register
-#define WDOG_PRESC		*(volatile uint16_t *)0x40052016 // Watchdog Prescaler register
-
-// Chapter 24: Multipurpose Clock Generator (MCG)
-#define MCG_C1			*(volatile uint8_t  *)0x40064000 // MCG Control 1 Register
-#define MCG_C1_IREFSTEN			(uint8_t)0x01			// Internal Reference Stop Enable, Controls whether or not the internal reference clock remains enabled when the MCG enters Stop mode.
-#define MCG_C1_IRCLKEN			(uint8_t)0x02			// Internal Reference Clock Enable, Enables the internal reference clock for use as MCGIRCLK.
-#define MCG_C1_IREFS			(uint8_t)0x04			// Internal Reference Select, Selects the reference clock source for the FLL.
-#define MCG_C1_FRDIV(n)			(uint8_t)(((n) & 0x07) << 3)	// FLL External Reference Divider, Selects the amount to divide down the external reference clock for the FLL
-#define MCG_C1_CLKS(n)			(uint8_t)(((n) & 0x03) << 6)	// Clock Source Select, Selects the clock source for MCGOUTCLK
-#define MCG_C2			*(volatile uint8_t  *)0x40064001 // MCG Control 2 Register
-#define MCG_C2_IRCS			(uint8_t)0x01			// Internal Reference Clock Select, Selects between the fast or slow internal reference clock source.
-#define MCG_C2_LP			(uint8_t)0x02			// Low Power Select, Controls whether the FLL or PLL is disabled in BLPI and BLPE modes.
-#define MCG_C2_EREFS			(uint8_t)0x04			// External Reference Select, Selects the source for the external reference clock.
-#define MCG_C2_HGO0			(uint8_t)0x08			// High Gain Oscillator Select, Controls the crystal oscillator mode of operation
-#define MCG_C2_RANGE0(n)		(uint8_t)(((n) & 0x03) << 4)	// Frequency Range Select, Selects the frequency range for the crystal oscillator
-#define MCG_C2_LOCRE0			(uint8_t)0x80			// Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0
-#define MCG_C3			*(volatile uint8_t  *)0x40064002 // MCG Control 3 Register
-#define MCG_C3_SCTRIM(n)		(uint8_t)(n)			// Slow Internal Reference Clock Trim Setting
-#define MCG_C4			*(volatile uint8_t  *)0x40064003 // MCG Control 4 Register
-#define MCG_C4_SCFTRIM			(uint8_t)0x01			// Slow Internal Reference Clock Fine Trim
-#define MCG_C4_FCTRIM(n)		(uint8_t)(((n) & 0x0F) << 1)	// Fast Internal Reference Clock Trim Setting
-#define MCG_C4_DRST_DRS(n)		(uint8_t)(((n) & 0x03) << 5)	// DCO Range Select
-#define MCG_C4_DMX32			(uint8_t)0x80			// DCO Maximum Frequency with 32.768 kHz Reference, controls whether the DCO frequency range is narrowed
-#define MCG_C5			*(volatile uint8_t  *)0x40064004 // MCG Control 5 Register
-#define MCG_C5_PRDIV0(n)		(uint8_t)((n) & 0x1F)		// PLL External Reference Divider
-#define MCG_C5_PLLSTEN0			(uint8_t)0x20			// PLL Stop Enable
-#define MCG_C5_PLLCLKEN0		(uint8_t)0x40			// PLL Clock Enable
-#define MCG_C6			*(volatile uint8_t  *)0x40064005 // MCG Control 6 Register
-#define MCG_C6_VDIV0(n)			(uint8_t)((n) & 0x1F)		// VCO 0 Divider
-#define MCG_C6_CME0			(uint8_t)0x20			// Clock Monitor Enable
-#define MCG_C6_PLLS			(uint8_t)0x40			// PLL Select, Controls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00.
-#define MCG_C6_LOLIE0			(uint8_t)0x80			// Loss of Lock Interrupt Enable
-#define MCG_S			*(volatile uint8_t  *)0x40064006 // MCG Status Register
-#define MCG_S_IRCST			(uint8_t)0x01			// Internal Reference Clock Status
-#define MCG_S_OSCINIT0			(uint8_t)0x02			// OSC Initialization,	resets to 0, is set to 1 after the initialization cycles of the crystal oscillator
-#define MCG_S_CLKST(n)			(uint8_t)(((n) & 0x03) << 2)	// Clock Mode Status, 0=FLL is selected, 1= Internal ref, 2=External ref, 3=PLL
-#define MCG_S_CLKST_MASK		(uint8_t)0x0C
-#define MCG_S_IREFST			(uint8_t)0x10			// Internal Reference Status
-#define MCG_S_PLLST			(uint8_t)0x20			// PLL Select Status
-#define MCG_S_LOCK0			(uint8_t)0x40			// Lock Status, 0=PLL Unlocked, 1=PLL Locked
-#define MCG_S_LOLS0			(uint8_t)0x80			// Loss of Lock Status
-#define MCG_SC			*(volatile uint8_t  *)0x40064008 // MCG Status and Control Register
-#define MCG_SC_LOCS0			(uint8_t)0x01			// OSC0 Loss of Clock Status
-#define MCG_SC_FCRDIV(n)		(uint8_t)(((n) & 0x07) << 1)	// Fast Clock Internal Reference Divider
-#define MCG_SC_FLTPRSRV			(uint8_t)0x10			// FLL Filter Preserve Enable
-#define MCG_SC_ATMF			(uint8_t)0x20			// Automatic Trim Machine Fail Flag
-#define MCG_SC_ATMS			(uint8_t)0x40			// Automatic Trim Machine Select
-#define MCG_SC_ATME			(uint8_t)0x80			// Automatic Trim Machine Enable
-#define MCG_ATCVH		*(volatile uint8_t  *)0x4006400A // MCG Auto Trim Compare Value High Register
-#define MCG_ATCVL		*(volatile uint8_t  *)0x4006400B // MCG Auto Trim Compare Value Low Register
-#define MCG_C7			*(volatile uint8_t  *)0x4006400C // MCG Control 7 Register
-#define MCG_C8			*(volatile uint8_t  *)0x4006400D // MCG Control 8 Register
-
-// Chapter 25: Oscillator (OSC)
-#define OSC0_CR			*(volatile uint8_t  *)0x40065000 // OSC Control Register
-#define OSC_SC16P			(uint8_t)0x01			// Oscillator 16 pF Capacitor Load Configure
-#define OSC_SC8P			(uint8_t)0x02			// Oscillator 8 pF Capacitor Load Configure
-#define OSC_SC4P			(uint8_t)0x04			// Oscillator 4 pF Capacitor Load Configure
-#define OSC_SC2P			(uint8_t)0x08			// Oscillator 2 pF Capacitor Load Configure
-#define OSC_EREFSTEN			(uint8_t)0x20			// External Reference Stop Enable, Controls whether or not the external reference clock (OSCERCLK) remains enabled when MCU enters Stop mode.
-#define OSC_ERCLKEN			(uint8_t)0x80			// External Reference Enable, Enables external reference clock (OSCERCLK).
-
-// Chapter 27: Flash Memory Controller (FMC)
-#define FMC_PFAPR		*(volatile uint32_t *)0x4001F000	// Flash Access Protection
-#define FMC_PFB0CR		*(volatile uint32_t *)0x4001F004	// Flash Control
-#define FMC_TAGVDW0S0		*(volatile uint32_t *)0x4001F100	// Cache Tag Storage
-#define FMC_TAGVDW0S1		*(volatile uint32_t *)0x4001F104	// Cache Tag Storage
-#define FMC_TAGVDW1S0		*(volatile uint32_t *)0x4001F108	// Cache Tag Storage
-#define FMC_TAGVDW1S1		*(volatile uint32_t *)0x4001F10C	// Cache Tag Storage
-#define FMC_TAGVDW2S0		*(volatile uint32_t *)0x4001F110	// Cache Tag Storage
-#define FMC_TAGVDW2S1		*(volatile uint32_t *)0x4001F114	// Cache Tag Storage
-#define FMC_TAGVDW3S0		*(volatile uint32_t *)0x4001F118	// Cache Tag Storage
-#define FMC_TAGVDW3S1		*(volatile uint32_t *)0x4001F11C	// Cache Tag Storage
-#define FMC_DATAW0S0		*(volatile uint32_t *)0x4001F200	// Cache Data Storage
-#define FMC_DATAW0S1		*(volatile uint32_t *)0x4001F204	// Cache Data Storage
-#define FMC_DATAW1S0		*(volatile uint32_t *)0x4001F208	// Cache Data Storage
-#define FMC_DATAW1S1		*(volatile uint32_t *)0x4001F20C	// Cache Data Storage
-#define FMC_DATAW2S0		*(volatile uint32_t *)0x4001F210	// Cache Data Storage
-#define FMC_DATAW2S1		*(volatile uint32_t *)0x4001F214	// Cache Data Storage
-#define FMC_DATAW3S0		*(volatile uint32_t *)0x4001F218	// Cache Data Storage
-#define FMC_DATAW3S1		*(volatile uint32_t *)0x4001F21C	// Cache Data Storage
-
-// Chapter 28: Flash Memory Module (FTFL)
-#define FTFL_FSTAT		*(volatile uint8_t  *)0x40020000      // Flash Status Register
-#define FTFL_FSTAT_CCIF			(uint8_t)0x80			// Command Complete Interrupt Flag
-#define FTFL_FSTAT_RDCOLERR		(uint8_t)0x40			// Flash Read Collision Error Flag
-#define FTFL_FSTAT_ACCERR		(uint8_t)0x20			// Flash Access Error Flag
-#define FTFL_FSTAT_FPVIOL		(uint8_t)0x10			// Flash Protection Violation Flag
-#define FTFL_FSTAT_MGSTAT0		(uint8_t)0x01			// Memory Controller Command Completion Status Flag
-#define FTFL_FCNFG		*(volatile uint8_t  *)0x40020001      // Flash Configuration Register
-#define FTFL_FCNFG_CCIE			(uint8_t)0x80			// Command Complete Interrupt Enable
-#define FTFL_FCNFG_RDCOLLIE		(uint8_t)0x40			// Read Collision Error Interrupt Enable
-#define FTFL_FCNFG_ERSAREQ		(uint8_t)0x20			// Erase All Request
-#define FTFL_FCNFG_ERSSUSP		(uint8_t)0x10			// Erase Suspend
-#define FTFL_FCNFG_PFLSH		(uint8_t)0x04			// Flash memory configuration
-#define FTFL_FCNFG_RAMRDY		(uint8_t)0x02			// RAM Ready
-#define FTFL_FCNFG_EEERDY		(uint8_t)0x01			// EEPROM Ready
-#define FTFL_FSEC		*(const	   uint8_t  *)0x40020002      // Flash Security Register
-#define FTFL_FOPT		*(const	   uint8_t  *)0x40020003      // Flash Option Register
-#define FTFL_FCCOB3		*(volatile uint8_t  *)0x40020004      // Flash Common Command Object Registers
-#define FTFL_FCCOB2		*(volatile uint8_t  *)0x40020005
-#define FTFL_FCCOB1		*(volatile uint8_t  *)0x40020006
-#define FTFL_FCCOB0		*(volatile uint8_t  *)0x40020007
-#define FTFL_FCCOB7		*(volatile uint8_t  *)0x40020008
-#define FTFL_FCCOB6		*(volatile uint8_t  *)0x40020009
-#define FTFL_FCCOB5		*(volatile uint8_t  *)0x4002000A
-#define FTFL_FCCOB4		*(volatile uint8_t  *)0x4002000B
-#define FTFL_FCCOBB		*(volatile uint8_t  *)0x4002000C
-#define FTFL_FCCOBA		*(volatile uint8_t  *)0x4002000D
-#define FTFL_FCCOB9		*(volatile uint8_t  *)0x4002000E
-#define FTFL_FCCOB8		*(volatile uint8_t  *)0x4002000F
-#define FTFL_FPROT3		*(volatile uint8_t  *)0x40020010      // Program Flash Protection Registers
-#define FTFL_FPROT2		*(volatile uint8_t  *)0x40020011      // Program Flash Protection Registers
-#define FTFL_FPROT1		*(volatile uint8_t  *)0x40020012      // Program Flash Protection Registers
-#define FTFL_FPROT0		*(volatile uint8_t  *)0x40020013      // Program Flash Protection Registers
-#define FTFL_FEPROT		*(volatile uint8_t  *)0x40020016      // EEPROM Protection Register
-#define FTFL_FDPROT		*(volatile uint8_t  *)0x40020017      // Data Flash Protection Register
-
-// Chapter 30: Cyclic Redundancy Check (CRC)
-#define CRC_CRC			*(volatile uint32_t *)0x40032000 // CRC Data register
-#define CRC_GPOLY		*(volatile uint32_t *)0x40032004 // CRC Polynomial register
-#define CRC_CTRL		*(volatile uint32_t *)0x40032008 // CRC Control register
-
-// Chapter 31: Analog-to-Digital Converter (ADC)
-#define ADC0_SC1A		*(volatile uint32_t *)0x4003B000 // ADC status and control registers 1
-#define ADC0_SC1B		*(volatile uint32_t *)0x4003B004 // ADC status and control registers 1
-#define ADC_SC1_COCO			(uint32_t)0x80			// Conversion complete flag
-#define ADC_SC1_AIEN			(uint32_t)0x40			// Interrupt enable
-#define ADC_SC1_DIFF			(uint32_t)0x20			// Differential mode enable
-#define ADC_SC1_ADCH(n)			(uint32_t)((n) & 0x1F)		// Input channel select
-#define ADC0_CFG1		*(volatile uint32_t *)0x4003B008 // ADC configuration register 1
-#define ADC_CFG1_ADLPC			(uint32_t)0x80			// Low-power configuration
-#define ADC_CFG1_ADIV(n)		(uint32_t)(((n) & 3) << 5)	// Clock divide select, 0=direct, 1=div2, 2=div4, 3=div8
-#define ADC_CFG1_ADLSMP			(uint32_t)0x10			// Sample time configuration, 0=Short, 1=Long
-#define ADC_CFG1_MODE(n)		(uint32_t)(((n) & 3) << 2)	// Conversion mode, 0=8 bit, 1=12 bit, 2=10 bit, 3=16 bit
-#define ADC_CFG1_ADICLK(n)		(uint32_t)(((n) & 3) << 0)	// Input clock, 0=bus, 1=bus/2, 2=OSCERCLK, 3=async
-#define ADC0_CFG2		*(volatile uint32_t *)0x4003B00C // Configuration register 2
-#define ADC_CFG2_MUXSEL			(uint32_t)0x10			// 0=a channels, 1=b channels
-#define ADC_CFG2_ADACKEN		(uint32_t)0x08			// async clock enable
-#define ADC_CFG2_ADHSC			(uint32_t)0x04			// High speed configuration
-#define ADC_CFG2_ADLSTS(n)		(uint32_t)(((n) & 3) << 0)	// Sample time, 0=24 cycles, 1=12 cycles, 2=6 cycles, 3=2 cycles
-#define ADC0_RA			*(volatile uint32_t *)0x4003B010 // ADC data result register
-#define ADC0_RB			*(volatile uint32_t *)0x4003B014 // ADC data result register
-#define ADC0_CV1		*(volatile uint32_t *)0x4003B018 // Compare value registers
-#define ADC0_CV2		*(volatile uint32_t *)0x4003B01C // Compare value registers
-#define ADC0_SC2		*(volatile uint32_t *)0x4003B020 // Status and control register 2
-#define ADC_SC2_ADACT			(uint32_t)0x80			// Conversion active
-#define ADC_SC2_ADTRG			(uint32_t)0x40			// Conversion trigger select, 0=software, 1=hardware
-#define ADC_SC2_ACFE			(uint32_t)0x20			// Compare function enable
-#define ADC_SC2_ACFGT			(uint32_t)0x10			// Compare function greater than enable
-#define ADC_SC2_ACREN			(uint32_t)0x08			// Compare function range enable
-#define ADC_SC2_DMAEN			(uint32_t)0x04			// DMA enable
-#define ADC_SC2_REFSEL(n)		(uint32_t)(((n) & 3) << 0)	// Voltage reference, 0=vcc/external, 1=1.2 volts
-#define ADC0_SC3		*(volatile uint32_t *)0x4003B024 // Status and control register 3
-#define ADC_SC3_CAL			(uint32_t)0x80			// Calibration, 1=begin, stays set while cal in progress
-#define ADC_SC3_CALF			(uint32_t)0x40			// Calibration failed flag
-#define ADC_SC3_ADCO			(uint32_t)0x08			// Continuous conversion enable
-#define ADC_SC3_AVGE			(uint32_t)0x04			// Hardware average enable
-#define ADC_SC3_AVGS(n)			(uint32_t)(((n) & 3) << 0)	// avg select, 0=4 samples, 1=8 samples, 2=16 samples, 3=32 samples
-#define ADC0_OFS		*(volatile uint32_t *)0x4003B028 // ADC offset correction register
-#define ADC0_PG			*(volatile uint32_t *)0x4003B02C // ADC plus-side gain register
-#define ADC0_MG			*(volatile uint32_t *)0x4003B030 // ADC minus-side gain register
-#define ADC0_CLPD		*(volatile uint32_t *)0x4003B034 // ADC plus-side general calibration value register
-#define ADC0_CLPS		*(volatile uint32_t *)0x4003B038 // ADC plus-side general calibration value register
-#define ADC0_CLP4		*(volatile uint32_t *)0x4003B03C // ADC plus-side general calibration value register
-#define ADC0_CLP3		*(volatile uint32_t *)0x4003B040 // ADC plus-side general calibration value register
-#define ADC0_CLP2		*(volatile uint32_t *)0x4003B044 // ADC plus-side general calibration value register
-#define ADC0_CLP1		*(volatile uint32_t *)0x4003B048 // ADC plus-side general calibration value register
-#define ADC0_CLP0		*(volatile uint32_t *)0x4003B04C // ADC plus-side general calibration value register
-#define ADC0_PGA		*(volatile uint32_t *)0x4003B050 // ADC Programmable Gain Amplifier
-#define ADC_PGA_PGAEN			(uint32_t)0x00800000		// Enable
-#define ADC_PGA_PGALPB			(uint32_t)0x00100000		// Low-Power Mode Control, 0=low power, 1=normal
-#define ADC_PGA_PGAG(n)			(uint32_t)(((n) & 15) << 16)	// Gain, 0=1X, 1=2X, 2=4X, 3=8X, 4=16X, 5=32X, 6=64X
-#define ADC0_CLMD		*(volatile uint32_t *)0x4003B054 // ADC minus-side general calibration value register
-#define ADC0_CLMS		*(volatile uint32_t *)0x4003B058 // ADC minus-side general calibration value register
-#define ADC0_CLM4		*(volatile uint32_t *)0x4003B05C // ADC minus-side general calibration value register
-#define ADC0_CLM3		*(volatile uint32_t *)0x4003B060 // ADC minus-side general calibration value register
-#define ADC0_CLM2		*(volatile uint32_t *)0x4003B064 // ADC minus-side general calibration value register
-#define ADC0_CLM1		*(volatile uint32_t *)0x4003B068 // ADC minus-side general calibration value register
-#define ADC0_CLM0		*(volatile uint32_t *)0x4003B06C // ADC minus-side general calibration value register
-
-#define ADC1_SC1A		*(volatile uint32_t *)0x400BB000 // ADC status and control registers 1
-#define ADC1_SC1B		*(volatile uint32_t *)0x400BB004 // ADC status and control registers 1
-#define ADC1_CFG1		*(volatile uint32_t *)0x400BB008 // ADC configuration register 1
-#define ADC1_CFG2		*(volatile uint32_t *)0x400BB00C // Configuration register 2
-#define ADC1_RA			*(volatile uint32_t *)0x400BB010 // ADC data result register
-#define ADC1_RB			*(volatile uint32_t *)0x400BB014 // ADC data result register
-#define ADC1_CV1		*(volatile uint32_t *)0x400BB018 // Compare value registers
-#define ADC1_CV2		*(volatile uint32_t *)0x400BB01C // Compare value registers
-#define ADC1_SC2		*(volatile uint32_t *)0x400BB020 // Status and control register 2
-#define ADC1_SC3		*(volatile uint32_t *)0x400BB024 // Status and control register 3
-#define ADC1_OFS		*(volatile uint32_t *)0x400BB028 // ADC offset correction register
-#define ADC1_PG			*(volatile uint32_t *)0x400BB02C // ADC plus-side gain register
-#define ADC1_MG			*(volatile uint32_t *)0x400BB030 // ADC minus-side gain register
-#define ADC1_CLPD		*(volatile uint32_t *)0x400BB034 // ADC plus-side general calibration value register
-#define ADC1_CLPS		*(volatile uint32_t *)0x400BB038 // ADC plus-side general calibration value register
-#define ADC1_CLP4		*(volatile uint32_t *)0x400BB03C // ADC plus-side general calibration value register
-#define ADC1_CLP3		*(volatile uint32_t *)0x400BB040 // ADC plus-side general calibration value register
-#define ADC1_CLP2		*(volatile uint32_t *)0x400BB044 // ADC plus-side general calibration value register
-#define ADC1_CLP1		*(volatile uint32_t *)0x400BB048 // ADC plus-side general calibration value register
-#define ADC1_CLP0		*(volatile uint32_t *)0x400BB04C // ADC plus-side general calibration value register
-#define ADC1_PGA		*(volatile uint32_t *)0x400BB050 // ADC Programmable Gain Amplifier
-#define ADC1_CLMD		*(volatile uint32_t *)0x400BB054 // ADC minus-side general calibration value register
-#define ADC1_CLMS		*(volatile uint32_t *)0x400BB058 // ADC minus-side general calibration value register
-#define ADC1_CLM4		*(volatile uint32_t *)0x400BB05C // ADC minus-side general calibration value register
-#define ADC1_CLM3		*(volatile uint32_t *)0x400BB060 // ADC minus-side general calibration value register
-#define ADC1_CLM2		*(volatile uint32_t *)0x400BB064 // ADC minus-side general calibration value register
-#define ADC1_CLM1		*(volatile uint32_t *)0x400BB068 // ADC minus-side general calibration value register
-#define ADC1_CLM0		*(volatile uint32_t *)0x400BB06C // ADC minus-side general calibration value register
-
-#define DAC0_DAT0L		*(volatile uint8_t  *)0x400CC000 // DAC Data Low Register
-#define DAC0_DATH		*(volatile uint8_t  *)0x400CC001 // DAC Data High Register
-#define DAC0_DAT1L		*(volatile uint8_t  *)0x400CC002 // DAC Data Low Register
-#define DAC0_DAT2L		*(volatile uint8_t  *)0x400CC004 // DAC Data Low Register
-#define DAC0_DAT3L		*(volatile uint8_t  *)0x400CC006 // DAC Data Low Register
-#define DAC0_DAT4L		*(volatile uint8_t  *)0x400CC008 // DAC Data Low Register
-#define DAC0_DAT5L		*(volatile uint8_t  *)0x400CC00A // DAC Data Low Register
-#define DAC0_DAT6L		*(volatile uint8_t  *)0x400CC00C // DAC Data Low Register
-#define DAC0_DAT7L		*(volatile uint8_t  *)0x400CC00E // DAC Data Low Register
-#define DAC0_DAT8L		*(volatile uint8_t  *)0x400CC010 // DAC Data Low Register
-#define DAC0_DAT9L		*(volatile uint8_t  *)0x400CC012 // DAC Data Low Register
-#define DAC0_DAT10L		*(volatile uint8_t  *)0x400CC014 // DAC Data Low Register
-#define DAC0_DAT11L		*(volatile uint8_t  *)0x400CC016 // DAC Data Low Register
-#define DAC0_DAT12L		*(volatile uint8_t  *)0x400CC018 // DAC Data Low Register
-#define DAC0_DAT13L		*(volatile uint8_t  *)0x400CC01A // DAC Data Low Register
-#define DAC0_DAT14L		*(volatile uint8_t  *)0x400CC01C // DAC Data Low Register
-#define DAC0_DAT15L		*(volatile uint8_t  *)0x400CC01E // DAC Data Low Register
-#define DAC0_SR			*(volatile uint8_t  *)0x400CC020 // DAC Status Register
-#define DAC0_C0			*(volatile uint8_t  *)0x400CC021 // DAC Control Register
-#define DAC_C0_DACEN			0x80				// DAC Enable
-#define DAC_C0_DACRFS			0x40				// DAC Reference Select
-#define DAC_C0_DACTRGSEL		0x20				// DAC Trigger Select
-#define DAC_C0_DACSWTRG			0x10				// DAC Software Trigger
-#define DAC_C0_LPEN			0x08				// DAC Low Power Control
-#define DAC_C0_DACBWIEN			0x04				// DAC Buffer Watermark Interrupt Enable
-#define DAC_C0_DACBTIEN			0x02				// DAC Buffer Read Pointer Top Flag Interrupt Enable
-#define DAC_C0_DACBBIEN			0x01				// DAC Buffer Read Pointer Bottom Flag Interrupt Enable
-#define DAC0_C1			*(volatile uint8_t  *)0x400CC022 // DAC Control Register 1
-#define DAC_C1_DMAEN			0x80				// DMA Enable Select
-#define DAC_C1_DACBFWM(n)		(((n) & 3) << 3)		// DAC Buffer Watermark Select
-#define DAC_C1_DACBFMD(n)		(((n) & 3) << 0)		// DAC Buffer Work Mode Select
-#define DAC_C1_DACBFEN			0x00				// DAC Buffer Enable
-
-#define DAC0_C2			*(volatile uint8_t  *)0x400CC023 // DAC Control Register 2
-#define DAC_C2_DACBFRP(n)		(((n) & 15) << 4)		// DAC Buffer Read Pointer
-#define DAC_C2_DACBFUP(n)		(((n) & 15) << 0)		// DAC Buffer Upper Limit
-
-
-//#define MCG_C2_RANGE0(n)		(uint8_t)(((n) & 0x03) << 4)	// Frequency Range Select, Selects the frequency range for the crystal oscillator
-//#define MCG_C2_LOCRE0			(uint8_t)0x80			// Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0
-
-// Chapter 32: Comparator (CMP)
-#define CMP0_CR0		*(volatile uint8_t  *)0x40073000 // CMP Control Register 0
-#define CMP0_CR1		*(volatile uint8_t  *)0x40073001 // CMP Control Register 1
-#define CMP0_FPR		*(volatile uint8_t  *)0x40073002 // CMP Filter Period Register
-#define CMP0_SCR		*(volatile uint8_t  *)0x40073003 // CMP Status and Control Register
-#define CMP0_DACCR		*(volatile uint8_t  *)0x40073004 // DAC Control Register
-#define CMP0_MUXCR		*(volatile uint8_t  *)0x40073005 // MUX Control Register
-#define CMP1_CR0		*(volatile uint8_t  *)0x40073008 // CMP Control Register 0
-#define CMP1_CR1		*(volatile uint8_t  *)0x40073009 // CMP Control Register 1
-#define CMP1_FPR		*(volatile uint8_t  *)0x4007300A // CMP Filter Period Register
-#define CMP1_SCR		*(volatile uint8_t  *)0x4007300B // CMP Status and Control Register
-#define CMP1_DACCR		*(volatile uint8_t  *)0x4007300C // DAC Control Register
-#define CMP1_MUXCR		*(volatile uint8_t  *)0x4007300D // MUX Control Register
-
-// Chapter 33: Voltage Reference (VREFV1)
-#define VREF_TRM		*(volatile uint8_t  *)0x40074000 // VREF Trim Register
-#define VREF_TRM_CHOPEN			(uint8_t)0x40			// Chop oscillator enable
-#define VREF_TRM_TRIM(n)		((n) & 0x3F)			// Trim bits
-#define VREF_SC			*(volatile uint8_t  *)0x40074001 // VREF Status and Control Register
-#define VREF_SC_VREFEN			(uint8_t)0x80			// Internal Voltage Reference enable
-#define VREF_SC_REGEN			(uint8_t)0x40			// Regulator enable
-#define VREF_SC_ICOMPEN			(uint8_t)0x20			// Second order curvature compensation enable
-#define VREF_SC_VREFST			(uint8_t)0x04			// Internal Voltage Reference stable flag
-#define VREF_SC_MODE_LV(n)		(uint8_t)(((n) & 3) << 0)	// Buffer Mode selection: 0=Bandgap on only
-									//  1=High power buffer mode,
-									//  2=Low-power buffer mode
-
-// Chapter 34: Programmable Delay Block (PDB)
-#define PDB0_SC			*(volatile uint32_t *)0x40036000 // Status and Control Register
-#define PDB_SC_LDMOD(n)			(((n) & 3) << 18)	// Load Mode Select
-#define PDB_SC_PDBEIE			0x00020000		// Sequence Error Interrupt Enable
-#define PDB_SC_SWTRIG			0x00010000		// Software Trigger
-#define PDB_SC_DMAEN			0x00008000		// DMA Enable
-#define PDB_SC_PRESCALER(n)		(((n) & 7) << 12)	// Prescaler Divider Select
-#define PDB_SC_TRGSEL(n)		(((n) & 15) << 8)	// Trigger Input Source Select
-#define PDB_SC_PDBEN			0x00000080		// PDB Enable
-#define PDB_SC_PDBIF			0x00000040		// PDB Interrupt Flag
-#define PDB_SC_PDBIE			0x00000020		// PDB Interrupt Enable.
-#define PDB_SC_MULT(n)			(((n) & 3) << 2)	// Multiplication Factor
-#define PDB_SC_CONT			0x00000002		// Continuous Mode Enable
-#define PDB_SC_LDOK			0x00000001		// Load OK
-#define PDB0_MOD		*(volatile uint32_t *)0x40036004 // Modulus Register
-#define PDB0_CNT		*(volatile uint32_t *)0x40036008 // Counter Register
-#define PDB0_IDLY		*(volatile uint32_t *)0x4003600C // Interrupt Delay Register
-#define PDB0_CH0C1		*(volatile uint32_t *)0x40036010 // Channel n Control Register 1
-#define PDB0_CH0S		*(volatile uint32_t *)0x40036014 // Channel n Status Register
-#define PDB0_CH0DLY0		*(volatile uint32_t *)0x40036018 // Channel n Delay 0 Register
-#define PDB0_CH0DLY1		*(volatile uint32_t *)0x4003601C // Channel n Delay 1 Register
-#define PDB0_POEN		*(volatile uint32_t *)0x40036190 // Pulse-Out n Enable Register
-#define PDB0_PO0DLY		*(volatile uint32_t *)0x40036194 // Pulse-Out n Delay Register
-#define PDB0_PO1DLY		*(volatile uint32_t *)0x40036198 // Pulse-Out n Delay Register
-
-// Chapter 35: FlexTimer Module (FTM)
-#define FTM0_SC			*(volatile uint32_t *)0x40038000 // Status And Control
-#define FTM_SC_TOF			0x80				// Timer Overflow Flag
-#define FTM_SC_TOIE			0x40				// Timer Overflow Interrupt Enable
-#define FTM_SC_CPWMS			0x20				// Center-Aligned PWM Select
-#define FTM_SC_CLKS(n)			(((n) & 3) << 3)		// Clock Source Selection
-#define FTM_SC_PS(n)			(((n) & 7) << 0)		// Prescale Factor Selection
-#define FTM0_CNT		*(volatile uint32_t *)0x40038004 // Counter
-#define FTM0_MOD		*(volatile uint32_t *)0x40038008 // Modulo
-#define FTM0_C0SC		*(volatile uint32_t *)0x4003800C // Channel 0 Status And Control
-#define FTM0_C0V		*(volatile uint32_t *)0x40038010 // Channel 0 Value
-#define FTM0_C1SC		*(volatile uint32_t *)0x40038014 // Channel 1 Status And Control
-#define FTM0_C1V		*(volatile uint32_t *)0x40038018 // Channel 1 Value
-#define FTM0_C2SC		*(volatile uint32_t *)0x4003801C // Channel 2 Status And Control
-#define FTM0_C2V		*(volatile uint32_t *)0x40038020 // Channel 2 Value
-#define FTM0_C3SC		*(volatile uint32_t *)0x40038024 // Channel 3 Status And Control
-#define FTM0_C3V		*(volatile uint32_t *)0x40038028 // Channel 3 Value
-#define FTM0_C4SC		*(volatile uint32_t *)0x4003802C // Channel 4 Status And Control
-#define FTM0_C4V		*(volatile uint32_t *)0x40038030 // Channel 4 Value
-#define FTM0_C5SC		*(volatile uint32_t *)0x40038034 // Channel 5 Status And Control
-#define FTM0_C5V		*(volatile uint32_t *)0x40038038 // Channel 5 Value
-#define FTM0_C6SC		*(volatile uint32_t *)0x4003803C // Channel 6 Status And Control
-#define FTM0_C6V		*(volatile uint32_t *)0x40038040 // Channel 6 Value
-#define FTM0_C7SC		*(volatile uint32_t *)0x40038044 // Channel 7 Status And Control
-#define FTM0_C7V		*(volatile uint32_t *)0x40038048 // Channel 7 Value
-#define FTM0_CNTIN		*(volatile uint32_t *)0x4003804C // Counter Initial Value
-#define FTM0_STATUS		*(volatile uint32_t *)0x40038050 // Capture And Compare Status
-#define FTM0_MODE		*(volatile uint32_t *)0x40038054 // Features Mode Selection
-#define FTM_MODE_FAULTIE		0x80				// Fault Interrupt Enable
-#define FTM_MODE_FAULTM(n)		(((n) & 3) << 5)		// Fault Control Mode
-#define FTM_MODE_CAPTEST		0x10				// Capture Test Mode Enable
-#define FTM_MODE_PWMSYNC		0x08				// PWM Synchronization Mode
-#define FTM_MODE_WPDIS			0x04				// Write Protection Disable
-#define FTM_MODE_INIT			0x02				// Initialize The Channels Output
-#define FTM_MODE_FTMEN			0x01				// FTM Enable
-#define FTM0_SYNC		*(volatile uint32_t *)0x40038058 // Synchronization
-#define FTM_SYNC_SWSYNC			0x80				//
-#define FTM_SYNC_TRIG2			0x40				//
-#define FTM_SYNC_TRIG1			0x20				//
-#define FTM_SYNC_TRIG0			0x10				//
-#define FTM_SYNC_SYNCHOM		0x08				//
-#define FTM_SYNC_REINIT			0x04				//
-#define FTM_SYNC_CNTMAX			0x02				//
-#define FTM_SYNC_CNTMIN			0x01				//
-#define FTM0_OUTINIT		*(volatile uint32_t *)0x4003805C // Initial State For Channels Output
-#define FTM0_OUTMASK		*(volatile uint32_t *)0x40038060 // Output Mask
-#define FTM0_COMBINE		*(volatile uint32_t *)0x40038064 // Function For Linked Channels
-#define FTM0_DEADTIME		*(volatile uint32_t *)0x40038068 // Deadtime Insertion Control
-#define FTM0_EXTTRIG		*(volatile uint32_t *)0x4003806C // FTM External Trigger
-#define FTM0_POL		*(volatile uint32_t *)0x40038070 // Channels Polarity
-#define FTM0_FMS		*(volatile uint32_t *)0x40038074 // Fault Mode Status
-#define FTM0_FILTER		*(volatile uint32_t *)0x40038078 // Input Capture Filter Control
-#define FTM0_FLTCTRL		*(volatile uint32_t *)0x4003807C // Fault Control
-#define FTM0_QDCTRL		*(volatile uint32_t *)0x40038080 // Quadrature Decoder Control And Status
-#define FTM0_CONF		*(volatile uint32_t *)0x40038084 // Configuration
-#define FTM0_FLTPOL		*(volatile uint32_t *)0x40038088 // FTM Fault Input Polarity
-#define FTM0_SYNCONF		*(volatile uint32_t *)0x4003808C // Synchronization Configuration
-#define FTM0_INVCTRL		*(volatile uint32_t *)0x40038090 // FTM Inverting Control
-#define FTM0_SWOCTRL		*(volatile uint32_t *)0x40038094 // FTM Software Output Control
-#define FTM0_PWMLOAD		*(volatile uint32_t *)0x40038098 // FTM PWM Load
-#define FTM1_SC			*(volatile uint32_t *)0x40039000 // Status And Control
-#define FTM1_CNT		*(volatile uint32_t *)0x40039004 // Counter
-#define FTM1_MOD		*(volatile uint32_t *)0x40039008 // Modulo
-#define FTM1_C0SC		*(volatile uint32_t *)0x4003900C // Channel 0 Status And Control
-#define FTM1_C0V		*(volatile uint32_t *)0x40039010 // Channel 0 Value
-#define FTM1_C1SC		*(volatile uint32_t *)0x40039014 // Channel 1 Status And Control
-#define FTM1_C1V		*(volatile uint32_t *)0x40039018 // Channel 1 Value
-#define FTM1_CNTIN		*(volatile uint32_t *)0x4003904C // Counter Initial Value
-#define FTM1_STATUS		*(volatile uint32_t *)0x40039050 // Capture And Compare Status
-#define FTM1_MODE		*(volatile uint32_t *)0x40039054 // Features Mode Selection
-#define FTM1_SYNC		*(volatile uint32_t *)0x40039058 // Synchronization
-#define FTM1_OUTINIT		*(volatile uint32_t *)0x4003905C // Initial State For Channels Output
-#define FTM1_OUTMASK		*(volatile uint32_t *)0x40039060 // Output Mask
-#define FTM1_COMBINE		*(volatile uint32_t *)0x40039064 // Function For Linked Channels
-#define FTM1_DEADTIME		*(volatile uint32_t *)0x40039068 // Deadtime Insertion Control
-#define FTM1_EXTTRIG		*(volatile uint32_t *)0x4003906C // FTM External Trigger
-#define FTM1_POL		*(volatile uint32_t *)0x40039070 // Channels Polarity
-#define FTM1_FMS		*(volatile uint32_t *)0x40039074 // Fault Mode Status
-#define FTM1_FILTER		*(volatile uint32_t *)0x40039078 // Input Capture Filter Control
-#define FTM1_FLTCTRL		*(volatile uint32_t *)0x4003907C // Fault Control
-#define FTM1_QDCTRL		*(volatile uint32_t *)0x40039080 // Quadrature Decoder Control And Status
-#define FTM1_CONF		*(volatile uint32_t *)0x40039084 // Configuration
-#define FTM1_FLTPOL		*(volatile uint32_t *)0x40039088 // FTM Fault Input Polarity
-#define FTM1_SYNCONF		*(volatile uint32_t *)0x4003908C // Synchronization Configuration
-#define FTM1_INVCTRL		*(volatile uint32_t *)0x40039090 // FTM Inverting Control
-#define FTM1_SWOCTRL		*(volatile uint32_t *)0x40039094 // FTM Software Output Control
-#define FTM1_PWMLOAD		*(volatile uint32_t *)0x40039098 // FTM PWM Load
-#define FTM2_SC			*(volatile uint32_t *)0x400B8000 // Status And Control
-#define FTM2_CNT		*(volatile uint32_t *)0x400B8004 // Counter
-#define FTM2_MOD		*(volatile uint32_t *)0x400B8008 // Modulo
-#define FTM2_C0SC		*(volatile uint32_t *)0x400B800C // Channel 0 Status And Control
-#define FTM2_C0V		*(volatile uint32_t *)0x400B8010 // Channel 0 Value
-#define FTM2_C1SC		*(volatile uint32_t *)0x400B8014 // Channel 1 Status And Control
-#define FTM2_C1V		*(volatile uint32_t *)0x400B8018 // Channel 1 Value
-#define FTM2_CNTIN		*(volatile uint32_t *)0x400B804C // Counter Initial Value
-#define FTM2_STATUS		*(volatile uint32_t *)0x400B8050 // Capture And Compare Status
-#define FTM2_MODE		*(volatile uint32_t *)0x400B8054 // Features Mode Selection
-#define FTM2_SYNC		*(volatile uint32_t *)0x400B8058 // Synchronization
-#define FTM2_OUTINIT		*(volatile uint32_t *)0x400B805C // Initial State For Channels Output
-#define FTM2_OUTMASK		*(volatile uint32_t *)0x400B8060 // Output Mask
-#define FTM2_COMBINE		*(volatile uint32_t *)0x400B8064 // Function For Linked Channels
-#define FTM2_DEADTIME		*(volatile uint32_t *)0x400B8068 // Deadtime Insertion Control
-#define FTM2_EXTTRIG		*(volatile uint32_t *)0x400B806C // FTM External Trigger
-#define FTM2_POL		*(volatile uint32_t *)0x400B8070 // Channels Polarity
-#define FTM2_FMS		*(volatile uint32_t *)0x400B8074 // Fault Mode Status
-#define FTM2_FILTER		*(volatile uint32_t *)0x400B8078 // Input Capture Filter Control
-#define FTM2_FLTCTRL		*(volatile uint32_t *)0x400B807C // Fault Control
-#define FTM2_QDCTRL		*(volatile uint32_t *)0x400B8080 // Quadrature Decoder Control And Status
-#define FTM2_CONF		*(volatile uint32_t *)0x400B8084 // Configuration
-#define FTM2_FLTPOL		*(volatile uint32_t *)0x400B8088 // FTM Fault Input Polarity
-#define FTM2_SYNCONF		*(volatile uint32_t *)0x400B808C // Synchronization Configuration
-#define FTM2_INVCTRL		*(volatile uint32_t *)0x400B8090 // FTM Inverting Control
-#define FTM2_SWOCTRL		*(volatile uint32_t *)0x400B8094 // FTM Software Output Control
-#define FTM2_PWMLOAD		*(volatile uint32_t *)0x400B8098 // FTM PWM Load
-
-// Chapter 36: Periodic Interrupt Timer (PIT)
-#define PIT_MCR			*(volatile uint32_t *)0x40037000 // PIT Module Control Register
-#define PIT_LDVAL0		*(volatile uint32_t *)0x40037100 // Timer Load Value Register
-#define PIT_CVAL0		*(volatile uint32_t *)0x40037104 // Current Timer Value Register
-#define PIT_TCTRL0		*(volatile uint32_t *)0x40037108 // Timer Control Register
-#define PIT_TFLG0		*(volatile uint32_t *)0x4003710C // Timer Flag Register
-#define PIT_LDVAL1		*(volatile uint32_t *)0x40037110 // Timer Load Value Register
-#define PIT_CVAL1		*(volatile uint32_t *)0x40037114 // Current Timer Value Register
-#define PIT_TCTRL1		*(volatile uint32_t *)0x40037118 // Timer Control Register
-#define PIT_TFLG1		*(volatile uint32_t *)0x4003711C // Timer Flag Register
-#define PIT_LDVAL2		*(volatile uint32_t *)0x40037120 // Timer Load Value Register
-#define PIT_CVAL2		*(volatile uint32_t *)0x40037124 // Current Timer Value Register
-#define PIT_TCTRL2		*(volatile uint32_t *)0x40037128 // Timer Control Register
-#define PIT_TFLG2		*(volatile uint32_t *)0x4003712C // Timer Flag Register
-#define PIT_LDVAL3		*(volatile uint32_t *)0x40037130 // Timer Load Value Register
-#define PIT_CVAL3		*(volatile uint32_t *)0x40037134 // Current Timer Value Register
-#define PIT_TCTRL3		*(volatile uint32_t *)0x40037138 // Timer Control Register
-#define PIT_TFLG3		*(volatile uint32_t *)0x4003713C // Timer Flag Register
-
-// Chapter 37: Low-Power Timer (LPTMR)
-#define LPTMR0_CSR		*(volatile uint32_t *)0x40040000 // Low Power Timer Control Status Register
-#define LPTMR0_PSR		*(volatile uint32_t *)0x40040004 // Low Power Timer Prescale Register
-#define LPTMR0_CMR		*(volatile uint32_t *)0x40040008 // Low Power Timer Compare Register
-#define LPTMR0_CNR		*(volatile uint32_t *)0x4004000C // Low Power Timer Counter Register
-
-// Chapter 38: Carrier Modulator Transmitter (CMT)
-#define CMT_CGH1		*(volatile uint8_t  *)0x40062000 // CMT Carrier Generator High Data Register 1
-#define CMT_CGL1		*(volatile uint8_t  *)0x40062001 // CMT Carrier Generator Low Data Register 1
-#define CMT_CGH2		*(volatile uint8_t  *)0x40062002 // CMT Carrier Generator High Data Register 2
-#define CMT_CGL2		*(volatile uint8_t  *)0x40062003 // CMT Carrier Generator Low Data Register 2
-#define CMT_OC			*(volatile uint8_t  *)0x40062004 // CMT Output Control Register
-#define CMT_MSC			*(volatile uint8_t  *)0x40062005 // CMT Modulator Status and Control Register
-#define CMT_CMD1		*(volatile uint8_t  *)0x40062006 // CMT Modulator Data Register Mark High
-#define CMT_CMD2		*(volatile uint8_t  *)0x40062007 // CMT Modulator Data Register Mark Low
-#define CMT_CMD3		*(volatile uint8_t  *)0x40062008 // CMT Modulator Data Register Space High
-#define CMT_CMD4		*(volatile uint8_t  *)0x40062009 // CMT Modulator Data Register Space Low
-#define CMT_PPS			*(volatile uint8_t  *)0x4006200A // CMT Primary Prescaler Register
-#define CMT_DMA			*(volatile uint8_t  *)0x4006200B // CMT Direct Memory Access Register
-
-// Chapter 39: Real Time Clock (RTC)
-#define RTC_TSR			*(volatile uint32_t *)0x4003D000 // RTC Time Seconds Register
-#define RTC_TPR			*(volatile uint32_t *)0x4003D004 // RTC Time Prescaler Register
-#define RTC_TAR			*(volatile uint32_t *)0x4003D008 // RTC Time Alarm Register
-#define RTC_TCR			*(volatile uint32_t *)0x4003D00C // RTC Time Compensation Register
-#define RTC_TCR_CIC(n)			(((n) & 255) << 24)		// Compensation Interval Counter
-#define RTC_TCR_TCV(n)			(((n) & 255) << 16)		// Time Compensation Value
-#define RTC_TCR_CIR(n)			(((n) & 255) << 8)		// Compensation Interval Register
-#define RTC_TCR_TCR(n)			(((n) & 255) << 0)		// Time Compensation Register
-#define RTC_CR			*(volatile uint32_t *)0x4003D010 // RTC Control Register
-#define RTC_CR_SC2P			(uint32_t)0x00002000		//
-#define RTC_CR_SC4P			(uint32_t)0x00001000		//
-#define RTC_CR_SC8P			(uint32_t)0x00000800		//
-#define RTC_CR_SC16P			(uint32_t)0x00000400		//
-#define RTC_CR_CLKO			(uint32_t)0x00000200		//
-#define RTC_CR_OSCE			(uint32_t)0x00000100		//
-#define RTC_CR_UM			(uint32_t)0x00000008		//
-#define RTC_CR_SUP			(uint32_t)0x00000004		//
-#define RTC_CR_WPE			(uint32_t)0x00000002		//
-#define RTC_CR_SWR			(uint32_t)0x00000001		//
-#define RTC_SR			*(volatile uint32_t *)0x4003D014 // RTC Status Register
-#define RTC_SR_TCE			(uint32_t)0x00000010		//
-#define RTC_SR_TAF			(uint32_t)0x00000004		//
-#define RTC_SR_TOF			(uint32_t)0x00000002		//
-#define RTC_SR_TIF			(uint32_t)0x00000001		//
-#define RTC_LR			*(volatile uint32_t *)0x4003D018 // RTC Lock Register
-#define RTC_IER			*(volatile uint32_t *)0x4003D01C // RTC Interrupt Enable Register
-#define RTC_WAR			*(volatile uint32_t *)0x4003D800 // RTC Write Access Register
-#define RTC_RAR			*(volatile uint32_t *)0x4003D804 // RTC Read Access Register
-
-// Chapter 40: Universal Serial Bus OTG Controller (USBOTG)
-#define USB0_PERID		*(const	   uint8_t  *)0x40072000 // Peripheral ID register
-#define USB0_IDCOMP		*(const	   uint8_t  *)0x40072004 // Peripheral ID Complement register
-#define USB0_REV		*(const	   uint8_t  *)0x40072008 // Peripheral Revision register
-#define USB0_ADDINFO		*(volatile uint8_t  *)0x4007200C // Peripheral Additional Info register
-#define USB0_OTGISTAT		*(volatile uint8_t  *)0x40072010 // OTG Interrupt Status register
-#define USB_OTGISTAT_IDCHG		(uint8_t)0x80			//
-#define USB_OTGISTAT_ONEMSEC		(uint8_t)0x40			//
-#define USB_OTGISTAT_LINE_STATE_CHG	(uint8_t)0x20			//
-#define USB_OTGISTAT_SESSVLDCHG		(uint8_t)0x08			//
-#define USB_OTGISTAT_B_SESS_CHG		(uint8_t)0x04			//
-#define USB_OTGISTAT_AVBUSCHG		(uint8_t)0x01			//
-#define USB0_OTGICR		*(volatile uint8_t  *)0x40072014 // OTG Interrupt Control Register
-#define USB_OTGICR_IDEN			(uint8_t)0x80			//
-#define USB_OTGICR_ONEMSECEN		(uint8_t)0x40			//
-#define USB_OTGICR_LINESTATEEN		(uint8_t)0x20			//
-#define USB_OTGICR_SESSVLDEN		(uint8_t)0x08			//
-#define USB_OTGICR_BSESSEN		(uint8_t)0x04			//
-#define USB_OTGICR_AVBUSEN		(uint8_t)0x01			//
-#define USB0_OTGSTAT		*(volatile uint8_t  *)0x40072018 // OTG Status register
-#define USB_OTGSTAT_ID			(uint8_t)0x80			//
-#define USB_OTGSTAT_ONEMSECEN		(uint8_t)0x40			//
-#define USB_OTGSTAT_LINESTATESTABLE	(uint8_t)0x20			//
-#define USB_OTGSTAT_SESS_VLD		(uint8_t)0x08			//
-#define USB_OTGSTAT_BSESSEND		(uint8_t)0x04			//
-#define USB_OTGSTAT_AVBUSVLD		(uint8_t)0x01			//
-#define USB0_OTGCTL		*(volatile uint8_t  *)0x4007201C // OTG Control Register
-#define USB_OTGCTL_DPHIGH		(uint8_t)0x80			//
-#define USB_OTGCTL_DPLOW		(uint8_t)0x20			//
-#define USB_OTGCTL_DMLOW		(uint8_t)0x10			//
-#define USB_OTGCTL_OTGEN		(uint8_t)0x04			//
-#define USB0_ISTAT		*(volatile uint8_t  *)0x40072080 // Interrupt Status Register
-#define USB_ISTAT_STALL			(uint8_t)0x80			//
-#define USB_ISTAT_ATTACH		(uint8_t)0x40			//
-#define USB_ISTAT_RESUME		(uint8_t)0x20			//
-#define USB_ISTAT_SLEEP			(uint8_t)0x10			//
-#define USB_ISTAT_TOKDNE		(uint8_t)0x08			//
-#define USB_ISTAT_SOFTOK		(uint8_t)0x04			//
-#define USB_ISTAT_ERROR			(uint8_t)0x02			//
-#define USB_ISTAT_USBRST		(uint8_t)0x01			//
-#define USB0_INTEN		*(volatile uint8_t  *)0x40072084 // Interrupt Enable Register
-#define USB_INTEN_STALLEN		(uint8_t)0x80			//
-#define USB_INTEN_ATTACHEN		(uint8_t)0x40			//
-#define USB_INTEN_RESUMEEN		(uint8_t)0x20			//
-#define USB_INTEN_SLEEPEN		(uint8_t)0x10			//
-#define USB_INTEN_TOKDNEEN		(uint8_t)0x08			//
-#define USB_INTEN_SOFTOKEN		(uint8_t)0x04			//
-#define USB_INTEN_ERROREN		(uint8_t)0x02			//
-#define USB_INTEN_USBRSTEN		(uint8_t)0x01			//
-#define USB0_ERRSTAT		*(volatile uint8_t  *)0x40072088 // Error Interrupt Status Register
-#define USB_ERRSTAT_BTSERR		(uint8_t)0x80			//
-#define USB_ERRSTAT_DMAERR		(uint8_t)0x20			//
-#define USB_ERRSTAT_BTOERR		(uint8_t)0x10			//
-#define USB_ERRSTAT_DFN8		(uint8_t)0x08			//
-#define USB_ERRSTAT_CRC16		(uint8_t)0x04			//
-#define USB_ERRSTAT_CRC5EOF		(uint8_t)0x02			//
-#define USB_ERRSTAT_PIDERR		(uint8_t)0x01			//
-#define USB0_ERREN		*(volatile uint8_t  *)0x4007208C // Error Interrupt Enable Register
-#define USB_ERREN_BTSERREN		(uint8_t)0x80			//
-#define USB_ERREN_DMAERREN		(uint8_t)0x20			//
-#define USB_ERREN_BTOERREN		(uint8_t)0x10			//
-#define USB_ERREN_DFN8EN		(uint8_t)0x08			//
-#define USB_ERREN_CRC16EN		(uint8_t)0x04			//
-#define USB_ERREN_CRC5EOFEN		(uint8_t)0x02			//
-#define USB_ERREN_PIDERREN		(uint8_t)0x01			//
-#define USB0_STAT		*(volatile uint8_t  *)0x40072090 // Status Register
-#define USB_STAT_TX			(uint8_t)0x08			//
-#define USB_STAT_ODD			(uint8_t)0x04			//
-#define USB_STAT_ENDP(n)		(uint8_t)((n) >> 4)		//
-#define USB0_CTL		*(volatile uint8_t  *)0x40072094 // Control Register
-#define USB_CTL_JSTATE			(uint8_t)0x80			//
-#define USB_CTL_SE0			(uint8_t)0x40			//
-#define USB_CTL_TXSUSPENDTOKENBUSY	(uint8_t)0x20			//
-#define USB_CTL_RESET			(uint8_t)0x10			//
-#define USB_CTL_HOSTMODEEN		(uint8_t)0x08			//
-#define USB_CTL_RESUME			(uint8_t)0x04			//
-#define USB_CTL_ODDRST			(uint8_t)0x02			//
-#define USB_CTL_USBENSOFEN		(uint8_t)0x01			//
-#define USB0_ADDR		*(volatile uint8_t  *)0x40072098 // Address Register
-#define USB0_BDTPAGE1		*(volatile uint8_t  *)0x4007209C // BDT Page Register 1
-#define USB0_FRMNUML		*(volatile uint8_t  *)0x400720A0 // Frame Number Register Low
-#define USB0_FRMNUMH		*(volatile uint8_t  *)0x400720A4 // Frame Number Register High
-#define USB0_TOKEN		*(volatile uint8_t  *)0x400720A8 // Token Register
-#define USB0_SOFTHLD		*(volatile uint8_t  *)0x400720AC // SOF Threshold Register
-#define USB0_BDTPAGE2		*(volatile uint8_t  *)0x400720B0 // BDT Page Register 2
-#define USB0_BDTPAGE3		*(volatile uint8_t  *)0x400720B4 // BDT Page Register 3
-#define USB0_ENDPT0		*(volatile uint8_t  *)0x400720C0 // Endpoint Control Register
-#define USB_ENDPT_HOSTWOHUB		(uint8_t)0x80			// host only, enable low speed
-#define USB_ENDPT_RETRYDIS		(uint8_t)0x40			// host only, set to disable NAK retry
-#define USB_ENDPT_EPCTLDIS		(uint8_t)0x10			// 0=control, 1=bulk, interrupt, isync
-#define USB_ENDPT_EPRXEN		(uint8_t)0x08			// enables the endpoint for RX transfers.
-#define USB_ENDPT_EPTXEN		(uint8_t)0x04			// enables the endpoint for TX transfers.
-#define USB_ENDPT_EPSTALL		(uint8_t)0x02			// set to stall endpoint
-#define USB_ENDPT_EPHSHK		(uint8_t)0x01			// enable handshaking during a transaction, generally set unless Isochronous
-#define USB0_ENDPT1		*(volatile uint8_t  *)0x400720C4 // Endpoint Control Register
-#define USB0_ENDPT2		*(volatile uint8_t  *)0x400720C8 // Endpoint Control Register
-#define USB0_ENDPT3		*(volatile uint8_t  *)0x400720CC // Endpoint Control Register
-#define USB0_ENDPT4		*(volatile uint8_t  *)0x400720D0 // Endpoint Control Register
-#define USB0_ENDPT5		*(volatile uint8_t  *)0x400720D4 // Endpoint Control Register
-#define USB0_ENDPT6		*(volatile uint8_t  *)0x400720D8 // Endpoint Control Register
-#define USB0_ENDPT7		*(volatile uint8_t  *)0x400720DC // Endpoint Control Register
-#define USB0_ENDPT8		*(volatile uint8_t  *)0x400720E0 // Endpoint Control Register
-#define USB0_ENDPT9		*(volatile uint8_t  *)0x400720E4 // Endpoint Control Register
-#define USB0_ENDPT10		*(volatile uint8_t  *)0x400720E8 // Endpoint Control Register
-#define USB0_ENDPT11		*(volatile uint8_t  *)0x400720EC // Endpoint Control Register
-#define USB0_ENDPT12		*(volatile uint8_t  *)0x400720F0 // Endpoint Control Register
-#define USB0_ENDPT13		*(volatile uint8_t  *)0x400720F4 // Endpoint Control Register
-#define USB0_ENDPT14		*(volatile uint8_t  *)0x400720F8 // Endpoint Control Register
-#define USB0_ENDPT15		*(volatile uint8_t  *)0x400720FC // Endpoint Control Register
-#define USB0_USBCTRL		*(volatile uint8_t  *)0x40072100 // USB Control Register
-#define USB_USBCTRL_SUSP		(uint8_t)0x80			// Places the USB transceiver into the suspend state.
-#define USB_USBCTRL_PDE			(uint8_t)0x40			// Enables the weak pulldowns on the USB transceiver.
-#define USB0_OBSERVE		*(volatile uint8_t  *)0x40072104 // USB OTG Observe Register
-#define USB_OBSERVE_DPPU		(uint8_t)0x80			//
-#define USB_OBSERVE_DPPD		(uint8_t)0x40			//
-#define USB_OBSERVE_DMPD		(uint8_t)0x10			//
-#define USB0_CONTROL		*(volatile uint8_t  *)0x40072108 // USB OTG Control Register
-#define USB_CONTROL_DPPULLUPNONOTG	(uint8_t)0x10			//  Provides control of the DP PULLUP in the USB OTG module, if USB is configured in non-OTG device mode.
-#define USB0_USBTRC0		*(volatile uint8_t  *)0x4007210C // USB Transceiver Control Register 0
-#define USB_USBTRC_USBRESET		(uint8_t)0x80			//
-#define USB_USBTRC_USBRESMEN		(uint8_t)0x20			//
-#define USB_USBTRC_SYNC_DET		(uint8_t)0x02			//
-#define USB_USBTRC_USB_RESUME_INT	(uint8_t)0x01			//
-#define USB0_USBFRMADJUST	*(volatile uint8_t  *)0x40072114 // Frame Adjust Register
-
-// Chapter 41: USB Device Charger Detection Module (USBDCD)
-#define USBDCD_CONTROL		*(volatile uint32_t *)0x40035000 // Control register
-#define USBDCD_CLOCK		*(volatile uint32_t *)0x40035004 // Clock register
-#define USBDCD_STATUS		*(volatile uint32_t *)0x40035008 // Status register
-#define USBDCD_TIMER0		*(volatile uint32_t *)0x40035010 // TIMER0 register
-#define USBDCD_TIMER1		*(volatile uint32_t *)0x40035014 // TIMER1 register
-#define USBDCD_TIMER2		*(volatile uint32_t *)0x40035018 // TIMER2 register
-
-// Chapter 43: SPI (DSPI)
-#define SPI0_MCR		*(volatile uint32_t *)0x4002C000 // DSPI Module Configuration Register
-#define SPI_MCR_MSTR			(uint32_t)0x80000000		// Master/Slave Mode Select
-#define SPI_MCR_CONT_SCKE		(uint32_t)0x40000000		//
-#define SPI_MCR_DCONF(n)		(((n) & 3) << 28)		//
-#define SPI_MCR_FRZ			(uint32_t)0x08000000		//
-#define SPI_MCR_MTFE			(uint32_t)0x04000000		//
-#define SPI_MCR_ROOE			(uint32_t)0x01000000		//
-#define SPI_MCR_PCSIS(n)		(((n) & 0x1F) << 16)		//
-#define SPI_MCR_DOZE			(uint32_t)0x00008000		//
-#define SPI_MCR_MDIS			(uint32_t)0x00004000		//
-#define SPI_MCR_DIS_TXF			(uint32_t)0x00002000		//
-#define SPI_MCR_DIS_RXF			(uint32_t)0x00001000		//
-#define SPI_MCR_CLR_TXF			(uint32_t)0x00000800		//
-#define SPI_MCR_CLR_RXF			(uint32_t)0x00000400		//
-#define SPI_MCR_SMPL_PT(n)		(((n) & 3) << 8)		//
-#define SPI_MCR_HALT			(uint32_t)0x00000001		//
-#define SPI0_TCR		*(volatile uint32_t *)0x4002C008 // DSPI Transfer Count Register
-#define SPI0_CTAR0		*(volatile uint32_t *)0x4002C00C // DSPI Clock and Transfer Attributes Register, In Master Mode
-#define SPI_CTAR_DBR			(uint32_t)0x80000000		// Double Baud Rate
-#define SPI_CTAR_FMSZ(n)		(((n) & 15) << 27)		// Frame Size (+1)
-#define SPI_CTAR_CPOL			(uint32_t)0x04000000		// Clock Polarity
-#define SPI_CTAR_CPHA			(uint32_t)0x02000000		// Clock Phase
-#define SPI_CTAR_LSBFE			(uint32_t)0x01000000		// LSB First
-#define SPI_CTAR_PCSSCK(n)		(((n) & 3) << 22)		// PCS to SCK Delay Prescaler
-#define SPI_CTAR_PASC(n)		(((n) & 3) << 20)		// After SCK Delay Prescaler
-#define SPI_CTAR_PDT(n)			(((n) & 3) << 18)		// Delay after Transfer Prescaler
-#define SPI_CTAR_PBR(n)			(((n) & 3) << 16)		// Baud Rate Prescaler
-#define SPI_CTAR_CSSCK(n)		(((n) & 15) << 12)		// PCS to SCK Delay Scaler
-#define SPI_CTAR_ASC(n)			(((n) & 15) << 8)		// After SCK Delay Scaler
-#define SPI_CTAR_DT(n)			(((n) & 15) << 4)		// Delay After Transfer Scaler
-#define SPI_CTAR_BR(n)			(((n) & 15) << 0)		// Baud Rate Scaler
-#define SPI0_CTAR0_SLAVE	*(volatile uint32_t *)0x4002C00C // DSPI Clock and Transfer Attributes Register, In Slave Mode
-#define SPI0_CTAR1		*(volatile uint32_t *)0x4002C010 // DSPI Clock and Transfer Attributes Register, In Master Mode
-#define SPI0_SR			*(volatile uint32_t *)0x4002C02C // DSPI Status Register
-#define SPI_SR_TCF			(uint32_t)0x80000000		// Transfer Complete Flag
-#define SPI_SR_TXRXS			(uint32_t)0x40000000		// TX and RX Status
-#define SPI_SR_EOQF			(uint32_t)0x10000000		// End of Queue Flag
-#define SPI_SR_TFUF			(uint32_t)0x08000000		// Transmit FIFO Underflow Flag
-#define SPI_SR_TFFF			(uint32_t)0x02000000		// Transmit FIFO Fill Flag
-#define SPI_SR_RFOF			(uint32_t)0x00080000		// Receive FIFO Overflow Flag
-#define SPI_SR_RFDF			(uint32_t)0x00020000		// Receive FIFO Drain Flag
-#define SPI0_RSER		*(volatile uint32_t *)0x4002C030 // DSPI DMA/Interrupt Request Select and Enable Register
-#define SPI_RSER_TCF_RE			(uint32_t)0x80000000		// Transmission Complete Request Enable
-#define SPI_RSER_EOQF_RE		(uint32_t)0x10000000		// DSPI Finished Request Request Enable
-#define SPI_RSER_TFUF_RE		(uint32_t)0x08000000		// Transmit FIFO Underflow Request Enable
-#define SPI_RSER_TFFF_RE		(uint32_t)0x02000000		// Transmit FIFO Fill Request Enable
-#define SPI_RSER_TFFF_DIRS		(uint32_t)0x01000000		// Transmit FIFO FIll Dma or Interrupt Request Select
-#define SPI_RSER_RFOF_RE		(uint32_t)0x00080000		// Receive FIFO Overflow Request Enable
-#define SPI_RSER_RFDF_RE		(uint32_t)0x00020000		// Receive FIFO Drain Request Enable
-#define SPI_RSER_RFDF_DIRS		(uint32_t)0x00010000		// Receive FIFO Drain DMA or Interrupt Request Select
-#define SPI0_PUSHR		*(volatile uint32_t *)0x4002C034 // DSPI PUSH TX FIFO Register In Master Mode
-#define SPI_PUSHR_CONT			(uint32_t)0x80000000		//
-#define SPI_PUSHR_CTAS(n)		(((n) & 7) << 28)		//
-#define SPI_PUSHR_EOQ			(uint32_t)0x08000000		//
-#define SPI_PUSHR_CTCNT			(uint32_t)0x04000000		//
-#define SPI_PUSHR_PCS(n)		(((n) & 31) << 16)		//
-#define SPI0_PUSHR_SLAVE	*(volatile uint32_t *)0x4002C034 // DSPI PUSH TX FIFO Register In Slave Mode
-#define SPI0_POPR		*(volatile uint32_t *)0x4002C038 // DSPI POP RX FIFO Register
-#define SPI0_TXFR0		*(volatile uint32_t *)0x4002C03C // DSPI Transmit FIFO Registers
-#define SPI0_TXFR1		*(volatile uint32_t *)0x4002C040 // DSPI Transmit FIFO Registers
-#define SPI0_TXFR2		*(volatile uint32_t *)0x4002C044 // DSPI Transmit FIFO Registers
-#define SPI0_TXFR3		*(volatile uint32_t *)0x4002C048 // DSPI Transmit FIFO Registers
-#define SPI0_RXFR0		*(volatile uint32_t *)0x4002C07C // DSPI Receive FIFO Registers
-#define SPI0_RXFR1		*(volatile uint32_t *)0x4002C080 // DSPI Receive FIFO Registers
-#define SPI0_RXFR2		*(volatile uint32_t *)0x4002C084 // DSPI Receive FIFO Registers
-#define SPI0_RXFR3		*(volatile uint32_t *)0x4002C088 // DSPI Receive FIFO Registers
-typedef struct {
-	volatile uint32_t	MCR;	// 0
-	volatile uint32_t	unused1;// 4
-	volatile uint32_t	TCR;	// 8
-	volatile uint32_t	CTAR0;	// c
-	volatile uint32_t	CTAR1;	// 10
-	volatile uint32_t	CTAR2;	// 14
-	volatile uint32_t	CTAR3;	// 18
-	volatile uint32_t	CTAR4;	// 1c
-	volatile uint32_t	CTAR5;	// 20
-	volatile uint32_t	CTAR6;	// 24
-	volatile uint32_t	CTAR7;	// 28
-	volatile uint32_t	SR;	// 2c
-	volatile uint32_t	RSER;	// 30
-	volatile uint32_t	PUSHR;	// 34
-	volatile uint32_t	POPR;	// 38
-	volatile uint32_t	TXFR[16]; // 3c
-	volatile uint32_t	RXFR[16]; // 7c
-} SPI_t;
-#define SPI0		(*(SPI_t *)0x4002C000)
-
-// Chapter 44: Inter-Integrated Circuit (I2C)
-#define I2C0_A1			*(volatile uint8_t  *)0x40066000 // I2C Address Register 1
-#define I2C0_F			*(volatile uint8_t  *)0x40066001 // I2C Frequency Divider register
-#define I2C0_C1			*(volatile uint8_t  *)0x40066002 // I2C Control Register 1
-#define I2C_C1_IICEN			(uint8_t)0x80			// I2C Enable
-#define I2C_C1_IICIE			(uint8_t)0x40			// I2C Interrupt Enable
-#define I2C_C1_MST			(uint8_t)0x20			// Master Mode Select
-#define I2C_C1_TX			(uint8_t)0x10			// Transmit Mode Select
-#define I2C_C1_TXAK			(uint8_t)0x08			// Transmit Acknowledge Enable
-#define I2C_C1_RSTA			(uint8_t)0x04			// Repeat START
-#define I2C_C1_WUEN			(uint8_t)0x02			// Wakeup Enable
-#define I2C_C1_DMAEN			(uint8_t)0x01			// DMA Enable
-#define I2C0_S			*(volatile uint8_t  *)0x40066003 // I2C Status register
-#define I2C_S_TCF			(uint8_t)0x80			// Transfer Complete Flag
-#define I2C_S_IAAS			(uint8_t)0x40			// Addressed As A Slave
-#define I2C_S_BUSY			(uint8_t)0x20			// Bus Busy
-#define I2C_S_ARBL			(uint8_t)0x10			// Arbitration Lost
-#define I2C_S_RAM			(uint8_t)0x08			// Range Address Match
-#define I2C_S_SRW			(uint8_t)0x04			// Slave Read/Write
-#define I2C_S_IICIF			(uint8_t)0x02			// Interrupt Flag
-#define I2C_S_RXAK			(uint8_t)0x01			// Receive Acknowledge
-#define I2C0_D			*(volatile uint8_t  *)0x40066004 // I2C Data I/O register
-#define I2C0_C2			*(volatile uint8_t  *)0x40066005 // I2C Control Register 2
-#define I2C_C2_GCAEN			(uint8_t)0x80			// General Call Address Enable
-#define I2C_C2_ADEXT			(uint8_t)0x40			// Address Extension
-#define I2C_C2_HDRS			(uint8_t)0x20			// High Drive Select
-#define I2C_C2_SBRC			(uint8_t)0x10			// Slave Baud Rate Control
-#define I2C_C2_RMEN			(uint8_t)0x08			// Range Address Matching Enable
-#define I2C_C2_AD(n)			((n) & 7)			// Slave Address, upper 3 bits
-#define I2C0_FLT		*(volatile uint8_t  *)0x40066006 // I2C Programmable Input Glitch Filter register
-#define I2C0_RA			*(volatile uint8_t  *)0x40066007 // I2C Range Address register
-#define I2C0_SMB		*(volatile uint8_t  *)0x40066008 // I2C SMBus Control and Status register
-#define I2C0_A2			*(volatile uint8_t  *)0x40066009 // I2C Address Register 2
-#define I2C0_SLTH		*(volatile uint8_t  *)0x4006600A // I2C SCL Low Timeout Register High
-#define I2C0_SLTL		*(volatile uint8_t  *)0x4006600B // I2C SCL Low Timeout Register Low
-
-#define I2C1_A1			*(volatile uint8_t  *)0x40067000 // I2C Address Register 1
-#define I2C1_F			*(volatile uint8_t  *)0x40067001 // I2C Frequency Divider register
-#define I2C1_C1			*(volatile uint8_t  *)0x40067002 // I2C Control Register 1
-#define I2C1_S			*(volatile uint8_t  *)0x40067003 // I2C Status register
-#define I2C1_D			*(volatile uint8_t  *)0x40067004 // I2C Data I/O register
-#define I2C1_C2			*(volatile uint8_t  *)0x40067005 // I2C Control Register 2
-#define I2C1_FLT		*(volatile uint8_t  *)0x40067006 // I2C Programmable Input Glitch Filter register
-#define I2C1_RA			*(volatile uint8_t  *)0x40067007 // I2C Range Address register
-#define I2C1_SMB		*(volatile uint8_t  *)0x40067008 // I2C SMBus Control and Status register
-#define I2C1_A2			*(volatile uint8_t  *)0x40067009 // I2C Address Register 2
-#define I2C1_SLTH		*(volatile uint8_t  *)0x4006700A // I2C SCL Low Timeout Register High
-#define I2C1_SLTL		*(volatile uint8_t  *)0x4006700B // I2C SCL Low Timeout Register Low
-
-// Chapter 45: Universal Asynchronous Receiver/Transmitter (UART)
-#define UART0_BDH		*(volatile uint8_t  *)0x4006A000 // UART Baud Rate Registers: High
-#define UART0_BDL		*(volatile uint8_t  *)0x4006A001 // UART Baud Rate Registers: Low
-#define UART0_C1		*(volatile uint8_t  *)0x4006A002 // UART Control Register 1
-#define UART_C1_LOOPS			(uint8_t)0x80			// When LOOPS is set, the RxD pin is disconnected from the UART and the transmitter output is internally connected to the receiver input
-#define UART_C1_UARTSWAI		(uint8_t)0x40			// UART Stops in Wait Mode
-#define UART_C1_RSRC			(uint8_t)0x20			// When LOOPS is set, the RSRC field determines the source for the receiver shift register input
-#define UART_C1_M			(uint8_t)0x10			// 9-bit or 8-bit Mode Select
-#define UART_C1_WAKE			(uint8_t)0x08			// Determines which condition wakes the UART
-#define UART_C1_ILT			(uint8_t)0x04			// Idle Line Type Select
-#define UART_C1_PE			(uint8_t)0x02			// Parity Enable
-#define UART_C1_PT			(uint8_t)0x01			// Parity Type, 0=even, 1=odd
-#define UART0_C2		*(volatile uint8_t  *)0x4006A003 // UART Control Register 2
-#define UART_C2_TIE			(uint8_t)0x80			// Transmitter Interrupt or DMA Transfer Enable.
-#define UART_C2_TCIE			(uint8_t)0x40			// Transmission Complete Interrupt Enable
-#define UART_C2_RIE			(uint8_t)0x20			// Receiver Full Interrupt or DMA Transfer Enable
-#define UART_C2_ILIE			(uint8_t)0x10			// Idle Line Interrupt Enable
-#define UART_C2_TE			(uint8_t)0x08			// Transmitter Enable
-#define UART_C2_RE			(uint8_t)0x04			// Receiver Enable
-#define UART_C2_RWU			(uint8_t)0x02			// Receiver Wakeup Control
-#define UART_C2_SBK			(uint8_t)0x01			// Send Break
-#define UART0_S1		*(volatile uint8_t  *)0x4006A004 // UART Status Register 1
-#define UART_S1_TDRE			(uint8_t)0x80			// Transmit Data Register Empty Flag
-#define UART_S1_TC			(uint8_t)0x40			// Transmit Complete Flag
-#define UART_S1_RDRF			(uint8_t)0x20			// Receive Data Register Full Flag
-#define UART_S1_IDLE			(uint8_t)0x10			// Idle Line Flag
-#define UART_S1_OR			(uint8_t)0x08			// Receiver Overrun Flag
-#define UART_S1_NF			(uint8_t)0x04			// Noise Flag
-#define UART_S1_FE			(uint8_t)0x02			// Framing Error Flag
-#define UART_S1_PF			(uint8_t)0x01			// Parity Error Flag
-#define UART0_S2		*(volatile uint8_t  *)0x4006A005 // UART Status Register 2
-#define UART0_C3		*(volatile uint8_t  *)0x4006A006 // UART Control Register 3
-#define UART0_D			*(volatile uint8_t  *)0x4006A007 // UART Data Register
-#define UART0_MA1		*(volatile uint8_t  *)0x4006A008 // UART Match Address Registers 1
-#define UART0_MA2		*(volatile uint8_t  *)0x4006A009 // UART Match Address Registers 2
-#define UART0_C4		*(volatile uint8_t  *)0x4006A00A // UART Control Register 4
-#define UART0_C5		*(volatile uint8_t  *)0x4006A00B // UART Control Register 5
-#define UART0_ED		*(volatile uint8_t  *)0x4006A00C // UART Extended Data Register
-#define UART0_MODEM		*(volatile uint8_t  *)0x4006A00D // UART Modem Register
-#define UART0_IR		*(volatile uint8_t  *)0x4006A00E // UART Infrared Register
-#define UART0_PFIFO		*(volatile uint8_t  *)0x4006A010 // UART FIFO Parameters
-#define UART_PFIFO_TXFE			(uint8_t)0x80
-#define UART_PFIFO_RXFE			(uint8_t)0x08
-#define UART0_CFIFO		*(volatile uint8_t  *)0x4006A011 // UART FIFO Control Register
-#define UART_CFIFO_TXFLUSH		(uint8_t)0x80			//
-#define UART_CFIFO_RXFLUSH		(uint8_t)0x40			//
-#define UART_CFIFO_RXOFE		(uint8_t)0x04			//
-#define UART_CFIFO_TXOFE		(uint8_t)0x02			//
-#define UART_CFIFO_RXUFE		(uint8_t)0x01			//
-#define UART0_SFIFO		*(volatile uint8_t  *)0x4006A012 // UART FIFO Status Register
-#define UART_SFIFO_TXEMPT		(uint8_t)0x80
-#define UART_SFIFO_RXEMPT		(uint8_t)0x40
-#define UART_SFIFO_RXOF			(uint8_t)0x04
-#define UART_SFIFO_TXOF			(uint8_t)0x02
-#define UART_SFIFO_RXUF			(uint8_t)0x01
-#define UART0_TWFIFO		*(volatile uint8_t  *)0x4006A013 // UART FIFO Transmit Watermark
-#define UART0_TCFIFO		*(volatile uint8_t  *)0x4006A014 // UART FIFO Transmit Count
-#define UART0_RWFIFO		*(volatile uint8_t  *)0x4006A015 // UART FIFO Receive Watermark
-#define UART0_RCFIFO		*(volatile uint8_t  *)0x4006A016 // UART FIFO Receive Count
-#define UART0_C7816		*(volatile uint8_t  *)0x4006A018 // UART 7816 Control Register
-#define UART0_IE7816		*(volatile uint8_t  *)0x4006A019 // UART 7816 Interrupt Enable Register
-#define UART0_IS7816		*(volatile uint8_t  *)0x4006A01A // UART 7816 Interrupt Status Register
-#define UART0_WP7816T0		*(volatile uint8_t  *)0x4006A01B // UART 7816 Wait Parameter Register
-#define UART0_WP7816T1		*(volatile uint8_t  *)0x4006A01B // UART 7816 Wait Parameter Register
-#define UART0_WN7816		*(volatile uint8_t  *)0x4006A01C // UART 7816 Wait N Register
-#define UART0_WF7816		*(volatile uint8_t  *)0x4006A01D // UART 7816 Wait FD Register
-#define UART0_ET7816		*(volatile uint8_t  *)0x4006A01E // UART 7816 Error Threshold Register
-#define UART0_TL7816		*(volatile uint8_t  *)0x4006A01F // UART 7816 Transmit Length Register
-#define UART0_C6		*(volatile uint8_t  *)0x4006A021 // UART CEA709.1-B Control Register 6
-#define UART0_PCTH		*(volatile uint8_t  *)0x4006A022 // UART CEA709.1-B Packet Cycle Time Counter High
-#define UART0_PCTL		*(volatile uint8_t  *)0x4006A023 // UART CEA709.1-B Packet Cycle Time Counter Low
-#define UART0_B1T		*(volatile uint8_t  *)0x4006A024 // UART CEA709.1-B Beta1 Timer
-#define UART0_SDTH		*(volatile uint8_t  *)0x4006A025 // UART CEA709.1-B Secondary Delay Timer High
-#define UART0_SDTL		*(volatile uint8_t  *)0x4006A026 // UART CEA709.1-B Secondary Delay Timer Low
-#define UART0_PRE		*(volatile uint8_t  *)0x4006A027 // UART CEA709.1-B Preamble
-#define UART0_TPL		*(volatile uint8_t  *)0x4006A028 // UART CEA709.1-B Transmit Packet Length
-#define UART0_IE		*(volatile uint8_t  *)0x4006A029 // UART CEA709.1-B Interrupt Enable Register
-#define UART0_WB		*(volatile uint8_t  *)0x4006A02A // UART CEA709.1-B WBASE
-#define UART0_S3		*(volatile uint8_t  *)0x4006A02B // UART CEA709.1-B Status Register
-#define UART0_S4		*(volatile uint8_t  *)0x4006A02C // UART CEA709.1-B Status Register
-#define UART0_RPL		*(volatile uint8_t  *)0x4006A02D // UART CEA709.1-B Received Packet Length
-#define UART0_RPREL		*(volatile uint8_t  *)0x4006A02E // UART CEA709.1-B Received Preamble Length
-#define UART0_CPW		*(volatile uint8_t  *)0x4006A02F // UART CEA709.1-B Collision Pulse Width
-#define UART0_RIDT		*(volatile uint8_t  *)0x4006A030 // UART CEA709.1-B Receive Indeterminate Time
-#define UART0_TIDT		*(volatile uint8_t  *)0x4006A031 // UART CEA709.1-B Transmit Indeterminate Time
-#define UART1_BDH		*(volatile uint8_t  *)0x4006B000 // UART Baud Rate Registers: High
-#define UART1_BDL		*(volatile uint8_t  *)0x4006B001 // UART Baud Rate Registers: Low
-#define UART1_C1		*(volatile uint8_t  *)0x4006B002 // UART Control Register 1
-#define UART1_C2		*(volatile uint8_t  *)0x4006B003 // UART Control Register 2
-#define UART1_S1		*(volatile uint8_t  *)0x4006B004 // UART Status Register 1
-#define UART1_S2		*(volatile uint8_t  *)0x4006B005 // UART Status Register 2
-#define UART1_C3		*(volatile uint8_t  *)0x4006B006 // UART Control Register 3
-#define UART1_D			*(volatile uint8_t  *)0x4006B007 // UART Data Register
-#define UART1_MA1		*(volatile uint8_t  *)0x4006B008 // UART Match Address Registers 1
-#define UART1_MA2		*(volatile uint8_t  *)0x4006B009 // UART Match Address Registers 2
-#define UART1_C4		*(volatile uint8_t  *)0x4006B00A // UART Control Register 4
-#define UART1_C5		*(volatile uint8_t  *)0x4006B00B // UART Control Register 5
-#define UART1_ED		*(volatile uint8_t  *)0x4006B00C // UART Extended Data Register
-#define UART1_MODEM		*(volatile uint8_t  *)0x4006B00D // UART Modem Register
-#define UART1_IR		*(volatile uint8_t  *)0x4006B00E // UART Infrared Register
-#define UART1_PFIFO		*(volatile uint8_t  *)0x4006B010 // UART FIFO Parameters
-#define UART1_CFIFO		*(volatile uint8_t  *)0x4006B011 // UART FIFO Control Register
-#define UART1_SFIFO		*(volatile uint8_t  *)0x4006B012 // UART FIFO Status Register
-#define UART1_TWFIFO		*(volatile uint8_t  *)0x4006B013 // UART FIFO Transmit Watermark
-#define UART1_TCFIFO		*(volatile uint8_t  *)0x4006B014 // UART FIFO Transmit Count
-#define UART1_RWFIFO		*(volatile uint8_t  *)0x4006B015 // UART FIFO Receive Watermark
-#define UART1_RCFIFO		*(volatile uint8_t  *)0x4006B016 // UART FIFO Receive Count
-#define UART1_C7816		*(volatile uint8_t  *)0x4006B018 // UART 7816 Control Register
-#define UART1_IE7816		*(volatile uint8_t  *)0x4006B019 // UART 7816 Interrupt Enable Register
-#define UART1_IS7816		*(volatile uint8_t  *)0x4006B01A // UART 7816 Interrupt Status Register
-#define UART1_WP7816T0		*(volatile uint8_t  *)0x4006B01B // UART 7816 Wait Parameter Register
-#define UART1_WP7816T1		*(volatile uint8_t  *)0x4006B01B // UART 7816 Wait Parameter Register
-#define UART1_WN7816		*(volatile uint8_t  *)0x4006B01C // UART 7816 Wait N Register
-#define UART1_WF7816		*(volatile uint8_t  *)0x4006B01D // UART 7816 Wait FD Register
-#define UART1_ET7816		*(volatile uint8_t  *)0x4006B01E // UART 7816 Error Threshold Register
-#define UART1_TL7816		*(volatile uint8_t  *)0x4006B01F // UART 7816 Transmit Length Register
-#define UART1_C6		*(volatile uint8_t  *)0x4006B021 // UART CEA709.1-B Control Register 6
-#define UART1_PCTH		*(volatile uint8_t  *)0x4006B022 // UART CEA709.1-B Packet Cycle Time Counter High
-#define UART1_PCTL		*(volatile uint8_t  *)0x4006B023 // UART CEA709.1-B Packet Cycle Time Counter Low
-#define UART1_B1T		*(volatile uint8_t  *)0x4006B024 // UART CEA709.1-B Beta1 Timer
-#define UART1_SDTH		*(volatile uint8_t  *)0x4006B025 // UART CEA709.1-B Secondary Delay Timer High
-#define UART1_SDTL		*(volatile uint8_t  *)0x4006B026 // UART CEA709.1-B Secondary Delay Timer Low
-#define UART1_PRE		*(volatile uint8_t  *)0x4006B027 // UART CEA709.1-B Preamble
-#define UART1_TPL		*(volatile uint8_t  *)0x4006B028 // UART CEA709.1-B Transmit Packet Length
-#define UART1_IE		*(volatile uint8_t  *)0x4006B029 // UART CEA709.1-B Interrupt Enable Register
-#define UART1_WB		*(volatile uint8_t  *)0x4006B02A // UART CEA709.1-B WBASE
-#define UART1_S3		*(volatile uint8_t  *)0x4006B02B // UART CEA709.1-B Status Register
-#define UART1_S4		*(volatile uint8_t  *)0x4006B02C // UART CEA709.1-B Status Register
-#define UART1_RPL		*(volatile uint8_t  *)0x4006B02D // UART CEA709.1-B Received Packet Length
-#define UART1_RPREL		*(volatile uint8_t  *)0x4006B02E // UART CEA709.1-B Received Preamble Length
-#define UART1_CPW		*(volatile uint8_t  *)0x4006B02F // UART CEA709.1-B Collision Pulse Width
-#define UART1_RIDT		*(volatile uint8_t  *)0x4006B030 // UART CEA709.1-B Receive Indeterminate Time
-#define UART1_TIDT		*(volatile uint8_t  *)0x4006B031 // UART CEA709.1-B Transmit Indeterminate Time
-#define UART2_BDH		*(volatile uint8_t  *)0x4006C000 // UART Baud Rate Registers: High
-#define UART2_BDL		*(volatile uint8_t  *)0x4006C001 // UART Baud Rate Registers: Low
-#define UART2_C1		*(volatile uint8_t  *)0x4006C002 // UART Control Register 1
-#define UART2_C2		*(volatile uint8_t  *)0x4006C003 // UART Control Register 2
-#define UART2_S1		*(volatile uint8_t  *)0x4006C004 // UART Status Register 1
-#define UART2_S2		*(volatile uint8_t  *)0x4006C005 // UART Status Register 2
-#define UART2_C3		*(volatile uint8_t  *)0x4006C006 // UART Control Register 3
-#define UART2_D			*(volatile uint8_t  *)0x4006C007 // UART Data Register
-#define UART2_MA1		*(volatile uint8_t  *)0x4006C008 // UART Match Address Registers 1
-#define UART2_MA2		*(volatile uint8_t  *)0x4006C009 // UART Match Address Registers 2
-#define UART2_C4		*(volatile uint8_t  *)0x4006C00A // UART Control Register 4
-#define UART2_C5		*(volatile uint8_t  *)0x4006C00B // UART Control Register 5
-#define UART2_ED		*(volatile uint8_t  *)0x4006C00C // UART Extended Data Register
-#define UART2_MODEM		*(volatile uint8_t  *)0x4006C00D // UART Modem Register
-#define UART2_IR		*(volatile uint8_t  *)0x4006C00E // UART Infrared Register
-#define UART2_PFIFO		*(volatile uint8_t  *)0x4006C010 // UART FIFO Parameters
-#define UART2_CFIFO		*(volatile uint8_t  *)0x4006C011 // UART FIFO Control Register
-#define UART2_SFIFO		*(volatile uint8_t  *)0x4006C012 // UART FIFO Status Register
-#define UART2_TWFIFO		*(volatile uint8_t  *)0x4006C013 // UART FIFO Transmit Watermark
-#define UART2_TCFIFO		*(volatile uint8_t  *)0x4006C014 // UART FIFO Transmit Count
-#define UART2_RWFIFO		*(volatile uint8_t  *)0x4006C015 // UART FIFO Receive Watermark
-#define UART2_RCFIFO		*(volatile uint8_t  *)0x4006C016 // UART FIFO Receive Count
-#define UART2_C7816		*(volatile uint8_t  *)0x4006C018 // UART 7816 Control Register
-#define UART2_IE7816		*(volatile uint8_t  *)0x4006C019 // UART 7816 Interrupt Enable Register
-#define UART2_IS7816		*(volatile uint8_t  *)0x4006C01A // UART 7816 Interrupt Status Register
-#define UART2_WP7816T0		*(volatile uint8_t  *)0x4006C01B // UART 7816 Wait Parameter Register
-#define UART2_WP7816T1		*(volatile uint8_t  *)0x4006C01B // UART 7816 Wait Parameter Register
-#define UART2_WN7816		*(volatile uint8_t  *)0x4006C01C // UART 7816 Wait N Register
-#define UART2_WF7816		*(volatile uint8_t  *)0x4006C01D // UART 7816 Wait FD Register
-#define UART2_ET7816		*(volatile uint8_t  *)0x4006C01E // UART 7816 Error Threshold Register
-#define UART2_TL7816		*(volatile uint8_t  *)0x4006C01F // UART 7816 Transmit Length Register
-#define UART2_C6		*(volatile uint8_t  *)0x4006C021 // UART CEA709.1-B Control Register 6
-#define UART2_PCTH		*(volatile uint8_t  *)0x4006C022 // UART CEA709.1-B Packet Cycle Time Counter High
-#define UART2_PCTL		*(volatile uint8_t  *)0x4006C023 // UART CEA709.1-B Packet Cycle Time Counter Low
-#define UART2_B1T		*(volatile uint8_t  *)0x4006C024 // UART CEA709.1-B Beta1 Timer
-#define UART2_SDTH		*(volatile uint8_t  *)0x4006C025 // UART CEA709.1-B Secondary Delay Timer High
-#define UART2_SDTL		*(volatile uint8_t  *)0x4006C026 // UART CEA709.1-B Secondary Delay Timer Low
-#define UART2_PRE		*(volatile uint8_t  *)0x4006C027 // UART CEA709.1-B Preamble
-#define UART2_TPL		*(volatile uint8_t  *)0x4006C028 // UART CEA709.1-B Transmit Packet Length
-#define UART2_IE		*(volatile uint8_t  *)0x4006C029 // UART CEA709.1-B Interrupt Enable Register
-#define UART2_WB		*(volatile uint8_t  *)0x4006C02A // UART CEA709.1-B WBASE
-#define UART2_S3		*(volatile uint8_t  *)0x4006C02B // UART CEA709.1-B Status Register
-#define UART2_S4		*(volatile uint8_t  *)0x4006C02C // UART CEA709.1-B Status Register
-#define UART2_RPL		*(volatile uint8_t  *)0x4006C02D // UART CEA709.1-B Received Packet Length
-#define UART2_RPREL		*(volatile uint8_t  *)0x4006C02E // UART CEA709.1-B Received Preamble Length
-#define UART2_CPW		*(volatile uint8_t  *)0x4006C02F // UART CEA709.1-B Collision Pulse Width
-#define UART2_RIDT		*(volatile uint8_t  *)0x4006C030 // UART CEA709.1-B Receive Indeterminate Time
-#define UART2_TIDT		*(volatile uint8_t  *)0x4006C031 // UART CEA709.1-B Transmit Indeterminate Time
-
-// Chapter 46: Synchronous Audio Interface (SAI)
-#define I2S0_TCSR		*(volatile uint32_t *)0x4002F000 // SAI Transmit Control Register
-#define I2S_TCSR_TE			(uint32_t)0x80000000	// Transmitter Enable
-#define I2S_TCSR_STOPE			(uint32_t)0x40000000	// Transmitter Enable in Stop mode
-#define I2S_TCSR_DBGE			(uint32_t)0x20000000	// Transmitter Enable in Debug mode
-#define I2S_TCSR_BCE			(uint32_t)0x10000000	// Bit Clock Enable
-#define I2S_TCSR_FR			(uint32_t)0x02000000	// FIFO Reset
-#define I2S_TCSR_SR			(uint32_t)0x01000000	// Software Reset
-#define I2S_TCSR_WSF			(uint32_t)0x00100000	// Word Start Flag
-#define I2S_TCSR_SEF			(uint32_t)0x00080000	// Sync Error Flag
-#define I2S_TCSR_FEF			(uint32_t)0x00040000	// FIFO Error Flag (underrun)
-#define I2S_TCSR_FWF			(uint32_t)0x00020000	// FIFO Warning Flag (empty)
-#define I2S_TCSR_FRF			(uint32_t)0x00010000	// FIFO Request Flag (Data Ready)
-#define I2S_TCSR_WSIE			(uint32_t)0x00001000	// Word Start Interrupt Enable
-#define I2S_TCSR_SEIE			(uint32_t)0x00000800	// Sync Error Interrupt Enable
-#define I2S_TCSR_FEIE			(uint32_t)0x00000400	// FIFO Error Interrupt Enable
-#define I2S_TCSR_FWIE			(uint32_t)0x00000200	// FIFO Warning Interrupt Enable
-#define I2S_TCSR_FRIE			(uint32_t)0x00000100	// FIFO Request Interrupt Enable
-#define I2S_TCSR_FWDE			(uint32_t)0x00000002	// FIFO Warning DMA Enable
-#define I2S_TCSR_FRDE			(uint32_t)0x00000001	// FIFO Request DMA Enable
-#define I2S0_TCR1		*(volatile uint32_t *)0x4002F004 // SAI Transmit Configuration 1 Register
-#define I2S_TCR1_TFW(n)			((uint32_t)n & 0x03)	      // Transmit FIFO watermark
-#define I2S0_TCR2		*(volatile uint32_t *)0x4002F008 // SAI Transmit Configuration 2 Register
-#define I2S_TCR2_DIV(n)			((uint32_t)n & 0xff)	      // Bit clock divide by (DIV+1)*2
-#define I2S_TCR2_BCD			((uint32_t)1<<24)	      // Bit clock direction
-#define I2S_TCR2_BCP			((uint32_t)1<<25)	      // Bit clock polarity
-#define I2S_TCR2_MSEL(n)		((uint32_t)(n & 3)<<26)	      // MCLK select, 0=bus clock, 1=I2S0_MCLK
-#define I2S_TCR2_BCI			((uint32_t)1<<28)	      // Bit clock input
-#define I2S_TCR2_BCS			((uint32_t)1<<29)	      // Bit clock swap
-#define I2S_TCR2_SYNC(n)		((uint32_t)(n & 3)<<30)	      // 0=async 1=sync with receiver
-#define I2S0_TCR3		*(volatile uint32_t *)0x4002F00C // SAI Transmit Configuration 3 Register
-#define I2S_TCR3_WDFL(n)		((uint32_t)n & 0x0f)	      // word flag configuration
-#define I2S_TCR3_TCE			((uint32_t)0x10000)	      // transmit channel enable
-#define I2S0_TCR4		*(volatile uint32_t *)0x4002F010 // SAI Transmit Configuration 4 Register
-#define I2S_TCR4_FSD			((uint32_t)1)		      // Frame Sync Direction
-#define I2S_TCR4_FSP			((uint32_t)2)		      // Frame Sync Polarity
-#define I2S_TCR4_FSE			((uint32_t)8)		      // Frame Sync Early
-#define I2S_TCR4_MF			((uint32_t)0x10)	      // MSB First
-#define I2S_TCR4_SYWD(n)		((uint32_t)(n & 0x1f)<<8)     // Sync Width
-#define I2S_TCR4_FRSZ(n)		((uint32_t)(n & 0x0f)<<16)    // Frame Size
-#define I2S0_TCR5		*(volatile uint32_t *)0x4002F014 // SAI Transmit Configuration 5 Register
-#define I2S_TCR5_FBT(n)			((uint32_t)(n & 0x1f)<<8)     // First Bit Shifted
-#define I2S_TCR5_W0W(n)			((uint32_t)(n & 0x1f)<<16)    // Word 0 Width
-#define I2S_TCR5_WNW(n)			((uint32_t)(n & 0x1f)<<24)    // Word N Width
-#define I2S0_TDR0		*(volatile uint32_t *)0x4002F020 // SAI Transmit Data Register
-#define I2S0_TDR1		*(volatile uint32_t *)0x4002F024 // SAI Transmit Data Register
-#define I2S0_TFR0		*(volatile uint32_t *)0x4002F040 // SAI Transmit FIFO Register
-#define I2S0_TFR1		*(volatile uint32_t *)0x4002F044 // SAI Transmit FIFO Register
-#define I2S_TFR_RFP(n)			((uint32_t)n & 7)	      // read FIFO pointer
-#define I2S_TFR_WFP(n)			((uint32_t)(n & 7)<<16)	      // write FIFO pointer
-#define I2S0_TMR		*(volatile uint32_t *)0x4002F060 // SAI Transmit Mask Register
-#define I2S_TMR_TWM(n)			((uint32_t)n & 0xFFFFFFFF)
-#define I2S0_RCSR		*(volatile uint32_t *)0x4002F080 // SAI Receive Control Register
-#define I2S_RCSR_RE			(uint32_t)0x80000000	// Receiver Enable
-#define I2S_RCSR_STOPE			(uint32_t)0x40000000	// Receiver Enable in Stop mode
-#define I2S_RCSR_DBGE			(uint32_t)0x20000000	// Receiver Enable in Debug mode
-#define I2S_RCSR_BCE			(uint32_t)0x10000000	// Bit Clock Enable
-#define I2S_RCSR_FR			(uint32_t)0x02000000	// FIFO Reset
-#define I2S_RCSR_SR			(uint32_t)0x01000000	// Software Reset
-#define I2S_RCSR_WSF			(uint32_t)0x00100000	// Word Start Flag
-#define I2S_RCSR_SEF			(uint32_t)0x00080000	// Sync Error Flag
-#define I2S_RCSR_FEF			(uint32_t)0x00040000	// FIFO Error Flag (underrun)
-#define I2S_RCSR_FWF			(uint32_t)0x00020000	// FIFO Warning Flag (empty)
-#define I2S_RCSR_FRF			(uint32_t)0x00010000	// FIFO Request Flag (Data Ready)
-#define I2S_RCSR_WSIE			(uint32_t)0x00001000	// Word Start Interrupt Enable
-#define I2S_RCSR_SEIE			(uint32_t)0x00000800	// Sync Error Interrupt Enable
-#define I2S_RCSR_FEIE			(uint32_t)0x00000400	// FIFO Error Interrupt Enable
-#define I2S_RCSR_FWIE			(uint32_t)0x00000200	// FIFO Warning Interrupt Enable
-#define I2S_RCSR_FRIE			(uint32_t)0x00000100	// FIFO Request Interrupt Enable
-#define I2S_RCSR_FWDE			(uint32_t)0x00000002	// FIFO Warning DMA Enable
-#define I2S_RCSR_FRDE			(uint32_t)0x00000001	// FIFO Request DMA Enable
-#define I2S0_RCR1		*(volatile uint32_t *)0x4002F084 // SAI Receive Configuration 1 Register
-#define I2S_RCR1_RFW(n)			((uint32_t)n & 0x03)	      // Receive FIFO watermark
-#define I2S0_RCR2		*(volatile uint32_t *)0x4002F088 // SAI Receive Configuration 2 Register
-#define I2S_RCR2_DIV(n)			((uint32_t)n & 0xff)	      // Bit clock divide by (DIV+1)*2
-#define I2S_RCR2_BCD			((uint32_t)1<<24)	      // Bit clock direction
-#define I2S_RCR2_BCP			((uint32_t)1<<25)	      // Bit clock polarity
-#define I2S_RCR2_MSEL(n)		((uint32_t)(n & 3)<<26)	      // MCLK select, 0=bus clock, 1=I2S0_MCLK
-#define I2S_RCR2_BCI			((uint32_t)1<<28)	      // Bit clock input
-#define I2S_RCR2_BCS			((uint32_t)1<<29)	      // Bit clock swap
-#define I2S_RCR2_SYNC(n)		((uint32_t)(n & 3)<<30)	      // 0=async 1=sync with receiver
-#define I2S0_RCR3		*(volatile uint32_t *)0x4002F08C // SAI Receive Configuration 3 Register
-#define I2S_RCR3_WDFL(n)		((uint32_t)n & 0x0f)	      // word flag configuration
-#define I2S_RCR3_RCE			((uint32_t)0x10000)	      // receive channel enable
-#define I2S0_RCR4		*(volatile uint32_t *)0x4002F090 // SAI Receive Configuration 4 Register
-#define I2S_RCR4_FSD			((uint32_t)1)		      // Frame Sync Direction
-#define I2S_RCR4_FSP			((uint32_t)2)		      // Frame Sync Polarity
-#define I2S_RCR4_FSE			((uint32_t)8)		      // Frame Sync Early
-#define I2S_RCR4_MF			((uint32_t)0x10)	      // MSB First
-#define I2S_RCR4_SYWD(n)		((uint32_t)(n & 0x1f)<<8)     // Sync Width
-#define I2S_RCR4_FRSZ(n)		((uint32_t)(n & 0x0f)<<16)    // Frame Size
-#define I2S0_RCR5		*(volatile uint32_t *)0x4002F094 // SAI Receive Configuration 5 Register
-#define I2S_RCR5_FBT(n)			((uint32_t)(n & 0x1f)<<8)     // First Bit Shifted
-#define I2S_RCR5_W0W(n)			((uint32_t)(n & 0x1f)<<16)    // Word 0 Width
-#define I2S_RCR5_WNW(n)			((uint32_t)(n & 0x1f)<<24)    // Word N Width
-#define I2S0_RDR0		*(volatile uint32_t *)0x4002F0A0 // SAI Receive Data Register
-#define I2S0_RDR1		*(volatile uint32_t *)0x4002F0A4 // SAI Receive Data Register
-#define I2S0_RFR0		*(volatile uint32_t *)0x4002F0C0 // SAI Receive FIFO Register
-#define I2S0_RFR1		*(volatile uint32_t *)0x4002F0C4 // SAI Receive FIFO Register
-#define I2S_RFR_RFP(n)			((uint32_t)n & 7)	      // read FIFO pointer
-#define I2S_RFR_WFP(n)			((uint32_t)(n & 7)<<16)	      // write FIFO pointer
-#define I2S0_RMR		*(volatile uint32_t *)0x4002F0E0 // SAI Receive Mask Register
-#define I2S_RMR_RWM(n)			((uint32_t)n & 0xFFFFFFFF)
-#define I2S0_MCR		*(volatile uint32_t *)0x4002F100 // SAI MCLK Control Register
-#define I2S_MCR_DUF			((uint32_t)1<<31)	      // Divider Update Flag
-#define I2S_MCR_MOE			((uint32_t)1<<30)	      // MCLK Output Enable
-#define I2S_MCR_MICS(n)			((uint32_t)(n & 3)<<24)	      // MCLK Input Clock Select
-#define I2S0_MDR		*(volatile uint32_t *)0x4002F104 // SAI MCLK Divide Register
-#define I2S_MDR_FRACT(n)		((uint32_t)(n & 0xff)<<12)    // MCLK Fraction
-#define I2S_MDR_DIVIDE(n)		((uint32_t)(n & 0xfff))	      // MCLK Divide
-
-// Chapter 47: General-Purpose Input/Output (GPIO)
-#define GPIOA_PDOR		*(volatile uint32_t *)0x400FF000 // Port Data Output Register
-#define GPIOA_PSOR		*(volatile uint32_t *)0x400FF004 // Port Set Output Register
-#define GPIOA_PCOR		*(volatile uint32_t *)0x400FF008 // Port Clear Output Register
-#define GPIOA_PTOR		*(volatile uint32_t *)0x400FF00C // Port Toggle Output Register
-#define GPIOA_PDIR		*(volatile uint32_t *)0x400FF010 // Port Data Input Register
-#define GPIOA_PDDR		*(volatile uint32_t *)0x400FF014 // Port Data Direction Register
-#define GPIOB_PDOR		*(volatile uint32_t *)0x400FF040 // Port Data Output Register
-#define GPIOB_PSOR		*(volatile uint32_t *)0x400FF044 // Port Set Output Register
-#define GPIOB_PCOR		*(volatile uint32_t *)0x400FF048 // Port Clear Output Register
-#define GPIOB_PTOR		*(volatile uint32_t *)0x400FF04C // Port Toggle Output Register
-#define GPIOB_PDIR		*(volatile uint32_t *)0x400FF050 // Port Data Input Register
-#define GPIOB_PDDR		*(volatile uint32_t *)0x400FF054 // Port Data Direction Register
-#define GPIOC_PDOR		*(volatile uint32_t *)0x400FF080 // Port Data Output Register
-#define GPIOC_PSOR		*(volatile uint32_t *)0x400FF084 // Port Set Output Register
-#define GPIOC_PCOR		*(volatile uint32_t *)0x400FF088 // Port Clear Output Register
-#define GPIOC_PTOR		*(volatile uint32_t *)0x400FF08C // Port Toggle Output Register
-#define GPIOC_PDIR		*(volatile uint32_t *)0x400FF090 // Port Data Input Register
-#define GPIOC_PDDR		*(volatile uint32_t *)0x400FF094 // Port Data Direction Register
-#define GPIOD_PDOR		*(volatile uint32_t *)0x400FF0C0 // Port Data Output Register
-#define GPIOD_PSOR		*(volatile uint32_t *)0x400FF0C4 // Port Set Output Register
-#define GPIOD_PCOR		*(volatile uint32_t *)0x400FF0C8 // Port Clear Output Register
-#define GPIOD_PTOR		*(volatile uint32_t *)0x400FF0CC // Port Toggle Output Register
-#define GPIOD_PDIR		*(volatile uint32_t *)0x400FF0D0 // Port Data Input Register
-#define GPIOD_PDDR		*(volatile uint32_t *)0x400FF0D4 // Port Data Direction Register
-#define GPIOE_PDOR		*(volatile uint32_t *)0x400FF100 // Port Data Output Register
-#define GPIOE_PSOR		*(volatile uint32_t *)0x400FF104 // Port Set Output Register
-#define GPIOE_PCOR		*(volatile uint32_t *)0x400FF108 // Port Clear Output Register
-#define GPIOE_PTOR		*(volatile uint32_t *)0x400FF10C // Port Toggle Output Register
-#define GPIOE_PDIR		*(volatile uint32_t *)0x400FF110 // Port Data Input Register
-#define GPIOE_PDDR		*(volatile uint32_t *)0x400FF114 // Port Data Direction Register
-
-// Chapter 48: Touch sense input (TSI)
-#define TSI0_GENCS		*(volatile uint32_t *)0x40045000 // General Control and Status Register
-#define TSI_GENCS_LPCLKS		(uint32_t)0x10000000		//
-#define TSI_GENCS_LPSCNITV(n)		(((n) & 15) << 24)		//
-#define TSI_GENCS_NSCN(n)		(((n) & 31) << 19)		//
-#define TSI_GENCS_PS(n)			(((n) & 7) << 16)		//
-#define TSI_GENCS_EOSF			(uint32_t)0x00008000		//
-#define TSI_GENCS_OUTRGF		(uint32_t)0x00004000		//
-#define TSI_GENCS_EXTERF		(uint32_t)0x00002000		//
-#define TSI_GENCS_OVRF			(uint32_t)0x00001000		//
-#define TSI_GENCS_SCNIP			(uint32_t)0x00000200		//
-#define TSI_GENCS_SWTS			(uint32_t)0x00000100		//
-#define TSI_GENCS_TSIEN			(uint32_t)0x00000080		//
-#define TSI_GENCS_TSIIE			(uint32_t)0x00000040		//
-#define TSI_GENCS_ERIE			(uint32_t)0x00000020		//
-#define TSI_GENCS_ESOR			(uint32_t)0x00000010		//
-#define TSI_GENCS_STM			(uint32_t)0x00000002		//
-#define TSI_GENCS_STPE			(uint32_t)0x00000001		//
-#define TSI0_SCANC		*(volatile uint32_t *)0x40045004 // SCAN Control Register
-#define TSI_SCANC_REFCHRG(n)		(((n) & 15) << 24)		//
-#define TSI_SCANC_EXTCHRG(n)		(((n) & 7) << 16)		//
-#define TSI_SCANC_SMOD(n)		(((n) & 255) << 8)		//
-#define TSI_SCANC_AMCLKS(n)		(((n) & 3) << 3)		//
-#define TSI_SCANC_AMPSC(n)		(((n) & 7) << 0)		//
-#define TSI0_PEN		*(volatile uint32_t *)0x40045008 // Pin Enable Register
-#define TSI0_WUCNTR		*(volatile uint32_t *)0x4004500C // Wake-Up Channel Counter Register
-#define TSI0_CNTR1		*(volatile uint32_t *)0x40045100 // Counter Register
-#define TSI0_CNTR3		*(volatile uint32_t *)0x40045104 // Counter Register
-#define TSI0_CNTR5		*(volatile uint32_t *)0x40045108 // Counter Register
-#define TSI0_CNTR7		*(volatile uint32_t *)0x4004510C // Counter Register
-#define TSI0_CNTR9		*(volatile uint32_t *)0x40045110 // Counter Register
-#define TSI0_CNTR11		*(volatile uint32_t *)0x40045114 // Counter Register
-#define TSI0_CNTR13		*(volatile uint32_t *)0x40045118 // Counter Register
-#define TSI0_CNTR15		*(volatile uint32_t *)0x4004511C // Counter Register
-#define TSI0_THRESHOLD		*(volatile uint32_t *)0x40045120 // Low Power Channel Threshold Register
-
-// Nested Vectored Interrupt Controller, Table 3-4 & ARMv7 ref, appendix B3.4 (page 750)
-#define NVIC_ENABLE_IRQ(n)	(*((volatile uint32_t *)0xE000E100 + (n >> 5)) = (1 << (n & 31)))
-#define NVIC_DISABLE_IRQ(n)	(*((volatile uint32_t *)0xE000E180 + (n >> 5)) = (1 << (n & 31)))
-#define NVIC_SET_PENDING(n)	(*((volatile uint32_t *)0xE000E200 + (n >> 5)) = (1 << (n & 31)))
-#define NVIC_CLEAR_PENDING(n)	(*((volatile uint32_t *)0xE000E280 + (n >> 5)) = (1 << (n & 31)))
-
-#define NVIC_ISER0		*(volatile uint32_t *)0xE000E100
-#define NVIC_ISER1		*(volatile uint32_t *)0xE000E104
-#define NVIC_ICER0		*(volatile uint32_t *)0xE000E180
-#define NVIC_ICER1		*(volatile uint32_t *)0xE000E184
-
-// 0 = highest priority
-// Cortex-M4: 0,16,32,48,64,80,96,112,128,144,160,176,192,208,224,240
-// Cortex-M0: 0,64,128,192
-#define NVIC_SET_PRIORITY(irqnum, priority)  (*((volatile uint8_t *)0xE000E400 + (irqnum)) = (uint8_t)(priority))
-#define NVIC_GET_PRIORITY(irqnum) (*((uint8_t *)0xE000E400 + (irqnum)))
-
-#if defined(__MK20DX128__)
-#define IRQ_DMA_CH0		0
-#define IRQ_DMA_CH1		1
-#define IRQ_DMA_CH2		2
-#define IRQ_DMA_CH3		3
-#define IRQ_DMA_ERROR		4
-#define IRQ_FTFL_COMPLETE	6
-#define IRQ_FTFL_COLLISION	7
-#define IRQ_LOW_VOLTAGE		8
-#define IRQ_LLWU		9
-#define IRQ_WDOG		10
-#define IRQ_I2C0		11
-#define IRQ_SPI0		12
-#define IRQ_I2S0_TX		13
-#define IRQ_I2S0_RX		14
-#define IRQ_UART0_LON		15
-#define IRQ_UART0_STATUS	16
-#define IRQ_UART0_ERROR		17
-#define IRQ_UART1_STATUS	18
-#define IRQ_UART1_ERROR		19
-#define IRQ_UART2_STATUS	20
-#define IRQ_UART2_ERROR		21
-#define IRQ_ADC0		22
-#define IRQ_CMP0		23
-#define IRQ_CMP1		24
-#define IRQ_FTM0		25
-#define IRQ_FTM1		26
-#define IRQ_CMT			27
-#define IRQ_RTC_ALARM		28
-#define IRQ_RTC_SECOND		29
-#define IRQ_PIT_CH0		30
-#define IRQ_PIT_CH1		31
-#define IRQ_PIT_CH2		32
-#define IRQ_PIT_CH3		33
-#define IRQ_PDB			34
-#define IRQ_USBOTG		35
-#define IRQ_USBDCD		36
-#define IRQ_TSI			37
-#define IRQ_MCG			38
-#define IRQ_LPTMR		39
-#define IRQ_PORTA		40
-#define IRQ_PORTB		41
-#define IRQ_PORTC		42
-#define IRQ_PORTD		43
-#define IRQ_PORTE		44
-#define IRQ_SOFTWARE		45
-#define NVIC_NUM_INTERRUPTS	46
-
-#elif defined(__MK20DX256__)
-#define IRQ_DMA_CH0		0
-#define IRQ_DMA_CH1		1
-#define IRQ_DMA_CH2		2
-#define IRQ_DMA_CH3		3
-#define IRQ_DMA_CH4		4
-#define IRQ_DMA_CH5		5
-#define IRQ_DMA_CH6		6
-#define IRQ_DMA_CH7		7
-#define IRQ_DMA_CH8		8
-#define IRQ_DMA_CH9		9
-#define IRQ_DMA_CH10		10
-#define IRQ_DMA_CH11		11
-#define IRQ_DMA_CH12		12
-#define IRQ_DMA_CH13		13
-#define IRQ_DMA_CH14		14
-#define IRQ_DMA_CH15		15
-#define IRQ_DMA_ERROR		16
-#define IRQ_FTFL_COMPLETE	18
-#define IRQ_FTFL_COLLISION	19
-#define IRQ_LOW_VOLTAGE		20
-#define IRQ_LLWU		21
-#define IRQ_WDOG		22
-#define IRQ_I2C0		24
-#define IRQ_I2C1		25
-#define IRQ_SPI0		26
-#define IRQ_SPI1		27
-#define IRQ_CAN_MESSAGE		29
-#define IRQ_CAN_BUS_OFF		30
-#define IRQ_CAN_ERROR		31
-#define IRQ_CAN_TX_WARN		32
-#define IRQ_CAN_RX_WARN		33
-#define IRQ_CAN_WAKEUP		34
-#define IRQ_I2S0_TX		35
-#define IRQ_I2S0_RX		36
-#define IRQ_UART0_LON		44
-#define IRQ_UART0_STATUS	45
-#define IRQ_UART0_ERROR		46
-#define IRQ_UART1_STATUS	47
-#define IRQ_UART1_ERROR		48
-#define IRQ_UART2_STATUS	49
-#define IRQ_UART2_ERROR		50
-#define IRQ_ADC0		57
-#define IRQ_ADC1		58
-#define IRQ_CMP0		59
-#define IRQ_CMP1		60
-#define IRQ_CMP2		61
-#define IRQ_FTM0		62
-#define IRQ_FTM1		63
-#define IRQ_FTM2		64
-#define IRQ_CMT			65
-#define IRQ_RTC_ALARM		66
-#define IRQ_RTC_SECOND		67
-#define IRQ_PIT_CH0		68
-#define IRQ_PIT_CH1		69
-#define IRQ_PIT_CH2		70
-#define IRQ_PIT_CH3		71
-#define IRQ_PDB			72
-#define IRQ_USBOTG		73
-#define IRQ_USBDCD		74
-#define IRQ_DAC0		81
-#define IRQ_TSI			83
-#define IRQ_MCG			84
-#define IRQ_LPTMR		85
-#define IRQ_PORTA		87
-#define IRQ_PORTB		88
-#define IRQ_PORTC		89
-#define IRQ_PORTD		90
-#define IRQ_PORTE		91
-#define IRQ_SOFTWARE		94
-#define NVIC_NUM_INTERRUPTS	95
-
-#endif
-
-
-
-
-
-#define __disable_irq() __asm__ volatile("CPSID i");
-#define __enable_irq()	__asm__ volatile("CPSIE i");
-
-// System Control Space (SCS), ARMv7 ref manual, B3.2, page 708
-#define SCB_CPUID		*(const	   uint32_t *)0xE000ED00 // CPUID Base Register
-#define SCB_ICSR		*(volatile uint32_t *)0xE000ED04 // Interrupt Control and State
-#define SCB_ICSR_PENDSTSET		(uint32_t)0x04000000
-#define SCB_VTOR		*(volatile uint32_t *)0xE000ED08 // Vector Table Offset
-#define SCB_AIRCR		*(volatile uint32_t *)0xE000ED0C // Application Interrupt and Reset Control
-#define SCB_SCR			*(volatile uint32_t *)0xE000ED10 // System Control Register
-#define SCB_CCR			*(volatile uint32_t *)0xE000ED14 // Configuration and Control
-#define SCB_SHPR1		*(volatile uint32_t *)0xE000ED18 // System Handler Priority Register 1
-#define SCB_SHPR2		*(volatile uint32_t *)0xE000ED1C // System Handler Priority Register 2
-#define SCB_SHPR3		*(volatile uint32_t *)0xE000ED20 // System Handler Priority Register 3
-#define SCB_SHCSR		*(volatile uint32_t *)0xE000ED24 // System Handler Control and State
-#define SCB_CFSR		*(volatile uint32_t *)0xE000ED28 // Configurable Fault Status Register
-#define SCB_HFSR		*(volatile uint32_t *)0xE000ED2C // HardFault Status
-#define SCB_DFSR		*(volatile uint32_t *)0xE000ED30 // Debug Fault Status
-#define SCB_MMFAR		*(volatile uint32_t *)0xE000ED34 // MemManage Fault Address
-
-#define SYST_CSR		*(volatile uint32_t *)0xE000E010 // SysTick Control and Status
-#define SYST_CSR_COUNTFLAG		(uint32_t)0x00010000
-#define SYST_CSR_CLKSOURCE		(uint32_t)0x00000004
-#define SYST_CSR_TICKINT		(uint32_t)0x00000002
-#define SYST_CSR_ENABLE			(uint32_t)0x00000001
-#define SYST_RVR		*(volatile uint32_t *)0xE000E014 // SysTick Reload Value Register
-#define SYST_CVR		*(volatile uint32_t *)0xE000E018 // SysTick Current Value Register
-#define SYST_CALIB		*(const	   uint32_t *)0xE000E01C // SysTick Calibration Value
-
-
-#define ARM_DEMCR		*(volatile uint32_t *)0xE000EDFC // Debug Exception and Monitor Control
-#define ARM_DEMCR_TRCENA		(1 << 24)	 // Enable debugging & monitoring blocks
-#define ARM_DWT_CTRL		*(volatile uint32_t *)0xE0001000 // DWT control register
-#define ARM_DWT_CTRL_CYCCNTENA		(1 << 0)		// Enable cycle count
-#define ARM_DWT_CYCCNT		*(volatile uint32_t *)0xE0001004 // Cycle count register
-
-extern int nvic_execution_priority(void);
-
-extern void nmi_isr(void);
-extern void hard_fault_isr(void);
-extern void memmanage_fault_isr(void);
-extern void bus_fault_isr(void);
-extern void usage_fault_isr(void);
-extern void svcall_isr(void);
-extern void debugmonitor_isr(void);
-extern void pendablesrvreq_isr(void);
-extern void systick_isr(void);
-extern void dma_ch0_isr(void);
-extern void dma_ch1_isr(void);
-extern void dma_ch2_isr(void);
-extern void dma_ch3_isr(void);
-extern void dma_ch4_isr(void);
-extern void dma_ch5_isr(void);
-extern void dma_ch6_isr(void);
-extern void dma_ch7_isr(void);
-extern void dma_ch8_isr(void);
-extern void dma_ch9_isr(void);
-extern void dma_ch10_isr(void);
-extern void dma_ch11_isr(void);
-extern void dma_ch12_isr(void);
-extern void dma_ch13_isr(void);
-extern void dma_ch14_isr(void);
-extern void dma_ch15_isr(void);
-extern void dma_error_isr(void);
-extern void mcm_isr(void);
-extern void flash_cmd_isr(void);
-extern void flash_error_isr(void);
-extern void low_voltage_isr(void);
-extern void wakeup_isr(void);
-extern void watchdog_isr(void);
-extern void i2c0_isr(void);
-extern void i2c1_isr(void);
-extern void i2c2_isr(void);
-extern void spi0_isr(void);
-extern void spi1_isr(void);
-extern void spi2_isr(void);
-extern void sdhc_isr(void);
-extern void can0_message_isr(void);
-extern void can0_bus_off_isr(void);
-extern void can0_error_isr(void);
-extern void can0_tx_warn_isr(void);
-extern void can0_rx_warn_isr(void);
-extern void can0_wakeup_isr(void);
-extern void i2s0_tx_isr(void);
-extern void i2s0_rx_isr(void);
-extern void uart0_lon_isr(void);
-extern void uart0_status_isr(void);
-extern void uart0_error_isr(void);
-extern void uart1_status_isr(void);
-extern void uart1_error_isr(void);
-extern void uart2_status_isr(void);
-extern void uart2_error_isr(void);
-extern void uart3_status_isr(void);
-extern void uart3_error_isr(void);
-extern void uart4_status_isr(void);
-extern void uart4_error_isr(void);
-extern void uart5_status_isr(void);
-extern void uart5_error_isr(void);
-extern void adc0_isr(void);
-extern void adc1_isr(void);
-extern void cmp0_isr(void);
-extern void cmp1_isr(void);
-extern void cmp2_isr(void);
-extern void ftm0_isr(void);
-extern void ftm1_isr(void);
-extern void ftm2_isr(void);
-extern void ftm3_isr(void);
-extern void cmt_isr(void);
-extern void rtc_alarm_isr(void);
-extern void rtc_seconds_isr(void);
-extern void pit0_isr(void);
-extern void pit1_isr(void);
-extern void pit2_isr(void);
-extern void pit3_isr(void);
-extern void pdb_isr(void);
-extern void usb_isr(void);
-extern void usb_charge_isr(void);
-extern void dac0_isr(void);
-extern void dac1_isr(void);
-extern void tsi0_isr(void);
-extern void mcg_isr(void);
-extern void lptmr_isr(void);
-extern void porta_isr(void);
-extern void portb_isr(void);
-extern void portc_isr(void);
-extern void portd_isr(void);
-extern void porte_isr(void);
-extern void software_isr(void);
-
-
-
-#ifdef __cplusplus
-}
-#endif
-#endif
diff --git a/ports/teensy/core/pins_arduino.h b/ports/teensy/core/pins_arduino.h
deleted file mode 100644
index 03674933c2..0000000000
--- a/ports/teensy/core/pins_arduino.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef pins_macros_for_arduino_compatibility_h
-#define pins_macros_for_arduino_compatibility_h
-
-#include <stdint.h>
-
-const static uint8_t A0 = 14;
-const static uint8_t A1 = 15;
-const static uint8_t A2 = 16;
-const static uint8_t A3 = 17;
-const static uint8_t A4 = 18;
-const static uint8_t A5 = 19;
-const static uint8_t A6 = 20;
-const static uint8_t A7 = 21;
-const static uint8_t A8 = 22;
-const static uint8_t A9 = 23;
-const static uint8_t A10 = 34;
-const static uint8_t A11 = 35;
-const static uint8_t A12 = 36;
-const static uint8_t A13 = 37;
-const static uint8_t A14 = 40;
-
-const static uint8_t A15 = 26;
-const static uint8_t A16 = 27;
-const static uint8_t A17 = 28;
-const static uint8_t A18 = 29;
-const static uint8_t A19 = 30;
-const static uint8_t A20 = 31;
-
-const static uint8_t SS = 10;
-const static uint8_t MOSI = 11;
-const static uint8_t MISO = 12;
-const static uint8_t SCK = 13;
-const static uint8_t LED_BUILTIN = 13;
-const static uint8_t SDA = 18;
-const static uint8_t SCL = 19;
-
-
-#define NUM_DIGITAL_PINS 34
-#define NUM_ANALOG_INPUTS 14
-
-#define analogInputToDigitalPin(p) (((p) < 10) ? (p) + 14 : -1)
-#define digitalPinHasPWM(p) (((p) >= 3 && (p) <= 6) || (p) == 9 || (p) == 10 || ((p) >= 20 && (p) <= 23))
-
-#define NOT_AN_INTERRUPT -1
-#define digitalPinToInterrupt(p)  ((p) < NUM_DIGITAL_PINS ? (p) : -1)
-
-
-struct digital_pin_bitband_and_config_table_struct {
-        volatile uint32_t *reg;
-        volatile uint32_t *config;
-};
-extern const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[];
-
-// compatibility macros
-#define digitalPinToPort(pin) (pin)
-#define digitalPinToBitMask(pin) (1)
-#define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0))
-#define portSetRegister(pin)    ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 32))
-#define portClearRegister(pin)  ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 64))
-#define portToggleRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 96))
-#define portInputRegister(pin)  ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 128))
-#define portModeRegister(pin)   ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 160))
-#define portConfigRegister(pin) ((volatile uint32_t *)(digital_pin_to_info_PGM[(pin)].config))
-
-
-#define digitalPinToPortReg(pin) (portOutputRegister(pin))
-#define digitalPinToBit(pin) (1)
-
-
-#define NOT_ON_TIMER 0
-static inline uint8_t digitalPinToTimer(uint8_t) __attribute__((always_inline, unused));
-static inline uint8_t digitalPinToTimer(uint8_t pin)
-{
-	if (pin >= 3 && pin <= 6) return pin - 2;
-	if (pin >= 9 && pin <= 10) return pin - 4;
-	if (pin >= 20 && pin <= 23) return pin - 13;
-	return NOT_ON_TIMER;
-}
-
-
-
-
-#endif
diff --git a/ports/teensy/core/pins_teensy.c b/ports/teensy/core/pins_teensy.c
deleted file mode 100644
index 5817121fad..0000000000
--- a/ports/teensy/core/pins_teensy.c
+++ /dev/null
@@ -1,817 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be 
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows 
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include "core_pins.h"
-#include "pins_arduino.h"
-#include "HardwareSerial.h"
-
-#if 0
-// moved to pins_arduino.h
-struct digital_pin_bitband_and_config_table_struct {
-	volatile uint32_t *reg;
-	volatile uint32_t *config;
-};
-const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[];
-
-// compatibility macros
-#define digitalPinToPort(pin) (pin)
-#define digitalPinToBitMask(pin) (1)
-#define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0))
-#define portSetRegister(pin)    ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 32))
-#define portClearRegister(pin)  ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 64))
-#define portToggleRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 96))
-#define portInputRegister(pin)  ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 128))
-#define portModeRegister(pin)   ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 160))
-#define portConfigRegister(pin) ((volatile uint32_t *)(digital_pin_to_info_PGM[(pin)].config))
-#endif
-
-//#define digitalPinToTimer(P) ( pgm_read_byte( digital_pin_to_timer_PGM + (P) ) )
-//#define analogInPinToBit(P) (P)
-
-#define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
-#define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
-//#define GPIO_SET_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 1)
-//#define GPIO_CLR_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 0)
-
-const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[] = {
-	{GPIO_BITBAND_PTR(CORE_PIN0_PORTREG, CORE_PIN0_BIT), &CORE_PIN0_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN1_PORTREG, CORE_PIN1_BIT), &CORE_PIN1_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN2_PORTREG, CORE_PIN2_BIT), &CORE_PIN2_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN3_PORTREG, CORE_PIN3_BIT), &CORE_PIN3_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN4_PORTREG, CORE_PIN4_BIT), &CORE_PIN4_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN5_PORTREG, CORE_PIN5_BIT), &CORE_PIN5_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN6_PORTREG, CORE_PIN6_BIT), &CORE_PIN6_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN7_PORTREG, CORE_PIN7_BIT), &CORE_PIN7_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN8_PORTREG, CORE_PIN8_BIT), &CORE_PIN8_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN9_PORTREG, CORE_PIN9_BIT), &CORE_PIN9_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN10_PORTREG, CORE_PIN10_BIT), &CORE_PIN10_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN11_PORTREG, CORE_PIN11_BIT), &CORE_PIN11_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN12_PORTREG, CORE_PIN12_BIT), &CORE_PIN12_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN13_PORTREG, CORE_PIN13_BIT), &CORE_PIN13_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN14_PORTREG, CORE_PIN14_BIT), &CORE_PIN14_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN15_PORTREG, CORE_PIN15_BIT), &CORE_PIN15_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN16_PORTREG, CORE_PIN16_BIT), &CORE_PIN16_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN17_PORTREG, CORE_PIN17_BIT), &CORE_PIN17_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN18_PORTREG, CORE_PIN18_BIT), &CORE_PIN18_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN19_PORTREG, CORE_PIN19_BIT), &CORE_PIN19_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN20_PORTREG, CORE_PIN20_BIT), &CORE_PIN20_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN21_PORTREG, CORE_PIN21_BIT), &CORE_PIN21_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN22_PORTREG, CORE_PIN22_BIT), &CORE_PIN22_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN23_PORTREG, CORE_PIN23_BIT), &CORE_PIN23_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN24_PORTREG, CORE_PIN24_BIT), &CORE_PIN24_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN25_PORTREG, CORE_PIN25_BIT), &CORE_PIN25_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN26_PORTREG, CORE_PIN26_BIT), &CORE_PIN26_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN27_PORTREG, CORE_PIN27_BIT), &CORE_PIN27_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN28_PORTREG, CORE_PIN28_BIT), &CORE_PIN28_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN29_PORTREG, CORE_PIN29_BIT), &CORE_PIN29_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN30_PORTREG, CORE_PIN30_BIT), &CORE_PIN30_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN31_PORTREG, CORE_PIN31_BIT), &CORE_PIN31_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN32_PORTREG, CORE_PIN32_BIT), &CORE_PIN32_CONFIG},
-	{GPIO_BITBAND_PTR(CORE_PIN33_PORTREG, CORE_PIN33_BIT), &CORE_PIN33_CONFIG}
-};
-
-
-
-
-typedef void (*voidFuncPtr)(void);
-volatile static voidFuncPtr intFunc[CORE_NUM_DIGITAL];
-
-void init_pin_interrupts(void)
-{
-	//SIM_SCGC5 = 0x00043F82;		// clocks active to all GPIO
-	NVIC_ENABLE_IRQ(IRQ_PORTA);
-	NVIC_ENABLE_IRQ(IRQ_PORTB);
-	NVIC_ENABLE_IRQ(IRQ_PORTC);
-	NVIC_ENABLE_IRQ(IRQ_PORTD);
-	NVIC_ENABLE_IRQ(IRQ_PORTE);
-	// TODO: maybe these should be set to a lower priority
-	// so if the user puts lots of slow code on attachInterrupt
-	// fast interrupts will still be serviced quickly?
-}
-
-void attachInterrupt(uint8_t pin, void (*function)(void), int mode)
-{
-	volatile uint32_t *config;
-	uint32_t cfg, mask;
-
-	if (pin >= CORE_NUM_DIGITAL) return;
-	switch (mode) {
-	  case CHANGE:	mask = 0x0B; break;
-	  case RISING:	mask = 0x09; break;
-	  case FALLING:	mask = 0x0A; break;
-	  case LOW:	mask = 0x08; break;
-	  case HIGH:	mask = 0x0C; break;
-	  default: return;
-	}
-	mask = (mask << 16) | 0x01000000;
-	config = portConfigRegister(pin);
-
-	__disable_irq();
-	cfg = *config;
-	cfg &= ~0x000F0000;		// disable any previous interrupt
-	*config = cfg;
-	intFunc[pin] = function;	// set the function pointer
-	cfg |= mask;
-	*config = cfg;			// enable the new interrupt
-	__enable_irq();
-}
-
-void detachInterrupt(uint8_t pin)
-{
-	volatile uint32_t *config;
-
-	config = portConfigRegister(pin);
-	__disable_irq();
-	*config = ((*config & ~0x000F0000) | 0x01000000);
-	intFunc[pin] = NULL;
-	__enable_irq();
-}
-
-
-void porta_isr(void)
-{
-	uint32_t isfr = PORTA_ISFR;
-	PORTA_ISFR = isfr;
-	if ((isfr & CORE_PIN3_BITMASK) && intFunc[3]) intFunc[3]();
-	if ((isfr & CORE_PIN4_BITMASK) && intFunc[4]) intFunc[4]();
-	if ((isfr & CORE_PIN24_BITMASK) && intFunc[24]) intFunc[24]();
-	if ((isfr & CORE_PIN33_BITMASK) && intFunc[33]) intFunc[33]();
-}
-
-void portb_isr(void)
-{
-	uint32_t isfr = PORTB_ISFR;
-	PORTB_ISFR = isfr;
-	if ((isfr & CORE_PIN0_BITMASK) && intFunc[0]) intFunc[0]();
-	if ((isfr & CORE_PIN1_BITMASK) && intFunc[1]) intFunc[1]();
-	if ((isfr & CORE_PIN16_BITMASK) && intFunc[16]) intFunc[16]();
-	if ((isfr & CORE_PIN17_BITMASK) && intFunc[17]) intFunc[17]();
-	if ((isfr & CORE_PIN18_BITMASK) && intFunc[18]) intFunc[18]();
-	if ((isfr & CORE_PIN19_BITMASK) && intFunc[19]) intFunc[19]();
-	if ((isfr & CORE_PIN25_BITMASK) && intFunc[25]) intFunc[25]();
-	if ((isfr & CORE_PIN32_BITMASK) && intFunc[32]) intFunc[32]();
-}
-
-void portc_isr(void)
-{
-	// TODO: these are inefficient.  Use CLZ somehow....
-	uint32_t isfr = PORTC_ISFR;
-	PORTC_ISFR = isfr;
-	if ((isfr & CORE_PIN9_BITMASK) && intFunc[9]) intFunc[9]();
-	if ((isfr & CORE_PIN10_BITMASK) && intFunc[10]) intFunc[10]();
-	if ((isfr & CORE_PIN11_BITMASK) && intFunc[11]) intFunc[11]();
-	if ((isfr & CORE_PIN12_BITMASK) && intFunc[12]) intFunc[12]();
-	if ((isfr & CORE_PIN13_BITMASK) && intFunc[13]) intFunc[13]();
-	if ((isfr & CORE_PIN15_BITMASK) && intFunc[15]) intFunc[15]();
-	if ((isfr & CORE_PIN22_BITMASK) && intFunc[22]) intFunc[22]();
-	if ((isfr & CORE_PIN23_BITMASK) && intFunc[23]) intFunc[23]();
-	if ((isfr & CORE_PIN27_BITMASK) && intFunc[27]) intFunc[27]();
-	if ((isfr & CORE_PIN28_BITMASK) && intFunc[28]) intFunc[28]();
-	if ((isfr & CORE_PIN29_BITMASK) && intFunc[29]) intFunc[29]();
-	if ((isfr & CORE_PIN30_BITMASK) && intFunc[30]) intFunc[30]();
-}
-
-void portd_isr(void)
-{
-	uint32_t isfr = PORTD_ISFR;
-	PORTD_ISFR = isfr;
-	if ((isfr & CORE_PIN2_BITMASK) && intFunc[2]) intFunc[2]();
-	if ((isfr & CORE_PIN5_BITMASK) && intFunc[5]) intFunc[5]();
-	if ((isfr & CORE_PIN6_BITMASK) && intFunc[6]) intFunc[6]();
-	if ((isfr & CORE_PIN7_BITMASK) && intFunc[7]) intFunc[7]();
-	if ((isfr & CORE_PIN8_BITMASK) && intFunc[8]) intFunc[8]();
-	if ((isfr & CORE_PIN14_BITMASK) && intFunc[14]) intFunc[14]();
-	if ((isfr & CORE_PIN20_BITMASK) && intFunc[20]) intFunc[20]();
-	if ((isfr & CORE_PIN21_BITMASK) && intFunc[21]) intFunc[21]();
-}
-
-void porte_isr(void)
-{
-	uint32_t isfr = PORTE_ISFR;
-	PORTE_ISFR = isfr;
-	if ((isfr & CORE_PIN26_BITMASK) && intFunc[26]) intFunc[26]();
-	if ((isfr & CORE_PIN31_BITMASK) && intFunc[31]) intFunc[31]();
-}
-
-
-
-
-unsigned long rtc_get(void)
-{
-	return RTC_TSR;
-}
-
-void rtc_set(unsigned long t)
-{
-	RTC_SR = 0;
-	RTC_TPR = 0;
-	RTC_TSR = t;
-	RTC_SR = RTC_SR_TCE;
-}
-
-
-// adjust is the amount of crystal error to compensate, 1 = 0.1192 ppm
-// For example, adjust = -100 is slows the clock by 11.92 ppm
-//
-void rtc_compensate(int adjust)
-{
-	uint32_t comp, interval, tcr;
-
-	// This simple approach tries to maximize the interval.
-	// Perhaps minimizing TCR would be better, so the
-	// compensation is distributed more evenly across
-	// many seconds, rather than saving it all up and then
-	// altering one second up to +/- 0.38%
-	if (adjust >= 0) {
-		comp = adjust;
-		interval = 256;
-		while (1) {
-			tcr = comp * interval;
-			if (tcr < 128*256) break;
-			if (--interval == 1) break;
-		}
-		tcr = tcr >> 8;
-	} else {
-		comp = -adjust;
-		interval = 256;
-		while (1) {
-			tcr = comp * interval;
-			if (tcr < 129*256) break;
-			if (--interval == 1) break;
-		}
-		tcr = tcr >> 8;
-		tcr = 256 - tcr;
-	}
-	RTC_TCR = ((interval - 1) << 8) | tcr;
-}
-
-#if 0
-// TODO: build system should define this
-// so RTC is automatically initialized to approx correct time
-// at least when the program begins running right after upload
-#ifndef TIME_T
-#define TIME_T 1350160272
-#endif
-
-void init_rtc(void)
-{
-	serial_print("init_rtc\n");
-	//SIM_SCGC6 |= SIM_SCGC6_RTC;
-
-	// enable the RTC crystal oscillator, for approx 12pf crystal
-	if (!(RTC_CR & RTC_CR_OSCE)) {
-		serial_print("start RTC oscillator\n");
-		RTC_SR = 0;
-		RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
-	}
-	// should wait for crystal to stabilize.....
-
-	serial_print("SR=");
-	serial_phex32(RTC_SR);
-	serial_print("\n");
-	serial_print("CR=");
-	serial_phex32(RTC_CR);
-	serial_print("\n");
-	serial_print("TSR=");
-	serial_phex32(RTC_TSR);
-	serial_print("\n");
-	serial_print("TCR=");
-	serial_phex32(RTC_TCR);
-	serial_print("\n");
-
-	if (RTC_SR & RTC_SR_TIF) {
-		// enable the RTC
-		RTC_SR = 0;
-		RTC_TPR = 0;
-		RTC_TSR = TIME_T;
-		RTC_SR = RTC_SR_TCE;
-	}
-}
-#endif
-
-extern void usb_init(void);
-
-
-// create a default PWM at the same 488.28 Hz as Arduino Uno
-
-#if F_BUS == 60000000
-#define DEFAULT_FTM_MOD (61440 - 1)
-#define DEFAULT_FTM_PRESCALE 1
-#elif F_BUS == 56000000
-#define DEFAULT_FTM_MOD (57344 - 1)
-#define DEFAULT_FTM_PRESCALE 1
-#elif F_BUS == 48000000
-#define DEFAULT_FTM_MOD (49152 - 1)
-#define DEFAULT_FTM_PRESCALE 1
-#elif F_BUS == 40000000
-#define DEFAULT_FTM_MOD (40960 - 1)
-#define DEFAULT_FTM_PRESCALE 1
-#elif F_BUS == 36000000
-#define DEFAULT_FTM_MOD (36864 - 1)
-#define DEFAULT_FTM_PRESCALE 1
-#elif F_BUS == 24000000
-#define DEFAULT_FTM_MOD (49152 - 1)
-#define DEFAULT_FTM_PRESCALE 0
-#elif F_BUS == 16000000
-#define DEFAULT_FTM_MOD (32768 - 1)
-#define DEFAULT_FTM_PRESCALE 0
-#elif F_BUS == 8000000
-#define DEFAULT_FTM_MOD (16384 - 1)
-#define DEFAULT_FTM_PRESCALE 0
-#elif F_BUS == 4000000
-#define DEFAULT_FTM_MOD (8192 - 1)
-#define DEFAULT_FTM_PRESCALE 0
-#elif F_BUS == 2000000
-#define DEFAULT_FTM_MOD (4096 - 1)
-#define DEFAULT_FTM_PRESCALE 0
-#endif
-
-//void init_pins(void)
-void _init_Teensyduino_internal_(void)
-{
-	init_pin_interrupts();
-
-	//SIM_SCGC6 |= SIM_SCGC6_FTM0;	// TODO: use bitband for atomic read-mod-write
-	//SIM_SCGC6 |= SIM_SCGC6_FTM1;
-	FTM0_CNT = 0;
-	FTM0_MOD = DEFAULT_FTM_MOD;
-	FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10
-	FTM0_C1SC = 0x28;
-	FTM0_C2SC = 0x28;
-	FTM0_C3SC = 0x28;
-	FTM0_C4SC = 0x28;
-	FTM0_C5SC = 0x28;
-	FTM0_C6SC = 0x28;
-	FTM0_C7SC = 0x28;
-	FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
-	FTM1_CNT = 0;
-	FTM1_MOD = DEFAULT_FTM_MOD;
-	FTM1_C0SC = 0x28;
-	FTM1_C1SC = 0x28;
-	FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
-#if defined(__MK20DX256__)
-	FTM2_CNT = 0;
-	FTM2_MOD = DEFAULT_FTM_MOD;
-	FTM2_C0SC = 0x28;
-	FTM2_C1SC = 0x28;
-	FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
-#endif
-
-	analog_init();
-	//delay(100); // TODO: this is not necessary, right?
-	delay(4);
-	usb_init();
-}
-
-
-
-static uint8_t analog_write_res = 8;
-
-// SOPT4 is SIM select clocks?
-// FTM is clocked by the bus clock, either 24 or 48 MHz
-// input capture can be FTM1_CH0, CMP0 or CMP1 or USB start of frame
-// 24 MHz with reload 49152 to match Arduino's speed = 488.28125 Hz
-
-void analogWrite(uint8_t pin, int val)
-{
-	uint32_t cval, max;
-
-#if defined(__MK20DX256__)
-	if (pin == A14) {
-		uint8_t res = analog_write_res;
-		if (res < 12) {
-			val <<= 12 - res;
-		} else if (res > 12) {
-			val >>= res - 12;
-		}
-		analogWriteDAC0(val);
-		return;
-	}
-#endif
-
-	max = 1 << analog_write_res;
-	if (val <= 0) {
-		digitalWrite(pin, LOW);
-		pinMode(pin, OUTPUT);	// TODO: implement OUTPUT_LOW
-		return;
-	} else if (val >= max) {
-		digitalWrite(pin, HIGH);
-		pinMode(pin, OUTPUT);	// TODO: implement OUTPUT_HIGH
-		return;
-	}
-
-	//serial_print("analogWrite\n");
-	//serial_print("val = ");
-	//serial_phex32(val);
-	//serial_print("\n");
-	//serial_print("analog_write_res = ");
-	//serial_phex(analog_write_res);
-	//serial_print("\n");
-	if (pin == 3 || pin == 4) {
-		cval = ((uint32_t)val * (uint32_t)(FTM1_MOD + 1)) >> analog_write_res;
-#if defined(__MK20DX256__)
-	} else if (pin == 25 || pin == 32) {
-		cval = ((uint32_t)val * (uint32_t)(FTM2_MOD + 1)) >> analog_write_res;
-#endif
-	} else {
-		cval = ((uint32_t)val * (uint32_t)(FTM0_MOD + 1)) >> analog_write_res;
-	}
-	//serial_print("cval = ");
-	//serial_phex32(cval);
-	//serial_print("\n");
-	switch (pin) {
-	  case 3: // PTA12, FTM1_CH0
-		FTM1_C0V = cval;
-		CORE_PIN3_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 4: // PTA13, FTM1_CH1
-		FTM1_C1V = cval;
-		CORE_PIN4_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 5: // PTD7, FTM0_CH7
-		FTM0_C7V = cval;
-		CORE_PIN5_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 6: // PTD4, FTM0_CH4
-		FTM0_C4V = cval;
-		CORE_PIN6_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 9: // PTC3, FTM0_CH2
-		FTM0_C2V = cval;
-		CORE_PIN9_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 10: // PTC4, FTM0_CH3
-		FTM0_C3V = cval;
-		CORE_PIN10_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 20: // PTD5, FTM0_CH5
-		FTM0_C5V = cval;
-		CORE_PIN20_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 21: // PTD6, FTM0_CH6
-		FTM0_C6V = cval;
-		CORE_PIN21_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 22: // PTC1, FTM0_CH0
-		FTM0_C0V = cval;
-		CORE_PIN22_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 23: // PTC2, FTM0_CH1
-		FTM0_C1V = cval;
-		CORE_PIN23_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-#if defined(__MK20DX256__)
-	  case 32: // PTB18, FTM2_CH0
-		FTM2_C0V = cval;
-		CORE_PIN32_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-	  case 25: // PTB19, FTM1_CH1
-		FTM2_C1V = cval;
-		CORE_PIN25_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
-		break;
-#endif
-	  default:
-		digitalWrite(pin, (val > 127) ? HIGH : LOW);
-		pinMode(pin, OUTPUT);
-	}
-}
-
-void analogWriteRes(uint32_t bits)
-{
-	if (bits < 1) {
-		bits = 1;
-	} else if (bits > 16) {
-		bits = 16;
-	}
-	analog_write_res = bits;
-}
-
-void analogWriteFrequency(uint8_t pin, uint32_t frequency)
-{
-	uint32_t minfreq, prescale, mod;
-
-	//serial_print("analogWriteFrequency: pin = ");
-	//serial_phex(pin);
-	//serial_print(", freq = ");
-	//serial_phex32(frequency);
-	//serial_print("\n");
-	for (prescale = 0; prescale < 7; prescale++) {
-		minfreq = (F_BUS >> 16) >> prescale;
-		if (frequency > minfreq) break;
-	}
-	//serial_print("F_BUS = ");
-	//serial_phex32(F_BUS >> prescale);
-	//serial_print("\n");
-	//serial_print("prescale = ");
-	//serial_phex(prescale);
-	//serial_print("\n");
-	//mod = ((F_BUS >> prescale) / frequency) - 1;
-	mod = (((F_BUS >> prescale) + (frequency >> 1)) / frequency) - 1;
-	if (mod > 65535) mod = 65535;
-	//serial_print("mod = ");
-	//serial_phex32(mod);
-	//serial_print("\n");
-	if (pin == 3 || pin == 4) {
-		FTM1_SC = 0;
-		FTM1_CNT = 0;
-		FTM1_MOD = mod;
-		FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale);
-	} else if (pin == 5 || pin == 6 || pin == 9 || pin == 10 ||
-	  (pin >= 20 && pin <= 23)) {
-		FTM0_SC = 0;
-		FTM0_CNT = 0;
-		FTM0_MOD = mod;
-		FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale);
-	}
-}
-
-
-
-
-// TODO: startup code needs to initialize all pins to GPIO mode, input by default
-
-void digitalWrite(uint8_t pin, uint8_t val)
-{
-	if (pin >= CORE_NUM_DIGITAL) return;
-	if (*portModeRegister(pin)) {
-		if (val) {
-			*portSetRegister(pin) = 1;
-		} else {
-			*portClearRegister(pin) = 1;
-		}
-	} else {
-		volatile uint32_t *config = portConfigRegister(pin);
-		if (val) {
-			// TODO use bitband for atomic read-mod-write
-			*config |= (PORT_PCR_PE | PORT_PCR_PS);
-			//*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS;
-		} else {
-			// TODO use bitband for atomic read-mod-write
-			*config &= ~(PORT_PCR_PE);
-			//*config = PORT_PCR_MUX(1);
-		}
-	}
-
-}
-
-uint8_t digitalRead(uint8_t pin)
-{
-	if (pin >= CORE_NUM_DIGITAL) return 0;
-	return *portInputRegister(pin);
-}
-
-
-
-void pinMode(uint8_t pin, uint8_t mode)
-{
-	volatile uint32_t *config;
-
-	if (pin >= CORE_NUM_DIGITAL) return;
-	config = portConfigRegister(pin);
-
-	if (mode == OUTPUT) {
-		*portModeRegister(pin) = 1;
-		*config = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
-	} else {
-		*portModeRegister(pin) = 0;
-		if (mode == INPUT) {
-			*config = PORT_PCR_MUX(1);
-		} else {
-			*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; // pullup
-		}
-	}
-}
-
-
-void _shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value)
-{
-        if (bitOrder == LSBFIRST) {
-                shiftOut_lsbFirst(dataPin, clockPin, value);
-        } else {
-                shiftOut_msbFirst(dataPin, clockPin, value);
-        }
-}
-
-void shiftOut_lsbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value)
-{
-        uint8_t mask;
-        for (mask=0x01; mask; mask <<= 1) {
-                digitalWrite(dataPin, value & mask);
-                digitalWrite(clockPin, HIGH);
-                digitalWrite(clockPin, LOW);
-        }
-}
-
-void shiftOut_msbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value)
-{
-        uint8_t mask;
-        for (mask=0x80; mask; mask >>= 1) {
-                digitalWrite(dataPin, value & mask);
-                digitalWrite(clockPin, HIGH);
-                digitalWrite(clockPin, LOW);
-        }
-}
-
-uint8_t _shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder)
-{
-        if (bitOrder == LSBFIRST) {
-                return shiftIn_lsbFirst(dataPin, clockPin);
-        } else {
-                return shiftIn_msbFirst(dataPin, clockPin);
-        }
-}
-
-uint8_t shiftIn_lsbFirst(uint8_t dataPin, uint8_t clockPin)
-{
-        uint8_t mask, value=0;
-        for (mask=0x01; mask; mask <<= 1) {
-                digitalWrite(clockPin, HIGH);
-                if (digitalRead(dataPin)) value |= mask;
-                digitalWrite(clockPin, LOW);
-        }
-        return value;
-}
-
-uint8_t shiftIn_msbFirst(uint8_t dataPin, uint8_t clockPin)
-{
-        uint8_t mask, value=0;
-        for (mask=0x80; mask; mask >>= 1) {
-                digitalWrite(clockPin, HIGH);
-                if (digitalRead(dataPin)) value |= mask;
-                digitalWrite(clockPin, LOW);
-        }
-        return value;
-}
-
-
-
-// the systick interrupt is supposed to increment this at 1 kHz rate
-volatile uint32_t systick_millis_count = 0;
-
-//uint32_t systick_current, systick_count, systick_istatus;  // testing only
-
-uint32_t micros(void)
-{
-	uint32_t count, current, istatus;
-
-	__disable_irq();
-	current = SYST_CVR;
-	count = systick_millis_count;
-	istatus = SCB_ICSR;	// bit 26 indicates if systick exception pending
-	__enable_irq();
-	 //systick_current = current;
-	 //systick_count = count;
-	 //systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0;
-	if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++;
-	current = ((F_CPU / 1000) - 1) - current;
-	return count * 1000 + current / (F_CPU / 1000000);
-}
-
-void delay(uint32_t ms)
-{
-	uint32_t start = micros();
-
-	if (ms > 0) {
-		while (1) {
-			if ((micros() - start) >= 1000) {
-				ms--;
-				if (ms == 0) return;
-				start += 1000;
-			}
-			yield();
-		}
-	}
-}
-
-// TODO: verify these result in correct timeouts...
-#if F_CPU == 168000000
-#define PULSEIN_LOOPS_PER_USEC 25
-#elif F_CPU == 144000000
-#define PULSEIN_LOOPS_PER_USEC 21
-#elif F_CPU == 120000000
-#define PULSEIN_LOOPS_PER_USEC 18
-#elif F_CPU == 96000000
-#define PULSEIN_LOOPS_PER_USEC 14
-#elif F_CPU == 72000000
-#define PULSEIN_LOOPS_PER_USEC 10
-#elif F_CPU == 48000000
-#define PULSEIN_LOOPS_PER_USEC 7
-#elif F_CPU == 24000000
-#define PULSEIN_LOOPS_PER_USEC 4
-#elif F_CPU == 16000000
-#define PULSEIN_LOOPS_PER_USEC 1
-#elif F_CPU == 8000000
-#define PULSEIN_LOOPS_PER_USEC 1
-#elif F_CPU == 4000000
-#define PULSEIN_LOOPS_PER_USEC 1
-#elif F_CPU == 2000000
-#define PULSEIN_LOOPS_PER_USEC 1
-#endif
-
-
-uint32_t pulseIn_high(volatile uint8_t *reg, uint32_t timeout)
-{
-	uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC;
-	uint32_t usec_start, usec_stop;
-	
-	// wait for any previous pulse to end
-	while (*reg) {
-		if (--timeout_count == 0) return 0;
-	}
-	// wait for the pulse to start
-	while (!*reg) {
-		if (--timeout_count == 0) return 0;
-	}
-	usec_start = micros();
-	// wait for the pulse to stop
-	while (*reg) {
-		if (--timeout_count == 0) return 0;
-	}
-	usec_stop = micros();
-	return usec_stop - usec_start;
-}
-
-uint32_t pulseIn_low(volatile uint8_t *reg, uint32_t timeout)
-{
-	uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC;
-	uint32_t usec_start, usec_stop;
-	
-	// wait for any previous pulse to end
-	while (!*reg) {
-		if (--timeout_count == 0) return 0;
-	}
-	// wait for the pulse to start
-	while (*reg) {
-		if (--timeout_count == 0) return 0;
-	}
-	usec_start = micros();
-	// wait for the pulse to stop
-	while (!*reg) {
-		if (--timeout_count == 0) return 0;
-	}
-	usec_stop = micros();
-	return usec_stop - usec_start;
-}
-
-// TODO: an inline version should handle the common case where state is const
-uint32_t pulseIn(uint8_t pin, uint8_t state, uint32_t timeout)
-{
-	if (pin >= CORE_NUM_DIGITAL) return 0;
-	if (state) return pulseIn_high(portInputRegister(pin), timeout);
-	return pulseIn_low(portInputRegister(pin), timeout);;
-}
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
diff --git a/ports/teensy/core/usb_desc.c b/ports/teensy/core/usb_desc.c
deleted file mode 100644
index cc1103b9f0..0000000000
--- a/ports/teensy/core/usb_desc.c
+++ /dev/null
@@ -1,895 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#if F_CPU >= 20000000
-
-#include "usb_desc.h"
-#include "usb_names.h"
-#include "mk20dx128.h"
-#include "avr_functions.h"
-
-// USB Descriptors are binary data which the USB host reads to
-// automatically detect a USB device's capabilities.  The format
-// and meaning of every field is documented in numerous USB
-// standards.  When working with USB descriptors, despite the
-// complexity of the standards and poor writing quality in many
-// of those documents, remember descriptors are nothing more
-// than constant binary data that tells the USB host what the
-// device can do.  Computers will load drivers based on this data.
-// Those drivers then communicate on the endpoints specified by
-// the descriptors.
-
-// To configure a new combination of interfaces or make minor
-// changes to existing configuration (eg, change the name or ID
-// numbers), usually you would edit "usb_desc.h".  This file
-// is meant to be configured by the header, so generally it is
-// only edited to add completely new USB interfaces or features.
-
-
-
-// **************************************************************
-//   USB Device
-// **************************************************************
-
-#define LSB(n) ((n) & 255)
-#define MSB(n) (((n) >> 8) & 255)
-
-// USB Device Descriptor.  The USB host reads this first, to learn
-// what type of device is connected.
-static uint8_t device_descriptor[] = {
-        18,                                     // bLength
-        1,                                      // bDescriptorType
-        0x00, 0x02,                             // bcdUSB
-#ifdef DEVICE_CLASS
-        DEVICE_CLASS,                           // bDeviceClass
-#else
-	0,
-#endif
-#ifdef DEVICE_SUBCLASS
-        DEVICE_SUBCLASS,                        // bDeviceSubClass
-#else
-	0,
-#endif
-#ifdef DEVICE_PROTOCOL
-        DEVICE_PROTOCOL,                        // bDeviceProtocol
-#else
-	0,
-#endif
-        EP0_SIZE,                               // bMaxPacketSize0
-        LSB(VENDOR_ID), MSB(VENDOR_ID),         // idVendor
-        LSB(PRODUCT_ID), MSB(PRODUCT_ID),       // idProduct
-        0x00, 0x01,                             // bcdDevice
-        1,                                      // iManufacturer
-        2,                                      // iProduct
-        3,                                      // iSerialNumber
-        1                                       // bNumConfigurations
-};
-
-// These descriptors must NOT be "const", because the USB DMA
-// has trouble accessing flash memory with enough bandwidth
-// while the processor is executing from flash.
-
-
-
-// **************************************************************
-//   HID Report Descriptors
-// **************************************************************
-
-// Each HID interface needs a special report descriptor that tells
-// the meaning and format of the data.
-
-#ifdef KEYBOARD_INTERFACE
-// Keyboard Protocol 1, HID 1.11 spec, Appendix B, page 59-60
-static uint8_t keyboard_report_desc[] = {
-        0x05, 0x01,             //  Usage Page (Generic Desktop),
-        0x09, 0x06,             //  Usage (Keyboard),
-        0xA1, 0x01,             //  Collection (Application),
-        0x75, 0x01,             //  Report Size (1),
-        0x95, 0x08,             //  Report Count (8),
-        0x05, 0x07,             //  Usage Page (Key Codes),
-        0x19, 0xE0,             //  Usage Minimum (224),
-        0x29, 0xE7,             //  Usage Maximum (231),
-        0x15, 0x00,             //  Logical Minimum (0),
-        0x25, 0x01,             //  Logical Maximum (1),
-        0x81, 0x02,             //  Input (Data, Variable, Absolute), ;Modifier byte
-        0x95, 0x08,             //  Report Count (8),
-        0x75, 0x01,             //  Report Size (1),
-        0x15, 0x00,             //  Logical Minimum (0),
-        0x25, 0x01,             //  Logical Maximum (1),
-        0x05, 0x0C,             //  Usage Page (Consumer),
-        0x09, 0xE9,             //  Usage (Volume Increment),
-        0x09, 0xEA,             //  Usage (Volume Decrement),
-        0x09, 0xE2,             //  Usage (Mute),
-        0x09, 0xCD,             //  Usage (Play/Pause),
-        0x09, 0xB5,             //  Usage (Scan Next Track),
-        0x09, 0xB6,             //  Usage (Scan Previous Track),
-        0x09, 0xB7,             //  Usage (Stop),
-        0x09, 0xB8,             //  Usage (Eject),
-        0x81, 0x02,             //  Input (Data, Variable, Absolute), ;Media keys
-        0x95, 0x05,             //  Report Count (5),
-        0x75, 0x01,             //  Report Size (1),
-        0x05, 0x08,             //  Usage Page (LEDs),
-        0x19, 0x01,             //  Usage Minimum (1),
-        0x29, 0x05,             //  Usage Maximum (5),
-        0x91, 0x02,             //  Output (Data, Variable, Absolute), ;LED report
-        0x95, 0x01,             //  Report Count (1),
-        0x75, 0x03,             //  Report Size (3),
-        0x91, 0x03,             //  Output (Constant),                 ;LED report padding
-        0x95, 0x06,             //  Report Count (6),
-        0x75, 0x08,             //  Report Size (8),
-        0x15, 0x00,             //  Logical Minimum (0),
-        0x25, 0x7F,             //  Logical Maximum(104),
-        0x05, 0x07,             //  Usage Page (Key Codes),
-        0x19, 0x00,             //  Usage Minimum (0),
-        0x29, 0x7F,             //  Usage Maximum (104),
-        0x81, 0x00,             //  Input (Data, Array),                ;Normal keys
-        0xc0                    // End Collection
-};
-#endif
-
-#ifdef MOUSE_INTERFACE
-// Mouse Protocol 1, HID 1.11 spec, Appendix B, page 59-60, with wheel extension
-static uint8_t mouse_report_desc[] = {
-        0x05, 0x01,                     // Usage Page (Generic Desktop)
-        0x09, 0x02,                     // Usage (Mouse)
-        0xA1, 0x01,                     // Collection (Application)
-        0x85, 0x01,                     //   REPORT_ID (1)
-        0x05, 0x09,                     //   Usage Page (Button)
-        0x19, 0x01,                     //   Usage Minimum (Button #1)
-        0x29, 0x08,                     //   Usage Maximum (Button #8)
-        0x15, 0x00,                     //   Logical Minimum (0)
-        0x25, 0x01,                     //   Logical Maximum (1)
-        0x95, 0x08,                     //   Report Count (8)
-        0x75, 0x01,                     //   Report Size (1)
-        0x81, 0x02,                     //   Input (Data, Variable, Absolute)
-        0x05, 0x01,                     //   Usage Page (Generic Desktop)
-        0x09, 0x30,                     //   Usage (X)
-        0x09, 0x31,                     //   Usage (Y)
-        0x09, 0x38,                     //   Usage (Wheel)
-        0x15, 0x81,                     //   Logical Minimum (-127)
-        0x25, 0x7F,                     //   Logical Maximum (127)
-        0x75, 0x08,                     //   Report Size (8),
-        0x95, 0x03,                     //   Report Count (3),
-        0x81, 0x06,                     //   Input (Data, Variable, Relative)
-        0xC0,                           // End Collection
-        0x05, 0x01,                     // Usage Page (Generic Desktop)
-        0x09, 0x02,                     // Usage (Mouse)
-        0xA1, 0x01,                     // Collection (Application)
-        0x85, 0x02,                     //   REPORT_ID (2)
-        0x05, 0x01,                     //   Usage Page (Generic Desktop)
-        0x09, 0x30,                     //   Usage (X)
-        0x09, 0x31,                     //   Usage (Y)
-        0x15, 0x00,                     //   Logical Minimum (0)
-        0x26, 0xFF, 0x7F,               //   Logical Maximum (32767)
-        0x75, 0x10,                     //   Report Size (16),
-        0x95, 0x02,                     //   Report Count (2),
-        0x81, 0x02,                     //   Input (Data, Variable, Absolute)
-        0xC0                            // End Collection
-};
-#endif
-
-#ifdef JOYSTICK_INTERFACE
-static uint8_t joystick_report_desc[] = {
-        0x05, 0x01,                     // Usage Page (Generic Desktop)
-        0x09, 0x04,                     // Usage (Joystick)
-        0xA1, 0x01,                     // Collection (Application)
-        0x15, 0x00,                     // Logical Minimum (0)
-        0x25, 0x01,                     // Logical Maximum (1)
-        0x75, 0x01,                     // Report Size (1)
-        0x95, 0x20,                     // Report Count (32)
-        0x05, 0x09,                     // Usage Page (Button)
-        0x19, 0x01,                     // Usage Minimum (Button #1)
-        0x29, 0x20,                     // Usage Maximum (Button #32)
-        0x81, 0x02,                     // Input (variable,absolute)
-        0x15, 0x00,                     // Logical Minimum (0)
-        0x25, 0x07,                     // Logical Maximum (7)
-        0x35, 0x00,                     // Physical Minimum (0)
-        0x46, 0x3B, 0x01,               // Physical Maximum (315)
-        0x75, 0x04,                     // Report Size (4)
-        0x95, 0x01,                     // Report Count (1)
-        0x65, 0x14,                     // Unit (20)
-        0x05, 0x01,                     // Usage Page (Generic Desktop)
-        0x09, 0x39,                     // Usage (Hat switch)
-        0x81, 0x42,                     // Input (variable,absolute,null_state)
-        0x05, 0x01,                     // Usage Page (Generic Desktop)
-        0x09, 0x01,                     // Usage (Pointer)
-        0xA1, 0x00,                     // Collection ()
-        0x15, 0x00,                     //   Logical Minimum (0)
-        0x26, 0xFF, 0x03,               //   Logical Maximum (1023)
-        0x75, 0x0A,                     //   Report Size (10)
-        0x95, 0x04,                     //   Report Count (4)
-        0x09, 0x30,                     //   Usage (X)
-        0x09, 0x31,                     //   Usage (Y)
-        0x09, 0x32,                     //   Usage (Z)
-        0x09, 0x35,                     //   Usage (Rz)
-        0x81, 0x02,                     //   Input (variable,absolute)
-        0xC0,                           // End Collection
-        0x15, 0x00,                     // Logical Minimum (0)
-        0x26, 0xFF, 0x03,               // Logical Maximum (1023)
-        0x75, 0x0A,                     // Report Size (10)
-        0x95, 0x02,                     // Report Count (2)
-        0x09, 0x36,                     // Usage (Slider)
-        0x09, 0x36,                     // Usage (Slider)
-        0x81, 0x02,                     // Input (variable,absolute)
-        0xC0                            // End Collection
-};
-#endif
-
-#ifdef SEREMU_INTERFACE
-static uint8_t seremu_report_desc[] = {
-        0x06, 0xC9, 0xFF,                       // Usage Page 0xFFC9 (vendor defined)
-        0x09, 0x04,                             // Usage 0x04
-        0xA1, 0x5C,                             // Collection 0x5C
-        0x75, 0x08,                             // report size = 8 bits (global)
-        0x15, 0x00,                             // logical minimum = 0 (global)
-        0x26, 0xFF, 0x00,                       // logical maximum = 255 (global)
-        0x95, SEREMU_TX_SIZE,                   // report count (global)
-        0x09, 0x75,                             // usage (local)
-        0x81, 0x02,                             // Input
-        0x95, SEREMU_RX_SIZE,                   // report count (global)
-        0x09, 0x76,                             // usage (local)
-        0x91, 0x02,                             // Output
-        0x95, 0x04,                             // report count (global)
-        0x09, 0x76,                             // usage (local)
-        0xB1, 0x02,                             // Feature
-        0xC0                                    // end collection
-};
-#endif
-
-#ifdef RAWHID_INTERFACE
-static uint8_t rawhid_report_desc[] = {
-        0x06, LSB(RAWHID_USAGE_PAGE), MSB(RAWHID_USAGE_PAGE),
-        0x0A, LSB(RAWHID_USAGE), MSB(RAWHID_USAGE),
-        0xA1, 0x01,                             // Collection 0x01
-        0x75, 0x08,                             // report size = 8 bits
-        0x15, 0x00,                             // logical minimum = 0
-        0x26, 0xFF, 0x00,                       // logical maximum = 255
-        0x95, RAWHID_TX_SIZE,                   // report count
-        0x09, 0x01,                             // usage
-        0x81, 0x02,                             // Input (array)
-        0x95, RAWHID_RX_SIZE,                   // report count
-        0x09, 0x02,                             // usage
-        0x91, 0x02,                             // Output (array)
-        0xC0                                    // end collection
-};
-#endif
-
-#ifdef FLIGHTSIM_INTERFACE
-static uint8_t flightsim_report_desc[] = {
-        0x06, 0x1C, 0xFF,                       // Usage page = 0xFF1C
-        0x0A, 0x39, 0xA7,                       // Usage = 0xA739
-        0xA1, 0x01,                             // Collection 0x01
-        0x75, 0x08,                             // report size = 8 bits
-        0x15, 0x00,                             // logical minimum = 0
-        0x26, 0xFF, 0x00,                       // logical maximum = 255
-        0x95, FLIGHTSIM_TX_SIZE,                // report count
-        0x09, 0x01,                             // usage
-        0x81, 0x02,                             // Input (array)
-        0x95, FLIGHTSIM_RX_SIZE,                // report count
-        0x09, 0x02,                             // usage
-        0x91, 0x02,                             // Output (array)
-        0xC0                                    // end collection
-};
-#endif
-
-
-
-// **************************************************************
-//   USB Configuration
-// **************************************************************
-
-// USB Configuration Descriptor.  This huge descriptor tells all
-// of the devices capbilities.
-static uint8_t config_descriptor[CONFIG_DESC_SIZE] = {
-        // configuration descriptor, USB spec 9.6.3, page 264-266, Table 9-10
-        9,                                      // bLength;
-        2,                                      // bDescriptorType;
-        LSB(CONFIG_DESC_SIZE),                 // wTotalLength
-        MSB(CONFIG_DESC_SIZE),
-        NUM_INTERFACE,                          // bNumInterfaces
-        1,                                      // bConfigurationValue
-        0,                                      // iConfiguration
-        0xC0,                                   // bmAttributes
-        50,                                     // bMaxPower
-
-#ifdef CDC_IAD_DESCRIPTOR
-        // interface association descriptor, USB ECN, Table 9-Z
-        8,                                      // bLength
-        11,                                     // bDescriptorType
-        CDC_STATUS_INTERFACE,                   // bFirstInterface
-        2,                                      // bInterfaceCount
-        0x02,                                   // bFunctionClass
-        0x02,                                   // bFunctionSubClass
-        0x01,                                   // bFunctionProtocol
-        4,                                      // iFunction
-#endif
-
-#ifdef CDC_DATA_INTERFACE
-        // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        CDC_STATUS_INTERFACE,			// bInterfaceNumber
-        0,                                      // bAlternateSetting
-        1,                                      // bNumEndpoints
-        0x02,                                   // bInterfaceClass
-        0x02,                                   // bInterfaceSubClass
-        0x01,                                   // bInterfaceProtocol
-        0,                                      // iInterface
-        // CDC Header Functional Descriptor, CDC Spec 5.2.3.1, Table 26
-        5,                                      // bFunctionLength
-        0x24,                                   // bDescriptorType
-        0x00,                                   // bDescriptorSubtype
-        0x10, 0x01,                             // bcdCDC
-        // Call Management Functional Descriptor, CDC Spec 5.2.3.2, Table 27
-        5,                                      // bFunctionLength
-        0x24,                                   // bDescriptorType
-        0x01,                                   // bDescriptorSubtype
-        0x01,                                   // bmCapabilities
-        1,                                      // bDataInterface
-        // Abstract Control Management Functional Descriptor, CDC Spec 5.2.3.3, Table 28
-        4,                                      // bFunctionLength
-        0x24,                                   // bDescriptorType
-        0x02,                                   // bDescriptorSubtype
-        0x06,                                   // bmCapabilities
-        // Union Functional Descriptor, CDC Spec 5.2.3.8, Table 33
-        5,                                      // bFunctionLength
-        0x24,                                   // bDescriptorType
-        0x06,                                   // bDescriptorSubtype
-        CDC_STATUS_INTERFACE,                   // bMasterInterface
-        CDC_DATA_INTERFACE,                     // bSlaveInterface0
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        CDC_ACM_ENDPOINT | 0x80,                // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        CDC_ACM_SIZE, 0,                        // wMaxPacketSize
-        64,                                     // bInterval
-        // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        CDC_DATA_INTERFACE,                     // bInterfaceNumber
-        0,                                      // bAlternateSetting
-        2,                                      // bNumEndpoints
-        0x0A,                                   // bInterfaceClass
-        0x00,                                   // bInterfaceSubClass
-        0x00,                                   // bInterfaceProtocol
-        0,                                      // iInterface
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        CDC_RX_ENDPOINT,                        // bEndpointAddress
-        0x02,                                   // bmAttributes (0x02=bulk)
-        CDC_RX_SIZE, 0,                         // wMaxPacketSize
-        0,                                      // bInterval
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        CDC_TX_ENDPOINT | 0x80,                 // bEndpointAddress
-        0x02,                                   // bmAttributes (0x02=bulk)
-        CDC_TX_SIZE, 0,                         // wMaxPacketSize
-        0,                                      // bInterval
-#endif // CDC_DATA_INTERFACE
-
-#ifdef MIDI_INTERFACE
-        // Standard MS Interface Descriptor,
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        MIDI_INTERFACE,                         // bInterfaceNumber
-        0,                                      // bAlternateSetting
-        2,                                      // bNumEndpoints
-        0x01,                                   // bInterfaceClass (0x01 = Audio)
-        0x03,                                   // bInterfaceSubClass (0x03 = MIDI)
-        0x00,                                   // bInterfaceProtocol (unused for MIDI)
-        0,                                      // iInterface
-        // MIDI MS Interface Header, USB MIDI 6.1.2.1, page 21, Table 6-2
-        7,                                      // bLength
-        0x24,                                   // bDescriptorType = CS_INTERFACE
-        0x01,                                   // bDescriptorSubtype = MS_HEADER
-        0x00, 0x01,                             // bcdMSC = revision 01.00
-        0x41, 0x00,                             // wTotalLength
-        // MIDI IN Jack Descriptor, B.4.3, Table B-7 (embedded), page 40
-        6,                                      // bLength
-        0x24,                                   // bDescriptorType = CS_INTERFACE
-        0x02,                                   // bDescriptorSubtype = MIDI_IN_JACK
-        0x01,                                   // bJackType = EMBEDDED
-        1,                                      // bJackID, ID = 1
-        0,                                      // iJack
-        // MIDI IN Jack Descriptor, B.4.3, Table B-8 (external), page 40
-        6,                                      // bLength
-        0x24,                                   // bDescriptorType = CS_INTERFACE
-        0x02,                                   // bDescriptorSubtype = MIDI_IN_JACK
-        0x02,                                   // bJackType = EXTERNAL
-        2,                                      // bJackID, ID = 2
-        0,                                      // iJack
-        // MIDI OUT Jack Descriptor, B.4.4, Table B-9, page 41
-        9,
-        0x24,                                   // bDescriptorType = CS_INTERFACE
-        0x03,                                   // bDescriptorSubtype = MIDI_OUT_JACK
-        0x01,                                   // bJackType = EMBEDDED
-        3,                                      // bJackID, ID = 3
-        1,                                      // bNrInputPins = 1 pin
-        2,                                      // BaSourceID(1) = 2
-        1,                                      // BaSourcePin(1) = first pin
-        0,                                      // iJack
-        // MIDI OUT Jack Descriptor, B.4.4, Table B-10, page 41
-        9,
-        0x24,                                   // bDescriptorType = CS_INTERFACE
-        0x03,                                   // bDescriptorSubtype = MIDI_OUT_JACK
-        0x02,                                   // bJackType = EXTERNAL
-        4,                                      // bJackID, ID = 4
-        1,                                      // bNrInputPins = 1 pin
-        1,                                      // BaSourceID(1) = 1
-        1,                                      // BaSourcePin(1) = first pin
-        0,                                      // iJack
-        // Standard Bulk OUT Endpoint Descriptor, B.5.1, Table B-11, pae 42
-        9,                                      // bLength
-        5,                                      // bDescriptorType = ENDPOINT
-        MIDI_RX_ENDPOINT,                       // bEndpointAddress
-        0x02,                                   // bmAttributes (0x02=bulk)
-        MIDI_RX_SIZE, 0,                        // wMaxPacketSize
-        0,                                      // bInterval
-        0,                                      // bRefresh
-        0,                                      // bSynchAddress
-        // Class-specific MS Bulk OUT Endpoint Descriptor, B.5.2, Table B-12, page 42
-        5,                                      // bLength
-        0x25,                                   // bDescriptorSubtype = CS_ENDPOINT
-        0x01,                                   // bJackType = MS_GENERAL
-        1,                                      // bNumEmbMIDIJack = 1 jack
-        1,                                      // BaAssocJackID(1) = jack ID #1
-        // Standard Bulk IN Endpoint Descriptor, B.5.1, Table B-11, pae 42
-        9,                                      // bLength
-        5,                                      // bDescriptorType = ENDPOINT
-        MIDI_TX_ENDPOINT | 0x80,                // bEndpointAddress
-        0x02,                                   // bmAttributes (0x02=bulk)
-        MIDI_TX_SIZE, 0,                        // wMaxPacketSize
-        0,                                      // bInterval
-        0,                                      // bRefresh
-        0,                                      // bSynchAddress
-        // Class-specific MS Bulk IN Endpoint Descriptor, B.5.2, Table B-12, page 42
-        5,                                      // bLength
-        0x25,                                   // bDescriptorSubtype = CS_ENDPOINT
-        0x01,                                   // bJackType = MS_GENERAL
-        1,                                      // bNumEmbMIDIJack = 1 jack
-        3,                                      // BaAssocJackID(1) = jack ID #3
-#endif // MIDI_INTERFACE
-
-#ifdef KEYBOARD_INTERFACE
-        // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        KEYBOARD_INTERFACE,                     // bInterfaceNumber
-        0,                                      // bAlternateSetting
-        1,                                      // bNumEndpoints
-        0x03,                                   // bInterfaceClass (0x03 = HID)
-        0x01,                                   // bInterfaceSubClass (0x01 = Boot)
-        0x01,                                   // bInterfaceProtocol (0x01 = Keyboard)
-        0,                                      // iInterface
-        // HID interface descriptor, HID 1.11 spec, section 6.2.1
-        9,                                      // bLength
-        0x21,                                   // bDescriptorType
-        0x11, 0x01,                             // bcdHID
-        0,                                      // bCountryCode
-        1,                                      // bNumDescriptors
-        0x22,                                   // bDescriptorType
-        LSB(sizeof(keyboard_report_desc)),      // wDescriptorLength
-        MSB(sizeof(keyboard_report_desc)),
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        KEYBOARD_ENDPOINT | 0x80,               // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        KEYBOARD_SIZE, 0,                       // wMaxPacketSize
-        KEYBOARD_INTERVAL,                      // bInterval
-#endif // KEYBOARD_INTERFACE
-
-#ifdef MOUSE_INTERFACE
-        // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        MOUSE_INTERFACE,                        // bInterfaceNumber
-        0,                                      // bAlternateSetting
-        1,                                      // bNumEndpoints
-        0x03,                                   // bInterfaceClass (0x03 = HID)
-        0x00,                                   // bInterfaceSubClass (0x01 = Boot)
-        0x00,                                   // bInterfaceProtocol (0x02 = Mouse)
-        0,                                      // iInterface
-        // HID interface descriptor, HID 1.11 spec, section 6.2.1
-        9,                                      // bLength
-        0x21,                                   // bDescriptorType
-        0x11, 0x01,                             // bcdHID
-        0,                                      // bCountryCode
-        1,                                      // bNumDescriptors
-        0x22,                                   // bDescriptorType
-        LSB(sizeof(mouse_report_desc)),         // wDescriptorLength
-        MSB(sizeof(mouse_report_desc)),
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        MOUSE_ENDPOINT | 0x80,                  // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        MOUSE_SIZE, 0,                          // wMaxPacketSize
-        MOUSE_INTERVAL,                         // bInterval
-#endif // MOUSE_INTERFACE
-
-#ifdef RAWHID_INTERFACE
-        // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        RAWHID_INTERFACE,                       // bInterfaceNumber
-        0,                                      // bAlternateSetting
-        2,                                      // bNumEndpoints
-        0x03,                                   // bInterfaceClass (0x03 = HID)
-        0x00,                                   // bInterfaceSubClass
-        0x00,                                   // bInterfaceProtocol
-        0,                                      // iInterface
-        // HID interface descriptor, HID 1.11 spec, section 6.2.1
-        9,                                      // bLength
-        0x21,                                   // bDescriptorType
-        0x11, 0x01,                             // bcdHID
-        0,                                      // bCountryCode
-        1,                                      // bNumDescriptors
-        0x22,                                   // bDescriptorType
-        LSB(sizeof(rawhid_report_desc)),        // wDescriptorLength
-        MSB(sizeof(rawhid_report_desc)),
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        RAWHID_TX_ENDPOINT | 0x80,              // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        RAWHID_TX_SIZE, 0,                      // wMaxPacketSize
-        RAWHID_TX_INTERVAL,                     // bInterval
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        RAWHID_RX_ENDPOINT,                     // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        RAWHID_RX_SIZE, 0,                      // wMaxPacketSize
-        RAWHID_RX_INTERVAL,			// bInterval
-#endif // RAWHID_INTERFACE
-
-#ifdef FLIGHTSIM_INTERFACE
-        // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        FLIGHTSIM_INTERFACE,                    // bInterfaceNumber
-        0,                                      // bAlternateSetting
-        2,                                      // bNumEndpoints
-        0x03,                                   // bInterfaceClass (0x03 = HID)
-        0x00,                                   // bInterfaceSubClass
-        0x00,                                   // bInterfaceProtocol
-        0,                                      // iInterface
-        // HID interface descriptor, HID 1.11 spec, section 6.2.1
-        9,                                      // bLength
-        0x21,                                   // bDescriptorType
-        0x11, 0x01,                             // bcdHID
-        0,                                      // bCountryCode
-        1,                                      // bNumDescriptors
-        0x22,                                   // bDescriptorType
-        LSB(sizeof(flightsim_report_desc)),     // wDescriptorLength
-        MSB(sizeof(flightsim_report_desc)),
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        FLIGHTSIM_TX_ENDPOINT | 0x80,           // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        FLIGHTSIM_TX_SIZE, 0,                   // wMaxPacketSize
-        FLIGHTSIM_TX_INTERVAL,                  // bInterval
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        FLIGHTSIM_RX_ENDPOINT,                  // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        FLIGHTSIM_RX_SIZE, 0,                   // wMaxPacketSize
-        FLIGHTSIM_RX_INTERVAL,			// bInterval
-#endif // FLIGHTSIM_INTERFACE
-
-#ifdef SEREMU_INTERFACE
-        // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        SEREMU_INTERFACE,                       // bInterfaceNumber
-        0,                                      // bAlternateSetting
-        2,                                      // bNumEndpoints
-        0x03,                                   // bInterfaceClass (0x03 = HID)
-        0x00,                                   // bInterfaceSubClass
-        0x00,                                   // bInterfaceProtocol
-        0,                                      // iInterface
-        // HID interface descriptor, HID 1.11 spec, section 6.2.1
-        9,                                      // bLength
-        0x21,                                   // bDescriptorType
-        0x11, 0x01,                             // bcdHID
-        0,                                      // bCountryCode
-        1,                                      // bNumDescriptors
-        0x22,                                   // bDescriptorType
-        LSB(sizeof(seremu_report_desc)),        // wDescriptorLength
-        MSB(sizeof(seremu_report_desc)),
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        SEREMU_TX_ENDPOINT | 0x80,              // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        SEREMU_TX_SIZE, 0,                      // wMaxPacketSize
-        SEREMU_TX_INTERVAL,                     // bInterval
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        SEREMU_RX_ENDPOINT,                     // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        SEREMU_RX_SIZE, 0,                      // wMaxPacketSize
-        SEREMU_RX_INTERVAL,			// bInterval
-#endif // SEREMU_INTERFACE
-
-#ifdef JOYSTICK_INTERFACE
-        // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12
-        9,                                      // bLength
-        4,                                      // bDescriptorType
-        JOYSTICK_INTERFACE,                     // bInterfaceNumber
-        0,                                      // bAlternateSetting
-        1,                                      // bNumEndpoints
-        0x03,                                   // bInterfaceClass (0x03 = HID)
-        0x00,                                   // bInterfaceSubClass
-        0x00,                                   // bInterfaceProtocol
-        0,                                      // iInterface
-        // HID interface descriptor, HID 1.11 spec, section 6.2.1
-        9,                                      // bLength
-        0x21,                                   // bDescriptorType
-        0x11, 0x01,                             // bcdHID
-        0,                                      // bCountryCode
-        1,                                      // bNumDescriptors
-        0x22,                                   // bDescriptorType
-        LSB(sizeof(joystick_report_desc)),      // wDescriptorLength
-        MSB(sizeof(joystick_report_desc)),
-        // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
-        7,                                      // bLength
-        5,                                      // bDescriptorType
-        JOYSTICK_ENDPOINT | 0x80,               // bEndpointAddress
-        0x03,                                   // bmAttributes (0x03=intr)
-        JOYSTICK_SIZE, 0,                       // wMaxPacketSize
-        JOYSTICK_INTERVAL,                      // bInterval
-#endif // JOYSTICK_INTERFACE
-
-};
-
-
-// **************************************************************
-//   String Descriptors
-// **************************************************************
-
-// The descriptors above can provide human readable strings,
-// referenced by index numbers.  These descriptors are the
-// actual string data
-
-/* defined in usb_names.h
-struct usb_string_descriptor_struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t wString[];
-};
-*/
-
-extern struct usb_string_descriptor_struct usb_string_manufacturer_name
-        __attribute__ ((weak, alias("usb_string_manufacturer_name_default")));
-extern struct usb_string_descriptor_struct usb_string_product_name
-        __attribute__ ((weak, alias("usb_string_product_name_default")));
-extern struct usb_string_descriptor_struct usb_string_serial_number
-        __attribute__ ((weak, alias("usb_string_serial_number_default")));
-
-struct usb_string_descriptor_struct string0 = {
-        4,
-        3,
-        {0x0409}
-};
-
-struct usb_string_descriptor_struct usb_string_manufacturer_name_default = {
-        2 + MANUFACTURER_NAME_LEN * 2,
-        3,
-        MANUFACTURER_NAME
-};
-struct usb_string_descriptor_struct usb_string_product_name_default = {
-	2 + PRODUCT_NAME_LEN * 2,
-        3,
-        PRODUCT_NAME
-};
-struct usb_string_descriptor_struct usb_string_serial_number_default = {
-        12,
-        3,
-        {0,0,0,0,0,0,0,0,0,0}
-};
-
-void usb_init_serialnumber(void)
-{
-	char buf[11];
-	uint32_t i, num;
-
-	__disable_irq();
-	FTFL_FSTAT = FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL;
-	FTFL_FCCOB0 = 0x41;
-	FTFL_FCCOB1 = 15;
-	FTFL_FSTAT = FTFL_FSTAT_CCIF;
-	while (!(FTFL_FSTAT & FTFL_FSTAT_CCIF)) ; // wait
-	num = *(uint32_t *)&FTFL_FCCOB7;
-	__enable_irq();
-	// add extra zero to work around OS-X CDC-ACM driver bug
-	if (num < 10000000) num = num * 10;
-	ultoa(num, buf, 10);
-	for (i=0; i<10; i++) {
-		char c = buf[i];
-		if (!c) break;
-		usb_string_serial_number_default.wString[i] = c;
-	}
-	usb_string_serial_number_default.bLength = i * 2 + 2;
-}
-
-
-// **************************************************************
-//   Descriptors List
-// **************************************************************
-
-// This table provides access to all the descriptor data above.
-
-const usb_descriptor_list_t usb_descriptor_list[] = {
-	//wValue, wIndex, address,          length
-	{0x0100, 0x0000, device_descriptor, sizeof(device_descriptor)},
-	{0x0200, 0x0000, config_descriptor, sizeof(config_descriptor)},
-#ifdef SEREMU_INTERFACE
-	{0x2200, SEREMU_INTERFACE, seremu_report_desc, sizeof(seremu_report_desc)},
-	{0x2100, SEREMU_INTERFACE, config_descriptor+SEREMU_DESC_OFFSET, 9},
-#endif
-#ifdef KEYBOARD_INTERFACE
-        {0x2200, KEYBOARD_INTERFACE, keyboard_report_desc, sizeof(keyboard_report_desc)},
-        {0x2100, KEYBOARD_INTERFACE, config_descriptor+KEYBOARD_DESC_OFFSET, 9},
-#endif
-#ifdef MOUSE_INTERFACE
-        {0x2200, MOUSE_INTERFACE, mouse_report_desc, sizeof(mouse_report_desc)},
-        {0x2100, MOUSE_INTERFACE, config_descriptor+MOUSE_DESC_OFFSET, 9},
-#endif
-#ifdef JOYSTICK_INTERFACE
-        {0x2200, JOYSTICK_INTERFACE, joystick_report_desc, sizeof(joystick_report_desc)},
-        {0x2100, JOYSTICK_INTERFACE, config_descriptor+JOYSTICK_DESC_OFFSET, 9},
-#endif
-#ifdef RAWHID_INTERFACE
-	{0x2200, RAWHID_INTERFACE, rawhid_report_desc, sizeof(rawhid_report_desc)},
-	{0x2100, RAWHID_INTERFACE, config_descriptor+RAWHID_DESC_OFFSET, 9},
-#endif
-#ifdef FLIGHTSIM_INTERFACE
-	{0x2200, FLIGHTSIM_INTERFACE, flightsim_report_desc, sizeof(flightsim_report_desc)},
-	{0x2100, FLIGHTSIM_INTERFACE, config_descriptor+FLIGHTSIM_DESC_OFFSET, 9},
-#endif
-        {0x0300, 0x0000, (const uint8_t *)&string0, 0},
-        {0x0301, 0x0409, (const uint8_t *)&usb_string_manufacturer_name, 0},
-        {0x0302, 0x0409, (const uint8_t *)&usb_string_product_name, 0},
-        {0x0303, 0x0409, (const uint8_t *)&usb_string_serial_number, 0},
-        //{0x0301, 0x0409, (const uint8_t *)&string1, 0},
-        //{0x0302, 0x0409, (const uint8_t *)&string2, 0},
-        //{0x0303, 0x0409, (const uint8_t *)&string3, 0},
-	{0, 0, NULL, 0}
-};
-
-
-// **************************************************************
-//   Endpoint Configuration
-// **************************************************************
-
-#if 0
-// 0x00 = not used
-// 0x19 = Receive only
-// 0x15 = Transmit only
-// 0x1D = Transmit & Receive
-//
-const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] =
-{
-	0x00, 0x15, 0x19, 0x15, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-#endif
-
-
-const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] =
-{
-#if (defined(ENDPOINT1_CONFIG) && NUM_ENDPOINTS >= 1)
-	ENDPOINT1_CONFIG,
-#elif (NUM_ENDPOINTS >= 1)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT2_CONFIG) && NUM_ENDPOINTS >= 2)
-	ENDPOINT2_CONFIG,
-#elif (NUM_ENDPOINTS >= 2)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT3_CONFIG) && NUM_ENDPOINTS >= 3)
-	ENDPOINT3_CONFIG,
-#elif (NUM_ENDPOINTS >= 3)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT4_CONFIG) && NUM_ENDPOINTS >= 4)
-	ENDPOINT4_CONFIG,
-#elif (NUM_ENDPOINTS >= 4)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT5_CONFIG) && NUM_ENDPOINTS >= 5)
-	ENDPOINT5_CONFIG,
-#elif (NUM_ENDPOINTS >= 5)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT6_CONFIG) && NUM_ENDPOINTS >= 6)
-	ENDPOINT6_CONFIG,
-#elif (NUM_ENDPOINTS >= 6)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT7_CONFIG) && NUM_ENDPOINTS >= 7)
-	ENDPOINT7_CONFIG,
-#elif (NUM_ENDPOINTS >= 7)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT8_CONFIG) && NUM_ENDPOINTS >= 8)
-	ENDPOINT8_CONFIG,
-#elif (NUM_ENDPOINTS >= 8)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT9_CONFIG) && NUM_ENDPOINTS >= 9)
-	ENDPOINT9_CONFIG,
-#elif (NUM_ENDPOINTS >= 9)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT10_CONFIG) && NUM_ENDPOINTS >= 10)
-	ENDPOINT10_CONFIG,
-#elif (NUM_ENDPOINTS >= 10)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT11_CONFIG) && NUM_ENDPOINTS >= 11)
-	ENDPOINT11_CONFIG,
-#elif (NUM_ENDPOINTS >= 11)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT12_CONFIG) && NUM_ENDPOINTS >= 12)
-	ENDPOINT12_CONFIG,
-#elif (NUM_ENDPOINTS >= 12)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT13_CONFIG) && NUM_ENDPOINTS >= 13)
-	ENDPOINT13_CONFIG,
-#elif (NUM_ENDPOINTS >= 13)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT14_CONFIG) && NUM_ENDPOINTS >= 14)
-	ENDPOINT14_CONFIG,
-#elif (NUM_ENDPOINTS >= 14)
-	ENDPOINT_UNUSED,
-#endif
-#if (defined(ENDPOINT15_CONFIG) && NUM_ENDPOINTS >= 15)
-	ENDPOINT15_CONFIG,
-#elif (NUM_ENDPOINTS >= 15)
-	ENDPOINT_UNUSED,
-#endif
-};
-
-
-
-#endif // F_CPU >= 20 MHz
diff --git a/ports/teensy/core/usb_desc.h b/ports/teensy/core/usb_desc.h
deleted file mode 100644
index 49ecf86aeb..0000000000
--- a/ports/teensy/core/usb_desc.h
+++ /dev/null
@@ -1,313 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _usb_desc_h_
-#define _usb_desc_h_
-
-#if F_CPU >= 20000000
-
-// This header is NOT meant to be included when compiling
-// user sketches in Arduino.  The low-level functions
-// provided by usb_dev.c are meant to be called only by
-// code which provides higher-level interfaces to the user.
-
-#include <stdint.h>
-#include <stddef.h>
-
-#define ENDPOINT_UNUSED			0x00
-#define ENDPOINT_TRANSIMIT_ONLY		0x15
-#define ENDPOINT_RECEIVE_ONLY		0x19
-#define ENDPOINT_TRANSMIT_AND_RECEIVE	0x1D
-
-/*
-To modify a USB Type to have different interfaces, start in this
-file.  Delete the XYZ_INTERFACE lines for any interfaces you
-wish to remove, and copy them from another USB Type for any you
-want to add.
-
-Give each interface a unique number, and edit NUM_INTERFACE to
-reflect the number of interfaces.
-
-Within each interface, make sure it uses a unique set of endpoints.
-Edit NUM_ENDPOINTS to be at least the largest endpoint number used.
-Then edit the ENDPOINT*_CONFIG lines so each endpoint is configured
-the proper way (transmit, receive, or both).
-
-The CONFIG_DESC_SIZE and any XYZ_DESC_OFFSET numbers must be
-edited to the correct sizes.  See usb_desc.c for the giant array
-of bytes.  Someday these may be done automatically..... (but how?)
-
-If you are using existing interfaces, the code in each file should
-automatically adapt to the changes you specify.  If you need to
-create a new type of interface, you'll need to write the code which
-sends and receives packets, and presents an API to the user.
-
-Finally, edit usb_inst.cpp, which creates instances of the C++
-objects for each combination.
-
-Some operating systems, especially Windows, may cache USB device
-info.  Changes to the device name may not update on the same
-computer unless the vendor or product ID numbers change, or the
-"bcdDevice" revision code is increased.
-
-If these instructions are missing steps or could be improved, please
-let me know?  http://forum.pjrc.com/forums/4-Suggestions-amp-Bug-Reports
-*/
-
-
-
-#if defined(USB_SERIAL)
-  #define VENDOR_ID		0x16C0
-  #define PRODUCT_ID		0x0483
-  #define DEVICE_CLASS		2	// 2 = Communication Class
-  #define MANUFACTURER_NAME	{'T','e','e','n','s','y','d','u','i','n','o'}
-  #define MANUFACTURER_NAME_LEN	11
-  #define PRODUCT_NAME		{'U','S','B',' ','S','e','r','i','a','l'}
-  #define PRODUCT_NAME_LEN	10
-  #define EP0_SIZE		64
-  #define NUM_ENDPOINTS		4
-  #define NUM_USB_BUFFERS	12
-  #define NUM_INTERFACE		2
-  #define CDC_STATUS_INTERFACE	0
-  #define CDC_DATA_INTERFACE	1
-  #define CDC_ACM_ENDPOINT	2
-  #define CDC_RX_ENDPOINT       3
-  #define CDC_TX_ENDPOINT       4
-  #define CDC_ACM_SIZE          16
-  #define CDC_RX_SIZE           64
-  #define CDC_TX_SIZE           64
-  #define CONFIG_DESC_SIZE	(9+9+5+5+4+5+7+9+7+7)
-  #define ENDPOINT2_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT3_CONFIG	ENDPOINT_RECEIVE_ONLY
-  #define ENDPOINT4_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-
-#elif defined(USB_HID)
-  #define VENDOR_ID		0x16C0
-  #define PRODUCT_ID		0x0482
-  #define MANUFACTURER_NAME	{'T','e','e','n','s','y','d','u','i','n','o'}
-  #define MANUFACTURER_NAME_LEN	11
-  #define PRODUCT_NAME		{'K','e','y','b','o','a','r','d','/','M','o','u','s','e','/','J','o','y','s','t','i','c','k'}
-  #define PRODUCT_NAME_LEN	23
-  #define EP0_SIZE		64
-  #define NUM_ENDPOINTS         5
-  #define NUM_USB_BUFFERS	24
-  #define NUM_INTERFACE		4
-  #define SEREMU_INTERFACE      2	// Serial emulation
-  #define SEREMU_TX_ENDPOINT    1
-  #define SEREMU_TX_SIZE        64
-  #define SEREMU_TX_INTERVAL    1
-  #define SEREMU_RX_ENDPOINT    2
-  #define SEREMU_RX_SIZE        32
-  #define SEREMU_RX_INTERVAL    2
-  #define KEYBOARD_INTERFACE    0	// Keyboard
-  #define KEYBOARD_ENDPOINT     3
-  #define KEYBOARD_SIZE         8
-  #define KEYBOARD_INTERVAL     1
-  #define MOUSE_INTERFACE       1	// Mouse
-  #define MOUSE_ENDPOINT        5
-  #define MOUSE_SIZE            8
-  #define MOUSE_INTERVAL        1
-  #define JOYSTICK_INTERFACE    3	// Joystick
-  #define JOYSTICK_ENDPOINT     4
-  #define JOYSTICK_SIZE         16
-  #define JOYSTICK_INTERVAL     2
-  #define KEYBOARD_DESC_OFFSET	(9 + 9)
-  #define MOUSE_DESC_OFFSET	(9 + 9+9+7 + 9)
-  #define SEREMU_DESC_OFFSET	(9 + 9+9+7 + 9+9+7 + 9)
-  #define JOYSTICK_DESC_OFFSET	(9 + 9+9+7 + 9+9+7 + 9+9+7+7 + 9)
-  #define CONFIG_DESC_SIZE	(9 + 9+9+7 + 9+9+7 + 9+9+7+7 + 9+9+7)
-  #define ENDPOINT1_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT2_CONFIG	ENDPOINT_RECEIVE_ONLY
-  #define ENDPOINT3_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT4_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT5_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-
-#elif defined(USB_SERIAL_HID)
-  #define VENDOR_ID		0x16C0
-  #define PRODUCT_ID		0x0487
-  #define DEVICE_CLASS		0xEF
-  #define DEVICE_SUBCLASS	0x02
-  #define DEVICE_PROTOCOL	0x01
-  #define MANUFACTURER_NAME	{'T','e','e','n','s','y','d','u','i','n','o'}
-  #define MANUFACTURER_NAME_LEN	11
-  #define PRODUCT_NAME		{'S','e','r','i','a','l','/','K','e','y','b','o','a','r','d','/','M','o','u','s','e','/','J','o','y','s','t','i','c','k'}
-  #define PRODUCT_NAME_LEN	30
-  #define EP0_SIZE		64
-  #define NUM_ENDPOINTS		6
-  #define NUM_USB_BUFFERS	30
-  #define NUM_INTERFACE		5
-  #define CDC_IAD_DESCRIPTOR	1
-  #define CDC_STATUS_INTERFACE	0
-  #define CDC_DATA_INTERFACE	1	// Serial
-  #define CDC_ACM_ENDPOINT	2
-  #define CDC_RX_ENDPOINT       3
-  #define CDC_TX_ENDPOINT       4
-  #define CDC_ACM_SIZE          16
-  #define CDC_RX_SIZE           64
-  #define CDC_TX_SIZE           64
-  #define KEYBOARD_INTERFACE    2	// Keyboard
-  #define KEYBOARD_ENDPOINT     1
-  #define KEYBOARD_SIZE         8
-  #define KEYBOARD_INTERVAL     1
-  #define MOUSE_INTERFACE       3	// Mouse
-  #define MOUSE_ENDPOINT        5
-  #define MOUSE_SIZE            8
-  #define MOUSE_INTERVAL        2
-  #define JOYSTICK_INTERFACE    4	// Joystick
-  #define JOYSTICK_ENDPOINT     6
-  #define JOYSTICK_SIZE         16
-  #define JOYSTICK_INTERVAL     1
-  #define KEYBOARD_DESC_OFFSET	(9+8 + 9+5+5+4+5+7+9+7+7 + 9)
-  #define MOUSE_DESC_OFFSET	(9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9)
-  #define JOYSTICK_DESC_OFFSET	(9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9+9+7 + 9)
-  #define CONFIG_DESC_SIZE	(9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9+9+7 + 9+9+7)
-  #define ENDPOINT1_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT2_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT3_CONFIG	ENDPOINT_RECEIVE_ONLY
-  #define ENDPOINT4_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT5_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT6_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-
-#elif defined(USB_MIDI)
-  #define VENDOR_ID		0x16C0
-  #define PRODUCT_ID		0x0485
-  #define MANUFACTURER_NAME	{'T','e','e','n','s','y','d','u','i','n','o'}
-  #define MANUFACTURER_NAME_LEN	11
-  #define PRODUCT_NAME		{'T','e','e','n','s','y',' ','M','I','D','I'}
-  #define PRODUCT_NAME_LEN	11
-  #define EP0_SIZE		64
-  #define NUM_ENDPOINTS         4
-  #define NUM_USB_BUFFERS	16
-  #define NUM_INTERFACE		2
-  #define SEREMU_INTERFACE      1	// Serial emulation
-  #define SEREMU_TX_ENDPOINT    1
-  #define SEREMU_TX_SIZE        64
-  #define SEREMU_TX_INTERVAL    1
-  #define SEREMU_RX_ENDPOINT    2
-  #define SEREMU_RX_SIZE        32
-  #define SEREMU_RX_INTERVAL    2
-  #define MIDI_INTERFACE        0	// MIDI
-  #define MIDI_TX_ENDPOINT      3
-  #define MIDI_TX_SIZE          64
-  #define MIDI_RX_ENDPOINT      4
-  #define MIDI_RX_SIZE          64
-  #define SEREMU_DESC_OFFSET	(9 + 9+7+6+6+9+9+9+5+9+5 + 9)
-  #define CONFIG_DESC_SIZE	(9 + 9+7+6+6+9+9+9+5+9+5 + 9+9+7+7)
-  #define ENDPOINT1_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT2_CONFIG	ENDPOINT_RECEIVE_ONLY
-  #define ENDPOINT3_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT4_CONFIG	ENDPOINT_RECEIVE_ONLY
-
-#elif defined(USB_RAWHID)
-  #define VENDOR_ID		0x16C0
-  #define PRODUCT_ID		0x0486
-  #define RAWHID_USAGE_PAGE	0xFFAB  // recommended: 0xFF00 to 0xFFFF
-  #define RAWHID_USAGE		0x0200  // recommended: 0x0100 to 0xFFFF
-  #define MANUFACTURER_NAME	{'T','e','e','n','s','y','d','u','i','n','o'}
-  #define MANUFACTURER_NAME_LEN	11
-  #define PRODUCT_NAME		{'T','e','e','n','s','y','d','u','i','n','o',' ','R','a','w','H','I','D'}
-  #define PRODUCT_NAME_LEN	18
-  #define EP0_SIZE		64
-  #define NUM_ENDPOINTS         6
-  #define NUM_USB_BUFFERS	12
-  #define NUM_INTERFACE		2
-  #define RAWHID_INTERFACE      0	// RawHID
-  #define RAWHID_TX_ENDPOINT    3
-  #define RAWHID_TX_SIZE        64
-  #define RAWHID_TX_INTERVAL    1
-  #define RAWHID_RX_ENDPOINT    4
-  #define RAWHID_RX_SIZE        64
-  #define RAWHID_RX_INTERVAL    1
-  #define SEREMU_INTERFACE      1	// Serial emulation
-  #define SEREMU_TX_ENDPOINT    1
-  #define SEREMU_TX_SIZE        64
-  #define SEREMU_TX_INTERVAL    1
-  #define SEREMU_RX_ENDPOINT    2
-  #define SEREMU_RX_SIZE        32
-  #define SEREMU_RX_INTERVAL    2
-  #define RAWHID_DESC_OFFSET	(9 + 9)
-  #define SEREMU_DESC_OFFSET	(9 + 9+9+7+7 + 9)
-  #define CONFIG_DESC_SIZE	(9 + 9+9+7+7 + 9+9+7+7)
-  #define ENDPOINT1_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT2_CONFIG	ENDPOINT_RECEIVE_ONLY
-  #define ENDPOINT3_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT4_CONFIG	ENDPOINT_RECEIVE_ONLY
-
-#elif defined(USB_FLIGHTSIM)
-  #define VENDOR_ID		0x16C0
-  #define PRODUCT_ID		0x0488
-  #define MANUFACTURER_NAME	{'T','e','e','n','s','y','d','u','i','n','o'}
-  #define MANUFACTURER_NAME_LEN	11
-  #define PRODUCT_NAME		{'T','e','e','n','s','y',' ','F','l','i','g','h','t',' ','S','i','m',' ','C','o','n','t','r','o','l','s'}
-  #define PRODUCT_NAME_LEN	26
-  #define EP0_SIZE		64
-  #define NUM_ENDPOINTS         4
-  #define NUM_USB_BUFFERS	20
-  #define NUM_INTERFACE		2
-  #define FLIGHTSIM_INTERFACE	0	// Flight Sim Control
-  #define FLIGHTSIM_TX_ENDPOINT	3
-  #define FLIGHTSIM_TX_SIZE	64
-  #define FLIGHTSIM_TX_INTERVAL	1
-  #define FLIGHTSIM_RX_ENDPOINT	4
-  #define FLIGHTSIM_RX_SIZE	64
-  #define FLIGHTSIM_RX_INTERVAL	1
-  #define SEREMU_INTERFACE      1	// Serial emulation
-  #define SEREMU_TX_ENDPOINT    1
-  #define SEREMU_TX_SIZE        64
-  #define SEREMU_TX_INTERVAL    1
-  #define SEREMU_RX_ENDPOINT    2
-  #define SEREMU_RX_SIZE        32
-  #define SEREMU_RX_INTERVAL    2
-  #define FLIGHTSIM_DESC_OFFSET	(9 + 9)
-  #define SEREMU_DESC_OFFSET	(9 + 9+9+7+7 + 9)
-  #define CONFIG_DESC_SIZE	(9 + 9+9+7+7 + 9+9+7+7)
-  #define ENDPOINT1_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT2_CONFIG	ENDPOINT_RECEIVE_ONLY
-  #define ENDPOINT3_CONFIG	ENDPOINT_TRANSIMIT_ONLY
-  #define ENDPOINT4_CONFIG	ENDPOINT_RECEIVE_ONLY
-
-#endif
-
-// NUM_ENDPOINTS = number of non-zero endpoints (0 to 15)
-extern const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS];
-
-typedef struct {
-	uint16_t	wValue;
-	uint16_t	wIndex;
-	const uint8_t	*addr;
-	uint16_t	length;
-} usb_descriptor_list_t;
-
-extern const usb_descriptor_list_t usb_descriptor_list[];
-
-
-#endif // F_CPU >= 20 MHz
-
-#endif
diff --git a/ports/teensy/core/usb_dev.c b/ports/teensy/core/usb_dev.c
deleted file mode 100644
index 6cf85d3fd3..0000000000
--- a/ports/teensy/core/usb_dev.c
+++ /dev/null
@@ -1,980 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#if F_CPU >= 20000000
-
-#include "mk20dx128.h"
-//#include "HardwareSerial.h"
-#include "usb_dev.h"
-#include "usb_mem.h"
-
-// buffer descriptor table
-
-typedef struct {
-	uint32_t desc;
-	void * addr;
-} bdt_t;
-
-__attribute__ ((section(".usbdescriptortable"), used))
-static bdt_t table[(NUM_ENDPOINTS+1)*4];
-
-static usb_packet_t *rx_first[NUM_ENDPOINTS];
-static usb_packet_t *rx_last[NUM_ENDPOINTS];
-static usb_packet_t *tx_first[NUM_ENDPOINTS];
-static usb_packet_t *tx_last[NUM_ENDPOINTS];
-uint16_t usb_rx_byte_count_data[NUM_ENDPOINTS];
-
-static uint8_t tx_state[NUM_ENDPOINTS];
-#define TX_STATE_BOTH_FREE_EVEN_FIRST	0
-#define TX_STATE_BOTH_FREE_ODD_FIRST	1
-#define TX_STATE_EVEN_FREE		2
-#define TX_STATE_ODD_FREE		3
-#define TX_STATE_NONE_FREE_EVEN_FIRST	4
-#define TX_STATE_NONE_FREE_ODD_FIRST	5
-
-#define BDT_OWN		0x80
-#define BDT_DATA1	0x40
-#define BDT_DATA0	0x00
-#define BDT_DTS		0x08
-#define BDT_STALL	0x04
-#define BDT_PID(n)	(((n) >> 2) & 15)
-
-#define BDT_DESC(count, data)	(BDT_OWN | BDT_DTS \
-				| ((data) ? BDT_DATA1 : BDT_DATA0) \
-				| ((count) << 16))
-
-#define TX   1
-#define RX   0
-#define ODD  1
-#define EVEN 0
-#define DATA0 0
-#define DATA1 1
-#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd))
-#define stat2bufferdescriptor(stat) (table + ((stat) >> 2))
-
-
-static union {
- struct {
-  union {
-   struct {
-	uint8_t bmRequestType;
-	uint8_t bRequest;
-   };
-	uint16_t wRequestAndType;
-  };
-	uint16_t wValue;
-	uint16_t wIndex;
-	uint16_t wLength;
- };
- struct {
-	uint32_t word1;
-	uint32_t word2;
- };
-} setup;
-
-
-#define GET_STATUS		0
-#define CLEAR_FEATURE		1
-#define SET_FEATURE		3
-#define SET_ADDRESS		5
-#define GET_DESCRIPTOR		6
-#define SET_DESCRIPTOR		7
-#define GET_CONFIGURATION	8
-#define SET_CONFIGURATION	9
-#define GET_INTERFACE		10
-#define SET_INTERFACE		11
-#define SYNCH_FRAME		12
-
-// SETUP always uses a DATA0 PID for the data field of the SETUP transaction.
-// transactions in the data phase start with DATA1 and toggle (figure 8-12, USB1.1)
-// Status stage uses a DATA1 PID.
-
-static uint8_t ep0_rx0_buf[EP0_SIZE] __attribute__ ((aligned (4)));
-static uint8_t ep0_rx1_buf[EP0_SIZE] __attribute__ ((aligned (4)));
-static const uint8_t *ep0_tx_ptr = NULL;
-static uint16_t ep0_tx_len;
-static uint8_t ep0_tx_bdt_bank = 0;
-static uint8_t ep0_tx_data_toggle = 0;
-uint8_t usb_rx_memory_needed = 0;
-
-volatile uint8_t usb_configuration = 0;
-volatile uint8_t usb_reboot_timer = 0;
-
-
-static void endpoint0_stall(void)
-{
-	USB0_ENDPT0 = USB_ENDPT_EPSTALL | USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK;
-}
-
-
-static void endpoint0_transmit(const void *data, uint32_t len)
-{
-#if 0
-	serial_print("tx0:");
-	serial_phex32((uint32_t)data);
-	serial_print(",");
-	serial_phex16(len);
-	serial_print(ep0_tx_bdt_bank ? ", odd" : ", even");
-	serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n");
-#endif
-	table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data;
-	table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle);
-	ep0_tx_data_toggle ^= 1;
-	ep0_tx_bdt_bank ^= 1;
-}
-
-static uint8_t reply_buffer[8];
-
-static void usb_setup(void)
-{
-	const uint8_t *data = NULL;
-	uint32_t datalen = 0;
-	const usb_descriptor_list_t *list;
-	uint32_t size;
-	volatile uint8_t *reg;
-	uint8_t epconf;
-	const uint8_t *cfg;
-	int i;
-
-	switch (setup.wRequestAndType) {
-	  case 0x0500: // SET_ADDRESS
-		break;
-	  case 0x0900: // SET_CONFIGURATION
-		//serial_print("configure\n");
-		usb_configuration = setup.wValue;
-		reg = &USB0_ENDPT1;
-		cfg = usb_endpoint_config_table;
-		// clear all BDT entries, free any allocated memory...
-		for (i=4; i < (NUM_ENDPOINTS+1)*4; i++) {
-			if (table[i].desc & BDT_OWN) {
-				usb_free((usb_packet_t *)((uint8_t *)(table[i].addr) - 8));
-			}
-		}
-		// free all queued packets
-		for (i=0; i < NUM_ENDPOINTS; i++) {
-			usb_packet_t *p, *n;
-			p = rx_first[i];
-			while (p) {
-				n = p->next;
-				usb_free(p);
-				p = n;
-			}
-			rx_first[i] = NULL;
-			rx_last[i] = NULL;
-			p = tx_first[i];
-			while (p) {
-				n = p->next;
-				usb_free(p);
-				p = n;
-			}
-			tx_first[i] = NULL;
-			tx_last[i] = NULL;
-			usb_rx_byte_count_data[i] = 0;
-			switch (tx_state[i]) {
-			  case TX_STATE_EVEN_FREE:
-			  case TX_STATE_NONE_FREE_EVEN_FIRST:
-				tx_state[i] = TX_STATE_BOTH_FREE_EVEN_FIRST;
-				break;
-			  case TX_STATE_ODD_FREE:
-			  case TX_STATE_NONE_FREE_ODD_FIRST:
-				tx_state[i] = TX_STATE_BOTH_FREE_ODD_FIRST;
-				break;
-			  default:
-				break;
-			}
-		}
-		usb_rx_memory_needed = 0;
-		for (i=1; i <= NUM_ENDPOINTS; i++) {
-			epconf = *cfg++;
-			*reg = epconf;
-			reg += 4;
-			if (epconf & USB_ENDPT_EPRXEN) {
-				usb_packet_t *p;
-				p = usb_malloc();
-				if (p) {
-					table[index(i, RX, EVEN)].addr = p->buf;
-					table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0);
-				} else {
-					table[index(i, RX, EVEN)].desc = 0;
-					usb_rx_memory_needed++;
-				}
-				p = usb_malloc();
-				if (p) {
-					table[index(i, RX, ODD)].addr = p->buf;
-					table[index(i, RX, ODD)].desc = BDT_DESC(64, 1);
-				} else {
-					table[index(i, RX, ODD)].desc = 0;
-					usb_rx_memory_needed++;
-				}
-			}
-			table[index(i, TX, EVEN)].desc = 0;
-			table[index(i, TX, ODD)].desc = 0;
-		}
-		break;
-	  case 0x0880: // GET_CONFIGURATION
-		reply_buffer[0] = usb_configuration;
-		datalen = 1;
-		data = reply_buffer;
-		break;
-	  case 0x0080: // GET_STATUS (device)
-		reply_buffer[0] = 0;
-		reply_buffer[1] = 0;
-		datalen = 2;
-		data = reply_buffer;
-		break;
-	  case 0x0082: // GET_STATUS (endpoint)
-		if (setup.wIndex > NUM_ENDPOINTS) {
-			// TODO: do we need to handle IN vs OUT here?
-			endpoint0_stall();
-			return;
-		}
-		reply_buffer[0] = 0;
-		reply_buffer[1] = 0;
-		if (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4) & 0x02) reply_buffer[0] = 1;
-		data = reply_buffer;
-		datalen = 2;
-		break;
-	  case 0x0102: // CLEAR_FEATURE (endpoint)
-		i = setup.wIndex & 0x7F;
-		if (i > NUM_ENDPOINTS || setup.wValue != 0) {
-			// TODO: do we need to handle IN vs OUT here?
-			endpoint0_stall();
-			return;
-		}
-		(*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4)) &= ~0x02;
-		// TODO: do we need to clear the data toggle here?
-		break;
-	  case 0x0302: // SET_FEATURE (endpoint)
-		i = setup.wIndex & 0x7F;
-		if (i > NUM_ENDPOINTS || setup.wValue != 0) {
-			// TODO: do we need to handle IN vs OUT here?
-			endpoint0_stall();
-			return;
-		}
-		(*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4)) |= 0x02;
-		// TODO: do we need to clear the data toggle here?
-		break;
-	  case 0x0680: // GET_DESCRIPTOR
-	  case 0x0681:
-		//serial_print("desc:");
-		//serial_phex16(setup.wValue);
-		//serial_print("\n");
-		for (list = usb_descriptor_list; 1; list++) {
-			if (list->addr == NULL) break;
-			//if (setup.wValue == list->wValue &&
-			//(setup.wIndex == list->wIndex) || ((setup.wValue >> 8) == 3)) {
-			if (setup.wValue == list->wValue && setup.wIndex == list->wIndex) {
-				data = list->addr;
-				if ((setup.wValue >> 8) == 3) {
-					// for string descriptors, use the descriptor's
-					// length field, allowing runtime configured
-					// length.
-					datalen = *(list->addr);
-				} else {
-					datalen = list->length;
-				}
-#if 0
-				serial_print("Desc found, ");
-				serial_phex32((uint32_t)data);
-				serial_print(",");
-				serial_phex16(datalen);
-				serial_print(",");
-				serial_phex(data[0]);
-				serial_phex(data[1]);
-				serial_phex(data[2]);
-				serial_phex(data[3]);
-				serial_phex(data[4]);
-				serial_phex(data[5]);
-				serial_print("\n");
-#endif
-				goto send;
-			}
-		}
-		//serial_print("desc: not found\n");
-		endpoint0_stall();
-		return;
-#if defined(CDC_STATUS_INTERFACE)
-	  case 0x2221: // CDC_SET_CONTROL_LINE_STATE
-		usb_cdc_line_rtsdtr = setup.wValue;
-		//serial_print("set control line state\n");
-		break;
-	  case 0x2321: // CDC_SEND_BREAK
-		break;
-	  case 0x2021: // CDC_SET_LINE_CODING
-		//serial_print("set coding, waiting...\n");
-		return;
-#endif
-
-// TODO: this does not work... why?
-#if defined(SEREMU_INTERFACE) || defined(KEYBOARD_INTERFACE)
-	  case 0x0921: // HID SET_REPORT
-		//serial_print(":)\n");
-		return;
-	  case 0x0A21: // HID SET_IDLE
-		break;
-	  // case 0xC940:
-#endif
-	  default:
-		endpoint0_stall();
-		return;
-	}
-	send:
-	//serial_print("setup send ");
-	//serial_phex32(data);
-	//serial_print(",");
-	//serial_phex16(datalen);
-	//serial_print("\n");
-
-	if (datalen > setup.wLength) datalen = setup.wLength;
-	size = datalen;
-	if (size > EP0_SIZE) size = EP0_SIZE;
-	endpoint0_transmit(data, size);
-	data += size;
-	datalen -= size;
-	if (datalen == 0 && size < EP0_SIZE) return;
-
-	size = datalen;
-	if (size > EP0_SIZE) size = EP0_SIZE;
-	endpoint0_transmit(data, size);
-	data += size;
-	datalen -= size;
-	if (datalen == 0 && size < EP0_SIZE) return;
-
-	ep0_tx_ptr = data;
-	ep0_tx_len = datalen;
-}
-
-
-
-//A bulk endpoint's toggle sequence is initialized to DATA0 when the endpoint
-//experiences any configuration event (configuration events are explained in
-//Sections 9.1.1.5 and 9.4.5).
-
-//Configuring a device or changing an alternate setting causes all of the status
-//and configuration values associated with endpoints in the affected interfaces
-//to be set to their default values. This includes setting the data toggle of
-//any endpoint using data toggles to the value DATA0.
-
-//For endpoints using data toggle, regardless of whether an endpoint has the
-//Halt feature set, a ClearFeature(ENDPOINT_HALT) request always results in the
-//data toggle being reinitialized to DATA0.
-
-
-
-// #define stat2bufferdescriptor(stat) (table + ((stat) >> 2))
-
-static void usb_control(uint32_t stat)
-{
-	bdt_t *b;
-	uint32_t pid, size;
-	uint8_t *buf;
-	const uint8_t *data;
-
-	b = stat2bufferdescriptor(stat);
-	pid = BDT_PID(b->desc);
-	//count = b->desc >> 16;
-	buf = b->addr;
-	//serial_print("pid:");
-	//serial_phex(pid);
-	//serial_print(", count:");
-	//serial_phex(count);
-	//serial_print("\n");
-
-	switch (pid) {
-	case 0x0D: // Setup received from host
-		//serial_print("PID=Setup\n");
-		//if (count != 8) ; // panic?
-		// grab the 8 byte setup info
-		setup.word1 = *(uint32_t *)(buf);
-		setup.word2 = *(uint32_t *)(buf + 4);
-
-		// give the buffer back
-		b->desc = BDT_DESC(EP0_SIZE, DATA1);
-		//table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1);
-		//table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1);
-
-		// clear any leftover pending IN transactions
-		ep0_tx_ptr = NULL;
-		if (ep0_tx_data_toggle) {
-		}
-		//if (table[index(0, TX, EVEN)].desc & 0x80) {
-			//serial_print("leftover tx even\n");
-		//}
-		//if (table[index(0, TX, ODD)].desc & 0x80) {
-			//serial_print("leftover tx odd\n");
-		//}
-		table[index(0, TX, EVEN)].desc = 0;
-		table[index(0, TX, ODD)].desc = 0;
-		// first IN after Setup is always DATA1
-		ep0_tx_data_toggle = 1;
-
-#if 0
-		serial_print("bmRequestType:");
-		serial_phex(setup.bmRequestType);
-		serial_print(", bRequest:");
-		serial_phex(setup.bRequest);
-		serial_print(", wValue:");
-		serial_phex16(setup.wValue);
-		serial_print(", wIndex:");
-		serial_phex16(setup.wIndex);
-		serial_print(", len:");
-		serial_phex16(setup.wLength);
-		serial_print("\n");
-#endif
-		// actually "do" the setup request
-		usb_setup();
-		// unfreeze the USB, now that we're ready
-		USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit
-		break;
-	case 0x01:  // OUT transaction received from host
-	case 0x02:
-		//serial_print("PID=OUT\n");
-#ifdef CDC_STATUS_INTERFACE
-		if (setup.wRequestAndType == 0x2021 /*CDC_SET_LINE_CODING*/) {
-			int i;
-			uint8_t *dst = (uint8_t *)usb_cdc_line_coding;
-			//serial_print("set line coding ");
-			for (i=0; i<7; i++) {
-				//serial_phex(*buf);
-				*dst++ = *buf++;
-			}
-			//serial_phex32(usb_cdc_line_coding[0]);
-			//serial_print("\n");
-			if (usb_cdc_line_coding[0] == 134) usb_reboot_timer = 15;
-			endpoint0_transmit(NULL, 0);
-		}
-#endif
-#ifdef KEYBOARD_INTERFACE
-		if (setup.word1 == 0x02000921 && setup.word2 == ((1<<16)|KEYBOARD_INTERFACE)) {
-			keyboard_leds = buf[0];
-			endpoint0_transmit(NULL, 0);
-		}
-#endif
-#ifdef SEREMU_INTERFACE
-		if (setup.word1 == 0x03000921 && setup.word2 == ((4<<16)|SEREMU_INTERFACE)
-		  && buf[0] == 0xA9 && buf[1] == 0x45 && buf[2] == 0xC2 && buf[3] == 0x6B) {
-			usb_reboot_timer = 5;
-			endpoint0_transmit(NULL, 0);
-		}
-#endif
-		// give the buffer back
-		b->desc = BDT_DESC(EP0_SIZE, DATA1);
-		break;
-
-	case 0x09: // IN transaction completed to host
-		//serial_print("PID=IN:");
-		//serial_phex(stat);
-		//serial_print("\n");
-
-		// send remaining data, if any...
-		data = ep0_tx_ptr;
-		if (data) {
-			size = ep0_tx_len;
-			if (size > EP0_SIZE) size = EP0_SIZE;
-			endpoint0_transmit(data, size);
-			data += size;
-			ep0_tx_len -= size;
-			ep0_tx_ptr = (ep0_tx_len > 0 || size == EP0_SIZE) ? data : NULL;
-		}
-
-		if (setup.bRequest == 5 && setup.bmRequestType == 0) {
-			setup.bRequest = 0;
-			//serial_print("set address: ");
-			//serial_phex16(setup.wValue);
-			//serial_print("\n");
-			USB0_ADDR = setup.wValue;
-		}
-
-		break;
-	//default:
-		//serial_print("PID=unknown:");
-		//serial_phex(pid);
-		//serial_print("\n");
-	}
-	USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit
-}
-
-
-
-
-
-
-usb_packet_t *usb_rx(uint32_t endpoint)
-{
-	usb_packet_t *ret;
-	endpoint--;
-	if (endpoint >= NUM_ENDPOINTS) return NULL;
-	__disable_irq();
-	ret = rx_first[endpoint];
-	if (ret) {
-		rx_first[endpoint] = ret->next;
-		usb_rx_byte_count_data[endpoint] -= ret->len;
-	}
-	__enable_irq();
-	//serial_print("rx, epidx=");
-	//serial_phex(endpoint);
-	//serial_print(", packet=");
-	//serial_phex32(ret);
-	//serial_print("\n");
-	return ret;
-}
-
-static uint32_t usb_queue_byte_count(const usb_packet_t *p)
-{
-	uint32_t count=0;
-
-	__disable_irq();
-	for ( ; p; p = p->next) {
-		count += p->len;
-	}
-	__enable_irq();
-	return count;
-}
-
-// TODO: make this an inline function...
-/*
-uint32_t usb_rx_byte_count(uint32_t endpoint)
-{
-	endpoint--;
-	if (endpoint >= NUM_ENDPOINTS) return 0;
-	return usb_rx_byte_count_data[endpoint];
-	//return usb_queue_byte_count(rx_first[endpoint]);
-}
-*/
-
-uint32_t usb_tx_byte_count(uint32_t endpoint)
-{
-	endpoint--;
-	if (endpoint >= NUM_ENDPOINTS) return 0;
-	return usb_queue_byte_count(tx_first[endpoint]);
-}
-
-uint32_t usb_tx_packet_count(uint32_t endpoint)
-{
-	const usb_packet_t *p;
-	uint32_t count=0;
-
-	endpoint--;
-	if (endpoint >= NUM_ENDPOINTS) return 0;
-	__disable_irq();
-	for (p = tx_first[endpoint]; p; p = p->next) count++;
-	__enable_irq();
-	return count;
-}
-
-
-// Called from usb_free, but only when usb_rx_memory_needed > 0, indicating
-// receive endpoints are starving for memory.  The intention is to give
-// endpoints needing receive memory priority over the user's code, which is
-// likely calling usb_malloc to obtain memory for transmitting.  When the
-// user is creating data very quickly, their consumption could starve reception
-// without this prioritization.  The packet buffer (input) is assigned to the
-// first endpoint needing memory.
-//
-void usb_rx_memory(usb_packet_t *packet)
-{
-	unsigned int i;
-	const uint8_t *cfg;
-
-	cfg = usb_endpoint_config_table;
-	//serial_print("rx_mem:");
-	__disable_irq();
-	for (i=1; i <= NUM_ENDPOINTS; i++) {
-		if (*cfg++ & USB_ENDPT_EPRXEN) {
-			if (table[index(i, RX, EVEN)].desc == 0) {
-				table[index(i, RX, EVEN)].addr = packet->buf;
-				table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0);
-				usb_rx_memory_needed--;
-				__enable_irq();
-				//serial_phex(i);
-				//serial_print(",even\n");
-				return;
-			}
-			if (table[index(i, RX, ODD)].desc == 0) {
-				table[index(i, RX, ODD)].addr = packet->buf;
-				table[index(i, RX, ODD)].desc = BDT_DESC(64, 1);
-				usb_rx_memory_needed--;
-				__enable_irq();
-				//serial_phex(i);
-				//serial_print(",odd\n");
-				return;
-			}
-		}
-	}
-	__enable_irq();
-	// we should never reach this point.  If we get here, it means
-	// usb_rx_memory_needed was set greater than zero, but no memory
-	// was actually needed.
-	usb_rx_memory_needed = 0;
-	usb_free(packet);
-	return;
-}
-
-//#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd))
-//#define stat2bufferdescriptor(stat) (table + ((stat) >> 2))
-
-void usb_tx(uint32_t endpoint, usb_packet_t *packet)
-{
-	bdt_t *b = &table[index(endpoint, TX, EVEN)];
-	uint8_t next;
-
-	endpoint--;
-	if (endpoint >= NUM_ENDPOINTS) return;
-	__disable_irq();
-	//serial_print("txstate=");
-	//serial_phex(tx_state[endpoint]);
-	//serial_print("\n");
-	switch (tx_state[endpoint]) {
-	  case TX_STATE_BOTH_FREE_EVEN_FIRST:
-		next = TX_STATE_ODD_FREE;
-		break;
-	  case TX_STATE_BOTH_FREE_ODD_FIRST:
-		b++;
-		next = TX_STATE_EVEN_FREE;
-		break;
-	  case TX_STATE_EVEN_FREE:
-		next = TX_STATE_NONE_FREE_ODD_FIRST;
-		break;
-	  case TX_STATE_ODD_FREE:
-		b++;
-		next = TX_STATE_NONE_FREE_EVEN_FIRST;
-		break;
-	  default:
-		if (tx_first[endpoint] == NULL) {
-			tx_first[endpoint] = packet;
-		} else {
-			tx_last[endpoint]->next = packet;
-		}
-		tx_last[endpoint] = packet;
-		__enable_irq();
-		return;
-	}
-	tx_state[endpoint] = next;
-	b->addr = packet->buf;
-	b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0);
-	__enable_irq();
-}
-
-
-
-
-
-
-void _reboot_Teensyduino_(void)
-{
-	// TODO: initialize R0 with a code....
-	__asm__ volatile("bkpt");
-}
-
-
-
-void usb_isr(void)
-{
-	uint8_t status, stat, t;
-
-	//serial_print("isr");
-	//status = USB0_ISTAT;
-	//serial_phex(status);
-	//serial_print("\n");
-	restart:
-	status = USB0_ISTAT;
-
-	if ((status & USB_INTEN_SOFTOKEN /* 04 */ )) {
-		if (usb_configuration) {
-			t = usb_reboot_timer;
-			if (t) {
-				usb_reboot_timer = --t;
-				if (!t) _reboot_Teensyduino_();
-			}
-#ifdef CDC_DATA_INTERFACE
-			t = usb_cdc_transmit_flush_timer;
-			if (t) {
-				usb_cdc_transmit_flush_timer = --t;
-				if (t == 0) usb_serial_flush_callback();
-			}
-#endif
-#ifdef SEREMU_INTERFACE
-			t = usb_seremu_transmit_flush_timer;
-			if (t) {
-				usb_seremu_transmit_flush_timer = --t;
-				if (t == 0) usb_seremu_flush_callback();
-			}
-#endif
-#ifdef MIDI_INTERFACE
-                        usb_midi_flush_output();
-#endif
-#ifdef FLIGHTSIM_INTERFACE
-			usb_flightsim_flush_callback();
-#endif
-		}
-		USB0_ISTAT = USB_INTEN_SOFTOKEN;
-	}
-
-	if ((status & USB_ISTAT_TOKDNE /* 08 */ )) {
-		uint8_t endpoint;
-		stat = USB0_STAT;
-		//serial_print("token: ep=");
-		//serial_phex(stat >> 4);
-		//serial_print(stat & 0x08 ? ",tx" : ",rx");
-		//serial_print(stat & 0x04 ? ",odd\n" : ",even\n");
-		endpoint = stat >> 4;
-		if (endpoint == 0) {
-			usb_control(stat);
-		} else {
-			bdt_t *b = stat2bufferdescriptor(stat);
-			usb_packet_t *packet = (usb_packet_t *)((uint8_t *)(b->addr) - 8);
-#if 0
-			serial_print("ep:");
-			serial_phex(endpoint);
-			serial_print(", pid:");
-			serial_phex(BDT_PID(b->desc));
-			serial_print(((uint32_t)b & 8) ? ", odd" : ", even");
-			serial_print(", count:");
-			serial_phex(b->desc >> 16);
-			serial_print("\n");
-#endif
-			endpoint--;	// endpoint is index to zero-based arrays
-
-			if (stat & 0x08) { // transmit
-				usb_free(packet);
-				packet = tx_first[endpoint];
-				if (packet) {
-					//serial_print("tx packet\n");
-					tx_first[endpoint] = packet->next;
-					b->addr = packet->buf;
-					switch (tx_state[endpoint]) {
-					  case TX_STATE_BOTH_FREE_EVEN_FIRST:
-						tx_state[endpoint] = TX_STATE_ODD_FREE;
-						break;
-					  case TX_STATE_BOTH_FREE_ODD_FIRST:
-						tx_state[endpoint] = TX_STATE_EVEN_FREE;
-						break;
-					  case TX_STATE_EVEN_FREE:
-						tx_state[endpoint] = TX_STATE_NONE_FREE_ODD_FIRST;
-						break;
-					  case TX_STATE_ODD_FREE:
-						tx_state[endpoint] = TX_STATE_NONE_FREE_EVEN_FIRST;
-						break;
-					  default:
-						break;
-					}
-					b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0);
-				} else {
-					//serial_print("tx no packet\n");
-					switch (tx_state[endpoint]) {
-					  case TX_STATE_BOTH_FREE_EVEN_FIRST:
-					  case TX_STATE_BOTH_FREE_ODD_FIRST:
-						break;
-					  case TX_STATE_EVEN_FREE:
-						tx_state[endpoint] = TX_STATE_BOTH_FREE_EVEN_FIRST;
-						break;
-					  case TX_STATE_ODD_FREE:
-						tx_state[endpoint] = TX_STATE_BOTH_FREE_ODD_FIRST;
-						break;
-					  default:
-						tx_state[endpoint] = ((uint32_t)b & 8) ?
-						  TX_STATE_ODD_FREE : TX_STATE_EVEN_FREE;
-						break;
-					}
-				}
-			} else { // receive
-				packet->len = b->desc >> 16;
-				if (packet->len > 0) {
-					packet->index = 0;
-					packet->next = NULL;
-					if (rx_first[endpoint] == NULL) {
-						//serial_print("rx 1st, epidx=");
-						//serial_phex(endpoint);
-						//serial_print(", packet=");
-						//serial_phex32((uint32_t)packet);
-						//serial_print("\n");
-						rx_first[endpoint] = packet;
-					} else {
-						//serial_print("rx Nth, epidx=");
-						//serial_phex(endpoint);
-						//serial_print(", packet=");
-						//serial_phex32((uint32_t)packet);
-						//serial_print("\n");
-						rx_last[endpoint]->next = packet;
-					}
-					rx_last[endpoint] = packet;
-					usb_rx_byte_count_data[endpoint] += packet->len;
-					// TODO: implement a per-endpoint maximum # of allocated packets
-					// so a flood of incoming data on 1 endpoint doesn't starve
-					// the others if the user isn't reading it regularly
-					packet = usb_malloc();
-					if (packet) {
-						b->addr = packet->buf;
-						b->desc = BDT_DESC(64, ((uint32_t)b & 8) ? DATA1 : DATA0);
-					} else {
-						//serial_print("starving ");
-						//serial_phex(endpoint + 1);
-						//serial_print(((uint32_t)b & 8) ? ",odd\n" : ",even\n");
-						b->desc = 0;
-						usb_rx_memory_needed++;
-					}
-				} else {
-					b->desc = BDT_DESC(64, ((uint32_t)b & 8) ? DATA1 : DATA0);
-				}
-			}
-
-
-
-
-		}
-		USB0_ISTAT = USB_ISTAT_TOKDNE;
-		goto restart;
-	}
-
-
-
-	if (status & USB_ISTAT_USBRST /* 01 */ ) {
-		//serial_print("reset\n");
-
-		// initialize BDT toggle bits
-		USB0_CTL = USB_CTL_ODDRST;
-		ep0_tx_bdt_bank = 0;
-
-		// set up buffers to receive Setup and OUT packets
-		table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0);
-		table[index(0, RX, EVEN)].addr = ep0_rx0_buf;
-		table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 0);
-		table[index(0, RX, ODD)].addr = ep0_rx1_buf;
-		table[index(0, TX, EVEN)].desc = 0;
-		table[index(0, TX, ODD)].desc = 0;
-
-		// activate endpoint 0
-		USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK;
-
-		// clear all ending interrupts
-		USB0_ERRSTAT = 0xFF;
-		USB0_ISTAT = 0xFF;
-
-		// set the address to zero during enumeration
-		USB0_ADDR = 0;
-
-		// enable other interrupts
-		USB0_ERREN = 0xFF;
-		USB0_INTEN = USB_INTEN_TOKDNEEN |
-			USB_INTEN_SOFTOKEN |
-			USB_INTEN_STALLEN |
-			USB_INTEN_ERROREN |
-			USB_INTEN_USBRSTEN |
-			USB_INTEN_SLEEPEN;
-
-		// is this necessary?
-		USB0_CTL = USB_CTL_USBENSOFEN;
-		return;
-	}
-
-
-	if ((status & USB_ISTAT_STALL /* 80 */ )) {
-		//serial_print("stall:\n");
-		USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK;
-		USB0_ISTAT = USB_ISTAT_STALL;
-	}
-	if ((status & USB_ISTAT_ERROR /* 02 */ )) {
-		uint8_t err = USB0_ERRSTAT;
-		USB0_ERRSTAT = err;
-		//serial_print("err:");
-		//serial_phex(err);
-		//serial_print("\n");
-		USB0_ISTAT = USB_ISTAT_ERROR;
-	}
-
-	if ((status & USB_ISTAT_SLEEP /* 10 */ )) {
-		//serial_print("sleep\n");
-		USB0_ISTAT = USB_ISTAT_SLEEP;
-	}
-
-}
-
-
-
-void usb_init(void)
-{
-	int i;
-
-	//serial_begin(BAUD2DIV(115200));
-	//serial_print("usb_init\n");
-
-	usb_init_serialnumber();
-
-	for (i=0; i <= NUM_ENDPOINTS*4; i++) {
-		table[i].desc = 0;
-		table[i].addr = 0;
-	}
-
-	// this basically follows the flowchart in the Kinetis
-	// Quick Reference User Guide, Rev. 1, 03/2012, page 141
-
-	// assume 48 MHz clock already running
-	// SIM - enable clock
-	SIM_SCGC4 |= SIM_SCGC4_USBOTG;
-
-	// reset USB module
-	USB0_USBTRC0 = USB_USBTRC_USBRESET;
-	while ((USB0_USBTRC0 & USB_USBTRC_USBRESET) != 0) ; // wait for reset to end
-
-	// set desc table base addr
-	USB0_BDTPAGE1 = ((uint32_t)table) >> 8;
-	USB0_BDTPAGE2 = ((uint32_t)table) >> 16;
-	USB0_BDTPAGE3 = ((uint32_t)table) >> 24;
-
-	// clear all ISR flags
-	USB0_ISTAT = 0xFF;
-	USB0_ERRSTAT = 0xFF;
-	USB0_OTGISTAT = 0xFF;
-
-	USB0_USBTRC0 |= 0x40; // undocumented bit
-
-	// enable USB
-	USB0_CTL = USB_CTL_USBENSOFEN;
-	USB0_USBCTRL = 0;
-
-	// enable reset interrupt
-	USB0_INTEN = USB_INTEN_USBRSTEN;
-
-	// enable interrupt in NVIC...
-	NVIC_SET_PRIORITY(IRQ_USBOTG, 112);
-	NVIC_ENABLE_IRQ(IRQ_USBOTG);
-
-	// enable d+ pullup
-	USB0_CONTROL = USB_CONTROL_DPPULLUPNONOTG;
-}
-
-
-#else // F_CPU < 20 MHz
-
-void usb_init(void)
-{
-}
-
-#endif // F_CPU >= 20 MHz
diff --git a/ports/teensy/core/usb_dev.h b/ports/teensy/core/usb_dev.h
deleted file mode 100644
index 211cebec02..0000000000
--- a/ports/teensy/core/usb_dev.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _usb_dev_h_
-#define _usb_dev_h_
-
-#if F_CPU >= 20000000
-
-// This header is NOT meant to be included when compiling
-// user sketches in Arduino.  The low-level functions
-// provided by usb_dev.c are meant to be called only by
-// code which provides higher-level interfaces to the user.
-
-#include "usb_mem.h"
-#include "usb_desc.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void usb_init(void);
-void usb_init_serialnumber(void);
-void usb_isr(void);
-usb_packet_t *usb_rx(uint32_t endpoint);
-uint32_t usb_tx_byte_count(uint32_t endpoint);
-uint32_t usb_tx_packet_count(uint32_t endpoint);
-void usb_tx(uint32_t endpoint, usb_packet_t *packet);
-void usb_tx_isr(uint32_t endpoint, usb_packet_t *packet);
-
-extern volatile uint8_t usb_configuration;
-
-extern uint16_t usb_rx_byte_count_data[NUM_ENDPOINTS];
-static inline uint32_t usb_rx_byte_count(uint32_t endpoint) __attribute__((always_inline));
-static inline uint32_t usb_rx_byte_count(uint32_t endpoint)
-{
-        endpoint--;
-        if (endpoint >= NUM_ENDPOINTS) return 0;
-        return usb_rx_byte_count_data[endpoint];
-}
-
-#ifdef CDC_DATA_INTERFACE
-extern uint32_t usb_cdc_line_coding[2];
-extern volatile uint8_t usb_cdc_line_rtsdtr;
-extern volatile uint8_t usb_cdc_transmit_flush_timer;
-extern void usb_serial_flush_callback(void);
-#endif
-
-#ifdef SEREMU_INTERFACE
-extern volatile uint8_t usb_seremu_transmit_flush_timer;
-extern void usb_seremu_flush_callback(void);
-#endif
-
-#ifdef KEYBOARD_INTERFACE
-extern uint8_t keyboard_modifier_keys;
-extern uint8_t keyboard_keys[6];
-extern uint8_t keyboard_protocol;
-extern uint8_t keyboard_idle_config;
-extern uint8_t keyboard_idle_count;
-extern volatile uint8_t keyboard_leds;
-#endif
-
-#ifdef MIDI_INTERFACE
-extern void usb_midi_flush_output(void);
-#endif
-
-#ifdef FLIGHTSIM_INTERFACE
-extern void usb_flightsim_flush_callback(void);
-#endif
-
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif // F_CPU >= 20 MHz
-
-#endif
diff --git a/ports/teensy/core/usb_mem.c b/ports/teensy/core/usb_mem.c
deleted file mode 100644
index 2424327d3c..0000000000
--- a/ports/teensy/core/usb_mem.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#if F_CPU >= 20000000
-
-#include "mk20dx128.h"
-//#include "HardwareSerial.h"
-#include "usb_dev.h"
-#include "usb_mem.h"
-
-__attribute__ ((section(".usbbuffers"), used))
-unsigned char usb_buffer_memory[NUM_USB_BUFFERS * sizeof(usb_packet_t)];
-
-static uint32_t usb_buffer_available = 0xFFFFFFFF;
-
-// use bitmask and CLZ instruction to implement fast free list
-// http://www.archivum.info/gnu.gcc.help/2006-08/00148/Re-GCC-Inline-Assembly.html
-// http://gcc.gnu.org/ml/gcc/2012-06/msg00015.html
-// __builtin_clz()
-
-usb_packet_t * usb_malloc(void)
-{
-	unsigned int n, avail;
-	uint8_t *p;
-
-	__disable_irq();
-	avail = usb_buffer_available;
-	n = __builtin_clz(avail); // clz = count leading zeros
-	if (n >= NUM_USB_BUFFERS) {
-		__enable_irq();
-		return NULL;
-	}
-	//serial_print("malloc:");
-	//serial_phex(n);
-	//serial_print("\n");
-
-	usb_buffer_available = avail & ~(0x80000000 >> n);
-	__enable_irq();
-	p = usb_buffer_memory + (n * sizeof(usb_packet_t));
-	//serial_print("malloc:");
-	//serial_phex32((int)p);
-	//serial_print("\n");
-	*(uint32_t *)p = 0;
-	*(uint32_t *)(p + 4) = 0;
-	return (usb_packet_t *)p;
-}
-
-// for the receive endpoints to request memory
-extern uint8_t usb_rx_memory_needed;
-extern void usb_rx_memory(usb_packet_t *packet);
-
-void usb_free(usb_packet_t *p)
-{
-	unsigned int n, mask;
-
-	//serial_print("free:");
-	n = ((uint8_t *)p - usb_buffer_memory) / sizeof(usb_packet_t);
-	if (n >= NUM_USB_BUFFERS) return;
-	//serial_phex(n);
-	//serial_print("\n");
-
-	// if any endpoints are starving for memory to receive
-	// packets, give this memory to them immediately!
-	if (usb_rx_memory_needed && usb_configuration) {
-		//serial_print("give to rx:");
-		//serial_phex32((int)p);
-		//serial_print("\n");
-		usb_rx_memory(p);
-		return;
-	}
-
-	mask = (0x80000000 >> n);
-	__disable_irq();
-	usb_buffer_available |= mask;
-	__enable_irq();
-
-	//serial_print("free:");
-	//serial_phex32((int)p);
-	//serial_print("\n");
-}
-
-#endif // F_CPU >= 20 MHz
diff --git a/ports/teensy/core/usb_mem.h b/ports/teensy/core/usb_mem.h
deleted file mode 100644
index 94d1eb4d2e..0000000000
--- a/ports/teensy/core/usb_mem.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _usb_mem_h_
-#define _usb_mem_h_
-
-#include <stdint.h>
-
-typedef struct usb_packet_struct {
-	uint16_t len;
-	uint16_t index;
-	struct usb_packet_struct *next;
-	uint8_t buf[64];
-} usb_packet_t;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-usb_packet_t * usb_malloc(void);
-void usb_free(usb_packet_t *p);
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif
diff --git a/ports/teensy/core/usb_names.h b/ports/teensy/core/usb_names.h
deleted file mode 100644
index 067cb95e9b..0000000000
--- a/ports/teensy/core/usb_names.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _usb_names_h_
-#define _usb_names_h_
-
-// These definitions are intended to allow users to override the default
-// USB manufacturer, product and serial number strings.
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct usb_string_descriptor_struct {
-	uint8_t bLength;
-	uint8_t bDescriptorType;
-	uint16_t wString[];
-};
-
-extern struct usb_string_descriptor_struct usb_string_manufacturer_name;
-extern struct usb_string_descriptor_struct usb_string_product_name;
-extern struct usb_string_descriptor_struct usb_string_serial_number;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/ports/teensy/core/usb_serial.c b/ports/teensy/core/usb_serial.c
deleted file mode 100644
index 3b38ec8b62..0000000000
--- a/ports/teensy/core/usb_serial.c
+++ /dev/null
@@ -1,273 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include "usb_dev.h"
-#include "usb_serial.h"
-#include "core_pins.h" // for yield()
-//#include "HardwareSerial.h"
-#include <string.h> // for memcpy()
-
-// defined by usb_dev.h -> usb_desc.h
-#if defined(CDC_STATUS_INTERFACE) && defined(CDC_DATA_INTERFACE)
-
-uint32_t usb_cdc_line_coding[2];
-volatile uint8_t usb_cdc_line_rtsdtr=0;
-volatile uint8_t usb_cdc_transmit_flush_timer=0;
-
-static usb_packet_t *rx_packet=NULL;
-static usb_packet_t *tx_packet=NULL;
-static volatile uint8_t tx_noautoflush=0;
-
-#define TRANSMIT_FLUSH_TIMEOUT	5   /* in milliseconds */
-
-// get the next character, or -1 if nothing received
-int usb_serial_getchar(void)
-{
-	unsigned int i;
-	int c;
-
-	if (!rx_packet) {
-		if (!usb_configuration) return -1;
-		rx_packet = usb_rx(CDC_RX_ENDPOINT);
-		if (!rx_packet) return -1;
-	}
-	i = rx_packet->index;
-	c = rx_packet->buf[i++];
-	if (i >= rx_packet->len) {
-		usb_free(rx_packet);
-		rx_packet = NULL;
-	} else {
-		rx_packet->index = i;
-	}
-	return c;
-}
-
-// peek at the next character, or -1 if nothing received
-int usb_serial_peekchar(void)
-{
-	if (!rx_packet) {
-		if (!usb_configuration) return -1;
-		rx_packet = usb_rx(CDC_RX_ENDPOINT);
-		if (!rx_packet) return -1;
-	}
-	if (!rx_packet) return -1;
-	return rx_packet->buf[rx_packet->index];
-}
-
-// number of bytes available in the receive buffer
-int usb_serial_available(void)
-{
-	int count;
-	count = usb_rx_byte_count(CDC_RX_ENDPOINT);
-	if (rx_packet) count += rx_packet->len - rx_packet->index;
-	return count;
-}
-
-// read a block of bytes to a buffer
-int usb_serial_read(void *buffer, uint32_t size)
-{
-	uint8_t *p = (uint8_t *)buffer;
-	uint32_t qty, count=0;
-
-	while (size) {
-		if (!usb_configuration) break;
-		if (!rx_packet) {
-			rx:
-			rx_packet = usb_rx(CDC_RX_ENDPOINT);
-			if (!rx_packet) break;
-			if (rx_packet->len == 0) {
-				usb_free(rx_packet);
-				goto rx;
-			}
-		}
-		qty = rx_packet->len - rx_packet->index;
-		if (qty > size) qty = size;
-		memcpy(p, rx_packet->buf + rx_packet->index, qty);
-		p += qty;
-		count += qty;
-		size -= qty;
-		rx_packet->index += qty;
-		if (rx_packet->index >= rx_packet->len) {
-			usb_free(rx_packet);
-			rx_packet = NULL;
-		}
-	}
-	return count;
-}
-
-// discard any buffered input
-void usb_serial_flush_input(void)
-{
-	usb_packet_t *rx;
-
-	if (!usb_configuration) return;
-	if (rx_packet) {
-		usb_free(rx_packet);
-		rx_packet = NULL;
-	}
-	while (1) {
-		rx = usb_rx(CDC_RX_ENDPOINT);
-		if (!rx) break;
-		usb_free(rx);
-	}
-}
-
-// Maximum number of transmit packets to queue so we don't starve other endpoints for memory
-#define TX_PACKET_LIMIT 8
-
-// When the PC isn't listening, how long do we wait before discarding data?  If this is
-// too short, we risk losing data during the stalls that are common with ordinary desktop
-// software.  If it's too long, we stall the user's program when no software is running.
-#define TX_TIMEOUT_MSEC 70
-
-#if F_CPU == 168000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 1100)
-#elif F_CPU == 144000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 932)
-#elif F_CPU == 120000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 764)
-#elif F_CPU == 96000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 596)
-#elif F_CPU == 72000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 512)
-#elif F_CPU == 48000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 428)
-#elif F_CPU == 24000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 262)
-#endif
-
-// When we've suffered the transmit timeout, don't wait again until the computer
-// begins accepting data.  If no software is running to receive, we'll just discard
-// data as rapidly as Serial.print() can generate it, until there's something to
-// actually receive it.
-static uint8_t transmit_previous_timeout=0;
-
-
-// transmit a character.  0 returned on success, -1 on error
-int usb_serial_putchar(uint8_t c)
-{
-	return usb_serial_write(&c, 1);
-}
-
-
-int usb_serial_write(const void *buffer, uint32_t size)
-{
-	uint32_t len;
-	uint32_t wait_count;
-	const uint8_t *src = (const uint8_t *)buffer;
-	uint8_t *dest;
-
-	tx_noautoflush = 1;
-	while (size > 0) {
-		if (!tx_packet) {
-			wait_count = 0;
-			while (1) {
-				if (!usb_configuration) {
-					tx_noautoflush = 0;
-					return -1;
-				}
-				if (usb_tx_packet_count(CDC_TX_ENDPOINT) < TX_PACKET_LIMIT) {
-					tx_noautoflush = 1;
-					tx_packet = usb_malloc();
-					if (tx_packet) break;
-					tx_noautoflush = 0;
-				}
-				if (++wait_count > TX_TIMEOUT || transmit_previous_timeout) {
-					transmit_previous_timeout = 1;
-					return -1;
-				}
-				yield();
-			}
-		}
-		transmit_previous_timeout = 0;
-		len = CDC_TX_SIZE - tx_packet->index;
-		if (len > size) len = size;
-		dest = tx_packet->buf + tx_packet->index;
-		tx_packet->index += len;
-		size -= len;
-		while (len-- > 0) *dest++ = *src++;
-		if (tx_packet->index >= CDC_TX_SIZE) {
-			tx_packet->len = CDC_TX_SIZE;
-			usb_tx(CDC_TX_ENDPOINT, tx_packet);
-			tx_packet = NULL;
-		}
-		usb_cdc_transmit_flush_timer = TRANSMIT_FLUSH_TIMEOUT;
-	}
-	tx_noautoflush = 0;
-	return 0;
-}
-
-void usb_serial_flush_output(void)
-{
-	if (!usb_configuration) return;
-	tx_noautoflush = 1;
-	if (tx_packet) {
-		usb_cdc_transmit_flush_timer = 0;
-		tx_packet->len = tx_packet->index;
-		usb_tx(CDC_TX_ENDPOINT, tx_packet);
-		tx_packet = NULL;
-	} else {
-		usb_packet_t *tx = usb_malloc();
-		if (tx) {
-			usb_cdc_transmit_flush_timer = 0;
-			usb_tx(CDC_TX_ENDPOINT, tx);
-		} else {
-			usb_cdc_transmit_flush_timer = 1;
-		}
-	}
-	tx_noautoflush = 0;
-}
-
-void usb_serial_flush_callback(void)
-{
-	if (tx_noautoflush) return;
-	if (tx_packet) {
-		tx_packet->len = tx_packet->index;
-		usb_tx(CDC_TX_ENDPOINT, tx_packet);
-		tx_packet = NULL;
-	} else {
-		usb_packet_t *tx = usb_malloc();
-		if (tx) {
-			usb_tx(CDC_TX_ENDPOINT, tx);
-		} else {
-			usb_cdc_transmit_flush_timer = 1;
-		}
-	}
-}
-
-
-
-
-
-
-
-
-
-#endif // CDC_STATUS_INTERFACE && CDC_DATA_INTERFACE
diff --git a/ports/teensy/core/usb_serial.h b/ports/teensy/core/usb_serial.h
deleted file mode 100644
index 9c0429d198..0000000000
--- a/ports/teensy/core/usb_serial.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef USBserial_h_
-#define USBserial_h_
-
-#if defined(USB_SERIAL) || defined(USB_SERIAL_HID)
-
-#include <inttypes.h>
-
-#if F_CPU >= 20000000
-
-// C language implementation
-#ifdef __cplusplus
-extern "C" {
-#endif
-int usb_serial_getchar(void);
-int usb_serial_peekchar(void);
-int usb_serial_available(void);
-int usb_serial_read(void *buffer, uint32_t size);
-void usb_serial_flush_input(void);
-int usb_serial_putchar(uint8_t c);
-int usb_serial_write(const void *buffer, uint32_t size);
-void usb_serial_flush_output(void);
-extern uint32_t usb_cdc_line_coding[2];
-extern volatile uint8_t usb_cdc_line_rtsdtr;
-extern volatile uint8_t usb_cdc_transmit_flush_timer;
-extern volatile uint8_t usb_configuration;
-#ifdef __cplusplus
-}
-#endif
-
-#define USB_SERIAL_DTR  0x01
-#define USB_SERIAL_RTS  0x02
-
-// C++ interface
-#ifdef __cplusplus
-#include "Stream.h"
-class usb_serial_class : public Stream
-{
-public:
-        void begin(long) { /* TODO: call a function that tries to wait for enumeration */ };
-        void end() { /* TODO: flush output and shut down USB port */ };
-        virtual int available() { return usb_serial_available(); }
-        virtual int read() { return usb_serial_getchar(); }
-        virtual int peek() { return usb_serial_peekchar(); }
-        virtual void flush() { usb_serial_flush_output(); }  // TODO: actually wait for data to leave USB...
-        virtual size_t write(uint8_t c) { return usb_serial_putchar(c); }
-        virtual size_t write(const uint8_t *buffer, size_t size) { return usb_serial_write(buffer, size); }
-	size_t write(unsigned long n) { return write((uint8_t)n); }
-	size_t write(long n) { return write((uint8_t)n); }
-	size_t write(unsigned int n) { return write((uint8_t)n); }
-	size_t write(int n) { return write((uint8_t)n); }
-	using Print::write;
-        void send_now(void) { usb_serial_flush_output(); }
-        uint32_t baud(void) { return usb_cdc_line_coding[0]; }
-        uint8_t stopbits(void) { uint8_t b = usb_cdc_line_coding[1]; if (!b) b = 1; return b; }
-        uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even
-        uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; }
-        uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; }
-        uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; }
-        operator bool() { return usb_configuration && (usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)); }
-	size_t readBytes(char *buffer, size_t length) {
-		size_t count=0;
-		unsigned long startMillis = millis();
-		do {
-			count += usb_serial_read(buffer + count, length - count);
-			if (count >= length) return count;
-		} while(millis() - startMillis < _timeout);
-		setReadError();
-		return count;
-	}
-
-};
-extern usb_serial_class Serial;
-#endif // __cplusplus
-
-
-#else  // F_CPU < 20 MHz
-
-// Allow Arduino programs using Serial to compile, but Serial will do nothing.
-#ifdef __cplusplus
-#include "Stream.h"
-class usb_serial_class : public Stream
-{
-public:
-        void begin(long) { };
-        void end() { };
-        virtual int available() { return 0; }
-        virtual int read() { return -1; }
-        virtual int peek() { return -1; }
-        virtual void flush() { }
-        virtual size_t write(uint8_t c) { return 1; }
-        virtual size_t write(const uint8_t *buffer, size_t size) { return size; }
-	size_t write(unsigned long n) { return 1; }
-	size_t write(long n) { return 1; }
-	size_t write(unsigned int n) { return 1; }
-	size_t write(int n) { return 1; }
-	using Print::write;
-        void send_now(void) { }
-        uint32_t baud(void) { return 0; }
-        uint8_t stopbits(void) { return 1; }
-        uint8_t paritytype(void) { return 0; }
-        uint8_t numbits(void) { return 8; }
-        uint8_t dtr(void) { return 1; }
-        uint8_t rts(void) { return 1; }
-        operator bool() { return true; }
-};
-
-extern usb_serial_class Serial;
-#endif // __cplusplus
-
-#endif // F_CPU
-
-#endif // USB_SERIAL || USB_SERIAL_HID
-
-#endif // USBserial_h_
diff --git a/ports/teensy/core/yield.c b/ports/teensy/core/yield.c
deleted file mode 100644
index 06c741a673..0000000000
--- a/ports/teensy/core/yield.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be 
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows 
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-void yield(void) __attribute__ ((weak));
-void yield(void) {};
diff --git a/ports/teensy/hal_ftm.c b/ports/teensy/hal_ftm.c
deleted file mode 100644
index 7ae70b2bbb..0000000000
--- a/ports/teensy/hal_ftm.c
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include <stdint.h>
-#include <mk20dx128.h>
-#include "teensy_hal.h"
-
-void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm) {
-    /* Check the parameters */
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-    assert_param(IS_FTM_PRESCALERSHIFT(hftm->Init.PrescalerShift));
-    assert_param(IS_FTM_COUNTERMODE(hftm->Init.CounterMode));
-    assert_param(IS_FTM_PERIOD(hftm->Init.Period));
-
-    hftm->State = HAL_FTM_STATE_BUSY;
-
-    FTMx->MODE = FTM_MODE_WPDIS;
-    FTMx->SC = 0;
-    FTMx->MOD = hftm->Init.Period;
-    uint32_t sc = FTM_SC_PS(hftm->Init.PrescalerShift);
-    if (hftm->Init.CounterMode == FTM_COUNTERMODE_CENTER) {
-        sc |= FTM_SC_CPWMS;
-    }
-    FTMx->SC = sc;
-
-    hftm->State = HAL_FTM_STATE_READY;
-}
-
-void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm) {
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-
-    hftm->State = HAL_FTM_STATE_BUSY;
-
-    FTMx->CNT = 0;
-    FTMx->SC &= ~FTM_SC_CLKS(3);
-    FTMx->SC |= FTM_SC_CLKS(1);
-
-    hftm->State = HAL_FTM_STATE_READY;
-}
-
-void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm) {
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-
-    hftm->State = HAL_FTM_STATE_BUSY;
-
-    FTMx->CNT = 0;
-    FTMx->SC |= FTM_SC_CLKS(1) | FTM_SC_TOIE;
-
-    hftm->State = HAL_FTM_STATE_READY;
-}
-
-void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm) {
-    assert_param(IS_FTM_INSTANCE(hftm->Instance));
-
-    hftm->State = HAL_FTM_STATE_BUSY;
-
-    __HAL_FTM_DISABLE_TOF_IT(hftm);
-
-    hftm->State = HAL_FTM_STATE_RESET;
-}
-
-void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm) {
-    HAL_FTM_Base_Init(hftm);
-}
-
-void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef *sConfig, uint32_t channel) {
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-    assert_param(IS_FTM_CHANNEL(channel));
-    assert_param(IS_FTM_OC_MODE(sConfig->OCMode));
-    assert_param(IS_FTM_OC_PULSE(sConfig->Pulse));
-    assert_param(IS_FTM_OC_POLARITY(sConfig->OCPolarity));
-
-    hftm->State = HAL_FTM_STATE_BUSY;
-
-    FTMx->channel[channel].CSC = sConfig->OCMode;
-    FTMx->channel[channel].CV = sConfig->Pulse;
-    if (sConfig->OCPolarity & 1) {
-        FTMx->POL |= (1 << channel);
-    } else {
-        FTMx->POL &= ~(1 << channel);
-    }
-
-    hftm->State = HAL_FTM_STATE_READY;
-}
-
-void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel) {
-    // Nothing else to do
-}
-
-void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) {
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-
-    FTMx->channel[channel].CSC |= FTM_CSC_CHIE;
-}
-
-void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm) {
-    HAL_FTM_Base_DeInit(hftm);
-}
-
-void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm) {
-    HAL_FTM_Base_Init(hftm);
-}
-
-void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef *sConfig, uint32_t channel) {
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-    assert_param(IS_FTM_CHANNEL(channel));
-    assert_param(IS_FTM_PWM_MODE(sConfig->OCMode));
-    assert_param(IS_FTM_OC_PULSE(sConfig->Pulse));
-    assert_param(IS_FTM_OC_POLARITY(sConfig->OCPolarity));
-
-    hftm->State = HAL_FTM_STATE_BUSY;
-
-    FTMx->channel[channel].CSC = sConfig->OCMode;
-    FTMx->channel[channel].CV = sConfig->Pulse;
-    if (sConfig->OCPolarity & 1) {
-        FTMx->POL |= (1 << channel);
-    } else {
-        FTMx->POL &= ~(1 << channel);
-    }
-
-    hftm->State = HAL_FTM_STATE_READY;
-}
-
-void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel) {
-    // Nothing else to do
-}
-
-void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) {
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-
-    FTMx->channel[channel].CSC |= FTM_CSC_CHIE;
-}
-
-void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm) {
-    HAL_FTM_Base_DeInit(hftm);
-}
-
-void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm) {
-    HAL_FTM_Base_Init(hftm);
-}
-
-void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef *sConfig, uint32_t channel) {
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-    assert_param(IS_FTM_CHANNEL(channel));
-    assert_param(IS_FTM_IC_POLARITY(sConfig->ICPolarity));
-
-    hftm->State = HAL_FTM_STATE_BUSY;
-
-    FTMx->channel[channel].CSC = sConfig->ICPolarity;
-
-    hftm->State = HAL_FTM_STATE_READY;
-}
-
-void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel) {
-    // FTM_TypeDef *FTMx = hftm->Instance;
-    // assert_param(IS_FTM_INSTANCE(FTMx));
-
-    // Nothing else to do
-}
-
-void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) {
-    FTM_TypeDef *FTMx = hftm->Instance;
-    assert_param(IS_FTM_INSTANCE(FTMx));
-
-    FTMx->channel[channel].CSC |= FTM_CSC_CHIE;
-}
-
-void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm) {
-    HAL_FTM_Base_DeInit(hftm);
-}
diff --git a/ports/teensy/hal_ftm.h b/ports/teensy/hal_ftm.h
deleted file mode 100644
index 17503c8f2d..0000000000
--- a/ports/teensy/hal_ftm.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_TEENSY_HAL_FTM_H
-#define MICROPY_INCLUDED_TEENSY_HAL_FTM_H
-
-#define FTM0    ((FTM_TypeDef *)&FTM0_SC)
-#define FTM1    ((FTM_TypeDef *)&FTM1_SC)
-#define FTM2    ((FTM_TypeDef *)&FTM2_SC)
-
-typedef struct {
-    volatile uint32_t CSC;      // Channel x Status And Control
-    volatile uint32_t CV;               // Channel x Value
-} FTM_ChannelTypeDef;
-
-typedef struct {
-    volatile uint32_t SC;               // Status And Control
-    volatile uint32_t CNT;              // Counter
-    volatile uint32_t MOD;              // Modulo
-    FTM_ChannelTypeDef channel[8];
-    volatile uint32_t CNTIN;    // Counter Initial Value
-    volatile uint32_t STATUS;   // Capture And Compare Status
-    volatile uint32_t MODE;             // Features Mode Selection
-    volatile uint32_t SYNC;             // Synchronization
-    volatile uint32_t OUTINIT;  // Initial State For Channels Output
-    volatile uint32_t OUTMASK;  // Output Mask
-    volatile uint32_t COMBINE;  // Function For Linked Channels
-    volatile uint32_t DEADTIME; // Deadtime Insertion Control
-    volatile uint32_t EXTTRIG;  // FTM External Trigger
-    volatile uint32_t POL;              // Channels Polarity
-    volatile uint32_t FMS;              // Fault Mode Status
-    volatile uint32_t FILTER;   // Input Capture Filter Control
-    volatile uint32_t FLTCTRL;  // Fault Control
-    volatile uint32_t QDCTRL;   // Quadrature Decoder Control And Status
-    volatile uint32_t CONF;             // Configuration
-    volatile uint32_t FLTPOL;   // FTM Fault Input Polarity
-    volatile uint32_t SYNCONF;  // Synchronization Configuration
-    volatile uint32_t INVCTRL;  // FTM Inverting Control
-    volatile uint32_t SWOCTRL;  // FTM Software Output Control
-    volatile uint32_t PWMLOAD;  // FTM PWM Load
-} FTM_TypeDef;
-
-typedef struct {
-    uint32_t PrescalerShift;    // Sets the prescaler to 1 << PrescalerShift
-    uint32_t CounterMode;       // One of FTM_COUNTERMODE_xxx
-    uint32_t Period;            // Specifies the Period for determining timer overflow
-} FTM_Base_InitTypeDef;
-
-typedef struct {
-    uint32_t OCMode;            // One of FTM_OCMODE_xxx
-    uint32_t Pulse;             // Specifies initial pulse width (0-0xffff)
-    uint32_t OCPolarity;        // One of FTM_OCPOLRITY_xxx
-} FTM_OC_InitTypeDef;
-
-typedef struct {
-    uint32_t ICPolarity;        // Specifies Rising/Falling/Both
-} FTM_IC_InitTypeDef;
-
-#define IS_FTM_INSTANCE(INSTANCE)   (((INSTANCE) == FTM0) || \
-    ((INSTANCE) == FTM1) || \
-    ((INSTANCE) == FTM2))
-
-#define IS_FTM_PRESCALERSHIFT(PRESCALERSHIFT) (((PRESCALERSHIFT)&~7) == 0)
-
-#define FTM_COUNTERMODE_UP      (0)
-#define FTM_COUNTERMODE_CENTER  (FTM_SC_CPWMS)
-
-#define IS_FTM_COUNTERMODE(MODE) (((MODE) == FTM_COUNTERMODE_UP) || \
-    ((MODE) == FTM_COUNTERMODE_CENTER))
-
-#define IS_FTM_PERIOD(PERIOD)   (((PERIOD) & 0xFFFF0000) == 0)
-
-#define FTM_CSC_CHF     0x80
-#define FTM_CSC_CHIE    0x40
-#define FTM_CSC_MSB     0x20
-#define FTM_CSC_MSA     0x10
-#define FTM_CSC_ELSB    0x08
-#define FTM_CSC_ELSA    0x04
-#define FTM_CSC_DMA     0x01
-
-#define FTM_OCMODE_TIMING   (0)
-#define FTM_OCMODE_ACTIVE   (FTM_CSC_MSA | FTM_CSC_ELSB | FTM_CSC_ELSA)
-#define FTM_OCMODE_INACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB)
-#define FTM_OCMODE_TOGGLE   (FTM_CSC_MSA | FTM_CSC_ELSA)
-#define FTM_OCMODE_PWM1     (FTM_CSC_MSB | FTM_CSC_ELSB)
-#define FTM_OCMODE_PWM2     (FTM_CSC_MSB | FTM_CSC_ELSA)
-
-#define IS_FTM_OC_MODE(mode)        ((mode) == FTM_OCMODE_TIMING || \
-    (mode) == FTM_OCMODE_ACTIVE || \
-    (mode) == FTM_OCMODE_INACTIVE || \
-    (mode) == FTM_OCMODE_TOGGLE)
-
-#define IS_FTM_PWM_MODE(mode)       ((mode) == FTM_OCMODE_PWM1 || \
-    (mode) == FTM_OCMODE_PWM2)
-
-#define IS_FTM_CHANNEL(channel)     (((channel) & ~7) == 0)
-
-#define IS_FTM_PULSE(pulse)         (((pulse) & ~0xffff) == 0)
-
-#define FTM_OCPOLARITY_HIGH     (0)
-#define FTM_OCPOLARITY_LOW      (1)
-
-#define IS_FTM_OC_POLARITY(polarity) ((polarity) == FTM_OCPOLARITY_HIGH || \
-    (polarity) == FTM_OCPOLARITY_LOW)
-
-#define FTM_ICPOLARITY_RISING   (FTM_CSC_ELSA)
-#define FTM_ICPOLARITY_FALLING  (FTM_CSC_ELSB)
-#define FTM_ICPOLARITY_BOTH     (FTM_CSC_ELSA | FTM_CSC_ELSB)
-
-#define IS_FTM_IC_POLARITY(polarity) ((polarity) == FTM_ICPOLARITY_RISING || \
-    (polarity) == FTM_ICPOLARITY_FALLING || \
-    (polarity) == FTM_ICPOLARITY_BOTH)
-
-typedef enum {
-    HAL_FTM_STATE_RESET     = 0x00,
-    HAL_FTM_STATE_READY     = 0x01,
-    HAL_FTM_STATE_BUSY      = 0x02,
-} HAL_FTM_State;
-
-typedef struct {
-    FTM_TypeDef *Instance;
-    FTM_Base_InitTypeDef Init;
-    HAL_FTM_State State;
-
-} FTM_HandleTypeDef;
-
-#define __HAL_FTM_GET_TOF_FLAG(HANDLE)     (((HANDLE)->Instance->SC & FTM_SC_TOF) != 0)
-#define __HAL_FTM_CLEAR_TOF_FLAG(HANDLE)    ((HANDLE)->Instance->SC &= ~FTM_SC_TOF)
-
-#define __HAL_FTM_GET_TOF_IT(HANDLE)       (((HANDLE)->Instance->SC & FTM_SC_TOIE) != 0)
-#define __HAL_FTM_ENABLE_TOF_IT(HANDLE)     ((HANDLE)->Instance->SC |= FTM_SC_TOIE)
-#define __HAL_FTM_DISABLE_TOF_IT(HANDLE)    ((HANDLE)->Instance->SC &= ~FTM_SC_TOIE)
-
-#define __HAL_FTM_GET_CH_FLAG(HANDLE, CH)  (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHF) != 0)
-#define __HAL_FTM_CLEAR_CH_FLAG(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHF)
-
-#define __HAL_FTM_GET_CH_IT(HANDLE, CH)    (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHIE) != 0)
-#define __HAL_FTM_ENABLE_CH_IT(HANDLE, CH)  ((HANDLE)->Instance->channel[CH].CSC |= FTM_CSC_CHIE)
-#define __HAL_FTM_DISABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHIE)
-
-void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm);
-void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm);
-void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm);
-void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm);
-
-void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm);
-void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef *sConfig, uint32_t channel);
-void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
-void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
-void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm);
-
-void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm);
-void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef *sConfig, uint32_t channel);
-void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
-void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
-void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm);
-
-void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm);
-void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef *sConfig, uint32_t channel);
-void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
-void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
-void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm);
-
-#endif // MICROPY_INCLUDED_TEENSY_HAL_FTM_H
diff --git a/ports/teensy/hal_gpio.c b/ports/teensy/hal_gpio.c
deleted file mode 100644
index e8bc1eb5ce..0000000000
--- a/ports/teensy/hal_gpio.c
+++ /dev/null
@@ -1,115 +0,0 @@
-#include <stdint.h>
-#include <mk20dx128.h>
-#include "teensy_hal.h"
-
-#define GPIO_NUMBER 32
-
-void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) {
-    /* Check the parameters */
-    assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
-    assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
-    assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
-
-    /* Configure the port pins */
-    for (uint32_t position = 0; position < GPIO_NUMBER; position++) {
-        uint32_t bitmask = 1 << position;
-        if ((GPIO_Init->Pin & bitmask) == 0) {
-            continue;
-        }
-        volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(GPIOx, position);
-
-        /*--------------------- GPIO Mode Configuration ------------------------*/
-        /* In case of Alternate function mode selection */
-        if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) {
-            /* Check the Alternate function parameter */
-            assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
-        } else if (GPIO_Init->Mode == GPIO_MODE_ANALOG) {
-            GPIO_Init->Alternate = 0;
-        } else {
-            GPIO_Init->Alternate = 1;
-        }
-
-        /* Configure Alternate function mapped with the current IO */
-        *port_pcr &= ~PORT_PCR_MUX_MASK;
-        *port_pcr |= PORT_PCR_MUX(GPIO_Init->Alternate);
-
-        /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
-        if (GPIO_Init->Mode == GPIO_MODE_INPUT || GPIO_Init->Mode == GPIO_MODE_ANALOG) {
-            GPIOx->PDDR &= ~bitmask;
-        } else {
-            GPIOx->PDDR |= bitmask;
-        }
-
-        /* In case of Output or Alternate function mode selection */
-        if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
-            (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) {
-            /* Check the Speed parameter */
-            assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
-
-            *port_pcr |= PORT_PCR_DSE;
-
-            /* Configure the IO Speed */
-            if (GPIO_Init->Speed > GPIO_SPEED_FREQ_MEDIUM) {
-                *port_pcr &= ~PORT_PCR_SRE;
-            } else {
-                *port_pcr |= PORT_PCR_SRE;
-            }
-
-            /* Configure the IO Output Type */
-            if (GPIO_Init->Mode & GPIO_OUTPUT_TYPE) {
-                *port_pcr |= PORT_PCR_ODE;  // OD
-            } else {
-                *port_pcr &= ~PORT_PCR_ODE; // PP
-            }
-        } else {
-            *port_pcr &= ~PORT_PCR_DSE;
-        }
-
-        /* Activate the Pull-up or Pull down resistor for the current IO */
-        if (GPIO_Init->Pull == GPIO_NOPULL) {
-            *port_pcr &= ~PORT_PCR_PE;
-        } else {
-            *port_pcr |= PORT_PCR_PE;
-            if (GPIO_Init->Pull == GPIO_PULLDOWN) {
-                *port_pcr &= ~PORT_PCR_PS;
-            } else {
-                *port_pcr |= PORT_PCR_PS;
-            }
-        }
-
-        #if 0
-        /*--------------------- EXTI Mode Configuration ------------------------*/
-        /* Configure the External Interrupt or event for the current IO */
-        if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) {
-            /* Enable SYSCFG Clock */
-            __SYSCFG_CLK_ENABLE();
-
-            temp = ((uint32_t)0x0F) << (4 * (position & 0x03));
-            SYSCFG->EXTICR[position >> 2] &= ~temp;
-            SYSCFG->EXTICR[position >> 2] |= ((uint32_t)(__HAL_GET_GPIO_SOURCE(GPIOx)) << (4 * (position & 0x03)));
-
-            /* Clear EXTI line configuration */
-            EXTI->IMR &= ~((uint32_t)iocurrent);
-            EXTI->EMR &= ~((uint32_t)iocurrent);
-
-            if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) {
-                EXTI->IMR |= iocurrent;
-            }
-            if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) {
-                EXTI->EMR |= iocurrent;
-            }
-
-            /* Clear Rising Falling edge configuration */
-            EXTI->RTSR &= ~((uint32_t)iocurrent);
-            EXTI->FTSR &= ~((uint32_t)iocurrent);
-
-            if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) {
-                EXTI->RTSR |= iocurrent;
-            }
-            if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) {
-                EXTI->FTSR |= iocurrent;
-            }
-        }
-        #endif
-    }
-}
diff --git a/ports/teensy/help.c b/ports/teensy/help.c
deleted file mode 100644
index e2857aedfd..0000000000
--- a/ports/teensy/help.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "py/builtin.h"
-
-const char teensy_help_text[] =
-    "Welcome to MicroPython!\n"
-    "\n"
-    "For online docs please visit http://docs.micropython.org/\n"
-    "\n"
-    "Quick overview of commands for the board:\n"
-    "  pyb.info()    -- print some general information\n"
-    "  pyb.gc()      -- run the garbage collector\n"
-    "  pyb.delay(n)  -- wait for n milliseconds\n"
-    "  pyb.Switch()  -- create a switch object\n"
-    "                   Switch methods: (), callback(f)\n"
-    "  pyb.LED(n)    -- create an LED object for LED n (n=1,2,3,4)\n"
-    "                   LED methods: on(), off(), toggle(), intensity(<n>)\n"
-    "  pyb.Pin(pin)  -- get a pin, eg pyb.Pin('X1')\n"
-    "  pyb.Pin(pin, m, [p]) -- get a pin and configure it for IO mode m, pull mode p\n"
-    "                   Pin methods: init(..), value([v]), high(), low()\n"
-    "  pyb.ExtInt(pin, m, p, callback) -- create an external interrupt object\n"
-    "  pyb.ADC(pin)  -- make an analog object from a pin\n"
-    "                   ADC methods: read(), read_timed(buf, freq)\n"
-    "  pyb.DAC(port) -- make a DAC object\n"
-    "                   DAC methods: triangle(freq), write(n), write_timed(buf, freq)\n"
-    "  pyb.RTC()     -- make an RTC object; methods: datetime([val])\n"
-    "  pyb.rng()     -- get a 30-bit hardware random number\n"
-    "  pyb.Servo(n)  -- create Servo object for servo n (n=1,2,3,4)\n"
-    "                   Servo methods: calibration(..), angle([x, [t]]), speed([x, [t]])\n"
-    "  pyb.Accel()   -- create an Accelerometer object\n"
-    "                   Accelerometer methods: x(), y(), z(), tilt(), filtered_xyz()\n"
-    "\n"
-    "Pins are numbered X1-X12, X17-X22, Y1-Y12, or by their MCU name\n"
-    "Pin IO modes are: pyb.Pin.IN, pyb.Pin.OUT_PP, pyb.Pin.OUT_OD\n"
-    "Pin pull modes are: pyb.Pin.PULL_NONE, pyb.Pin.PULL_UP, pyb.Pin.PULL_DOWN\n"
-    "Additional serial bus objects: pyb.I2C(n), pyb.SPI(n), pyb.UART(n)\n"
-    "\n"
-    "Control commands:\n"
-    "  CTRL-A        -- on a blank line, enter raw REPL mode\n"
-    "  CTRL-B        -- on a blank line, enter normal REPL mode\n"
-    "  CTRL-C        -- interrupt a running program\n"
-    "  CTRL-D        -- on a blank line, do a soft reset of the board\n"
-    "\n"
-    "For further help on a specific object, type help(obj)\n"
-;
diff --git a/ports/teensy/lcd.c b/ports/teensy/lcd.c
deleted file mode 100644
index e5d6115d75..0000000000
--- a/ports/teensy/lcd.c
+++ /dev/null
@@ -1,14 +0,0 @@
-#include "py/obj.h"
-#include "../stm32/lcd.h"
-
-void lcd_init(void) {
-}
-
-void lcd_print_str(const char *str) {
-    (void)str;
-}
-
-void lcd_print_strn(const char *str, unsigned int len) {
-    (void)str;
-    (void)len;
-}
diff --git a/ports/teensy/led.c b/ports/teensy/led.c
deleted file mode 100644
index 46c6ae492f..0000000000
--- a/ports/teensy/led.c
+++ /dev/null
@@ -1,144 +0,0 @@
-#include <stdio.h>
-
-#include "Arduino.h"
-
-#include "py/runtime.h"
-#include "py/mphal.h"
-#include "led.h"
-#include "pin.h"
-#include "genhdr/pins.h"
-
-typedef struct _pyb_led_obj_t {
-    mp_obj_base_t base;
-    mp_uint_t led_id;
-    const pin_obj_t *led_pin;
-} pyb_led_obj_t;
-
-STATIC const pyb_led_obj_t pyb_led_obj[] = {
-    {{&pyb_led_type}, 1, &MICROPY_HW_LED1},
-    #if defined(MICROPY_HW_LED2)
-    {{&pyb_led_type}, 2, &MICROPY_HW_LED2},
-    #if defined(MICROPY_HW_LED3)
-    {{&pyb_led_type}, 3, &MICROPY_HW_LED3},
-    #if defined(MICROPY_HW_LED4)
-    {{&pyb_led_type}, 4, &MICROPY_HW_LED4},
-    #endif
-    #endif
-    #endif
-};
-#define NUM_LEDS MP_ARRAY_SIZE(pyb_led_obj)
-
-void led_init(void) {
-    /* GPIO structure */
-    GPIO_InitTypeDef GPIO_InitStructure;
-
-    /* Configure I/O speed, mode, output type and pull */
-    GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
-    GPIO_InitStructure.Mode = MICROPY_HW_LED_OTYPE;
-    GPIO_InitStructure.Pull = GPIO_NOPULL;
-
-    /* Turn off LEDs and initialize */
-    for (int led = 0; led < NUM_LEDS; led++) {
-        const pin_obj_t *led_pin = pyb_led_obj[led].led_pin;
-        MICROPY_HW_LED_OFF(led_pin);
-        GPIO_InitStructure.Pin = led_pin->pin_mask;
-        HAL_GPIO_Init(led_pin->gpio, &GPIO_InitStructure);
-    }
-}
-
-void led_state(pyb_led_t led, int state) {
-    if (led < 1 || led > NUM_LEDS) {
-        return;
-    }
-    const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
-    // printf("led_state(%d,%d)\n", led, state);
-    if (state == 0) {
-        // turn LED off
-        MICROPY_HW_LED_OFF(led_pin);
-    } else {
-        // turn LED on
-        MICROPY_HW_LED_ON(led_pin);
-    }
-}
-
-void led_toggle(pyb_led_t led) {
-    if (led < 1 || led > NUM_LEDS) {
-        return;
-    }
-    const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
-    GPIO_TypeDef *gpio = led_pin->gpio;
-
-    // We don't know if we're turning the LED on or off, but we don't really
-    // care. Just invert the state.
-    if (gpio->PDOR & led_pin->pin_mask) {
-        // pin is high, make it low
-        gpio->PCOR = led_pin->pin_mask;
-    } else {
-        // pin is low, make it high
-        gpio->PSOR = led_pin->pin_mask;
-    }
-}
-
-/******************************************************************************/
-/* MicroPython bindings                                                       */
-
-void led_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    pyb_led_obj_t *self = self_in;
-    (void)kind;
-    mp_printf(print, "<LED %lu>", self->led_id);
-}
-
-STATIC mp_obj_t led_obj_make_new(const mp_obj_type_t *type, uint n_args, uint n_kw, const mp_obj_t *args) {
-    // check arguments
-    mp_arg_check_num(n_args, n_kw, 1, 1, false);
-
-    // get led number
-    mp_int_t led_id = mp_obj_get_int(args[0]);
-
-    // check led number
-    if (!(1 <= led_id && led_id <= NUM_LEDS)) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("LED %d does not exist"), led_id);
-    }
-
-    // return static led object
-    return (mp_obj_t)&pyb_led_obj[led_id - 1];
-}
-
-mp_obj_t led_obj_on(mp_obj_t self_in) {
-    pyb_led_obj_t *self = self_in;
-    led_state(self->led_id, 1);
-    return mp_const_none;
-}
-
-mp_obj_t led_obj_off(mp_obj_t self_in) {
-    pyb_led_obj_t *self = self_in;
-    led_state(self->led_id, 0);
-    return mp_const_none;
-}
-
-mp_obj_t led_obj_toggle(mp_obj_t self_in) {
-    pyb_led_obj_t *self = self_in;
-    led_toggle(self->led_id);
-    return mp_const_none;
-}
-
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_on_obj, led_obj_on);
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_off_obj, led_obj_off);
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_toggle_obj, led_obj_toggle);
-
-STATIC const mp_rom_map_elem_t led_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&led_obj_on_obj) },
-    { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&led_obj_off_obj) },
-    { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&led_obj_toggle_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(led_locals_dict, led_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    pyb_led_type,
-    MP_QSTR_LED,
-    MP_TYPE_FLAG_NONE,
-    make_new, led_obj_make_new,
-    print, led_obj_print,
-    locals_dict, &led_locals_dict
-    );
diff --git a/ports/teensy/led.h b/ports/teensy/led.h
deleted file mode 100644
index 5c45166ef2..0000000000
--- a/ports/teensy/led.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef MICROPY_INCLUDED_TEENSY_LED_H
-#define MICROPY_INCLUDED_TEENSY_LED_H
-
-typedef enum {
-    PYB_LED_BUILTIN = 1,
-} pyb_led_t;
-
-void led_init(void);
-void led_state(pyb_led_t led, int state);
-void led_toggle(pyb_led_t led);
-
-extern const mp_obj_type_t pyb_led_type;
-
-#endif // MICROPY_INCLUDED_TEENSY_LED_H
diff --git a/ports/teensy/lexerfrozen.c b/ports/teensy/lexerfrozen.c
deleted file mode 100644
index 59ccdabf09..0000000000
--- a/ports/teensy/lexerfrozen.c
+++ /dev/null
@@ -1,14 +0,0 @@
-#include <stdio.h>
-
-#include "py/builtin.h"
-#include "py/lexer.h"
-#include "py/runtime.h"
-#include "py/mperrno.h"
-
-mp_import_stat_t mp_import_stat(const char *path) {
-    return MP_IMPORT_STAT_NO_EXIST;
-}
-
-mp_lexer_t *mp_lexer_new_from_file(qstr filename) {
-    mp_raise_OSError(MP_ENOENT);
-}
diff --git a/ports/teensy/lexermemzip.h b/ports/teensy/lexermemzip.h
deleted file mode 100644
index cd7326a435..0000000000
--- a/ports/teensy/lexermemzip.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H
-#define MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H
-
-mp_lexer_t *mp_lexer_new_from_memzip_file(const char *filename);
-
-#endif // MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H
diff --git a/ports/teensy/main.c b/ports/teensy/main.c
deleted file mode 100644
index fa27326e93..0000000000
--- a/ports/teensy/main.c
+++ /dev/null
@@ -1,386 +0,0 @@
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <stdlib.h>
-
-#include "py/lexer.h"
-#include "py/runtime.h"
-#include "py/stackctrl.h"
-#include "py/gc.h"
-#include "py/mphal.h"
-#include "gccollect.h"
-#include "shared/readline/readline.h"
-#include "shared/runtime/gchelper.h"
-#include "shared/runtime/pyexec.h"
-#include "lexermemzip.h"
-
-#include "Arduino.h"
-
-#include "servo.h"
-#include "led.h"
-#include "uart.h"
-#include "pin.h"
-
-extern uint32_t _heap_start;
-
-void flash_error(int n) {
-    for (int i = 0; i < n; i++) {
-        led_state(PYB_LED_BUILTIN, 1);
-        delay(250);
-        led_state(PYB_LED_BUILTIN, 0);
-        delay(250);
-    }
-}
-
-void NORETURN __fatal_error(const char *msg) {
-    for (volatile uint delay = 0; delay < 10000000; delay++) {
-    }
-    led_state(1, 1);
-    led_state(2, 1);
-    led_state(3, 1);
-    led_state(4, 1);
-    mp_hal_stdout_tx_strn("\nFATAL ERROR:\n", 14);
-    mp_hal_stdout_tx_strn(msg, strlen(msg));
-    for (uint i = 0;;) {
-        led_toggle(((i++) & 3) + 1);
-        for (volatile uint delay = 0; delay < 10000000; delay++) {
-        }
-        if (i >= 16) {
-            // to conserve power
-            __WFI();
-        }
-    }
-}
-
-void nlr_jump_fail(void *val) {
-    printf("FATAL: uncaught exception %p\n", val);
-    __fatal_error("");
-}
-
-void __assert_func(const char *file, int line, const char *func, const char *expr) {
-
-    printf("Assertion failed: %s, file %s, line %d\n", expr, file, line);
-    __fatal_error("");
-}
-
-mp_obj_t pyb_analog_read(mp_obj_t pin_obj) {
-    uint pin = mp_obj_get_int(pin_obj);
-    int val = analogRead(pin);
-    return MP_OBJ_NEW_SMALL_INT(val);
-}
-
-mp_obj_t pyb_analog_write(mp_obj_t pin_obj, mp_obj_t val_obj) {
-    uint pin = mp_obj_get_int(pin_obj);
-    int val = mp_obj_get_int(val_obj);
-    analogWrite(pin, val);
-    return mp_const_none;
-}
-
-mp_obj_t pyb_analog_write_resolution(mp_obj_t res_obj) {
-    int res = mp_obj_get_int(res_obj);
-    analogWriteResolution(res);
-    return mp_const_none;
-}
-
-mp_obj_t pyb_analog_write_frequency(mp_obj_t pin_obj, mp_obj_t freq_obj) {
-    uint pin = mp_obj_get_int(pin_obj);
-    int freq = mp_obj_get_int(freq_obj);
-    analogWriteFrequency(pin, freq);
-    return mp_const_none;
-}
-
-#if 0
-// get lots of info about the board
-static mp_obj_t pyb_info(void) {
-    // get and print unique id; 96 bits
-    {
-        byte *id = (byte *)0x40048058;
-        printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]);
-    }
-
-    // get and print clock speeds
-    printf("CPU=%u\nBUS=%u\nMEM=%u\n", F_CPU, F_BUS, F_MEM);
-
-    // to print info about memory
-    {
-        printf("_sdata=%p\n", &_sdata);
-        printf("_edata=%p\n", &_edata);
-        printf("_sbss=%p\n", &_sbss);
-        printf("_ebss=%p\n", &_ebss);
-        printf("_estack=%p\n", &_estack);
-        printf("_etext=%p\n", &_etext);
-        printf("_heap_start=%p\n", &_heap_start);
-    }
-
-    // GC info
-    {
-        gc_info_t info;
-        gc_info(&info);
-        printf("GC:\n");
-        printf("  %u total\n", info.total);
-        printf("  %u used %u free\n", info.used, info.free);
-        printf("  1=%u 2=%u m=%u\n", info.num_1block, info.num_2block, info.max_block);
-    }
-
-    #if 0
-    // free space on flash
-    {
-        DWORD nclst;
-        FATFS *fatfs;
-        f_getfree("0:", &nclst, &fatfs);
-        printf("LFS free: %u bytes\n", (uint)(nclst * fatfs->csize * 512));
-    }
-    #endif
-
-    return mp_const_none;
-}
-
-#endif
-
-#define RAM_START (0x1FFF8000) // fixed for chip
-#define HEAP_END  (0x20006000) // tunable
-#define RAM_END   (0x20008000) // fixed for chip
-
-#if 0
-
-void gc_helper_get_regs_and_clean_stack(mp_uint_t *regs, mp_uint_t heap_end);
-
-mp_obj_t pyb_gc(void) {
-    gc_collect();
-    return mp_const_none;
-}
-
-mp_obj_t pyb_gpio(int n_args, mp_obj_t *args) {
-    // assert(1 <= n_args && n_args <= 2);
-
-    uint pin = mp_obj_get_int(args[0]);
-    if (pin > CORE_NUM_DIGITAL) {
-        goto pin_error;
-    }
-
-    if (n_args == 1) {
-        // get pin
-        pinMode(pin, INPUT);
-        return MP_OBJ_NEW_SMALL_INT(digitalRead(pin));
-    }
-
-    // set pin
-    pinMode(pin, OUTPUT);
-    digitalWrite(pin, mp_obj_is_true(args[1]));
-    return mp_const_none;
-
-pin_error:
-    mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("pin %d does not exist"), pin);
-}
-
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_gpio_obj, 1, 2, pyb_gpio);
-
-#if 0
-mp_obj_t pyb_hid_send_report(mp_obj_t arg) {
-    mp_obj_t *items = mp_obj_get_array_fixed_n(arg, 4);
-    uint8_t data[4];
-    data[0] = mp_obj_get_int(items[0]);
-    data[1] = mp_obj_get_int(items[1]);
-    data[2] = mp_obj_get_int(items[2]);
-    data[3] = mp_obj_get_int(items[3]);
-    usb_hid_send_report(data);
-    return mp_const_none;
-}
-#endif
-
-#endif // 0
-
-STATIC mp_obj_t pyb_config_source_dir = MP_OBJ_NULL;
-STATIC mp_obj_t pyb_config_main = MP_OBJ_NULL;
-STATIC mp_obj_t pyb_config_usb_mode = MP_OBJ_NULL;
-
-mp_obj_t pyb_source_dir(mp_obj_t source_dir) {
-    if (mp_obj_is_str(source_dir)) {
-        pyb_config_source_dir = source_dir;
-    }
-    return mp_const_none;
-}
-
-MP_DEFINE_CONST_FUN_OBJ_1(pyb_source_dir_obj, pyb_source_dir);
-
-mp_obj_t pyb_main(mp_obj_t main) {
-    if (mp_obj_is_str(main)) {
-        pyb_config_main = main;
-    }
-    return mp_const_none;
-}
-
-MP_DEFINE_CONST_FUN_OBJ_1(pyb_main_obj, pyb_main);
-
-STATIC mp_obj_t pyb_usb_mode(mp_obj_t usb_mode) {
-    if (mp_obj_is_str(usb_mode)) {
-        pyb_config_usb_mode = usb_mode;
-    }
-    return mp_const_none;
-}
-
-MP_DEFINE_CONST_FUN_OBJ_1(pyb_usb_mode_obj, pyb_usb_mode);
-
-#if 0
-
-mp_obj_t pyb_delay(mp_obj_t count) {
-    delay(mp_obj_get_int(count));
-    return mp_const_none;
-}
-
-mp_obj_t pyb_led(mp_obj_t state) {
-    led_state(PYB_LED_BUILTIN, mp_obj_is_true(state));
-    return state;
-}
-
-#endif  // 0
-
-#if 0
-char *strdup(const char *str) {
-    uint32_t len = strlen(str);
-    char *s2 = m_new(char, len + 1);
-    memcpy(s2, str, len);
-    s2[len] = 0;
-    return s2;
-}
-#endif
-
-int main(void) {
-    // TODO: Put this in a more common initialization function.
-    // Turn on STKALIGN which keeps the stack 8-byte aligned for interrupts
-    // (per EABI)
-    #define SCB_CCR_STKALIGN (1 << 9)
-    SCB_CCR |= SCB_CCR_STKALIGN;
-
-    mp_stack_ctrl_init();
-    mp_stack_set_limit(10240);
-
-    pinMode(LED_BUILTIN, OUTPUT);
-    led_init();
-
-//    int first_soft_reset = true;
-
-soft_reset:
-
-    led_state(PYB_LED_BUILTIN, 1);
-
-    // GC init
-    gc_init(&_heap_start, (void *)HEAP_END);
-
-    // MicroPython init
-    mp_init();
-
-    readline_init0();
-
-    pin_init0();
-
-    #if 0
-    // add some functions to the python namespace
-    {
-        mp_store_name(MP_QSTR_help, mp_make_function_n(0, pyb_help));
-        mp_obj_t m = mp_obj_new_module(MP_QSTR_pyb);
-        mp_store_attr(m, MP_QSTR_info, mp_make_function_n(0, pyb_info));
-        mp_store_attr(m, MP_QSTR_source_dir, mp_make_function_n(1, pyb_source_dir));
-        mp_store_attr(m, MP_QSTR_main, mp_make_function_n(1, pyb_main));
-        mp_store_attr(m, MP_QSTR_gc, mp_make_function_n(0, pyb_gc));
-        mp_store_attr(m, MP_QSTR_delay, mp_make_function_n(1, pyb_delay));
-        mp_store_attr(m, MP_QSTR_led, mp_make_function_n(1, pyb_led));
-        mp_store_attr(m, MP_QSTR_LED, (mp_obj_t)&pyb_led_type);
-        mp_store_attr(m, MP_QSTR_analogRead, mp_make_function_n(1, pyb_analog_read));
-        mp_store_attr(m, MP_QSTR_analogWrite, mp_make_function_n(2, pyb_analog_write));
-        mp_store_attr(m, MP_QSTR_analogWriteResolution, mp_make_function_n(1, pyb_analog_write_resolution));
-        mp_store_attr(m, MP_QSTR_analogWriteFrequency, mp_make_function_n(2, pyb_analog_write_frequency));
-
-        mp_store_attr(m, MP_QSTR_gpio, (mp_obj_t)&pyb_gpio_obj);
-        mp_store_attr(m, MP_QSTR_Servo, mp_make_function_n(0, pyb_Servo));
-        mp_store_name(MP_QSTR_pyb, m);
-    }
-    #endif
-
-    #if MICROPY_MODULE_FROZEN
-    pyexec_frozen_module("boot.py", false);
-    #else
-    if (!pyexec_file_if_exists("/boot.py")) {
-        flash_error(4);
-    }
-    #endif
-
-    // Turn bootup LED off
-    led_state(PYB_LED_BUILTIN, 0);
-
-    // run main script
-    #if MICROPY_MODULE_FROZEN
-    pyexec_frozen_module("main.py", true);
-    #else
-    {
-        vstr_t *vstr = vstr_new(16);
-        vstr_add_str(vstr, "/");
-        if (pyb_config_main == MP_OBJ_NULL) {
-            vstr_add_str(vstr, "main.py");
-        } else {
-            vstr_add_str(vstr, mp_obj_str_get_str(pyb_config_main));
-        }
-        if (!pyexec_file_if_exists(vstr_null_terminated_str(vstr))) {
-            flash_error(3);
-        }
-        vstr_free(vstr);
-    }
-    #endif
-
-    // enter REPL
-    // REPL mode can change, or it can request a soft reset
-    for (;;) {
-        if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) {
-            if (pyexec_raw_repl() != 0) {
-                break;
-            }
-        } else {
-            if (pyexec_friendly_repl() != 0) {
-                break;
-            }
-        }
-    }
-
-    printf("MPY: soft reboot\n");
-
-//    first_soft_reset = false;
-    goto soft_reset;
-}
-
-void gc_collect(void) {
-    gc_collect_start();
-    gc_helper_collect_regs_and_stack();
-    gc_collect_end();
-}
-
-// stub out __libc_init_array. It's called by mk20dx128.c and is used to call
-// global C++ constructors. Since this is a C-only projects, we don't need to
-// call constructors.
-void __libc_init_array(void) {
-}
-
-// ultoa is used by usb_init_serialnumber. Normally ultoa would be provided
-// by nonstd.c from the teensy core, but it conflicts with some of the
-// MicroPython functions in string0.c, so we provide ultoa here.
-char *ultoa(unsigned long val, char *buf, int radix) {
-    unsigned digit;
-    int i = 0, j;
-    char t;
-
-    while (1) {
-        digit = val % radix;
-        buf[i] = ((digit < 10) ? '0' + digit : 'A' + digit - 10);
-        val /= radix;
-        if (val == 0) {
-            break;
-        }
-        i++;
-    }
-    buf[i + 1] = 0;
-    for (j = 0; j < i; j++, i--) {
-        t = buf[j];
-        buf[j] = buf[i];
-        buf[i] = t;
-    }
-    return buf;
-}
diff --git a/ports/teensy/make-pins.py b/ports/teensy/make-pins.py
deleted file mode 100755
index 844e2d8bc3..0000000000
--- a/ports/teensy/make-pins.py
+++ /dev/null
@@ -1,429 +0,0 @@
-#!/usr/bin/env python
-"""Creates the pin file for the Teensy."""
-
-from __future__ import print_function
-
-import argparse
-import sys
-import csv
-
-SUPPORTED_FN = {
-    "FTM": ["CH0", "CH1", "CH2", "CH3", "CH4", "CH5", "CH6", "CH7", "QD_PHA", "QD_PHB"],
-    "I2C": ["SDA", "SCL"],
-    "UART": ["RX", "TX", "CTS", "RTS"],
-    "SPI": ["NSS", "SCK", "MISO", "MOSI"],
-}
-
-
-def parse_port_pin(name_str):
-    """Parses a string and returns a (port-num, pin-num) tuple."""
-    if len(name_str) < 4:
-        raise ValueError("Expecting pin name to be at least 4 characters.")
-    if name_str[0:2] != "PT":
-        raise ValueError("Expecting pin name to start with PT")
-    if name_str[2] not in ("A", "B", "C", "D", "E", "Z"):
-        raise ValueError("Expecting pin port to be between A and E or Z")
-    port = ord(name_str[2]) - ord("A")
-    pin_str = name_str[3:].split("/")[0]
-    if not pin_str.isdigit():
-        raise ValueError("Expecting numeric pin number.")
-    return (port, int(pin_str))
-
-
-def split_name_num(name_num):
-    num = None
-    for num_idx in range(len(name_num) - 1, -1, -1):
-        if not name_num[num_idx].isdigit():
-            name = name_num[0 : num_idx + 1]
-            num_str = name_num[num_idx + 1 :]
-            if len(num_str) > 0:
-                num = int(num_str)
-            break
-    return name, num
-
-
-class AlternateFunction(object):
-    """Holds the information associated with a pins alternate function."""
-
-    def __init__(self, idx, af_str):
-        self.idx = idx
-        self.af_str = af_str
-
-        self.func = ""
-        self.fn_num = None
-        self.pin_type = ""
-        self.supported = False
-
-        af_words = af_str.split("_", 1)
-        self.func, self.fn_num = split_name_num(af_words[0])
-        if len(af_words) > 1:
-            self.pin_type = af_words[1]
-        if self.func in SUPPORTED_FN:
-            pin_types = SUPPORTED_FN[self.func]
-            if self.pin_type in pin_types:
-                self.supported = True
-
-    def is_supported(self):
-        return self.supported
-
-    def ptr(self):
-        """Returns the numbered function (i.e. USART6) for this AF."""
-        if self.fn_num is None:
-            return self.func
-        return "{:s}{:d}".format(self.func, self.fn_num)
-
-    def mux_name(self):
-        return "AF{:d}_{:s}".format(self.idx, self.ptr())
-
-    def print(self):
-        """Prints the C representation of this AF."""
-        if self.supported:
-            print("  AF", end="")
-        else:
-            print("  //", end="")
-        fn_num = self.fn_num
-        if fn_num is None:
-            fn_num = 0
-        print(
-            "({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}".format(
-                self.idx, self.func, fn_num, self.pin_type, self.ptr(), self.af_str
-            )
-        )
-
-    def qstr_list(self):
-        return [self.mux_name()]
-
-
-class Pin(object):
-    """Holds the information associated with a pin."""
-
-    def __init__(self, port, pin):
-        self.port = port
-        self.pin = pin
-        self.alt_fn = []
-        self.alt_fn_count = 0
-        self.adc_num = 0
-        self.adc_channel = 0
-        self.board_pin = False
-
-    def port_letter(self):
-        return chr(self.port + ord("A"))
-
-    def cpu_pin_name(self):
-        return "{:s}{:d}".format(self.port_letter(), self.pin)
-
-    def is_board_pin(self):
-        return self.board_pin
-
-    def set_is_board_pin(self):
-        self.board_pin = True
-
-    def parse_adc(self, adc_str):
-        if adc_str[:3] != "ADC":
-            return
-        (adc, channel) = adc_str.split("_")
-        for idx in range(3, len(adc)):
-            adc_num = int(adc[idx])  # 1, 2, or 3
-            self.adc_num |= 1 << (adc_num - 1)
-        self.adc_channel = int(channel[2:])
-
-    def parse_af(self, af_idx, af_strs_in):
-        if len(af_strs_in) == 0:
-            return
-        # If there is a slash, then the slash separates 2 aliases for the
-        # same alternate function.
-        af_strs = af_strs_in.split("/")
-        for af_str in af_strs:
-            alt_fn = AlternateFunction(af_idx, af_str)
-            self.alt_fn.append(alt_fn)
-            if alt_fn.is_supported():
-                self.alt_fn_count += 1
-
-    def alt_fn_name(self, null_if_0=False):
-        if null_if_0 and self.alt_fn_count == 0:
-            return "NULL"
-        return "pin_{:s}_af".format(self.cpu_pin_name())
-
-    def adc_num_str(self):
-        str = ""
-        for adc_num in range(1, 4):
-            if self.adc_num & (1 << (adc_num - 1)):
-                if len(str) > 0:
-                    str += " | "
-                str += "PIN_ADC"
-                str += chr(ord("0") + adc_num)
-        if len(str) == 0:
-            str = "0"
-        return str
-
-    def print(self):
-        if self.alt_fn_count == 0:
-            print("// ", end="")
-        print("const pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()))
-        for alt_fn in self.alt_fn:
-            alt_fn.print()
-        if self.alt_fn_count == 0:
-            print("// ", end="")
-        print("};")
-        print("")
-        print(
-            "const pin_obj_t pin_{:s} = PIN({:s}, {:d}, {:d}, {:s}, {:s}, {:d});".format(
-                self.cpu_pin_name(),
-                self.port_letter(),
-                self.pin,
-                self.alt_fn_count,
-                self.alt_fn_name(null_if_0=True),
-                self.adc_num_str(),
-                self.adc_channel,
-            )
-        )
-        print("")
-
-    def print_header(self, hdr_file):
-        hdr_file.write("extern const pin_obj_t pin_{:s};\n".format(self.cpu_pin_name()))
-        if self.alt_fn_count > 0:
-            hdr_file.write(
-                "extern const pin_af_obj_t pin_{:s}_af[];\n".format(self.cpu_pin_name())
-            )
-
-    def qstr_list(self):
-        result = []
-        for alt_fn in self.alt_fn:
-            if alt_fn.is_supported():
-                result += alt_fn.qstr_list()
-        return result
-
-
-class NamedPin(object):
-    def __init__(self, name, pin):
-        self._name = name
-        self._pin = pin
-
-    def pin(self):
-        return self._pin
-
-    def name(self):
-        return self._name
-
-
-class Pins(object):
-    def __init__(self):
-        self.cpu_pins = []  # list of NamedPin objects
-        self.board_pins = []  # list of NamedPin objects
-
-    def find_pin(self, port_num, pin_num):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.port == port_num and pin.pin == pin_num:
-                return pin
-
-    def parse_af_file(self, filename, pinname_col, af_col):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                try:
-                    (port_num, pin_num) = parse_port_pin(row[pinname_col])
-                except:
-                    continue
-                pin = Pin(port_num, pin_num)
-                for af_idx in range(af_col, len(row)):
-                    if af_idx >= af_col:
-                        pin.parse_af(af_idx - af_col, row[af_idx])
-                self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin))
-
-    def parse_board_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                try:
-                    (port_num, pin_num) = parse_port_pin(row[1])
-                except:
-                    continue
-                pin = self.find_pin(port_num, pin_num)
-                if pin:
-                    pin.set_is_board_pin()
-                    self.board_pins.append(NamedPin(row[0], pin))
-
-    def print_named(self, label, named_pins):
-        print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label)
-        )
-        for named_pin in named_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin():
-                print(
-                    "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},".format(
-                        named_pin.name(), pin.cpu_pin_name()
-                    )
-                )
-        print("};")
-        print(
-            "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
-                label, label
-            )
-        )
-
-    def print(self):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin():
-                pin.print()
-        self.print_named("cpu", self.cpu_pins)
-        print("")
-        self.print_named("board", self.board_pins)
-
-    def print_adc(self, adc_num):
-        print("")
-        print("const pin_obj_t * const pin_adc{:d}[] = {{".format(adc_num))
-        for channel in range(16):
-            adc_found = False
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if (
-                    pin.is_board_pin()
-                    and (pin.adc_num & (1 << (adc_num - 1)))
-                    and (pin.adc_channel == channel)
-                ):
-                    print("  &pin_{:s}, // {:d}".format(pin.cpu_pin_name(), channel))
-                    adc_found = True
-                    break
-            if not adc_found:
-                print("  NULL,    // {:d}".format(channel))
-        print("};")
-
-    def print_header(self, hdr_filename):
-        with open(hdr_filename, "wt") as hdr_file:
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    pin.print_header(hdr_file)
-            hdr_file.write("extern const pin_obj_t * const pin_adc1[];\n")
-            hdr_file.write("extern const pin_obj_t * const pin_adc2[];\n")
-            hdr_file.write("extern const pin_obj_t * const pin_adc3[];\n")
-
-    def print_qstr(self, qstr_filename):
-        with open(qstr_filename, "wt") as qstr_file:
-            qstr_set = set([])
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    qstr_set |= set(pin.qstr_list())
-                    qstr_set |= set([named_pin.name()])
-            for named_pin in self.board_pins:
-                qstr_set |= set([named_pin.name()])
-            for qstr in sorted(qstr_set):
-                print("Q({})".format(qstr), file=qstr_file)
-
-    def print_af_hdr(self, af_const_filename):
-        with open(af_const_filename, "wt") as af_const_file:
-            af_hdr_set = set([])
-            mux_name_width = 0
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    for af in pin.alt_fn:
-                        if af.is_supported():
-                            mux_name = af.mux_name()
-                            af_hdr_set |= set([mux_name])
-                            if len(mux_name) > mux_name_width:
-                                mux_name_width = len(mux_name)
-            for mux_name in sorted(af_hdr_set):
-                key = "MP_OBJ_NEW_QSTR(MP_QSTR_{}),".format(mux_name)
-                val = "MP_OBJ_NEW_SMALL_INT(GPIO_{})".format(mux_name)
-                print("    { %-*s %s }," % (mux_name_width + 26, key, val), file=af_const_file)
-
-    def print_af_py(self, af_py_filename):
-        with open(af_py_filename, "wt") as af_py_file:
-            print("PINS_AF = (", file=af_py_file)
-            for named_pin in self.board_pins:
-                print("  ('%s', " % named_pin.name(), end="", file=af_py_file)
-                for af in named_pin.pin().alt_fn:
-                    if af.is_supported():
-                        print("(%d, '%s'), " % (af.idx, af.af_str), end="", file=af_py_file)
-                print("),", file=af_py_file)
-            print(")", file=af_py_file)
-
-
-def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file",
-    )
-    parser.add_argument(
-        "-a",
-        "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="mk20dx256_af.csv",
-    )
-    parser.add_argument(
-        "--af-const",
-        dest="af_const_filename",
-        help="Specifies header file for alternate function constants.",
-        default="build/pins_af_const.h",
-    )
-    parser.add_argument(
-        "--af-py",
-        dest="af_py_filename",
-        help="Specifies the filename for the python alternate function mappings.",
-        default="build/pins_af.py",
-    )
-    parser.add_argument(
-        "-b",
-        "--board",
-        dest="board_filename",
-        help="Specifies the board file",
-    )
-    parser.add_argument(
-        "-p",
-        "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="mk20dx256_prefix.c",
-    )
-    parser.add_argument(
-        "-q",
-        "--qstr",
-        dest="qstr_filename",
-        help="Specifies name of generated qstr header file",
-        default="build/pins_qstr.h",
-    )
-    parser.add_argument(
-        "-r",
-        "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h",
-    )
-    args = parser.parse_args(sys.argv[1:])
-
-    pins = Pins()
-
-    print("// This file was automatically generated by make-pins.py")
-    print("//")
-    if args.af_filename:
-        print("// --af {:s}".format(args.af_filename))
-        pins.parse_af_file(args.af_filename, 4, 3)
-
-    if args.board_filename:
-        print("// --board {:s}".format(args.board_filename))
-        pins.parse_board_file(args.board_filename)
-
-    if args.prefix_filename:
-        print("// --prefix {:s}".format(args.prefix_filename))
-        print("")
-        with open(args.prefix_filename, "r") as prefix_file:
-            print(prefix_file.read())
-    pins.print()
-    pins.print_adc(1)
-    pins.print_adc(2)
-    pins.print_adc(3)
-    pins.print_header(args.hdr_filename)
-    pins.print_qstr(args.qstr_filename)
-    pins.print_af_hdr(args.af_const_filename)
-    pins.print_af_py(args.af_py_filename)
-
-
-if __name__ == "__main__":
-    main()
diff --git a/ports/teensy/manifest.py b/ports/teensy/manifest.py
deleted file mode 100644
index 1fefd68687..0000000000
--- a/ports/teensy/manifest.py
+++ /dev/null
@@ -1 +0,0 @@
-freeze_as_str("$(PORT_DIR)/memzip_files")
diff --git a/ports/teensy/memzip_files/boot.py b/ports/teensy/memzip_files/boot.py
deleted file mode 100644
index e2279896d5..0000000000
--- a/ports/teensy/memzip_files/boot.py
+++ /dev/null
@@ -1,15 +0,0 @@
-import pyb
-
-print("Executing boot.py")
-
-
-def pins():
-    for pin_name in dir(pyb.Pin.board):
-        pin = pyb.Pin(pin_name)
-        print("{:10s} {:s}".format(pin_name, str(pin)))
-
-
-def af():
-    for pin_name in dir(pyb.Pin.board):
-        pin = pyb.Pin(pin_name)
-        print("{:10s} {:s}".format(pin_name, str(pin.af_list())))
diff --git a/ports/teensy/memzip_files/main.py b/ports/teensy/memzip_files/main.py
deleted file mode 100644
index a3b3904e89..0000000000
--- a/ports/teensy/memzip_files/main.py
+++ /dev/null
@@ -1,13 +0,0 @@
-import pyb
-
-print("Executing main.py")
-
-led = pyb.LED(1)
-
-led.on()
-pyb.delay(100)
-led.off()
-pyb.delay(100)
-led.on()
-pyb.delay(100)
-led.off()
diff --git a/ports/teensy/mk20dx256.ld b/ports/teensy/mk20dx256.ld
deleted file mode 100644
index bff0a8c4aa..0000000000
--- a/ports/teensy/mk20dx256.ld
+++ /dev/null
@@ -1,176 +0,0 @@
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-MEMORY
-{
-        FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K
-        RAM  (rwx) : ORIGIN = 0x1FFF8000, LENGTH = 64K
-}
-
-/* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
-_minimum_heap_size = 16K;
-
-/* INCLUDE common.ld */
-
-/* Teensyduino Core Library
- * http://www.pjrc.com/teensy/
- * Copyright (c) 2013 PJRC.COM, LLC.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * 1. The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * 2. If the Software is incorporated into a build system that allows
- * selection among a list of target devices, then similar target
- * devices manufactured by PJRC.COM must be included in the list of
- * target devices and selectable in the same manner.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-
-
-SECTIONS
-{
-    .text : {
-        . = 0;
-        KEEP(*(.vectors))
-        *(.startup*)
-        /* TODO: does linker detect startup overflow onto flashconfig? */
-        . = 0x400;
-        KEEP(*(.flashconfig*))
-        *(.text*)
-        *(.rodata*)
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-    } > FLASH = 0xFF
-
-    .ARM.exidx : {
-        __exidx_start = .;
-        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-        __exidx_end = .;
-    } > FLASH
-    _etext = .;
-
-    .usbdescriptortable (NOLOAD) : {
-        /* . = ORIGIN(RAM); */
-        . = ALIGN(512);
-        *(.usbdescriptortable*)
-    } > RAM
-
-    .dmabuffers (NOLOAD) : {
-        . = ALIGN(4);
-        *(.dmabuffers*)
-    } > RAM
-
-    .usbbuffers (NOLOAD) : {
-        . = ALIGN(4);
-        *(.usbbuffers*)
-    } > RAM
-
-    /* used by the startup to initialize data */
-    _sidata = LOADADDR(.data);
-
-    .data : AT (_etext) {
-        . = ALIGN(4);
-        _sdata = .;
-        _ram_start = .;
-        *(.data*)
-        . = ALIGN(4);
-        _edata = .;
-    } > RAM
-
-        /*
-     * _staticfs is the place in flash where the static filesystem which
-     * is concatenated to the .hex file will wind up.
-         */
-    _staticfs = LOADADDR(.data) + SIZEOF(.data);
-
-    .noinit (NOLOAD) : {
-        *(.noinit*)
-    } > RAM
-
-    .bss : {
-        . = ALIGN(4);
-        _sbss = .;
-        *(.bss*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = .;
-        __bss_end = .;
-    } > RAM
-
-    /* this is to define the start of the heap, and make sure we have a minimum size */
-    .heap :
-        {
-        . = ALIGN(4);
-        _heap_start = .;    /* define a global symbol at heap start */
-        . = . + _minimum_heap_size;
-    } >RAM
-
-    /* this just checks there is enough RAM for the stack */
-    .stack :
-        {
-        . = ALIGN(4);
-        . = . + _minimum_stack_size;
-        . = ALIGN(4);
-    } >RAM
-
-    _estack = ORIGIN(RAM) + LENGTH(RAM);
-    _ram_end = ORIGIN(RAM) + LENGTH(RAM);
-    _heap_end = ORIGIN(RAM) + 0xe000;
-}
-
-
-
-
diff --git a/ports/teensy/mk20dx256_af.csv b/ports/teensy/mk20dx256_af.csv
deleted file mode 100644
index 571587de6b..0000000000
--- a/ports/teensy/mk20dx256_af.csv
+++ /dev/null
@@ -1,65 +0,0 @@
-Pin,Name,Default,ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,EzPort
-1,PTE0,ADC1_SE4a,ADC1_SE4a,PTE0,SPI1_PCS1,UART1_TX,,,I2C1_SDA,RTC_CLKOUT,
-2,PTE1/LLWU_P0,ADC1_SE5a,ADC1_SE5a,PTE1/LLWU_P0,SPI1_SOUT,UART1_RX,,,I2C1_SCL,SPI1_SIN,
-3,VDD,VDD,VDD,,,,,,,,
-4,VSS,VSS,VSS,,,,,,,,
-5,USB0_DP,USB0_DP,USB0_DP,,,,,,,,
-6,USB0_DM,USB0_DM,USB0_DM,,,,,,,,
-7,VOUT33,VOUT33,VOUT33,,,,,,,,
-8,VREGIN,VREGIN,VREGIN,,,,,,,,
-9,PGA0_DP/ADC0_DP0/ADC1_DP3,PGA0_DP/ADC0_DP0/ADC1_DP3,PGA0_DP/ADC0_DP0/ADC1_DP3,PTZ0,,,,,,,
-10,PGA0_DM/ADC0_DM0/ADC1_DM3,PGA0_DM/ADC0_DM0/ADC1_DM3,PGA0_DM/ADC0_DM0/ADC1_DM3,PTZ1,,,,,,,
-11,PGA1_DP/ADC1_DP0/ADC0_DP3,PGA1_DP/ADC1_DP0/ADC0_DP3,PGA1_DP/ADC1_DP0/ADC0_DP3,PTZ2,,,,,,,
-12,PGA1_DM/ADC1_DM0/ADC0_DM3,PGA1_DM/ADC1_DM0/ADC0_DM3,PGA1_DM/ADC1_DM0/ADC0_DM3,PTZ3,,,,,,,
-13,VDDA,VDDA,VDDA,,,,,,,,
-14,VREFH,VREFH,VREFH,,,,,,,,
-15,VREFL,VREFL,VREFL,,,,,,,,
-16,VSSA,VSSA,VSSA,,,,,,,,
-17,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,PTZ4,,,,,,,
-18,DAC0_OUT/CMP1_IN3/ADC0_SE23,DAC0_OUT/CMP1_IN3/ADC0_SE23,DAC0_OUT/CMP1_IN3/ADC0_SE23,PTZ5,,,,,,,
-19,XTAL32,XTAL32,XTAL32,,,,,,,,
-20,EXTAL32,EXTAL32,EXTAL32,,,,,,,,
-21,VBAT,VBAT,VBAT,,,,,,,,
-22,PTA0,JTAG_TCLK/SWD_CLK/EZP_CLK,TSI0_CH1,PTA0,UART0_CTS_b/UART0_COL_b,FTM0_CH5,,,,JTAG_TCLK/SWD_CLK,EZP_CLK
-23,PTA1,JTAG_TDI/EZP_DI,TSI0_CH2,PTA1,UART0_RX,FTM0_CH6,,,,JTAG_TDI,EZP_DI
-24,PTA2,JTAG_TDO/TRACE_SWO/EZP_DO,TSI0_CH3,PTA2,UART0_TX,FTM0_CH7,,,,JTAG_TDO/TRACE_SWO,EZP_DO
-25,PTA3,JTAG_TMS/SWD_DIO,TSI0_CH4,PTA3,UART0_RTS_b,FTM0_CH0,,,,JTAG_TMS/SWD_DIO,
-26,PTA4/LLWU_P3,NMI_b/EZP_CS_b,TSI0_CH5,PTA4/LLWU_P3,,FTM0_CH1,,,NMI_b,EZP_CS_b,
-27,PTA5,DISABLED,,PTA5,USB_CLKIN,FTM0_CH2,,CMP2_OUT,I2S0_TX_BCLK,JTAG_TRST_b,
-28,PTA12,CMP2_IN0,CMP2_IN0,PTA12,CAN0_TX,FTM1_CH0,,,I2S0_TXD0,FTM1_QD_PHA,
-29,PTA13/LLWU_P4,CMP2_IN1,CMP2_IN1,PTA13/LLWU_P4,CAN0_RX,FTM1_CH1,,,I2S0_TX_FS,FTM1_QD_PHB,
-30,VDD,VDD,VDD,,,,,,,,
-31,VSS,VSS,VSS,,,,,,,,
-32,PTA18,EXTAL0,EXTAL0,PTA18,,FTM0_FLT2,FTM_CLKIN0,,,,
-33,PTA19,XTAL0,XTAL0,PTA19,,FTM1_FLT0,FTM_CLKIN1,,LPTMR0_ALT1,,
-34,RESET_b,RESET_b,RESET_b,,,,,,,,
-35,PTB0/LLWU_P5,ADC0_SE8/ADC1_SE8/TSI0_CH0,ADC0_SE8/ADC1_SE8/TSI0_CH0,PTB0/LLWU_P5,I2C0_SCL,FTM1_CH0,,,FTM1_QD_PHA,,
-36,PTB1,ADC0_SE9/ADC1_SE9/TSI0_CH6,ADC0_SE9/ADC1_SE9/TSI0_CH6,PTB1,I2C0_SDA,FTM1_CH1,,,FTM1_QD_PHB,,
-37,PTB2,ADC0_SE12/TSI0_CH7,ADC0_SE12/TSI0_CH7,PTB2,I2C0_SCL,UART0_RTS_b,,,FTM0_FLT3,,
-38,PTB3,ADC0_SE13/TSI0_CH8,ADC0_SE13/TSI0_CH8,PTB3,I2C0_SDA,UART0_CTS_b/UART0_COL_b,,,FTM0_FLT0,,
-39,PTB16,TSI0_CH9,TSI0_CH9,PTB16,SPI1_SOUT,UART0_RX,,FB_AD17,EWM_IN,,
-40,PTB17,TSI0_CH10,TSI0_CH10,PTB17,SPI1_SIN,UART0_TX,,FB_AD16,EWM_OUT_b,,
-41,PTB18,TSI0_CH11,TSI0_CH11,PTB18,CAN0_TX,FTM2_CH0,I2S0_TX_BCLK,FB_AD15,FTM2_QD_PHA,,
-42,PTB19,TSI0_CH12,TSI0_CH12,PTB19,CAN0_RX,FTM2_CH1,I2S0_TX_FS,FB_OE_b,FTM2_QD_PHB,,
-43,PTC0,ADC0_SE14/TSI0_CH13,ADC0_SE14/TSI0_CH13,PTC0,SPI0_PCS4,PDB0_EXTRG,,FB_AD14,I2S0_TXD1,,
-44,PTC1/LLWU_P6,ADC0_SE15/TSI0_CH14,ADC0_SE15/TSI0_CH14,PTC1/LLWU_P6,SPI0_PCS3,UART1_RTS_b,FTM0_CH0,FB_AD13,I2S0_TXD0,,
-45,PTC2,ADC0_SE4b/CMP1_IN0/TSI0_CH15,ADC0_SE4b/CMP1_IN0/TSI0_CH15,PTC2,SPI0_PCS2,UART1_CTS_b,FTM0_CH1,FB_AD12,I2S0_TX_FS,,
-46,PTC3/LLWU_P7,CMP1_IN1,CMP1_IN1,PTC3/LLWU_P7,SPI0_PCS1,UART1_RX,FTM0_CH2,CLKOUT,I2S0_TX_BCLK,,
-47,VSS,VSS,VSS,,,,,,,,
-48,VDD,VDD,VDD,,,,,,,,
-49,PTC4/LLWU_P8,DISABLED,,PTC4/LLWU_P8,SPI0_PCS0,UART1_TX,FTM0_CH3,FB_AD11,CMP1_OUT,,
-50,PTC5/LLWU_P9,DISABLED,,PTC5/LLWU_P9,SPI0_SCK,LPTMR0_ALT2,I2S0_RXD0,FB_AD10,CMP0_OUT,,
-51,PTC6/LLWU_P10,CMP0_IN0,CMP0_IN0,PTC6/LLWU_P10,SPI0_SOUT,PDB0_EXTRG,I2S0_RX_BCLK,FB_AD9,I2S0_MCLK,,
-52,PTC7,CMP0_IN1,CMP0_IN1,PTC7,SPI0_SIN,USB_SOF_OUT,I2S0_RX_FS,FB_AD8,,,
-53,PTC8,ADC1_SE4b/CMP0_IN2,ADC1_SE4b/CMP0_IN2,PTC8,,,I2S0_MCLK,FB_AD7,,,
-54,PTC9,ADC1_SE5b/CMP0_IN3,ADC1_SE5b/CMP0_IN3,PTC9,,,I2S0_RX_BCLK,FB_AD6,FTM2_FLT0,,
-55,PTC10,ADC1_SE6b,ADC1_SE6b,PTC10,I2C1_SCL,,I2S0_RX_FS,FB_AD5,,,
-56,PTC11/LLWU_P11,ADC1_SE7b,ADC1_SE7b,PTC11/LLWU_P11,I2C1_SDA,,I2S0_RXD1,FB_RW_b,,,
-57,PTD0/LLWU_P12,DISABLED,,PTD0/LLWU_P12,SPI0_PCS0,UART2_RTS_b,,FB_ALE/FB_CS1_b/FB_TS_b,,,
-58,PTD1,ADC0_SE5b,ADC0_SE5b,PTD1,SPI0_SCK,UART2_CTS_b,,FB_CS0_b,,,
-59,PTD2/LLWU_P13,DISABLED,,PTD2/LLWU_P13,SPI0_SOUT,UART2_RX,,FB_AD4,,,
-60,PTD3,DISABLED,,PTD3,SPI0_SIN,UART2_TX,,FB_AD3,,,
-61,PTD4/LLWU_P14,DISABLED,,PTD4/LLWU_P14,SPI0_PCS1,UART0_RTS_b,FTM0_CH4,FB_AD2,EWM_IN,,
-62,PTD5,ADC0_SE6b,ADC0_SE6b,PTD5,SPI0_PCS2,UART0_CTS_b/UART0_COL_b,FTM0_CH5,FB_AD1,EWM_OUT_b,,
-63,PTD6/LLWU_P15,ADC0_SE7b,ADC0_SE7b,PTD6/LLWU_P15,SPI0_PCS3,UART0_RX,FTM0_CH6,FB_AD0,FTM0_FLT0f,,
-64,PTD7,DISABLED,,PTD7,CMT_IRO,UART0_TX,FTM0_CH7,,FTM0_FLT1,,
diff --git a/ports/teensy/mk20dx256_prefix.c b/ports/teensy/mk20dx256_prefix.c
deleted file mode 100644
index 4790bb83ca..0000000000
--- a/ports/teensy/mk20dx256_prefix.c
+++ /dev/null
@@ -1,33 +0,0 @@
-// stm32fxx-prefix.c becomes the initial portion of the generated pins file.
-
-#include <stdio.h>
-#include <mk20dx128.h>
-
-#include "py/obj.h"
-#include "teensy_hal.h"
-#include "pin.h"
-
-#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \
-    { \
-        { &pin_af_type }, \
-        .name = MP_QSTR_AF##af_idx##_##af_fn##af_unit, \
-        .idx = (af_idx), \
-        .fn = AF_FN_##af_fn, \
-        .unit = (af_unit), \
-        .type = AF_PIN_TYPE_##af_fn##_##af_type, \
-        .reg = (af_ptr) \
-    }
-
-#define PIN(p_port, p_pin, p_num_af, p_af, p_adc_num, p_adc_channel) \
-    { \
-        { &pin_type }, \
-        .name = MP_QSTR_##p_port##p_pin, \
-        .port = PORT_##p_port, \
-        .pin = (p_pin), \
-        .num_af = (p_num_af), \
-        .pin_mask = (1 << (p_pin)), \
-        .gpio = GPIO##p_port, \
-        .af = p_af, \
-        .adc_num = p_adc_num, \
-        .adc_channel = p_adc_channel, \
-    }
diff --git a/ports/teensy/modpyb.c b/ports/teensy/modpyb.c
deleted file mode 100644
index 5dae8f73e5..0000000000
--- a/ports/teensy/modpyb.c
+++ /dev/null
@@ -1,364 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include <stdint.h>
-#include <stdio.h>
-#include <mk20dx128.h>
-#include "Arduino.h"
-
-#include "py/obj.h"
-#include "py/gc.h"
-#include "py/mphal.h"
-
-#include "shared/runtime/pyexec.h"
-
-#include "gccollect.h"
-#include "systick.h"
-#include "led.h"
-#include "pin.h"
-#include "timer.h"
-#include "extint.h"
-#include "usrsw.h"
-#include "rng.h"
-#include "uart.h"
-#include "storage.h"
-#include "sdcard.h"
-#include "accel.h"
-#include "servo.h"
-#include "dac.h"
-#include "usb.h"
-#include "portmodules.h"
-#include "modmachine.h"
-
-/// \module pyb - functions related to the pyboard
-///
-/// The `pyb` module contains specific functions related to the pyboard.
-
-/// \function bootloader()
-/// Activate the bootloader without BOOT* pins.
-STATIC mp_obj_t pyb_bootloader(void) {
-    printf("bootloader command not current supported\n");
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_bootloader_obj, pyb_bootloader);
-
-/// \function info([dump_alloc_table])
-/// Print out lots of information about the board.
-STATIC mp_obj_t pyb_info(uint n_args, const mp_obj_t *args) {
-    // get and print unique id; 96 bits
-    {
-        byte *id = (byte *)0x40048058;
-        printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]);
-    }
-
-    // get and print clock speeds
-    printf("CPU=%u\nBUS=%u\nMEM=%u\n", F_CPU, F_BUS, F_MEM);
-
-    // to print info about memory
-    {
-        printf("_etext=%p\n", &_etext);
-        printf("_sidata=%p\n", &_sidata);
-        printf("_sdata=%p\n", &_sdata);
-        printf("_edata=%p\n", &_edata);
-        printf("_sbss=%p\n", &_sbss);
-        printf("_ebss=%p\n", &_ebss);
-        printf("_estack=%p\n", &_estack);
-        printf("_ram_start=%p\n", &_ram_start);
-        printf("_heap_start=%p\n", &_heap_start);
-        printf("_heap_end=%p\n", &_heap_end);
-        printf("_ram_end=%p\n", &_ram_end);
-    }
-
-    // qstr info
-    {
-        uint n_pool, n_qstr, n_str_data_bytes, n_total_bytes;
-        qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes);
-        printf("qstr:\n  n_pool=%u\n  n_qstr=%u\n  n_str_data_bytes=%u\n  n_total_bytes=%u\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes);
-    }
-
-    // GC info
-    {
-        gc_info_t info;
-        gc_info(&info);
-        printf("GC:\n");
-        printf("  " UINT_FMT " total\n", info.total);
-        printf("  " UINT_FMT " : " UINT_FMT "\n", info.used, info.free);
-        printf("  1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block);
-    }
-
-    if (n_args == 1) {
-        // arg given means dump gc allocation table
-        gc_dump_alloc_table(&mp_plat_print);
-    }
-
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj, 0, 1, pyb_info);
-
-/// \function unique_id()
-/// Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU.
-STATIC mp_obj_t pyb_unique_id(void) {
-    byte *id = (byte *)0x40048058;
-    return mp_obj_new_bytes(id, 12);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_unique_id_obj, pyb_unique_id);
-
-/// \function freq()
-/// Return a tuple of clock frequencies: (SYSCLK, HCLK, PCLK1, PCLK2).
-// TODO should also be able to set frequency via this function
-STATIC mp_obj_t pyb_freq(void) {
-    mp_obj_t tuple[3] = {
-        mp_obj_new_int(F_CPU),
-        mp_obj_new_int(F_BUS),
-        mp_obj_new_int(F_MEM),
-    };
-    return mp_obj_new_tuple(3, tuple);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_freq_obj, pyb_freq);
-
-/// \function sync()
-/// Sync all file systems.
-STATIC mp_obj_t pyb_sync(void) {
-    printf("sync not currently implemented\n");
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_sync_obj, pyb_sync);
-
-/// \function millis()
-/// Returns the number of milliseconds since the board was last reset.
-///
-/// The result is always a MicroPython smallint (31-bit signed number), so
-/// after 2^30 milliseconds (about 12.4 days) this will start to return
-/// negative numbers.
-STATIC mp_obj_t pyb_millis(void) {
-    // We want to "cast" the 32 bit unsigned into a small-int.  This means
-    // copying the MSB down 1 bit (extending the sign down), which is
-    // equivalent to just using the MP_OBJ_NEW_SMALL_INT macro.
-    return MP_OBJ_NEW_SMALL_INT(mp_hal_ticks_ms());
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_millis_obj, pyb_millis);
-
-/// \function elapsed_millis(start)
-/// Returns the number of milliseconds which have elapsed since `start`.
-///
-/// This function takes care of counter wrap, and always returns a positive
-/// number. This means it can be used to measure periods up to about 12.4 days.
-///
-/// Example:
-///     start = pyb.millis()
-///     while pyb.elapsed_millis(start) < 1000:
-///         # Perform some operation
-STATIC mp_obj_t pyb_elapsed_millis(mp_obj_t start) {
-    uint32_t startMillis = mp_obj_get_int(start);
-    uint32_t currMillis = mp_hal_ticks_ms();
-    return MP_OBJ_NEW_SMALL_INT((currMillis - startMillis) & 0x3fffffff);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_millis_obj, pyb_elapsed_millis);
-
-/// \function micros()
-/// Returns the number of microseconds since the board was last reset.
-///
-/// The result is always a MicroPython smallint (31-bit signed number), so
-/// after 2^30 microseconds (about 17.8 minutes) this will start to return
-/// negative numbers.
-STATIC mp_obj_t pyb_micros(void) {
-    // We want to "cast" the 32 bit unsigned into a small-int.  This means
-    // copying the MSB down 1 bit (extending the sign down), which is
-    // equivalent to just using the MP_OBJ_NEW_SMALL_INT macro.
-    return MP_OBJ_NEW_SMALL_INT(micros());
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_micros_obj, pyb_micros);
-
-/// \function elapsed_micros(start)
-/// Returns the number of microseconds which have elapsed since `start`.
-///
-/// This function takes care of counter wrap, and always returns a positive
-/// number. This means it can be used to measure periods up to about 17.8 minutes.
-///
-/// Example:
-///     start = pyb.micros()
-///     while pyb.elapsed_micros(start) < 1000:
-///         # Perform some operation
-STATIC mp_obj_t pyb_elapsed_micros(mp_obj_t start) {
-    uint32_t startMicros = mp_obj_get_int(start);
-    uint32_t currMicros = micros();
-    return MP_OBJ_NEW_SMALL_INT((currMicros - startMicros) & 0x3fffffff);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_micros_obj, pyb_elapsed_micros);
-
-/// \function delay(ms)
-/// Delay for the given number of milliseconds.
-STATIC mp_obj_t pyb_delay(mp_obj_t ms_in) {
-    mp_int_t ms = mp_obj_get_int(ms_in);
-    if (ms >= 0) {
-        mp_hal_delay_ms(ms);
-    }
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_delay_obj, pyb_delay);
-
-/// \function udelay(us)
-/// Delay for the given number of microseconds.
-STATIC mp_obj_t pyb_udelay(mp_obj_t usec_in) {
-    mp_int_t usec = mp_obj_get_int(usec_in);
-    delayMicroseconds(usec);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_udelay_obj, pyb_udelay);
-
-STATIC mp_obj_t pyb_wfi(void) {
-    __WFI();
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_0(pyb_wfi_obj, pyb_wfi);
-
-STATIC mp_obj_t pyb_stop(void) {
-    printf("stop not currently implemented\n");
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_stop_obj, pyb_stop);
-
-STATIC mp_obj_t pyb_standby(void) {
-    printf("standby not currently implemented\n");
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_standby_obj, pyb_standby);
-
-/// \function have_cdc()
-/// Return True if USB is connected as a serial device, False otherwise.
-STATIC mp_obj_t pyb_have_cdc(void) {
-    return mp_obj_new_bool(usb_vcp_is_connected());
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_have_cdc_obj, pyb_have_cdc);
-
-/// \function hid((buttons, x, y, z))
-/// Takes a 4-tuple (or list) and sends it to the USB host (the PC) to
-/// signal a HID mouse-motion event.
-STATIC mp_obj_t pyb_hid_send_report(mp_obj_t arg) {
-    #if 1
-    printf("hid_send_report not currently implemented\n");
-    #else
-    mp_obj_t *items;
-    mp_obj_get_array_fixed_n(arg, 4, &items);
-    uint8_t data[4];
-    data[0] = mp_obj_get_int(items[0]);
-    data[1] = mp_obj_get_int(items[1]);
-    data[2] = mp_obj_get_int(items[2]);
-    data[3] = mp_obj_get_int(items[3]);
-    usb_hid_send_report(data);
-    #endif
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_hid_send_report_obj, pyb_hid_send_report);
-
-MP_DECLARE_CONST_FUN_OBJ_1(pyb_source_dir_obj); // defined in main.c
-MP_DECLARE_CONST_FUN_OBJ_1(pyb_main_obj); // defined in main.c
-MP_DECLARE_CONST_FUN_OBJ_1(pyb_usb_mode_obj); // defined in main.c
-
-STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_pyb) },
-
-    { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&pyb_bootloader_obj) },
-    { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&pyb_info_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&pyb_unique_id_obj) },
-    { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_freq_obj) },
-    #if MICROPY_REPL_INFO
-    { MP_ROM_QSTR(MP_QSTR_repl_info), MP_ROM_PTR(&pyb_set_repl_info_obj) },
-    #endif
-
-    { MP_ROM_QSTR(MP_QSTR_wfi), MP_ROM_PTR(&pyb_wfi_obj) },
-    { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&pyb_stop_obj) },
-    { MP_ROM_QSTR(MP_QSTR_standby), MP_ROM_PTR(&pyb_standby_obj) },
-    { MP_ROM_QSTR(MP_QSTR_source_dir), MP_ROM_PTR(&pyb_source_dir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_main), MP_ROM_PTR(&pyb_main_obj) },
-    { MP_ROM_QSTR(MP_QSTR_usb_mode), MP_ROM_PTR(&pyb_usb_mode_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_have_cdc), MP_ROM_PTR(&pyb_have_cdc_obj) },
-    { MP_ROM_QSTR(MP_QSTR_hid), MP_ROM_PTR(&pyb_hid_send_report_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_millis), MP_ROM_PTR(&pyb_millis_obj) },
-    { MP_ROM_QSTR(MP_QSTR_elapsed_millis), MP_ROM_PTR(&pyb_elapsed_millis_obj) },
-    { MP_ROM_QSTR(MP_QSTR_micros), MP_ROM_PTR(&pyb_micros_obj) },
-    { MP_ROM_QSTR(MP_QSTR_elapsed_micros), MP_ROM_PTR(&pyb_elapsed_micros_obj) },
-    { MP_ROM_QSTR(MP_QSTR_delay), MP_ROM_PTR(&pyb_delay_obj) },
-    { MP_ROM_QSTR(MP_QSTR_udelay), MP_ROM_PTR(&pyb_udelay_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&pyb_sync_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) },
-
-// #if MICROPY_HW_ENABLE_RNG
-//    { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) },
-// #endif
-
-// #if MICROPY_HW_ENABLE_RTC
-//    { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) },
-// #endif
-
-    { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) },
-//    { MP_ROM_QSTR(MP_QSTR_ExtInt), MP_ROM_PTR(&extint_type) },
-
-    #if MICROPY_HW_ENABLE_SERVO
-    { MP_ROM_QSTR(MP_QSTR_pwm), MP_ROM_PTR(&pyb_pwm_set_obj) },
-    { MP_ROM_QSTR(MP_QSTR_servo), MP_ROM_PTR(&pyb_servo_set_obj) },
-    { MP_ROM_QSTR(MP_QSTR_Servo), MP_ROM_PTR(&pyb_servo_type) },
-    #endif
-
-    #if MICROPY_HW_HAS_SWITCH
-    { MP_ROM_QSTR(MP_QSTR_Switch), MP_ROM_PTR(&pyb_switch_type) },
-    #endif
-
-// #if MICROPY_HW_HAS_SDCARD
-//    { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sdcard_obj) },
-// #endif
-
-    { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pyb_led_type) },
-//    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&pyb_i2c_type) },
-//    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&pyb_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) },
-
-//    { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) },
-//    { MP_ROM_QSTR(MP_QSTR_ADCAll), MP_ROM_PTR(&pyb_adc_all_type) },
-
-// #if MICROPY_HW_ENABLE_DAC
-//    { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&pyb_dac_type) },
-// #endif
-
-// #if MICROPY_HW_HAS_MMA7660
-//    { MP_ROM_QSTR(MP_QSTR_Accel), MP_ROM_PTR(&pyb_accel_type) },
-// #endif
-};
-
-STATIC MP_DEFINE_CONST_DICT(pyb_module_globals, pyb_module_globals_table);
-
-const mp_obj_module_t pyb_module = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&pyb_module_globals,
-};
-
-MP_REGISTER_MODULE(MP_QSTR_pyb, pyb_module);
diff --git a/ports/teensy/mpconfigport.h b/ports/teensy/mpconfigport.h
deleted file mode 100644
index f67eb66fab..0000000000
--- a/ports/teensy/mpconfigport.h
+++ /dev/null
@@ -1,118 +0,0 @@
-#include <stdint.h>
-
-// options to control how MicroPython is built
-
-#define MICROPY_ALLOC_PATH_MAX      (128)
-#define MICROPY_EMIT_THUMB          (1)
-#define MICROPY_EMIT_INLINE_THUMB   (1)
-#define MICROPY_ENABLE_GC           (1)
-#define MICROPY_ENABLE_FINALISER    (1)
-#define MICROPY_STACK_CHECK         (1)
-#define MICROPY_HELPER_REPL         (1)
-#define MICROPY_REPL_INFO           (1)
-#define MICROPY_ENABLE_SOURCE_LINE  (1)
-#define MICROPY_LONGINT_IMPL        (MICROPY_LONGINT_IMPL_MPZ)
-#define MICROPY_FLOAT_IMPL          (MICROPY_FLOAT_IMPL_FLOAT)
-#define MICROPY_OPT_COMPUTED_GOTO   (1)
-
-#define MICROPY_PY_BUILTINS_INPUT   (1)
-#define MICROPY_PY_BUILTINS_HELP    (1)
-#define MICROPY_PY_BUILTINS_HELP_TEXT teensy_help_text
-
-#define MICROPY_PY_IO               (0)
-#define MICROPY_PY_FROZENSET        (1)
-#define MICROPY_PY_SYS_EXIT         (1)
-#define MICROPY_PY_SYS_STDFILES     (1)
-#define MICROPY_PY_CMATH            (1)
-
-#define MICROPY_TIMER_REG           (0)
-#define MICROPY_REG                 (MICROPY_TIMER_REG)
-
-#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF   (1)
-#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE  (0)
-
-// extra built in names to add to the global namespace
-#define MICROPY_PORT_BUILTINS \
-
-// extra constants
-extern const struct _mp_obj_module_t pyb_module;
-#define MICROPY_PORT_CONSTANTS \
-    { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \
-
-#define MP_STATE_PORT MP_STATE_VM
-
-// type definitions for the specific machine
-
-#define UINT_FMT "%u"
-#define INT_FMT "%d"
-
-typedef int32_t mp_int_t; // must be pointer size
-typedef unsigned int mp_uint_t; // must be pointer size
-typedef long mp_off_t;
-
-// We have inlined IRQ functions for efficiency (they are generally
-// 1 machine instruction).
-//
-// Note on IRQ state: you should not need to know the specific
-// value of the state variable, but rather just pass the return
-// value from disable_irq back to enable_irq.  If you really need
-// to know the machine-specific values, see irq.h.
-
-__attribute__((always_inline)) static inline uint32_t __get_PRIMASK(void) {
-    uint32_t result;
-    __asm volatile ("MRS %0, primask" : "=r" (result));
-    return result;
-}
-
-__attribute__((always_inline)) static inline void __set_PRIMASK(uint32_t priMask) {
-    __asm volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-__attribute__((always_inline)) static inline void enable_irq(mp_uint_t state) {
-    __set_PRIMASK(state);
-}
-
-__attribute__((always_inline)) static inline mp_uint_t disable_irq(void) {
-    mp_uint_t state = __get_PRIMASK();
-    __asm__ volatile ("CPSID i");
-    return state;
-}
-
-#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
-#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
-
-// We need to provide a declaration/definition of alloca()
-#include <alloca.h>
-
-// The following would be from a board specific file, if one existed
-
-#define MICROPY_HW_BOARD_NAME       "Teensy-3.1"
-#define MICROPY_HW_MCU_NAME         "MK20DX256"
-
-#define MICROPY_HW_HAS_SWITCH       (0)
-#define MICROPY_HW_HAS_SDCARD       (0)
-#define MICROPY_HW_HAS_MMA7660      (0)
-#define MICROPY_HW_HAS_LIS3DSH      (0)
-#define MICROPY_HW_HAS_LCD          (0)
-#define MICROPY_HW_ENABLE_RNG       (0)
-#define MICROPY_HW_ENABLE_RTC       (0)
-#define MICROPY_HW_ENABLE_TIMER     (0)
-#define MICROPY_HW_ENABLE_SERVO     (0)
-#define MICROPY_HW_ENABLE_DAC       (0)
-
-#define MICROPY_HW_LED1             (pin_C5)
-#define MICROPY_HW_LED_OTYPE        (GPIO_MODE_OUTPUT_PP)
-#define MICROPY_HW_LED_ON(pin)      (pin->gpio->PSOR = pin->pin_mask)
-#define MICROPY_HW_LED_OFF(pin)     (pin->gpio->PCOR = pin->pin_mask)
-
-#if 0
-// SD card detect switch
-#define MICROPY_HW_SDCARD_DETECT_PIN        (pin_A8)
-#define MICROPY_HW_SDCARD_DETECT_PULL       (GPIO_PULLUP)
-#define MICROPY_HW_SDCARD_DETECT_PRESENT    (GPIO_PIN_RESET)
-#endif
-
-#define MICROPY_MATH_SQRT_ASM     (1)
-
-#define MICROPY_MPHALPORT_H     "teensy_hal.h"
-#define MICROPY_PIN_DEFS_PORT_H "pin_defs_teensy.h"
diff --git a/ports/teensy/pin_defs_teensy.c b/ports/teensy/pin_defs_teensy.c
deleted file mode 100644
index 9041a379e1..0000000000
--- a/ports/teensy/pin_defs_teensy.c
+++ /dev/null
@@ -1,71 +0,0 @@
-#include <stdint.h>
-#include <mk20dx128.h>
-#include "py/runtime.h"
-#include "py/mphal.h"
-#include "pin.h"
-
-// Returns the pin mode. This value returned by this macro should be one of:
-// GPIO_MODE_INPUT, GPIO_MODE_OUTPUT_PP, GPIO_MODE_OUTPUT_OD,
-// GPIO_MODE_AF_PP, GPIO_MODE_AF_OD, or GPIO_MODE_ANALOG.
-
-uint32_t pin_get_mode(const pin_obj_t *pin) {
-    if (pin->gpio == NULL) {
-        // Analog only pin
-        return GPIO_MODE_ANALOG;
-    }
-    volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin);
-    uint32_t pcr = *port_pcr;
-    uint32_t af = (pcr & PORT_PCR_MUX_MASK) >> 8;
-    if (af == 0) {
-        return GPIO_MODE_ANALOG;
-    }
-    if (af == 1) {
-        if (pin->gpio->PDDR & (1 << pin->pin)) {
-            if (pcr & PORT_PCR_ODE) {
-                return GPIO_MODE_OUTPUT_OD;
-            }
-            return GPIO_MODE_OUTPUT_PP;
-        }
-        return GPIO_MODE_INPUT;
-    }
-
-    if (pcr & PORT_PCR_ODE) {
-        return GPIO_MODE_AF_OD;
-    }
-    return GPIO_MODE_AF_PP;
-}
-
-// Returns the pin pullup/pulldown. The value returned by this macro should
-// be one of GPIO_NOPULL, GPIO_PULLUP, or GPIO_PULLDOWN.
-
-uint32_t pin_get_pull(const pin_obj_t *pin) {
-    if (pin->gpio == NULL) {
-        // Analog only pin
-        return GPIO_NOPULL;
-    }
-    volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin);
-
-    uint32_t pcr = *port_pcr;
-    uint32_t af = (pcr & PORT_PCR_MUX_MASK) >> 8;
-
-    // pull is only valid for digital modes (hence the af > 0 test)
-
-    if (af > 0 && (pcr & PORT_PCR_PE) != 0) {
-        if (pcr & PORT_PCR_PS) {
-            return GPIO_PULLUP;
-        }
-        return GPIO_PULLDOWN;
-    }
-    return GPIO_NOPULL;
-}
-
-// Returns the af (alternate function) index currently set for a pin.
-
-uint32_t pin_get_af(const pin_obj_t *pin) {
-    if (pin->gpio == NULL) {
-        // Analog only pin
-        return 0;
-    }
-    volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin);
-    return (*port_pcr & PORT_PCR_MUX_MASK) >> 8;
-}
diff --git a/ports/teensy/pin_defs_teensy.h b/ports/teensy/pin_defs_teensy.h
deleted file mode 100644
index fa248483e9..0000000000
--- a/ports/teensy/pin_defs_teensy.h
+++ /dev/null
@@ -1,43 +0,0 @@
-enum {
-    PORT_A,
-    PORT_B,
-    PORT_C,
-    PORT_D,
-    PORT_E,
-    PORT_Z,
-};
-
-enum {
-    AF_FN_FTM,
-    AF_FN_I2C,
-    AF_FN_UART,
-    AF_FN_SPI
-};
-
-enum {
-    AF_PIN_TYPE_FTM_CH0 = 0,
-    AF_PIN_TYPE_FTM_CH1,
-    AF_PIN_TYPE_FTM_CH2,
-    AF_PIN_TYPE_FTM_CH3,
-    AF_PIN_TYPE_FTM_CH4,
-    AF_PIN_TYPE_FTM_CH5,
-    AF_PIN_TYPE_FTM_CH6,
-    AF_PIN_TYPE_FTM_CH7,
-    AF_PIN_TYPE_FTM_QD_PHA,
-    AF_PIN_TYPE_FTM_QD_PHB,
-
-    AF_PIN_TYPE_I2C_SDA = 0,
-    AF_PIN_TYPE_I2C_SCL,
-
-    AF_PIN_TYPE_SPI_MOSI = 0,
-    AF_PIN_TYPE_SPI_MISO,
-    AF_PIN_TYPE_SPI_SCK,
-    AF_PIN_TYPE_SPI_NSS,
-
-    AF_PIN_TYPE_UART_TX = 0,
-    AF_PIN_TYPE_UART_RX,
-    AF_PIN_TYPE_UART_CTS,
-    AF_PIN_TYPE_UART_RTS,
-};
-
-typedef GPIO_TypeDef pin_gpio_t;
diff --git a/ports/teensy/qstrdefsport.h b/ports/teensy/qstrdefsport.h
deleted file mode 100644
index 00d3e2ae3c..0000000000
--- a/ports/teensy/qstrdefsport.h
+++ /dev/null
@@ -1,2 +0,0 @@
-// qstrs specific to this port
-// *FORMAT-OFF*
diff --git a/ports/teensy/reg.c b/ports/teensy/reg.c
deleted file mode 100644
index 97a9e6082c..0000000000
--- a/ports/teensy/reg.c
+++ /dev/null
@@ -1,47 +0,0 @@
-#include <stdio.h>
-#include <string.h>
-#include "py/runtime.h"
-#include "reg.h"
-
-#if MICROPY_REG
-
-mp_obj_t reg_cmd(void *base, reg_t *reg, mp_uint_t num_regs, uint n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        // dump all regs
-
-        for (mp_uint_t reg_idx = 0; reg_idx < num_regs; reg_idx++, reg++) {
-            printf("  %-8s @0x%08x = 0x%08lx\n",
-                reg->name, (mp_uint_t)base + reg->offset, *(uint32_t *)((uint8_t *)base + reg->offset));
-        }
-        return mp_const_none;
-    }
-
-    mp_uint_t addr = 0;
-
-    if (mp_obj_is_str(args[0])) {
-        const char *name = mp_obj_str_get_str(args[0]);
-        mp_uint_t reg_idx;
-        for (reg_idx = 0; reg_idx < num_regs; reg_idx++, reg++) {
-            if (strcmp(name, reg->name) == 0) {
-                break;
-            }
-        }
-        if (reg_idx >= num_regs) {
-            printf("Unknown register: '%s'\n", name);
-            return mp_const_none;
-        }
-        addr = (mp_uint_t)base + reg->offset;
-    } else {
-        addr = (mp_uint_t)base + mp_obj_get_int(args[0]);
-    }
-
-    if (n_args < 2) {
-        // get
-        printf("0x%08lx\n", *(uint32_t *)addr);
-    } else {
-        *(uint32_t *)addr = mp_obj_get_int(args[1]);
-    }
-    return mp_const_none;
-}
-
-#endif
diff --git a/ports/teensy/reg.h b/ports/teensy/reg.h
deleted file mode 100644
index 8202b537b1..0000000000
--- a/ports/teensy/reg.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef MICROPY_INCLUDED_TEENSY_REG_H
-#define MICROPY_INCLUDED_TEENSY_REG_H
-
-typedef struct {
-    const char *name;
-    mp_uint_t offset;
-} reg_t;
-
-#define REG_ENTRY(st, name) { #name, offsetof(st, name) }
-
-mp_obj_t reg_cmd(void *base, reg_t *reg, mp_uint_t num_reg, uint n_args, const mp_obj_t *args);
-
-#endif // MICROPY_INCLUDED_TEENSY_REG_H
diff --git a/ports/teensy/servo.c b/ports/teensy/servo.c
deleted file mode 100644
index bc9b6fdcfb..0000000000
--- a/ports/teensy/servo.c
+++ /dev/null
@@ -1,264 +0,0 @@
-#include <stdio.h>
-#include "misc.h"
-#include "mpconfig.h"
-#include "qstr.h"
-#include "nlr.h"
-#include "obj.h"
-#include "servo.h"
-
-#include "Arduino.h"
-
-#define MAX_SERVOS  12
-#define INVALID_SERVO   -1
-
-#define MIN_PULSE_WIDTH       544     // the shortest pulse sent to a servo
-#define MAX_PULSE_WIDTH      2400     // the longest pulse sent to a servo
-#define DEFAULT_PULSE_WIDTH  1500     // default pulse width when servo is attached
-#define REFRESH_INTERVAL    20000     // minumim time to refresh servos in microseconds
-
-#define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_PDBIE \
-    | PDB_SC_CONT | PDB_SC_PRESCALER(2) | PDB_SC_MULT(0))
-#define PDB_PRESCALE 4
-#define usToTicks(us)    ((us) * (F_BUS / 1000) / PDB_PRESCALE / 1000)
-#define ticksToUs(ticks) ((ticks) * PDB_PRESCALE * 1000 / (F_BUS / 1000))
-
-static uint16_t servo_active_mask = 0;
-static uint16_t servo_allocated_mask = 0;
-static uint8_t servo_pin[MAX_SERVOS];
-static uint16_t servo_ticks[MAX_SERVOS];
-
-typedef struct _pyb_servo_obj_t {
-    mp_obj_base_t base;
-    uint servo_id;
-    uint min_usecs;
-    uint max_usecs;
-} pyb_servo_obj_t;
-
-#define clamp(v, min_val, max_val) ((v) < (min_val) ? (min_val) : (v) > (max_val) ? (max_val) : (v))
-
-static float map_uint_to_float(uint x, uint in_min, uint in_max, float out_min, float out_max) {
-    return (float)(x - in_min) * (out_max - out_min) / (float)(in_max - in_min) + (float)out_min;
-}
-
-static uint map_float_to_uint(float x, float in_min, float in_max, uint out_min, uint out_max) {
-    return (int)((x - in_min) * (float)(out_max - out_min) / (in_max - in_min) + (float)out_min);
-}
-
-static mp_obj_t servo_obj_attach(mp_obj_t self_in, mp_obj_t pin_obj) {
-    pyb_servo_obj_t *self = self_in;
-    uint pin = mp_obj_get_int(pin_obj);
-    if (pin > CORE_NUM_DIGITAL) {
-        goto pin_error;
-    }
-
-    pinMode(pin, OUTPUT);
-    servo_pin[self->servo_id] = pin;
-    servo_active_mask |= (1 << self->servo_id);
-    if (!(SIM_SCGC6 & SIM_SCGC6_PDB)) {
-        SIM_SCGC6 |= SIM_SCGC6_PDB; // TODO: use bitband for atomic bitset
-        PDB0_MOD = 0xFFFF;
-        PDB0_CNT = 0;
-        PDB0_IDLY = 0;
-        PDB0_SC = PDB_CONFIG;
-        // TODO: maybe this should be a higher priority than most
-        // other interrupts (init all to some default?)
-        PDB0_SC = PDB_CONFIG | PDB_SC_SWTRIG;
-    }
-    NVIC_ENABLE_IRQ(IRQ_PDB);
-    return mp_const_none;
-
-pin_error:
-    mp_raise_msg_varg(MP_QSTR_ValueError, MP_ERROR_TEXT("pin %d does not exist"), pin);
-}
-
-static mp_obj_t servo_obj_detach(mp_obj_t self_in) {
-    // pyb_servo_obj_t *self = self_in;
-    return mp_const_none;
-}
-
-static mp_obj_t servo_obj_pin(mp_obj_t self_in) {
-    pyb_servo_obj_t *self = self_in;
-    return MP_OBJ_NEW_SMALL_INT(servo_pin[self->servo_id]);
-}
-
-static mp_obj_t servo_obj_min_usecs(int n_args, const mp_obj_t *args) {
-    pyb_servo_obj_t *self = args[0];
-    if (n_args == 1) {
-        // get min
-        return MP_OBJ_NEW_SMALL_INT(self->min_usecs);
-    }
-    // Set min
-    self->min_usecs = mp_obj_get_int(args[1]);
-    return mp_const_none;
-}
-
-static mp_obj_t servo_obj_max_usecs(int n_args, const mp_obj_t *args) {
-    pyb_servo_obj_t *self = args[0];
-    if (n_args == 1) {
-        // get max
-        return MP_OBJ_NEW_SMALL_INT(self->max_usecs);
-    }
-    // Set max
-    self->max_usecs = mp_obj_get_int(args[1]);
-    return mp_const_none;
-}
-
-static mp_obj_t servo_obj_angle(int n_args, const mp_obj_t *args) {
-    pyb_servo_obj_t *self = args[0];
-    if (n_args == 1) {
-        // get
-        float angle = map_uint_to_float(servo_ticks[self->servo_id],
-            usToTicks(self->min_usecs),
-            usToTicks(self->max_usecs),
-            0.0, 180.0);
-        return mp_obj_new_float(angle);
-    }
-    // Set
-    float angle = mp_obj_get_float(args[1]);
-    if (angle < 0.0F) {
-        angle = 0.0F;
-    }
-    if (angle > 180.0F) {
-        angle = 180.0F;
-    }
-    servo_ticks[self->servo_id] = map_float_to_uint(angle,
-        0.0F, 180.0F,
-        usToTicks(self->min_usecs),
-        usToTicks(self->max_usecs));
-    return mp_const_none;
-}
-
-static mp_obj_t servo_obj_usecs(int n_args, const mp_obj_t *args) {
-    pyb_servo_obj_t *self = args[0];
-    uint usecs;
-    if (n_args == 1) {
-        // get
-        return MP_OBJ_NEW_SMALL_INT(ticksToUs(servo_ticks[self->servo_id]));
-    }
-    // Set
-    usecs = mp_obj_get_int(args[1]);
-
-    if (self->min_usecs < self->max_usecs) {
-        usecs = clamp(usecs, self->min_usecs, self->max_usecs);
-    } else {
-        usecs = clamp(usecs, self->max_usecs, self->min_usecs);
-    }
-    servo_ticks[self->servo_id] = usToTicks(usecs);
-    return mp_const_none;
-}
-
-static mp_obj_t servo_obj_attached(mp_obj_t self_in) {
-    pyb_servo_obj_t *self = self_in;
-    uint attached = (servo_active_mask & (1 << self->servo_id)) != 0;
-    return MP_OBJ_NEW_SMALL_INT(attached);
-}
-
-static void servo_obj_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t self_in, mp_print_kind_t kind) {
-    pyb_servo_obj_t *self = self_in;
-    (void)kind;
-    print(env, "<Servo %lu>", self->servo_id);
-}
-
-static MP_DEFINE_CONST_FUN_OBJ_2(servo_obj_attach_obj, servo_obj_attach);
-static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_detach_obj, servo_obj_detach);
-static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_pin_obj, servo_obj_pin);
-static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_min_usecs_obj, 1, 2, servo_obj_min_usecs);
-static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_max_usecs_obj, 1, 2, servo_obj_max_usecs);
-static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_attached_obj, servo_obj_attached);
-static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_angle_obj, 1, 2, servo_obj_angle);
-static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_usecs_obj, 1, 2, servo_obj_usecs);
-
-static const mp_method_t servo_methods[] = {
-    { "attach", &servo_obj_attach_obj },
-    { "detach", &servo_obj_detach_obj },
-    { "pin", &servo_obj_pin_obj },
-    { "min_usecs", &servo_obj_min_usecs_obj },
-    { "max_usecs", &servo_obj_max_usecs_obj },
-    { "attached", &servo_obj_attached_obj },
-    { "angle", &servo_obj_angle_obj },
-    { "usecs", &servo_obj_usecs_obj },
-    { NULL, NULL },
-};
-
-/*
- * Notes:
- *
- * ISR needs to know pin #, ticks
- */
-
-static const mp_obj_type_t servo_obj_type = {
-    { &mp_type_type },
-    .name = MP_QSTR_Servo,
-    .print = servo_obj_print,
-    .methods = servo_methods,
-};
-
-/* servo = pyb.Servo(pin, [min_uecs, [max_usecs]]) */
-
-mp_obj_t pyb_Servo(void) {
-    uint16_t mask;
-    pyb_servo_obj_t *self = mp_obj_malloc(pyb_servo_obj_t, &servo_obj_type);
-    self->min_usecs = MIN_PULSE_WIDTH;
-    self->max_usecs = MAX_PULSE_WIDTH;
-
-    /* Find an unallocated servo id */
-
-    self->servo_id = 0;
-    for (mask = 1; mask < (1 << MAX_SERVOS); mask <<= 1) {
-        if (!(servo_allocated_mask & mask)) {
-            servo_allocated_mask |= mask;
-            servo_active_mask &= ~mask;
-            servo_ticks[self->servo_id] = usToTicks(DEFAULT_PULSE_WIDTH);
-            return self;
-        }
-        self->servo_id++;
-    }
-    m_del_obj(pyb_servo_obj_t, self);
-    mp_raise_ValueError(MP_ERROR_TEXT("No available servo ids"));
-    return mp_const_none;
-}
-
-void pdb_isr(void) {
-    static int8_t channel = 0, channel_high = MAX_SERVOS;
-    static uint32_t tick_accum = 0;
-    uint32_t ticks;
-    int32_t wait_ticks;
-
-    // first, if any channel was left high from the previous
-    // run, now is the time to shut it off
-    if (servo_active_mask & (1 << channel_high)) {
-        digitalWrite(servo_pin[channel_high], LOW);
-        channel_high = MAX_SERVOS;
-    }
-    // search for the next channel to turn on
-    while (channel < MAX_SERVOS) {
-        if (servo_active_mask & (1 << channel)) {
-            digitalWrite(servo_pin[channel], HIGH);
-            channel_high = channel;
-            ticks = servo_ticks[channel];
-            tick_accum += ticks;
-            PDB0_IDLY += ticks;
-            PDB0_SC = PDB_CONFIG | PDB_SC_LDOK;
-            channel++;
-            return;
-        }
-        channel++;
-    }
-    // when all channels have output, wait for the
-    // minimum refresh interval
-    wait_ticks = usToTicks(REFRESH_INTERVAL) - tick_accum;
-    if (wait_ticks < usToTicks(100)) {
-        wait_ticks = usToTicks(100);
-    } else if (wait_ticks > 60000) {
-        wait_ticks = 60000;
-    }
-    tick_accum += wait_ticks;
-    PDB0_IDLY += wait_ticks;
-    PDB0_SC = PDB_CONFIG | PDB_SC_LDOK;
-    // if this wait is enough to satisfy the refresh
-    // interval, next time begin again at channel zero
-    if (tick_accum >= usToTicks(REFRESH_INTERVAL)) {
-        tick_accum = 0;
-        channel = 0;
-    }
-}
diff --git a/ports/teensy/servo.h b/ports/teensy/servo.h
deleted file mode 100644
index 1ad34353d9..0000000000
--- a/ports/teensy/servo.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef MICROPY_INCLUDED_TEENSY_SERVO_H
-#define MICROPY_INCLUDED_TEENSY_SERVO_H
-
-void servo_init(void);
-
-extern const mp_obj_type_t pyb_servo_type;
-
-MP_DECLARE_CONST_FUN_OBJ_2(pyb_servo_set_obj);
-MP_DECLARE_CONST_FUN_OBJ_2(pyb_pwm_set_obj);
-
-#endif // MICROPY_INCLUDED_TEENSY_SERVO_H
diff --git a/ports/teensy/std.h b/ports/teensy/std.h
deleted file mode 100644
index ef55d22ddc..0000000000
--- a/ports/teensy/std.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef MICROPY_INCLUDED_TEENSY_STD_H
-#define MICROPY_INCLUDED_TEENSY_STD_H
-
-typedef unsigned int size_t;
-
-void __assert_func(void);
-
-void *malloc(size_t n);
-void free(void *ptr);
-void *realloc(void *ptr, size_t n);
-
-void *memcpy(void *dest, const void *src, size_t n);
-void *memmove(void *dest, const void *src, size_t n);
-void *memset(void *s, int c, size_t n);
-
-size_t strlen(const char *str);
-int strcmp(const char *s1, const char *s2);
-int strncmp(const char *s1, const char *s2, size_t n);
-char *strcpy(char *dest, const char *src);
-char *strcat(char *dest, const char *src);
-
-int printf(const char *fmt, ...);
-int snprintf(char *str, size_t size, const char *fmt, ...);
-
-#endif // MICROPY_INCLUDED_TEENSY_STD_H
diff --git a/ports/teensy/teensy_hal.c b/ports/teensy/teensy_hal.c
deleted file mode 100644
index 62a8265177..0000000000
--- a/ports/teensy/teensy_hal.c
+++ /dev/null
@@ -1,86 +0,0 @@
-#include <stdio.h>
-#include <string.h>
-
-#include "py/runtime.h"
-#include "py/stream.h"
-#include "py/mphal.h"
-#include "usb.h"
-#include "uart.h"
-#include "Arduino.h"
-
-mp_uint_t mp_hal_ticks_ms(void) {
-    return millis();
-}
-
-void mp_hal_delay_ms(mp_uint_t ms) {
-    delay(ms);
-}
-
-void mp_hal_set_interrupt_char(int c) {
-    // The teensy 3.1 usb stack doesn't currently have the notion of generating
-    // an exception when a certain character is received. That just means that
-    // you can't press Control-C and get your python script to stop.
-}
-
-uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags) {
-    uintptr_t ret = 0;
-    if (poll_flags & MP_STREAM_POLL_RD) {
-        if (usb_vcp_rx_num()) {
-            ret |= MP_STREAM_POLL_RD;
-        }
-        if (MP_STATE_PORT(pyb_stdio_uart) != NULL && uart_rx_any(MP_STATE_PORT(pyb_stdio_uart))) {
-            ret |= MP_STREAM_POLL_RD;
-        }
-    }
-    if (poll_flags & MP_STREAM_POLL_WR) {
-        if (MP_STATE_PORT(pyb_stdio_uart) != NULL || usb_vcp_is_enabled()) {
-            ret |= MP_STREAM_POLL_WR;
-        }
-    }
-    return ret;
-}
-
-int mp_hal_stdin_rx_chr(void) {
-    for (;;) {
-        byte c;
-        if (usb_vcp_recv_byte(&c) != 0) {
-            return c;
-        } else if (MP_STATE_PORT(pyb_stdio_uart) != NULL && uart_rx_any(MP_STATE_PORT(pyb_stdio_uart))) {
-            return uart_rx_char(MP_STATE_PORT(pyb_stdio_uart));
-        }
-        __WFI();
-    }
-}
-
-void mp_hal_stdout_tx_str(const char *str) {
-    mp_hal_stdout_tx_strn(str, strlen(str));
-}
-
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
-    if (MP_STATE_PORT(pyb_stdio_uart) != NULL) {
-        uart_tx_strn(MP_STATE_PORT(pyb_stdio_uart), str, len);
-    }
-    if (usb_vcp_is_enabled()) {
-        usb_vcp_send_strn(str, len);
-    }
-}
-
-void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) {
-    // send stdout to UART and USB CDC VCP
-    if (MP_STATE_PORT(pyb_stdio_uart) != NULL) {
-        void uart_tx_strn_cooked(pyb_uart_obj_t *uart_obj, const char *str, uint len);
-        uart_tx_strn_cooked(MP_STATE_PORT(pyb_stdio_uart), str, len);
-    }
-    if (usb_vcp_is_enabled()) {
-        usb_vcp_send_strn_cooked(str, len);
-    }
-}
-
-void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio) {
-}
-
-void extint_register_pin(const void *pin, uint32_t mode, int hard_irq, mp_obj_t callback_obj) {
-    mp_raise_NotImplementedError(NULL);
-}
-
-MP_REGISTER_ROOT_POINTER(struct _pyb_uart_obj_t *pyb_stdio_uart);
diff --git a/ports/teensy/teensy_hal.h b/ports/teensy/teensy_hal.h
deleted file mode 100644
index 515d2d0efb..0000000000
--- a/ports/teensy/teensy_hal.h
+++ /dev/null
@@ -1,128 +0,0 @@
-#include <mk20dx128.h>
-#include "hal_ftm.h"
-
-#ifdef  USE_FULL_ASSERT
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-void assert_failed(uint8_t *file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-#define HAL_NVIC_EnableIRQ(irq)    NVIC_ENABLE_IRQ(irq)
-
-#define GPIOA   ((GPIO_TypeDef *)&GPIOA_PDOR)
-#define GPIOB   ((GPIO_TypeDef *)&GPIOB_PDOR)
-#define GPIOC   ((GPIO_TypeDef *)&GPIOC_PDOR)
-#define GPIOD   ((GPIO_TypeDef *)&GPIOD_PDOR)
-#define GPIOE   ((GPIO_TypeDef *)&GPIOE_PDOR)
-#define GPIOZ   ((GPIO_TypeDef *)NULL)
-
-#define I2C0    ((I2C_TypeDef *)0x40066000)
-#define I2C1    ((I2C_TypeDef *)0x40067000)
-
-#undef  SPI0
-#define SPI0    ((SPI_TypeDef *)0x4002C000)
-#define SPI1    ((SPI_TypeDef *)0x4002D000)
-
-#define UART0   ((UART_TypeDef *)&UART0_BDH)
-#define UART1   ((UART_TypeDef *)&UART1_BDH)
-#define UART2   ((UART_TypeDef *)&UART2_BDH)
-
-typedef struct {
-    uint32_t dummy;
-} I2C_TypeDef;
-
-typedef struct {
-    uint32_t dummy;
-} UART_TypeDef;
-
-typedef struct {
-    uint32_t dummy;
-} SPI_TypeDef;
-
-typedef struct {
-    volatile uint32_t PDOR;         // Output register
-    volatile uint32_t PSOR;         // Set output register
-    volatile uint32_t PCOR;         // Clear output register
-    volatile uint32_t PTOR;         // Toggle output register
-    volatile uint32_t PDIR;         // Data Input register
-    volatile uint32_t PDDR;         // Data Direction register
-} GPIO_TypeDef;
-
-#define GPIO_OUTPUT_TYPE    ((uint32_t)0x00000010)  // Indicates OD
-
-#define GPIO_MODE_INPUT     ((uint32_t)0x00000000)
-#define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001)
-#define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011)
-#define GPIO_MODE_AF_PP     ((uint32_t)0x00000002)
-#define GPIO_MODE_AF_OD     ((uint32_t)0x00000012)
-#define GPIO_MODE_ANALOG    ((uint32_t)0x00000003)
-#define GPIO_MODE_IT_RISING ((uint32_t)1)
-#define GPIO_MODE_IT_FALLING ((uint32_t)2)
-
-#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) || \
-    ((MODE) == GPIO_MODE_OUTPUT_PP) || \
-    ((MODE) == GPIO_MODE_OUTPUT_OD) || \
-    ((MODE) == GPIO_MODE_AF_PP) || \
-    ((MODE) == GPIO_MODE_AF_OD) || \
-    ((MODE) == GPIO_MODE_ANALOG))
-
-#define GPIO_NOPULL         ((uint32_t)0)
-#define GPIO_PULLUP         ((uint32_t)1)
-#define GPIO_PULLDOWN       ((uint32_t)2)
-
-#define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
-    ((PULL) == GPIO_PULLDOWN))
-
-#define GPIO_SPEED_FREQ_LOW       ((uint32_t)0)
-#define GPIO_SPEED_FREQ_MEDIUM    ((uint32_t)1)
-#define GPIO_SPEED_FREQ_HIGH      ((uint32_t)2)
-#define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)3)
-
-#define IS_GPIO_AF(af)      ((af) >= 0 && (af) <= 7)
-
-typedef struct {
-    uint32_t Pin;
-    uint32_t Mode;
-    uint32_t Pull;
-    uint32_t Speed;
-    uint32_t Alternate;
-} GPIO_InitTypeDef;
-
-#define GPIO_PORT_TO_PORT_NUM(GPIOx) \
-    ((&GPIOx->PDOR - &GPIOA_PDOR) / (&GPIOB_PDOR - &GPIOA_PDOR))
-
-#define GPIO_PIN_TO_PORT_PCR(GPIOx, pin) \
-    (&PORTA_PCR0 + (GPIO_PORT_TO_PORT_NUM(GPIOx) * 0x400) + (pin))
-
-#define GPIO_AF2_I2C0   2
-#define GPIO_AF2_I2C1   2
-#define GPIO_AF2_SPI0   2
-#define GPIO_AF3_FTM0   3
-#define GPIO_AF3_FTM1   3
-#define GPIO_AF3_FTM2   3
-#define GPIO_AF3_UART0  3
-#define GPIO_AF3_UART1  3
-#define GPIO_AF3_UART2  3
-#define GPIO_AF4_FTM0   4
-#define GPIO_AF6_FTM1   6
-#define GPIO_AF6_FTM2   6
-#define GPIO_AF6_I2C1   6
-#define GPIO_AF7_FTM1   7
-
-__attribute__((always_inline)) static inline void __WFI(void) {
-    __asm volatile ("wfi");
-}
-
-void mp_hal_set_interrupt_char(int c);
-
-void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio);
-
-void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *init);
-
-struct _pin_obj_t;
-#define mp_hal_pin_obj_t const struct _pin_obj_t *
-#define mp_hal_pin_high(p) (((p)->gpio->PSOR) = (p)->pin_mask)
-#define mp_hal_pin_low(p)  (((p)->gpio->PCOR) = (p)->pin_mask)
-#define mp_hal_pin_read(p) (((p)->gpio->PDIR >> (p)->pin) & 1)
-#define mp_hal_pin_write(p, v)  ((v) ? mp_hal_pin_high(p) : mp_hal_pin_low(p))
diff --git a/ports/teensy/teensy_pins.csv b/ports/teensy/teensy_pins.csv
deleted file mode 100644
index 10887e2120..0000000000
--- a/ports/teensy/teensy_pins.csv
+++ /dev/null
@@ -1,56 +0,0 @@
-D0,PTB16
-D1,PTB17
-D2,PTD0
-D3,PTA12
-D4,PTA13
-D5,PTD7
-D6,PTD4
-D7,PTD2
-D8,PTD3
-D9,PTC3
-D10,PTC4
-D11,PTC6
-D12,PTC7
-D13,PTC5
-D14,PTD1
-D15,PTC0
-D16,PTB0
-D17,PTB1
-D18,PTB3
-D19,PTB2
-D20,PTD5
-D21,PTD6
-D22,PTC1
-D23,PTC2
-D24,PTA5
-D25,PTB19
-D26,PTE1
-D27,PTC9
-D28,PTC8
-D29,PTC10
-D30,PTC11
-D31,PTE0
-D32,PTB18
-D33,PTA4
-A0,PTD1
-A1,PTC0
-A2,PTB0
-A3,PTB1
-A4,PTB3
-A5,PTB2
-A6,PTD5
-A7,PTD6
-A8,PTC1
-A9,PTC2
-A10,PTZ0
-A11,PTZ1
-A12,PTZ2
-A13,PTZ3
-A14,PTZ5
-A15,PTE1
-A16,PTC9
-A17,PTC8
-A18,PTC10
-A19,PTC11
-A20,PTE0
-LED,PTC5
diff --git a/ports/teensy/timer.c b/ports/teensy/timer.c
deleted file mode 100644
index da18d6f4f5..0000000000
--- a/ports/teensy/timer.c
+++ /dev/null
@@ -1,1003 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <stddef.h>
-
-#include "py/runtime.h"
-#include "py/gc.h"
-#include "py/mphal.h"
-#include "pin.h"
-#include "reg.h"
-#include "timer.h"
-
-typedef enum {
-    CHANNEL_MODE_PWM_NORMAL,
-    CHANNEL_MODE_PWM_INVERTED,
-    CHANNEL_MODE_OC_TIMING,
-    CHANNEL_MODE_OC_ACTIVE,
-    CHANNEL_MODE_OC_INACTIVE,
-    CHANNEL_MODE_OC_TOGGLE,
-//    CHANNEL_MODE_OC_FORCED_ACTIVE,
-//    CHANNEL_MODE_OC_FORCED_INACTIVE,
-    CHANNEL_MODE_IC,
-} pyb_channel_mode;
-
-STATIC const struct {
-    qstr name;
-    uint32_t oc_mode;
-} channel_mode_info[] = {
-    { MP_QSTR_PWM,                FTM_OCMODE_PWM1 },
-    { MP_QSTR_PWM_INVERTED,       FTM_OCMODE_PWM2 },
-    { MP_QSTR_OC_TIMING,          FTM_OCMODE_TIMING },
-    { MP_QSTR_OC_ACTIVE,          FTM_OCMODE_ACTIVE },
-    { MP_QSTR_OC_INACTIVE,        FTM_OCMODE_INACTIVE },
-    { MP_QSTR_OC_TOGGLE,          FTM_OCMODE_TOGGLE },
-//    { MP_QSTR_OC_FORCED_ACTIVE,   FTM_OCMODE_FORCED_ACTIVE },
-//    { MP_QSTR_OC_FORCED_INACTIVE, FTM_OCMODE_FORCED_INACTIVE },
-    { MP_QSTR_IC,                 0 },
-};
-
-struct _pyb_timer_obj_t;
-
-typedef struct _pyb_timer_channel_obj_t {
-    mp_obj_base_t base;
-    struct _pyb_timer_obj_t *timer;
-    uint8_t channel;
-    uint8_t mode;
-    mp_obj_t callback;
-    struct _pyb_timer_channel_obj_t *next;
-} pyb_timer_channel_obj_t;
-
-typedef struct _pyb_timer_obj_t {
-    mp_obj_base_t base;
-    uint8_t tim_id;
-    uint8_t irqn;
-    mp_obj_t callback;
-    FTM_HandleTypeDef ftm;
-    pyb_timer_channel_obj_t *channel;
-} pyb_timer_obj_t;
-
-// Used to do callbacks to Python code on interrupt
-STATIC pyb_timer_obj_t *pyb_timer_obj_all[3];
-#define PYB_TIMER_OBJ_ALL_NUM MP_ARRAY_SIZE(pyb_timer_obj_all)
-
-STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in);
-STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback);
-STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback);
-
-void timer_init0(void) {
-    for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) {
-        pyb_timer_obj_all[i] = NULL;
-    }
-}
-
-// unregister all interrupt sources
-void timer_deinit(void) {
-    for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) {
-        pyb_timer_obj_t *tim = pyb_timer_obj_all[i];
-        if (tim != NULL) {
-            pyb_timer_deinit(tim);
-        }
-    }
-}
-
-mp_uint_t get_prescaler_shift(mp_int_t prescaler) {
-    mp_uint_t prescaler_shift;
-    for (prescaler_shift = 0; prescaler_shift < 8; prescaler_shift++) {
-        if (prescaler == (1 << prescaler_shift)) {
-            return prescaler_shift;
-        }
-    }
-    mp_raise_msg_varg(&mp_type_TypeError, MP_ERROR_TEXT("prescaler must be a power of 2 between 1 and 128, not %d"), prescaler);
-}
-
-/******************************************************************************/
-/* MicroPython bindings                                                       */
-
-STATIC const mp_obj_type_t pyb_timer_channel_type;
-
-// Helper function for determining the period used for calculating percent
-STATIC uint32_t compute_period(pyb_timer_obj_t *self) {
-    // In center mode,  compare == period corresponds to 100%
-    // In edge mode, compare == (period + 1) corresponds to 100%
-    FTM_TypeDef *FTMx = self->ftm.Instance;
-    uint32_t period = (FTMx->MOD & 0xffff);
-    if ((FTMx->SC & FTM_SC_CPWMS) == 0) {
-        // Edge mode
-        period++;
-    }
-    return period;
-}
-
-// Helper function to compute PWM value from timer period and percent value.
-// 'val' can be an int or a float between 0 and 100 (out of range values are
-// clamped).
-STATIC uint32_t compute_pwm_value_from_percent(uint32_t period, mp_obj_t percent_in) {
-    uint32_t cmp;
-    if (0) {
-    #if MICROPY_PY_BUILTINS_FLOAT
-    } else if (mp_obj_is_type(percent_in, &mp_type_float)) {
-        float percent = mp_obj_get_float(percent_in);
-        if (percent <= 0.0) {
-            cmp = 0;
-        } else if (percent >= 100.0) {
-            cmp = period;
-        } else {
-            cmp = percent / 100.0 * ((float)period);
-        }
-    #endif
-    } else {
-        mp_int_t percent = mp_obj_get_int(percent_in);
-        if (percent <= 0) {
-            cmp = 0;
-        } else if (percent >= 100) {
-            cmp = period;
-        } else {
-            cmp = ((uint32_t)percent * period) / 100;
-        }
-    }
-    return cmp;
-}
-
-// Helper function to compute percentage from timer perion and PWM value.
-STATIC mp_obj_t compute_percent_from_pwm_value(uint32_t period, uint32_t cmp) {
-    #if MICROPY_PY_BUILTINS_FLOAT
-    float percent = (float)cmp * 100.0 / (float)period;
-    if (cmp >= period) {
-        percent = 100.0;
-    } else {
-        percent = (float)cmp * 100.0 / (float)period;
-    }
-    return mp_obj_new_float(percent);
-    #else
-    mp_int_t percent;
-    if (cmp >= period) {
-        percent = 100;
-    } else {
-        percent = cmp * 100 / period;
-    }
-    return mp_obj_new_int(percent);
-    #endif
-}
-
-STATIC void pyb_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    pyb_timer_obj_t *self = self_in;
-
-    if (self->ftm.State == HAL_FTM_STATE_RESET) {
-        mp_printf(print, "Timer(%u)", self->tim_id);
-    } else {
-        mp_printf(print, "Timer(%u, prescaler=%u, period=%u, mode=%s)",
-            self->tim_id,
-            1 << (self->ftm.Instance->SC & 7),
-                self->ftm.Instance->MOD & 0xffff,
-                self->ftm.Init.CounterMode == FTM_COUNTERMODE_UP ? "UP" : "CENTER");
-    }
-}
-
-/// \method init(*, freq, prescaler, period)
-/// Initialise the timer.  Initialisation must be either by frequency (in Hz)
-/// or by prescaler and period:
-///
-///     tim.init(freq=100)                  # set the timer to trigger at 100Hz
-///     tim.init(prescaler=83, period=999)  # set the prescaler and period directly
-///
-/// Keyword arguments:
-///
-///   - `freq` - specifies the periodic frequency of the timer. You might also
-///              view this as the frequency with which the timer goes through
-///              one complete cycle.
-///
-///   - `prescaler` 1, 2, 4, 8 16 32, 64 or 128 - specifies the value to be loaded into the
-///                 timer's prescaler. The timer clock source is divided by
-///     (`prescaler`) to arrive at the timer clock.
-///
-///   - `period` [0-0xffff] - Specifies the value to be loaded into the timer's
-///     Modulo Register (MOD). This determines the period of the timer (i.e.
-///     when the counter cycles). The timer counter will roll-over after
-///     `period` timer clock cycles. In center mode, a compare register > 0x7fff
-///     doesn't seem to work properly, so keep this in mind.
-///
-///   - `mode` can be one of:
-///     - `Timer.UP` - configures the timer to count from 0 to MOD (default)
-///     - `Timer.CENTER` - configures the timer to count from 0 to MOD and
-///       then back down to 0.
-///
-///   - `callback` - as per Timer.callback()
-///
-///  You must either specify freq or both of period and prescaler.
-STATIC const mp_arg_t pyb_timer_init_args[] = {
-    { MP_QSTR_freq,             MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
-    { MP_QSTR_prescaler,        MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
-    { MP_QSTR_period,           MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
-    { MP_QSTR_mode,             MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = FTM_COUNTERMODE_UP} },
-    { MP_QSTR_callback,         MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
-};
-#define PYB_TIMER_INIT_NUM_ARGS MP_ARRAY_SIZE(pyb_timer_init_args)
-
-STATIC mp_obj_t pyb_timer_init_helper(pyb_timer_obj_t *self, uint n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    // parse args
-    mp_arg_val_t vals[PYB_TIMER_INIT_NUM_ARGS];
-    mp_arg_parse_all(n_args, args, kw_args, PYB_TIMER_INIT_NUM_ARGS, pyb_timer_init_args, vals);
-
-    FTM_HandleTypeDef *ftm = &self->ftm;
-
-    // set the TIM configuration values
-    FTM_Base_InitTypeDef *init = &ftm->Init;
-
-    if (vals[0].u_int != 0xffffffff) {
-        // set prescaler and period from frequency
-
-        if (vals[0].u_int == 0) {
-            mp_raise_ValueError(MP_ERROR_TEXT("can't have 0 frequency"));
-        }
-
-        uint32_t period = MAX(1, F_BUS / vals[0].u_int);
-        uint32_t prescaler_shift = 0;
-        while (period > 0xffff && prescaler_shift < 7) {
-            period >>= 1;
-            prescaler_shift++;
-        }
-        if (period > 0xffff) {
-            period = 0xffff;
-        }
-        init->PrescalerShift = prescaler_shift;
-        init->Period = period;
-    } else if (vals[1].u_int != 0xffffffff && vals[2].u_int != 0xffffffff) {
-        // set prescaler and period directly
-        init->PrescalerShift = get_prescaler_shift(vals[1].u_int);
-        init->Period = vals[2].u_int;
-        if (!IS_FTM_PERIOD(init->Period)) {
-            mp_raise_msg_varg(&mp_type_TypeError, MP_ERROR_TEXT("period must be between 0 and 65535, not %d"), init->Period);
-        }
-    } else {
-        mp_raise_TypeError(MP_ERROR_TEXT("must specify either freq, or prescaler and period"));
-    }
-
-    init->CounterMode = vals[3].u_int;
-    if (!IS_FTM_COUNTERMODE(init->CounterMode)) {
-        mp_raise_msg_varg(&mp_type_TypeError, MP_ERROR_TEXT("invalid counter mode: %d"), init->CounterMode);
-    }
-
-    // Currently core/mk20dx128.c sets SIM_SCGC6_FTM0, SIM_SCGC6_FTM1, SIM_SCGC3_FTM2
-    // so we don't need to do it here.
-
-    NVIC_SET_PRIORITY(self->irqn, 0xe); // next-to lowest priority
-
-    HAL_FTM_Base_Init(ftm);
-    if (vals[4].u_obj == mp_const_none) {
-        HAL_FTM_Base_Start(ftm);
-    } else {
-        pyb_timer_callback(self, vals[4].u_obj);
-    }
-
-    return mp_const_none;
-}
-
-/// \classmethod \constructor(id, ...)
-/// Construct a new timer object of the given id.  If additional
-/// arguments are given, then the timer is initialised by `init(...)`.
-/// `id` can be 1 to 14, excluding 3.
-STATIC mp_obj_t pyb_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
-    // check arguments
-    mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
-
-    // create new Timer object
-    pyb_timer_obj_t *tim = m_new_obj(pyb_timer_obj_t);
-    memset(tim, 0, sizeof(*tim));
-
-    tim->base.type = &pyb_timer_type;
-    tim->callback = mp_const_none;
-    tim->channel = NULL;
-
-    // get FTM number
-    tim->tim_id = mp_obj_get_int(args[0]);
-
-    switch (tim->tim_id) {
-        case 0:
-            tim->ftm.Instance = FTM0;
-            tim->irqn = IRQ_FTM0;
-            break;
-        case 1:
-            tim->ftm.Instance = FTM1;
-            tim->irqn = IRQ_FTM1;
-            break;
-        case 2:
-            tim->ftm.Instance = FTM2;
-            tim->irqn = IRQ_FTM2;
-            break;
-        default:
-            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Timer %d does not exist"), tim->tim_id);
-    }
-
-    if (n_args > 1 || n_kw > 0) {
-        // start the peripheral
-        mp_map_t kw_args;
-        mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-        pyb_timer_init_helper(tim, n_args - 1, args + 1, &kw_args);
-    }
-
-    // set the global variable for interrupt callbacks
-    if (tim->tim_id < PYB_TIMER_OBJ_ALL_NUM) {
-        pyb_timer_obj_all[tim->tim_id] = tim;
-    }
-
-    return (mp_obj_t)tim;
-}
-
-STATIC mp_obj_t pyb_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    return pyb_timer_init_helper(args[0], n_args - 1, args + 1, kw_args);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_init_obj, 1, pyb_timer_init);
-
-/// \method deinit()
-/// Deinitialises the timer.
-///
-/// Disables the callback (and the associated irq).
-/// Disables any channel callbacks (and the associated irq).
-/// Stops the timer, and disables the timer peripheral.
-STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in) {
-    pyb_timer_obj_t *self = self_in;
-
-    // Disable the base interrupt
-    pyb_timer_callback(self_in, mp_const_none);
-
-    pyb_timer_channel_obj_t *chan = self->channel;
-    self->channel = NULL;
-
-    // Disable the channel interrupts
-    while (chan != NULL) {
-        pyb_timer_channel_callback(chan, mp_const_none);
-        pyb_timer_channel_obj_t *prev_chan = chan;
-        chan = chan->next;
-        prev_chan->next = NULL;
-    }
-
-    HAL_FTM_Base_DeInit(&self->ftm);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_deinit_obj, pyb_timer_deinit);
-
-/// \method channel(channel, mode, ...)
-///
-/// If only a channel number is passed, then a previously initialized channel
-/// object is returned (or `None` if there is no previous channel).
-///
-/// Otherwise, a TimerChannel object is initialized and returned.
-///
-/// Each channel can be configured to perform pwm, output compare, or
-/// input capture. All channels share the same underlying timer, which means
-/// that they share the same timer clock.
-///
-/// Keyword arguments:
-///
-///   - `mode` can be one of:
-///     - `Timer.PWM` - configure the timer in PWM mode (active high).
-///     - `Timer.PWM_INVERTED` - configure the timer in PWM mode (active low).
-///     - `Timer.OC_TIMING` - indicates that no pin is driven.
-///     - `Timer.OC_ACTIVE` - the pin will be made active when a compare
-///        match occurs (active is determined by polarity)
-///     - `Timer.OC_INACTIVE` - the pin will be made inactive when a compare
-///        match occurs.
-///     - `Timer.OC_TOGGLE` - the pin will be toggled when an compare match occurs.
-///     - `Timer.IC` - configure the timer in Input Capture mode.
-///
-///   - `callback` - as per TimerChannel.callback()
-///
-///   - `pin` None (the default) or a Pin object. If specified (and not None)
-///           this will cause the alternate function of the the indicated pin
-///      to be configured for this timer channel. An error will be raised if
-///      the pin doesn't support any alternate functions for this timer channel.
-///
-/// Keyword arguments for Timer.PWM modes:
-///
-///   - `pulse_width` - determines the initial pulse width value to use.
-///   - `pulse_width_percent` - determines the initial pulse width percentage to use.
-///
-/// Keyword arguments for Timer.OC modes:
-///
-///   - `compare` - determines the initial value of the compare register.
-///
-///   - `polarity` can be one of:
-///     - `Timer.HIGH` - output is active high
-///     - `Timer.LOW` - output is active low
-///
-/// Optional keyword arguments for Timer.IC modes:
-///
-///   - `polarity` can be one of:
-///     - `Timer.RISING` - captures on rising edge.
-///     - `Timer.FALLING` - captures on falling edge.
-///     - `Timer.BOTH` - captures on both edges.
-///
-/// PWM Example:
-///
-///     timer = pyb.Timer(0, prescaler=128, period=37500, counter_mode=pyb.Timer.COUNTER_MODE_CENTER)
-///     ch0 = t0.channel(0, pyb.Timer.PWM, pin=pyb.Pin.board.D22, pulse_width=(t0.period() + 1) // 4)
-///     ch1 = t0.channel(1, pyb.Timer.PWM, pin=pyb.Pin.board.D23, pulse_width=(t0.period() + 1) // 2)
-STATIC const mp_arg_t pyb_timer_channel_args[] = {
-    { MP_QSTR_callback,            MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
-    { MP_QSTR_pin,                 MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
-    { MP_QSTR_pulse_width,         MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
-    { MP_QSTR_pulse_width_percent, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
-    { MP_QSTR_compare,             MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
-    { MP_QSTR_polarity,            MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
-};
-#define PYB_TIMER_CHANNEL_NUM_ARGS MP_ARRAY_SIZE(pyb_timer_channel_args)
-
-STATIC mp_obj_t pyb_timer_channel(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    pyb_timer_obj_t *self = args[0];
-    mp_int_t channel = mp_obj_get_int(args[1]);
-
-    if (channel < 0 || channel > 7) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Invalid channel (%d)"), channel);
-    }
-
-    pyb_timer_channel_obj_t *chan = self->channel;
-    pyb_timer_channel_obj_t *prev_chan = NULL;
-
-    while (chan != NULL) {
-        if (chan->channel == channel) {
-            break;
-        }
-        prev_chan = chan;
-        chan = chan->next;
-    }
-
-    // If only the channel number is given return the previously allocated
-    // channel (or None if no previous channel).
-    if (n_args == 2) {
-        if (chan) {
-            return chan;
-        }
-        return mp_const_none;
-    }
-
-    // If there was already a channel, then remove it from the list. Note that
-    // the order we do things here is important so as to appear atomic to
-    // the IRQ handler.
-    if (chan) {
-        // Turn off any IRQ associated with the channel.
-        pyb_timer_channel_callback(chan, mp_const_none);
-
-        // Unlink the channel from the list.
-        if (prev_chan) {
-            prev_chan->next = chan->next;
-        }
-        self->channel = chan->next;
-        chan->next = NULL;
-    }
-
-    // Allocate and initialize a new channel
-    mp_arg_val_t vals[PYB_TIMER_CHANNEL_NUM_ARGS];
-    mp_arg_parse_all(n_args - 3, args + 3, kw_args, PYB_TIMER_CHANNEL_NUM_ARGS, pyb_timer_channel_args, vals);
-
-    chan = m_new_obj(pyb_timer_channel_obj_t);
-    memset(chan, 0, sizeof(*chan));
-    chan->base.type = &pyb_timer_channel_type;
-    chan->timer = self;
-    chan->channel = channel;
-    chan->mode = mp_obj_get_int(args[2]);
-    chan->callback = vals[0].u_obj;
-
-    mp_obj_t pin_obj = vals[1].u_obj;
-    if (pin_obj != mp_const_none) {
-        if (!mp_obj_is_type(pin_obj, &pin_type)) {
-            mp_raise_ValueError(MP_ERROR_TEXT("pin argument needs to be be a Pin type"));
-        }
-        const pin_obj_t *pin = pin_obj;
-        const pin_af_obj_t *af = pin_find_af(pin, AF_FN_FTM, self->tim_id);
-        if (af == NULL) {
-            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("pin %s doesn't have an af for TIM%d"), qstr_str(pin->name), self->tim_id);
-        }
-        // pin.init(mode=AF_PP, af=idx)
-        const mp_obj_t args[6] = {
-            (mp_obj_t)&pin_init_obj,
-            pin_obj,
-            MP_OBJ_NEW_QSTR(MP_QSTR_mode),  MP_OBJ_NEW_SMALL_INT(GPIO_MODE_AF_PP),
-            MP_OBJ_NEW_QSTR(MP_QSTR_af),    MP_OBJ_NEW_SMALL_INT(af->idx)
-        };
-        mp_call_method_n_kw(0, 2, args);
-    }
-
-    // Link the channel to the timer before we turn the channel on.
-    // Note that this needs to appear atomic to the IRQ handler (the write
-    // to self->channel is atomic, so we're good, but I thought I'd mention
-    // in case this was ever changed in the future).
-    chan->next = self->channel;
-    self->channel = chan;
-
-    switch (chan->mode) {
-
-        case CHANNEL_MODE_PWM_NORMAL:
-        case CHANNEL_MODE_PWM_INVERTED: {
-            FTM_OC_InitTypeDef oc_config;
-            oc_config.OCMode = channel_mode_info[chan->mode].oc_mode;
-            if (vals[3].u_obj != mp_const_none) {
-                // pulse width ratio given
-                uint32_t period = compute_period(self);
-                oc_config.Pulse = compute_pwm_value_from_percent(period, vals[3].u_obj);
-            } else {
-                // use absolute pulse width value (defaults to 0 if nothing given)
-                oc_config.Pulse = vals[2].u_int;
-            }
-            oc_config.OCPolarity = FTM_OCPOLARITY_HIGH;
-
-            HAL_FTM_PWM_ConfigChannel(&self->ftm, &oc_config, channel);
-            if (chan->callback == mp_const_none) {
-                HAL_FTM_PWM_Start(&self->ftm, channel);
-            } else {
-                HAL_FTM_PWM_Start_IT(&self->ftm, channel);
-            }
-            break;
-        }
-
-        case CHANNEL_MODE_OC_TIMING:
-        case CHANNEL_MODE_OC_ACTIVE:
-        case CHANNEL_MODE_OC_INACTIVE:
-        case CHANNEL_MODE_OC_TOGGLE: {
-            FTM_OC_InitTypeDef oc_config;
-            oc_config.OCMode = channel_mode_info[chan->mode].oc_mode;
-            oc_config.Pulse = vals[4].u_int;
-            oc_config.OCPolarity = vals[5].u_int;
-            if (oc_config.OCPolarity == 0xffffffff) {
-                oc_config.OCPolarity = FTM_OCPOLARITY_HIGH;
-            }
-
-            if (!IS_FTM_OC_POLARITY(oc_config.OCPolarity)) {
-                mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Invalid polarity (%d)"), oc_config.OCPolarity);
-            }
-            HAL_FTM_OC_ConfigChannel(&self->ftm, &oc_config, channel);
-            if (chan->callback == mp_const_none) {
-                HAL_FTM_OC_Start(&self->ftm, channel);
-            } else {
-                HAL_FTM_OC_Start_IT(&self->ftm, channel);
-            }
-            break;
-        }
-
-        case CHANNEL_MODE_IC: {
-            FTM_IC_InitTypeDef ic_config;
-
-            ic_config.ICPolarity = vals[5].u_int;
-            if (ic_config.ICPolarity == 0xffffffff) {
-                ic_config.ICPolarity = FTM_ICPOLARITY_RISING;
-            }
-
-            if (!IS_FTM_IC_POLARITY(ic_config.ICPolarity)) {
-                mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Invalid polarity (%d)"), ic_config.ICPolarity);
-            }
-            HAL_FTM_IC_ConfigChannel(&self->ftm, &ic_config, chan->channel);
-            if (chan->callback == mp_const_none) {
-                HAL_FTM_IC_Start(&self->ftm, channel);
-            } else {
-                HAL_FTM_IC_Start_IT(&self->ftm, channel);
-            }
-            break;
-        }
-
-        default:
-            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Invalid mode (%d)"), chan->mode);
-    }
-
-    return chan;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_obj, 2, pyb_timer_channel);
-
-/// \method counter([value])
-/// Get or set the timer counter.
-STATIC mp_obj_t pyb_timer_counter(size_t n_args, const mp_obj_t *args) {
-    pyb_timer_obj_t *self = args[0];
-    if (n_args == 1) {
-        // get
-        return mp_obj_new_int(self->ftm.Instance->CNT);
-    }
-    // set - In order to write to CNT we need to set CNTIN
-    self->ftm.Instance->CNTIN = mp_obj_get_int(args[1]);
-    self->ftm.Instance->CNT = 0;    // write any value to load CNTIN into CNT
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_counter_obj, 1, 2, pyb_timer_counter);
-
-/// \method prescaler([value])
-/// Get or set the prescaler for the timer.
-STATIC mp_obj_t pyb_timer_prescaler(size_t n_args, const mp_obj_t *args) {
-    pyb_timer_obj_t *self = args[0];
-    if (n_args == 1) {
-        // get
-        return mp_obj_new_int(1 << (self->ftm.Instance->SC & 7));
-    }
-
-    // set
-    mp_uint_t prescaler_shift = get_prescaler_shift(mp_obj_get_int(args[1]));
-
-    mp_uint_t sc = self->ftm.Instance->SC;
-    sc &= ~7;
-    sc |= FTM_SC_PS(prescaler_shift);
-    self->ftm.Instance->SC = sc;
-
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_prescaler_obj, 1, 2, pyb_timer_prescaler);
-
-/// \method period([value])
-/// Get or set the period of the timer.
-STATIC mp_obj_t pyb_timer_period(size_t n_args, const mp_obj_t *args) {
-    pyb_timer_obj_t *self = args[0];
-    if (n_args == 1) {
-        // get
-        return mp_obj_new_int(self->ftm.Instance->MOD & 0xffff);
-    }
-
-    // set
-    mp_int_t period = mp_obj_get_int(args[1]) & 0xffff;
-    self->ftm.Instance->CNT = 0;
-    self->ftm.Instance->MOD = period;
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_period_obj, 1, 2, pyb_timer_period);
-
-/// \method callback(fun)
-/// Set the function to be called when the timer triggers.
-/// `fun` is passed 1 argument, the timer object.
-/// If `fun` is `None` then the callback will be disabled.
-STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback) {
-    pyb_timer_obj_t *self = self_in;
-    if (callback == mp_const_none) {
-        // stop interrupt (but not timer)
-        __HAL_FTM_DISABLE_TOF_IT(&self->ftm);
-        self->callback = mp_const_none;
-    } else if (mp_obj_is_callable(callback)) {
-        self->callback = callback;
-        HAL_NVIC_EnableIRQ(self->irqn);
-        // start timer, so that it interrupts on overflow
-        HAL_FTM_Base_Start_IT(&self->ftm);
-    } else {
-        mp_raise_ValueError(MP_ERROR_TEXT("callback must be None or a callable object"));
-    }
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_callback_obj, pyb_timer_callback);
-
-#if MICROPY_TIMER_REG
-reg_t timer_reg[] = {
-    REG_ENTRY(FTM_TypeDef, SC),
-    REG_ENTRY(FTM_TypeDef, CNT),
-    REG_ENTRY(FTM_TypeDef, MOD),
-    REG_ENTRY(FTM_TypeDef, CNTIN),
-    REG_ENTRY(FTM_TypeDef, STATUS),
-    REG_ENTRY(FTM_TypeDef, MODE),
-    REG_ENTRY(FTM_TypeDef, SYNC),
-    REG_ENTRY(FTM_TypeDef, OUTINIT),
-    REG_ENTRY(FTM_TypeDef, OUTMASK),
-    REG_ENTRY(FTM_TypeDef, COMBINE),
-    REG_ENTRY(FTM_TypeDef, DEADTIME),
-    REG_ENTRY(FTM_TypeDef, EXTTRIG),
-    REG_ENTRY(FTM_TypeDef, POL),
-    REG_ENTRY(FTM_TypeDef, FMS),
-    REG_ENTRY(FTM_TypeDef, FILTER),
-    REG_ENTRY(FTM_TypeDef, FLTCTRL),
-    REG_ENTRY(FTM_TypeDef, QDCTRL),
-    REG_ENTRY(FTM_TypeDef, CONF),
-    REG_ENTRY(FTM_TypeDef, FLTPOL),
-    REG_ENTRY(FTM_TypeDef, SYNCONF),
-    REG_ENTRY(FTM_TypeDef, INVCTRL),
-    REG_ENTRY(FTM_TypeDef, SWOCTRL),
-    REG_ENTRY(FTM_TypeDef, PWMLOAD),
-};
-
-mp_obj_t pyb_timer_reg(uint n_args, const mp_obj_t *args) {
-    pyb_timer_obj_t *self = args[0];
-    return reg_cmd(self->ftm.Instance, timer_reg, MP_ARRAY_SIZE(timer_reg), n_args - 1, args + 1);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_reg_obj, 1, 3, pyb_timer_reg);
-#endif // MICROPY_TIMER_REG
-
-STATIC const mp_rom_map_elem_t pyb_timer_locals_dict_table[] = {
-    // instance methods
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_timer_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_timer_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&pyb_timer_channel_obj) },
-    { MP_ROM_QSTR(MP_QSTR_counter), MP_ROM_PTR(&pyb_timer_counter_obj) },
-    { MP_ROM_QSTR(MP_QSTR_prescaler), MP_ROM_PTR(&pyb_timer_prescaler_obj) },
-    { MP_ROM_QSTR(MP_QSTR_period), MP_ROM_PTR(&pyb_timer_period_obj) },
-    { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_callback_obj) },
-    #if MICROPY_TIMER_REG
-    { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pyb_timer_reg_obj) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_UP),              MP_ROM_INT(FTM_COUNTERMODE_UP) },
-    { MP_ROM_QSTR(MP_QSTR_CENTER),          MP_ROM_INT(FTM_COUNTERMODE_CENTER) },
-    { MP_ROM_QSTR(MP_QSTR_PWM),             MP_ROM_INT(CHANNEL_MODE_PWM_NORMAL) },
-    { MP_ROM_QSTR(MP_QSTR_PWM_INVERTED),    MP_ROM_INT(CHANNEL_MODE_PWM_INVERTED) },
-    { MP_ROM_QSTR(MP_QSTR_OC_TIMING),       MP_ROM_INT(CHANNEL_MODE_OC_TIMING) },
-    { MP_ROM_QSTR(MP_QSTR_OC_ACTIVE),       MP_ROM_INT(CHANNEL_MODE_OC_ACTIVE) },
-    { MP_ROM_QSTR(MP_QSTR_OC_INACTIVE),     MP_ROM_INT(CHANNEL_MODE_OC_INACTIVE) },
-    { MP_ROM_QSTR(MP_QSTR_OC_TOGGLE),       MP_ROM_INT(CHANNEL_MODE_OC_TOGGLE) },
-    { MP_ROM_QSTR(MP_QSTR_IC),              MP_ROM_INT(CHANNEL_MODE_IC) },
-    { MP_ROM_QSTR(MP_QSTR_HIGH),            MP_ROM_INT(FTM_OCPOLARITY_HIGH) },
-    { MP_ROM_QSTR(MP_QSTR_LOW),             MP_ROM_INT(FTM_OCPOLARITY_LOW) },
-    { MP_ROM_QSTR(MP_QSTR_RISING),          MP_ROM_INT(FTM_ICPOLARITY_RISING) },
-    { MP_ROM_QSTR(MP_QSTR_FALLING),         MP_ROM_INT(FTM_ICPOLARITY_FALLING) },
-    { MP_ROM_QSTR(MP_QSTR_BOTH),            MP_ROM_INT(FTM_ICPOLARITY_BOTH) },
-};
-STATIC MP_DEFINE_CONST_DICT(pyb_timer_locals_dict, pyb_timer_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    pyb_timer_type,
-    MP_QSTR_Timer,
-    MP_TYPE_FLAG_NONE,
-    make_new, pyb_timer_make_new,
-    print, pyb_timer_print,
-    locals_dict, &pyb_timer_locals_dict
-    );
-
-/// \moduleref pyb
-/// \class TimerChannel - setup a channel for a timer.
-///
-/// Timer channels are used to generate/capture a signal using a timer.
-///
-/// TimerChannel objects are created using the Timer.channel() method.
-STATIC void pyb_timer_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    pyb_timer_channel_obj_t *self = self_in;
-
-    mp_printf(print, "TimerChannel(timer=%u, channel=%u, mode=%s)",
-        self->timer->tim_id,
-        self->channel,
-        qstr_str(channel_mode_info[self->mode].name));
-}
-
-/// \method capture([value])
-/// Get or set the capture value associated with a channel.
-/// capture, compare, and pulse_width are all aliases for the same function.
-/// capture is the logical name to use when the channel is in input capture mode.
-
-/// \method compare([value])
-/// Get or set the compare value associated with a channel.
-/// capture, compare, and pulse_width are all aliases for the same function.
-/// compare is the logical name to use when the channel is in output compare mode.
-
-/// \method pulse_width([value])
-/// Get or set the pulse width value associated with a channel.
-/// capture, compare, and pulse_width are all aliases for the same function.
-/// pulse_width is the logical name to use when the channel is in PWM mode.
-///
-/// In edge aligned mode, a pulse_width of `period + 1` corresponds to a duty cycle of 100%
-/// In center aligned mode, a pulse width of `period` corresponds to a duty cycle of 100%
-STATIC mp_obj_t pyb_timer_channel_capture_compare(size_t n_args, const mp_obj_t *args) {
-    pyb_timer_channel_obj_t *self = args[0];
-    FTM_TypeDef *FTMx = self->timer->ftm.Instance;
-    if (n_args == 1) {
-        // get
-        return mp_obj_new_int(FTMx->channel[self->channel].CV & 0xffff);
-    }
-
-    mp_int_t pw = mp_obj_get_int(args[1]);
-
-    // set
-    FTMx->channel[self->channel].CV = pw & 0xffff;
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_capture_compare_obj, 1, 2, pyb_timer_channel_capture_compare);
-
-/// \method pulse_width_percent([value])
-/// Get or set the pulse width percentage associated with a channel.  The value
-/// is a number between 0 and 100 and sets the percentage of the timer period
-/// for which the pulse is active.  The value can be an integer or
-/// floating-point number for more accuracy.  For example, a value of 25 gives
-/// a duty cycle of 25%.
-STATIC mp_obj_t pyb_timer_channel_pulse_width_percent(size_t n_args, const mp_obj_t *args) {
-    pyb_timer_channel_obj_t *self = args[0];
-    FTM_TypeDef *FTMx = self->timer->ftm.Instance;
-    uint32_t period = compute_period(self->timer);
-    if (n_args == 1) {
-        // get
-        uint32_t cmp = FTMx->channel[self->channel].CV & 0xffff;
-        return compute_percent_from_pwm_value(period, cmp);
-    } else {
-        // set
-        uint32_t cmp = compute_pwm_value_from_percent(period, args[1]);
-        FTMx->channel[self->channel].CV = cmp & 0xffff;
-        return mp_const_none;
-    }
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_pulse_width_percent_obj, 1, 2, pyb_timer_channel_pulse_width_percent);
-
-/// \method callback(fun)
-/// Set the function to be called when the timer channel triggers.
-/// `fun` is passed 1 argument, the timer object.
-/// If `fun` is `None` then the callback will be disabled.
-STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback) {
-    pyb_timer_channel_obj_t *self = self_in;
-    if (callback == mp_const_none) {
-        // stop interrupt (but not timer)
-        __HAL_FTM_DISABLE_CH_IT(&self->timer->ftm, self->channel);
-        self->callback = mp_const_none;
-    } else if (mp_obj_is_callable(callback)) {
-        self->callback = callback;
-        HAL_NVIC_EnableIRQ(self->timer->irqn);
-        // start timer, so that it interrupts on overflow
-        switch (self->mode) {
-            case CHANNEL_MODE_PWM_NORMAL:
-            case CHANNEL_MODE_PWM_INVERTED:
-                HAL_FTM_PWM_Start_IT(&self->timer->ftm, self->channel);
-                break;
-            case CHANNEL_MODE_OC_TIMING:
-            case CHANNEL_MODE_OC_ACTIVE:
-            case CHANNEL_MODE_OC_INACTIVE:
-            case CHANNEL_MODE_OC_TOGGLE:
-                HAL_FTM_OC_Start_IT(&self->timer->ftm, self->channel);
-                break;
-            case CHANNEL_MODE_IC:
-                HAL_FTM_IC_Start_IT(&self->timer->ftm, self->channel);
-                break;
-        }
-    } else {
-        mp_raise_ValueError(MP_ERROR_TEXT("callback must be None or a callable object"));
-    }
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_channel_callback_obj, pyb_timer_channel_callback);
-
-#if MICROPY_TIMER_REG
-reg_t timer_channel_reg[] = {
-    REG_ENTRY(FTM_ChannelTypeDef, CSC),
-    REG_ENTRY(FTM_ChannelTypeDef, CV),
-};
-
-mp_obj_t pyb_timer_channel_reg(uint n_args, const mp_obj_t *args) {
-    pyb_timer_channel_obj_t *self = args[0];
-    return reg_cmd(&self->timer->ftm.Instance->channel[self->channel],
-        timer_channel_reg, MP_ARRAY_SIZE(timer_channel_reg),
-        n_args - 1, args + 1);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_reg_obj, 1, 3, pyb_timer_channel_reg);
-#endif
-
-STATIC const mp_rom_map_elem_t pyb_timer_channel_locals_dict_table[] = {
-    // instance methods
-    { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_channel_callback_obj) },
-    { MP_ROM_QSTR(MP_QSTR_pulse_width), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) },
-    { MP_ROM_QSTR(MP_QSTR_pulse_width_percent), MP_ROM_PTR(&pyb_timer_channel_pulse_width_percent_obj) },
-    { MP_ROM_QSTR(MP_QSTR_capture), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) },
-    { MP_ROM_QSTR(MP_QSTR_compare), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) },
-    #if MICROPY_TIMER_REG
-    { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pyb_timer_channel_reg_obj) },
-    #endif
-};
-STATIC MP_DEFINE_CONST_DICT(pyb_timer_channel_locals_dict, pyb_timer_channel_locals_dict_table);
-
-STATIC MP_DEFINE_CONST_OBJ_TYPE(
-    pyb_timer_channel_type,
-    MP_QSTR_TimerChannel,
-    MP_TYPE_FLAG_NONE,
-    print, pyb_timer_channel_print,
-    locals_dict, &pyb_timer_channel_locals_dict
-    );
-
-STATIC bool ftm_handle_irq_callback(pyb_timer_obj_t *self, mp_uint_t channel, mp_obj_t callback) {
-    // execute callback if it's set
-    if (callback == mp_const_none) {
-        return false;
-    }
-    bool handled = false;
-
-    // When executing code within a handler we must lock the GC to prevent
-    // any memory allocations.  We must also catch any exceptions.
-    gc_lock();
-    nlr_buf_t nlr;
-    if (nlr_push(&nlr) == 0) {
-        mp_call_function_1(callback, self);
-        nlr_pop();
-        handled = true;
-    } else {
-        // Uncaught exception; disable the callback so it doesn't run again.
-        self->callback = mp_const_none;
-        if (channel == 0xffffffff) {
-            printf("Uncaught exception in Timer(" UINT_FMT
-                ") interrupt handler\n", self->tim_id);
-        } else {
-            printf("Uncaught exception in Timer(" UINT_FMT ") channel "
-                UINT_FMT " interrupt handler\n", self->tim_id, channel);
-        }
-        mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val);
-    }
-    gc_unlock();
-    return handled;
-}
-
-STATIC void ftm_irq_handler(uint tim_id) {
-    if (tim_id >= PYB_TIMER_OBJ_ALL_NUM) {
-        return;
-    }
-    // get the timer object
-    pyb_timer_obj_t *self = pyb_timer_obj_all[tim_id];
-    if (self == NULL) {
-        // timer object has not been set, so we can't do anything
-        printf("No timer object for id=%d\n", tim_id);
-        return;
-    }
-    FTM_HandleTypeDef *hftm = &self->ftm;
-
-    bool handled = false;
-
-    // Check for timer (versus timer channel) interrupt.
-    if (__HAL_FTM_GET_TOF_IT(hftm) && __HAL_FTM_GET_TOF_FLAG(hftm)) {
-        __HAL_FTM_CLEAR_TOF_FLAG(hftm);
-        if (ftm_handle_irq_callback(self, 0xffffffff, self->callback)) {
-            handled = true;
-        } else {
-            __HAL_FTM_DISABLE_TOF_IT(&self->ftm);
-            printf("No callback for Timer %d TOF (now disabled)\n", tim_id);
-        }
-    }
-
-    uint32_t processed = 0;
-
-    // Check to see if a timer channel interrupt is pending
-    pyb_timer_channel_obj_t *chan = self->channel;
-    while (chan != NULL) {
-        processed |= (1 << chan->channel);
-        if (__HAL_FTM_GET_CH_IT(&self->ftm, chan->channel) && __HAL_FTM_GET_CH_FLAG(&self->ftm, chan->channel)) {
-            __HAL_FTM_CLEAR_CH_FLAG(&self->ftm, chan->channel);
-            if (ftm_handle_irq_callback(self, chan->channel, chan->callback)) {
-                handled = true;
-            } else {
-                __HAL_FTM_DISABLE_CH_IT(&self->ftm, chan->channel);
-                printf("No callback for Timer %d channel %u (now disabled)\n",
-                    self->tim_id, chan->channel);
-            }
-        }
-        chan = chan->next;
-    }
-
-    if (!handled) {
-        // An interrupt occurred for a channel we didn't process. Find it and
-        // turn it off.
-        for (mp_uint_t channel = 0; channel < 8; channel++) {
-            if ((processed & (1 << channel)) == 0) {
-                if (__HAL_FTM_GET_CH_FLAG(&self->ftm, channel) != 0) {
-                    __HAL_FTM_CLEAR_CH_FLAG(&self->ftm, channel);
-                    __HAL_FTM_DISABLE_CH_IT(&self->ftm, channel);
-                    printf("Unhandled interrupt Timer %d channel %u (now disabled)\n",
-                        tim_id, channel);
-                }
-            }
-        }
-    }
-}
-
-void ftm0_isr(void) {
-    ftm_irq_handler(0);
-}
-
-void ftm1_isr(void) {
-    ftm_irq_handler(1);
-}
-
-void ftm2_isr(void) {
-    ftm_irq_handler(2);
-}
diff --git a/ports/teensy/timer.h b/ports/teensy/timer.h
deleted file mode 100644
index 75c2e654e2..0000000000
--- a/ports/teensy/timer.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_TEENSY_TIMER_H
-#define MICROPY_INCLUDED_TEENSY_TIMER_H
-
-extern const mp_obj_type_t pyb_timer_type;
-
-void timer_init0(void);
-void timer_deinit(void);
-
-#endif // MICROPY_INCLUDED_TEENSY_TIMER_H
diff --git a/ports/teensy/uart.c b/ports/teensy/uart.c
deleted file mode 100644
index e71f676d0a..0000000000
--- a/ports/teensy/uart.c
+++ /dev/null
@@ -1,493 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include <stdio.h>
-#include <string.h>
-
-#include "py/runtime.h"
-#include "bufhelper.h"
-#include "uart.h"
-
-/// \moduleref pyb
-/// \class UART - duplex serial communication bus
-///
-/// UART implements the standard UART/USART duplex serial communications protocol.  At
-/// the physical level it consists of 2 lines: RX and TX.
-///
-/// See usage model of I2C.  UART is very similar.  Main difference is
-/// parameters to init the UART bus:
-///
-///     from pyb import UART
-///
-///     uart = UART(1, 9600)                         # init with given baudrate
-///     uart.init(9600, bits=8, stop=1, parity=None) # init with given parameters
-///
-/// Bits can be 8 or 9, stop can be 1 or 2, parity can be None, 0 (even), 1 (odd).
-///
-/// Extra method:
-///
-///     uart.any()               # returns True if any characters waiting
-
-struct _pyb_uart_obj_t {
-    mp_obj_base_t base;
-    pyb_uart_t uart_id;
-    bool is_enabled;
-//    UART_HandleTypeDef uart;
-};
-
-pyb_uart_obj_t *pyb_uart_global_debug = NULL;
-
-// assumes Init parameters have been set up correctly
-bool uart_init2(pyb_uart_obj_t *uart_obj) {
-    #if 0
-    USART_TypeDef *UARTx = NULL;
-
-    uint32_t GPIO_Pin = 0;
-    uint8_t GPIO_AF_UARTx = 0;
-    GPIO_TypeDef *GPIO_Port = NULL;
-
-    switch (uart_obj->uart_id) {
-        // USART1 is on PA9/PA10 (CK on PA8), PB6/PB7
-        case PYB_UART_1:
-            UARTx = USART1;
-            GPIO_AF_UARTx = GPIO_AF7_USART1;
-
-            #if defined(PYBV4) || defined(PYBV10)
-            GPIO_Port = GPIOB;
-            GPIO_Pin = GPIO_PIN_6 | GPIO_PIN_7;
-            #else
-            GPIO_Port = GPIOA;
-            GPIO_Pin = GPIO_PIN_9 | GPIO_PIN_10;
-            #endif
-
-            __USART1_CLK_ENABLE();
-            break;
-
-        // USART2 is on PA2/PA3 (CK on PA4), PD5/PD6 (CK on PD7)
-        case PYB_UART_2:
-            UARTx = USART2;
-            GPIO_AF_UARTx = GPIO_AF7_USART2;
-
-            GPIO_Port = GPIOA;
-            GPIO_Pin = GPIO_PIN_2 | GPIO_PIN_3;
-
-            __USART2_CLK_ENABLE();
-            break;
-
-        // USART3 is on PB10/PB11 (CK on PB12), PC10/PC11 (CK on PC12), PD8/PD9 (CK on PD10)
-        case PYB_UART_3:
-            UARTx = USART3;
-            GPIO_AF_UARTx = GPIO_AF7_USART3;
-
-            #if defined(PYBV3) || defined(PYBV4) | defined(PYBV10)
-            GPIO_Port = GPIOB;
-            GPIO_Pin = GPIO_PIN_10 | GPIO_PIN_11;
-            #else
-            GPIO_Port = GPIOD;
-            GPIO_Pin = GPIO_PIN_8 | GPIO_PIN_9;
-            #endif
-            __USART3_CLK_ENABLE();
-            break;
-
-        // UART4 is on PA0/PA1, PC10/PC11
-        case PYB_UART_4:
-            UARTx = UART4;
-            GPIO_AF_UARTx = GPIO_AF8_UART4;
-
-            GPIO_Port = GPIOA;
-            GPIO_Pin = GPIO_PIN_0 | GPIO_PIN_1;
-
-            __UART4_CLK_ENABLE();
-            break;
-
-        // USART6 is on PC6/PC7 (CK on PC8)
-        case PYB_UART_6:
-            UARTx = USART6;
-            GPIO_AF_UARTx = GPIO_AF8_USART6;
-
-            GPIO_Port = GPIOC;
-            GPIO_Pin = GPIO_PIN_6 | GPIO_PIN_7;
-
-            __USART6_CLK_ENABLE();
-            break;
-
-        default:
-            return false;
-    }
-
-    // init GPIO
-    GPIO_InitTypeDef GPIO_InitStructure;
-    GPIO_InitStructure.Pin = GPIO_Pin;
-    GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
-    GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStructure.Pull = GPIO_PULLUP;
-    GPIO_InitStructure.Alternate = GPIO_AF_UARTx;
-    HAL_GPIO_Init(GPIO_Port, &GPIO_InitStructure);
-
-    // init UARTx
-    uart_obj->uart.Instance = UARTx;
-    HAL_UART_Init(&uart_obj->uart);
-
-    uart_obj->is_enabled = true;
-    #endif
-    return true;
-}
-
-bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate) {
-    #if 0
-    UART_HandleTypeDef *uh = &uart_obj->uart;
-    memset(uh, 0, sizeof(*uh));
-    uh->Init.BaudRate = baudrate;
-    uh->Init.WordLength = UART_WORDLENGTH_8B;
-    uh->Init.StopBits = UART_STOPBITS_1;
-    uh->Init.Parity = UART_PARITY_NONE;
-    uh->Init.Mode = UART_MODE_TX_RX;
-    uh->Init.HwFlowCtl = UART_HWCONTROL_NONE;
-    uh->Init.OverSampling = UART_OVERSAMPLING_16;
-    #endif
-    return uart_init2(uart_obj);
-}
-
-mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj) {
-    #if 0
-    return __HAL_UART_GET_FLAG(&uart_obj->uart, UART_FLAG_RXNE);
-    #else
-    return 0;
-    #endif
-}
-
-int uart_rx_char(pyb_uart_obj_t *uart_obj) {
-    uint8_t ch;
-    #if 0
-    if (HAL_UART_Receive(&uart_obj->uart, &ch, 1, 0) != HAL_OK) {
-        ch = 0;
-    }
-    #else
-    ch = 'A';
-    #endif
-    return ch;
-}
-
-void uart_tx_char(pyb_uart_obj_t *uart_obj, int c) {
-    #if 0
-    uint8_t ch = c;
-    HAL_UART_Transmit(&uart_obj->uart, &ch, 1, 100000);
-    #endif
-}
-
-void uart_tx_str(pyb_uart_obj_t *uart_obj, const char *str) {
-    #if 0
-    HAL_UART_Transmit(&uart_obj->uart, (uint8_t *)str, strlen(str), 100000);
-    #endif
-}
-
-void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) {
-    #if 0
-    HAL_UART_Transmit(&uart_obj->uart, (uint8_t *)str, len, 100000);
-    #endif
-}
-
-void uart_tx_strn_cooked(pyb_uart_obj_t *uart_obj, const char *str, uint len) {
-    for (const char *top = str + len; str < top; str++) {
-        if (*str == '\n') {
-            uart_tx_char(uart_obj, '\r');
-        }
-        uart_tx_char(uart_obj, *str);
-    }
-}
-
-/******************************************************************************/
-/* MicroPython bindings                                                      */
-
-STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    pyb_uart_obj_t *self = self_in;
-    if (!self->is_enabled) {
-        mp_printf(print, "UART(%lu)", self->uart_id);
-    } else {
-        #if 0
-        mp_printf(print, "UART(%lu, baudrate=%u, bits=%u, stop=%u",
-            self->uart_id, self->uart.Init.BaudRate,
-            self->uart.Init.WordLength == UART_WORDLENGTH_8B ? 8 : 9,
-            self->uart.Init.StopBits == UART_STOPBITS_1 ? 1 : 2);
-        if (self->uart.Init.Parity == UART_PARITY_NONE) {
-            mp_print_str(print, ", parity=None)");
-        } else {
-            mp_printf(print, ", parity=%u)", self->uart.Init.Parity == UART_PARITY_EVEN ? 0 : 1);
-        }
-        #endif
-    }
-}
-
-/// \method init(baudrate, *, bits=8, stop=1, parity=None)
-///
-/// Initialise the SPI bus with the given parameters:
-///
-///   - `baudrate` is the clock rate.
-///   - `bits` is the number of bits per byte, 8 or 9.
-///   - `stop` is the number of stop bits, 1 or 2.
-///   - `parity` is the parity, `None`, 0 (even) or 1 (odd).
-STATIC const mp_arg_t pyb_uart_init_args[] = {
-    { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} },
-    { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_INT,  {.u_int = 8} },
-    { MP_QSTR_stop,     MP_ARG_KW_ONLY | MP_ARG_INT,  {.u_int = 1} },
-    { MP_QSTR_parity,   MP_ARG_KW_ONLY | MP_ARG_OBJ,  {.u_obj = mp_const_none} },
-};
-#define PYB_UART_INIT_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_init_args)
-
-STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, uint n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    // parse args
-    mp_arg_val_t vals[PYB_UART_INIT_NUM_ARGS];
-    mp_arg_parse_all(n_args, args, kw_args, PYB_UART_INIT_NUM_ARGS, pyb_uart_init_args, vals);
-    #if 0
-    // set the UART configuration values
-    memset(&self->uart, 0, sizeof(self->uart));
-    UART_InitTypeDef *init = &self->uart.Init;
-    init->BaudRate = vals[0].u_int;
-    init->WordLength = vals[1].u_int == 8 ? UART_WORDLENGTH_8B : UART_WORDLENGTH_9B;
-    switch (vals[2].u_int) {
-        case 1:
-            init->StopBits = UART_STOPBITS_1;
-            break;
-        default:
-            init->StopBits = UART_STOPBITS_2;
-            break;
-    }
-    if (vals[3].u_obj == mp_const_none) {
-        init->Parity = UART_PARITY_NONE;
-    } else {
-        mp_int_t parity = mp_obj_get_int(vals[3].u_obj);
-        init->Parity = (parity & 1) ? UART_PARITY_ODD : UART_PARITY_EVEN;
-    }
-    init->Mode = UART_MODE_TX_RX;
-    init->HwFlowCtl = UART_HWCONTROL_NONE;
-    init->OverSampling = UART_OVERSAMPLING_16;
-
-    // init UART (if it fails, it's because the port doesn't exist)
-    if (!uart_init2(self)) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("UART port %d does not exist"), self->uart_id);
-    }
-    #endif
-
-    return mp_const_none;
-}
-
-/// \classmethod \constructor(bus, ...)
-///
-/// Construct a UART object on the given bus.  `bus` can be 1-6, or 'XA', 'XB', 'YA', or 'YB'.
-/// With no additional parameters, the UART object is created but not
-/// initialised (it has the settings from the last initialisation of
-/// the bus, if any).  If extra arguments are given, the bus is initialised.
-/// See `init` for parameters of initialisation.
-///
-/// The physical pins of the UART buses are:
-///
-///   - `UART(4)` is on `XA`: `(TX, RX) = (X1, X2) = (PA0, PA1)`
-///   - `UART(1)` is on `XB`: `(TX, RX) = (X9, X10) = (PB6, PB7)`
-///   - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)`
-///   - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)`
-///   - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)`
-STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, uint n_args, uint n_kw, const mp_obj_t *args) {
-    // check arguments
-    mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
-
-    // create object
-    pyb_uart_obj_t *o = mp_obj_malloc(pyb_uart_obj_t, &pyb_uart_type);
-
-    // work out port
-    o->uart_id = 0;
-    #if 0
-    if (mp_obj_is_str(args[0])) {
-        const char *port = mp_obj_str_get_str(args[0]);
-        if (0) {
-        #if defined(PYBV10)
-        } else if (strcmp(port, "XA") == 0) {
-            o->uart_id = PYB_UART_XA;
-        } else if (strcmp(port, "XB") == 0) {
-            o->uart_id = PYB_UART_XB;
-        } else if (strcmp(port, "YA") == 0) {
-            o->uart_id = PYB_UART_YA;
-        } else if (strcmp(port, "YB") == 0) {
-            o->uart_id = PYB_UART_YB;
-        #endif
-        } else {
-            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("UART port %s does not exist"), port);
-        }
-    } else {
-        o->uart_id = mp_obj_get_int(args[0]);
-    }
-    #endif
-
-    if (n_args > 1 || n_kw > 0) {
-        // start the peripheral
-        mp_map_t kw_args;
-        mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-        pyb_uart_init_helper(o, n_args - 1, args + 1, &kw_args);
-    }
-
-    return o;
-}
-
-STATIC mp_obj_t pyb_uart_init(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    return pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init);
-
-/// \method deinit()
-/// Turn off the UART bus.
-STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) {
-    // pyb_uart_obj_t *self = self_in;
-    // TODO
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit);
-
-/// \method any()
-/// Return `True` if any characters waiting, else `False`.
-STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) {
-    pyb_uart_obj_t *self = self_in;
-    if (uart_rx_any(self)) {
-        return mp_const_true;
-    } else {
-        return mp_const_false;
-    }
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any);
-
-/// \method send(send, *, timeout=5000)
-/// Send data on the bus:
-///
-///   - `send` is the data to send (an integer to send, or a buffer object).
-///   - `timeout` is the timeout in milliseconds to wait for the send.
-///
-/// Return value: `None`.
-STATIC const mp_arg_t pyb_uart_send_args[] = {
-    { MP_QSTR_send,    MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
-    { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
-};
-#define PYB_UART_SEND_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_send_args)
-
-STATIC mp_obj_t pyb_uart_send(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    // TODO assumes transmission size is 8-bits wide
-
-    pyb_uart_obj_t *self = args[0];
-
-    // parse args
-    mp_arg_val_t vals[PYB_UART_SEND_NUM_ARGS];
-    mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_UART_SEND_NUM_ARGS, pyb_uart_send_args, vals);
-
-    #if 0
-    // get the buffer to send from
-    mp_buffer_info_t bufinfo;
-    uint8_t data[1];
-    pyb_buf_get_for_send(vals[0].u_obj, &bufinfo, data);
-
-    // send the data
-    HAL_StatusTypeDef status = HAL_UART_Transmit(&self->uart, bufinfo.buf, bufinfo.len, vals[1].u_int);
-
-    if (status != HAL_OK) {
-        // TODO really need a HardwareError object, or something
-        mp_raise_msg_varg(&mp_type_Exception, MP_ERROR_TEXT("HAL_UART_Transmit failed with code %d"), status);
-    }
-    #else
-    (void)self;
-    #endif
-
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_send_obj, 1, pyb_uart_send);
-
-/// \method recv(recv, *, timeout=5000)
-///
-/// Receive data on the bus:
-///
-///   - `recv` can be an integer, which is the number of bytes to receive,
-///     or a mutable buffer, which will be filled with received bytes.
-///   - `timeout` is the timeout in milliseconds to wait for the receive.
-///
-/// Return value: if `recv` is an integer then a new buffer of the bytes received,
-/// otherwise the same buffer that was passed in to `recv`.
-#if 0
-STATIC const mp_arg_t pyb_uart_recv_args[] = {
-    { MP_QSTR_recv,    MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
-    { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
-};
-#define PYB_UART_RECV_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_recv_args)
-#endif
-
-STATIC mp_obj_t pyb_uart_recv(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    // TODO assumes transmission size is 8-bits wide
-
-    pyb_uart_obj_t *self = args[0];
-
-    #if 0
-    // parse args
-    mp_arg_val_t vals[PYB_UART_RECV_NUM_ARGS];
-    mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_UART_RECV_NUM_ARGS, pyb_uart_recv_args, vals);
-
-    // get the buffer to receive into
-    mp_buffer_info_t bufinfo;
-    mp_obj_t o_ret = pyb_buf_get_for_recv(vals[0].u_obj, &bufinfo);
-
-    // receive the data
-    HAL_StatusTypeDef status = HAL_UART_Receive(&self->uart, bufinfo.buf, bufinfo.len, vals[1].u_int);
-
-    if (status != HAL_OK) {
-        // TODO really need a HardwareError object, or something
-        mp_raise_msg_varg(&mp_type_Exception, MP_ERROR_TEXT("HAL_UART_Receive failed with code %d"), status);
-    }
-
-    // return the received data
-    if (o_ret == MP_OBJ_NULL) {
-        return vals[0].u_obj;
-    } else {
-        return mp_obj_str_builder_end(o_ret);
-    }
-    #else
-    (void)self;
-    return mp_const_none;
-    #endif
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_recv_obj, 1, pyb_uart_recv);
-
-STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = {
-    // instance methods
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) },
-    { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_uart_send_obj) },
-    { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_uart_recv_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    pyb_uart_type,
-    MP_QSTR_UART,
-    MP_TYPE_FLAG_NONE,
-    make_new, pyb_uart_make_new,
-    print, pyb_uart_print,
-    locals_dict, &pyb_uart_locals_dict
-    );
diff --git a/ports/teensy/uart.h b/ports/teensy/uart.h
deleted file mode 100644
index fd9b26f951..0000000000
--- a/ports/teensy/uart.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef MICROPY_INCLUDED_TEENSY_UART_H
-#define MICROPY_INCLUDED_TEENSY_UART_H
-
-typedef enum {
-    PYB_UART_NONE = 0,
-} pyb_uart_t;
-
-typedef struct _pyb_uart_obj_t pyb_uart_obj_t;
-
-extern const mp_obj_type_t pyb_uart_type;
-
-mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj);
-int uart_rx_char(pyb_uart_obj_t *uart_obj);
-void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len);
-
-#endif // MICROPY_INCLUDED_TEENSY_UART_H
diff --git a/ports/teensy/usb.c b/ports/teensy/usb.c
deleted file mode 100644
index a906f91288..0000000000
--- a/ports/teensy/usb.c
+++ /dev/null
@@ -1,46 +0,0 @@
-#include <string.h>
-
-#include "py/runtime.h"
-
-#include "Arduino.h"
-
-#include "usb.h"
-#include "usb_serial.h"
-
-bool usb_vcp_is_connected(void) {
-    return usb_configuration && (usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS));
-}
-
-bool usb_vcp_is_enabled(void) {
-    return true;
-}
-
-int usb_vcp_rx_num(void) {
-    return usb_serial_available();
-}
-
-int usb_vcp_recv_byte(uint8_t *ptr) {
-    int ch = usb_serial_getchar();
-    if (ch < 0) {
-        return 0;
-    }
-    *ptr = ch;
-    return 1;
-}
-
-void usb_vcp_send_str(const char *str) {
-    usb_vcp_send_strn(str, strlen(str));
-}
-
-void usb_vcp_send_strn(const char *str, int len) {
-    usb_serial_write(str, len);
-}
-
-void usb_vcp_send_strn_cooked(const char *str, int len) {
-    for (const char *top = str + len; str < top; str++) {
-        if (*str == '\n') {
-            usb_serial_putchar('\r');
-        }
-        usb_serial_putchar(*str);
-    }
-}
diff --git a/ports/teensy/usb.h b/ports/teensy/usb.h
deleted file mode 100644
index 7ca0eacb9b..0000000000
--- a/ports/teensy/usb.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef MICROPY_INCLUDED_TEENSY_USB_H
-#define MICROPY_INCLUDED_TEENSY_USB_H
-
-bool usb_vcp_is_connected(void);
-bool usb_vcp_is_enabled(void);
-int usb_vcp_rx_num(void);
-int usb_vcp_recv_byte(uint8_t *ptr);
-void usb_vcp_send_str(const char *str);
-void usb_vcp_send_strn(const char *str, int len);
-void usb_vcp_send_strn_cooked(const char *str, int len);
-
-#endif // MICROPY_INCLUDED_TEENSY_USB_H
diff --git a/tools/ci.sh b/tools/ci.sh
index a4cbb045a4..53e3425699 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -356,19 +356,6 @@ function ci_stm32_nucleo_build {
     diff $BUILD_WB55/firmware.unpack.dfu $BUILD_WB55/firmware.unpack_no_sk.dfu
 }
 
-########################################################################################
-# ports/teensy
-
-function ci_teensy_setup {
-    ci_gcc_arm_setup
-}
-
-function ci_teensy_build {
-    make ${MAKEOPTS} -C mpy-cross
-    make ${MAKEOPTS} -C ports/teensy submodules
-    make ${MAKEOPTS} -C ports/teensy
-}
-
 ########################################################################################
 # ports/unix
 
diff --git a/tools/codeformat.py b/tools/codeformat.py
index 761bde3a81..aee9894345 100755
--- a/tools/codeformat.py
+++ b/tools/codeformat.py
@@ -76,8 +76,6 @@ EXCLUSIONS = [
     # STM32 USB dev/host code is mostly 3rd party.
     "ports/stm32/usbdev/**/*.[ch]",
     "ports/stm32/usbhost/**/*.[ch]",
-    # Teensy core code is 3rd party.
-    "ports/teensy/core/*.[ch]",
     # STM32 build includes generated Python code.
     "ports/*/build*",
     # not real python files

From a614c1d5016e5448c3e1c36caea4667c985eb7f0 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 31 Oct 2023 13:31:54 +1100
Subject: [PATCH 082/310] extmod: Remove empty utime_mphal.h file.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/utime_mphal.h | 1 -
 1 file changed, 1 deletion(-)
 delete mode 100644 extmod/utime_mphal.h

diff --git a/extmod/utime_mphal.h b/extmod/utime_mphal.h
deleted file mode 100644
index 8b13789179..0000000000
--- a/extmod/utime_mphal.h
+++ /dev/null
@@ -1 +0,0 @@
-

From 4cffa848f60b4d403a8edb4c87a6cd12e6d89993 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 1 Nov 2023 10:38:52 +1100
Subject: [PATCH 083/310] esp32/boards: Reduce size of D2WD and OTA firmware.

Commit c4e63ace661df9748cfae451bde7781e61e0b3d9 enabled the SPI Ethernet
driver and that cost about 13k of firwmare size, pushing the firmware over
the limit of the D2WD and OTA board variants available size.

To fix, disable SPI Ethernet on the D2WD variant, and build the OTA variant
with size optimisation rather than performance optimisation.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd | 3 +++
 ports/esp32/boards/ESP32_GENERIC/sdkconfig.ota  | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd b/ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd
index 7b4313b7de..f6e07893e9 100644
--- a/ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd
+++ b/ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd
@@ -3,6 +3,9 @@ CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_PERF=n
 CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
 
+# Disable SPI Ethernet driver to reduce firmware size.
+CONFIG_ETH_USE_SPI_ETHERNET=n
+
 CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
 CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
 CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y
diff --git a/ports/esp32/boards/ESP32_GENERIC/sdkconfig.ota b/ports/esp32/boards/ESP32_GENERIC/sdkconfig.ota
index e3a1f81fd3..352dd96f23 100644
--- a/ports/esp32/boards/ESP32_GENERIC/sdkconfig.ota
+++ b/ports/esp32/boards/ESP32_GENERIC/sdkconfig.ota
@@ -2,4 +2,6 @@ CONFIG_PARTITION_TABLE_CUSTOM=y
 CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-4MiB-ota.csv"
 
 # Reduce firmware size to fit in the OTA partition.
+CONFIG_COMPILER_OPTIMIZATION_SIZE=y
+CONFIG_COMPILER_OPTIMIZATION_PERF=n
 CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y

From 95ce61d0ad05af7b5ce258f1faa01a259dd1275a Mon Sep 17 00:00:00 2001
From: Alessandro Gatti <a.gatti@frob.it>
Date: Tue, 31 Oct 2023 13:28:25 +0100
Subject: [PATCH 084/310] esp32: Use better build settings for ESP32-C3.

ESP32-C3 is not Xtensa-based, so build settings are now tailored a bit
better following that fact.  ESP-IDF 5.x already adds architecture-specific
modules by itself so there is no need to specify either the `xtensa` or the
`riscv` module in the build settings.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
---
 ports/esp32/esp32_common.cmake          | 3 ++-
 ports/esp32/main_esp32c3/CMakeLists.txt | 1 -
 py/mkrules.cmake                        | 8 +++++++-
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index 8b3dac532a..f66c59e341 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -134,7 +134,6 @@ list(APPEND IDF_COMPONENTS
     spi_flash
     ulp
     vfs
-    xtensa
 )
 
 # Register the main IDF component.
@@ -161,7 +160,9 @@ idf_component_register(
 set(MICROPY_TARGET ${COMPONENT_TARGET})
 
 # Define mpy-cross flags, for use with frozen code.
+if(NOT IDF_TARGET STREQUAL "esp32c3")
 set(MICROPY_CROSS_FLAGS -march=xtensawin)
+endif()
 
 # Set compile options for this port.
 target_compile_definitions(${MICROPY_TARGET} PUBLIC
diff --git a/ports/esp32/main_esp32c3/CMakeLists.txt b/ports/esp32/main_esp32c3/CMakeLists.txt
index 307c0f3218..c9f1e5bcb4 100644
--- a/ports/esp32/main_esp32c3/CMakeLists.txt
+++ b/ports/esp32/main_esp32c3/CMakeLists.txt
@@ -9,6 +9,5 @@ if(NOT MICROPY_PORT_DIR)
 endif()
 
 list(APPEND MICROPY_SOURCE_LIB ${MICROPY_DIR}/shared/runtime/gchelper_generic.c)
-list(APPEND IDF_COMPONENTS riscv)
 
 include(${MICROPY_PORT_DIR}/esp32_common.cmake)
diff --git a/py/mkrules.cmake b/py/mkrules.cmake
index 6415b549aa..7622cd903a 100644
--- a/py/mkrules.cmake
+++ b/py/mkrules.cmake
@@ -212,10 +212,16 @@ if(MICROPY_FROZEN_MANIFEST)
         )
     endif()
 
+    if(NOT MICROPY_CROSS_FLAGS)
+        set(MICROPY_CROSS_FLAGS "")
+    else()
+        set(MICROPY_CROSS_FLAGS "-f${MICROPY_CROSS_FLAGS}")
+    endif()
+
     add_custom_target(
         BUILD_FROZEN_CONTENT ALL
         BYPRODUCTS ${MICROPY_FROZEN_CONTENT}
-        COMMAND ${Python3_EXECUTABLE} ${MICROPY_DIR}/tools/makemanifest.py -o ${MICROPY_FROZEN_CONTENT} -v "MPY_DIR=${MICROPY_DIR}" -v "MPY_LIB_DIR=${MICROPY_LIB_DIR}" -v "PORT_DIR=${MICROPY_PORT_DIR}" -v "BOARD_DIR=${MICROPY_BOARD_DIR}" -b "${CMAKE_BINARY_DIR}" -f${MICROPY_CROSS_FLAGS} --mpy-tool-flags=${MICROPY_MPY_TOOL_FLAGS} ${MICROPY_FROZEN_MANIFEST}
+        COMMAND ${Python3_EXECUTABLE} ${MICROPY_DIR}/tools/makemanifest.py -o ${MICROPY_FROZEN_CONTENT} -v "MPY_DIR=${MICROPY_DIR}" -v "MPY_LIB_DIR=${MICROPY_LIB_DIR}" -v "PORT_DIR=${MICROPY_PORT_DIR}" -v "BOARD_DIR=${MICROPY_BOARD_DIR}" -b "${CMAKE_BINARY_DIR}" ${MICROPY_CROSS_FLAGS} --mpy-tool-flags=${MICROPY_MPY_TOOL_FLAGS} ${MICROPY_FROZEN_MANIFEST}
         DEPENDS
             ${MICROPY_QSTRDEFS_GENERATED}
             ${MICROPY_ROOT_POINTERS}

From d8a263435fc9e043dda9ba2f903c9348559f6582 Mon Sep 17 00:00:00 2001
From: Andrew Leech <andrew.leech@planetinnovation.com.au>
Date: Wed, 1 Nov 2023 15:26:16 +1100
Subject: [PATCH 085/310] esp32/mphalport: Add function to wake main from
 separate FreeRTOS task.

Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
---
 ports/esp32/mphalport.c | 7 ++++++-
 ports/esp32/mphalport.h | 1 +
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/ports/esp32/mphalport.c b/ports/esp32/mphalport.c
index 79ddcd4827..8e14bda595 100644
--- a/ports/esp32/mphalport.c
+++ b/ports/esp32/mphalport.c
@@ -214,7 +214,12 @@ uint64_t mp_hal_time_ns(void) {
     return ns;
 }
 
-// Wake up the main task if it is sleeping
+// Wake up the main task if it is sleeping.
+void mp_hal_wake_main_task(void) {
+    xTaskNotifyGive(mp_main_task_handle);
+}
+
+// Wake up the main task if it is sleeping, to be called from an ISR.
 void mp_hal_wake_main_task_from_isr(void) {
     BaseType_t xHigherPriorityTaskWoken = pdFALSE;
     vTaskNotifyGiveFromISR(mp_main_task_handle, &xHigherPriorityTaskWoken);
diff --git a/ports/esp32/mphalport.h b/ports/esp32/mphalport.h
index 5e54c24bfe..d77e2dd0df 100644
--- a/ports/esp32/mphalport.h
+++ b/ports/esp32/mphalport.h
@@ -83,6 +83,7 @@ uint32_t mp_hal_get_cpu_freq(void);
 #define mp_hal_quiet_timing_exit(irq_state) MICROPY_END_ATOMIC_SECTION(irq_state)
 
 // Wake up the main task if it is sleeping
+void mp_hal_wake_main_task(void);
 void mp_hal_wake_main_task_from_isr(void);
 
 // C-level pin HAL

From 06a7bf967c58644a0d341764994bdcc9253b4527 Mon Sep 17 00:00:00 2001
From: Andrew Leech <andrew.leech@planetinnovation.com.au>
Date: Wed, 1 Nov 2023 11:06:10 +1100
Subject: [PATCH 086/310] esp32/usb: Wake main thread when USB receives data.

This improves (decreases) the latency on stdin, on SoCs with built-in USB
and using TinyUSB, like S2 and S3.

Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
---
 ports/esp32/usb.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/ports/esp32/usb.c b/ports/esp32/usb.c
index 2e417755c9..316482e189 100644
--- a/ports/esp32/usb.c
+++ b/ports/esp32/usb.c
@@ -40,8 +40,10 @@
 
 static uint8_t usb_rx_buf[CONFIG_TINYUSB_CDC_RX_BUFSIZE];
 
+// This is called from FreeRTOS task "tusb_tsk" in espressif__esp_tinyusb (not an ISR).
 static void usb_callback_rx(int itf, cdcacm_event_t *event) {
-    // TODO: what happens if more chars come in during this function, are they lost?
+    // espressif__esp_tinyusb places tinyusb rx data onto freertos ringbuffer which
+    // this function forwards onto our stdin_ringbuf.
     for (;;) {
         size_t len = 0;
         esp_err_t ret = tinyusb_cdcacm_read(itf, usb_rx_buf, sizeof(usb_rx_buf), &len);
@@ -58,6 +60,7 @@ static void usb_callback_rx(int itf, cdcacm_event_t *event) {
                 ringbuf_put(&stdin_ringbuf, usb_rx_buf[i]);
             }
         }
+        mp_hal_wake_main_task();
     }
 }
 

From 7ad84e0422a521fe97ce5d742df280c6b8a3ff87 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Thu, 29 Jun 2023 14:17:56 +0200
Subject: [PATCH 087/310] lib/littlefs: Update LittleFS to v2.8.1.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 extmod/extmod.mk         |    2 +-
 lib/littlefs/lfs2.c      | 1011 ++++++++++++++++++++++++++++----------
 lib/littlefs/lfs2.h      |   82 +++-
 lib/littlefs/lfs2_util.h |   10 +-
 4 files changed, 844 insertions(+), 261 deletions(-)

diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index 8a48a42936..c4b2c3d9c5 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -106,7 +106,7 @@ SRC_THIRDPARTY_C += $(addprefix $(LITTLEFS_DIR)/,\
 	lfs2_util.c \
 	)
 
-$(BUILD)/$(LITTLEFS_DIR)/lfs2.o: CFLAGS += -Wno-missing-field-initializers
+$(BUILD)/$(LITTLEFS_DIR)/lfs2.o: CFLAGS += -Wno-shadow
 endif
 
 ################################################################################
diff --git a/lib/littlefs/lfs2.c b/lib/littlefs/lfs2.c
index a9fcffafd8..d89c42fd59 100644
--- a/lib/littlefs/lfs2.c
+++ b/lib/littlefs/lfs2.c
@@ -46,8 +46,8 @@ static int lfs2_bd_read(lfs2_t *lfs2,
         lfs2_block_t block, lfs2_off_t off,
         void *buffer, lfs2_size_t size) {
     uint8_t *data = buffer;
-    if (block >= lfs2->cfg->block_count ||
-            off+size > lfs2->cfg->block_size) {
+    if (off+size > lfs2->cfg->block_size
+            || (lfs2->block_count && block >= lfs2->block_count)) {
         return LFS2_ERR_CORRUPT;
     }
 
@@ -104,7 +104,7 @@ static int lfs2_bd_read(lfs2_t *lfs2,
         }
 
         // load to cache, first condition can no longer fail
-        LFS2_ASSERT(block < lfs2->cfg->block_count);
+        LFS2_ASSERT(!lfs2->block_count || block < lfs2->block_count);
         rcache->block = block;
         rcache->off = lfs2_aligndown(off, lfs2->cfg->read_size);
         rcache->size = lfs2_min(
@@ -135,14 +135,14 @@ static int lfs2_bd_cmp(lfs2_t *lfs2,
         uint8_t dat[8];
 
         diff = lfs2_min(size-i, sizeof(dat));
-        int res = lfs2_bd_read(lfs2,
+        int err = lfs2_bd_read(lfs2,
                 pcache, rcache, hint-i,
                 block, off+i, &dat, diff);
-        if (res) {
-            return res;
+        if (err) {
+            return err;
         }
 
-        res = memcmp(dat, data + i, diff);
+        int res = memcmp(dat, data + i, diff);
         if (res) {
             return res < 0 ? LFS2_CMP_LT : LFS2_CMP_GT;
         }
@@ -151,11 +151,32 @@ static int lfs2_bd_cmp(lfs2_t *lfs2,
     return LFS2_CMP_EQ;
 }
 
+static int lfs2_bd_crc(lfs2_t *lfs2,
+        const lfs2_cache_t *pcache, lfs2_cache_t *rcache, lfs2_size_t hint,
+        lfs2_block_t block, lfs2_off_t off, lfs2_size_t size, uint32_t *crc) {
+    lfs2_size_t diff = 0;
+
+    for (lfs2_off_t i = 0; i < size; i += diff) {
+        uint8_t dat[8];
+        diff = lfs2_min(size-i, sizeof(dat));
+        int err = lfs2_bd_read(lfs2,
+                pcache, rcache, hint-i,
+                block, off+i, &dat, diff);
+        if (err) {
+            return err;
+        }
+
+        *crc = lfs2_crc(*crc, &dat, diff);
+    }
+
+    return 0;
+}
+
 #ifndef LFS2_READONLY
 static int lfs2_bd_flush(lfs2_t *lfs2,
         lfs2_cache_t *pcache, lfs2_cache_t *rcache, bool validate) {
     if (pcache->block != LFS2_BLOCK_NULL && pcache->block != LFS2_BLOCK_INLINE) {
-        LFS2_ASSERT(pcache->block < lfs2->cfg->block_count);
+        LFS2_ASSERT(pcache->block < lfs2->block_count);
         lfs2_size_t diff = lfs2_alignup(pcache->size, lfs2->cfg->prog_size);
         int err = lfs2->cfg->prog(lfs2->cfg, pcache->block,
                 pcache->off, pcache->buffer, diff);
@@ -208,7 +229,7 @@ static int lfs2_bd_prog(lfs2_t *lfs2,
         lfs2_block_t block, lfs2_off_t off,
         const void *buffer, lfs2_size_t size) {
     const uint8_t *data = buffer;
-    LFS2_ASSERT(block == LFS2_BLOCK_INLINE || block < lfs2->cfg->block_count);
+    LFS2_ASSERT(block == LFS2_BLOCK_INLINE || block < lfs2->block_count);
     LFS2_ASSERT(off + size <= lfs2->cfg->block_size);
 
     while (size > 0) {
@@ -252,7 +273,7 @@ static int lfs2_bd_prog(lfs2_t *lfs2,
 
 #ifndef LFS2_READONLY
 static int lfs2_bd_erase(lfs2_t *lfs2, lfs2_block_t block) {
-    LFS2_ASSERT(block < lfs2->cfg->block_count);
+    LFS2_ASSERT(block < lfs2->block_count);
     int err = lfs2->cfg->erase(lfs2->cfg, block);
     LFS2_ASSERT(err <= 0);
     return err;
@@ -279,14 +300,12 @@ static inline int lfs2_pair_cmp(
              paira[0] == pairb[1] || paira[1] == pairb[0]);
 }
 
-#ifndef LFS2_READONLY
-static inline bool lfs2_pair_sync(
+static inline bool lfs2_pair_issync(
         const lfs2_block_t paira[2],
         const lfs2_block_t pairb[2]) {
     return (paira[0] == pairb[0] && paira[1] == pairb[1]) ||
            (paira[0] == pairb[1] && paira[1] == pairb[0]);
 }
-#endif
 
 static inline void lfs2_pair_fromle32(lfs2_block_t pair[2]) {
     pair[0] = lfs2_fromle32(pair[0]);
@@ -325,6 +344,10 @@ static inline uint16_t lfs2_tag_type1(lfs2_tag_t tag) {
     return (tag & 0x70000000) >> 20;
 }
 
+static inline uint16_t lfs2_tag_type2(lfs2_tag_t tag) {
+    return (tag & 0x78000000) >> 20;
+}
+
 static inline uint16_t lfs2_tag_type3(lfs2_tag_t tag) {
     return (tag & 0x7ff00000) >> 20;
 }
@@ -386,7 +409,7 @@ static inline bool lfs2_gstate_hasorphans(const lfs2_gstate_t *a) {
 }
 
 static inline uint8_t lfs2_gstate_getorphans(const lfs2_gstate_t *a) {
-    return lfs2_tag_size(a->tag);
+    return lfs2_tag_size(a->tag) & 0x1ff;
 }
 
 static inline bool lfs2_gstate_hasmove(const lfs2_gstate_t *a) {
@@ -394,6 +417,10 @@ static inline bool lfs2_gstate_hasmove(const lfs2_gstate_t *a) {
 }
 #endif
 
+static inline bool lfs2_gstate_needssuperblock(const lfs2_gstate_t *a) {
+    return lfs2_tag_size(a->tag) >> 9;
+}
+
 static inline bool lfs2_gstate_hasmovehere(const lfs2_gstate_t *a,
         const lfs2_block_t *pair) {
     return lfs2_tag_type1(a->tag) && lfs2_pair_cmp(a->pair, pair) == 0;
@@ -413,6 +440,24 @@ static inline void lfs2_gstate_tole32(lfs2_gstate_t *a) {
 }
 #endif
 
+// operations on forward-CRCs used to track erased state
+struct lfs2_fcrc {
+    lfs2_size_t size;
+    uint32_t crc;
+};
+
+static void lfs2_fcrc_fromle32(struct lfs2_fcrc *fcrc) {
+    fcrc->size = lfs2_fromle32(fcrc->size);
+    fcrc->crc = lfs2_fromle32(fcrc->crc);
+}
+
+#ifndef LFS2_READONLY
+static void lfs2_fcrc_tole32(struct lfs2_fcrc *fcrc) {
+    fcrc->size = lfs2_tole32(fcrc->size);
+    fcrc->crc = lfs2_tole32(fcrc->crc);
+}
+#endif
+
 // other endianness operations
 static void lfs2_ctz_fromle32(struct lfs2_ctz *ctz) {
     ctz->head = lfs2_fromle32(ctz->head);
@@ -473,6 +518,28 @@ static void lfs2_mlist_append(lfs2_t *lfs2, struct lfs2_mlist *mlist) {
     lfs2->mlist = mlist;
 }
 
+// some other filesystem operations
+static uint32_t lfs2_fs_disk_version(lfs2_t *lfs2) {
+    (void)lfs2;
+#ifdef LFS2_MULTIVERSION
+    if (lfs2->cfg->disk_version) {
+        return lfs2->cfg->disk_version;
+    } else
+#endif
+    {
+        return LFS2_DISK_VERSION;
+    }
+}
+
+static uint16_t lfs2_fs_disk_version_major(lfs2_t *lfs2) {
+    return 0xffff & (lfs2_fs_disk_version(lfs2) >> 16);
+
+}
+
+static uint16_t lfs2_fs_disk_version_minor(lfs2_t *lfs2) {
+    return 0xffff & (lfs2_fs_disk_version(lfs2) >> 0);
+}
+
 
 /// Internal operations predeclared here ///
 #ifndef LFS2_READONLY
@@ -500,6 +567,8 @@ static lfs2_stag_t lfs2_fs_parent(lfs2_t *lfs2, const lfs2_block_t dir[2],
 static int lfs2_fs_forceconsistency(lfs2_t *lfs2);
 #endif
 
+static void lfs2_fs_prepsuperblock(lfs2_t *lfs2, bool needssuperblock);
+
 #ifdef LFS2_MIGRATE
 static int lfs21_traverse(lfs2_t *lfs2,
         int (*cb)(void*, lfs2_block_t), void *data);
@@ -528,7 +597,7 @@ static int lfs2_rawunmount(lfs2_t *lfs2);
 static int lfs2_alloc_lookahead(void *p, lfs2_block_t block) {
     lfs2_t *lfs2 = (lfs2_t*)p;
     lfs2_block_t off = ((block - lfs2->free.off)
-            + lfs2->cfg->block_count) % lfs2->cfg->block_count;
+            + lfs2->block_count) % lfs2->block_count;
 
     if (off < lfs2->free.size) {
         lfs2->free.buffer[off / 32] |= 1U << (off % 32);
@@ -542,7 +611,7 @@ static int lfs2_alloc_lookahead(void *p, lfs2_block_t block) {
 // is to prevent blocks from being garbage collected in the middle of a
 // commit operation
 static void lfs2_alloc_ack(lfs2_t *lfs2) {
-    lfs2->free.ack = lfs2->cfg->block_count;
+    lfs2->free.ack = lfs2->block_count;
 }
 
 // drop the lookahead buffer, this is done during mounting and failed
@@ -553,6 +622,26 @@ static void lfs2_alloc_drop(lfs2_t *lfs2) {
     lfs2_alloc_ack(lfs2);
 }
 
+#ifndef LFS2_READONLY
+static int lfs2_fs_rawgc(lfs2_t *lfs2) {
+    // Move free offset at the first unused block (lfs2->free.i)
+    // lfs2->free.i is equal lfs2->free.size when all blocks are used
+    lfs2->free.off = (lfs2->free.off + lfs2->free.i) % lfs2->block_count;
+    lfs2->free.size = lfs2_min(8*lfs2->cfg->lookahead_size, lfs2->free.ack);
+    lfs2->free.i = 0;
+
+    // find mask of free blocks from tree
+    memset(lfs2->free.buffer, 0, lfs2->cfg->lookahead_size);
+    int err = lfs2_fs_rawtraverse(lfs2, lfs2_alloc_lookahead, lfs2, true);
+    if (err) {
+        lfs2_alloc_drop(lfs2);
+        return err;
+    }
+
+    return 0;
+}
+#endif
+
 #ifndef LFS2_READONLY
 static int lfs2_alloc(lfs2_t *lfs2, lfs2_block_t *block) {
     while (true) {
@@ -563,7 +652,7 @@ static int lfs2_alloc(lfs2_t *lfs2, lfs2_block_t *block) {
 
             if (!(lfs2->free.buffer[off / 32] & (1U << (off % 32)))) {
                 // found a free block
-                *block = (lfs2->free.off + off) % lfs2->cfg->block_count;
+                *block = (lfs2->free.off + off) % lfs2->block_count;
 
                 // eagerly find next off so an alloc ack can
                 // discredit old lookahead blocks
@@ -585,16 +674,8 @@ static int lfs2_alloc(lfs2_t *lfs2, lfs2_block_t *block) {
             return LFS2_ERR_NOSPC;
         }
 
-        lfs2->free.off = (lfs2->free.off + lfs2->free.size)
-                % lfs2->cfg->block_count;
-        lfs2->free.size = lfs2_min(8*lfs2->cfg->lookahead_size, lfs2->free.ack);
-        lfs2->free.i = 0;
-
-        // find mask of free blocks from tree
-        memset(lfs2->free.buffer, 0, lfs2->cfg->lookahead_size);
-        int err = lfs2_fs_rawtraverse(lfs2, lfs2_alloc_lookahead, lfs2, true);
-        if (err) {
-            lfs2_alloc_drop(lfs2);
+        int err = lfs2_fs_rawgc(lfs2);
+        if(err) {
             return err;
         }
     }
@@ -808,7 +889,7 @@ static int lfs2_dir_traverse(lfs2_t *lfs2,
     // iterate over directory and attrs
     lfs2_tag_t tag;
     const void *buffer;
-    struct lfs2_diskoff disk;
+    struct lfs2_diskoff disk = {0};
     while (true) {
         {
             if (off+lfs2_tag_dsize(ptag) < dir->off) {
@@ -998,7 +1079,8 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
 
     // if either block address is invalid we return LFS2_ERR_CORRUPT here,
     // otherwise later writes to the pair could fail
-    if (pair[0] >= lfs2->cfg->block_count || pair[1] >= lfs2->cfg->block_count) {
+    if (lfs2->block_count 
+            && (pair[0] >= lfs2->block_count || pair[1] >= lfs2->block_count)) {
         return LFS2_ERR_CORRUPT;
     }
 
@@ -1035,6 +1117,11 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
         bool tempsplit = false;
         lfs2_stag_t tempbesttag = besttag;
 
+        // assume not erased until proven otherwise
+        bool maybeerased = false;
+        bool hasfcrc = false;
+        struct lfs2_fcrc fcrc;
+
         dir->rev = lfs2_tole32(dir->rev);
         uint32_t crc = lfs2_crc(0xffffffff, &dir->rev, sizeof(dir->rev));
         dir->rev = lfs2_fromle32(dir->rev);
@@ -1049,7 +1136,6 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
             if (err) {
                 if (err == LFS2_ERR_CORRUPT) {
                     // can't continue?
-                    dir->erased = false;
                     break;
                 }
                 return err;
@@ -1058,19 +1144,19 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
             crc = lfs2_crc(crc, &tag, sizeof(tag));
             tag = lfs2_frombe32(tag) ^ ptag;
 
-            // next commit not yet programmed or we're not in valid range
+            // next commit not yet programmed?
             if (!lfs2_tag_isvalid(tag)) {
-                dir->erased = (lfs2_tag_type1(ptag) == LFS2_TYPE_CRC &&
-                        dir->off % lfs2->cfg->prog_size == 0);
+                // we only might be erased if the last tag was a crc
+                maybeerased = (lfs2_tag_type2(ptag) == LFS2_TYPE_CCRC);
                 break;
+            // out of range?
             } else if (off + lfs2_tag_dsize(tag) > lfs2->cfg->block_size) {
-                dir->erased = false;
                 break;
             }
 
             ptag = tag;
 
-            if (lfs2_tag_type1(tag) == LFS2_TYPE_CRC) {
+            if (lfs2_tag_type2(tag) == LFS2_TYPE_CCRC) {
                 // check the crc attr
                 uint32_t dcrc;
                 err = lfs2_bd_read(lfs2,
@@ -1078,7 +1164,6 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
                         dir->pair[0], off+sizeof(tag), &dcrc, sizeof(dcrc));
                 if (err) {
                     if (err == LFS2_ERR_CORRUPT) {
-                        dir->erased = false;
                         break;
                     }
                     return err;
@@ -1086,7 +1171,6 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
                 dcrc = lfs2_fromle32(dcrc);
 
                 if (crc != dcrc) {
-                    dir->erased = false;
                     break;
                 }
 
@@ -1108,26 +1192,21 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
                 dir->tail[1] = temptail[1];
                 dir->split = tempsplit;
 
-                // reset crc
+                // reset crc, hasfcrc
                 crc = 0xffffffff;
                 continue;
             }
 
             // crc the entry first, hopefully leaving it in the cache
-            for (lfs2_off_t j = sizeof(tag); j < lfs2_tag_dsize(tag); j++) {
-                uint8_t dat;
-                err = lfs2_bd_read(lfs2,
-                        NULL, &lfs2->rcache, lfs2->cfg->block_size,
-                        dir->pair[0], off+j, &dat, 1);
-                if (err) {
-                    if (err == LFS2_ERR_CORRUPT) {
-                        dir->erased = false;
-                        break;
-                    }
-                    return err;
+            err = lfs2_bd_crc(lfs2,
+                    NULL, &lfs2->rcache, lfs2->cfg->block_size,
+                    dir->pair[0], off+sizeof(tag),
+                    lfs2_tag_dsize(tag)-sizeof(tag), &crc);
+            if (err) {
+                if (err == LFS2_ERR_CORRUPT) {
+                    break;
                 }
-
-                crc = lfs2_crc(crc, &dat, 1);
+                return err;
             }
 
             // directory modification tags?
@@ -1154,11 +1233,24 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
                         dir->pair[0], off+sizeof(tag), &temptail, 8);
                 if (err) {
                     if (err == LFS2_ERR_CORRUPT) {
-                        dir->erased = false;
+                        break;
+                    }
+                    return err;
+                }
+                lfs2_pair_fromle32(temptail);
+            } else if (lfs2_tag_type3(tag) == LFS2_TYPE_FCRC) {
+                err = lfs2_bd_read(lfs2,
+                        NULL, &lfs2->rcache, lfs2->cfg->block_size,
+                        dir->pair[0], off+sizeof(tag),
+                        &fcrc, sizeof(fcrc));
+                if (err) {
+                    if (err == LFS2_ERR_CORRUPT) {
                         break;
                     }
                 }
-                lfs2_pair_fromle32(temptail);
+
+                lfs2_fcrc_fromle32(&fcrc);
+                hasfcrc = true;
             }
 
             // found a match for our fetcher?
@@ -1167,7 +1259,6 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
                         dir->pair[0], off+sizeof(tag)});
                 if (res < 0) {
                     if (res == LFS2_ERR_CORRUPT) {
-                        dir->erased = false;
                         break;
                     }
                     return res;
@@ -1189,35 +1280,67 @@ static lfs2_stag_t lfs2_dir_fetchmatch(lfs2_t *lfs2,
             }
         }
 
-        // consider what we have good enough
-        if (dir->off > 0) {
-            // synthetic move
-            if (lfs2_gstate_hasmovehere(&lfs2->gdisk, dir->pair)) {
-                if (lfs2_tag_id(lfs2->gdisk.tag) == lfs2_tag_id(besttag)) {
-                    besttag |= 0x80000000;
-                } else if (besttag != -1 &&
-                        lfs2_tag_id(lfs2->gdisk.tag) < lfs2_tag_id(besttag)) {
-                    besttag -= LFS2_MKTAG(0, 1, 0);
+        // found no valid commits?
+        if (dir->off == 0) {
+            // try the other block?
+            lfs2_pair_swap(dir->pair);
+            dir->rev = revs[(r+1)%2];
+            continue;
+        }
+
+        // did we end on a valid commit? we may have an erased block
+        dir->erased = false;
+        if (maybeerased && dir->off % lfs2->cfg->prog_size == 0) {
+        #ifdef LFS2_MULTIVERSION
+            // note versions < lfs22.1 did not have fcrc tags, if
+            // we're < lfs22.1 treat missing fcrc as erased data
+            //
+            // we don't strictly need to do this, but otherwise writing
+            // to lfs22.0 disks becomes very inefficient
+            if (lfs2_fs_disk_version(lfs2) < 0x00020001) {
+                dir->erased = true;
+
+            } else
+        #endif
+            if (hasfcrc) {
+                // check for an fcrc matching the next prog's erased state, if
+                // this failed most likely a previous prog was interrupted, we
+                // need a new erase
+                uint32_t fcrc_ = 0xffffffff;
+                int err = lfs2_bd_crc(lfs2,
+                        NULL, &lfs2->rcache, lfs2->cfg->block_size,
+                        dir->pair[0], dir->off, fcrc.size, &fcrc_);
+                if (err && err != LFS2_ERR_CORRUPT) {
+                    return err;
                 }
-            }
 
-            // found tag? or found best id?
-            if (id) {
-                *id = lfs2_min(lfs2_tag_id(besttag), dir->count);
-            }
-
-            if (lfs2_tag_isvalid(besttag)) {
-                return besttag;
-            } else if (lfs2_tag_id(besttag) < dir->count) {
-                return LFS2_ERR_NOENT;
-            } else {
-                return 0;
+                // found beginning of erased part?
+                dir->erased = (fcrc_ == fcrc.crc);
             }
         }
 
-        // failed, try the other block?
-        lfs2_pair_swap(dir->pair);
-        dir->rev = revs[(r+1)%2];
+        // synthetic move
+        if (lfs2_gstate_hasmovehere(&lfs2->gdisk, dir->pair)) {
+            if (lfs2_tag_id(lfs2->gdisk.tag) == lfs2_tag_id(besttag)) {
+                besttag |= 0x80000000;
+            } else if (besttag != -1 &&
+                    lfs2_tag_id(lfs2->gdisk.tag) < lfs2_tag_id(besttag)) {
+                besttag -= LFS2_MKTAG(0, 1, 0);
+            }
+        }
+
+        // found tag? or found best id?
+        if (id) {
+            *id = lfs2_min(lfs2_tag_id(besttag), dir->count);
+        }
+
+        if (lfs2_tag_isvalid(besttag)) {
+            return besttag;
+        } else if (lfs2_tag_id(besttag) < dir->count) {
+            return LFS2_ERR_NOENT;
+        } else {
+            return 0;
+        }
     }
 
     LFS2_ERROR("Corrupted dir pair at {0x%"PRIx32", 0x%"PRIx32"}",
@@ -1491,9 +1614,15 @@ static int lfs2_dir_commitattr(lfs2_t *lfs2, struct lfs2_commit *commit,
 #endif
 
 #ifndef LFS2_READONLY
+
 static int lfs2_dir_commitcrc(lfs2_t *lfs2, struct lfs2_commit *commit) {
     // align to program units
-    const lfs2_off_t end = lfs2_alignup(commit->off + 2*sizeof(uint32_t),
+    //
+    // this gets a bit complex as we have two types of crcs:
+    // - 5-word crc with fcrc to check following prog (middle of block)
+    // - 2-word crc with no following prog (end of block)
+    const lfs2_off_t end = lfs2_alignup(
+            lfs2_min(commit->off + 5*sizeof(uint32_t), lfs2->cfg->block_size),
             lfs2->cfg->prog_size);
 
     lfs2_off_t off1 = 0;
@@ -1503,89 +1632,128 @@ static int lfs2_dir_commitcrc(lfs2_t *lfs2, struct lfs2_commit *commit) {
     // padding is not crced, which lets fetches skip padding but
     // makes committing a bit more complicated
     while (commit->off < end) {
-        lfs2_off_t off = commit->off + sizeof(lfs2_tag_t);
-        lfs2_off_t noff = lfs2_min(end - off, 0x3fe) + off;
+        lfs2_off_t noff = (
+                lfs2_min(end - (commit->off+sizeof(lfs2_tag_t)), 0x3fe)
+                + (commit->off+sizeof(lfs2_tag_t)));
+        // too large for crc tag? need padding commits
         if (noff < end) {
-            noff = lfs2_min(noff, end - 2*sizeof(uint32_t));
+            noff = lfs2_min(noff, end - 5*sizeof(uint32_t));
         }
 
-        // read erased state from next program unit
-        lfs2_tag_t tag = 0xffffffff;
-        int err = lfs2_bd_read(lfs2,
-                NULL, &lfs2->rcache, sizeof(tag),
-                commit->block, noff, &tag, sizeof(tag));
-        if (err && err != LFS2_ERR_CORRUPT) {
-            return err;
+        // space for fcrc?
+        uint8_t eperturb = (uint8_t)-1;
+        if (noff >= end && noff <= lfs2->cfg->block_size - lfs2->cfg->prog_size) {
+            // first read the leading byte, this always contains a bit
+            // we can perturb to avoid writes that don't change the fcrc
+            int err = lfs2_bd_read(lfs2,
+                    NULL, &lfs2->rcache, lfs2->cfg->prog_size,
+                    commit->block, noff, &eperturb, 1);
+            if (err && err != LFS2_ERR_CORRUPT) {
+                return err;
+            }
+
+        #ifdef LFS2_MULTIVERSION
+            // unfortunately fcrcs break mdir fetching < lfs22.1, so only write
+            // these if we're a >= lfs22.1 filesystem
+            if (lfs2_fs_disk_version(lfs2) <= 0x00020000) {
+                // don't write fcrc
+            } else
+        #endif
+            {
+                // find the expected fcrc, don't bother avoiding a reread
+                // of the eperturb, it should still be in our cache
+                struct lfs2_fcrc fcrc = {
+                    .size = lfs2->cfg->prog_size,
+                    .crc = 0xffffffff
+                };
+                err = lfs2_bd_crc(lfs2,
+                        NULL, &lfs2->rcache, lfs2->cfg->prog_size,
+                        commit->block, noff, fcrc.size, &fcrc.crc);
+                if (err && err != LFS2_ERR_CORRUPT) {
+                    return err;
+                }
+
+                lfs2_fcrc_tole32(&fcrc);
+                err = lfs2_dir_commitattr(lfs2, commit,
+                        LFS2_MKTAG(LFS2_TYPE_FCRC, 0x3ff, sizeof(struct lfs2_fcrc)),
+                        &fcrc);
+                if (err) {
+                    return err;
+                }
+            }
         }
 
-        // build crc tag
-        bool reset = ~lfs2_frombe32(tag) >> 31;
-        tag = LFS2_MKTAG(LFS2_TYPE_CRC + reset, 0x3ff, noff - off);
+        // build commit crc
+        struct {
+            lfs2_tag_t tag;
+            uint32_t crc;
+        } ccrc;
+        lfs2_tag_t ntag = LFS2_MKTAG(
+                LFS2_TYPE_CCRC + (((uint8_t)~eperturb) >> 7), 0x3ff,
+                noff - (commit->off+sizeof(lfs2_tag_t)));
+        ccrc.tag = lfs2_tobe32(ntag ^ commit->ptag);
+        commit->crc = lfs2_crc(commit->crc, &ccrc.tag, sizeof(lfs2_tag_t));
+        ccrc.crc = lfs2_tole32(commit->crc);
 
-        // write out crc
-        uint32_t footer[2];
-        footer[0] = lfs2_tobe32(tag ^ commit->ptag);
-        commit->crc = lfs2_crc(commit->crc, &footer[0], sizeof(footer[0]));
-        footer[1] = lfs2_tole32(commit->crc);
-        err = lfs2_bd_prog(lfs2,
+        int err = lfs2_bd_prog(lfs2,
                 &lfs2->pcache, &lfs2->rcache, false,
-                commit->block, commit->off, &footer, sizeof(footer));
+                commit->block, commit->off, &ccrc, sizeof(ccrc));
         if (err) {
             return err;
         }
 
         // keep track of non-padding checksum to verify
         if (off1 == 0) {
-            off1 = commit->off + sizeof(uint32_t);
+            off1 = commit->off + sizeof(lfs2_tag_t);
             crc1 = commit->crc;
         }
 
-        commit->off += sizeof(tag)+lfs2_tag_size(tag);
-        commit->ptag = tag ^ ((lfs2_tag_t)reset << 31);
-        commit->crc = 0xffffffff; // reset crc for next "commit"
+        commit->off = noff;
+        // perturb valid bit?
+        commit->ptag = ntag ^ ((0x80UL & ~eperturb) << 24);
+        // reset crc for next commit
+        commit->crc = 0xffffffff;
+
+        // manually flush here since we don't prog the padding, this confuses
+        // the caching layer
+        if (noff >= end || noff >= lfs2->pcache.off + lfs2->cfg->cache_size) {
+            // flush buffers
+            int err = lfs2_bd_sync(lfs2, &lfs2->pcache, &lfs2->rcache, false);
+            if (err) {
+                return err;
+            }
+        }
     }
 
-    // flush buffers
-    int err = lfs2_bd_sync(lfs2, &lfs2->pcache, &lfs2->rcache, false);
+    // successful commit, check checksums to make sure
+    //
+    // note that we don't need to check padding commits, worst
+    // case if they are corrupted we would have had to compact anyways
+    lfs2_off_t off = commit->begin;
+    uint32_t crc = 0xffffffff;
+    int err = lfs2_bd_crc(lfs2,
+            NULL, &lfs2->rcache, off1+sizeof(uint32_t),
+            commit->block, off, off1-off, &crc);
     if (err) {
         return err;
     }
 
-    // successful commit, check checksums to make sure
-    lfs2_off_t off = commit->begin;
-    lfs2_off_t noff = off1;
-    while (off < end) {
-        uint32_t crc = 0xffffffff;
-        for (lfs2_off_t i = off; i < noff+sizeof(uint32_t); i++) {
-            // check against written crc, may catch blocks that
-            // become readonly and match our commit size exactly
-            if (i == off1 && crc != crc1) {
-                return LFS2_ERR_CORRUPT;
-            }
+    // check non-padding commits against known crc
+    if (crc != crc1) {
+        return LFS2_ERR_CORRUPT;
+    }
 
-            // leave it up to caching to make this efficient
-            uint8_t dat;
-            err = lfs2_bd_read(lfs2,
-                    NULL, &lfs2->rcache, noff+sizeof(uint32_t)-i,
-                    commit->block, i, &dat, 1);
-            if (err) {
-                return err;
-            }
+    // make sure to check crc in case we happen to pick
+    // up an unrelated crc (frozen block?)
+    err = lfs2_bd_crc(lfs2,
+            NULL, &lfs2->rcache, sizeof(uint32_t),
+            commit->block, off1, sizeof(uint32_t), &crc);
+    if (err) {
+        return err;
+    }
 
-            crc = lfs2_crc(crc, &dat, 1);
-        }
-
-        // detected write error?
-        if (crc != 0) {
-            return LFS2_ERR_CORRUPT;
-        }
-
-        // skip padding
-        off = lfs2_min(end - noff, 0x3fe) + noff;
-        if (off < end) {
-            off = lfs2_min(off, end - 2*sizeof(uint32_t));
-        }
-        noff = off + sizeof(uint32_t);
+    if (crc != 0) {
+        return LFS2_ERR_CORRUPT;
     }
 
     return 0;
@@ -1926,11 +2094,20 @@ static int lfs2_dir_splittingcompact(lfs2_t *lfs2, lfs2_mdir_t *dir,
                 return err;
             }
 
-            // space is complicated, we need room for tail, crc, gstate,
-            // cleanup delete, and we cap at half a block to give room
-            // for metadata updates.
+            // space is complicated, we need room for:
+            //
+            // - tail:         4+2*4 = 12 bytes
+            // - gstate:       4+3*4 = 16 bytes
+            // - move delete:  4     = 4 bytes
+            // - crc:          4+4   = 8 bytes
+            //                 total = 40 bytes
+            //
+            // And we cap at half a block to avoid degenerate cases with
+            // nearly-full metadata blocks.
+            //
             if (end - split < 0xff
-                    && size <= lfs2_min(lfs2->cfg->block_size - 36,
+                    && size <= lfs2_min(
+                        lfs2->cfg->block_size - 40,
                         lfs2_alignup(
                             (lfs2->cfg->metadata_max
                                 ? lfs2->cfg->metadata_max
@@ -1976,7 +2153,7 @@ static int lfs2_dir_splittingcompact(lfs2_t *lfs2, lfs2_mdir_t *dir,
 
         // do we have extra space? littlefs can't reclaim this space
         // by itself, so expand cautiously
-        if ((lfs2_size_t)size < lfs2->cfg->block_count/2) {
+        if ((lfs2_size_t)size < lfs2->block_count/2) {
             LFS2_DEBUG("Expanding superblock at rev %"PRIu32, dir->rev);
             int err = lfs2_dir_split(lfs2, dir, attrs, attrcount,
                     source, begin, end);
@@ -2594,11 +2771,6 @@ static int lfs2_dir_rawseek(lfs2_t *lfs2, lfs2_dir_t *dir, lfs2_off_t off) {
     dir->id = (off > 0 && lfs2_pair_cmp(dir->head, lfs2->root) == 0);
 
     while (off > 0) {
-        int diff = lfs2_min(dir->m.count - dir->id, off);
-        dir->id += diff;
-        dir->pos += diff;
-        off -= diff;
-
         if (dir->id == dir->m.count) {
             if (!dir->m.split) {
                 return LFS2_ERR_INVAL;
@@ -2611,6 +2783,11 @@ static int lfs2_dir_rawseek(lfs2_t *lfs2, lfs2_dir_t *dir, lfs2_off_t off) {
 
             dir->id = 0;
         }
+
+        int diff = lfs2_min(dir->m.count - dir->id, off);
+        dir->id += diff;
+        dir->pos += diff;
+        off -= diff;
     }
 
     return 0;
@@ -3347,7 +3524,7 @@ static lfs2_ssize_t lfs2_file_flushedwrite(lfs2_t *lfs2, lfs2_file_t *file,
                     // find out which block we're extending from
                     int err = lfs2_ctz_find(lfs2, NULL, &file->cache,
                             file->ctz.head, file->ctz.size,
-                            file->pos-1, &file->block, &file->off);
+                            file->pos-1, &file->block, &(lfs2_off_t){0});
                     if (err) {
                         file->flags |= LFS2_F_ERRED;
                         return err;
@@ -3525,26 +3702,55 @@ static int lfs2_file_rawtruncate(lfs2_t *lfs2, lfs2_file_t *file, lfs2_off_t siz
     lfs2_off_t pos = file->pos;
     lfs2_off_t oldsize = lfs2_file_rawsize(lfs2, file);
     if (size < oldsize) {
-        // need to flush since directly changing metadata
-        int err = lfs2_file_flush(lfs2, file);
-        if (err) {
-            return err;
-        }
+        // revert to inline file?
+        if (size <= lfs2_min(0x3fe, lfs2_min(
+                lfs2->cfg->cache_size,
+                (lfs2->cfg->metadata_max ?
+                    lfs2->cfg->metadata_max : lfs2->cfg->block_size) / 8))) {
+            // flush+seek to head
+            lfs2_soff_t res = lfs2_file_rawseek(lfs2, file, 0, LFS2_SEEK_SET);
+            if (res < 0) {
+                return (int)res;
+            }
 
-        // lookup new head in ctz skip list
-        err = lfs2_ctz_find(lfs2, NULL, &file->cache,
-                file->ctz.head, file->ctz.size,
-                size, &file->block, &file->off);
-        if (err) {
-            return err;
-        }
+            // read our data into rcache temporarily
+            lfs2_cache_drop(lfs2, &lfs2->rcache);
+            res = lfs2_file_flushedread(lfs2, file,
+                    lfs2->rcache.buffer, size);
+            if (res < 0) {
+                return (int)res;
+            }
 
-        // need to set pos/block/off consistently so seeking back to
-        // the old position does not get confused
-        file->pos = size;
-        file->ctz.head = file->block;
-        file->ctz.size = size;
-        file->flags |= LFS2_F_DIRTY | LFS2_F_READING;
+            file->ctz.head = LFS2_BLOCK_INLINE;
+            file->ctz.size = size;
+            file->flags |= LFS2_F_DIRTY | LFS2_F_READING | LFS2_F_INLINE;
+            file->cache.block = file->ctz.head;
+            file->cache.off = 0;
+            file->cache.size = lfs2->cfg->cache_size;
+            memcpy(file->cache.buffer, lfs2->rcache.buffer, size);
+
+        } else {
+            // need to flush since directly changing metadata
+            int err = lfs2_file_flush(lfs2, file);
+            if (err) {
+                return err;
+            }
+
+            // lookup new head in ctz skip list
+            err = lfs2_ctz_find(lfs2, NULL, &file->cache,
+                    file->ctz.head, file->ctz.size,
+                    size-1, &file->block, &(lfs2_off_t){0});
+            if (err) {
+                return err;
+            }
+
+            // need to set pos/block/off consistently so seeking back to
+            // the old position does not get confused
+            file->pos = size;
+            file->ctz.head = file->block;
+            file->ctz.size = size;
+            file->flags |= LFS2_F_DIRTY | LFS2_F_READING;
+        }
     } else if (size > oldsize) {
         // flush+seek if not already at end
         lfs2_soff_t res = lfs2_file_rawseek(lfs2, file, 0, LFS2_SEEK_END);
@@ -3902,8 +4108,24 @@ static int lfs2_rawremoveattr(lfs2_t *lfs2, const char *path, uint8_t type) {
 /// Filesystem operations ///
 static int lfs2_init(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     lfs2->cfg = cfg;
+    lfs2->block_count = cfg->block_count;  // May be 0
     int err = 0;
 
+#ifdef LFS2_MULTIVERSION
+    // this driver only supports minor version < current minor version
+    LFS2_ASSERT(!lfs2->cfg->disk_version || (
+            (0xffff & (lfs2->cfg->disk_version >> 16))
+                    == LFS2_DISK_VERSION_MAJOR
+                && (0xffff & (lfs2->cfg->disk_version >> 0))
+                    <= LFS2_DISK_VERSION_MINOR));
+#endif
+
+    // check that bool is a truthy-preserving type
+    //
+    // note the most common reason for this failure is a before-c99 compiler,
+    // which littlefs currently does not support
+    LFS2_ASSERT((bool)0x80000000);
+
     // validate that the lfs2-cfg sizes were initiated properly before
     // performing any arithmetic logics with them
     LFS2_ASSERT(lfs2->cfg->read_size != 0);
@@ -3916,7 +4138,10 @@ static int lfs2_init(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     LFS2_ASSERT(lfs2->cfg->cache_size % lfs2->cfg->prog_size == 0);
     LFS2_ASSERT(lfs2->cfg->block_size % lfs2->cfg->cache_size == 0);
 
-    // check that the block size is large enough to fit ctz pointers
+    // check that the block size is large enough to fit all ctz pointers
+    LFS2_ASSERT(lfs2->cfg->block_size >= 128);
+    // this is the exact calculation for all ctz pointers, if this fails
+    // and the simpler assert above does not, math must be broken
     LFS2_ASSERT(4*lfs2_npw2(0xffffffff / (lfs2->cfg->block_size-2*4))
             <= lfs2->cfg->block_size);
 
@@ -4026,6 +4251,8 @@ static int lfs2_deinit(lfs2_t *lfs2) {
     return 0;
 }
 
+
+
 #ifndef LFS2_READONLY
 static int lfs2_rawformat(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     int err = 0;
@@ -4035,11 +4262,13 @@ static int lfs2_rawformat(lfs2_t *lfs2, const struct lfs2_config *cfg) {
             return err;
         }
 
+        LFS2_ASSERT(cfg->block_count != 0);
+
         // create free lookahead
         memset(lfs2->free.buffer, 0, lfs2->cfg->lookahead_size);
         lfs2->free.off = 0;
         lfs2->free.size = lfs2_min(8*lfs2->cfg->lookahead_size,
-                lfs2->cfg->block_count);
+                lfs2->block_count);
         lfs2->free.i = 0;
         lfs2_alloc_ack(lfs2);
 
@@ -4052,9 +4281,9 @@ static int lfs2_rawformat(lfs2_t *lfs2, const struct lfs2_config *cfg) {
 
         // write one superblock
         lfs2_superblock_t superblock = {
-            .version     = LFS2_DISK_VERSION,
+            .version     = lfs2_fs_disk_version(lfs2),
             .block_size  = lfs2->cfg->block_size,
-            .block_count = lfs2->cfg->block_count,
+            .block_count = lfs2->block_count,
             .name_max    = lfs2->name_max,
             .file_max    = lfs2->file_max,
             .attr_max    = lfs2->attr_max,
@@ -4100,14 +4329,23 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
 
     // scan directory blocks for superblock and any global updates
     lfs2_mdir_t dir = {.tail = {0, 1}};
-    lfs2_block_t cycle = 0;
+    lfs2_block_t tortoise[2] = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL};
+    lfs2_size_t tortoise_i = 1;
+    lfs2_size_t tortoise_period = 1;
     while (!lfs2_pair_isnull(dir.tail)) {
-        if (cycle >= lfs2->cfg->block_count/2) {
-            // loop detected
+        // detect cycles with Brent's algorithm
+        if (lfs2_pair_issync(dir.tail, tortoise)) {
+            LFS2_WARN("Cycle detected in tail list");
             err = LFS2_ERR_CORRUPT;
             goto cleanup;
         }
-        cycle += 1;
+        if (tortoise_i == tortoise_period) {
+            tortoise[0] = dir.tail[0];
+            tortoise[1] = dir.tail[1];
+            tortoise_i = 0;
+            tortoise_period *= 2;
+        }
+        tortoise_i += 1;
 
         // fetch next block in tail list
         lfs2_stag_t tag = lfs2_dir_fetchmatch(lfs2, &dir, dir.tail,
@@ -4141,14 +4379,33 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
             // check version
             uint16_t major_version = (0xffff & (superblock.version >> 16));
             uint16_t minor_version = (0xffff & (superblock.version >>  0));
-            if ((major_version != LFS2_DISK_VERSION_MAJOR ||
-                 minor_version > LFS2_DISK_VERSION_MINOR)) {
-                LFS2_ERROR("Invalid version v%"PRIu16".%"PRIu16,
-                        major_version, minor_version);
+            if (major_version != lfs2_fs_disk_version_major(lfs2)
+                    || minor_version > lfs2_fs_disk_version_minor(lfs2)) {
+                LFS2_ERROR("Invalid version "
+                        "v%"PRIu16".%"PRIu16" != v%"PRIu16".%"PRIu16,
+                        major_version,
+                        minor_version,
+                        lfs2_fs_disk_version_major(lfs2),
+                        lfs2_fs_disk_version_minor(lfs2));
                 err = LFS2_ERR_INVAL;
                 goto cleanup;
             }
 
+            // found older minor version? set an in-device only bit in the
+            // gstate so we know we need to rewrite the superblock before
+            // the first write
+            if (minor_version < lfs2_fs_disk_version_minor(lfs2)) {
+                LFS2_DEBUG("Found older minor version "
+                        "v%"PRIu16".%"PRIu16" < v%"PRIu16".%"PRIu16,
+                        major_version,
+                        minor_version,
+                        lfs2_fs_disk_version_major(lfs2),
+                        lfs2_fs_disk_version_minor(lfs2));
+                // note this bit is reserved on disk, so fetching more gstate
+                // will not interfere here
+                lfs2_fs_prepsuperblock(lfs2, true);
+            }
+
             // check superblock configuration
             if (superblock.name_max) {
                 if (superblock.name_max > lfs2->name_max) {
@@ -4183,16 +4440,20 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
                 lfs2->attr_max = superblock.attr_max;
             }
 
-            if (superblock.block_count != lfs2->cfg->block_count) {
+            // this is where we get the block_count from disk if block_count=0
+            if (lfs2->cfg->block_count
+                    && superblock.block_count != lfs2->cfg->block_count) {
                 LFS2_ERROR("Invalid block count (%"PRIu32" != %"PRIu32")",
                         superblock.block_count, lfs2->cfg->block_count);
                 err = LFS2_ERR_INVAL;
                 goto cleanup;
             }
 
+            lfs2->block_count = superblock.block_count;
+
             if (superblock.block_size != lfs2->cfg->block_size) {
                 LFS2_ERROR("Invalid block size (%"PRIu32" != %"PRIu32")",
-                        superblock.block_count, lfs2->cfg->block_count);
+                        superblock.block_size, lfs2->cfg->block_size);
                 err = LFS2_ERR_INVAL;
                 goto cleanup;
             }
@@ -4205,12 +4466,6 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
         }
     }
 
-    // found superblock?
-    if (lfs2_pair_isnull(lfs2->root)) {
-        err = LFS2_ERR_INVAL;
-        goto cleanup;
-    }
-
     // update littlefs with gstate
     if (!lfs2_gstate_iszero(&lfs2->gstate)) {
         LFS2_DEBUG("Found pending gstate 0x%08"PRIx32"%08"PRIx32"%08"PRIx32,
@@ -4223,7 +4478,7 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
 
     // setup free lookahead, to distribute allocations uniformly across
     // boots, we start the allocator at a random location
-    lfs2->free.off = lfs2->seed % lfs2->cfg->block_count;
+    lfs2->free.off = lfs2->seed % lfs2->block_count;
     lfs2_alloc_drop(lfs2);
 
     return 0;
@@ -4239,6 +4494,46 @@ static int lfs2_rawunmount(lfs2_t *lfs2) {
 
 
 /// Filesystem filesystem operations ///
+static int lfs2_fs_rawstat(lfs2_t *lfs2, struct lfs2_fsinfo *fsinfo) {
+    // if the superblock is up-to-date, we must be on the most recent
+    // minor version of littlefs
+    if (!lfs2_gstate_needssuperblock(&lfs2->gstate)) {
+        fsinfo->disk_version = lfs2_fs_disk_version(lfs2);
+
+    // otherwise we need to read the minor version on disk
+    } else {
+        // fetch the superblock
+        lfs2_mdir_t dir;
+        int err = lfs2_dir_fetch(lfs2, &dir, lfs2->root);
+        if (err) {
+            return err;
+        }
+
+        lfs2_superblock_t superblock;
+        lfs2_stag_t tag = lfs2_dir_get(lfs2, &dir, LFS2_MKTAG(0x7ff, 0x3ff, 0),
+                LFS2_MKTAG(LFS2_TYPE_INLINESTRUCT, 0, sizeof(superblock)),
+                &superblock);
+        if (tag < 0) {
+            return tag;
+        }
+        lfs2_superblock_fromle32(&superblock);
+
+        // read the on-disk version
+        fsinfo->disk_version = superblock.version;
+    }
+
+    // filesystem geometry
+    fsinfo->block_size = lfs2->cfg->block_size;
+    fsinfo->block_count = lfs2->block_count;
+
+    // other on-disk configuration, we cache all of these for internal use
+    fsinfo->name_max = lfs2->name_max;
+    fsinfo->file_max = lfs2->file_max;
+    fsinfo->attr_max = lfs2->attr_max;
+
+    return 0;
+}
+
 int lfs2_fs_rawtraverse(lfs2_t *lfs2,
         int (*cb)(void *data, lfs2_block_t block), void *data,
         bool includeorphans) {
@@ -4258,13 +4553,22 @@ int lfs2_fs_rawtraverse(lfs2_t *lfs2,
     }
 #endif
 
-    lfs2_block_t cycle = 0;
+    lfs2_block_t tortoise[2] = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL};
+    lfs2_size_t tortoise_i = 1;
+    lfs2_size_t tortoise_period = 1;
     while (!lfs2_pair_isnull(dir.tail)) {
-        if (cycle >= lfs2->cfg->block_count/2) {
-            // loop detected
+        // detect cycles with Brent's algorithm
+        if (lfs2_pair_issync(dir.tail, tortoise)) {
+            LFS2_WARN("Cycle detected in tail list");
             return LFS2_ERR_CORRUPT;
         }
-        cycle += 1;
+        if (tortoise_i == tortoise_period) {
+            tortoise[0] = dir.tail[0];
+            tortoise[1] = dir.tail[1];
+            tortoise_i = 0;
+            tortoise_period *= 2;
+        }
+        tortoise_i += 1;
 
         for (int i = 0; i < 2; i++) {
             int err = cb(data, dir.tail[i]);
@@ -4343,13 +4647,22 @@ static int lfs2_fs_pred(lfs2_t *lfs2,
     // iterate over all directory directory entries
     pdir->tail[0] = 0;
     pdir->tail[1] = 1;
-    lfs2_block_t cycle = 0;
+    lfs2_block_t tortoise[2] = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL};
+    lfs2_size_t tortoise_i = 1;
+    lfs2_size_t tortoise_period = 1;
     while (!lfs2_pair_isnull(pdir->tail)) {
-        if (cycle >= lfs2->cfg->block_count/2) {
-            // loop detected
+        // detect cycles with Brent's algorithm
+        if (lfs2_pair_issync(pdir->tail, tortoise)) {
+            LFS2_WARN("Cycle detected in tail list");
             return LFS2_ERR_CORRUPT;
         }
-        cycle += 1;
+        if (tortoise_i == tortoise_period) {
+            tortoise[0] = pdir->tail[0];
+            tortoise[1] = pdir->tail[1];
+            tortoise_i = 0;
+            tortoise_period *= 2;
+        }
+        tortoise_i += 1;
 
         if (lfs2_pair_cmp(pdir->tail, pair) == 0) {
             return 0;
@@ -4399,13 +4712,22 @@ static lfs2_stag_t lfs2_fs_parent(lfs2_t *lfs2, const lfs2_block_t pair[2],
     // use fetchmatch with callback to find pairs
     parent->tail[0] = 0;
     parent->tail[1] = 1;
-    lfs2_block_t cycle = 0;
+    lfs2_block_t tortoise[2] = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL};
+    lfs2_size_t tortoise_i = 1;
+    lfs2_size_t tortoise_period = 1;
     while (!lfs2_pair_isnull(parent->tail)) {
-        if (cycle >= lfs2->cfg->block_count/2) {
-            // loop detected
+        // detect cycles with Brent's algorithm
+        if (lfs2_pair_issync(parent->tail, tortoise)) {
+            LFS2_WARN("Cycle detected in tail list");
             return LFS2_ERR_CORRUPT;
         }
-        cycle += 1;
+        if (tortoise_i == tortoise_period) {
+            tortoise[0] = parent->tail[0];
+            tortoise[1] = parent->tail[1];
+            tortoise_i = 0;
+            tortoise_period *= 2;
+        }
+        tortoise_i += 1;
 
         lfs2_stag_t tag = lfs2_dir_fetchmatch(lfs2, parent, parent->tail,
                 LFS2_MKTAG(0x7ff, 0, 0x3ff),
@@ -4422,9 +4744,15 @@ static lfs2_stag_t lfs2_fs_parent(lfs2_t *lfs2, const lfs2_block_t pair[2],
 }
 #endif
 
+static void lfs2_fs_prepsuperblock(lfs2_t *lfs2, bool needssuperblock) {
+    lfs2->gstate.tag = (lfs2->gstate.tag & ~LFS2_MKTAG(0, 0, 0x200))
+            | (uint32_t)needssuperblock << 9;
+}
+
 #ifndef LFS2_READONLY
 static int lfs2_fs_preporphans(lfs2_t *lfs2, int8_t orphans) {
-    LFS2_ASSERT(lfs2_tag_size(lfs2->gstate.tag) > 0 || orphans >= 0);
+    LFS2_ASSERT(lfs2_tag_size(lfs2->gstate.tag) > 0x000 || orphans >= 0);
+    LFS2_ASSERT(lfs2_tag_size(lfs2->gstate.tag) < 0x1ff || orphans <= 0);
     lfs2->gstate.tag += orphans;
     lfs2->gstate.tag = ((lfs2->gstate.tag & ~LFS2_MKTAG(0x800, 0, 0)) |
             ((uint32_t)lfs2_gstate_hasorphans(&lfs2->gstate) << 31));
@@ -4443,6 +4771,45 @@ static void lfs2_fs_prepmove(lfs2_t *lfs2,
 }
 #endif
 
+#ifndef LFS2_READONLY
+static int lfs2_fs_desuperblock(lfs2_t *lfs2) {
+    if (!lfs2_gstate_needssuperblock(&lfs2->gstate)) {
+        return 0;
+    }
+
+    LFS2_DEBUG("Rewriting superblock {0x%"PRIx32", 0x%"PRIx32"}",
+            lfs2->root[0],
+            lfs2->root[1]);
+
+    lfs2_mdir_t root;
+    int err = lfs2_dir_fetch(lfs2, &root, lfs2->root);
+    if (err) {
+        return err;
+    }
+
+    // write a new superblock
+    lfs2_superblock_t superblock = {
+        .version     = lfs2_fs_disk_version(lfs2),
+        .block_size  = lfs2->cfg->block_size,
+        .block_count = lfs2->block_count,
+        .name_max    = lfs2->name_max,
+        .file_max    = lfs2->file_max,
+        .attr_max    = lfs2->attr_max,
+    };
+
+    lfs2_superblock_tole32(&superblock);
+    err = lfs2_dir_commit(lfs2, &root, LFS2_MKATTRS(
+            {LFS2_MKTAG(LFS2_TYPE_INLINESTRUCT, 0, sizeof(superblock)),
+                &superblock}));
+    if (err) {
+        return err;
+    }
+
+    lfs2_fs_prepsuperblock(lfs2, false);
+    return 0;
+}
+#endif
+
 #ifndef LFS2_READONLY
 static int lfs2_fs_demove(lfs2_t *lfs2) {
     if (!lfs2_gstate_hasmove(&lfs2->gdisk)) {
@@ -4455,6 +4822,10 @@ static int lfs2_fs_demove(lfs2_t *lfs2) {
             lfs2->gdisk.pair[1],
             lfs2_tag_id(lfs2->gdisk.tag));
 
+    // no other gstate is supported at this time, so if we found something else
+    // something most likely went wrong in gstate calculation
+    LFS2_ASSERT(lfs2_tag_type3(lfs2->gdisk.tag) == LFS2_TYPE_DELETE);
+
     // fetch and delete the moved entry
     lfs2_mdir_t movedir;
     int err = lfs2_dir_fetch(lfs2, &movedir, lfs2->gdisk.pair);
@@ -4481,12 +4852,20 @@ static int lfs2_fs_deorphan(lfs2_t *lfs2, bool powerloss) {
         return 0;
     }
 
-    int8_t found = 0;
-restart:
-    {
+    // Check for orphans in two separate passes:
+    // - 1 for half-orphans (relocations)
+    // - 2 for full-orphans (removes/renames)
+    //
+    // Two separate passes are needed as half-orphans can contain outdated
+    // references to full-orphans, effectively hiding them from the deorphan
+    // search.
+    //
+    int pass = 0;
+    while (pass < 2) {
         // Fix any orphans
         lfs2_mdir_t pdir = {.split = true, .tail = {0, 1}};
         lfs2_mdir_t dir;
+        bool moreorphans = false;
 
         // iterate over all directory directory entries
         while (!lfs2_pair_isnull(pdir.tail)) {
@@ -4504,42 +4883,7 @@ restart:
                     return tag;
                 }
 
-                // note we only check for full orphans if we may have had a
-                // power-loss, otherwise orphans are created intentionally
-                // during operations such as lfs2_mkdir
-                if (tag == LFS2_ERR_NOENT && powerloss) {
-                    // we are an orphan
-                    LFS2_DEBUG("Fixing orphan {0x%"PRIx32", 0x%"PRIx32"}",
-                            pdir.tail[0], pdir.tail[1]);
-
-                    // steal state
-                    err = lfs2_dir_getgstate(lfs2, &dir, &lfs2->gdelta);
-                    if (err) {
-                        return err;
-                    }
-
-                    // steal tail
-                    lfs2_pair_tole32(dir.tail);
-                    int state = lfs2_dir_orphaningcommit(lfs2, &pdir, LFS2_MKATTRS(
-                            {LFS2_MKTAG(LFS2_TYPE_TAIL + dir.split, 0x3ff, 8),
-                                dir.tail}));
-                    lfs2_pair_fromle32(dir.tail);
-                    if (state < 0) {
-                        return state;
-                    }
-
-                    found += 1;
-
-                    // did our commit create more orphans?
-                    if (state == LFS2_OK_ORPHANED) {
-                        goto restart;
-                    }
-
-                    // refetch tail
-                    continue;
-                }
-
-                if (tag != LFS2_ERR_NOENT) {
+                if (pass == 0 && tag != LFS2_ERR_NOENT) {
                     lfs2_block_t pair[2];
                     lfs2_stag_t state = lfs2_dir_get(lfs2, &parent,
                             LFS2_MKTAG(0x7ff, 0x3ff, 0), tag, pair);
@@ -4548,7 +4892,7 @@ restart:
                     }
                     lfs2_pair_fromle32(pair);
 
-                    if (!lfs2_pair_sync(pair, pdir.tail)) {
+                    if (!lfs2_pair_issync(pair, pdir.tail)) {
                         // we have desynced
                         LFS2_DEBUG("Fixing half-orphan "
                                 "{0x%"PRIx32", 0x%"PRIx32"} "
@@ -4578,33 +4922,69 @@ restart:
                             return state;
                         }
 
-                        found += 1;
-
                         // did our commit create more orphans?
                         if (state == LFS2_OK_ORPHANED) {
-                            goto restart;
+                            moreorphans = true;
                         }
 
                         // refetch tail
                         continue;
                     }
                 }
+
+                // note we only check for full orphans if we may have had a
+                // power-loss, otherwise orphans are created intentionally
+                // during operations such as lfs2_mkdir
+                if (pass == 1 && tag == LFS2_ERR_NOENT && powerloss) {
+                    // we are an orphan
+                    LFS2_DEBUG("Fixing orphan {0x%"PRIx32", 0x%"PRIx32"}",
+                            pdir.tail[0], pdir.tail[1]);
+
+                    // steal state
+                    err = lfs2_dir_getgstate(lfs2, &dir, &lfs2->gdelta);
+                    if (err) {
+                        return err;
+                    }
+
+                    // steal tail
+                    lfs2_pair_tole32(dir.tail);
+                    int state = lfs2_dir_orphaningcommit(lfs2, &pdir, LFS2_MKATTRS(
+                            {LFS2_MKTAG(LFS2_TYPE_TAIL + dir.split, 0x3ff, 8),
+                                dir.tail}));
+                    lfs2_pair_fromle32(dir.tail);
+                    if (state < 0) {
+                        return state;
+                    }
+
+                    // did our commit create more orphans?
+                    if (state == LFS2_OK_ORPHANED) {
+                        moreorphans = true;
+                    }
+
+                    // refetch tail
+                    continue;
+                }
             }
 
             pdir = dir;
         }
+
+        pass = moreorphans ? 0 : pass+1;
     }
 
     // mark orphans as fixed
-    return lfs2_fs_preporphans(lfs2, -lfs2_min(
-            lfs2_gstate_getorphans(&lfs2->gstate),
-            found));
+    return lfs2_fs_preporphans(lfs2, -lfs2_gstate_getorphans(&lfs2->gstate));
 }
 #endif
 
 #ifndef LFS2_READONLY
 static int lfs2_fs_forceconsistency(lfs2_t *lfs2) {
-    int err = lfs2_fs_demove(lfs2);
+    int err = lfs2_fs_desuperblock(lfs2);
+    if (err) {
+        return err;
+    }
+
+    err = lfs2_fs_demove(lfs2);
     if (err) {
         return err;
     }
@@ -4618,6 +4998,36 @@ static int lfs2_fs_forceconsistency(lfs2_t *lfs2) {
 }
 #endif
 
+#ifndef LFS2_READONLY
+static int lfs2_fs_rawmkconsistent(lfs2_t *lfs2) {
+    // lfs2_fs_forceconsistency does most of the work here
+    int err = lfs2_fs_forceconsistency(lfs2);
+    if (err) {
+        return err;
+    }
+
+    // do we have any pending gstate?
+    lfs2_gstate_t delta = {0};
+    lfs2_gstate_xor(&delta, &lfs2->gdisk);
+    lfs2_gstate_xor(&delta, &lfs2->gstate);
+    if (!lfs2_gstate_iszero(&delta)) {
+        // lfs2_dir_commit will implicitly write out any pending gstate
+        lfs2_mdir_t root;
+        err = lfs2_dir_fetch(lfs2, &root, lfs2->root);
+        if (err) {
+            return err;
+        }
+
+        err = lfs2_dir_commit(lfs2, &root, NULL, 0);
+        if (err) {
+            return err;
+        }
+    }
+
+    return 0;
+}
+#endif
+
 static int lfs2_fs_size_count(void *p, lfs2_block_t block) {
     (void)block;
     lfs2_size_t *size = p;
@@ -4635,6 +5045,45 @@ static lfs2_ssize_t lfs2_fs_rawsize(lfs2_t *lfs2) {
     return size;
 }
 
+#ifndef LFS2_READONLY
+static int lfs2_fs_rawgrow(lfs2_t *lfs2, lfs2_size_t block_count) {
+    // shrinking is not supported
+    LFS2_ASSERT(block_count >= lfs2->block_count);
+
+    if (block_count > lfs2->block_count) {
+        lfs2->block_count = block_count;
+
+        // fetch the root
+        lfs2_mdir_t root;
+        int err = lfs2_dir_fetch(lfs2, &root, lfs2->root);
+        if (err) {
+            return err;
+        }
+
+        // update the superblock
+        lfs2_superblock_t superblock;
+        lfs2_stag_t tag = lfs2_dir_get(lfs2, &root, LFS2_MKTAG(0x7ff, 0x3ff, 0),
+                LFS2_MKTAG(LFS2_TYPE_INLINESTRUCT, 0, sizeof(superblock)),
+                &superblock);
+        if (tag < 0) {
+            return tag;
+        }
+        lfs2_superblock_fromle32(&superblock);
+
+        superblock.block_count = lfs2->block_count;
+
+        lfs2_superblock_tole32(&superblock);
+        err = lfs2_dir_commit(lfs2, &root, LFS2_MKATTRS(
+                {tag, &superblock}));
+        if (err) {
+            return err;
+        }
+    }
+
+    return 0;
+}
+#endif
+
 #ifdef LFS2_MIGRATE
 ////// Migration from littelfs v1 below this //////
 
@@ -5058,6 +5507,10 @@ static int lfs21_unmount(lfs2_t *lfs2) {
 /// v1 migration ///
 static int lfs2_rawmigrate(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     struct lfs21 lfs21;
+
+    // Indeterminate filesystem size not allowed for migration.
+    LFS2_ASSERT(cfg->block_count != 0);
+
     int err = lfs21_mount(lfs2, &lfs21, cfg);
     if (err) {
         return err;
@@ -5754,6 +6207,20 @@ int lfs2_dir_rewind(lfs2_t *lfs2, lfs2_dir_t *dir) {
     return err;
 }
 
+int lfs2_fs_stat(lfs2_t *lfs2, struct lfs2_fsinfo *fsinfo) {
+    int err = LFS2_LOCK(lfs2->cfg);
+    if (err) {
+        return err;
+    }
+    LFS2_TRACE("lfs2_fs_stat(%p, %p)", (void*)lfs2, (void*)fsinfo);
+
+    err = lfs2_fs_rawstat(lfs2, fsinfo);
+
+    LFS2_TRACE("lfs2_fs_stat -> %d", err);
+    LFS2_UNLOCK(lfs2->cfg);
+    return err;
+}
+
 lfs2_ssize_t lfs2_fs_size(lfs2_t *lfs2) {
     int err = LFS2_LOCK(lfs2->cfg);
     if (err) {
@@ -5783,6 +6250,54 @@ int lfs2_fs_traverse(lfs2_t *lfs2, int (*cb)(void *, lfs2_block_t), void *data)
     return err;
 }
 
+#ifndef LFS2_READONLY
+int lfs2_fs_gc(lfs2_t *lfs2) {
+    int err = LFS2_LOCK(lfs2->cfg);
+    if (err) {
+        return err;
+    }
+    LFS2_TRACE("lfs2_fs_gc(%p)", (void*)lfs2);
+
+    err = lfs2_fs_rawgc(lfs2);
+
+    LFS2_TRACE("lfs2_fs_gc -> %d", err);
+    LFS2_UNLOCK(lfs2->cfg);
+    return err;
+}
+#endif
+
+#ifndef LFS2_READONLY
+int lfs2_fs_mkconsistent(lfs2_t *lfs2) {
+    int err = LFS2_LOCK(lfs2->cfg);
+    if (err) {
+        return err;
+    }
+    LFS2_TRACE("lfs2_fs_mkconsistent(%p)", (void*)lfs2);
+
+    err = lfs2_fs_rawmkconsistent(lfs2);
+
+    LFS2_TRACE("lfs2_fs_mkconsistent -> %d", err);
+    LFS2_UNLOCK(lfs2->cfg);
+    return err;
+}
+#endif
+
+#ifndef LFS2_READONLY
+int lfs2_fs_grow(lfs2_t *lfs2, lfs2_size_t block_count) {
+    int err = LFS2_LOCK(lfs2->cfg);
+    if (err) {
+        return err;
+    }
+    LFS2_TRACE("lfs2_fs_grow(%p, %"PRIu32")", (void*)lfs2, block_count);
+
+    err = lfs2_fs_rawgrow(lfs2, block_count);
+
+    LFS2_TRACE("lfs2_fs_grow -> %d", err);
+    LFS2_UNLOCK(lfs2->cfg);
+    return err;
+}
+#endif
+
 #ifdef LFS2_MIGRATE
 int lfs2_migrate(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     int err = LFS2_LOCK(cfg);
diff --git a/lib/littlefs/lfs2.h b/lib/littlefs/lfs2.h
index 715764f7ce..4c426fc4c7 100644
--- a/lib/littlefs/lfs2.h
+++ b/lib/littlefs/lfs2.h
@@ -8,8 +8,6 @@
 #ifndef LFS2_H
 #define LFS2_H
 
-#include <stdint.h>
-#include <stdbool.h>
 #include "lfs2_util.h"
 
 #ifdef __cplusplus
@@ -23,14 +21,14 @@ extern "C"
 // Software library version
 // Major (top-nibble), incremented on backwards incompatible changes
 // Minor (bottom-nibble), incremented on feature additions
-#define LFS2_VERSION 0x00020005
+#define LFS2_VERSION 0x00020008
 #define LFS2_VERSION_MAJOR (0xffff & (LFS2_VERSION >> 16))
 #define LFS2_VERSION_MINOR (0xffff & (LFS2_VERSION >>  0))
 
 // Version of On-disk data structures
 // Major (top-nibble), incremented on backwards incompatible changes
 // Minor (bottom-nibble), incremented on feature additions
-#define LFS2_DISK_VERSION 0x00020000
+#define LFS2_DISK_VERSION 0x00020001
 #define LFS2_DISK_VERSION_MAJOR (0xffff & (LFS2_DISK_VERSION >> 16))
 #define LFS2_DISK_VERSION_MINOR (0xffff & (LFS2_DISK_VERSION >>  0))
 
@@ -114,6 +112,8 @@ enum lfs2_type {
     LFS2_TYPE_SOFTTAIL       = 0x600,
     LFS2_TYPE_HARDTAIL       = 0x601,
     LFS2_TYPE_MOVESTATE      = 0x7ff,
+    LFS2_TYPE_CCRC           = 0x500,
+    LFS2_TYPE_FCRC           = 0x5ff,
 
     // internal chip sources
     LFS2_FROM_NOOP           = 0x000,
@@ -263,6 +263,14 @@ struct lfs2_config {
     // can help bound the metadata compaction time. Must be <= block_size.
     // Defaults to block_size when zero.
     lfs2_size_t metadata_max;
+
+#ifdef LFS2_MULTIVERSION
+    // On-disk version to use when writing in the form of 16-bit major version
+    // + 16-bit minor version. This limiting metadata to what is supported by
+    // older minor versions. Note that some features will be lost. Defaults to 
+    // to the most recent minor version when zero.
+    uint32_t disk_version;
+#endif
 };
 
 // File info structure
@@ -280,6 +288,27 @@ struct lfs2_info {
     char name[LFS2_NAME_MAX+1];
 };
 
+// Filesystem info structure
+struct lfs2_fsinfo {
+    // On-disk version.
+    uint32_t disk_version;
+
+    // Size of a logical block in bytes.
+    lfs2_size_t block_size;
+
+    // Number of logical blocks in filesystem.
+    lfs2_size_t block_count;
+
+    // Upper limit on the length of file names in bytes.
+    lfs2_size_t name_max;
+
+    // Upper limit on the size of files in bytes.
+    lfs2_size_t file_max;
+
+    // Upper limit on the size of custom attributes in bytes.
+    lfs2_size_t attr_max;
+};
+
 // Custom attribute structure, used to describe custom attributes
 // committed atomically during file writes.
 struct lfs2_attr {
@@ -410,6 +439,7 @@ typedef struct lfs2 {
     } free;
 
     const struct lfs2_config *cfg;
+    lfs2_size_t block_count;
     lfs2_size_t name_max;
     lfs2_size_t file_max;
     lfs2_size_t attr_max;
@@ -534,8 +564,8 @@ int lfs2_file_open(lfs2_t *lfs2, lfs2_file_t *file,
 // are values from the enum lfs2_open_flags that are bitwise-ored together.
 //
 // The config struct provides additional config options per file as described
-// above. The config struct must be allocated while the file is open, and the
-// config struct must be zeroed for defaults and backwards compatibility.
+// above. The config struct must remain allocated while the file is open, and
+// the config struct must be zeroed for defaults and backwards compatibility.
 //
 // Returns a negative error code on failure.
 int lfs2_file_opencfg(lfs2_t *lfs2, lfs2_file_t *file,
@@ -659,6 +689,12 @@ int lfs2_dir_rewind(lfs2_t *lfs2, lfs2_dir_t *dir);
 
 /// Filesystem-level filesystem operations
 
+// Find on-disk info about the filesystem
+//
+// Fills out the fsinfo structure based on the filesystem found on-disk.
+// Returns a negative error code on failure.
+int lfs2_fs_stat(lfs2_t *lfs2, struct lfs2_fsinfo *fsinfo);
+
 // Finds the current size of the filesystem
 //
 // Note: Result is best effort. If files share COW structures, the returned
@@ -676,6 +712,40 @@ lfs2_ssize_t lfs2_fs_size(lfs2_t *lfs2);
 // Returns a negative error code on failure.
 int lfs2_fs_traverse(lfs2_t *lfs2, int (*cb)(void*, lfs2_block_t), void *data);
 
+// Attempt to proactively find free blocks
+//
+// Calling this function is not required, but may allowing the offloading of
+// the expensive block allocation scan to a less time-critical code path.
+//
+// Note: littlefs currently does not persist any found free blocks to disk.
+// This may change in the future.
+//
+// Returns a negative error code on failure. Finding no free blocks is
+// not an error.
+int lfs2_fs_gc(lfs2_t *lfs2);
+
+#ifndef LFS2_READONLY
+// Attempt to make the filesystem consistent and ready for writing
+//
+// Calling this function is not required, consistency will be implicitly
+// enforced on the first operation that writes to the filesystem, but this
+// function allows the work to be performed earlier and without other
+// filesystem changes.
+//
+// Returns a negative error code on failure.
+int lfs2_fs_mkconsistent(lfs2_t *lfs2);
+#endif
+
+#ifndef LFS2_READONLY
+// Grows the filesystem to a new size, updating the superblock with the new
+// block count.
+//
+// Note: This is irreversible.
+//
+// Returns a negative error code on failure.
+int lfs2_fs_grow(lfs2_t *lfs2, lfs2_size_t block_count);
+#endif
+
 #ifndef LFS2_READONLY
 #ifdef LFS2_MIGRATE
 // Attempts to migrate a previous version of littlefs
diff --git a/lib/littlefs/lfs2_util.h b/lib/littlefs/lfs2_util.h
index 6a4c8ffb50..dd2cbcc106 100644
--- a/lib/littlefs/lfs2_util.h
+++ b/lib/littlefs/lfs2_util.h
@@ -167,10 +167,9 @@ static inline int lfs2_scmp(uint32_t a, uint32_t b) {
 
 // Convert between 32-bit little-endian and native order
 static inline uint32_t lfs2_fromle32(uint32_t a) {
-#if !defined(LFS2_NO_INTRINSICS) && ( \
-    (defined(  BYTE_ORDER  ) && defined(  ORDER_LITTLE_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_LITTLE_ENDIAN  ) || \
+#if (defined(  BYTE_ORDER  ) && defined(  ORDER_LITTLE_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_LITTLE_ENDIAN  ) || \
     (defined(__BYTE_ORDER  ) && defined(__ORDER_LITTLE_ENDIAN  ) && __BYTE_ORDER   == __ORDER_LITTLE_ENDIAN  ) || \
-    (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__))
+    (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
     return a;
 #elif !defined(LFS2_NO_INTRINSICS) && ( \
     (defined(  BYTE_ORDER  ) && defined(  ORDER_BIG_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_BIG_ENDIAN  ) || \
@@ -196,10 +195,9 @@ static inline uint32_t lfs2_frombe32(uint32_t a) {
     (defined(__BYTE_ORDER  ) && defined(__ORDER_LITTLE_ENDIAN  ) && __BYTE_ORDER   == __ORDER_LITTLE_ENDIAN  ) || \
     (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__))
     return __builtin_bswap32(a);
-#elif !defined(LFS2_NO_INTRINSICS) && ( \
-    (defined(  BYTE_ORDER  ) && defined(  ORDER_BIG_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_BIG_ENDIAN  ) || \
+#elif (defined(  BYTE_ORDER  ) && defined(  ORDER_BIG_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_BIG_ENDIAN  ) || \
     (defined(__BYTE_ORDER  ) && defined(__ORDER_BIG_ENDIAN  ) && __BYTE_ORDER   == __ORDER_BIG_ENDIAN  ) || \
-    (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+    (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
     return a;
 #else
     return (((uint8_t*)&a)[0] << 24) |

From 303ccca7c62bd48b9f6a519549caf0d0f3d2624e Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Sat, 21 Oct 2023 17:40:27 +1100
Subject: [PATCH 088/310] all: Replace "black" with "ruff format".

- Add config for [tool.ruff.format] to pyproject.toml.
- Update pre-commit to run both ruff and ruff-format (and only check C
  files when running codeformat.py)
- Update CI.
- Simplify codeformat.py to remove all the Python-specific logic (just run
  "ruff format" directly).

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 .github/workflows/code_formatting.yml |  4 +--
 .github/workflows/ruff.yml            |  5 ++--
 .pre-commit-config.yaml               |  7 +++--
 pyproject.toml                        | 22 +++++++++-----
 tools/ci.sh                           | 11 ++++---
 tools/codeformat.py                   | 42 ++++++---------------------
 6 files changed, 38 insertions(+), 53 deletions(-)

diff --git a/.github/workflows/code_formatting.yml b/.github/workflows/code_formatting.yml
index cab0ae55b2..53055a8441 100644
--- a/.github/workflows/code_formatting.yml
+++ b/.github/workflows/code_formatting.yml
@@ -13,9 +13,9 @@ jobs:
     - uses: actions/checkout@v4
     - uses: actions/setup-python@v4
     - name: Install packages
-      run: source tools/ci.sh && ci_code_formatting_setup
+      run: source tools/ci.sh && ci_c_code_formatting_setup
     - name: Run code formatting
-      run: source tools/ci.sh && ci_code_formatting_run
+      run: source tools/ci.sh && ci_c_code_formatting_run
     - name: Check code formatting
       run: git diff --exit-code
 
diff --git a/.github/workflows/ruff.yml b/.github/workflows/ruff.yml
index 0374d766f5..1159a1882d 100644
--- a/.github/workflows/ruff.yml
+++ b/.github/workflows/ruff.yml
@@ -1,10 +1,11 @@
 # https://docs.github.com/en/actions/automating-builds-and-tests/building-and-testing-python
-name: Python code lint with ruff
+name: Python code lint and formatting with ruff
 on: [push, pull_request]
 jobs:
   ruff:
     runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
-    - run: pip install --user ruff==0.1.0
+    - run: pip install --user ruff==0.1.3
     - run: ruff check --output-format=github .
+    - run: ruff format --diff .
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index bfce6a2468..3004bc5677 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -2,8 +2,8 @@ repos:
   - repo: local
     hooks:
       - id: codeformat
-        name: MicroPython codeformat.py for changed files
-        entry: tools/codeformat.py -v -f
+        name: MicroPython codeformat.py for changed C files
+        entry: tools/codeformat.py -v -c -f
         language: python
       - id: verifygitlog
         name: MicroPython git commit message format checker
@@ -12,6 +12,7 @@ repos:
         verbose: true
         stages: [commit-msg]
   - repo: https://github.com/charliermarsh/ruff-pre-commit
-    rev: v0.1.0
+    rev: v0.1.3
     hooks:
       - id: ruff
+      - id: ruff-format
diff --git a/pyproject.toml b/pyproject.toml
index 96e2e3a890..6c813f5a1f 100644
--- a/pyproject.toml
+++ b/pyproject.toml
@@ -1,6 +1,3 @@
-[tool.black]
-line-length = 99
-
 [tool.codespell]
 count = ""
 ignore-regex = '\b[A-Z]{3}\b'
@@ -24,7 +21,12 @@ ACKNOWLEDGEMENTS,\
 """
 
 [tool.ruff]
-exclude = ["lib", "tests"]
+# Exclude third-party code from linting and formatting
+extend-exclude = ["lib"]
+line-length = 99
+target-version = "py37"
+
+[tool.ruff.lint]
 extend-select = ["C9", "PLC"]
 ignore = [
   "E401",
@@ -37,15 +39,21 @@ ignore = [
   "F405",
   "PLC1901",
 ]
-line-length = 337
-target-version = "py37"
 
 [tool.ruff.mccabe]
 max-complexity = 40
 
 [tool.ruff.per-file-ignores]
+# Exclude all tests from linting (does not apply to formatting).
+"tests/**/*.py" = ["ALL"]
 "ports/cc3200/tools/uniflash.py" = ["E711"]
-
 # manifest.py files are evaluated with some global names pre-defined
 "**/manifest.py" = ["F821"]
 "ports/**/boards/**/manifest_*.py" = ["F821"]
+
+[tool.ruff.format]
+# Exclude third-party code, and exclude the following tests:
+#   basics: needs careful attention before applying automatic formatting
+#   repl_: not real python files
+#   viper_args: uses f(*)
+exclude = ["tests/basics/*.py", "tests/*/repl_*.py", "tests/micropython/viper_args.py"]
diff --git a/tools/ci.sh b/tools/ci.sh
index 53e3425699..8dcbbf7765 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -15,17 +15,16 @@ function ci_gcc_arm_setup {
 }
 
 ########################################################################################
-# code formatting
+# c code formatting
 
-function ci_code_formatting_setup {
+function ci_c_code_formatting_setup {
     sudo apt-get install uncrustify
-    pip3 install black
     uncrustify --version
-    black --version
 }
 
-function ci_code_formatting_run {
-    tools/codeformat.py -v
+function ci_c_code_formatting_run {
+    # Only run on C files. The ruff rule runs separately on Python.
+    tools/codeformat.py -v -c
 }
 
 ########################################################################################
diff --git a/tools/codeformat.py b/tools/codeformat.py
index aee9894345..bd37aec467 100755
--- a/tools/codeformat.py
+++ b/tools/codeformat.py
@@ -34,7 +34,6 @@ import subprocess
 
 # Relative to top-level repo dir.
 PATHS = [
-    # C
     "drivers/ninaw10/*.[ch]",
     "extmod/*.[ch]",
     "extmod/btstack/*.[ch]",
@@ -47,14 +46,6 @@ PATHS = [
     "mpy-cross/*.[ch]",
     "ports/**/*.[ch]",
     "py/*.[ch]",
-    # Python
-    "drivers/**/*.py",
-    "examples/**/*.py",
-    "extmod/**/*.py",
-    "ports/**/*.py",
-    "py/**/*.py",
-    "tools/**/*.py",
-    "tests/**/*.py",
 ]
 
 EXCLUSIONS = [
@@ -78,23 +69,12 @@ EXCLUSIONS = [
     "ports/stm32/usbhost/**/*.[ch]",
     # STM32 build includes generated Python code.
     "ports/*/build*",
-    # not real python files
-    "tests/**/repl_*.py",
-    # needs careful attention before applying automatic formatting
-    "tests/basics/*.py",
 ]
 
 # Path to repo top-level dir.
 TOP = os.path.abspath(os.path.join(os.path.dirname(__file__), ".."))
 
 UNCRUSTIFY_CFG = os.path.join(TOP, "tools/uncrustify.cfg")
-PYPROJECT_TOML = os.path.join(TOP, "pyproject.toml")
-
-C_EXTS = (
-    ".c",
-    ".h",
-)
-PY_EXTS = (".py",)
 
 
 def list_files(paths, exclusions=None, prefix=""):
@@ -182,16 +162,11 @@ def main():
     else:
         files = list_files(PATHS, EXCLUSIONS, TOP)
 
-    # Extract files matching a specific language.
-    def lang_files(exts):
-        for file in files:
-            if os.path.splitext(file)[1].lower() in exts:
-                yield file
-
     # Run tool on N files at a time (to avoid making the command line too long).
-    def batch(cmd, files, N=200):
+    def batch(cmd, N=200):
+        files_iter = iter(files)
         while True:
-            file_args = list(itertools.islice(files, N))
+            file_args = list(itertools.islice(files_iter, N))
             if not file_args:
                 break
             subprocess.check_call(cmd + file_args)
@@ -201,18 +176,19 @@ def main():
         command = ["uncrustify", "-c", UNCRUSTIFY_CFG, "-lC", "--no-backup"]
         if not args.v:
             command.append("-q")
-        batch(command, lang_files(C_EXTS))
-        for file in lang_files(C_EXTS):
+        batch(command)
+        for file in files:
             fixup_c(file)
 
-    # Format Python files with black.
+    # Format Python files with "ruff format" (using config in pyproject.toml).
     if format_py:
-        command = ["black", "--fast", "--config={}".format(PYPROJECT_TOML)]
+        command = ["ruff", "format"]
         if args.v:
             command.append("-v")
         else:
             command.append("-q")
-        batch(command, lang_files(PY_EXTS))
+        command.append(".")
+        subprocess.check_call(command, cwd=TOP)
 
 
 if __name__ == "__main__":

From bbd8760bd9a2302e5abee29db279102bb11d7732 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Sat, 21 Oct 2023 17:40:27 +1100
Subject: [PATCH 089/310] all: Update Python formatting to ruff-format.

This updates a small number of files that change with ruff-format's (vs
black's) rules.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 docs/conf.py                                  | 193 ++++++++++--------
 docs/readthedocs/settings/local_settings.py   |   7 +-
 ports/rp2/modules/rp2.py                      |   2 +-
 .../stm32/boards/NUCLEO_WB55/rfcore_debug.py  |   9 +-
 shared/memzip/make-memzip.py                  |  62 +++---
 tests/misc/rge_sm.py                          |   4 +-
 tools/mpremote/mpremote/transport_serial.py   |   2 +-
 tools/mpy-tool.py                             |  10 +-
 tools/pyboard.py                              |   2 +-
 9 files changed, 160 insertions(+), 131 deletions(-)

diff --git a/docs/conf.py b/docs/conf.py
index 49ddd22be9..728e3c4285 100755
--- a/docs/conf.py
+++ b/docs/conf.py
@@ -19,58 +19,56 @@ import os
 # If extensions (or modules to document with autodoc) are in another directory,
 # add these directories to sys.path here. If the directory is relative to the
 # documentation root, use os.path.abspath to make it absolute, like shown here.
-sys.path.insert(0, os.path.abspath('.'))
+sys.path.insert(0, os.path.abspath("."))
 
 # The MICROPY_VERSION env var should be "vX.Y.Z" (or unset).
-micropy_version = os.getenv('MICROPY_VERSION') or 'latest'
-micropy_all_versions = (os.getenv('MICROPY_ALL_VERSIONS') or 'latest').split(',')
-url_pattern = '%s/en/%%s' % (os.getenv('MICROPY_URL_PREFIX') or '/',)
+micropy_version = os.getenv("MICROPY_VERSION") or "latest"
+micropy_all_versions = (os.getenv("MICROPY_ALL_VERSIONS") or "latest").split(",")
+url_pattern = "%s/en/%%s" % (os.getenv("MICROPY_URL_PREFIX") or "/",)
 
 # The members of the html_context dict are available inside topindex.html
 html_context = {
-    'cur_version':micropy_version,
-    'all_versions':[
-        (ver, url_pattern % ver) for ver in micropy_all_versions
+    "cur_version": micropy_version,
+    "all_versions": [(ver, url_pattern % ver) for ver in micropy_all_versions],
+    "downloads": [
+        ("PDF", url_pattern % micropy_version + "/micropython-docs.pdf"),
     ],
-    'downloads':[
-        ('PDF', url_pattern % micropy_version + '/micropython-docs.pdf'),
-    ],
-    'is_release': micropy_version != 'latest',
+    "is_release": micropy_version != "latest",
 }
 
 
 # -- General configuration ------------------------------------------------
 
 # If your documentation needs a minimal Sphinx version, state it here.
-#needs_sphinx = '1.0'
+# needs_sphinx = '1.0'
 
 # Add any Sphinx extension module names here, as strings. They can be
 # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
 # ones.
 extensions = [
-    'sphinx.ext.autodoc',
-    'sphinx.ext.doctest',
-    'sphinx.ext.intersphinx',
-    'sphinx.ext.todo',
-    'sphinx.ext.coverage',
-    'sphinxcontrib.jquery',
+    "sphinx.ext.autodoc",
+    "sphinx.ext.doctest",
+    "sphinx.ext.intersphinx",
+    "sphinx.ext.todo",
+    "sphinx.ext.coverage",
+    "sphinxcontrib.jquery",
 ]
 
 # Add any paths that contain templates here, relative to this directory.
-templates_path = ['templates']
+templates_path = ["templates"]
 
 # The suffix of source filenames.
-source_suffix = '.rst'
+source_suffix = ".rst"
 
 # The encoding of source files.
-#source_encoding = 'utf-8-sig'
+# source_encoding = 'utf-8-sig'
 
 # The master toctree document.
-master_doc = 'index'
+master_doc = "index"
 
 # General information about the project.
-project = 'MicroPython'
-copyright = '- The MicroPython Documentation is Copyright © 2014-2023, Damien P. George, Paul Sokolovsky, and contributors'
+project = "MicroPython"
+copyright = "- The MicroPython Documentation is Copyright © 2014-2023, Damien P. George, Paul Sokolovsky, and contributors"
 
 # The version info for the project you're documenting, acts as replacement for
 # |version| and |release|, also used in various other places throughout the
@@ -82,41 +80,41 @@ version = release = micropy_version
 
 # The language for content autogenerated by Sphinx. Refer to documentation
 # for a list of supported languages.
-#language = None
+# language = None
 
 # There are two options for replacing |today|: either, you set today to some
 # non-false value, then it is used:
-#today = ''
+# today = ''
 # Else, today_fmt is used as the format for a strftime call.
-#today_fmt = '%B %d, %Y'
+# today_fmt = '%B %d, %Y'
 
 # List of patterns, relative to source directory, that match files and
 # directories to ignore when looking for source files.
-exclude_patterns = ['build', '.venv']
+exclude_patterns = ["build", ".venv"]
 
 # The reST default role (used for this markup: `text`) to use for all
 # documents.
-default_role = 'any'
+default_role = "any"
 
 # If true, '()' will be appended to :func: etc. cross-reference text.
-#add_function_parentheses = True
+# add_function_parentheses = True
 
 # If true, the current module name will be prepended to all description
 # unit titles (such as .. function::).
-#add_module_names = True
+# add_module_names = True
 
 # If true, sectionauthor and moduleauthor directives will be shown in the
 # output. They are ignored by default.
-#show_authors = False
+# show_authors = False
 
 # The name of the Pygments (syntax highlighting) style to use.
-pygments_style = 'sphinx'
+pygments_style = "sphinx"
 
 # A list of ignored prefixes for module index sorting.
-#modindex_common_prefix = []
+# modindex_common_prefix = []
 
 # If true, keep warnings as "system message" paragraphs in the built documents.
-#keep_warnings = False
+# keep_warnings = False
 
 # Global include files. Sphinx docs suggest using rst_epilog in preference
 # of rst_prolog, so we follow. Absolute paths below mean "from the base
@@ -128,144 +126,148 @@ rst_epilog = """
 # -- Options for HTML output ----------------------------------------------
 
 # on_rtd is whether we are on readthedocs.org
-on_rtd = os.environ.get('READTHEDOCS', None) == 'True'
+on_rtd = os.environ.get("READTHEDOCS", None) == "True"
 
 if not on_rtd:  # only import and set the theme if we're building docs locally
     try:
         import sphinx_rtd_theme
-        html_theme = 'sphinx_rtd_theme'
-        html_theme_path = [sphinx_rtd_theme.get_html_theme_path(), '.']
+
+        html_theme = "sphinx_rtd_theme"
+        html_theme_path = [sphinx_rtd_theme.get_html_theme_path(), "."]
     except:
-        html_theme = 'default'
-        html_theme_path = ['.']
+        html_theme = "default"
+        html_theme_path = ["."]
 else:
-    html_theme_path = ['.']
+    html_theme_path = ["."]
 
 # Theme options are theme-specific and customize the look and feel of a theme
 # further.  For a list of options available for each theme, see the
 # documentation.
-#html_theme_options = {}
+# html_theme_options = {}
 
 # Add any paths that contain custom themes here, relative to this directory.
 # html_theme_path = ['.']
 
 # The name for this set of Sphinx documents.  If None, it defaults to
 # "<project> v<release> documentation".
-#html_title = None
+# html_title = None
 
 # A shorter title for the navigation bar.  Default is the same as html_title.
-#html_short_title = None
+# html_short_title = None
 
 # The name of an image file (relative to this directory) to place at the top
 # of the sidebar.
-#html_logo = '../../logo/trans-logo.png'
+# html_logo = '../../logo/trans-logo.png'
 
 # The name of an image file (within the static path) to use as favicon of the
 # docs.  This file should be a Windows icon file (.ico) being 16x16 or 32x32
 # pixels large.
-html_favicon = 'static/favicon.ico'
+html_favicon = "static/favicon.ico"
 
 # Add any paths that contain custom static files (such as style sheets) here,
 # relative to this directory. They are copied after the builtin static files,
 # so a file named "default.css" will overwrite the builtin "default.css".
-html_static_path = ['static']
+html_static_path = ["static"]
 
 # Add a custom CSS file for HTML generation
 html_css_files = [
-    'custom.css',
+    "custom.css",
 ]
 # Add any extra paths that contain custom files (such as robots.txt or
 # .htaccess) here, relative to this directory. These files are copied
 # directly to the root of the documentation.
-#html_extra_path = []
+# html_extra_path = []
 
 # If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
 # using the given strftime format.
-html_last_updated_fmt = '%d %b %Y'
+html_last_updated_fmt = "%d %b %Y"
 
 # If true, SmartyPants will be used to convert quotes and dashes to
 # typographically correct entities.
-#html_use_smartypants = True
+# html_use_smartypants = True
 
 # Custom sidebar templates, maps document names to template names.
-#html_sidebars = {}
+# html_sidebars = {}
 
 # Additional templates that should be rendered to pages, maps page names to
 # template names.
 html_additional_pages = {"index": "topindex.html"}
 
 # If false, no module index is generated.
-#html_domain_indices = True
+# html_domain_indices = True
 
 # If false, no index is generated.
-#html_use_index = True
+# html_use_index = True
 
 # If true, the index is split into individual pages for each letter.
-#html_split_index = False
+# html_split_index = False
 
 # If true, links to the reST sources are added to the pages.
-#html_show_sourcelink = True
+# html_show_sourcelink = True
 
 # If true, "Created using Sphinx" is shown in the HTML footer. Default is True.
-#html_show_sphinx = True
+# html_show_sphinx = True
 
 # If true, "(C) Copyright ..." is shown in the HTML footer. Default is True.
-#html_show_copyright = True
+# html_show_copyright = True
 
 # If true, an OpenSearch description file will be output, and all pages will
 # contain a <link> tag referring to it.  The value of this option must be the
 # base URL from which the finished HTML is served.
-#html_use_opensearch = ''
+# html_use_opensearch = ''
 
 # This is the file name suffix for HTML files (e.g. ".xhtml").
-#html_file_suffix = None
+# html_file_suffix = None
 
 # Output file base name for HTML help builder.
-htmlhelp_basename = 'MicroPythondoc'
+htmlhelp_basename = "MicroPythondoc"
 
 
 # -- Options for LaTeX output ---------------------------------------------
 
 latex_elements = {
-# The paper size ('letterpaper' or 'a4paper').
-#'papersize': 'letterpaper',
-
-# The font size ('10pt', '11pt' or '12pt').
-#'pointsize': '10pt',
-
-# Additional stuff for the LaTeX preamble.
-#'preamble': '',
-# Include 3 levels of headers in PDF ToC
-'preamble': r'\setcounter{tocdepth}{2}',
+    # The paper size ('letterpaper' or 'a4paper').
+    #'papersize': 'letterpaper',
+    # The font size ('10pt', '11pt' or '12pt').
+    #'pointsize': '10pt',
+    # Additional stuff for the LaTeX preamble.
+    #'preamble': '',
+    # Include 3 levels of headers in PDF ToC
+    "preamble": r"\setcounter{tocdepth}{2}",
 }
 
 # Grouping the document tree into LaTeX files. List of tuples
 # (source start file, target name, title,
 #  author, documentclass [howto, manual, or own class]).
 latex_documents = [
-  (master_doc, 'MicroPython.tex', 'MicroPython Documentation',
-   'Damien P. George, Paul Sokolovsky, and contributors', 'manual'),
+    (
+        master_doc,
+        "MicroPython.tex",
+        "MicroPython Documentation",
+        "Damien P. George, Paul Sokolovsky, and contributors",
+        "manual",
+    ),
 ]
 
 # The name of an image file (relative to this directory) to place at the top of
 # the title page.
-#latex_logo = None
+# latex_logo = None
 
 # For "manual" documents, if this is true, then toplevel headings are parts,
 # not chapters.
-#latex_use_parts = False
+# latex_use_parts = False
 
 # If true, show page references after internal links.
-#latex_show_pagerefs = False
+# latex_show_pagerefs = False
 
 # If true, show URL addresses after external links.
-#latex_show_urls = False
+# latex_show_urls = False
 
 # Documents to append as an appendix to all manuals.
-#latex_appendices = []
+# latex_appendices = []
 
 # If false, no module index is generated.
-#latex_domain_indices = True
+# latex_domain_indices = True
 
 # Enable better Unicode support so that `make latexpdf` doesn't fail
 latex_engine = "xelatex"
@@ -275,12 +277,17 @@ latex_engine = "xelatex"
 # One entry per manual page. List of tuples
 # (source start file, name, description, authors, manual section).
 man_pages = [
-    ('index', 'micropython', 'MicroPython Documentation',
-     ['Damien P. George, Paul Sokolovsky, and contributors'], 1),
+    (
+        "index",
+        "micropython",
+        "MicroPython Documentation",
+        ["Damien P. George, Paul Sokolovsky, and contributors"],
+        1,
+    ),
 ]
 
 # If true, show URL addresses after external links.
-#man_show_urls = False
+# man_show_urls = False
 
 
 # -- Options for Texinfo output -------------------------------------------
@@ -289,23 +296,29 @@ man_pages = [
 # (source start file, target name, title, author,
 #  dir menu entry, description, category)
 texinfo_documents = [
-  (master_doc, 'MicroPython', 'MicroPython Documentation',
-   'Damien P. George, Paul Sokolovsky, and contributors', 'MicroPython', 'One line description of project.',
-   'Miscellaneous'),
+    (
+        master_doc,
+        "MicroPython",
+        "MicroPython Documentation",
+        "Damien P. George, Paul Sokolovsky, and contributors",
+        "MicroPython",
+        "One line description of project.",
+        "Miscellaneous",
+    ),
 ]
 
 # Documents to append as an appendix to all manuals.
-#texinfo_appendices = []
+# texinfo_appendices = []
 
 # If false, no module index is generated.
-#texinfo_domain_indices = True
+# texinfo_domain_indices = True
 
 # How to display URL addresses: 'footnote', 'no', or 'inline'.
-#texinfo_show_urls = 'footnote'
+# texinfo_show_urls = 'footnote'
 
 # If true, do not generate a @detailmenu in the "Top" node's menu.
-#texinfo_no_detailmenu = False
+# texinfo_no_detailmenu = False
 
 
 # Example configuration for intersphinx: refer to the Python standard library.
-intersphinx_mapping = {'python': ('https://docs.python.org/3.5', None)}
+intersphinx_mapping = {"python": ("https://docs.python.org/3.5", None)}
diff --git a/docs/readthedocs/settings/local_settings.py b/docs/readthedocs/settings/local_settings.py
index 8d2bac7a76..c6145dcc52 100644
--- a/docs/readthedocs/settings/local_settings.py
+++ b/docs/readthedocs/settings/local_settings.py
@@ -1,9 +1,10 @@
 import os
 
 # Directory that the project lives in, aka ../..
-SITE_ROOT = '/'.join(os.path.dirname(__file__).split('/')[0:-2])
+SITE_ROOT = "/".join(os.path.dirname(__file__).split("/")[0:-2])
 
 TEMPLATE_DIRS = (
-    "%s/templates/" % SITE_ROOT, # Your custom template directory, before the RTD one to override it.
-    "%s/readthedocs/templates/" % SITE_ROOT, # Default RTD template dir
+    "%s/templates/"
+    % SITE_ROOT,  # Your custom template directory, before the RTD one to override it.
+    "%s/readthedocs/templates/" % SITE_ROOT,  # Default RTD template dir
 )
diff --git a/ports/rp2/modules/rp2.py b/ports/rp2/modules/rp2.py
index a34e8e92a3..9d13bf1b52 100644
--- a/ports/rp2/modules/rp2.py
+++ b/ports/rp2/modules/rp2.py
@@ -32,7 +32,7 @@ class PIOASMEmit:
         autopull=False,
         push_thresh=32,
         pull_thresh=32,
-        fifo_join=0
+        fifo_join=0,
     ):
         # array is a built-in module so importing it here won't require
         # scanning the filesystem.
diff --git a/ports/stm32/boards/NUCLEO_WB55/rfcore_debug.py b/ports/stm32/boards/NUCLEO_WB55/rfcore_debug.py
index db533f18dc..ccf770c010 100644
--- a/ports/stm32/boards/NUCLEO_WB55/rfcore_debug.py
+++ b/ports/stm32/boards/NUCLEO_WB55/rfcore_debug.py
@@ -114,7 +114,14 @@ def ipcc_init():
     SYS_CMD_BUF = get_ipcc_table_word(TABLE_SYS, 0)
     SYS_SYS_QUEUE = get_ipcc_table_word(TABLE_SYS, 1)
 
-    global MM_BLE_SPARE_EVT_BUF, MM_SYS_SPARE_EVT_BUF, MM_BLE_POOL, MM_BLE_POOL_SIZE, MM_FREE_BUF_QUEUE, MM_EV_POOL, MM_EV_POOL_SIZE
+    global \
+        MM_BLE_SPARE_EVT_BUF, \
+        MM_SYS_SPARE_EVT_BUF, \
+        MM_BLE_POOL, \
+        MM_BLE_POOL_SIZE, \
+        MM_FREE_BUF_QUEUE, \
+        MM_EV_POOL, \
+        MM_EV_POOL_SIZE
     MM_BLE_SPARE_EVT_BUF = get_ipcc_table_word(TABLE_MEM_MANAGER, 0)
     MM_SYS_SPARE_EVT_BUF = get_ipcc_table_word(TABLE_MEM_MANAGER, 1)
     MM_BLE_POOL = get_ipcc_table_word(TABLE_MEM_MANAGER, 2)
diff --git a/shared/memzip/make-memzip.py b/shared/memzip/make-memzip.py
index cc0df82077..92a5d6168b 100755
--- a/shared/memzip/make-memzip.py
+++ b/shared/memzip/make-memzip.py
@@ -15,65 +15,67 @@ import subprocess
 import sys
 import types
 
+
 def create_zip(zip_filename, zip_dir):
     abs_zip_filename = os.path.abspath(zip_filename)
     save_cwd = os.getcwd()
     os.chdir(zip_dir)
     if os.path.exists(abs_zip_filename):
         os.remove(abs_zip_filename)
-    subprocess.check_call(['zip', '-0', '-r', '-D', abs_zip_filename, '.'])
+    subprocess.check_call(["zip", "-0", "-r", "-D", abs_zip_filename, "."])
     os.chdir(save_cwd)
 
+
 def create_c_from_file(c_filename, zip_filename):
-    with open(zip_filename, 'rb') as zip_file:
-        with open(c_filename, 'wb') as c_file:
-            print('#include <stdint.h>', file=c_file)
-            print('', file=c_file)
-            print('const uint8_t memzip_data[] = {', file=c_file)
+    with open(zip_filename, "rb") as zip_file:
+        with open(c_filename, "wb") as c_file:
+            print("#include <stdint.h>", file=c_file)
+            print("", file=c_file)
+            print("const uint8_t memzip_data[] = {", file=c_file)
             while True:
                 buf = zip_file.read(16)
                 if not buf:
                     break
-                print('   ', end='', file=c_file)
+                print("   ", end="", file=c_file)
                 for byte in buf:
                     if isinstance(byte, types.StringType):
-                        print(' 0x{:02x},'.format(ord(byte)), end='', file=c_file)
+                        print(" 0x{:02x},".format(ord(byte)), end="", file=c_file)
                     else:
-                        print(' 0x{:02x},'.format(byte), end='', file=c_file)
-                print('', file=c_file)
-            print('};', file=c_file)
+                        print(" 0x{:02x},".format(byte), end="", file=c_file)
+                print("", file=c_file)
+            print("};", file=c_file)
+
 
 def main():
     parser = argparse.ArgumentParser(
-        prog='make-memzip.py',
-        usage='%(prog)s [options] [command]',
-        description='Generates a C source memzip file.'
+        prog="make-memzip.py",
+        usage="%(prog)s [options] [command]",
+        description="Generates a C source memzip file.",
     )
     parser.add_argument(
-        '-z', '--zip-file',
-        dest='zip_filename',
-        help='Specifies the name of the created zip file.',
-        default='memzip_files.zip'
+        "-z",
+        "--zip-file",
+        dest="zip_filename",
+        help="Specifies the name of the created zip file.",
+        default="memzip_files.zip",
     )
     parser.add_argument(
-        '-c', '--c-file',
-        dest='c_filename',
-        help='Specifies the name of the created C source file.',
-        default='memzip_files.c'
-    )
-    parser.add_argument(
-        dest='source_dir',
-        default='memzip_files'
+        "-c",
+        "--c-file",
+        dest="c_filename",
+        help="Specifies the name of the created C source file.",
+        default="memzip_files.c",
     )
+    parser.add_argument(dest="source_dir", default="memzip_files")
     args = parser.parse_args(sys.argv[1:])
 
-    print('args.zip_filename =', args.zip_filename)
-    print('args.c_filename =', args.c_filename)
-    print('args.source_dir =', args.source_dir)
+    print("args.zip_filename =", args.zip_filename)
+    print("args.c_filename =", args.c_filename)
+    print("args.source_dir =", args.source_dir)
 
     create_zip(args.zip_filename, args.source_dir)
     create_c_from_file(args.c_filename, args.zip_filename)
 
+
 if __name__ == "__main__":
     main()
-
diff --git a/tests/misc/rge_sm.py b/tests/misc/rge_sm.py
index 00b0a7a021..5e071687c4 100644
--- a/tests/misc/rge_sm.py
+++ b/tests/misc/rge_sm.py
@@ -136,6 +136,4 @@ def singleTraj(system, trajStart, h=0.02, tend=1.0):
 # phaseDiagram(sysSM, (lambda i, j: [0.354, 0.654, 1.278, 0.8 + 0.2 * i, 0.1 + 0.1 * j]), (lambda a: (a[4], a[5])), h=0.1, tend=math.log(10**17))
 
 # initial conditions at M_Z
-singleTraj(
-    sysSM, [0.354, 0.654, 1.278, 0.983, 0.131], h=0.5, tend=math.log(10**17)
-)  # true values
+singleTraj(sysSM, [0.354, 0.654, 1.278, 0.983, 0.131], h=0.5, tend=math.log(10**17))  # true values
diff --git a/tools/mpremote/mpremote/transport_serial.py b/tools/mpremote/mpremote/transport_serial.py
index e04f5b4ac9..23a379d16b 100644
--- a/tools/mpremote/mpremote/transport_serial.py
+++ b/tools/mpremote/mpremote/transport_serial.py
@@ -331,7 +331,7 @@ class SerialTransport(Transport):
     def fs_stat(self, src):
         try:
             self.exec("import os")
-            return os.stat_result(self.eval("os.stat(%s)" % (("'%s'" % src)), parse=True))
+            return os.stat_result(self.eval("os.stat(%s)" % ("'%s'" % src), parse=True))
         except TransportError as e:
             reraise_filesystem_error(e, src)
 
diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py
index 95b2c492d9..8d86c10173 100755
--- a/tools/mpy-tool.py
+++ b/tools/mpy-tool.py
@@ -1454,7 +1454,15 @@ def freeze_mpy(firmware_qstr_idents, compiled_modules):
     # As in qstr.c, set so that the first dynamically allocated pool is twice this size; must be <= the len
     qstr_pool_alloc = min(len(new), 10)
 
-    global bc_content, const_str_content, const_int_content, const_obj_content, const_table_qstr_content, const_table_ptr_content, raw_code_count, raw_code_content
+    global \
+        bc_content, \
+        const_str_content, \
+        const_int_content, \
+        const_obj_content, \
+        const_table_qstr_content, \
+        const_table_ptr_content, \
+        raw_code_count, \
+        raw_code_content
     qstr_content = 0
     bc_content = 0
     const_str_content = 0
diff --git a/tools/pyboard.py b/tools/pyboard.py
index 723e43c01e..c422b64ac5 100755
--- a/tools/pyboard.py
+++ b/tools/pyboard.py
@@ -546,7 +546,7 @@ class Pyboard:
     def fs_stat(self, src):
         try:
             self.exec_("import os")
-            return os.stat_result(self.eval("os.stat(%s)" % (("'%s'" % src)), parse=True))
+            return os.stat_result(self.eval("os.stat(%s)" % ("'%s'" % src), parse=True))
         except PyboardError as e:
             raise e.convert(src)
 

From aa329d11ea375b692342e76304b764b688a5f371 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 3 Nov 2023 13:32:19 +1100
Subject: [PATCH 090/310] top: Update .git-blame-ignore-revs for latest
 formatting commit.

Signed-off-by: Damien George <damien@micropython.org>
---
 .git-blame-ignore-revs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.git-blame-ignore-revs b/.git-blame-ignore-revs
index 637f2ec3d1..690e5f46a4 100644
--- a/.git-blame-ignore-revs
+++ b/.git-blame-ignore-revs
@@ -1,3 +1,6 @@
+# all: Update Python formatting to ruff-format.
+bbd8760bd9a2302e5abee29db279102bb11d7732
+
 # all: Fix various spelling mistakes found by codespell 2.2.6.
 cf490a70917a1b2d38ba9b58e763e0837d0f7ca7
 

From 2eda5138701d6a7d36f8d8e3700d136b3c1161b7 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 3 Aug 2023 15:57:02 +1000
Subject: [PATCH 091/310] py/mkrules.mk: Add rule for compiling auto-generated
 source files.

This prevents each port Makefile from having to add an explicit rule for
`build-BOARD/pins_BOARD.c`.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/cc3200/application.mk | 3 ---
 ports/mimxrt/Makefile       | 3 ---
 ports/nrf/Makefile          | 3 ---
 ports/renesas-ra/Makefile   | 3 ---
 ports/stm32/Makefile        | 3 ---
 py/mkrules.mk               | 4 ++++
 shared/memzip/README.md     | 3 ---
 7 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index deee201eef..7a8fb8d943 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -241,6 +241,3 @@ $(OBJ): | $(GEN_PINS_HDR)
 $(GEN_PINS_SRC) $(GEN_PINS_HDR) $(GEN_PINS_QSTR): $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "Create $@"
 	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) > $(GEN_PINS_SRC)
-
-$(BUILD)/pins.o: $(BUILD)/pins.c
-	$(call compile_c)
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index 6131a509d8..c22c5442a9 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -510,7 +510,4 @@ $(BUILD)/%_gen.c $(HEADER_BUILD)/%.h: $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PR
 		--iomux $(abspath $(TOP)/$(MCU_DIR)/drivers/fsl_iomuxc.h) \
 		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) > $(GEN_PINS_SRC)
 
-$(GEN_PINS_SRC:.c=.o): $(GEN_PINS_SRC)
-	$(call compile_c)
-
 include $(TOP)/py/mkrules.mk
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index ac86ad2b15..abc1ed497d 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -547,9 +547,6 @@ $(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qst
 	$(ECHO) "Create $@"
 	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
 
-$(GEN_PINS_SRC:.c=.o): $(GEN_PINS_SRC)
-	$(call compile_c)
-
 $(PY_BUILD)/nlr%.o: CFLAGS += -Os -fno-lto
 
 include ../../py/mkrules.mk
diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index fb7bb67e48..943ed6d9bf 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -586,9 +586,6 @@ $(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_
 	$(ECHO) "GEN $@"
 	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --ad-const $(GEN_PINS_AD_CONST) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
 
-#$(BUILD)/pins_$(BOARD).o: $(BUILD)/pins_$(BOARD).c
-#	$(call compile_c)
-
 CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h
 
 include $(TOP)/py/mkrules.mk
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index d3b80ab5b1..8d920ae953 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -684,9 +684,6 @@ $(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_
 		--af-defs $(GEN_PINS_AF_DEFS) --af-defs-cmp-strings \
 		--af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
 
-$(GEN_PINS_SRC:.c=.o): $(GEN_PINS_SRC)
-	$(call compile_c)
-
 modmachine.c: $(GEN_PLLFREQTABLE_HDR)
 $(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
diff --git a/py/mkrules.mk b/py/mkrules.mk
index 8b21c7974d..5076559328 100644
--- a/py/mkrules.mk
+++ b/py/mkrules.mk
@@ -97,6 +97,10 @@ $(BUILD)/%.pp: %.c
 	$(ECHO) "PreProcess $<"
 	$(Q)$(CPP) $(CFLAGS) -Wp,-C,-dD,-dI -o $@ $<
 
+# Special case for compiling auto-generated source files.
+$(BUILD)/%.o: $(BUILD)/%.c
+	$(call compile_c)
+
 # The following rule uses | to create an order only prerequisite. Order only
 # prerequisites only get built if they don't exist. They don't cause timestamp
 # checking to be performed.
diff --git a/shared/memzip/README.md b/shared/memzip/README.md
index 3938e3198c..6ffe1d2c6f 100644
--- a/shared/memzip/README.md
+++ b/shared/memzip/README.md
@@ -18,9 +18,6 @@ OBJ += $(BUILD)/memzip-files.o
 
 MAKE_MEMZIP = ../shared/memzip/make-memzip.py
 
-$(BUILD)/memzip-files.o: $(BUILD)/memzip-files.c
-    $(call compile_c)
-
 $(BUILD)/memzip-files.c: $(shell find ${MEMZIP_DIR} -type f)
     @$(ECHO) "Creating $@"
     $(Q)$(PYTHON) $(MAKE_MEMZIP) --zip-file $(BUILD)/memzip-files.zip --c-file $@ $(MEMZIP_DIR)

From c3c7c602da724b697a71c19ebce3e49c67e760f6 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 3 Aug 2023 14:41:25 +1000
Subject: [PATCH 092/310] rp2/boards/make-pins.py: Don't generate qstrs.

Also remove af-const header, as this is left over from the STM32 version
and unused.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/rp2/CMakeLists.txt      |  5 ++-
 ports/rp2/boards/make-pins.py | 65 -----------------------------------
 2 files changed, 2 insertions(+), 68 deletions(-)

diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 16f2d8a247..4a0d2fbad7 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -479,7 +479,6 @@ set(GEN_PINS_PREFIX "${MICROPY_BOARDS_DIR}/rp2_prefix.c")
 set(GEN_PINS_MKPINS "${MICROPY_BOARDS_DIR}/make-pins.py")
 set(GEN_PINS_SRC "${CMAKE_BINARY_DIR}/pins_${MICROPY_BOARD}.c")
 set(GEN_PINS_HDR "${MICROPY_GENHDR_DIR}/pins.h")
-set(GEN_PINS_QSTR "${CMAKE_BINARY_DIR}/pins_qstr.h")
 set(GEN_PINS_AF_CONST "${MICROPY_GENHDR_DIR}/pins_af_const.h")
 set(GEN_PINS_AF_PY "${CMAKE_BINARY_DIR}/pins_af.py")
 
@@ -494,9 +493,9 @@ target_sources(${MICROPY_TARGET} PRIVATE
 
 # Generate pins
 add_custom_command(
-    OUTPUT ${GEN_PINS_HDR} ${GEN_PINS_SRC} ${GEN_PINS_QSTR}
+    OUTPUT ${GEN_PINS_HDR} ${GEN_PINS_SRC}
     COMMAND ${Python3_EXECUTABLE} ${GEN_PINS_MKPINS} ${GEN_PINS_CSV_ARG} --af ${GEN_PINS_AF_CSV} --prefix ${GEN_PINS_PREFIX}
-    --hdr ${GEN_PINS_HDR} --qstr ${GEN_PINS_QSTR} --af-const ${GEN_PINS_AF_CONST} --af-py ${GEN_PINS_AF_PY} > ${GEN_PINS_SRC}
+    --hdr ${GEN_PINS_HDR} --af-py ${GEN_PINS_AF_PY} > ${GEN_PINS_SRC}
     DEPENDS
         ${GEN_PINS_AF_CSV}
         ${GEN_PINS_BOARD_CSV}
diff --git a/ports/rp2/boards/make-pins.py b/ports/rp2/boards/make-pins.py
index 97c0ff6384..4029d7b1cf 100755
--- a/ports/rp2/boards/make-pins.py
+++ b/ports/rp2/boards/make-pins.py
@@ -68,15 +68,6 @@ class AlternateFunction(object):
     def is_supported(self):
         return self.supported
 
-    def ptr(self):
-        """Returns the numbered function (i.e. USART6) for this AF."""
-        if self.fn_num is None:
-            return self.func
-        return "{:s}{:d}".format(self.func, self.fn_num)
-
-    def mux_name(self):
-        return "AF{:d}_{:s}".format(self.idx, self.ptr())
-
     def print(self):
         """Prints the C representation of this AF."""
         if self.supported:
@@ -88,9 +79,6 @@ class AlternateFunction(object):
             fn_num = 0
         print("({:d}, {:4s}, {:d}), // {:s}".format(self.idx, self.func, fn_num, self.af_str))
 
-    def qstr_list(self):
-        return [self.mux_name()]
-
 
 class Pin(object):
     """Holds the information associated with a pin."""
@@ -164,13 +152,6 @@ class Pin(object):
         if self.alt_fn_count > 0:
             hdr_file.write("extern const machine_pin_af_obj_t pin_{:s}_af[];\n".format(n))
 
-    def qstr_list(self):
-        result = []
-        for alt_fn in self.alt_fn:
-            if alt_fn.is_supported():
-                result += alt_fn.qstr_list()
-        return result
-
 
 class NamedPin(object):
     def __init__(self, name, pin):
@@ -303,37 +284,6 @@ class Pins(object):
                         )
                     )
 
-    def print_qstr(self, qstr_filename):
-        with open(qstr_filename, "wt") as qstr_file:
-            qstr_set = set([])
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    qstr_set |= set(pin.qstr_list())
-                    qstr_set |= set([named_pin.name()])
-            for named_pin in self.board_pins:
-                qstr_set |= set([named_pin.name()])
-            for qstr in sorted(qstr_set):
-                print("Q({})".format(qstr), file=qstr_file)
-
-    def print_af_hdr(self, af_const_filename):
-        with open(af_const_filename, "wt") as af_const_file:
-            af_hdr_set = set([])
-            mux_name_width = 0
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    for af in pin.alt_fn:
-                        if af.is_supported():
-                            mux_name = af.mux_name()
-                            af_hdr_set |= set([mux_name])
-                            if len(mux_name) > mux_name_width:
-                                mux_name_width = len(mux_name)
-            for mux_name in sorted(af_hdr_set):
-                key = "MP_OBJ_NEW_QSTR(MP_QSTR_{}),".format(mux_name)
-                val = "MP_OBJ_NEW_SMALL_INT(GPIO_{})".format(mux_name)
-                print("    { %-*s %s }," % (mux_name_width + 26, key, val), file=af_const_file)
-
     def print_af_py(self, af_py_filename):
         with open(af_py_filename, "wt") as af_py_file:
             print("PINS_AF = (", file=af_py_file)
@@ -359,12 +309,6 @@ def main():
         help="Specifies the alternate function file for the chip",
         default="rp2_af.csv",
     )
-    parser.add_argument(
-        "--af-const",
-        dest="af_const_filename",
-        help="Specifies header file for alternate function constants.",
-        default="build/pins_af_const.h",
-    )
     parser.add_argument(
         "--af-py",
         dest="af_py_filename",
@@ -384,13 +328,6 @@ def main():
         help="Specifies beginning portion of generated pins file",
         default="rp2_prefix.c",
     )
-    parser.add_argument(
-        "-q",
-        "--qstr",
-        dest="qstr_filename",
-        help="Specifies name of generated qstr header file",
-        default="build/pins_qstr.h",
-    )
     parser.add_argument(
         "-r",
         "--hdr",
@@ -419,8 +356,6 @@ def main():
             print(prefix_file.read())
     pins.print()
     pins.print_header(args.hdr_filename, True)
-    pins.print_qstr(args.qstr_filename)
-    pins.print_af_hdr(args.af_const_filename)
     pins.print_af_py(args.af_py_filename)
 
 

From fc54d25a456359fdf044f28d2700b658e323c6e5 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 3 Aug 2023 15:21:32 +1000
Subject: [PATCH 093/310] stm32/boards/make-pins.py: Don't generate qstrs.

Qstrs are picked up from the generated pin source files in the usual qstr
processing stage.

Similarly for the stm constant qstrs.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/Makefile            | 26 +++++++++-------------
 ports/stm32/boards/make-pins.py | 38 ---------------------------------
 ports/stm32/make-stmconst.py    | 30 ++++++--------------------
 ports/stm32/mboot/Makefile      |  3 +--
 4 files changed, 17 insertions(+), 80 deletions(-)

diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index 8d920ae953..3bb18ee3cb 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -25,12 +25,11 @@ include ../../py/mkenv.mk
 -include mpconfigport.mk
 include $(BOARD_DIR)/mpconfigboard.mk
 
-# Files that are generated and needed before the QSTR build.
-QSTR_GENERATED_HEADERS = $(GEN_PINS_QSTR) $(GEN_STMCONST_QSTR)
-
 # qstr definitions (must come before including py.mk)
-QSTR_DEFS += qstrdefsport.h $(QSTR_GENERATED_HEADERS)
-QSTR_GLOBAL_DEPENDENCIES += mpconfigboard_common.h $(BOARD_DIR)/mpconfigboard.h $(QSTR_GENERATED_HEADERS)
+QSTR_DEFS += qstrdefsport.h
+
+# Files that are generated and needed before the QSTR build.
+QSTR_GLOBAL_DEPENDENCIES += mpconfigboard_common.h $(BOARD_DIR)/mpconfigboard.h $(GEN_STMCONST_HDR)
 
 # MicroPython feature configurations
 MICROPY_ROM_TEXT_COMPRESSION ?= 1
@@ -71,7 +70,6 @@ BOARD_PINS = $(BOARD_DIR)/pins.csv
 PREFIX_FILE = boards/stm32f4xx_prefix.c
 GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
 GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
 GEN_PINS_AF_DEFS = $(HEADER_BUILD)/pins_af_defs.h
 GEN_PINS_AF_PY = $(BUILD)/pins_af.py
@@ -86,7 +84,6 @@ GEN_CDCINF_HEADER = $(HEADER_BUILD)/pybcdc_inf.h
 
 GEN_PLLFREQTABLE_HDR = $(HEADER_BUILD)/pllfreqtable.h
 GEN_STMCONST_HDR = $(HEADER_BUILD)/modstm_const.h
-GEN_STMCONST_QSTR = $(BUILD)/modstm_qstr.h
 GEN_STMCONST_MPZ = $(HEADER_BUILD)/modstm_mpz.h
 CMSIS_MCU_HDR = $(STM32LIB_CMSIS_ABS)/Include/$(CMSIS_MCU_LOWER).h
 
@@ -655,7 +652,7 @@ $(BUILD)/firmware.elf: $(OBJ)
 	$(call GENERATE_ELF,$@,$^)
 
 # List of sources for qstr extraction
-SRC_QSTR += $(SRC_C) $(SRC_CXX) $(SHARED_SRC_C)
+SRC_QSTR += $(SRC_C) $(SRC_CXX) $(SHARED_SRC_C) $(GEN_PINS_SRC)
 # Append any auto-generated sources that are needed by sources listed in
 # SRC_QSTR
 SRC_QSTR_AUTO_DEPS += $(GEN_CDCINF_HEADER)
@@ -676,13 +673,12 @@ main.c: $(GEN_CDCINF_HEADER)
 
 # Use a pattern rule here so that make will only call make-pins.py once to make
 # both pins_$(BOARD).c and pins.h
-$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_BUILD)/%_af_defs.h $(BUILD)/%_qstr.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
+$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_BUILD)/%_af_defs.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
 	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) \
 		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --hdr-obj-decls \
-		--qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) \
-		--af-defs $(GEN_PINS_AF_DEFS) --af-defs-cmp-strings \
-		--af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+		--af-const $(GEN_PINS_AF_CONST) --af-defs $(GEN_PINS_AF_DEFS) \
+		--af-defs-cmp-strings --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
 
 modmachine.c: $(GEN_PLLFREQTABLE_HDR)
 $(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
@@ -690,11 +686,9 @@ $(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
 	$(Q)$(PYTHON) $(PLLVALUES) -c -m $(CMSIS_MCU_LOWER) file:$(BOARD_DIR)/stm32$(MCU_SERIES)xx_hal_conf.h > $@
 
 $(BUILD)/modstm.o: $(GEN_STMCONST_HDR)
-# Use a pattern rule here so that make will only call make-stmconst.py once to
-# make both modstm_const.h and modstm_qstr.h
-$(HEADER_BUILD)/%_const.h $(BUILD)/%_qstr.h: $(CMSIS_MCU_HDR) make-stmconst.py | $(HEADER_BUILD)
+$(HEADER_BUILD)/modstm_const.h: $(CMSIS_MCU_HDR) make-stmconst.py | $(HEADER_BUILD)
 	$(ECHO) "GEN stmconst $@"
-	$(Q)$(PYTHON) make-stmconst.py --qstr $(GEN_STMCONST_QSTR) --mpz $(GEN_STMCONST_MPZ) $(CMSIS_MCU_HDR) > $(GEN_STMCONST_HDR)
+	$(Q)$(PYTHON) make-stmconst.py --mpz $(GEN_STMCONST_MPZ) $(CMSIS_MCU_HDR) > $(GEN_STMCONST_HDR)
 
 $(GEN_CDCINF_HEADER): $(GEN_CDCINF_FILE) $(FILE2H) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py
index a3e6ee0669..f0fcb82437 100755
--- a/ports/stm32/boards/make-pins.py
+++ b/ports/stm32/boards/make-pins.py
@@ -188,9 +188,6 @@ class AlternateFunction(object):
         )
         print_conditional_endif(cond_var)
 
-    def qstr_list(self):
-        return [self.mux_name()]
-
 
 class Pin(object):
     """Holds the information associated with a pin."""
@@ -301,13 +298,6 @@ class Pin(object):
         if self.alt_fn_count > 0:
             hdr_file.write("extern const pin_af_obj_t pin_{:s}_af[];\n".format(n))
 
-    def qstr_list(self):
-        result = []
-        for alt_fn in self.alt_fn:
-            if alt_fn.is_supported():
-                result += alt_fn.qstr_list()
-        return result
-
 
 class NamedPin(object):
     def __init__(self, name, pin):
@@ -462,26 +452,6 @@ class Pins(object):
                     )
                 )
 
-    def print_qstr(self, qstr_filename):
-        with open(qstr_filename, "wt") as qstr_file:
-            qstr_set = set([])
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    qstr_set |= set(pin.qstr_list())
-                    qstr_set |= set([named_pin.name()])
-            for named_pin in self.board_pins:
-                if not named_pin.is_hidden():
-                    qstr_set |= set([named_pin.name()])
-            for qstr in sorted(qstr_set):
-                cond_var = None
-                if qstr.startswith("AF"):
-                    af_words = qstr.split("_")
-                    cond_var = conditional_var(af_words[1])
-                    print_conditional_if(cond_var, file=qstr_file)
-                print("Q({})".format(qstr), file=qstr_file)
-                print_conditional_endif(cond_var, file=qstr_file)
-
     def print_af_hdr(self, af_const_filename):
         with open(af_const_filename, "wt") as af_const_file:
             af_hdr_set = set([])
@@ -597,13 +567,6 @@ def main():
         help="Specifies beginning portion of generated pins file",
         default="stm32f4xx_prefix.c",
     )
-    parser.add_argument(
-        "-q",
-        "--qstr",
-        dest="qstr_filename",
-        help="Specifies name of generated qstr header file",
-        default="build/pins_qstr.h",
-    )
     parser.add_argument(
         "-r",
         "--hdr",
@@ -640,7 +603,6 @@ def main():
     for i in range(1, 4):
         pins.print_adc(i)
     pins.print_header(args.hdr_filename, args.hdr_obj_decls)
-    pins.print_qstr(args.qstr_filename)
     pins.print_af_hdr(args.af_const_filename)
     pins.print_af_py(args.af_py_filename)
     pins.print_af_defs(args.af_defs_filename, args.af_defs_cmp_strings)
diff --git a/ports/stm32/make-stmconst.py b/ports/stm32/make-stmconst.py
index 4e4f2d7155..6d64fe3cfa 100644
--- a/ports/stm32/make-stmconst.py
+++ b/ports/stm32/make-stmconst.py
@@ -183,22 +183,20 @@ def print_int_obj(val, needed_mpzs):
         needed_mpzs.add(val)
 
 
-def print_periph(periph_name, periph_val, needed_qstrs, needed_mpzs):
+def print_periph(periph_name, periph_val, needed_mpzs):
     qstr = periph_name.upper()
     print("{ MP_ROM_QSTR(MP_QSTR_%s), " % qstr, end="")
     print_int_obj(periph_val, needed_mpzs)
     print(" },")
-    needed_qstrs.add(qstr)
 
 
-def print_regs(reg_name, reg_defs, needed_qstrs, needed_mpzs):
+def print_regs(reg_name, reg_defs, needed_mpzs):
     reg_name = reg_name.upper()
     for r in reg_defs:
         qstr = reg_name + "_" + r[0]
         print("{ MP_ROM_QSTR(MP_QSTR_%s), " % qstr, end="")
         print_int_obj(r[1], needed_mpzs)
         print(" }, // %s-bits, %s" % (r[2], r[3]))
-        needed_qstrs.add(qstr)
 
 
 # This version of print regs groups registers together into submodules (eg GPIO submodule).
@@ -208,7 +206,7 @@ def print_regs(reg_name, reg_defs, needed_qstrs, needed_mpzs):
 # As such, we don't use this version.
 # And for the number of constants we have, this function seems to use about the same amount
 # of ROM as print_regs.
-def print_regs_as_submodules(reg_name, reg_defs, modules, needed_qstrs):
+def print_regs_as_submodules(reg_name, reg_defs, modules):
     mod_name_lower = reg_name.lower() + "_"
     mod_name_upper = mod_name_lower.upper()
     modules.append((mod_name_lower, mod_name_upper))
@@ -220,14 +218,12 @@ STATIC const mp_rom_map_elem_t stm_%s_globals_table[] = {
 """
         % (mod_name_lower, mod_name_upper)
     )
-    needed_qstrs.add(mod_name_upper)
 
     for r in reg_defs:
         print(
             "    { MP_ROM_QSTR(MP_QSTR_%s), MP_ROM_INT(%#x) }, // %s-bits, %s"
             % (r[0], r[1], r[2], r[3])
         )
-        needed_qstrs.add(r[0])
 
     print(
         """};
@@ -247,13 +243,6 @@ const mp_obj_module_t stm_%s_obj = {
 def main():
     cmd_parser = argparse.ArgumentParser(description="Extract ST constants from a C header file.")
     cmd_parser.add_argument("file", nargs=1, help="input file")
-    cmd_parser.add_argument(
-        "-q",
-        "--qstr",
-        dest="qstr_filename",
-        default="build/stmconst_qstr.h",
-        help="Specified the name of the generated qstr header file",
-    )
     cmd_parser.add_argument(
         "--mpz",
         dest="mpz_filename",
@@ -269,14 +258,13 @@ def main():
         reg_defs["GPIO"].append(["BSRRL", 0x18, 16, "legacy register"])
         reg_defs["GPIO"].append(["BSRRH", 0x1A, 16, "legacy register"])
 
-    needed_qstrs = set()
     needed_mpzs = set()
 
     print("// Automatically generated from %s by make-stmconst.py" % args.file[0])
     print("")
 
     for periph_name, periph_val in periphs:
-        print_periph(periph_name, periph_val, needed_qstrs, needed_mpzs)
+        print_periph(periph_name, periph_val, needed_mpzs)
 
     for reg in (
         "ADC",
@@ -309,8 +297,8 @@ def main():
         "IPCC",
     ):
         if reg in reg_defs:
-            print_regs(reg, reg_defs[reg], needed_qstrs, needed_mpzs)
-        # print_regs_as_submodules(reg, reg_defs[reg], modules, needed_qstrs)
+            print_regs(reg, reg_defs[reg], needed_mpzs)
+        # print_regs_as_submodules(reg, reg_defs[reg], modules)
 
     # print("#define MOD_STM_CONST_MODULES \\")
     # for mod_lower, mod_upper in modules:
@@ -318,12 +306,6 @@ def main():
 
     print("")
 
-    with open(args.qstr_filename, "wt") as qstr_file:
-        print("#if MICROPY_PY_STM_CONST", file=qstr_file)
-        for qstr in sorted(needed_qstrs):
-            print("Q({})".format(qstr), file=qstr_file)
-        print("#endif // MICROPY_PY_STM_CONST", file=qstr_file)
-
     with open(args.mpz_filename, "wt") as mpz_file:
         for mpz in sorted(needed_mpzs):
             assert 0 <= mpz <= 0xFFFFFFFF
diff --git a/ports/stm32/mboot/Makefile b/ports/stm32/mboot/Makefile
index 54fc8f4830..a37b046ca5 100755
--- a/ports/stm32/mboot/Makefile
+++ b/ports/stm32/mboot/Makefile
@@ -227,7 +227,6 @@ GEN_QSTRDEFS_GENERATED = $(HEADER_BUILD)/qstrdefs.generated.h
 GEN_ROOT_POINTERS = $(HEADER_BUILD)/root_pointers.h
 GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-GEN_PINS_QSTR = $(HEADER_BUILD)/pins_qstr.h
 GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
 GEN_PINS_AF_DEFS = $(HEADER_BUILD)/pins_af_defs.h
 GEN_PINS_AF_PY = $(BUILD)/pins_af.py
@@ -246,7 +245,7 @@ $(GEN_ROOT_POINTERS): | $(HEADER_BUILD)
 $(GEN_PINS_AF_DEFS): $(BOARD_PINS) $(MAKE_PINS) ../$(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
 	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af ../$(AF_FILE) \
-		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) \
+		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) \
 		--af-const $(GEN_PINS_AF_CONST) --af-defs $(GEN_PINS_AF_DEFS) \
 		--af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
 

From 3f99dbd634f728e98ef5b14f838ecb62ff946d0a Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 3 Aug 2023 15:25:44 +1000
Subject: [PATCH 094/310] nrf/boards/make-pins.py: Don't generate qstrs.

The output pins.c can be processed for qstrs like any other C file.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/nrf/Makefile            |  9 ++++-----
 ports/nrf/boards/make-pins.py | 31 -------------------------------
 2 files changed, 4 insertions(+), 36 deletions(-)

diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index abc1ed497d..7d7589cc20 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -51,7 +51,7 @@ endif
 -include boards/$(BOARD)/modules/boardmodules.mk
 
 # qstr definitions (must come before including py.mk)
-QSTR_DEFS = qstrdefsport.h $(GEN_PINS_QSTR)
+QSTR_DEFS = qstrdefsport.h
 
 # MicroPython feature configurations
 ifeq ($(DEBUG), 0)
@@ -118,7 +118,6 @@ AF_FILE = $(MCU_VARIANT)_af.csv
 PREFIX_FILE = boards/$(MCU_VARIANT)_prefix.c
 GEN_PINS_SRC = $(BUILD)/pins_gen.c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
 GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
 GEN_PINS_AF_PY = $(BUILD)/pins_af.py
 
@@ -528,7 +527,7 @@ $(BUILD)/$(OUTPUT_FILENAME).elf: $(OBJ)
 	$(Q)$(SIZE) $@
 
 # List of sources for qstr extraction
-SRC_QSTR += $(SRC_C) $(SRC_SHARED_C) $(DRIVERS_SRC_C) $(SRC_BOARD_MODULES)
+SRC_QSTR += $(SRC_C) $(SRC_SHARED_C) $(DRIVERS_SRC_C) $(SRC_BOARD_MODULES) $(GEN_PINS_SRC)
 
 # Append any auto-generated sources that are needed by sources listed in
 # SRC_QSTR
@@ -543,9 +542,9 @@ $(OBJ): | $(HEADER_BUILD)/pins.h
 
 # Use a pattern rule here so that make will only call make-pins.py once to make
 # both pins_gen.c and pins.h
-$(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
+$(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
 
 $(PY_BUILD)/nlr%.o: CFLAGS += -Os -fno-lto
 
diff --git a/ports/nrf/boards/make-pins.py b/ports/nrf/boards/make-pins.py
index 720df6e49e..b535e2418b 100644
--- a/ports/nrf/boards/make-pins.py
+++ b/ports/nrf/boards/make-pins.py
@@ -82,9 +82,6 @@ class AlternateFunction(object):
             )
         )
 
-    def qstr_list(self):
-        return [self.mux_name()]
-
 
 class Pin(object):
     """Holds the information associated with a pin."""
@@ -182,13 +179,6 @@ class Pin(object):
                 "extern const pin_af_obj_t pin_{:s}_af[];\n".format(self.cpu_pin_name())
             )
 
-    def qstr_list(self):
-        result = []
-        for alt_fn in self.alt_fn:
-            if alt_fn.is_supported():
-                result += alt_fn.qstr_list()
-        return result
-
 
 class NamedPin(object):
     def __init__(self, name, pin):
@@ -312,19 +302,6 @@ class Pins(object):
             hdr_file.write("extern const pin_obj_t * const pin_adc2[];\n")
             hdr_file.write("extern const pin_obj_t * const pin_adc3[];\n")
 
-    def print_qstr(self, qstr_filename):
-        with open(qstr_filename, "wt") as qstr_file:
-            qstr_set = set([])
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    qstr_set |= set(pin.qstr_list())
-                    qstr_set |= set([named_pin.name()])
-            for named_pin in self.board_pins:
-                qstr_set |= set([named_pin.name()])
-            for qstr in sorted(qstr_set):
-                print("Q({})".format(qstr), file=qstr_file)
-
     def print_af_hdr(self, af_const_filename):
         with open(af_const_filename, "wt") as af_const_file:
             af_hdr_set = set([])
@@ -393,13 +370,6 @@ def main():
         help="Specifies beginning portion of generated pins file",
         default="nrf52_prefix.c",
     )
-    parser.add_argument(
-        "-q",
-        "--qstr",
-        dest="qstr_filename",
-        help="Specifies name of generated qstr header file",
-        default="build/pins_qstr.h",
-    )
     parser.add_argument(
         "-r",
         "--hdr",
@@ -430,7 +400,6 @@ def main():
     pins.print_const_table()
     pins.print()
     pins.print_header(args.hdr_filename)
-    pins.print_qstr(args.qstr_filename)
     pins.print_af_hdr(args.af_const_filename)
     pins.print_af_py(args.af_py_filename)
 

From df28aa1a595afcefaa164e61af38b9b17d83fa6b Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 3 Aug 2023 15:36:33 +1000
Subject: [PATCH 095/310] renesas-ra/boards/make-pins.py: Don't generate qstrs.

The output pins.c can be processed for qstrs like any other C file.

Also remove af_const from Makefile (unimplemented in make-pins.py) and fix
target dependency on ad_const.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/renesas-ra/Makefile            | 19 ++++++--------
 ports/renesas-ra/boards/make-pins.py | 39 ----------------------------
 2 files changed, 8 insertions(+), 50 deletions(-)

diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index 943ed6d9bf..e77843b1e3 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -27,12 +27,11 @@ USE_FSP_LPM ?= 1
 USE_FSP_QSPI ?= 0
 FSP_BOARD_NAME ?= $(shell echo $(BOARD) | tr '[:upper:]' '[:lower:]')
 
-# Files that are generated and needed before the QSTR build.
-#QSTR_GENERATED_HEADERS = $(BUILD)/pins_qstr.h $(BUILD)/modstm_qstr.h
-QSTR_GENERATED_HEADERS = $(BUILD)/pins_qstr.h
 # qstr definitions (must come before including py.mk)
-QSTR_DEFS += qstrdefsport.h $(QSTR_GENERATED_HEADERS)
-QSTR_GLOBAL_DEPENDENCIES += mpconfigboard_common.h $(BOARD_DIR)/mpconfigboard.h $(QSTR_GENERATED_HEADERS)
+QSTR_DEFS += qstrdefsport.h
+
+# Files that are generated and needed before the QSTR build.
+QSTR_GLOBAL_DEPENDENCIES += mpconfigboard_common.h $(BOARD_DIR)/mpconfigboard.h
 
 # MicroPython feature configurations
 MICROPY_ROM_TEXT_COMPRESSION ?= 1
@@ -557,16 +556,14 @@ AF_FILE = boards/ra6m5_af.csv
 endif
 GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
+# Currently unused.
 GEN_PINS_AD_CONST = $(HEADER_BUILD)/pins_ad_const.h
-GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
-#GEN_PINS_AF_DEFS = $(HEADER_BUILD)/pins_af_defs.h
 GEN_PINS_AF_PY = $(BUILD)/pins_af.py
 
 FILE2H = $(TOP)/tools/file2h.py
 
 # List of sources for qstr extraction
-SRC_QSTR += $(SRC_C) $(SRC_CXX) $(SHARED_SRC_C)
+SRC_QSTR += $(SRC_C) $(SRC_CXX) $(SHARED_SRC_C) $(GEN_PINS_SRC)
 
 # Making OBJ use an order-only depenedency on the generated pins.h file
 # has the side effect of making the pins.h file before we actually compile
@@ -582,9 +579,9 @@ $(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
 # Use a pattern rule here so that make will only call make-pins.py once to make
 # both pins_$(BOARD).c and pins.h
 .PRECIOUS: $(GEN_PINS_SRC)
-$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_BUILD)/%_af_defs.h $(BUILD)/%_qstr.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
+$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_ad_const.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --ad-const $(GEN_PINS_AD_CONST) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --ad-const $(GEN_PINS_AD_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
 
 CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h
 
diff --git a/ports/renesas-ra/boards/make-pins.py b/ports/renesas-ra/boards/make-pins.py
index 5147d27940..4127c9ff11 100644
--- a/ports/renesas-ra/boards/make-pins.py
+++ b/ports/renesas-ra/boards/make-pins.py
@@ -41,9 +41,6 @@ class PinAD(object):
         hdr_file.write("extern const pin_ad_obj_t pin_{:s}_ad_obj;\n".format(n))
         hdr_file.write("#define pin_{:s}_ad (&pin_{:s}_ad_obj)\n".format(n, n))
 
-    def qstr_list(self):
-        return [self._name]
-
 
 class Pin(object):
     def __init__(self, name, port, bit):
@@ -98,15 +95,6 @@ class Pin(object):
         hdr_file.write("extern const machine_pin_obj_t pin_{:s}_obj;\n".format(n))
         hdr_file.write("#define pin_{:s} (&pin_{:s}_obj)\n".format(n, n))
 
-    def qstr_list(self):
-        result = []
-        for pin_ad in self._pin_ad:
-            result += pin_ad.qstr_list()
-        # for alt_fn in self.alt_fn:
-        #    if alt_fn.is_supported():
-        #        result += alt_fn.qstr_list()
-        return result
-
 
 class NamedPin(object):
     def __init__(self, name, pin):
@@ -209,19 +197,6 @@ class Pins(object):
                     )
                 )
 
-    def print_qstr(self, qstr_filename):
-        with open(qstr_filename, "wt") as qstr_file:
-            qstr_set = set([])
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    qstr_set |= set(pin.qstr_list())
-                    qstr_set |= set([named_pin.name()])
-            for named_pin in self.board_pins:
-                qstr_set |= set([named_pin.name()])
-            for qstr in sorted(qstr_set):
-                print("Q({})".format(qstr), file=qstr_file)
-
     def print_ad_hdr(self, ad_const_filename):
         with open(ad_const_filename, "wt") as ad_const_file:
             for named_pin in self.cpu_pins:
@@ -265,12 +240,6 @@ def main():
         help="Specifies header file for AD function constants.",
         default="build/pins_ad_const.h",
     )
-    parser.add_argument(
-        "--af-const",
-        dest="af_const_filename",
-        help="Specifies header file for alternate function constants.",
-        default="build/pins_af_const.h",
-    )
     parser.add_argument(
         "--af-py",
         dest="af_py_filename",
@@ -283,13 +252,6 @@ def main():
         help="Specifies the filename for the alternate function defines.",
         default="build/pins_af_defs.h",
     )
-    parser.add_argument(
-        "-q",
-        "--qstr",
-        dest="qstr_filename",
-        help="Specifies name of generated qstr header file",
-        default="build/pins_qstr.h",
-    )
     parser.add_argument(
         "-r",
         "--hdr",
@@ -319,7 +281,6 @@ def main():
 
     pins.print()
     pins.print_header(args.hdr_filename)
-    pins.print_qstr(args.qstr_filename)
     pins.print_ad_hdr(args.ad_const_filename)
 
 

From cb37b7bba756115029d9b973c753eb4b81be5ab7 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Fri, 4 Aug 2023 23:15:25 +1000
Subject: [PATCH 096/310] cc3200/boards/make-pins.py: Don't generate qstrs.

The output pins.c can be processed for qstrs like any other C file.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/cc3200/Makefile            |  2 +-
 ports/cc3200/application.mk      |  7 +++----
 ports/cc3200/boards/make-pins.py | 24 ------------------------
 3 files changed, 4 insertions(+), 29 deletions(-)

diff --git a/ports/cc3200/Makefile b/ports/cc3200/Makefile
index f89a927c0e..099fa295c5 100644
--- a/ports/cc3200/Makefile
+++ b/ports/cc3200/Makefile
@@ -36,7 +36,7 @@ FLASH_SIZE_LAUNCHXL = 1M
 
 ifeq ($(BTARGET), application)
 # qstr definitions (must come before including py.mk)
-QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h
+QSTR_DEFS = qstrdefsport.h
 
 # MicroPython feature configurations
 MICROPY_ROM_TEXT_COMPRESSION ?= 1
diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index 7a8fb8d943..15a5824c36 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -164,7 +164,7 @@ OBJ += $(BUILD)/shared/runtime/gchelper_thumb2.o
 OBJ += $(BUILD)/pins.o
 
 # List of sources for qstr extraction
-SRC_QSTR += $(APP_MODS_SRC_C) $(APP_MISC_SRC_C) $(APP_STM_SRC_C) $(APP_SHARED_SRC_C) $(APP_HAL_SRC_C)
+SRC_QSTR += $(APP_MODS_SRC_C) $(APP_MISC_SRC_C) $(APP_STM_SRC_C) $(APP_SHARED_SRC_C) $(APP_HAL_SRC_C) $(GEN_PINS_SRC)
 # Append any auto-generated sources that are needed by sources listed in
 # SRC_QSTR
 SRC_QSTR_AUTO_DEPS +=
@@ -228,7 +228,6 @@ AF_FILE = boards/cc3200_af.csv
 PREFIX_FILE = boards/cc3200_prefix.c
 GEN_PINS_SRC = $(BUILD)/pins.c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
 
 # Making OBJ use an order-only dependency on the generated pins.h file
 # has the side effect of making the pins.h file before we actually compile
@@ -238,6 +237,6 @@ GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
 $(OBJ): | $(GEN_PINS_HDR)
 
 # Call make-pins.py to generate both pins_gen.c and pins.h
-$(GEN_PINS_SRC) $(GEN_PINS_HDR) $(GEN_PINS_QSTR): $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
+$(GEN_PINS_SRC) $(GEN_PINS_HDR): $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) > $(GEN_PINS_SRC)
diff --git a/ports/cc3200/boards/make-pins.py b/ports/cc3200/boards/make-pins.py
index 6608be438a..cd4abb93d2 100644
--- a/ports/cc3200/boards/make-pins.py
+++ b/ports/cc3200/boards/make-pins.py
@@ -185,22 +185,6 @@ class Pins:
                 if pin.board_pin:
                     pin.print_header(hdr_file)
 
-    def print_qstr(self, qstr_filename):
-        with open(qstr_filename, "wt") as qstr_file:
-            pin_qstr_set = set([])
-            af_qstr_set = set([])
-            for pin in self.board_pins:
-                if pin.board_pin:
-                    pin_qstr_set |= set([pin.name])
-                    for af in pin.afs:
-                        af_qstr_set |= set([af.name])
-            print("// Board pins", file=qstr_file)
-            for qstr in sorted(pin_qstr_set):
-                print("Q({})".format(qstr), file=qstr_file)
-            print("\n// Pin AFs", file=qstr_file)
-            for qstr in sorted(af_qstr_set):
-                print("Q({})".format(qstr), file=qstr_file)
-
 
 def main():
     parser = argparse.ArgumentParser(
@@ -228,13 +212,6 @@ def main():
         help="Specifies beginning portion of generated pins file",
         default="cc3200_prefix.c",
     )
-    parser.add_argument(
-        "-q",
-        "--qstr",
-        dest="qstr_filename",
-        help="Specifies name of generated qstr header file",
-        default="build/pins_qstr.h",
-    )
     parser.add_argument(
         "-r",
         "--hdr",
@@ -262,7 +239,6 @@ def main():
         with open(args.prefix_filename, "r") as prefix_file:
             print(prefix_file.read())
     pins.print()
-    pins.print_qstr(args.qstr_filename)
     pins.print_header(args.hdr_filename)
 
 

From 59f3c7facbb6100108750efa857f1550f23f2482 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 3 Aug 2023 15:02:41 +1000
Subject: [PATCH 097/310] examples/pins.py: Remove this pins printing example.

It's not supported on all ports, adds complexity to the build to generate
pins_af.py, and can mostly be replicated just by printing the pin objects.

Remove support for generating pins_af.py from all ports (nrf, stm32,
renesas-ra, mimxrt, rp2).

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 examples/pins.py                     | 60 ----------------------------
 ports/mimxrt/Makefile                |  1 -
 ports/nrf/Makefile                   |  3 +-
 ports/nrf/boards/make-pins.py        | 18 ---------
 ports/renesas-ra/Makefile            |  3 +-
 ports/renesas-ra/boards/make-pins.py |  6 ---
 ports/rp2/CMakeLists.txt             |  3 +-
 ports/rp2/boards/make-pins.py        | 18 ---------
 ports/stm32/Makefile                 |  3 +-
 ports/stm32/boards/make-pins.py      | 20 ----------
 ports/stm32/mboot/Makefile           |  3 +-
 11 files changed, 5 insertions(+), 133 deletions(-)
 delete mode 100644 examples/pins.py

diff --git a/examples/pins.py b/examples/pins.py
deleted file mode 100644
index 3a8472e8a6..0000000000
--- a/examples/pins.py
+++ /dev/null
@@ -1,60 +0,0 @@
-# Print a nice list of pins, their current settings, and available afs.
-# Requires pins_af.py from ports/stm32/build-PYBV10/ directory.
-
-import pyb
-import pins_af
-
-
-def af():
-    max_name_width = 0
-    max_af_width = 0
-    for pin_entry in pins_af.PINS_AF:
-        max_name_width = max(max_name_width, len(pin_entry[0]))
-        for af_entry in pin_entry[1:]:
-            max_af_width = max(max_af_width, len(af_entry[1]))
-    for pin_entry in pins_af.PINS_AF:
-        pin_name = pin_entry[0]
-        print("%-*s " % (max_name_width, pin_name), end="")
-        for af_entry in pin_entry[1:]:
-            print("%2d: %-*s " % (af_entry[0], max_af_width, af_entry[1]), end="")
-        print("")
-
-
-def pins():
-    mode_str = {
-        pyb.Pin.IN: "IN",
-        pyb.Pin.OUT_PP: "OUT_PP",
-        pyb.Pin.OUT_OD: "OUT_OD",
-        pyb.Pin.AF_PP: "AF_PP",
-        pyb.Pin.AF_OD: "AF_OD",
-        pyb.Pin.ANALOG: "ANALOG",
-    }
-    pull_str = {pyb.Pin.PULL_NONE: "", pyb.Pin.PULL_UP: "PULL_UP", pyb.Pin.PULL_DOWN: "PULL_DOWN"}
-    width = [0, 0, 0, 0]
-    rows = []
-    for pin_entry in pins_af.PINS_AF:
-        row = []
-        pin_name = pin_entry[0]
-        pin = pyb.Pin(pin_name)
-        pin_mode = pin.mode()
-        row.append(pin_name)
-        row.append(mode_str[pin_mode])
-        row.append(pull_str[pin.pull()])
-        if pin_mode == pyb.Pin.AF_PP or pin_mode == pyb.Pin.AF_OD:
-            pin_af = pin.af()
-            for af_entry in pin_entry[1:]:
-                if pin_af == af_entry[0]:
-                    af_str = "%d: %s" % (pin_af, af_entry[1])
-                    break
-            else:
-                af_str = "%d" % pin_af
-        else:
-            af_str = ""
-        row.append(af_str)
-        for col in range(len(width)):
-            width[col] = max(width[col], len(row[col]))
-        rows.append(row)
-    for row in rows:
-        for col in range(len(width)):
-            print("%-*s " % (width[col], row[col]), end="")
-        print("")
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index c22c5442a9..51cf5178ba 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -62,7 +62,6 @@ BOARD_PINS = $(BOARD_DIR)/pins.csv
 PREFIX_FILE = boards/mimxrt_prefix.c
 GEN_FLEXRAM_CONFIG_SRC = $(BUILD)/flexram_config.s
 GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
-GEN_PINS_AF_PY = $(BUILD)/pins_af.py
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
 GEN_PINS_SRC = $(BUILD)/pins_gen.c
 
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index 7d7589cc20..cb81ad847f 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -119,7 +119,6 @@ PREFIX_FILE = boards/$(MCU_VARIANT)_prefix.c
 GEN_PINS_SRC = $(BUILD)/pins_gen.c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
 GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
-GEN_PINS_AF_PY = $(BUILD)/pins_af.py
 
 CFLAGS_CORTEX_M = -mthumb -mabi=aapcs -fsingle-precision-constant -Wdouble-promotion
 
@@ -544,7 +543,7 @@ $(OBJ): | $(HEADER_BUILD)/pins.h
 # both pins_gen.c and pins.h
 $(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --af-const $(GEN_PINS_AF_CONST) > $(GEN_PINS_SRC)
 
 $(PY_BUILD)/nlr%.o: CFLAGS += -Os -fno-lto
 
diff --git a/ports/nrf/boards/make-pins.py b/ports/nrf/boards/make-pins.py
index b535e2418b..6bfb662514 100644
--- a/ports/nrf/boards/make-pins.py
+++ b/ports/nrf/boards/make-pins.py
@@ -320,17 +320,6 @@ class Pins(object):
                 val = "MP_ROM_INT(GPIO_{})".format(mux_name)
                 print("    { %-*s %s }," % (mux_name_width + 26, key, val), file=af_const_file)
 
-    def print_af_py(self, af_py_filename):
-        with open(af_py_filename, "wt") as af_py_file:
-            print("PINS_AF = (", file=af_py_file)
-            for named_pin in self.board_pins:
-                print("  ('%s', " % named_pin.name(), end="", file=af_py_file)
-                for af in named_pin.pin().alt_fn:
-                    if af.is_supported():
-                        print("(%d, '%s'), " % (af.idx, af.af_str), end="", file=af_py_file)
-                print("),", file=af_py_file)
-            print(")", file=af_py_file)
-
 
 def main():
     parser = argparse.ArgumentParser(
@@ -351,12 +340,6 @@ def main():
         help="Specifies header file for alternate function constants.",
         default="build/pins_af_const.h",
     )
-    parser.add_argument(
-        "--af-py",
-        dest="af_py_filename",
-        help="Specifies the filename for the python alternate function mappings.",
-        default="build/pins_af.py",
-    )
     parser.add_argument(
         "-b",
         "--board",
@@ -401,7 +384,6 @@ def main():
     pins.print()
     pins.print_header(args.hdr_filename)
     pins.print_af_hdr(args.af_const_filename)
-    pins.print_af_py(args.af_py_filename)
 
 
 if __name__ == "__main__":
diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index e77843b1e3..8c09dc91bd 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -558,7 +558,6 @@ GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
 # Currently unused.
 GEN_PINS_AD_CONST = $(HEADER_BUILD)/pins_ad_const.h
-GEN_PINS_AF_PY = $(BUILD)/pins_af.py
 
 FILE2H = $(TOP)/tools/file2h.py
 
@@ -581,7 +580,7 @@ $(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
 .PRECIOUS: $(GEN_PINS_SRC)
 $(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_ad_const.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --ad-const $(GEN_PINS_AD_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --ad-const $(GEN_PINS_AD_CONST) > $(GEN_PINS_SRC)
 
 CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h
 
diff --git a/ports/renesas-ra/boards/make-pins.py b/ports/renesas-ra/boards/make-pins.py
index 4127c9ff11..43267a1fa3 100644
--- a/ports/renesas-ra/boards/make-pins.py
+++ b/ports/renesas-ra/boards/make-pins.py
@@ -240,12 +240,6 @@ def main():
         help="Specifies header file for AD function constants.",
         default="build/pins_ad_const.h",
     )
-    parser.add_argument(
-        "--af-py",
-        dest="af_py_filename",
-        help="Specifies the filename for the python alternate function mappings.",
-        default="build/pins_af.py",
-    )
     parser.add_argument(
         "--af-defs",
         dest="af_defs_filename",
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 4a0d2fbad7..f643b66793 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -480,7 +480,6 @@ set(GEN_PINS_MKPINS "${MICROPY_BOARDS_DIR}/make-pins.py")
 set(GEN_PINS_SRC "${CMAKE_BINARY_DIR}/pins_${MICROPY_BOARD}.c")
 set(GEN_PINS_HDR "${MICROPY_GENHDR_DIR}/pins.h")
 set(GEN_PINS_AF_CONST "${MICROPY_GENHDR_DIR}/pins_af_const.h")
-set(GEN_PINS_AF_PY "${CMAKE_BINARY_DIR}/pins_af.py")
 
 if(EXISTS "${MICROPY_BOARDS_DIR}/${MICROPY_BOARD}/pins.csv")
     set(GEN_PINS_BOARD_CSV "${MICROPY_BOARDS_DIR}/${MICROPY_BOARD}/pins.csv")
@@ -495,7 +494,7 @@ target_sources(${MICROPY_TARGET} PRIVATE
 add_custom_command(
     OUTPUT ${GEN_PINS_HDR} ${GEN_PINS_SRC}
     COMMAND ${Python3_EXECUTABLE} ${GEN_PINS_MKPINS} ${GEN_PINS_CSV_ARG} --af ${GEN_PINS_AF_CSV} --prefix ${GEN_PINS_PREFIX}
-    --hdr ${GEN_PINS_HDR} --af-py ${GEN_PINS_AF_PY} > ${GEN_PINS_SRC}
+    --hdr ${GEN_PINS_HDR} > ${GEN_PINS_SRC}
     DEPENDS
         ${GEN_PINS_AF_CSV}
         ${GEN_PINS_BOARD_CSV}
diff --git a/ports/rp2/boards/make-pins.py b/ports/rp2/boards/make-pins.py
index 4029d7b1cf..9c66248885 100755
--- a/ports/rp2/boards/make-pins.py
+++ b/ports/rp2/boards/make-pins.py
@@ -284,17 +284,6 @@ class Pins(object):
                         )
                     )
 
-    def print_af_py(self, af_py_filename):
-        with open(af_py_filename, "wt") as af_py_file:
-            print("PINS_AF = (", file=af_py_file)
-            for named_pin in self.board_pins:
-                print("  ('%s', " % named_pin.name(), end="", file=af_py_file)
-                for af in named_pin.pin().alt_fn:
-                    if af.is_supported():
-                        print("(%d, '%s'), " % (af.idx, af.af_str), end="", file=af_py_file)
-                print("),", file=af_py_file)
-            print(")", file=af_py_file)
-
 
 def main():
     parser = argparse.ArgumentParser(
@@ -309,12 +298,6 @@ def main():
         help="Specifies the alternate function file for the chip",
         default="rp2_af.csv",
     )
-    parser.add_argument(
-        "--af-py",
-        dest="af_py_filename",
-        help="Specifies the filename for the python alternate function mappings.",
-        default="build/pins_af.py",
-    )
     parser.add_argument(
         "-b",
         "--board",
@@ -356,7 +339,6 @@ def main():
             print(prefix_file.read())
     pins.print()
     pins.print_header(args.hdr_filename, True)
-    pins.print_af_py(args.af_py_filename)
 
 
 if __name__ == "__main__":
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index 3bb18ee3cb..5b853592c9 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -72,7 +72,6 @@ GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
 GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
 GEN_PINS_AF_DEFS = $(HEADER_BUILD)/pins_af_defs.h
-GEN_PINS_AF_PY = $(BUILD)/pins_af.py
 
 INSERT_USB_IDS = $(TOP)/tools/insert-usb-ids.py
 FILE2H = $(TOP)/tools/file2h.py
@@ -678,7 +677,7 @@ $(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_
 	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) \
 		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --hdr-obj-decls \
 		--af-const $(GEN_PINS_AF_CONST) --af-defs $(GEN_PINS_AF_DEFS) \
-		--af-defs-cmp-strings --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+		--af-defs-cmp-strings > $(GEN_PINS_SRC)
 
 modmachine.c: $(GEN_PLLFREQTABLE_HDR)
 $(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py
index f0fcb82437..99b507a3a8 100755
--- a/ports/stm32/boards/make-pins.py
+++ b/ports/stm32/boards/make-pins.py
@@ -503,19 +503,6 @@ class Pins(object):
                 print("\n".join(sorted(pins)), file=af_defs_file)
                 print("    (0xffffffffffffffffULL))\n", file=af_defs_file)
 
-    def print_af_py(self, af_py_filename):
-        with open(af_py_filename, "wt") as af_py_file:
-            print("PINS_AF = (", file=af_py_file)
-            for named_pin in self.board_pins:
-                if named_pin.is_hidden():
-                    continue
-                print("  ('%s', " % named_pin.name(), end="", file=af_py_file)
-                for af in named_pin.pin().alt_fn:
-                    if af.is_supported():
-                        print("(%d, '%s'), " % (af.idx, af.af_str), end="", file=af_py_file)
-                print("),", file=af_py_file)
-            print(")", file=af_py_file)
-
 
 def main():
     parser = argparse.ArgumentParser(
@@ -536,12 +523,6 @@ def main():
         help="Specifies header file for alternate function constants.",
         default="build/pins_af_const.h",
     )
-    parser.add_argument(
-        "--af-py",
-        dest="af_py_filename",
-        help="Specifies the filename for the python alternate function mappings.",
-        default="build/pins_af.py",
-    )
     parser.add_argument(
         "--af-defs",
         dest="af_defs_filename",
@@ -604,7 +585,6 @@ def main():
         pins.print_adc(i)
     pins.print_header(args.hdr_filename, args.hdr_obj_decls)
     pins.print_af_hdr(args.af_const_filename)
-    pins.print_af_py(args.af_py_filename)
     pins.print_af_defs(args.af_defs_filename, args.af_defs_cmp_strings)
 
 
diff --git a/ports/stm32/mboot/Makefile b/ports/stm32/mboot/Makefile
index a37b046ca5..fab8ce2159 100755
--- a/ports/stm32/mboot/Makefile
+++ b/ports/stm32/mboot/Makefile
@@ -229,7 +229,6 @@ GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
 GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
 GEN_PINS_AF_DEFS = $(HEADER_BUILD)/pins_af_defs.h
-GEN_PINS_AF_PY = $(BUILD)/pins_af.py
 
 $(OBJ): $(GEN_QSTRDEFS_GENERATED) $(GEN_ROOT_POINTERS) $(GEN_PINS_AF_DEFS)
 
@@ -247,7 +246,7 @@ $(GEN_PINS_AF_DEFS): $(BOARD_PINS) $(MAKE_PINS) ../$(AF_FILE) $(PREFIX_FILE) | $
 	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af ../$(AF_FILE) \
 		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) \
 		--af-const $(GEN_PINS_AF_CONST) --af-defs $(GEN_PINS_AF_DEFS) \
-		--af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+		> $(GEN_PINS_SRC)
 
 #########################################
 

From 1ee5731122ba1c43705c1287da85de800b283036 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 3 Aug 2023 16:20:50 +1000
Subject: [PATCH 098/310] ports: Remove SRC_QSTR_AUTO_DEPS from all ports'
 Makefiles.

It's unused.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/cc3200/application.mk | 3 ---
 ports/esp8266/Makefile      | 2 --
 ports/nrf/Makefile          | 4 ----
 ports/pic16bit/Makefile     | 3 ---
 ports/stm32/Makefile        | 5 ++---
 ports/unix/Makefile         | 3 ---
 ports/windows/Makefile      | 3 ---
 7 files changed, 2 insertions(+), 21 deletions(-)

diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index 15a5824c36..7c6773ef4b 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -165,9 +165,6 @@ OBJ += $(BUILD)/pins.o
 
 # List of sources for qstr extraction
 SRC_QSTR += $(APP_MODS_SRC_C) $(APP_MISC_SRC_C) $(APP_STM_SRC_C) $(APP_SHARED_SRC_C) $(APP_HAL_SRC_C) $(GEN_PINS_SRC)
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
 
 # Add the linker script
 LINKER_SCRIPT = application.lds
diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index b29df9fd22..cea0e789c6 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -187,8 +187,6 @@ OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
 
 # List of sources for qstr extraction
 SRC_QSTR += $(SRC_C) $(SHARED_SRC_C)
-# Append any auto-generated sources that are needed by sources listed in SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
 
 all: $(FWBIN)
 
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index cb81ad847f..2f9b93d7ff 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -528,10 +528,6 @@ $(BUILD)/$(OUTPUT_FILENAME).elf: $(OBJ)
 # List of sources for qstr extraction
 SRC_QSTR += $(SRC_C) $(SRC_SHARED_C) $(DRIVERS_SRC_C) $(SRC_BOARD_MODULES) $(GEN_PINS_SRC)
 
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
-
 # Making OBJ use an order-only dependency on the generated pins.h file
 # has the side effect of making the pins.h file before we actually compile
 # any of the objects. The normal dependency generation will deal with the
diff --git a/ports/pic16bit/Makefile b/ports/pic16bit/Makefile
index d2c8df4707..6d061514f9 100644
--- a/ports/pic16bit/Makefile
+++ b/ports/pic16bit/Makefile
@@ -51,9 +51,6 @@ OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o) $(SRC_S:.s=.o))
 
 # List of sources for qstr extraction
 SRC_QSTR += $(SRC_C)
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
 
 all: $(BUILD)/firmware.hex
 
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index 5b853592c9..8d521182ff 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -652,9 +652,6 @@ $(BUILD)/firmware.elf: $(OBJ)
 
 # List of sources for qstr extraction
 SRC_QSTR += $(SRC_C) $(SRC_CXX) $(SHARED_SRC_C) $(GEN_PINS_SRC)
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS += $(GEN_CDCINF_HEADER)
 
 # Making OBJ use an order-only dependency on the generated pins.h file
 # has the side effect of making the pins.h file before we actually compile
@@ -668,6 +665,8 @@ $(OBJ): | $(GEN_PINS_HDR)
 $(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
 
 # main.c can't be even preprocessed without $(GEN_CDCINF_HEADER)
+# As main.c is in SRC_QSTR this will also ensure that GEN_CDCINF_HEADER
+# will be run before QSTR extraction.
 main.c: $(GEN_CDCINF_HEADER)
 
 # Use a pattern rule here so that make will only call make-pins.py once to make
diff --git a/ports/unix/Makefile b/ports/unix/Makefile
index 52ae8314eb..9f5e01a5ff 100644
--- a/ports/unix/Makefile
+++ b/ports/unix/Makefile
@@ -229,9 +229,6 @@ OBJ += $(addprefix $(BUILD)/, $(SHARED_SRC_C:.c=.o))
 
 # List of sources for qstr extraction
 SRC_QSTR += $(SRC_C) $(SRC_CXX) $(SHARED_SRC_C)
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
 
 ifneq ($(FROZEN_MANIFEST),)
 CFLAGS += -DMPZ_DIG_SIZE=16 # force 16 bits to work on both 32 and 64 bit archs
diff --git a/ports/windows/Makefile b/ports/windows/Makefile
index 31ac8d8b88..47ce664d7b 100644
--- a/ports/windows/Makefile
+++ b/ports/windows/Makefile
@@ -82,9 +82,6 @@ LIB += -lws2_32
 
 # List of sources for qstr extraction
 SRC_QSTR += $(SRC_C) $(SRC_CXX) $(SHARED_SRC_C)
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
 
 ifneq ($(FROZEN_MANIFEST),)
 CFLAGS += -DMPZ_DIG_SIZE=16

From 9cabee8252a01212651b52ea8c196d7effca1648 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 3 Aug 2023 16:48:52 +1000
Subject: [PATCH 099/310] ports: Standardise arguments and output for
 make-pins.py script.

All ports now use `--board-csv`, `--prefix`, `--output-souce`,
`--output-header` and no longer write to stdout.  This matches the esp32
implementation.

Ports that have an AF input use `--af-csv` (to match `--board-csv`).

Any additional output files are now prefixed with `output-` (e.g.
`--output-af-const`).

Default arguments are removed (all makefiles should always specify all
arguments, using default values is likely an error).

Replaced the `af-defs-cmp-strings` and `hdr-obj-decls` args for stm32 with
just `mboot-mode`.  Previously they were set on the regular build, now the
logic is reversed so mboot sets it.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/cc3200/application.mk          |   3 +-
 ports/cc3200/boards/make-pins.py     | 130 +++++------
 ports/esp32/boards/make-pins.py      |   6 +-
 ports/mimxrt/Makefile                |   6 +-
 ports/mimxrt/boards/make-pins.py     | 197 ++++++++--------
 ports/nrf/Makefile                   |   3 +-
 ports/nrf/boards/make-pins.py        | 238 +++++++++-----------
 ports/renesas-ra/Makefile            |   3 +-
 ports/renesas-ra/boards/make-pins.py | 190 +++++++---------
 ports/rp2/CMakeLists.txt             |   5 +-
 ports/rp2/boards/make-pins.py        | 198 ++++++++--------
 ports/stm32/Makefile                 |   7 +-
 ports/stm32/boards/make-pins.py      | 324 ++++++++++++---------------
 ports/stm32/mboot/Makefile           |   8 +-
 14 files changed, 587 insertions(+), 731 deletions(-)

diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index 7c6773ef4b..6959c64b66 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -236,4 +236,5 @@ $(OBJ): | $(GEN_PINS_HDR)
 # Call make-pins.py to generate both pins_gen.c and pins.h
 $(GEN_PINS_SRC) $(GEN_PINS_HDR): $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv $(AF_FILE) --prefix $(PREFIX_FILE) \
+	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR)
diff --git a/ports/cc3200/boards/make-pins.py b/ports/cc3200/boards/make-pins.py
index cd4abb93d2..da04d8e36c 100644
--- a/ports/cc3200/boards/make-pins.py
+++ b/ports/cc3200/boards/make-pins.py
@@ -44,11 +44,12 @@ class AF:
         self.unit = unit
         self.type = type
 
-    def print(self):
+    def print(self, out_source):
         print(
             "    AF({:16s}, {:4d}, {:8s}, {:4d}, {:8s}),    // {}".format(
                 self.name, self.idx, self.fn, self.unit, self.type, self.name
-            )
+            ),
+            file=out_source,
         )
 
 
@@ -66,13 +67,13 @@ class Pin:
     def add_af(self, af):
         self.afs.append(af)
 
-    def print(self):
-        print("// {}".format(self.name))
+    def print(self, out_source):
+        print("// {}".format(self.name), file=out_source)
         if len(self.afs):
-            print("const pin_af_t pin_{}_af[] = {{".format(self.name))
+            print("const pin_af_t pin_{}_af[] = {{".format(self.name), file=out_source)
             for af in self.afs:
-                af.print()
-            print("};")
+                af.print(out_source)
+            print("};", file=out_source)
             print(
                 "pin_obj_t pin_{:4s} = PIN({:6s}, {:1d}, {:3d}, {:2d}, pin_{}_af, {});\n".format(
                     self.name,
@@ -82,17 +83,19 @@ class Pin:
                     self.pin_num,
                     self.name,
                     len(self.afs),
-                )
+                ),
+                file=out_source,
             )
         else:
             print(
                 "pin_obj_t pin_{:4s} = PIN({:6s}, {:1d}, {:3d}, {:2d}, NULL, 0);\n".format(
                     self.name, self.name, self.port, self.gpio_bit, self.pin_num
-                )
+                ),
+                file=out_source,
             )
 
-    def print_header(self, hdr_file):
-        hdr_file.write("extern pin_obj_t pin_{:s};\n".format(self.name))
+    def print_header(self, out_header):
+        print("extern pin_obj_t pin_{:s};".format(self.name), file=out_header)
 
 
 class Pins:
@@ -153,93 +156,72 @@ class Pins:
                 if pin:
                     pin.board_pin = True
 
-    def print_named(self, label, pins):
-        print("")
+    def print_named(self, label, pins, out_source):
+        print("", file=out_source)
         print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label)
+            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
+            file=out_source,
         )
         for pin in pins:
             if pin.board_pin:
                 print(
                     "    {{ MP_ROM_QSTR(MP_QSTR_{:6s}), MP_ROM_PTR(&pin_{:6s}) }},".format(
                         pin.name, pin.name
-                    )
+                    ),
+                    file=out_source,
                 )
-        print("};")
+        print("};", file=out_source)
         print(
             "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
                 label, label
-            )
+            ),
+            file=out_source,
         )
 
-    def print(self):
+    def print(self, out_source):
         for pin in self.board_pins:
             if pin.board_pin:
-                pin.print()
-        self.print_named("board", self.board_pins)
-        print("")
+                pin.print(out_source)
+        self.print_named("board", self.board_pins, out_source)
+        print("", file=out_source)
 
-    def print_header(self, hdr_filename):
-        with open(hdr_filename, "wt") as hdr_file:
-            for pin in self.board_pins:
-                if pin.board_pin:
-                    pin.print_header(hdr_file)
+    def print_header(self, out_header):
+        for pin in self.board_pins:
+            if pin.board_pin:
+                pin.print_header(out_header)
 
 
 def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file",
-    )
-    parser.add_argument(
-        "-a",
-        "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="cc3200_af.csv",
-    )
-    parser.add_argument(
-        "-b",
-        "--board",
-        dest="board_filename",
-        help="Specifies the board file",
-    )
-    parser.add_argument(
-        "-p",
-        "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="cc3200_prefix.c",
-    )
-    parser.add_argument(
-        "-r",
-        "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h",
-    )
-    args = parser.parse_args(sys.argv[1:])
+    parser = argparse.ArgumentParser(description="Generate board specific pin file")
+    parser.add_argument("--board-csv")
+    parser.add_argument("--af-csv")
+    parser.add_argument("--prefix")
+    parser.add_argument("--output-source")
+    parser.add_argument("--output-header")
+    args = parser.parse_args()
 
     pins = Pins()
 
-    print("// This file was automatically generated by make-pins.py")
-    print("//")
-    if args.af_filename:
-        print("// --af {:s}".format(args.af_filename))
-        pins.parse_af_file(args.af_filename, 0, 1, 3)
+    with open(args.output_source, "w") as out_source:
+        print("// This file was automatically generated by make-pins.py", file=out_source)
+        print("//", file=out_source)
+        if args.af_csv:
+            print("// --af {:s}".format(args.af_csv), file=out_source)
+            pins.parse_af_file(args.af_csv, 0, 1, 3)
 
-    if args.board_filename:
-        print("// --board {:s}".format(args.board_filename))
-        pins.parse_board_file(args.board_filename, 1)
+        if args.board_csv:
+            print("// --board {:s}".format(args.board_csv), file=out_source)
+            pins.parse_board_file(args.board_csv, 1)
 
-    if args.prefix_filename:
-        print("// --prefix {:s}".format(args.prefix_filename))
-        print("")
-        with open(args.prefix_filename, "r") as prefix_file:
-            print(prefix_file.read())
-    pins.print()
-    pins.print_header(args.hdr_filename)
+        if args.prefix:
+            print("// --prefix {:s}".format(args.prefix), file=out_source)
+            print("", file=out_source)
+            with open(args.prefix, "r") as prefix_file:
+                print(prefix_file.read(), file=out_source)
+        pins.print(out_source)
+
+    with open(args.output_header, "w") as out_header:
+        pins.print_header(out_header)
 
 
 if __name__ == "__main__":
diff --git a/ports/esp32/boards/make-pins.py b/ports/esp32/boards/make-pins.py
index e0f988549b..4813724dd6 100755
--- a/ports/esp32/boards/make-pins.py
+++ b/ports/esp32/boards/make-pins.py
@@ -154,20 +154,18 @@ def main():
     parser.add_argument("--prefix")
     parser.add_argument("--output-source")
     parser.add_argument("--output-header")
-    args = parser.parse_args(sys.argv[1:])
+    args = parser.parse_args()
 
     pins = Pins()
     pins.create_pins()
 
-    if args.board_csv:
-        pins.parse_board_file(args.board_csv)
-
     with open(args.output_source, "w") as out_source:
         print("// This file was automatically generated by make-pins.py", file=out_source)
         print("//", file=out_source)
 
         if args.board_csv:
             print("// --board-csv {:s}".format(args.board_csv), file=out_source)
+            pins.parse_board_file(args.board_csv)
 
         if args.prefix:
             print("// --prefix {:s}".format(args.prefix), file=out_source)
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index 51cf5178ba..879ee05f4a 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -505,8 +505,8 @@ $(GEN_FLEXRAM_CONFIG_SRC):
 # both pins_gen.c and pins.h
 $(BUILD)/%_gen.c $(HEADER_BUILD)/%.h: $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE)\
-		--iomux $(abspath $(TOP)/$(MCU_DIR)/drivers/fsl_iomuxc.h) \
-		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv $(AF_FILE) \
+	    --prefix $(PREFIX_FILE) --iomux $(abspath $(TOP)/$(MCU_DIR)/drivers/fsl_iomuxc.h) \
+	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR)
 
 include $(TOP)/py/mkrules.mk
diff --git a/ports/mimxrt/boards/make-pins.py b/ports/mimxrt/boards/make-pins.py
index 5795e2f042..d6752af1e9 100644
--- a/ports/mimxrt/boards/make-pins.py
+++ b/ports/mimxrt/boards/make-pins.py
@@ -93,34 +93,36 @@ class Pin(object):
     def add_af(self, af):
         self.alt_fn.append(af)
 
-    def print_pin_af(self):
+    def print_pin_af(self, out_source):
         if self.alt_fn:
             print(
                 "static const machine_pin_af_obj_t pin_{0}_af[{1}] = {{".format(
                     self.name, len(self.alt_fn)
-                )
+                ),
+                file=out_source,
             )
             for af in self.alt_fn:
-                af.print()
-            print("};")
+                af.print(out_source)
+            print("};", file=out_source)
         else:
             raise ValueError("Pin '{}' has no alternative functions".format(self.name))
 
-    def print_pin_adc(self):
+    def print_pin_adc(self, out_source):
         if self.adc_fns:
             print(
                 "static const machine_pin_adc_obj_t pin_{0}_adc[{1}] = {{".format(
                     self.name, len(self.adc_fns)
-                )
+                ),
+                file=out_source,
             )
             for adc_fn in self.adc_fns:
-                adc_fn.print()
-            print("};")
+                adc_fn.print(out_source)
+            print("};", file=out_source)
 
-    def print(self):
+    def print(self, out_source):
         if self.alt_fn:
-            self.print_pin_af()
-            self.print_pin_adc()
+            self.print_pin_af(out_source)
+            self.print_pin_adc(out_source)
 
             options = {
                 "GPIO_LPSR_00": "PIN_LPSR",
@@ -165,12 +167,13 @@ class Pin(object):
                     int(self.pin),
                     len(self.adc_fns),
                     "pin_{}_adc".format(self.name) if self.adc_fns else "NULL",
-                )
+                ),
+                file=out_source,
             )
         else:
             raise ValueError("Pin '{}' has no alternative functions".format(self.name))
 
-    def print_header(self, hdr_file):
+    def print_header(self, out_header):
         pass
 
 
@@ -182,9 +185,9 @@ class AdcFunction(object):
         self.instance = instance
         self.channel = channel
 
-    def print(self):
+    def print(self, out_source):
         """Prints the C representation of this AF."""
-        print(f"    PIN_ADC({self.peripheral}{self.instance}, {self.channel}),")
+        print(f"    PIN_ADC({self.peripheral}{self.instance}, {self.channel}),", file=out_source)
 
 
 class AlternateFunction(object):
@@ -197,12 +200,13 @@ class AlternateFunction(object):
         self.input_daisy = input_daisy
         self.instance = self.af_str.split("_")[0]
 
-    def print(self):
+    def print(self, out_source):
         """Prints the C representation of this AF."""
         print(
             "    PIN_AF({0}, PIN_AF_MODE_ALT{1}, {2}, {3}, {4}, {5}),".format(
                 self.af_str, self.idx, self.input_daisy, self.instance, self.input_reg, "0x10B0U"
-            )
+            ),
+            file=out_source,
         )
 
 
@@ -292,54 +296,62 @@ class Pins(object):
                 self.cpu_pins.append(pin)
 
     @staticmethod
-    def print_named(label, pins):
-        print("")
+    def print_named(label, pins, out_source):
+        print("", file=out_source)
         print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label)
+            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
+            file=out_source,
         )
         for pin in pins:
-            print(
-                "    {{ MP_ROM_QSTR(MP_QSTR_{}), MP_ROM_PTR(&pin_{}) }},".format(pin.name, pin.pad)
+            (
+                print(
+                    "    {{ MP_ROM_QSTR(MP_QSTR_{}), MP_ROM_PTR(&pin_{}) }},".format(
+                        pin.name, pin.pad
+                    ),
+                    file=out_source,
+                ),
             )
-        print("};")
+        print("};", file=out_source)
         print(
             "MP_DEFINE_CONST_DICT(machine_pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
                 label, label
-            )
+            ),
+            file=out_source,
         )
 
-    def print(self):
+    def print(self, out_source):
         # Print Pin Object declarations
         for pin in self.cpu_pins:
-            pin.print()
+            pin.print(out_source)
 
-        print("")
-        print("const machine_pin_obj_t* machine_pin_board_pins [] = {")
+        print("", file=out_source)
+        print("const machine_pin_obj_t* machine_pin_board_pins [] = {", file=out_source)
         for pin in self.board_pins:
-            print("    &pin_{},".format(pin.pad))
-        print("};")
-        print("const uint32_t num_board_pins = {:d};".format(len(self.board_pins)))
+            print("    &pin_{},".format(pin.pad), file=out_source)
+        print("};", file=out_source)
+        print(
+            "const uint32_t num_board_pins = {:d};".format(len(self.board_pins)), file=out_source
+        )
         # Print Pin mapping dictionaries
-        self.print_named("cpu", self.cpu_pins)
-        self.print_named("board", self.board_pins)
-        print("")
+        self.print_named("cpu", self.cpu_pins, out_source)
+        self.print_named("board", self.board_pins, out_source)
+        print("", file=out_source)
 
-    def print_header(self, hdr_filename):
-        with open(hdr_filename, "w") as hdr_file:
-            for pin in self.cpu_pins:
-                hdr_file.write("extern const machine_pin_obj_t pin_{};\n".format(pin.name))
-            hdr_file.write("extern const machine_pin_obj_t* machine_pin_board_pins[];\n")
-            hdr_file.write("extern const uint32_t num_board_pins;\n")
-            hdr_file.write("extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;\n")
-            hdr_file.write("extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;\n")
-
-            hdr_file.write("\n// Defines\n")
-            module_instance_factory(self.cpu_pins, hdr_file, "USDHC")
-            module_instance_factory(self.cpu_pins, hdr_file, "FLEXPWM")
-            module_instance_factory(self.cpu_pins, hdr_file, "TMR")
+    def print_header(self, out_header):
+        for pin in self.cpu_pins:
+            print("extern const machine_pin_obj_t pin_{};".format(pin.name), file=out_header)
+        print("extern const machine_pin_obj_t* machine_pin_board_pins[];", file=out_header)
+        print("extern const uint32_t num_board_pins;", file=out_header)
+        print("extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;", file=out_header)
+        print("extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;", file=out_header)
+        print("", file=out_header)
+        print("// Defines", file=out_header)
+        module_instance_factory(self.cpu_pins, out_header, "USDHC")
+        module_instance_factory(self.cpu_pins, out_header, "FLEXPWM")
+        module_instance_factory(self.cpu_pins, out_header, "TMR")
 
 
-def module_instance_factory(pins, output_file, name):
+def module_instance_factory(pins, out_header, name):
     module_pin = filter(lambda p: any([af for af in p.alt_fn if name in af.af_str]), pins)
 
     module_instances = dict()
@@ -357,80 +369,47 @@ def module_instance_factory(pins, output_file, name):
                     )
 
     for k, v in module_instances.items():
-        output_file.write(f"// {k}\n")
-        output_file.write(f"#define {k}_AVAIL (1)\n")
+        print(f"// {k}", file=out_header)
+        print(f"#define {k}_AVAIL (1)", file=out_header)
         if name == "FLEXPWM":
-            output_file.write(f"#define {k} {k[-4:]}\n")
+            print(f"#define {k} {k[-4:]}", file=out_header)
         for i in v:
-            output_file.write(i + "\n")
+            print(i, file=out_header)
 
 
 def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file",
-    )
-    parser.add_argument(
-        "-a",
-        "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="mimxrt1021_af.csv",
-    )
-    parser.add_argument(
-        "-i",
-        "--iomux",
-        dest="iomux_filename",
-        help="Specifies the fsl_iomuxc.h file for the chip",
-        default="fsl_iomuxc.h",
-    )
-    parser.add_argument(
-        "-b",
-        "--board",
-        dest="board_filename",
-        help="Specifies the board file",
-        default="MIMXRT1020_EVK/pins.csv",
-    )
-    parser.add_argument(
-        "-p",
-        "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="mimxrt_prefix.c",
-    )
-    parser.add_argument(
-        "-r",
-        "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h",
-    )
+    parser = argparse.ArgumentParser(description="Generate board specific pin file")
+    parser.add_argument("--board-csv")
+    parser.add_argument("--af-csv")
+    parser.add_argument("--prefix")
+    parser.add_argument("--iomux-header")
+    parser.add_argument("--output-source")
+    parser.add_argument("--output-header")
+    args = parser.parse_args()
 
     pins = Pins()
 
-    # test code
-    args = parser.parse_args()
-    #
+    with open(args.output_source, "w") as out_source:
+        if args.af_csv:
+            print("// --af {:s}".format(args.af_csv), file=out_source)
+            pins.parse_af_file(args.af_csv, args.iomux_header)
 
-    if args.af_filename:
-        print("// --af {:s}".format(args.af_filename))
-        pins.parse_af_file(args.af_filename, args.iomux_filename)
+        if args.board_csv:
+            print("// --board {:s}".format(args.board_csv), file=out_source)
+            pins.parse_board_file(args.board_csv)
 
-    if args.board_filename:
-        print("// --board {:s}".format(args.board_filename))
-        pins.parse_board_file(args.board_filename)
+        if args.output_header:
+            print("// --hdr {:s}".format(args.output_header), file=out_source)
 
-    if args.hdr_filename:
-        print("// --hdr {:s}".format(args.hdr_filename))
+        if args.prefix:
+            print("// --prefix {:s}".format(args.prefix), file=out_source)
+            with open(args.prefix, "r") as prefix_file:
+                print(prefix_file.read(), file=out_source)
 
-    if args.prefix_filename:
-        print("// --prefix {:s}".format(args.prefix_filename))
-        with open(args.prefix_filename, "r") as prefix_file:
-            print(prefix_file.read())
+        pins.print(out_source)
 
-    pins.print()
-    pins.print_header(args.hdr_filename)
+    with open(args.output_header, "w") as out_header:
+        pins.print_header(out_header)
 
 
 if __name__ == "__main__":
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index 2f9b93d7ff..d0ecddd615 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -539,7 +539,8 @@ $(OBJ): | $(HEADER_BUILD)/pins.h
 # both pins_gen.c and pins.h
 $(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --af-const $(GEN_PINS_AF_CONST) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv $(AF_FILE) --prefix $(PREFIX_FILE) \
+	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR) --output-af-const $(GEN_PINS_AF_CONST)
 
 $(PY_BUILD)/nlr%.o: CFLAGS += -Os -fno-lto
 
diff --git a/ports/nrf/boards/make-pins.py b/ports/nrf/boards/make-pins.py
index 6bfb662514..6932a18d64 100644
--- a/ports/nrf/boards/make-pins.py
+++ b/ports/nrf/boards/make-pins.py
@@ -67,19 +67,20 @@ class AlternateFunction(object):
     def mux_name(self):
         return "AF{:d}_{:s}".format(self.idx, self.ptr())
 
-    def print(self):
+    def print(self, out_source):
         """Prints the C representation of this AF."""
         if self.supported:
-            print("  AF", end="")
+            print("  AF", end="", file=out_source)
         else:
-            print("  //", end="")
+            print("  //", end="", file=out_source)
         fn_num = self.fn_num
         if fn_num is None:
             fn_num = 0
         print(
             "({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}".format(
                 self.idx, self.func, fn_num, self.pin_type, self.ptr(), self.af_str
-            )
+            ),
+            file=out_source,
         )
 
 
@@ -144,23 +145,24 @@ class Pin(object):
             str = "0"
         return str
 
-    def print_const_table_entry(self):
+    def print_const_table_entry(self, out_source):
         print(
             "  PIN({:d}, {:s}, {:s}, {:d}),".format(
                 self.pin, self.alt_fn_name(null_if_0=True), self.adc_num_str(), self.adc_channel
-            )
+            ),
+            file=out_source,
         )
 
-    def print(self):
+    def print(self, out_source):
         if self.alt_fn_count == 0:
-            print("// ", end="")
-        print("const pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()))
+            print("// ", end="", file=out_source)
+        print("const pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()), file=out_source)
         for alt_fn in self.alt_fn:
-            alt_fn.print()
+            alt_fn.print(out_source)
         if self.alt_fn_count == 0:
-            print("// ", end="")
-        print("};")
-        print("")
+            print("// ", end="", file=out_source)
+        print("};", file=out_source)
+        print("", file=out_source)
         print(
             "const pin_obj_t pin_{:s} = PIN({:d}, {:s}, {:s}, {:d});".format(
                 self.cpu_pin_name(),
@@ -168,15 +170,17 @@ class Pin(object):
                 self.alt_fn_name(null_if_0=True),
                 self.adc_num_str(),
                 self.adc_channel,
-            )
+            ),
+            file=out_source,
         )
-        print("")
+        print("", file=out_source)
 
-    def print_header(self, hdr_file):
-        hdr_file.write("extern const pin_obj_t pin_{:s};\n".format(self.cpu_pin_name()))
+    def print_header(self, out_header):
+        print("extern const pin_obj_t pin_{:s};".format(self.cpu_pin_name()), file=out_header)
         if self.alt_fn_count > 0:
-            hdr_file.write(
-                "extern const pin_af_obj_t pin_{:s}_af[];\n".format(self.cpu_pin_name())
+            print(
+                "extern const pin_af_obj_t pin_{:s}_af[];\n".format(self.cpu_pin_name()),
+                file=out_header,
             )
 
 
@@ -232,9 +236,10 @@ class Pins(object):
                     pin.set_is_board_pin()
                     self.board_pins.append(NamedPin(row[0], pin))
 
-    def print_named(self, label, named_pins):
+    def print_named(self, label, named_pins, out_source):
         print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label)
+            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
+            file=out_source,
         )
         for named_pin in named_pins:
             pin = named_pin.pin()
@@ -242,148 +247,109 @@ class Pins(object):
                 print(
                     "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&machine_board_pin_obj[{:d}]) }},".format(
                         named_pin.name(), pin.board_index
-                    )
+                    ),
+                    file=out_source,
                 )
-        print("};")
+        print("};", file=out_source)
         print(
             "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
                 label, label
-            )
+            ),
+            file=out_source,
         )
 
-    def print_const_table(self):
+    def print_const_table(self, out_source):
         num_board_pins = 0
         for named_pin in self.cpu_pins:
             pin = named_pin.pin()
             if pin.is_board_pin():
                 pin.set_board_index(num_board_pins)
                 num_board_pins += 1
-        print("")
-        print("const uint8_t machine_pin_num_of_board_pins = {:d};".format(num_board_pins))
-        print("")
-        print("const pin_obj_t machine_board_pin_obj[{:d}] = {{".format(num_board_pins))
+        print("", file=out_source)
+        print(
+            "const uint8_t machine_pin_num_of_board_pins = {:d};".format(num_board_pins),
+            file=out_source,
+        )
+        print("", file=out_source)
+        print(
+            "const pin_obj_t machine_board_pin_obj[{:d}] = {{".format(num_board_pins),
+            file=out_source,
+        )
         for named_pin in self.cpu_pins:
             pin = named_pin.pin()
             if pin.is_board_pin():
-                pin.print_const_table_entry()
-        print("};")
+                pin.print_const_table_entry(out_source)
+        print("};", file=out_source)
 
-    def print(self):
-        self.print_named("cpu", self.cpu_pins)
-        print("")
-        self.print_named("board", self.board_pins)
+    def print(self, out_source):
+        self.print_named("cpu", self.cpu_pins, out_source)
+        print("", file=out_source)
+        self.print_named("board", self.board_pins, out_source)
 
-    def print_adc(self, adc_num):
-        print("")
-        print("const pin_obj_t * const pin_adc{:d}[] = {{".format(adc_num))
-        for channel in range(16):
-            adc_found = False
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if (
-                    pin.is_board_pin()
-                    and (pin.adc_num & (1 << (adc_num - 1)))
-                    and (pin.adc_channel == channel)
-                ):
-                    print("  &pin_{:s}, // {:d}".format(pin.cpu_pin_name(), channel))
-                    adc_found = True
-                    break
-            if not adc_found:
-                print("  NULL,    // {:d}".format(channel))
-        print("};")
+    def print_header(self, out_header):
+        for named_pin in self.cpu_pins:
+            pin = named_pin.pin()
+            if pin.is_board_pin():
+                pin.print_header(out_header)
+        print("extern const pin_obj_t * const pin_adc1[];", file=out_header)
+        print("extern const pin_obj_t * const pin_adc2[];", file=out_header)
+        print("extern const pin_obj_t * const pin_adc3[];", file=out_header)
 
-    def print_header(self, hdr_filename):
-        with open(hdr_filename, "wt") as hdr_file:
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    pin.print_header(hdr_file)
-            hdr_file.write("extern const pin_obj_t * const pin_adc1[];\n")
-            hdr_file.write("extern const pin_obj_t * const pin_adc2[];\n")
-            hdr_file.write("extern const pin_obj_t * const pin_adc3[];\n")
-
-    def print_af_hdr(self, af_const_filename):
-        with open(af_const_filename, "wt") as af_const_file:
-            af_hdr_set = set([])
-            mux_name_width = 0
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    for af in pin.alt_fn:
-                        if af.is_supported():
-                            mux_name = af.mux_name()
-                            af_hdr_set |= set([mux_name])
-                            if len(mux_name) > mux_name_width:
-                                mux_name_width = len(mux_name)
-            for mux_name in sorted(af_hdr_set):
-                key = "MP_ROM_QSTR(MP_QSTR_{}),".format(mux_name)
-                val = "MP_ROM_INT(GPIO_{})".format(mux_name)
-                print("    { %-*s %s }," % (mux_name_width + 26, key, val), file=af_const_file)
+    def print_af_hdr(self, out_af_const):
+        af_hdr_set = set([])
+        mux_name_width = 0
+        for named_pin in self.cpu_pins:
+            pin = named_pin.pin()
+            if pin.is_board_pin():
+                for af in pin.alt_fn:
+                    if af.is_supported():
+                        mux_name = af.mux_name()
+                        af_hdr_set |= set([mux_name])
+                        if len(mux_name) > mux_name_width:
+                            mux_name_width = len(mux_name)
+        for mux_name in sorted(af_hdr_set):
+            key = "MP_ROM_QSTR(MP_QSTR_{}),".format(mux_name)
+            val = "MP_ROM_INT(GPIO_{})".format(mux_name)
+            print("    { %-*s %s }," % (mux_name_width + 26, key, val), file=out_af_const)
 
 
 def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file",
-    )
-    parser.add_argument(
-        "-a",
-        "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="nrf.csv",
-    )
-    parser.add_argument(
-        "--af-const",
-        dest="af_const_filename",
-        help="Specifies header file for alternate function constants.",
-        default="build/pins_af_const.h",
-    )
-    parser.add_argument(
-        "-b",
-        "--board",
-        dest="board_filename",
-        help="Specifies the board file",
-    )
-    parser.add_argument(
-        "-p",
-        "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="nrf52_prefix.c",
-    )
-    parser.add_argument(
-        "-r",
-        "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h",
-    )
-    args = parser.parse_args(sys.argv[1:])
+    parser = argparse.ArgumentParser(description="Generate board specific pin file")
+    parser.add_argument("--board-csv")
+    parser.add_argument("--af-csv")
+    parser.add_argument("--prefix")
+    parser.add_argument("--output-source")
+    parser.add_argument("--output-header")
+    parser.add_argument("--output-af-const")
+    args = parser.parse_args()
 
     pins = Pins()
 
-    print("// This file was automatically generated by make-pins.py")
-    print("//")
-    if args.af_filename:
-        print("// --af {:s}".format(args.af_filename))
-        pins.parse_af_file(args.af_filename, 1, 2, 2)
+    with open(args.output_source, "w") as out_source:
+        print("// This file was automatically generated by make-pins.py", file=out_source)
+        print("//", file=out_source)
+        if args.af_csv:
+            print("// --af {:s}".format(args.af_csv), file=out_source)
+            pins.parse_af_file(args.af_csv, 1, 2, 2)
 
-    if args.board_filename:
-        print("// --board {:s}".format(args.board_filename))
-        pins.parse_board_file(args.board_filename)
+        if args.board_csv:
+            print("// --board {:s}".format(args.board_csv), file=out_source)
+            pins.parse_board_file(args.board_csv)
 
-    if args.prefix_filename:
-        print("// --prefix {:s}".format(args.prefix_filename))
-        print("")
-        with open(args.prefix_filename, "r") as prefix_file:
-            print(prefix_file.read())
+        if args.prefix:
+            print("// --prefix {:s}".format(args.prefix), file=out_source)
+            print("", file=out_source)
+            with open(args.prefix, "r") as prefix_file:
+                print(prefix_file.read(), file=out_source)
 
-    pins.print_const_table()
-    pins.print()
-    pins.print_header(args.hdr_filename)
-    pins.print_af_hdr(args.af_const_filename)
+        pins.print_const_table(out_source)
+        pins.print(out_source)
+
+    with open(args.output_header, "w") as out_header:
+        pins.print_header(out_header)
+
+    with open(args.output_af_const, "w") as out_af_const:
+        pins.print_af_hdr(out_af_const)
 
 
 if __name__ == "__main__":
diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index 8c09dc91bd..4e31029073 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -580,7 +580,8 @@ $(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
 .PRECIOUS: $(GEN_PINS_SRC)
 $(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_ad_const.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --ad-const $(GEN_PINS_AD_CONST) > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv $(AF_FILE) --prefix $(PREFIX_FILE) \
+	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR) --output-ad-const $(GEN_PINS_AD_CONST)
 
 CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h
 
diff --git a/ports/renesas-ra/boards/make-pins.py b/ports/renesas-ra/boards/make-pins.py
index 43267a1fa3..5eebbb4926 100644
--- a/ports/renesas-ra/boards/make-pins.py
+++ b/ports/renesas-ra/boards/make-pins.py
@@ -28,18 +28,19 @@ class PinAD(object):
     def channel(self):
         return self._channel
 
-    def print(self):
+    def print(self, out_source):
         print(
             "const pin_ad_obj_t pin_{:s}_ad_obj = PIN_AD({:s}, {:d}, {:d}, {:d});".format(
                 self._cpu_pin_name, self._name, self._pin_idx, self._bit, self._channel
-            )
+            ),
+            file=out_source,
         )
-        print("")
+        print("", file=out_source)
 
-    def print_header(self, hdr_file):
+    def print_header(self, out_header):
         n = self.cpu_pin_name()
-        hdr_file.write("extern const pin_ad_obj_t pin_{:s}_ad_obj;\n".format(n))
-        hdr_file.write("#define pin_{:s}_ad (&pin_{:s}_ad_obj)\n".format(n, n))
+        print("extern const pin_ad_obj_t pin_{:s}_ad_obj;".format(n), file=out_header)
+        print("#define pin_{:s}_ad (&pin_{:s}_ad_obj)".format(n, n), file=out_header)
 
 
 class Pin(object):
@@ -78,22 +79,23 @@ class Pin(object):
             ad_channel = int(ad_str[2:4])
             self._pin_ad.append(PinAD(ad_str, self._name, self._pin_idx, ad_bit, ad_channel))
 
-    def print(self):
+    def print(self, out_source):
         pin_ad_name = "NULL"
         for pin_ad in self._pin_ad:
-            pin_ad.print()
+            pin_ad.print(out_source)
             pin_ad_name = "pin_{:s}_ad".format(pin_ad.cpu_pin_name())
         print(
             "const machine_pin_obj_t pin_{:s}_obj = PIN({:s}, {:d}, {:s});".format(
                 self._name, self._name, self._pin_idx, pin_ad_name
-            )
+            ),
+            file=out_source,
         )
-        print("")
+        print("", file=out_source)
 
-    def print_header(self, hdr_file):
+    def print_header(self, out_header):
         n = self.cpu_pin_name()
-        hdr_file.write("extern const machine_pin_obj_t pin_{:s}_obj;\n".format(n))
-        hdr_file.write("#define pin_{:s} (&pin_{:s}_obj)\n".format(n, n))
+        print("extern const machine_pin_obj_t pin_{:s}_obj;".format(n), file=out_header)
+        print("#define pin_{:s} (&pin_{:s}_obj)".format(n, n), file=out_header)
 
 
 class NamedPin(object):
@@ -152,9 +154,10 @@ class Pins(object):
                     pin.set_is_board_pin()
                     self.board_pins.append(NamedPin(board_pin_name, pin))
 
-    def print_named(self, label, named_pins):
+    def print_named(self, label, named_pins, out_source):
         print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label)
+            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
+            file=out_source,
         )
         for named_pin in named_pins:
             pin = named_pin.pin()
@@ -162,120 +165,93 @@ class Pins(object):
                 print(
                     "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}_obj) }},".format(
                         named_pin.name(), pin.cpu_pin_name()
-                    )
+                    ),
+                    file=out_source,
                 )
-        print("};")
+        print("};", file=out_source)
         print(
             "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
                 label, label
-            )
+            ),
+            file=out_source,
         )
 
-    def print(self):
+    def print(self, out_source):
         for named_pin in self.cpu_pins:
             pin = named_pin.pin()
             if pin.is_board_pin():
-                pin.print()
-        self.print_named("cpu", self.cpu_pins)
-        print("")
-        self.print_named("board", self.board_pins)
+                pin.print(out_source)
+        self.print_named("cpu", self.cpu_pins, out_source)
+        print("", file=out_source)
+        self.print_named("board", self.board_pins, out_source)
 
-    def print_header(self, hdr_filename):
-        with open(hdr_filename, "wt") as hdr_file:
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    pin.print_header(hdr_file)
+    def print_header(self, out_header):
+        for named_pin in self.cpu_pins:
+            pin = named_pin.pin()
+            if pin.is_board_pin():
+                pin.print_header(out_header)
+            pin_ads = pin.pin_ad()
+            for pin_ad in pin_ads:
+                pin_ad.print_header(out_header)
+        # provide #define's mapping board to cpu name
+        for named_pin in self.board_pins:
+            print(
+                "#define pyb_pin_{:s} pin_{:s}".format(
+                    named_pin.name(), named_pin.pin().cpu_pin_name()
+                ),
+                file=out_header,
+            )
+
+    def print_ad_hdr(self, out_ad_const):
+        for named_pin in self.cpu_pins:
+            pin = named_pin.pin()
+            if pin.is_board_pin():
                 pin_ads = pin.pin_ad()
                 for pin_ad in pin_ads:
-                    pin_ad.print_header(hdr_file)
-            # provide #define's mapping board to cpu name
-            for named_pin in self.board_pins:
-                hdr_file.write(
-                    "#define pyb_pin_{:s} pin_{:s}\n".format(
-                        named_pin.name(), named_pin.pin().cpu_pin_name()
+                    print(
+                        "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_INT(GPIO_{:s}) }}, \n".format(
+                            pin_ad.name(), pin_ad.name()
+                        ),
+                        file=out_ad_const,
                     )
-                )
-
-    def print_ad_hdr(self, ad_const_filename):
-        with open(ad_const_filename, "wt") as ad_const_file:
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    pin_ads = pin.pin_ad()
-                    for pin_ad in pin_ads:
-                        ad_const_file.write(
-                            "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_INT(GPIO_{:s}) }}, \n".format(
-                                pin_ad.name(), pin_ad.name()
-                            )
-                        )
 
 
 def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file",
-    )
-    parser.add_argument(
-        "-a",
-        "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="ra4m1_af.csv",
-    )
-    parser.add_argument(
-        "-b", "--board", dest="board_filename", help="Specifies the board file", default="pins.csv"
-    )
-    parser.add_argument(
-        "-p",
-        "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="ra4m1_prefix.c",
-    )
-    parser.add_argument(
-        "--ad-const",
-        dest="ad_const_filename",
-        help="Specifies header file for AD function constants.",
-        default="build/pins_ad_const.h",
-    )
-    parser.add_argument(
-        "--af-defs",
-        dest="af_defs_filename",
-        help="Specifies the filename for the alternate function defines.",
-        default="build/pins_af_defs.h",
-    )
-    parser.add_argument(
-        "-r",
-        "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h",
-    )
-    args = parser.parse_args(sys.argv[1:])
+    parser = argparse.ArgumentParser(description="Generate board specific pin file")
+    parser.add_argument("--board-csv")
+    parser.add_argument("--af-csv")
+    parser.add_argument("--prefix")
+    parser.add_argument("--output-source")
+    parser.add_argument("--output-header")
+    parser.add_argument("--output-ad-const")
+    args = parser.parse_args()
 
     pins = Pins()
 
-    print("// This file was automatically generated by make-pins.py")
-    print("//")
-    if args.af_filename:
-        print("// --af {:s}".format(args.af_filename))
-        pins.parse_af_file(args.af_filename)
+    with open(args.output_source, "w") as out_source:
+        print("// This file was automatically generated by make-pins.py", file=out_source)
+        print("//", file=out_source)
+        if args.af_csv:
+            print("// --af {:s}".format(args.af_csv), file=out_source)
+            pins.parse_af_file(args.af_csv)
 
-    if args.board_filename:
-        print("// --board {:s}".format(args.board_filename))
-        pins.parse_board_file(args.board_filename)
+        if args.board_csv:
+            print("// --board {:s}".format(args.board_csv), file=out_source)
+            pins.parse_board_file(args.board_csv)
 
-    if args.prefix_filename:
-        print("// --prefix {:s}".format(args.prefix_filename))
-        print("")
-        with open(args.prefix_filename, "r") as prefix_file:
-            print(prefix_file.read())
+        if args.prefix:
+            print("// --prefix {:s}".format(args.prefix), file=out_source)
+            print("", file=out_source)
+            with open(args.prefix, "r") as prefix_file:
+                print(prefix_file.read(), file=out_source)
 
-    pins.print()
-    pins.print_header(args.hdr_filename)
-    pins.print_ad_hdr(args.ad_const_filename)
+        pins.print(out_source)
+
+    with open(args.output_header, "w") as out_header:
+        pins.print_header(out_header)
+
+    with open(args.output_ad_const, "w") as out_ad_const:
+        pins.print_ad_hdr(out_ad_const)
 
 
 if __name__ == "__main__":
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index f643b66793..7b715c31fa 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -483,7 +483,7 @@ set(GEN_PINS_AF_CONST "${MICROPY_GENHDR_DIR}/pins_af_const.h")
 
 if(EXISTS "${MICROPY_BOARDS_DIR}/${MICROPY_BOARD}/pins.csv")
     set(GEN_PINS_BOARD_CSV "${MICROPY_BOARDS_DIR}/${MICROPY_BOARD}/pins.csv")
-    set(GEN_PINS_CSV_ARG --board "${GEN_PINS_BOARD_CSV}")
+    set(GEN_PINS_CSV_ARG --board-csv "${GEN_PINS_BOARD_CSV}")
 endif()
 
 target_sources(${MICROPY_TARGET} PRIVATE
@@ -493,8 +493,7 @@ target_sources(${MICROPY_TARGET} PRIVATE
 # Generate pins
 add_custom_command(
     OUTPUT ${GEN_PINS_HDR} ${GEN_PINS_SRC}
-    COMMAND ${Python3_EXECUTABLE} ${GEN_PINS_MKPINS} ${GEN_PINS_CSV_ARG} --af ${GEN_PINS_AF_CSV} --prefix ${GEN_PINS_PREFIX}
-    --hdr ${GEN_PINS_HDR} > ${GEN_PINS_SRC}
+    COMMAND ${Python3_EXECUTABLE} ${GEN_PINS_MKPINS} ${GEN_PINS_CSV_ARG} --af-csv ${GEN_PINS_AF_CSV} --prefix ${GEN_PINS_PREFIX} --output-source ${GEN_PINS_SRC} --output-header ${GEN_PINS_HDR}
     DEPENDS
         ${GEN_PINS_AF_CSV}
         ${GEN_PINS_BOARD_CSV}
diff --git a/ports/rp2/boards/make-pins.py b/ports/rp2/boards/make-pins.py
index 9c66248885..4cf73d9900 100755
--- a/ports/rp2/boards/make-pins.py
+++ b/ports/rp2/boards/make-pins.py
@@ -68,16 +68,19 @@ class AlternateFunction(object):
     def is_supported(self):
         return self.supported
 
-    def print(self):
+    def print(self, out_source):
         """Prints the C representation of this AF."""
         if self.supported:
-            print("  AF", end="")
+            print("  AF", end="", file=out_source)
         else:
-            print("  //", end="")
+            print("  //", end="", file=out_source)
         fn_num = self.fn_num
         if fn_num is None:
             fn_num = 0
-        print("({:d}, {:4s}, {:d}), // {:s}".format(self.idx, self.func, fn_num, self.af_str))
+        print(
+            "({:d}, {:4s}, {:d}), // {:s}".format(self.idx, self.func, fn_num, self.af_str),
+            file=out_source,
+        )
 
 
 class Pin(object):
@@ -116,19 +119,19 @@ class Pin(object):
             return "NULL"
         return "pin_{:s}_af".format(self.cpu_pin_name())
 
-    def print(self):
+    def print(self, out_source):
         if self.is_ext:
-            print("#if (MICROPY_HW_PIN_EXT_COUNT > {:d})".format(self.pin))
+            print("#if (MICROPY_HW_PIN_EXT_COUNT > {:d})".format(self.pin), file=out_source)
 
         if self.alt_fn_count == 0:
-            print("// ", end="")
-        print("const machine_pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()))
+            print("// ", end="", file=out_source)
+        print("const machine_pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()), file=out_source)
         for alt_fn in self.alt_fn:
-            alt_fn.print()
+            alt_fn.print(out_source)
         if self.alt_fn_count == 0:
-            print("// ", end="")
-        print("};")
-        print("")
+            print("// ", end="", file=out_source)
+        print("};", file=out_source)
+        print("", file=out_source)
         print(
             "{:s}machine_pin_obj_t pin_{:s} = PIN({:d}, {:s}, {:d}, {:d}, {:s});".format(
                 "" if self.is_ext else "const ",
@@ -138,19 +141,21 @@ class Pin(object):
                 self.is_ext,
                 self.alt_fn_count,
                 self.alt_fn_name(null_if_0=True),
-            )
+            ),
+            file=out_source,
         )
         if self.is_ext:
-            print("#endif")
-        print("")
+            print("#endif", file=out_source)
+        print("", file=out_source)
 
-    def print_header(self, hdr_file):
+    def print_header(self, out_header):
         n = self.cpu_pin_name()
-        hdr_file.write(
-            "extern{:s}machine_pin_obj_t pin_{:s};\n".format(" " if self.is_ext else " const ", n)
+        print(
+            "extern{:s}machine_pin_obj_t pin_{:s};".format(" " if self.is_ext else " const ", n),
+            file=out_header,
         )
         if self.alt_fn_count > 0:
-            hdr_file.write("extern const machine_pin_af_obj_t pin_{:s}_af[];\n".format(n))
+            print("extern const machine_pin_af_obj_t pin_{:s}_af[];".format(n), file=out_header)
 
 
 class NamedPin(object):
@@ -219,126 +224,107 @@ class Pins(object):
                     if row[0]:  # Only add board pins that have a name
                         self.board_pins.append(NamedPin(row[0], pin))
 
-    def print_table(self, label, named_pins):
-        print("")
-        print("const machine_pin_obj_t *machine_pin_{:s}_pins[] = {{".format(label))
+    def print_table(self, label, named_pins, out_source):
+        print("", file=out_source)
+        print(
+            "const machine_pin_obj_t *machine_pin_{:s}_pins[] = {{".format(label), file=out_source
+        )
         for pin in named_pins:
             if not pin.pin().is_ext:
-                print("    &pin_{},".format(pin.name()))
-        print("};")
-        print("")
+                print("    &pin_{},".format(pin.name()), file=out_source)
+        print("};", file=out_source)
+        print("", file=out_source)
 
-    def print_named(self, label, named_pins):
-        print("")
+    def print_named(self, label, named_pins, out_source):
+        print("", file=out_source)
         print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label)
+            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
+            file=out_source,
         )
         for named_pin in named_pins:
             pin = named_pin.pin()
             if pin.is_ext:
-                print("  #if (MICROPY_HW_PIN_EXT_COUNT > {:d})".format(pin.pin))
+                print("  #if (MICROPY_HW_PIN_EXT_COUNT > {:d})".format(pin.pin), file=out_source)
             print(
                 "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},".format(
                     named_pin.name(), pin.cpu_pin_name()
-                )
+                ),
+                file=out_source,
             )
             if pin.is_ext:
-                print("  #endif")
+                print("  #endif", file=out_source)
 
-        print("};")
+        print("};", file=out_source)
         print(
             "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
                 label, label
-            )
+            ),
+            file=out_source,
         )
-        print("")
+        print("", file=out_source)
 
-    def print(self):
+    def print(self, out_source):
         for pin in self.cpu_pins:
-            pin.pin().print()
+            pin.pin().print(out_source)
 
         for pin in self.ext_pins:
             if pin.pin().is_ext:
-                pin.pin().print()
+                pin.pin().print(out_source)
 
-        self.print_table("cpu", self.cpu_pins)
-        self.print_named("cpu", self.cpu_pins + self.ext_pins)
-        self.print_named("board", self.board_pins)
+        self.print_table("cpu", self.cpu_pins, out_source)
+        self.print_named("cpu", self.cpu_pins + self.ext_pins, out_source)
+        self.print_named("board", self.board_pins, out_source)
 
-    def print_header(self, hdr_filename, obj_decls):
-        with open(hdr_filename, "wt") as hdr_file:
-            if obj_decls:
-                for named_pin in self.cpu_pins:
-                    pin = named_pin.pin()
-                    pin.print_header(hdr_file)
-                for named_pin in self.board_pins:
-                    pin = named_pin.pin()
-                    if pin.is_ext:
-                        pin.print_header(hdr_file)
-            # provide #define's mapping board to cpu name
-            for named_pin in self.board_pins:
-                if named_pin.pin().is_board_pin():
-                    hdr_file.write(
-                        "#define pin_{:s} pin_{:s}\n".format(
-                            named_pin.name(), named_pin.pin().cpu_pin_name()
-                        )
-                    )
+    def print_header(self, out_header):
+        for named_pin in self.cpu_pins:
+            pin = named_pin.pin()
+            pin.print_header(out_header)
+        for named_pin in self.board_pins:
+            pin = named_pin.pin()
+            if pin.is_ext:
+                pin.print_header(out_header)
+        # provide #define's mapping board to cpu name
+        for named_pin in self.board_pins:
+            if named_pin.pin().is_board_pin():
+                print(
+                    "#define pin_{:s} pin_{:s}".format(
+                        named_pin.name(), named_pin.pin().cpu_pin_name()
+                    ),
+                    file=out_header,
+                )
 
 
 def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file",
-    )
-    parser.add_argument(
-        "-a",
-        "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="rp2_af.csv",
-    )
-    parser.add_argument(
-        "-b",
-        "--board",
-        dest="board_filename",
-        help="Specifies the board file",
-    )
-    parser.add_argument(
-        "-p",
-        "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="rp2_prefix.c",
-    )
-    parser.add_argument(
-        "-r",
-        "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h",
-    )
-    args = parser.parse_args(sys.argv[1:])
+    parser = argparse.ArgumentParser(description="Generate board specific pin file")
+    parser.add_argument("--board-csv")
+    parser.add_argument("--af-csv")
+    parser.add_argument("--prefix")
+    parser.add_argument("--output-source")
+    parser.add_argument("--output-header")
+    args = parser.parse_args()
 
     pins = Pins()
 
-    print("// This file was automatically generated by make-pins.py")
-    print("//")
-    if args.af_filename:
-        print("// --af {:s}".format(args.af_filename))
-        pins.parse_af_file(args.af_filename, 0, 1)
+    with open(args.output_source, "w") as out_source:
+        print("// This file was automatically generated by make-pins.py", file=out_source)
+        print("//", file=out_source)
+        if args.af_csv:
+            print("// --af {:s}".format(args.af_csv), file=out_source)
+            pins.parse_af_file(args.af_csv, 0, 1)
 
-    if args.board_filename:
-        print("// --board {:s}".format(args.board_filename))
-        pins.parse_board_file(args.board_filename)
+        if args.board_csv:
+            print("// --board {:s}".format(args.board_csv), file=out_source)
+            pins.parse_board_file(args.board_csv)
 
-    if args.prefix_filename:
-        print("// --prefix {:s}".format(args.prefix_filename))
-        print("")
-        with open(args.prefix_filename, "r") as prefix_file:
-            print(prefix_file.read())
-    pins.print()
-    pins.print_header(args.hdr_filename, True)
+        if args.prefix:
+            print("// --prefix {:s}".format(args.prefix), file=out_source)
+            print("", file=out_source)
+            with open(args.prefix, "r") as prefix_file:
+                print(prefix_file.read(), file=out_source)
+        pins.print(out_source)
+
+    with open(args.output_header, "w") as out_header:
+        pins.print_header(out_header)
 
 
 if __name__ == "__main__":
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index 8d521182ff..edebd2db9d 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -673,10 +673,9 @@ main.c: $(GEN_CDCINF_HEADER)
 # both pins_$(BOARD).c and pins.h
 $(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_BUILD)/%_af_defs.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) \
-		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --hdr-obj-decls \
-		--af-const $(GEN_PINS_AF_CONST) --af-defs $(GEN_PINS_AF_DEFS) \
-		--af-defs-cmp-strings > $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv $(AF_FILE) --prefix $(PREFIX_FILE) \
+	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR) \
+		--output-af-const $(GEN_PINS_AF_CONST) --output-af-defs $(GEN_PINS_AF_DEFS)
 
 modmachine.c: $(GEN_PLLFREQTABLE_HDR)
 $(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py
index 99b507a3a8..92e8d76734 100755
--- a/ports/stm32/boards/make-pins.py
+++ b/ports/stm32/boards/make-pins.py
@@ -116,7 +116,7 @@ def conditional_var(name_num):
     return var
 
 
-def print_conditional_if(cond_var, file=None):
+def print_conditional_if(cond_var, file):
     if cond_var:
         cond_str = []
         for var in cond_var:
@@ -127,7 +127,7 @@ def print_conditional_if(cond_var, file=None):
         print("#if " + " || ".join(cond_str), file=file)
 
 
-def print_conditional_endif(cond_var, file=None):
+def print_conditional_endif(cond_var, file):
     if cond_var:
         print("#endif", file=file)
 
@@ -169,24 +169,25 @@ class AlternateFunction(object):
     def mux_name(self):
         return "AF{:d}_{:s}".format(self.idx, self.ptr())
 
-    def print(self):
+    def print(self, out_source):
         """Prints the C representation of this AF."""
         cond_var = None
         if self.supported:
             cond_var = conditional_var("{}{}".format(self.func, self.fn_num))
-            print_conditional_if(cond_var)
-            print("  AF", end="")
+            print_conditional_if(cond_var, file=out_source)
+            print("  AF", end="", file=out_source)
         else:
-            print("  //", end="")
+            print("  //", end="", file=out_source)
         fn_num = self.fn_num
         if fn_num is None:
             fn_num = 0
         print(
             "({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}".format(
                 self.idx, self.func, fn_num, self.pin_type, self.ptr(), self.af_str
-            )
+            ),
+            file=out_source,
         )
-        print_conditional_endif(cond_var)
+        print_conditional_endif(cond_var, file=out_source)
 
 
 class Pin(object):
@@ -269,16 +270,16 @@ class Pin(object):
             str = "0"
         return str
 
-    def print(self):
+    def print(self, out_source):
         if self.alt_fn_count == 0:
-            print("// ", end="")
-        print("const pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()))
+            print("// ", end="", file=out_source)
+        print("const pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()), file=out_source)
         for alt_fn in self.alt_fn:
-            alt_fn.print()
+            alt_fn.print(out_source)
         if self.alt_fn_count == 0:
-            print("// ", end="")
-        print("};")
-        print("")
+            print("// ", end="", file=out_source)
+        print("};", file=out_source)
+        print("", file=out_source)
         print(
             "const pin_obj_t pin_{:s}_obj = PIN({:s}, {:d}, {:s}, {:s}, {:d});".format(
                 self.cpu_pin_name(),
@@ -287,16 +288,17 @@ class Pin(object):
                 self.alt_fn_name(null_if_0=True),
                 self.adc_num_str(),
                 self.adc_channel,
-            )
+            ),
+            file=out_source,
         )
-        print("")
+        print("", file=out_source)
 
-    def print_header(self, hdr_file):
+    def print_header(self, out_header):
         n = self.cpu_pin_name()
-        hdr_file.write("extern const pin_obj_t pin_{:s}_obj;\n".format(n))
-        hdr_file.write("#define pin_{:s} (&pin_{:s}_obj)\n".format(n, n))
+        print("extern const pin_obj_t pin_{:s}_obj;".format(n), file=out_header)
+        print("#define pin_{:s} (&pin_{:s}_obj)".format(n, n), file=out_header)
         if self.alt_fn_count > 0:
-            hdr_file.write("extern const pin_af_obj_t pin_{:s}_af[];\n".format(n))
+            print("extern const pin_af_obj_t pin_{:s}_af[];".format(n), file=out_header)
 
 
 class NamedPin(object):
@@ -377,9 +379,10 @@ class Pins(object):
                     if row[0]:  # Only add board pins that have a name
                         self.board_pins.append(NamedPin(row[0], pin))
 
-    def print_named(self, label, named_pins):
+    def print_named(self, label, named_pins, out_source):
         print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label)
+            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
+            file=out_source,
         )
         for named_pin in named_pins:
             pin = named_pin.pin()
@@ -387,25 +390,27 @@ class Pins(object):
                 print(
                     "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}_obj) }},".format(
                         named_pin.name(), pin.cpu_pin_name()
-                    )
+                    ),
+                    file=out_source,
                 )
-        print("};")
+        print("};", file=out_source)
         print(
             "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
                 label, label
-            )
+            ),
+            file=out_source,
         )
 
-    def print(self):
+    def print(self, out_source):
         for named_pin in self.cpu_pins:
             pin = named_pin.pin()
             if pin.is_board_pin():
-                pin.print()
-        self.print_named("cpu", self.cpu_pins)
-        print("")
-        self.print_named("board", self.board_pins)
+                pin.print(out_source)
+        self.print_named("cpu", self.cpu_pins, out_source)
+        print("", file=out_source)
+        self.print_named("board", self.board_pins, out_source)
 
-    def print_adc(self, adc_num):
+    def print_adc(self, adc_num, out_source):
         adc_pins = {}
         for named_pin in self.cpu_pins:
             pin = named_pin.pin()
@@ -421,171 +426,134 @@ class Pins(object):
             # If ADCx pins are hidden, print an empty table to prevent linker errors.
             table_size = 0
         self.adc_table_size[adc_num] = table_size
-        print("")
-        print("const pin_obj_t * const pin_adc{:d}[{:d}] = {{".format(adc_num, table_size))
+        print("", file=out_source)
+        print(
+            "const pin_obj_t * const pin_adc{:d}[{:d}] = {{".format(adc_num, table_size),
+            file=out_source,
+        )
         for channel in range(table_size):
             if channel in adc_pins:
                 obj = "&pin_{:s}_obj".format(adc_pins[channel].cpu_pin_name())
             else:
                 obj = "NULL"
-            print("  [{:d}] = {},".format(channel, obj))
-        print("};")
+            print("  [{:d}] = {},".format(channel, obj), file=out_source)
+        print("};", file=out_source)
 
-    def print_header(self, hdr_filename, obj_decls):
-        with open(hdr_filename, "wt") as hdr_file:
-            if obj_decls:
-                for named_pin in self.cpu_pins:
-                    pin = named_pin.pin()
-                    if pin.is_board_pin():
-                        pin.print_header(hdr_file)
-                for adc_num, table_size in self.adc_table_size.items():
-                    hdr_file.write(
-                        "extern const pin_obj_t * const pin_adc{:d}[{:d}];\n".format(
-                            adc_num, table_size
-                        )
-                    )
-            # provide #define's mapping board to cpu name
-            for named_pin in self.board_pins:
-                hdr_file.write(
-                    "#define pyb_pin_{:s} pin_{:s}\n".format(
-                        named_pin.name(), named_pin.pin().cpu_pin_name()
-                    )
-                )
-
-    def print_af_hdr(self, af_const_filename):
-        with open(af_const_filename, "wt") as af_const_file:
-            af_hdr_set = set([])
-            mux_name_width = 0
+    def print_header(self, out_header, obj_decls):
+        if obj_decls:
             for named_pin in self.cpu_pins:
                 pin = named_pin.pin()
                 if pin.is_board_pin():
-                    for af in pin.alt_fn:
-                        if af.is_supported():
-                            mux_name = af.mux_name()
-                            af_hdr_set |= set([mux_name])
-                            if len(mux_name) > mux_name_width:
-                                mux_name_width = len(mux_name)
-            for mux_name in sorted(af_hdr_set):
-                af_words = mux_name.split("_")  # ex mux_name: AF9_I2C2
-                cond_var = conditional_var(af_words[1])
-                print_conditional_if(cond_var, file=af_const_file)
-                key = "MP_ROM_QSTR(MP_QSTR_{}),".format(mux_name)
-                val = "MP_ROM_INT(GPIO_{})".format(mux_name)
-                print("    { %-*s %s }," % (mux_name_width + 26, key, val), file=af_const_file)
-                print_conditional_endif(cond_var, file=af_const_file)
+                    pin.print_header(out_header)
+            for adc_num, table_size in self.adc_table_size.items():
+                print(
+                    "extern const pin_obj_t * const pin_adc{:d}[{:d}];".format(
+                        adc_num, table_size
+                    ),
+                    file=out_header,
+                )
+        # provide #define's mapping board to cpu name
+        for named_pin in self.board_pins:
+            print(
+                "#define pyb_pin_{:s} pin_{:s}".format(
+                    named_pin.name(), named_pin.pin().cpu_pin_name()
+                ),
+                file=out_header,
+            )
 
-    def print_af_defs(self, af_defs_filename, cmp_strings):
-        with open(af_defs_filename, "wt") as af_defs_file:
-            STATIC_AF_TOKENS = {}
-            for named_pin in self.cpu_pins:
-                for af in named_pin.pin().alt_fn:
-                    func = "%s%d" % (af.func, af.fn_num) if af.fn_num else af.func
-                    pin_type = (af.pin_type or "NULL").split("(")[0]
-                    tok = "#define STATIC_AF_%s_%s(pin_obj) ( \\" % (func, pin_type)
-                    if tok not in STATIC_AF_TOKENS:
-                        STATIC_AF_TOKENS[tok] = []
-                    if cmp_strings:
-                        pin_name = named_pin.pin().cpu_pin_name()
-                        cmp_str = (
-                            '    ((strcmp( #pin_obj , "(&pin_%s_obj)") '
-                            ' & strcmp( #pin_obj , "((&pin_%s_obj))")) == 0) ? (%d) : \\'
-                            % (pin_name, pin_name, af.idx)
-                        )
-                    else:
-                        cmp_str = "    ((pin_obj) == (pin_%s)) ? (%d) : \\" % (
-                            named_pin.pin().cpu_pin_name(),
-                            af.idx,
-                        )
-                    STATIC_AF_TOKENS[tok].append(cmp_str)
+    def print_af_hdr(self, out_af_const):
+        af_hdr_set = set([])
+        mux_name_width = 0
+        for named_pin in self.cpu_pins:
+            pin = named_pin.pin()
+            if pin.is_board_pin():
+                for af in pin.alt_fn:
+                    if af.is_supported():
+                        mux_name = af.mux_name()
+                        af_hdr_set |= set([mux_name])
+                        if len(mux_name) > mux_name_width:
+                            mux_name_width = len(mux_name)
+        for mux_name in sorted(af_hdr_set):
+            af_words = mux_name.split("_")  # ex mux_name: AF9_I2C2
+            cond_var = conditional_var(af_words[1])
+            print_conditional_if(cond_var, file=out_af_const)
+            key = "MP_ROM_QSTR(MP_QSTR_{}),".format(mux_name)
+            val = "MP_ROM_INT(GPIO_{})".format(mux_name)
+            print("    { %-*s %s }," % (mux_name_width + 26, key, val), file=out_af_const)
+            print_conditional_endif(cond_var, file=out_af_const)
 
-            for tok, pins in STATIC_AF_TOKENS.items():
-                print(tok, file=af_defs_file)
-                print("\n".join(sorted(pins)), file=af_defs_file)
-                print("    (0xffffffffffffffffULL))\n", file=af_defs_file)
+    def print_af_defs(self, out_af_defs, cmp_strings):
+        STATIC_AF_TOKENS = {}
+        for named_pin in self.cpu_pins:
+            for af in named_pin.pin().alt_fn:
+                func = "%s%d" % (af.func, af.fn_num) if af.fn_num else af.func
+                pin_type = (af.pin_type or "NULL").split("(")[0]
+                tok = "#define STATIC_AF_%s_%s(pin_obj) ( \\" % (func, pin_type)
+                if tok not in STATIC_AF_TOKENS:
+                    STATIC_AF_TOKENS[tok] = []
+                if cmp_strings:
+                    pin_name = named_pin.pin().cpu_pin_name()
+                    cmp_str = (
+                        '    ((strcmp( #pin_obj , "(&pin_%s_obj)") '
+                        ' & strcmp( #pin_obj , "((&pin_%s_obj))")) == 0) ? (%d) : \\'
+                        % (pin_name, pin_name, af.idx)
+                    )
+                else:
+                    cmp_str = "    ((pin_obj) == (pin_%s)) ? (%d) : \\" % (
+                        named_pin.pin().cpu_pin_name(),
+                        af.idx,
+                    )
+                STATIC_AF_TOKENS[tok].append(cmp_str)
+
+        for tok, pins in STATIC_AF_TOKENS.items():
+            print(tok, file=out_af_defs)
+            print("\n".join(sorted(pins)), file=out_af_defs)
+            print("    (0xffffffffffffffffULL))\n", file=out_af_defs)
 
 
 def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file",
-    )
-    parser.add_argument(
-        "-a",
-        "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="stm32f4xx_af.csv",
-    )
-    parser.add_argument(
-        "--af-const",
-        dest="af_const_filename",
-        help="Specifies header file for alternate function constants.",
-        default="build/pins_af_const.h",
-    )
-    parser.add_argument(
-        "--af-defs",
-        dest="af_defs_filename",
-        help="Specifies the filename for the alternate function defines.",
-        default="build/pins_af_defs.h",
-    )
-    parser.add_argument(
-        "--af-defs-cmp-strings",
-        dest="af_defs_cmp_strings",
-        help="Whether to compare pin name strings for the alternate function defines instead of object values",
-        action="store_true",
-    )
-    parser.add_argument(
-        "-b",
-        "--board",
-        dest="board_filename",
-        help="Specifies the board file",
-    )
-    parser.add_argument(
-        "-p",
-        "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="stm32f4xx_prefix.c",
-    )
-    parser.add_argument(
-        "-r",
-        "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h",
-    )
-    parser.add_argument(
-        "--hdr-obj-decls",
-        dest="hdr_obj_decls",
-        help="Whether to include declarations for pin objects in pin header file",
-        action="store_true",
-    )
-    args = parser.parse_args(sys.argv[1:])
+    parser = argparse.ArgumentParser(description="Generate board specific pin file")
+    parser.add_argument("--board-csv")
+    parser.add_argument("--af-csv")
+    parser.add_argument("--prefix")
+    parser.add_argument("--output-source")
+    parser.add_argument("--output-header")
+    parser.add_argument("--output-af-const")
+    parser.add_argument("--output-af-defs")
+    parser.add_argument("--mboot-mode", action="store_true")
+    args = parser.parse_args()
 
     pins = Pins()
 
-    print("// This file was automatically generated by make-pins.py")
-    print("//")
-    if args.af_filename:
-        print("// --af {:s}".format(args.af_filename))
-        pins.parse_af_file(args.af_filename, 1, 2)
+    with open(args.output_source, "w") as out_source:
+        print("// This file was automatically generated by make-pins.py", file=out_source)
+        print("//", file=out_source)
+        if args.af_csv:
+            print("// --af {:s}".format(args.af_csv), file=out_source)
+            pins.parse_af_file(args.af_csv, 1, 2)
 
-    if args.board_filename:
-        print("// --board {:s}".format(args.board_filename))
-        pins.parse_board_file(args.board_filename)
+        if args.board_csv:
+            print("// --board {:s}".format(args.board_csv), file=out_source)
+            pins.parse_board_file(args.board_csv)
 
-    if args.prefix_filename:
-        print("// --prefix {:s}".format(args.prefix_filename))
-        print("")
-        with open(args.prefix_filename, "r") as prefix_file:
-            print(prefix_file.read())
-    pins.print()
-    for i in range(1, 4):
-        pins.print_adc(i)
-    pins.print_header(args.hdr_filename, args.hdr_obj_decls)
-    pins.print_af_hdr(args.af_const_filename)
-    pins.print_af_defs(args.af_defs_filename, args.af_defs_cmp_strings)
+        if args.prefix:
+            print("// --prefix {:s}".format(args.prefix), file=out_source)
+            print("", file=out_source)
+            with open(args.prefix, "r") as prefix_file:
+                print(prefix_file.read(), file=out_source)
+
+        pins.print(out_source)
+        for i in range(1, 4):
+            pins.print_adc(i, out_source)
+
+    with open(args.output_header, "w") as out_header:
+        pins.print_header(out_header, not args.mboot_mode)
+
+    with open(args.output_af_const, "w") as out_af_const:
+        pins.print_af_hdr(out_af_const)
+
+    with open(args.output_af_defs, "w") as out_af_defs:
+        pins.print_af_defs(out_af_defs, not args.mboot_mode)
 
 
 if __name__ == "__main__":
diff --git a/ports/stm32/mboot/Makefile b/ports/stm32/mboot/Makefile
index fab8ce2159..7be5cca69d 100755
--- a/ports/stm32/mboot/Makefile
+++ b/ports/stm32/mboot/Makefile
@@ -243,10 +243,10 @@ $(GEN_ROOT_POINTERS): | $(HEADER_BUILD)
 
 $(GEN_PINS_AF_DEFS): $(BOARD_PINS) $(MAKE_PINS) ../$(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af ../$(AF_FILE) \
-		--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) \
-		--af-const $(GEN_PINS_AF_CONST) --af-defs $(GEN_PINS_AF_DEFS) \
-		> $(GEN_PINS_SRC)
+	$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv ../$(AF_FILE) --prefix $(PREFIX_FILE) \
+		--output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR) \
+		--output-af-const $(GEN_PINS_AF_CONST) --output-af-defs $(GEN_PINS_AF_DEFS) \
+		--mboot-mode
 
 #########################################
 

From b0aec6a0ff71e6dc02495756c881593bc1bc90dc Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Mon, 7 Aug 2023 15:52:39 +1000
Subject: [PATCH 100/310] esp32/machine_pin: Make irq object a sub-field of pin
 object.

This simplifies pin generation.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/esp32/boards/make-pins.py | 13 +++--
 ports/esp32/machine_pin.c       | 87 ++++++++++++++++++---------------
 ports/esp32/machine_pin.h       | 10 ++--
 3 files changed, 58 insertions(+), 52 deletions(-)

diff --git a/ports/esp32/boards/make-pins.py b/ports/esp32/boards/make-pins.py
index 4813724dd6..2054274690 100755
--- a/ports/esp32/boards/make-pins.py
+++ b/ports/esp32/boards/make-pins.py
@@ -78,17 +78,17 @@ class Pins:
                 if row[0]:  # Only add board pins that have a name
                     self.board_pins.append(NamedPin(row[0], pin))
 
-    def print_table(self, label, named_pins, out_source):
+    def print_cpu_table(self, out_source):
         print("", file=out_source)
         print(
-            "const machine_{}_obj_t machine_{}_obj_table[GPIO_NUM_MAX] = {{".format(label, label),
+            "const machine_pin_obj_t machine_pin_obj_table[GPIO_NUM_MAX] = {",
             file=out_source,
         )
-        for pin in named_pins:
+        for pin in self.cpu_pins:
             print("    #if MICROPY_HW_ENABLE_{}".format(pin.name()), file=out_source)
             print(
-                "    [GPIO_NUM_{}] = {{ .base = {{ .type = &machine_{}_type }} }},".format(
-                    pin.pin().pin, label
+                "    [GPIO_NUM_{}] = {{ .base = {{ .type = &machine_pin_type }}, .irq = {{ .base = {{ .type = &machine_pin_irq_type }} }} }},".format(
+                    pin.pin().pin,
                 ),
                 file=out_source,
             )
@@ -121,8 +121,7 @@ class Pins:
         )
 
     def print_tables(self, out_source):
-        self.print_table("pin", self.cpu_pins, out_source)
-        self.print_table("pin_irq", self.cpu_pins, out_source)
+        self.print_cpu_table(out_source)
         self.print_named("board", self.board_pins, out_source)
 
     def print_header(self, out_header):
diff --git a/ports/esp32/machine_pin.c b/ports/esp32/machine_pin.c
index d521e08e51..34c6512c8d 100644
--- a/ports/esp32/machine_pin.c
+++ b/ports/esp32/machine_pin.c
@@ -58,9 +58,10 @@
 #define GPIO_FIRST_NON_OUTPUT (46)
 #endif
 
-// Return the gpio_num_t index for a given pin or pin-irq object.
-#define PIN_OBJ_INDEX(self) ((self) - &machine_pin_obj_table[0])
-#define PIN_IRQ_OBJ_INDEX(self) ((self) - &machine_pin_irq_obj_table[0])
+// Return the gpio_num_t index for a given machine_pin_obj_t pointer.
+#define PIN_OBJ_PTR_INDEX(self) ((self) - &machine_pin_obj_table[0])
+// Return the machine_pin_obj_t pointer corresponding to a machine_pin_irq_obj_t pointer.
+#define PIN_OBJ_PTR_FROM_IRQ_OBJ_PTR(self) ((machine_pin_obj_t *)((uintptr_t)(self) - offsetof(machine_pin_obj_t, irq)))
 
 STATIC const machine_pin_obj_t *machine_pin_find_named(const mp_obj_dict_t *named_pins, mp_obj_t name) {
     const mp_map_t *named_map = &named_pins->map;
@@ -90,7 +91,7 @@ void machine_pins_deinit(void) {
 
 STATIC void machine_pin_isr_handler(void *arg) {
     machine_pin_obj_t *self = arg;
-    mp_obj_t handler = MP_STATE_PORT(machine_pin_irq_handler)[PIN_OBJ_INDEX(self)];
+    mp_obj_t handler = MP_STATE_PORT(machine_pin_irq_handler)[PIN_OBJ_PTR_INDEX(self)];
     mp_sched_schedule(handler, MP_OBJ_FROM_PTR(self));
     mp_hal_wake_main_task_from_isr();
 }
@@ -124,12 +125,12 @@ STATIC const machine_pin_obj_t *machine_pin_find(mp_obj_t pin_in) {
 
 gpio_num_t machine_pin_get_id(mp_obj_t pin_in) {
     const machine_pin_obj_t *self = machine_pin_find(pin_in);
-    return PIN_OBJ_INDEX(self);
+    return PIN_OBJ_PTR_INDEX(self);
 }
 
 STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_pin_obj_t *self = self_in;
-    mp_printf(print, "Pin(%u)", PIN_OBJ_INDEX(self));
+    mp_printf(print, "Pin(%u)", PIN_OBJ_PTR_INDEX(self));
 }
 
 // pin.init(mode=None, pull=-1, *, value, drive, hold)
@@ -147,34 +148,36 @@ STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_
     mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
     mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
+    gpio_num_t index = PIN_OBJ_PTR_INDEX(self);
+
     // reset the pin to digital if this is a mode-setting init (grab it back from ADC)
     if (args[ARG_mode].u_obj != mp_const_none) {
-        if (rtc_gpio_is_valid_gpio(PIN_OBJ_INDEX(self))) {
+        if (rtc_gpio_is_valid_gpio(index)) {
             #if !CONFIG_IDF_TARGET_ESP32C3
-            rtc_gpio_deinit(PIN_OBJ_INDEX(self));
+            rtc_gpio_deinit(index);
             #endif
         }
     }
 
     #if CONFIG_IDF_TARGET_ESP32C3
-    if (PIN_OBJ_INDEX(self) == 18 || PIN_OBJ_INDEX(self) == 19) {
+    if (index == 18 || index == 19) {
         CLEAR_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_USB_PAD_ENABLE);
     }
     #endif
 
     // configure the pin for gpio
-    esp_rom_gpio_pad_select_gpio(PIN_OBJ_INDEX(self));
+    esp_rom_gpio_pad_select_gpio(index);
 
     // set initial value (do this before configuring mode/pull)
     if (args[ARG_value].u_obj != MP_OBJ_NULL) {
-        gpio_set_level(PIN_OBJ_INDEX(self), mp_obj_is_true(args[ARG_value].u_obj));
+        gpio_set_level(index, mp_obj_is_true(args[ARG_value].u_obj));
     }
 
     // set drive capability (do this before configuring mode)
-    if (args[ARG_drive].u_obj != MP_OBJ_NULL && GPIO_IS_VALID_OUTPUT_GPIO(PIN_OBJ_INDEX(self))) {
+    if (args[ARG_drive].u_obj != MP_OBJ_NULL && GPIO_IS_VALID_OUTPUT_GPIO(index)) {
         mp_int_t strength = mp_obj_get_int(args[ARG_drive].u_obj);
         if (0 <= strength && strength < GPIO_DRIVE_CAP_MAX) {
-            gpio_set_drive_capability(PIN_OBJ_INDEX(self), strength);
+            gpio_set_drive_capability(index, strength);
         }
     }
 
@@ -182,11 +185,11 @@ STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_
     if (args[ARG_mode].u_obj != mp_const_none) {
         mp_int_t pin_io_mode = mp_obj_get_int(args[ARG_mode].u_obj);
         #ifdef GPIO_FIRST_NON_OUTPUT
-        if (PIN_OBJ_INDEX(self) >= GPIO_FIRST_NON_OUTPUT && (pin_io_mode & GPIO_MODE_DEF_OUTPUT)) {
+        if (index >= GPIO_FIRST_NON_OUTPUT && (pin_io_mode & GPIO_MODE_DEF_OUTPUT)) {
             mp_raise_ValueError(MP_ERROR_TEXT("pin can only be input"));
         }
         #endif
-        gpio_set_direction(PIN_OBJ_INDEX(self), pin_io_mode);
+        gpio_set_direction(index, pin_io_mode);
     }
 
     // configure pull
@@ -196,24 +199,24 @@ STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_
             mode = mp_obj_get_int(args[ARG_pull].u_obj);
         }
         if (mode & GPIO_PULL_DOWN) {
-            gpio_pulldown_en(PIN_OBJ_INDEX(self));
+            gpio_pulldown_en(index);
         } else {
-            gpio_pulldown_dis(PIN_OBJ_INDEX(self));
+            gpio_pulldown_dis(index);
         }
         if (mode & GPIO_PULL_UP) {
-            gpio_pullup_en(PIN_OBJ_INDEX(self));
+            gpio_pullup_en(index);
         } else {
-            gpio_pullup_dis(PIN_OBJ_INDEX(self));
+            gpio_pullup_dis(index);
         }
     }
 
     // configure pad hold
-    if (args[ARG_hold].u_obj != MP_OBJ_NULL && GPIO_IS_VALID_OUTPUT_GPIO(PIN_OBJ_INDEX(self))) {
+    if (args[ARG_hold].u_obj != MP_OBJ_NULL && GPIO_IS_VALID_OUTPUT_GPIO(index)) {
         // always disable pad hold to apply outstanding config changes
-        gpio_hold_dis(PIN_OBJ_INDEX(self));
+        gpio_hold_dis(index);
         // (re-)enable pad hold if requested
         if (mp_obj_is_true(args[ARG_hold].u_obj)) {
-            gpio_hold_en(PIN_OBJ_INDEX(self));
+            gpio_hold_en(index);
         }
     }
 
@@ -241,12 +244,13 @@ mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw,
 STATIC mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 0, 1, false);
     machine_pin_obj_t *self = self_in;
+    gpio_num_t index = PIN_OBJ_PTR_INDEX(self);
     if (n_args == 0) {
         // get pin
-        return MP_OBJ_NEW_SMALL_INT(gpio_get_level(PIN_OBJ_INDEX(self)));
+        return MP_OBJ_NEW_SMALL_INT(gpio_get_level(index));
     } else {
         // set pin
-        gpio_set_level(PIN_OBJ_INDEX(self), mp_obj_is_true(args[0]));
+        gpio_set_level(index, mp_obj_is_true(args[0]));
         return mp_const_none;
     }
 }
@@ -266,7 +270,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_value_obj, 1, 2, machine_
 // pin.off()
 STATIC mp_obj_t machine_pin_off(mp_obj_t self_in) {
     machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    gpio_set_level(PIN_OBJ_INDEX(self), 0);
+    gpio_set_level(PIN_OBJ_PTR_INDEX(self), 0);
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_off_obj, machine_pin_off);
@@ -274,7 +278,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_off_obj, machine_pin_off);
 // pin.on()
 STATIC mp_obj_t machine_pin_on(mp_obj_t self_in) {
     machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    gpio_set_level(PIN_OBJ_INDEX(self), 1);
+    gpio_set_level(PIN_OBJ_PTR_INDEX(self), 1);
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_on_obj, machine_pin_on);
@@ -293,6 +297,7 @@ STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_
 
     if (n_args > 1 || kw_args->used != 0) {
         // configure irq
+        gpio_num_t index = PIN_OBJ_PTR_INDEX(self);
         mp_obj_t handler = args[ARG_handler].u_obj;
         uint32_t trigger = args[ARG_trigger].u_int;
         mp_obj_t wake_obj = args[ARG_wake].u_obj;
@@ -311,20 +316,20 @@ STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_
                 mp_raise_ValueError(MP_ERROR_TEXT("no resources"));
             }
 
-            if (!RTC_IS_VALID_EXT_PIN(PIN_OBJ_INDEX(self))) {
+            if (!RTC_IS_VALID_EXT_PIN(index)) {
                 mp_raise_ValueError(MP_ERROR_TEXT("invalid pin for wake"));
             }
 
             if (machine_rtc_config.ext0_pin == -1) {
-                machine_rtc_config.ext0_pin = PIN_OBJ_INDEX(self);
-            } else if (machine_rtc_config.ext0_pin != PIN_OBJ_INDEX(self)) {
+                machine_rtc_config.ext0_pin = index;
+            } else if (machine_rtc_config.ext0_pin != index) {
                 mp_raise_ValueError(MP_ERROR_TEXT("no resources"));
             }
 
             machine_rtc_config.ext0_level = trigger == GPIO_INTR_LOW_LEVEL ? 0 : 1;
             machine_rtc_config.ext0_wake_types = wake;
         } else {
-            if (machine_rtc_config.ext0_pin == PIN_OBJ_INDEX(self)) {
+            if (machine_rtc_config.ext0_pin == index) {
                 machine_rtc_config.ext0_pin = -1;
             }
 
@@ -332,15 +337,15 @@ STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_
                 handler = MP_OBJ_NULL;
                 trigger = 0;
             }
-            gpio_isr_handler_remove(PIN_OBJ_INDEX(self));
-            MP_STATE_PORT(machine_pin_irq_handler)[PIN_OBJ_INDEX(self)] = handler;
-            gpio_set_intr_type(PIN_OBJ_INDEX(self), trigger);
-            gpio_isr_handler_add(PIN_OBJ_INDEX(self), machine_pin_isr_handler, (void *)self);
+            gpio_isr_handler_remove(index);
+            MP_STATE_PORT(machine_pin_irq_handler)[index] = handler;
+            gpio_set_intr_type(index, trigger);
+            gpio_isr_handler_add(index, machine_pin_isr_handler, (void *)self);
         }
     }
 
     // return the irq object
-    return MP_OBJ_FROM_PTR(&machine_pin_irq_obj_table[PIN_OBJ_INDEX(self)]);
+    return MP_OBJ_FROM_PTR(&self->irq);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_irq_obj, 1, machine_pin_irq);
 
@@ -381,13 +386,14 @@ STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
 STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
     (void)errcode;
     machine_pin_obj_t *self = self_in;
+    gpio_num_t index = PIN_OBJ_PTR_INDEX(self);
 
     switch (request) {
         case MP_PIN_READ: {
-            return gpio_get_level(PIN_OBJ_INDEX(self));
+            return gpio_get_level(index);
         }
         case MP_PIN_WRITE: {
-            gpio_set_level(PIN_OBJ_INDEX(self), arg);
+            gpio_set_level(index, arg);
             return 0;
         }
     }
@@ -417,16 +423,17 @@ MP_DEFINE_CONST_OBJ_TYPE(
 STATIC mp_obj_t machine_pin_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     machine_pin_irq_obj_t *self = self_in;
     mp_arg_check_num(n_args, n_kw, 0, 0, false);
-    machine_pin_isr_handler((void *)&machine_pin_obj_table[PIN_IRQ_OBJ_INDEX(self)]);
+    machine_pin_isr_handler((void *)PIN_OBJ_PTR_FROM_IRQ_OBJ_PTR(self));
     return mp_const_none;
 }
 
 STATIC mp_obj_t machine_pin_irq_trigger(size_t n_args, const mp_obj_t *args) {
     machine_pin_irq_obj_t *self = args[0];
-    uint32_t orig_trig = GPIO.pin[PIN_IRQ_OBJ_INDEX(self)].int_type;
+    gpio_num_t index = PIN_OBJ_PTR_INDEX(PIN_OBJ_PTR_FROM_IRQ_OBJ_PTR(self));
+    uint32_t orig_trig = GPIO.pin[index].int_type;
     if (n_args == 2) {
         // set trigger
-        gpio_set_intr_type(PIN_IRQ_OBJ_INDEX(self), mp_obj_get_int(args[1]));
+        gpio_set_intr_type(index, mp_obj_get_int(args[1]));
     }
     // return original trigger value
     return MP_OBJ_NEW_SMALL_INT(orig_trig);
diff --git a/ports/esp32/machine_pin.h b/ports/esp32/machine_pin.h
index dbbaac2219..53f9c6bdad 100644
--- a/ports/esp32/machine_pin.h
+++ b/ports/esp32/machine_pin.h
@@ -146,18 +146,18 @@
 
 #endif
 
-typedef struct _machine_pin_obj_t {
-    mp_obj_base_t base;
-} machine_pin_obj_t;
-
 typedef struct _machine_pin_irq_obj_t {
     mp_obj_base_t base;
 } machine_pin_irq_obj_t;
 
+typedef struct _machine_pin_obj_t {
+    mp_obj_base_t base;
+    machine_pin_irq_obj_t irq;
+} machine_pin_obj_t;
+
 extern const mp_obj_type_t machine_pin_irq_type;
 
 extern const machine_pin_obj_t machine_pin_obj_table[GPIO_NUM_MAX];
-extern const machine_pin_irq_obj_t machine_pin_irq_obj_table[GPIO_NUM_MAX];
 
 extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;
 

From 4bd6ec9ae40770c337b470293da078cc09ade0d5 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Mon, 7 Aug 2023 17:08:10 +1000
Subject: [PATCH 101/310] tools/boardgen.py: Add initial implementation of a
 common make-pins.py.

For now, this implements the functionality required for esp32 and rp2,
including support for numeric pins, rp2 alternate functions, and rp2
extended pins.

This also updates the rp2 port to use the same structure for pins.h and
pins.csv as for esp32, and moves the pin definitions directly into the
table (rather than having a table of pointers), which is a small code size
improvement.

Support for "hidden" pins in pins.csv is added (matching the stm32
implementation).

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/esp32/boards/make-pins.py | 209 +++----------
 ports/rp2/CMakeLists.txt        |   1 -
 ports/rp2/boards/make-pins.py   | 404 +++++++------------------
 ports/rp2/machine_pin.c         |  18 +-
 ports/rp2/machine_pin.h         |   4 +-
 tools/boardgen.py               | 506 ++++++++++++++++++++++++++++++++
 6 files changed, 667 insertions(+), 475 deletions(-)
 create mode 100644 tools/boardgen.py

diff --git a/ports/esp32/boards/make-pins.py b/ports/esp32/boards/make-pins.py
index 2054274690..49b10f0ce1 100755
--- a/ports/esp32/boards/make-pins.py
+++ b/ports/esp32/boards/make-pins.py
@@ -1,182 +1,67 @@
 #!/usr/bin/env python
 
-import argparse
+import os
 import sys
-import csv
-import re
 
-MAX_CPU_PINS = 49
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
+import boardgen
 
 
-def parse_pin(name_str):
-    """Parses a string and returns a pin number."""
-    if len(name_str) < 2:
-        raise ValueError("Expecting pin name to be at least 2 characters.")
-    if not name_str.startswith("GPIO"):
-        raise ValueError("Expecting pin name to start with GPIO")
-    return int(re.findall(r"\d+$", name_str)[0])
+# Pins start at zero, and the highest pin index on any ESP32* chip is 48.
+NUM_GPIOS = 49
 
 
-class Pin:
-    def __init__(self, pin):
-        self.pin = pin
-        self.is_board = False
+class Esp32Pin(boardgen.Pin):
+    # Required by NumericPinGenerator.
+    def index(self):
+        return int(self._cpu_pin_name[4:])
 
-    def cpu_pin_name(self):
-        return "GPIO{:d}".format(self.pin)
+    # The IDF provides `GPIO_NUM_x = x` as an enum.
+    def index_name(self):
+        return "GPIO_NUM_{:d}".format(self.index())
 
-    def is_board_pin(self):
-        return self.is_board
+    # Emit the combined struct which contains both the pin and irq instances.
+    def definition(self):
+        return "{ .base = { .type = &machine_pin_type }, .irq = { .base = { .type = &machine_pin_irq_type } } }"
 
-    def set_is_board_pin(self):
-        self.is_board = True
+    # This script isn't family-aware, so we always emit the maximum number of
+    # pins and rely on the `MICROPY_HW_ENABLE_GPIOn` macros defined in
+    # machine_pin.h to figure out which ones are actually available.
+    def enable_macro(self):
+        return "MICROPY_HW_ENABLE_{}".format(self._cpu_pin_name)
+
+    # ESP32 cpu names must be "GPIOn".
+    @staticmethod
+    def validate_cpu_pin_name(cpu_pin_name):
+        boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
+
+        if not cpu_pin_name.startswith("GPIO") or not cpu_pin_name[4:].isnumeric():
+            raise boardgen.PinGeneratorError(
+                "Invalid cpu pin name '{}', must be 'GPIOn'".format(cpu_pin_name)
+            )
+
+        if not (0 <= int(cpu_pin_name[4:]) < NUM_GPIOS):
+            raise boardgen.PinGeneratorError("Unknown cpu pin '{}'".format(cpu_pin_name))
 
 
-class NamedPin:
-    def __init__(self, name, pin):
-        self._name = name
-        self._pin = pin
-
-    def pin(self):
-        return self._pin
-
-    def name(self):
-        return self._name
-
-
-class Pins:
+class Esp32PinGenerator(boardgen.NumericPinGenerator):
     def __init__(self):
-        self.cpu_pins = []  # list of NamedPin objects
-        self.board_pins = []  # list of NamedPin objects
+        # Use custom pin type above.
+        super().__init__(pin_type=Esp32Pin)
 
-    def find_pin(self, pin_name):
-        for pin in self.cpu_pins:
-            if pin.name() == pin_name:
-                return pin.pin()
+        # Pre-define the pins (i.e. don't require them to be listed in pins.csv).
+        for i in range(NUM_GPIOS):
+            self.add_cpu_pin("GPIO{}".format(i))
 
-    def create_pins(self):
-        for pin_num in range(MAX_CPU_PINS):
-            pin = Pin(pin_num)
-            self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin))
+    # Only use pre-defined cpu pins (do not let board.csv create them).
+    def find_pin_by_cpu_pin_name(self, cpu_pin_name, create=True):
+        return super().find_pin_by_cpu_pin_name(cpu_pin_name, create=False)
 
-    def parse_board_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                if len(row) == 0 or row[0].startswith("#"):
-                    # Skip empty lines, and lines starting with "#"
-                    continue
-                if len(row) != 2:
-                    raise ValueError("Expecting two entries in a row")
-
-                cpu_pin_name = row[1]
-                parse_pin(cpu_pin_name)
-                pin = self.find_pin(cpu_pin_name)
-                if not pin:
-                    raise ValueError("Unknown pin {}".format(cpu_pin_name))
-                pin.set_is_board_pin()
-                if row[0]:  # Only add board pins that have a name
-                    self.board_pins.append(NamedPin(row[0], pin))
-
-    def print_cpu_table(self, out_source):
-        print("", file=out_source)
-        print(
-            "const machine_pin_obj_t machine_pin_obj_table[GPIO_NUM_MAX] = {",
-            file=out_source,
-        )
-        for pin in self.cpu_pins:
-            print("    #if MICROPY_HW_ENABLE_{}".format(pin.name()), file=out_source)
-            print(
-                "    [GPIO_NUM_{}] = {{ .base = {{ .type = &machine_pin_type }}, .irq = {{ .base = {{ .type = &machine_pin_irq_type }} }} }},".format(
-                    pin.pin().pin,
-                ),
-                file=out_source,
-            )
-            print("    #endif", file=out_source)
-        print("};", file=out_source)
-
-    def print_named(self, label, named_pins, out_source):
-        print("", file=out_source)
-        print(
-            "STATIC const mp_rom_map_elem_t machine_pin_{:s}_pins_locals_dict_table[] = {{".format(
-                label
-            ),
-            file=out_source,
-        )
-        for named_pin in named_pins:
-            pin = named_pin.pin()
-            print(
-                "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},".format(
-                    named_pin.name(), pin.cpu_pin_name()
-                ),
-                file=out_source,
-            )
-
-        print("};", file=out_source)
-        print(
-            "MP_DEFINE_CONST_DICT(machine_pin_{:s}_pins_locals_dict, machine_pin_{:s}_pins_locals_dict_table);".format(
-                label, label
-            ),
-            file=out_source,
-        )
-
-    def print_tables(self, out_source):
-        self.print_cpu_table(out_source)
-        self.print_named("board", self.board_pins, out_source)
-
-    def print_header(self, out_header):
-        # Provide #defines for each cpu pin.
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            n = pin.cpu_pin_name()
-            print("#if MICROPY_HW_ENABLE_{}".format(n), file=out_header)
-            print(
-                "#define pin_{:s} (machine_pin_obj_table[{}])".format(n, pin.pin),
-                file=out_header,
-            )
-            print("#endif", file=out_header)
-
-        # Provide #define's mapping board to cpu name.
-        for named_pin in self.board_pins:
-            if named_pin.pin().is_board_pin():
-                print(
-                    "#define pin_{:s} pin_{:s}".format(
-                        named_pin.name(), named_pin.pin().cpu_pin_name()
-                    ),
-                    file=out_header,
-                )
-
-
-def main():
-    parser = argparse.ArgumentParser(description="Generate board specific pin file")
-    parser.add_argument("--board-csv")
-    parser.add_argument("--prefix")
-    parser.add_argument("--output-source")
-    parser.add_argument("--output-header")
-    args = parser.parse_args()
-
-    pins = Pins()
-    pins.create_pins()
-
-    with open(args.output_source, "w") as out_source:
-        print("// This file was automatically generated by make-pins.py", file=out_source)
-        print("//", file=out_source)
-
-        if args.board_csv:
-            print("// --board-csv {:s}".format(args.board_csv), file=out_source)
-            pins.parse_board_file(args.board_csv)
-
-        if args.prefix:
-            print("// --prefix {:s}".format(args.prefix), file=out_source)
-            print("", file=out_source)
-            with open(args.prefix, "r") as prefix_file:
-                print(prefix_file.read(), end="", file=out_source)
-
-        pins.print_tables(out_source)
-
-    with open(args.output_header, "w") as out_header:
-        pins.print_header(out_header)
+    # This is provided by the IDF and is one more than the highest available
+    # GPIO num.
+    def cpu_table_size(self):
+        return "GPIO_NUM_MAX"
 
 
 if __name__ == "__main__":
-    main()
+    Esp32PinGenerator().main()
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 7b715c31fa..4f76c5864f 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -479,7 +479,6 @@ set(GEN_PINS_PREFIX "${MICROPY_BOARDS_DIR}/rp2_prefix.c")
 set(GEN_PINS_MKPINS "${MICROPY_BOARDS_DIR}/make-pins.py")
 set(GEN_PINS_SRC "${CMAKE_BINARY_DIR}/pins_${MICROPY_BOARD}.c")
 set(GEN_PINS_HDR "${MICROPY_GENHDR_DIR}/pins.h")
-set(GEN_PINS_AF_CONST "${MICROPY_GENHDR_DIR}/pins_af_const.h")
 
 if(EXISTS "${MICROPY_BOARDS_DIR}/${MICROPY_BOARD}/pins.csv")
     set(GEN_PINS_BOARD_CSV "${MICROPY_BOARDS_DIR}/${MICROPY_BOARD}/pins.csv")
diff --git a/ports/rp2/boards/make-pins.py b/ports/rp2/boards/make-pins.py
index 4cf73d9900..cbc3424705 100755
--- a/ports/rp2/boards/make-pins.py
+++ b/ports/rp2/boards/make-pins.py
@@ -1,331 +1,133 @@
 #!/usr/bin/env python
 """Creates the pin file for the RP2."""
 
-from __future__ import print_function
-
-import argparse
-import sys
-import csv
+import os
 import re
+import sys
 
-SUPPORTED_FN = {
-    "SPI": ["TX", "RX", "SCK", "CS"],
-    "UART": ["TX", "RX", "CTS", "RTS"],
-    "I2C": ["SCL", "SDA"],
-    "PWM": ["A", "B"],
-    "SIO": [""],
-    "PIO0": [""],
-    "PIO1": [""],
-    "GPCK": ["GPIN0", "GPOUT0", "GPIN1", "GPOUT1", "GPOUT2", "GPOUT3"],
-    "USB": ["OVCUR_DET", "VBUS_DET", "VBUS_EN"],
-}
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
+import boardgen
+
+# This is NUM_BANK0_GPIOS. Pin indices are 0 to 29 (inclusive).
+NUM_GPIOS = 30
+# Up to 10 additional extended pins (e.g. via the wifi chip).
+NUM_EXT_GPIOS = 10
 
 
-def parse_pin(name_str):
-    """Parses a string and returns a pin number."""
-    if len(name_str) < 2:
-        raise ValueError("Expecting pin name to be at least 2 characters.")
-    if not name_str.startswith("GPIO") and not name_str.startswith("EXT_GPIO"):
-        raise ValueError("Expecting pin name to start with EXT_/GPIO")
-    return int(re.findall(r"\d+$", name_str)[0])
+class Rp2Pin(boardgen.Pin):
+    def __init__(self, cpu_pin_name):
+        super().__init__(cpu_pin_name)
+        self._afs = []
 
-
-def split_name_num(name_num):
-    num = None
-    for num_idx in range(len(name_num) - 1, -1, -1):
-        if not name_num[num_idx].isdigit():
-            name = name_num[0 : num_idx + 1]
-            num_str = name_num[num_idx + 1 :]
-            if len(num_str) > 0:
-                num = int(num_str)
-            break
-    if name == "PIO":
-        name += str(num)
-    return name, num
-
-
-class AlternateFunction(object):
-    """Holds the information associated with a pins alternate function."""
-
-    def __init__(self, idx, af_str):
-        self.idx = idx
-        self.af_str = af_str
-
-        self.func = ""
-        self.fn_num = None
-        self.pin_type = ""
-        self.supported = False
-
-        af_words = af_str.split("_", 1)
-        self.func, self.fn_num = split_name_num(af_words[0])
-        if len(af_words) > 1:
-            self.pin_type = af_words[1]
-        if self.func in SUPPORTED_FN:
-            pin_types = SUPPORTED_FN[self.func]
-            if self.pin_type in pin_types:
-                self.supported = True
-
-    def is_supported(self):
-        return self.supported
-
-    def print(self, out_source):
-        """Prints the C representation of this AF."""
-        if self.supported:
-            print("  AF", end="", file=out_source)
+        if self.name().startswith("EXT_"):
+            self._index = None
+            self._ext_index = int(self.name()[8:])  # "EXT_GPIOn"
         else:
-            print("  //", end="", file=out_source)
-        fn_num = self.fn_num
-        if fn_num is None:
-            fn_num = 0
-        print(
-            "({:d}, {:4s}, {:d}), // {:s}".format(self.idx, self.func, fn_num, self.af_str),
-            file=out_source,
-        )
+            self._index = int(self.name()[4:])  # "GPIOn"
+            self._ext_index = None
 
+    # Required by NumericPinGenerator.
+    def index(self):
+        return self._index
 
-class Pin(object):
-    """Holds the information associated with a pin."""
+    # Use the PIN() macro defined in rp2_prefix.c for defining the pin
+    # objects.
+    def definition(self):
+        if self._index is not None:
+            return "PIN({:d}, GPIO{:d}, 0, {:d}, pin_GPIO{:d}_af)".format(
+                self._index, self._index, len(self._afs), self.index()
+            )
+        else:
+            return "PIN({:d}, EXT_GPIO{:d}, 1, 0, NULL)".format(self._ext_index, self._ext_index)
 
-    def __init__(self, pin, is_ext=False):
-        self.pin = pin
-        self.alt_fn = []
-        self.alt_fn_count = 0
-        self.is_board = False
-        self.is_ext = is_ext
+    # External pins need to be mutable (because they track the output state).
+    def is_const(self):
+        return self._index is not None
 
-    def cpu_pin_name(self):
-        return "{:s}GPIO{:d}".format("EXT_" if self.is_ext else "", self.pin)
+    # Add conditional macros only around the external pins based on how many
+    # are enabled.
+    def enable_macro(self):
+        if self._ext_index is not None:
+            return "(MICROPY_HW_PIN_EXT_COUNT > {:d})".format(self._ext_index)
 
-    def is_board_pin(self):
-        return self.is_board
+    def add_af(self, af_idx, _af_name, af):
+        if self._index is None:
+            raise boardgen.PinGeneratorError(
+                "Cannot add AF for ext pin '{:s}'".format(self.name())
+            )
 
-    def set_is_board_pin(self):
-        self.is_board = True
+        # <af><unit>_<pin>
+        m = re.match("([A-Z][A-Z0-9][A-Z]+)(([0-9]+)(_.*)?)?", af)
+        af_fn = m.group(1)
+        af_unit = int(m.group(3)) if m.group(3) is not None else 0
+        if af_fn == "PIO":
+            # Pins can be either PIO unit (unlike, say, I2C where a
+            # pin can only be I2C0 _or_ I2C1, both sharing the same AF
+            # index), so each PIO unit has a distinct AF index.
+            af_fn = "{:s}{:d}".format(af_fn, af_unit)
+        self._afs.append((af_idx + 1, af_fn, af_unit, af))
 
-    def parse_af(self, af_idx, af_strs_in):
-        if len(af_strs_in) == 0:
-            return
-        # If there is a slash, then the slash separates 2 aliases for the
-        # same alternate function.
-        af_strs = af_strs_in.split("/")
-        for af_str in af_strs:
-            alt_fn = AlternateFunction(af_idx, af_str)
-            self.alt_fn.append(alt_fn)
-            if alt_fn.is_supported():
-                self.alt_fn_count += 1
-
-    def alt_fn_name(self, null_if_0=False):
-        if null_if_0 and self.alt_fn_count == 0:
-            return "NULL"
-        return "pin_{:s}_af".format(self.cpu_pin_name())
-
-    def print(self, out_source):
-        if self.is_ext:
-            print("#if (MICROPY_HW_PIN_EXT_COUNT > {:d})".format(self.pin), file=out_source)
-
-        if self.alt_fn_count == 0:
-            print("// ", end="", file=out_source)
-        print("const machine_pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()), file=out_source)
-        for alt_fn in self.alt_fn:
-            alt_fn.print(out_source)
-        if self.alt_fn_count == 0:
-            print("// ", end="", file=out_source)
-        print("};", file=out_source)
-        print("", file=out_source)
-        print(
-            "{:s}machine_pin_obj_t pin_{:s} = PIN({:d}, {:s}, {:d}, {:d}, {:s});".format(
-                "" if self.is_ext else "const ",
-                self.cpu_pin_name(),
-                self.pin,
-                self.cpu_pin_name(),
-                self.is_ext,
-                self.alt_fn_count,
-                self.alt_fn_name(null_if_0=True),
-            ),
-            file=out_source,
-        )
-        if self.is_ext:
-            print("#endif", file=out_source)
-        print("", file=out_source)
-
-    def print_header(self, out_header):
-        n = self.cpu_pin_name()
-        print(
-            "extern{:s}machine_pin_obj_t pin_{:s};".format(" " if self.is_ext else " const ", n),
-            file=out_header,
-        )
-        if self.alt_fn_count > 0:
-            print("extern const machine_pin_af_obj_t pin_{:s}_af[];".format(n), file=out_header)
-
-
-class NamedPin(object):
-    def __init__(self, name, pin):
-        self._name = name
-        self._pin = pin
-
-    def pin(self):
-        return self._pin
-
-    def name(self):
-        return self._name
-
-
-class Pins(object):
-    def __init__(self):
-        self.cpu_pins = []  # list of NamedPin objects
-        self.board_pins = []  # list of NamedPin objects
-        self.ext_pins = []  # list of NamedPin objects
-        for i in range(0, 10):
-            self.ext_pins.append(NamedPin("EXT_GPIO{:d}".format(i), Pin(i, True)))
-
-    def find_pin(self, pin_name):
-        for pin in self.cpu_pins:
-            if pin.name() == pin_name:
-                return pin.pin()
-
-        for pin in self.ext_pins:
-            if pin.name() == pin_name:
-                return pin.pin()
-
-    def parse_af_file(self, filename, pinname_col, af_col):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                try:
-                    pin_num = parse_pin(row[pinname_col])
-                except Exception:
-                    # import traceback; traceback.print_exc()
-                    continue
-                pin = Pin(pin_num)
-                for af_idx in range(af_col, len(row)):
-                    if af_idx >= af_col:
-                        pin.parse_af(af_idx, row[af_idx])
-                self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin))
-
-    def parse_board_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                if len(row) == 0 or row[0].startswith("#"):
-                    # Skip empty lines, and lines starting with "#"
-                    continue
-                if len(row) != 2:
-                    raise ValueError("Expecting two entries in a row")
-
-                cpu_pin_name = row[1]
-                try:
-                    parse_pin(cpu_pin_name)
-                except:
-                    # import traceback; traceback.print_exc()
-                    continue
-                pin = self.find_pin(cpu_pin_name)
-                if pin:
-                    pin.set_is_board_pin()
-                    if row[0]:  # Only add board pins that have a name
-                        self.board_pins.append(NamedPin(row[0], pin))
-
-    def print_table(self, label, named_pins, out_source):
-        print("", file=out_source)
-        print(
-            "const machine_pin_obj_t *machine_pin_{:s}_pins[] = {{".format(label), file=out_source
-        )
-        for pin in named_pins:
-            if not pin.pin().is_ext:
-                print("    &pin_{},".format(pin.name()), file=out_source)
-        print("};", file=out_source)
-        print("", file=out_source)
-
-    def print_named(self, label, named_pins, out_source):
-        print("", file=out_source)
-        print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
-            file=out_source,
-        )
-        for named_pin in named_pins:
-            pin = named_pin.pin()
-            if pin.is_ext:
-                print("  #if (MICROPY_HW_PIN_EXT_COUNT > {:d})".format(pin.pin), file=out_source)
+    # This will be called at the start of the output (after the prefix). Use
+    # it to emit the af objects (via the AF() macro in rp2_prefix.c).
+    def print_source(self, out_source):
+        if self._index is not None:
             print(
-                "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},".format(
-                    named_pin.name(), pin.cpu_pin_name()
-                ),
+                "const machine_pin_af_obj_t pin_GPIO{:d}_af[] = {{".format(self.index()),
                 file=out_source,
             )
-            if pin.is_ext:
-                print("  #endif", file=out_source)
-
-        print("};", file=out_source)
-        print(
-            "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
-                label, label
-            ),
-            file=out_source,
-        )
-        print("", file=out_source)
-
-    def print(self, out_source):
-        for pin in self.cpu_pins:
-            pin.pin().print(out_source)
-
-        for pin in self.ext_pins:
-            if pin.pin().is_ext:
-                pin.pin().print(out_source)
-
-        self.print_table("cpu", self.cpu_pins, out_source)
-        self.print_named("cpu", self.cpu_pins + self.ext_pins, out_source)
-        self.print_named("board", self.board_pins, out_source)
-
-    def print_header(self, out_header):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            pin.print_header(out_header)
-        for named_pin in self.board_pins:
-            pin = named_pin.pin()
-            if pin.is_ext:
-                pin.print_header(out_header)
-        # provide #define's mapping board to cpu name
-        for named_pin in self.board_pins:
-            if named_pin.pin().is_board_pin():
+            for af_idx, af_fn, af_unit, af in self._afs:
                 print(
-                    "#define pin_{:s} pin_{:s}".format(
-                        named_pin.name(), named_pin.pin().cpu_pin_name()
-                    ),
-                    file=out_header,
+                    "    AF({:d}, {:4s}, {:d}), // {:s}".format(af_idx, af_fn, af_unit, af),
+                    file=out_source,
                 )
+            print("};", file=out_source)
+            print(file=out_source)
+
+    # rp2 cpu names must be "GPIOn" or "EXT_GPIOn".
+    @staticmethod
+    def validate_cpu_pin_name(cpu_pin_name):
+        boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
+
+        if cpu_pin_name.startswith("GPIO") and cpu_pin_name[4:].isnumeric():
+            if not (0 <= int(cpu_pin_name[4:]) < NUM_GPIOS):
+                raise boardgen.PinGeneratorError("Unknown cpu pin '{}'".format(cpu_pin_name))
+        elif cpu_pin_name.startswith("EXT_GPIO") and cpu_pin_name[8:].isnumeric():
+            if not (0 <= int(cpu_pin_name[8:]) < NUM_EXT_GPIOS):
+                raise boardgen.PinGeneratorError("Unknown ext pin '{}'".format(cpu_pin_name))
+        else:
+            raise boardgen.PinGeneratorError(
+                "Invalid cpu pin name '{}', must be 'GPIOn' or 'EXT_GPIOn'".format(cpu_pin_name)
+            )
 
 
-def main():
-    parser = argparse.ArgumentParser(description="Generate board specific pin file")
-    parser.add_argument("--board-csv")
-    parser.add_argument("--af-csv")
-    parser.add_argument("--prefix")
-    parser.add_argument("--output-source")
-    parser.add_argument("--output-header")
-    args = parser.parse_args()
+class Rp2PinGenerator(boardgen.NumericPinGenerator):
+    def __init__(self):
+        # Use custom pin type above, and also enable the --af-csv argument.
+        super().__init__(
+            pin_type=Rp2Pin,
+            enable_af=True,
+        )
 
-    pins = Pins()
+        # Pre-define the pins (i.e. don't require them to be listed in pins.csv).
+        for i in range(NUM_GPIOS):
+            self.add_cpu_pin("GPIO{}".format(i))
+        for i in range(NUM_EXT_GPIOS):
+            self.add_cpu_pin("EXT_GPIO{}".format(i))
 
-    with open(args.output_source, "w") as out_source:
-        print("// This file was automatically generated by make-pins.py", file=out_source)
-        print("//", file=out_source)
-        if args.af_csv:
-            print("// --af {:s}".format(args.af_csv), file=out_source)
-            pins.parse_af_file(args.af_csv, 0, 1)
+    # Provided by pico-sdk.
+    def cpu_table_size(self):
+        return "NUM_BANK0_GPIOS"
 
-        if args.board_csv:
-            print("// --board {:s}".format(args.board_csv), file=out_source)
-            pins.parse_board_file(args.board_csv)
+    # Only use pre-defined cpu pins (do not let board.csv create them).
+    def find_pin_by_cpu_pin_name(self, cpu_pin_name, create=True):
+        return super().find_pin_by_cpu_pin_name(cpu_pin_name, create=False)
 
-        if args.prefix:
-            print("// --prefix {:s}".format(args.prefix), file=out_source)
-            print("", file=out_source)
-            with open(args.prefix, "r") as prefix_file:
-                print(prefix_file.read(), file=out_source)
-        pins.print(out_source)
-
-    with open(args.output_header, "w") as out_header:
-        pins.print_header(out_header)
+    # NumericPinGenerator doesn't include the cpu dict by default (only the
+    # board dict), so add that to the output for rp2.
+    def print_source(self, out_source):
+        super().print_source(out_source)
+        self.print_cpu_locals_dict(out_source)
 
 
 if __name__ == "__main__":
-    main()
+    Rp2PinGenerator().main()
diff --git a/ports/rp2/machine_pin.c b/ports/rp2/machine_pin.c
index 77d9e13480..b277a939e5 100644
--- a/ports/rp2/machine_pin.c
+++ b/ports/rp2/machine_pin.c
@@ -69,14 +69,14 @@ MP_DEFINE_CONST_OBJ_TYPE(
     pin_cpu_pins_obj_type,
     MP_QSTR_cpu,
     MP_TYPE_FLAG_NONE,
-    locals_dict, &pin_cpu_pins_locals_dict
+    locals_dict, &machine_pin_cpu_pins_locals_dict
     );
 
 MP_DEFINE_CONST_OBJ_TYPE(
     pin_board_pins_obj_type,
     MP_QSTR_board,
     MP_TYPE_FLAG_NONE,
-    locals_dict, &pin_board_pins_locals_dict
+    locals_dict, &machine_pin_board_pins_locals_dict
     );
 
 typedef struct _machine_pin_irq_obj_t {
@@ -86,7 +86,7 @@ typedef struct _machine_pin_irq_obj_t {
 } machine_pin_irq_obj_t;
 
 STATIC const mp_irq_methods_t machine_pin_irq_methods;
-extern const machine_pin_obj_t *machine_pin_cpu_pins[NUM_BANK0_GPIOS];
+extern const machine_pin_obj_t machine_pin_obj_table[NUM_BANK0_GPIOS];
 
 // Mask with "1" indicating that the corresponding pin is in simulated open-drain mode.
 uint32_t machine_pin_open_drain_mask;
@@ -170,18 +170,18 @@ const machine_pin_af_obj_t *machine_pin_find_alt_by_index(const machine_pin_obj_
 const machine_pin_obj_t *machine_pin_find(mp_obj_t pin) {
     // Is already a object of the proper type
     if (mp_obj_is_type(pin, &machine_pin_type)) {
-        return pin;
+        return MP_OBJ_TO_PTR(pin);
     }
     if (mp_obj_is_str(pin)) {
         const char *name = mp_obj_str_get_str(pin);
         // Try to find the pin in the board pins first.
-        const machine_pin_obj_t *self = machine_pin_find_named(&pin_board_pins_locals_dict, pin);
+        const machine_pin_obj_t *self = machine_pin_find_named(&machine_pin_board_pins_locals_dict, pin);
         if (self != NULL) {
             return self;
         }
         // If not found, try to find the pin in the cpu pins which include
         // CPU and and externally controlled pins (if any).
-        self = machine_pin_find_named(&pin_cpu_pins_locals_dict, pin);
+        self = machine_pin_find_named(&machine_pin_cpu_pins_locals_dict, pin);
         if (self != NULL) {
             return self;
         }
@@ -189,8 +189,8 @@ const machine_pin_obj_t *machine_pin_find(mp_obj_t pin) {
     } else if (mp_obj_is_int(pin)) {
         // get the wanted pin object
         int wanted_pin = mp_obj_get_int(pin);
-        if (0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(machine_pin_cpu_pins)) {
-            return machine_pin_cpu_pins[wanted_pin];
+        if (0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(machine_pin_obj_table)) {
+            return &machine_pin_obj_table[wanted_pin];
         }
     }
     mp_raise_ValueError("invalid pin");
@@ -432,7 +432,7 @@ STATIC machine_pin_irq_obj_t *machine_pin_get_irq(mp_hal_pin_obj_t pin) {
         irq = m_new_obj(machine_pin_irq_obj_t);
         irq->base.base.type = &mp_irq_type;
         irq->base.methods = (mp_irq_methods_t *)&machine_pin_irq_methods;
-        irq->base.parent = MP_OBJ_FROM_PTR(machine_pin_cpu_pins[pin]);
+        irq->base.parent = MP_OBJ_FROM_PTR(&machine_pin_obj_table[pin]);
         irq->base.handler = mp_const_none;
         irq->base.ishard = false;
         MP_STATE_PORT(machine_pin_irq_obj[pin]) = irq;
diff --git a/ports/rp2/machine_pin.h b/ports/rp2/machine_pin.h
index d2a39f8e37..b3349188e8 100644
--- a/ports/rp2/machine_pin.h
+++ b/ports/rp2/machine_pin.h
@@ -65,10 +65,10 @@ extern const mp_obj_type_t machine_pin_af_type;
 #include "genhdr/pins.h"
 
 extern const mp_obj_type_t pin_cpu_pins_obj_type;
-extern const mp_obj_dict_t pin_cpu_pins_locals_dict;
+extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;
 
 extern const mp_obj_type_t pin_board_pins_obj_type;
-extern const mp_obj_dict_t pin_board_pins_locals_dict;
+extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;
 
 void machine_pin_ext_init(void);
 bool machine_pin_ext_is_adc_channel(const machine_pin_obj_t *self);
diff --git a/tools/boardgen.py b/tools/boardgen.py
new file mode 100644
index 0000000000..bef8e74727
--- /dev/null
+++ b/tools/boardgen.py
@@ -0,0 +1,506 @@
+# This file is part of the MicroPython project, http://micropython.org/
+#
+# The MIT License (MIT)
+#
+# Copyright (c) 2023 Jim Mussared
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+# THE SOFTWARE.
+
+# This script contains common functionality to assist a port in implementing
+# make-pins.py, which is used to emit compile-time definitions of pin, AF, and
+# ADC objects based on inputs from the vendor HAL/SDK and the board
+# definition's pins.csv.
+
+# The pins.csv file can contain empty lines, comments (a line beginning with "#")
+# or pin definition lines.  Pin definition lines must be of the form:
+#
+#     board,cpu
+#
+# Where "board" is the user-facing name of the pin as specified by the particular
+# board layout and markings, and "cpu" is the corresponding name of the CPU/MCU
+# pin.
+#
+# The "board" entry may be absent if the CPU pin has no additional name, and both
+# entries may start with "-" to hide them from the corresponding Python dict of
+# pins, and hence hide them from the user (but they are still accessible in C).
+#
+# For example, take the following pins.csv file:
+#
+#     X1,PA0
+#     -X2,PA1
+#     X3,-PA2
+#     -X4,-PA3
+#     ,PA4
+#     ,-PA5
+#
+# The first row here configures:
+# - The CPU pin PA0 is labelled X1.
+# - The Python user can access both by the names Pin("X1") and Pin("A0").
+# - The Python user can access both by the members Pin.board.X1 and Pin.cpu.A0.
+# - In C code they are available as pyb_pin_X1 and pin_A0.
+#
+# Prefixing the names with "-" hides them from the user.  The following table
+# summarises the various possibilities:
+#
+#     pins.csv entry | board name | cpu name | C board name | C cpu name
+#     ---------------+------------+----------+--------------+-----------
+#     X1,PA0           "X1"         "A0"       pyb_pin_X1     pin_A0
+#     -X2,PA1          -            "A1"       pyb_pin_X2     pin_A1
+#     X3,-PA2          "X3"         -          pyb_pin_X3     pin_A2
+#     -X4,-PA3         -            -          pyb_pin_X4     pin_A3
+#     ,PA4             -            "A4"       -              pin_A4
+#     ,-PA5            -            -          -              pin_A5
+
+import argparse
+import csv
+import os
+import sys
+
+
+class PinGeneratorError(Exception):
+    pass
+
+
+# A port should define a subclass of Pin that knows how to validate cpu/board
+# names and emits the required structures.
+class Pin:
+    def __init__(self, cpu_pin_name):
+        self._cpu_pin_name = cpu_pin_name
+        # Optional aliases for the board from pins.csv. Each entry is a tuple
+        # of (name, hidden). Hidden board pins are in pins.csv with with a "-"
+        # prefix and will available to C but not Python.
+        self._board_pin_names = set()
+        # An unavailable pin is one that is not explicitly mentioned at all in
+        # pins.csv (or added explicitly with PinGenerator.add_cpu_pin).
+        self._available = False
+        # A hidden pin is one that is in pins.csv with a "-" prefix and will
+        # be still available to C but not Python.
+        self._hidden = False
+        # Reference to the PinGenerator instance.
+        self._generator = None
+
+    # The name of the pin to use in MP_QSTR_{} or pin_{}. Defaults to the cpu name.
+    def name(self):
+        return self._cpu_pin_name
+
+    # Add a board alias (e.g. from pins.csv).
+    def add_board_pin_name(self, board_pin_name, hidden=False):
+        self._board_pin_names.add(
+            (
+                board_pin_name,
+                hidden,
+            )
+        )
+
+    # Override this to handle an af specified in af.csv.
+    def add_af(self, af_idx, af_name, af):
+        raise NotImplementedError
+
+    # Override this to verify that naming matches the MCU standard (e.g. "GPIOn" or "PXn").
+    @staticmethod
+    def validate_cpu_pin_name(cpu_pin_name):
+        if not cpu_pin_name.strip():
+            raise PinGeneratorError("Missing cpu pin name")
+
+    # Override this to provide additional validation of board names.
+    @staticmethod
+    def validate_board_pin_name(board_pin_name):
+        # TODO: ensure this is a valid Python/C identifier and can be used as MP_QSTR_foo.
+        pass
+
+    # Must be implemented when using NumericPinGenerator.
+    # Returns the integer index, or None to exclude this pin from the table.
+    def index(self):
+        raise NotImplementedError
+
+    # Can be overridden when using NumericPinGenerator.
+    # Returns a string which is a C expression that evaluates to the index
+    # e.g. `GPIO_NUM_7`.
+    # This is used whenever the index is emitted in source code and defaults
+    # to just returning the pin index as a literal.
+    # Return None to exclude this pin from the table.
+    def index_name(self):
+        i = self.index()
+        return str(i) if i is not None else None
+
+    # Returns an expression that defines the pin. e.g. `{ .base { ... }, .x }`.
+    # This is used as the RHS of the `const machine_pin_obj_t
+    # pin_EXT_GPIO0_obj =` statements for named pins, and elements of
+    # `machine_pin_obj_table` for numeric pins.
+    # This will typically might be implemented as an invocation of a macro
+    # defined in the port-specific prefix.
+    def definition(self):
+        raise NotImplementedError
+
+    # Whether the pin object should be declared as "const". This should be True
+    # for most pins, but some special cases (e.g. external pins on rp2) might
+    # need mutable pin objects (e.g. to track current pin state).
+    def is_const(self):
+        return True
+
+    # Optionally return a preprocessor expression that can be used to suppress
+    # this pin (e.g. `MICROPY_HW_ENABLE_GPIOn`).
+    def enable_macro(self):
+        return None
+
+    # Override this to output any additional per-pin definitions or other
+    # content that should appear at the start of the source output.
+    # This could be used to define additional objects such as IRQs or AFs.
+    def print_source(self, out_source):
+        pass
+
+
+# A port should define a subclass of PinGenerator (or NumericPinGenerator).
+class PinGenerator:
+    def __init__(self, pin_type, enable_af=False):
+        self._pins = []
+        self._pin_type = pin_type
+        self._enable_af = enable_af
+
+    # Allows a port to define a known cpu pin (without relying on it being in the
+    # csv file).
+    def add_cpu_pin(self, cpu_pin_name, available=True):
+        pin = self._pin_type(cpu_pin_name)
+        pin._available = available
+        self._pins.append(pin)
+        pin._generator = self
+        return pin
+
+    # Iterate just the available pins (i.e. ones in pins.csv).
+    def available_pins(self, exclude_hidden=False):
+        for pin in self._pins:
+            if not pin._available:
+                continue
+            if exclude_hidden and pin._hidden:
+                continue
+            yield pin
+
+    # Allows a port to add additional command-line arguments to be handled.
+    def extra_args(self, parser):
+        pass
+
+    # Load board->cpu mapping from csv.
+    def parse_board_csv(self, filename):
+        with open(filename, "r") as csvfile:
+            rows = csv.reader(csvfile)
+            for linenum, row in enumerate(rows):
+                try:
+                    # Skip empty lines, and lines starting with "#".
+                    if len(row) == 0 or row[0].startswith("#"):
+                        continue
+
+                    # Lines must be pairs of names.
+                    if len(row) != 2:
+                        raise PinGeneratorError("Expecting two entries in each row")
+                    board_pin_name, cpu_pin_name = (x.strip() for x in row)
+
+                    # All rows must include a cpu name.
+                    cpu_hidden = False
+                    if cpu_pin_name.startswith("-"):
+                        cpu_hidden = True
+                        cpu_pin_name = cpu_pin_name[1:]
+                    self._pin_type.validate_cpu_pin_name(cpu_pin_name)
+                    pin = self.find_pin_by_cpu_pin_name(cpu_pin_name, create=True)
+                    pin._available = True  # It's in pins.csv so must be available.
+                    pin._hidden = cpu_hidden  # Optionally don't make available to Python.
+
+                    # Rows can optionally alias to a board name.
+                    if board_pin_name:
+                        board_hidden = False
+                        if board_pin_name.startswith("-"):
+                            board_hidden = True
+                            board_pin_name = board_pin_name[1:]
+                        self._pin_type.validate_board_pin_name(board_pin_name)
+                        pin.add_board_pin_name(board_pin_name, board_hidden)
+
+                # Inject "file:line: " into the exception.
+                except PinGeneratorError as er:
+                    raise PinGeneratorError("{}:{}: {}".format(filename, linenum, er))
+
+    def parse_af_csv(self, filename, header_rows=1, pin_col=0, af_col=1):
+        headings = {}
+        with open(filename, "r") as csvfile:
+            rows = csv.reader(csvfile)
+            for linenum, row in enumerate(rows):
+                try:
+                    # Skip empty lines, and lines starting with "#".
+                    if len(row) == 0 or row[0].startswith("#"):
+                        continue
+
+                    # Consume `header_rows` non-blank/comment rows at the start.
+                    if header_rows:
+                        if not headings:
+                            # If this is the first header row then initialise
+                            # the headings dict.
+                            for af_idx, header in enumerate(row[af_col:]):
+                                headings[af_idx] = header.strip()
+                        header_rows -= 1
+                        continue
+
+                    # Lines must be pairs of names.
+                    if len(row) <= max(pin_col, af_col):
+                        raise PinGeneratorError(
+                            "Expecting {} entries in each row".format(max(pin_col, af_col))
+                        )
+
+                    cpu_pin_name = row[pin_col].strip()
+                    if cpu_pin_name == "-":
+                        continue
+                    self._pin_type.validate_cpu_pin_name(cpu_pin_name)
+                    pin = self.find_pin_by_cpu_pin_name(cpu_pin_name, create=True)
+
+                    for af_idx, af in enumerate(row[af_col:]):
+                        af = af.strip()
+                        if not af:
+                            continue
+                        pin.add_af(af_idx, headings.get(af_idx, ""), af)
+
+                # Inject "file:line: " into the exception.
+                except PinGeneratorError as er:
+                    raise PinGeneratorError("{}:{}: {}".format(filename, linenum, er))
+
+    # Find an existing pin.
+    def find_pin_by_cpu_pin_name(self, cpu_pin_name, create=True):
+        for pin in self._pins:
+            if pin._cpu_pin_name == cpu_pin_name:
+                return pin
+        if create:
+            return self.add_cpu_pin(cpu_pin_name, available=False)
+        else:
+            raise PinGeneratorError("Unknown cpu pin {}".format(cpu_pin_name))
+
+    # Print the locals dict for Pin.board.
+    def print_board_locals_dict(self, out_source):
+        print(file=out_source)
+        print(
+            "STATIC const mp_rom_map_elem_t machine_pin_board_pins_locals_dict_table[] = {",
+            file=out_source,
+        )
+        for pin in self.available_pins():
+            for board_pin_name, board_hidden in pin._board_pin_names:
+                if board_hidden:
+                    # Don't include hidden pins in Pins.board.
+                    continue
+
+                # We don't use the enable macro for board pins, because they
+                # shouldn't be referenced in pins.csv unless they're
+                # available.
+                print(
+                    "    {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(pin_{:s}) }},".format(
+                        board_pin_name,
+                        pin.name(),
+                    ),
+                    file=out_source,
+                )
+        print("};", file=out_source)
+        print(
+            "MP_DEFINE_CONST_DICT(machine_pin_board_pins_locals_dict, machine_pin_board_pins_locals_dict_table);",
+            file=out_source,
+        )
+
+    # Print the locals dict for Pin.cpu.
+    def print_cpu_locals_dict(self, out_source):
+        print(file=out_source)
+        print(
+            "STATIC const mp_rom_map_elem_t machine_pin_cpu_pins_locals_dict_table[] = {",
+            file=out_source,
+        )
+        for pin in self.available_pins(exclude_hidden=True):
+            m = pin.enable_macro()
+            if m:
+                print("    #if {}".format(m), file=out_source)
+            print(
+                "    {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(pin_{:s}) }},".format(
+                    pin.name(),
+                    pin.name(),
+                ),
+                file=out_source,
+            )
+            if m:
+                print("    #endif", file=out_source)
+        print("};", file=out_source)
+        print(
+            "MP_DEFINE_CONST_DICT(machine_pin_cpu_pins_locals_dict, machine_pin_cpu_pins_locals_dict_table);",
+            file=out_source,
+        )
+
+    # NumericPinGenerator can override this to use an entry in machine_pin_obj_table.
+    def _cpu_pin_pointer(self, pin):
+        return "&pin_{:s}_obj".format(pin.name())
+
+    # Print the pin_CPUNAME and pin_BOARDNAME macros.
+    def print_defines(self, out_header):
+        # Provide #defines for each cpu pin.
+        for pin in self.available_pins():
+            print(file=out_header)
+            m = pin.enable_macro()
+            if m:
+                print("#if {}".format(m), file=out_header)
+
+            # #define pin_CPUNAME (...)
+            print(
+                "#define pin_{:s} ({:s})".format(pin.name(), self._cpu_pin_pointer(pin)),
+                file=out_header,
+            )
+
+            # #define pin_BOARDNAME (pin_CPUNAME)
+            for board_pin_name, _board_hidden in pin._board_pin_names:
+                # Note: Hidden board pins are still available to C via the macro.
+                print(
+                    "#define pin_{:s} (pin_{:s})".format(
+                        board_pin_name,
+                        pin.name(),
+                    ),
+                    file=out_header,
+                )
+
+            if m:
+                print("#endif", file=out_header)
+
+    def print_source(self, out_source):
+        raise NotImplementedError
+
+    def print_header(self, out_header):
+        self.print_defines(out_header)
+
+    # A port can override this if it has extra input files (e.g. af.csv) to load.
+    def load_inputs(self, out_source):
+        # Optionally load pins.csv to get cpu->board name mappings.
+        if self._enable_af and self.args.af_csv:
+            print("// --af-csv {:s}".format(self.args.af_csv), file=out_source)
+            self.parse_af_csv(self.args.af_csv)
+
+        # Optionally load pins.csv to get cpu->board name mappings.
+        if self.args.board_csv:
+            print("// --board-csv {:s}".format(self.args.board_csv), file=out_source)
+            self.parse_board_csv(self.args.board_csv)
+
+        # Prepend the prefix file to the start of the output.
+        if self.args.prefix:
+            print("// --prefix {:s}".format(self.args.prefix), file=out_source)
+            print(file=out_source)
+            with open(self.args.prefix, "r") as prefix_file:
+                print(prefix_file.read(), end="", file=out_source)
+
+    # A port can override this to do extra work after the main source+header
+    # have been written, such as generating additional header files.
+    def generate_extra_files(self):
+        pass
+
+    def main(self):
+        parser = argparse.ArgumentParser(description="Generate board specific pin file")
+        parser.add_argument("--board-csv")
+        if self._enable_af:
+            parser.add_argument("--af-csv")
+        parser.add_argument("--prefix")
+        parser.add_argument("--output-source")
+        parser.add_argument("--output-header")
+        self.extra_args(parser)
+        self.args = parser.parse_args()
+
+        try:
+            with open(self.args.output_source, "w") as out_source:
+                print("// This file was automatically generated by make-pins.py", file=out_source)
+                print("//", file=out_source)
+
+                # Load additional files (including port-specific ones).
+                self.load_inputs(out_source)
+
+                # Allow a port to print arbitrary per-pin content.
+                for pin in self.available_pins():
+                    pin.print_source(out_source)
+
+                # Print the tables and dictionaries.
+                self.print_source(out_source)
+
+            with open(self.args.output_header, "w") as out_header:
+                self.print_header(out_header)
+
+            self.generate_extra_files()
+        except PinGeneratorError as er:
+            print(er)
+            sys.exit(1)
+
+
+# For ports that use numeric pin identifiers (e.g. ESP32, rp2).
+# This emits the machine_pin_obj_t instances as an array (machine_pin_obj_table).
+class NumericPinGenerator(PinGenerator):
+    # This should return a const expression that is the number of GPIO pins
+    # for this board.
+    def cpu_table_size(self):
+        raise NotImplementedError
+
+    def print_cpu_table(self, out_source):
+        # Print machine_pin_obj_table, where each element is `[n] = {obj}`.
+        print(file=out_source)
+        print(
+            "const machine_pin_obj_t machine_pin_obj_table[{}] = {{".format(self.cpu_table_size()),
+            file=out_source,
+        )
+        for pin in self.available_pins():
+            n = pin.index_name()
+            if n is None:
+                continue
+
+            m = pin.enable_macro()
+            if m:
+                print("    #if {}".format(m), file=out_source)
+            print(
+                "    [{:s}] = {:s},".format(
+                    pin.index_name(),
+                    pin.definition(),
+                ),
+                file=out_source,
+            )
+            if m:
+                print("    #endif", file=out_source)
+        print("};", file=out_source)
+
+        # For pins that do not have an index, print them out in the same style as PinGenerator.
+        print(file=out_source)
+        for pin in self.available_pins():
+            n = pin.index_name()
+            if n is not None:
+                continue
+
+            m = pin.enable_macro()
+            if m:
+                print("#if {}".format(m), file=out_source)
+            print(
+                "{:s}machine_pin_obj_t pin_{:s}_obj = {:s};".format(
+                    "const " if pin.is_const() else "",
+                    pin.name(),
+                    pin.definition(),
+                ),
+                file=out_source,
+            )
+            if m:
+                print("#endif", file=out_source)
+
+    # Replace PinGenerator's implementation to print the numeric table.
+    def print_source(self, out_source):
+        self.print_cpu_table(out_source)
+        self.print_board_locals_dict(out_source)
+
+    def _cpu_pin_pointer(self, pin):
+        n = pin.index_name()
+        if n is not None:
+            return "&machine_pin_obj_table[{:s}]".format(pin.index_name())
+        else:
+            return super()._cpu_pin_pointer(pin)

From 98dff07bb4ff98a178cac912270ee8a11e1bf570 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 10 Aug 2023 23:40:20 +1000
Subject: [PATCH 102/310] stm32/boards: Fix errors in pins.csv and af.csv.

Fixes are:
- Comment out lines in pins.csv that do not have valid CPU pins.
  It's useful to keep these in the file as "documentation" but in order to
  make make-pins.py stricter they need to be commented out.
- Fix some typos (missing P prefix) in pins.csv.
  This resulted in some missing board pins.
- Fix some typos in af.csv files.
  Some typos of "ADC" and some other that were previously ignored.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 .../boards/ADAFRUIT_F405_EXPRESS/pins.csv     |  4 +--
 ports/stm32/boards/ARDUINO_GIGA/pins.csv      |  6 ++--
 .../boards/ARDUINO_NICLA_VISION/pins.csv      |  2 +-
 .../stm32/boards/ARDUINO_PORTENTA_H7/pins.csv |  2 +-
 ports/stm32/boards/CERB40/pins.csv            | 12 ++++----
 .../boards/GARATRONIC_NADHAT_F405/pins.csv    | 18 ++++++------
 .../GARATRONIC_PYBSTICK26_F411/pins.csv       | 18 ++++++------
 ports/stm32/boards/HYDRABUS/pins.csv          |  2 +-
 .../boards/MIKROE_CLICKER2_STM32/pins.csv     | 18 ++++++------
 ports/stm32/boards/NUCLEO_F412ZG/pins.csv     |  8 +++---
 ports/stm32/boards/NUCLEO_F413ZH/pins.csv     |  8 +++---
 ports/stm32/boards/NUCLEO_G0B1RE/pins.csv     |  2 +-
 ports/stm32/boards/NUCLEO_G474RE/pins.csv     |  2 +-
 ports/stm32/boards/NUCLEO_L073RZ/pins.csv     |  5 +---
 ports/stm32/boards/PYBLITEV10/pins.csv        | 20 ++++++-------
 ports/stm32/boards/PYBV10/pins.csv            | 20 ++++++-------
 ports/stm32/boards/PYBV11/pins.csv            | 20 ++++++-------
 ports/stm32/boards/PYBV4/pins.csv             | 20 ++++++-------
 ports/stm32/boards/STM32F439/pins.csv         |  2 +-
 ports/stm32/boards/STM32H573I_DK/pins.csv     |  4 +--
 ports/stm32/boards/STM32H7B3I_DK/pins.csv     |  4 +--
 ports/stm32/boards/VCC_GND_F407VE/pins.csv    | 24 ++++++++--------
 ports/stm32/boards/VCC_GND_F407ZG/pins.csv    | 28 +++++++++----------
 ports/stm32/boards/stm32h743_af.csv           |  4 +--
 ports/stm32/boards/stm32h7b3_af.csv           | 13 +++------
 25 files changed, 129 insertions(+), 137 deletions(-)

diff --git a/ports/stm32/boards/ADAFRUIT_F405_EXPRESS/pins.csv b/ports/stm32/boards/ADAFRUIT_F405_EXPRESS/pins.csv
index 15e810e1ae..7c5c7b62fa 100644
--- a/ports/stm32/boards/ADAFRUIT_F405_EXPRESS/pins.csv
+++ b/ports/stm32/boards/ADAFRUIT_F405_EXPRESS/pins.csv
@@ -1,5 +1,5 @@
-POWER,3.3V
-GND,GND
+#POWER,3.3V
+#GND,GND
 USB_ID,PA10
 USB_DM,PA11
 USB_DP,PA12
diff --git a/ports/stm32/boards/ARDUINO_GIGA/pins.csv b/ports/stm32/boards/ARDUINO_GIGA/pins.csv
index 91c5c6d586..56e6323290 100644
--- a/ports/stm32/boards/ARDUINO_GIGA/pins.csv
+++ b/ports/stm32/boards/ARDUINO_GIGA/pins.csv
@@ -176,7 +176,7 @@ UART6_TX,PG14
 UART6_RX,PC7
 -USB_DM,PA11
 -USB_DP,PA12
-BOOT0,BOOT0
+#BOOT0,BOOT0
 DAC1,PA4
 DAC2,PA5
 LED_RED,PI12
@@ -209,11 +209,11 @@ I2C4_SCL,PB6
 -QSPI2_D1,PD12
 -QSPI2_D2,PE2
 -QSPI2_D3,PF6
--SPI1_NSS,NC
+#-SPI1_NSS,NC
 -SPI1_SCK,PB3
 -SPI1_MISO,PG9
 -SPI1_MOSI,PD7
 -SPI5_NSS,PK1
 -SPI5_SCK,PH6
 -SPI5_MISO,PJ11
--SPI5_MOSI,PJ10
\ No newline at end of file
+-SPI5_MOSI,PJ10
diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv b/ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv
index 8ff21e6453..2838510ee3 100644
--- a/ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv
+++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv
@@ -176,7 +176,7 @@ UART8_TX,PJ8
 UART8_RX,PJ9
 USB_DM,PA11
 USB_DP,PA12
-BOOT0,BOOT0
+#BOOT0,BOOT0
 OSCEN,PH1
 DAC1,-PA4
 DAC2,-PA5
diff --git a/ports/stm32/boards/ARDUINO_PORTENTA_H7/pins.csv b/ports/stm32/boards/ARDUINO_PORTENTA_H7/pins.csv
index ea8710b25f..4ac406fe3a 100644
--- a/ports/stm32/boards/ARDUINO_PORTENTA_H7/pins.csv
+++ b/ports/stm32/boards/ARDUINO_PORTENTA_H7/pins.csv
@@ -199,7 +199,7 @@ UART8_RX,PJ9
 -USB_HS_RST,PJ4
 -USB_DM,PA11
 -USB_DP,PA12
-BOOT0,BOOT0
+#BOOT0,BOOT0
 OSCEN,PH1
 DAC1,PA4
 DAC2,-PA5
diff --git a/ports/stm32/boards/CERB40/pins.csv b/ports/stm32/boards/CERB40/pins.csv
index cca0bc0536..a319089a66 100644
--- a/ports/stm32/boards/CERB40/pins.csv
+++ b/ports/stm32/boards/CERB40/pins.csv
@@ -1,5 +1,5 @@
-JP1,3.3V
-JP2,GND
+#JP1,3.3V
+#JP2,GND
 JP3,PA8
 JP4,PA13
 JP5,PA7
@@ -12,13 +12,13 @@ JP11,PB9
 JP12,PB3
 JP13,PD2
 JP14,PC12
-JP15,VBAT
+#JP15,VBAT
 JP16,PB8
-JP17,Loader
+#JP17,Loader
 JP18,PB7
 JP19,PB6
 JP20,PB5
-JP21,Reset
+#JP21,Reset
 JP22,PC0
 JP23,PC1
 JP24,PC2
@@ -37,7 +37,7 @@ JP36,PC6
 JP37,PC7
 JP38,PC8
 JP39,PC9
-JP40,VUSB
+#JP40,VUSB
 UART1_TX,PA9
 UART1_RX,PA10
 UART3_TX,PD8
diff --git a/ports/stm32/boards/GARATRONIC_NADHAT_F405/pins.csv b/ports/stm32/boards/GARATRONIC_NADHAT_F405/pins.csv
index 0a030e985c..866716397d 100644
--- a/ports/stm32/boards/GARATRONIC_NADHAT_F405/pins.csv
+++ b/ports/stm32/boards/GARATRONIC_NADHAT_F405/pins.csv
@@ -10,18 +10,18 @@ X9,PB6
 X10,PB7
 X11,PC4
 X12,PC5
-X13,Reset
-X14,GND
-X15,3.3V
-X16,VIN
+#X13,Reset
+#X14,GND
+#X15,3.3V
+#X16,VIN
 X17,PB3
 X18,PC13
 X19,PC0
 X20,PC1
 X21,PC2
 X22,PC3
-X23,A3.3V
-X24,AGND
+#X23,A3.3V
+#X24,AGND
 Y1,PC6
 Y2,PC7
 Y3,PB8
@@ -35,9 +35,9 @@ Y10,PB11
 Y11,PB0
 Y12,PB1
 Y13,PB2
-Y14,GND
-Y15,3.3V
-Y16,VIN
+#Y14,GND
+#Y15,3.3V
+#Y16,VIN
 SW,PB3
 LED_RED,PA13
 LED_GREEN,PA14
diff --git a/ports/stm32/boards/GARATRONIC_PYBSTICK26_F411/pins.csv b/ports/stm32/boards/GARATRONIC_PYBSTICK26_F411/pins.csv
index c52e65cf79..ecdbe99c0f 100644
--- a/ports/stm32/boards/GARATRONIC_PYBSTICK26_F411/pins.csv
+++ b/ports/stm32/boards/GARATRONIC_PYBSTICK26_F411/pins.csv
@@ -1,32 +1,32 @@
-S1,3.3V
-S2,VBUS
+#S1,3.3V
+#S2,VBUS
 S3,PB9
-S4,VIN
+#S4,VIN
 S5,PB8
-S6,GND
+#S6,GND
 S7,PB6
 S8,PA2
-S9,GND
+#S9,GND
 S10,PA3
 S11,PB3
 S12,PA0
 S13,PB10
 S13A,PC3
-S14,Reset
+#S14,Reset
 S15,PB12
 S15A,PC5
 S16,PB13
 S16A,PC6
-S17,GND
+#S17,GND
 S18,PB14
 S18A,PC7
 S19,PA7
-S20,GND
+#S20,GND
 S21,PB4
 S22,PA10
 S23,PA5
 S24,PA15
-S25,GND
+#S25,GND
 S26,PA4
 SW,PC13
 SW2,PB6
diff --git a/ports/stm32/boards/HYDRABUS/pins.csv b/ports/stm32/boards/HYDRABUS/pins.csv
index 47e1f43139..5e1cf682dc 100644
--- a/ports/stm32/boards/HYDRABUS/pins.csv
+++ b/ports/stm32/boards/HYDRABUS/pins.csv
@@ -44,7 +44,7 @@ PA10,PA10
 PA11,PA11
 PA12,PA12
 PD2,PD2
-BOOT0,BOOT0
+#BOOT0,BOOT0
 PA15,PA15
 UART3_TX,PD8
 UART3_RX,PD9
diff --git a/ports/stm32/boards/MIKROE_CLICKER2_STM32/pins.csv b/ports/stm32/boards/MIKROE_CLICKER2_STM32/pins.csv
index c04d2b8c4a..60868ea0c9 100644
--- a/ports/stm32/boards/MIKROE_CLICKER2_STM32/pins.csv
+++ b/ports/stm32/boards/MIKROE_CLICKER2_STM32/pins.csv
@@ -22,8 +22,8 @@ MB2_RX,PD9
 MB2_TX,PD8
 MB2_SCL,PB10
 MB2_SDA,PB11
-PIN1,VSYS
-PIN2,GND
+#PIN1,VSYS
+#PIN2,GND
 PIN3,PC0
 PIN4,PC1
 PIN5,PC2
@@ -46,11 +46,11 @@ PIN21,PD10
 PIN22,PB13
 PIN23,PB14
 PIN24,PB15
-PIN25,3.3V
-PIN26,GND
-PIN27,RST
-PIN28,GND
-PIN30,NC
+#PIN25,3.3V
+#PIN26,GND
+#PIN27,RST
+#PIN28,GND
+#PIN30,NC
 PIN31,PB9
 PIN32,PB8
 PIN33,PE5
@@ -71,8 +71,8 @@ PIN47,PA1
 PIN48,PA0
 PIN49,PB10
 PIN50,PB11
-PIN51,3.3V
-PIN52,GND
+#PIN51,3.3V
+#PIN52,GND
 OSC32_OUT,PC15
 OSC32_IN,PC14
 VSENSE,PC5
diff --git a/ports/stm32/boards/NUCLEO_F412ZG/pins.csv b/ports/stm32/boards/NUCLEO_F412ZG/pins.csv
index 31dcb99ed6..bdfb64619b 100644
--- a/ports/stm32/boards/NUCLEO_F412ZG/pins.csv
+++ b/ports/stm32/boards/NUCLEO_F412ZG/pins.csv
@@ -112,7 +112,7 @@ PG14,PG14
 PG15,PG15
 PH0,PH0
 PH1,PH1
-SW,C13
-LED_RED,B14
-LED_GREEN,B0
-LED_BLUE,B7
+SW,PC13
+LED_RED,PB14
+LED_GREEN,PB0
+LED_BLUE,PB7
diff --git a/ports/stm32/boards/NUCLEO_F413ZH/pins.csv b/ports/stm32/boards/NUCLEO_F413ZH/pins.csv
index 31dcb99ed6..bdfb64619b 100644
--- a/ports/stm32/boards/NUCLEO_F413ZH/pins.csv
+++ b/ports/stm32/boards/NUCLEO_F413ZH/pins.csv
@@ -112,7 +112,7 @@ PG14,PG14
 PG15,PG15
 PH0,PH0
 PH1,PH1
-SW,C13
-LED_RED,B14
-LED_GREEN,B0
-LED_BLUE,B7
+SW,PC13
+LED_RED,PB14
+LED_GREEN,PB0
+LED_BLUE,PB7
diff --git a/ports/stm32/boards/NUCLEO_G0B1RE/pins.csv b/ports/stm32/boards/NUCLEO_G0B1RE/pins.csv
index 9c03b1b68a..b2af175b12 100644
--- a/ports/stm32/boards/NUCLEO_G0B1RE/pins.csv
+++ b/ports/stm32/boards/NUCLEO_G0B1RE/pins.csv
@@ -25,7 +25,7 @@ PA1,PA1
 PA10,PA10
 PA11,PA11
 PA12,PA12
-PA13,TMS
+#PA13,TMS
 PA15,PA15
 PA2,PA2
 PA3,PA3
diff --git a/ports/stm32/boards/NUCLEO_G474RE/pins.csv b/ports/stm32/boards/NUCLEO_G474RE/pins.csv
index 473a5e26bc..30b2379952 100644
--- a/ports/stm32/boards/NUCLEO_G474RE/pins.csv
+++ b/ports/stm32/boards/NUCLEO_G474RE/pins.csv
@@ -1,7 +1,7 @@
 A0,PA0
 A1,PA1
 A2,PA4
-A3,BPB0
+A3,PB0
 A4,PC1
 A5,PC0
 D0,PC5
diff --git a/ports/stm32/boards/NUCLEO_L073RZ/pins.csv b/ports/stm32/boards/NUCLEO_L073RZ/pins.csv
index 7386425acf..9ff62598f3 100644
--- a/ports/stm32/boards/NUCLEO_L073RZ/pins.csv
+++ b/ports/stm32/boards/NUCLEO_L073RZ/pins.csv
@@ -28,7 +28,7 @@ SCK,PA5
 MISO,PA6
 MOSI,PA7
 CS,PB6
-BOOT0,PF11
+#BOOT0,BOOT0
 SWDIO,PA13
 SWCLK,PA14
 USER_B1,PC13
@@ -82,6 +82,3 @@ LED_GREEN,PA5
 ,PC14
 ,PC15
 ,PD2
-,PF0
-,PF1
-,PF11
diff --git a/ports/stm32/boards/PYBLITEV10/pins.csv b/ports/stm32/boards/PYBLITEV10/pins.csv
index 838587c1bc..4f5261c3f0 100644
--- a/ports/stm32/boards/PYBLITEV10/pins.csv
+++ b/ports/stm32/boards/PYBLITEV10/pins.csv
@@ -10,18 +10,18 @@ X9,PB6
 X10,PB7
 X11,PC4
 X12,PC5
-X13,Reset
-X14,GND
-X15,3.3V
-X16,VIN
+#X13,Reset
+#X14,GND
+#X15,3.3V
+#X16,VIN
 X17,PB3
 X18,PC13
 X19,PC0
 X20,PC1
 X21,PC2
 X22,PC3
-X23,A3.3V
-X24,AGND
+#X23,A3.3V
+#X24,AGND
 Y1,PC6
 Y2,PC7
 Y3,PB10
@@ -34,10 +34,10 @@ Y9,PA8
 Y10,PB8
 Y11,PB0
 Y12,PB1
-Y13,Reset
-Y14,GND
-Y15,3.3V
-Y16,VIN
+#Y13,Reset
+#Y14,GND
+#Y15,3.3V
+#Y16,VIN
 SW,PB3
 LED_BLUE,PB4
 LED_RED,PA13
diff --git a/ports/stm32/boards/PYBV10/pins.csv b/ports/stm32/boards/PYBV10/pins.csv
index cee80a1aa1..dc3e48f138 100644
--- a/ports/stm32/boards/PYBV10/pins.csv
+++ b/ports/stm32/boards/PYBV10/pins.csv
@@ -10,18 +10,18 @@ X9,PB6
 X10,PB7
 X11,PC4
 X12,PC5
-X13,Reset
-X14,GND
-X15,3.3V
-X16,VIN
+#X13,Reset
+#X14,GND
+#X15,3.3V
+#X16,VIN
 X17,PB3
 X18,PC13
 X19,PC0
 X20,PC1
 X21,PC2
 X22,PC3
-X23,A3.3V
-X24,AGND
+#X23,A3.3V
+#X24,AGND
 Y1,PC6
 Y2,PC7
 Y3,PB8
@@ -34,10 +34,10 @@ Y9,PB10
 Y10,PB11
 Y11,PB0
 Y12,PB1
-Y13,Reset
-Y14,GND
-Y15,3.3V
-Y16,VIN
+#Y13,Reset
+#Y14,GND
+#Y15,3.3V
+#Y16,VIN
 SW,PB3
 LED_RED,PA13
 LED_GREEN,PA14
diff --git a/ports/stm32/boards/PYBV11/pins.csv b/ports/stm32/boards/PYBV11/pins.csv
index cee80a1aa1..dc3e48f138 100644
--- a/ports/stm32/boards/PYBV11/pins.csv
+++ b/ports/stm32/boards/PYBV11/pins.csv
@@ -10,18 +10,18 @@ X9,PB6
 X10,PB7
 X11,PC4
 X12,PC5
-X13,Reset
-X14,GND
-X15,3.3V
-X16,VIN
+#X13,Reset
+#X14,GND
+#X15,3.3V
+#X16,VIN
 X17,PB3
 X18,PC13
 X19,PC0
 X20,PC1
 X21,PC2
 X22,PC3
-X23,A3.3V
-X24,AGND
+#X23,A3.3V
+#X24,AGND
 Y1,PC6
 Y2,PC7
 Y3,PB8
@@ -34,10 +34,10 @@ Y9,PB10
 Y10,PB11
 Y11,PB0
 Y12,PB1
-Y13,Reset
-Y14,GND
-Y15,3.3V
-Y16,VIN
+#Y13,Reset
+#Y14,GND
+#Y15,3.3V
+#Y16,VIN
 SW,PB3
 LED_RED,PA13
 LED_GREEN,PA14
diff --git a/ports/stm32/boards/PYBV4/pins.csv b/ports/stm32/boards/PYBV4/pins.csv
index cee80a1aa1..dc3e48f138 100644
--- a/ports/stm32/boards/PYBV4/pins.csv
+++ b/ports/stm32/boards/PYBV4/pins.csv
@@ -10,18 +10,18 @@ X9,PB6
 X10,PB7
 X11,PC4
 X12,PC5
-X13,Reset
-X14,GND
-X15,3.3V
-X16,VIN
+#X13,Reset
+#X14,GND
+#X15,3.3V
+#X16,VIN
 X17,PB3
 X18,PC13
 X19,PC0
 X20,PC1
 X21,PC2
 X22,PC3
-X23,A3.3V
-X24,AGND
+#X23,A3.3V
+#X24,AGND
 Y1,PC6
 Y2,PC7
 Y3,PB8
@@ -34,10 +34,10 @@ Y9,PB10
 Y10,PB11
 Y11,PB0
 Y12,PB1
-Y13,Reset
-Y14,GND
-Y15,3.3V
-Y16,VIN
+#Y13,Reset
+#Y14,GND
+#Y15,3.3V
+#Y16,VIN
 SW,PB3
 LED_RED,PA13
 LED_GREEN,PA14
diff --git a/ports/stm32/boards/STM32F439/pins.csv b/ports/stm32/boards/STM32F439/pins.csv
index cc9443dea5..5287dec097 100644
--- a/ports/stm32/boards/STM32F439/pins.csv
+++ b/ports/stm32/boards/STM32F439/pins.csv
@@ -44,7 +44,7 @@ PA10,PA10
 PA11,PA11
 PA12,PA12
 PD2,PD2
-BOOT0,BOOT0
+#BOOT0,BOOT0
 PA15,PA15
 PA13,PA13
 PA14,PA14
diff --git a/ports/stm32/boards/STM32H573I_DK/pins.csv b/ports/stm32/boards/STM32H573I_DK/pins.csv
index 5672bc4922..5317d4da61 100644
--- a/ports/stm32/boards/STM32H573I_DK/pins.csv
+++ b/ports/stm32/boards/STM32H573I_DK/pins.csv
@@ -142,8 +142,8 @@
 ,PI13
 ,PI14
 ,PI15
-LED1,G11
-LED2,G2
+LED1,PG11
+LED2,PG2
 SW,PC13
 UART3_TX,PB10
 UART3_RX,PB11
diff --git a/ports/stm32/boards/STM32H7B3I_DK/pins.csv b/ports/stm32/boards/STM32H7B3I_DK/pins.csv
index e005e38af7..68e8d1ac7b 100644
--- a/ports/stm32/boards/STM32H7B3I_DK/pins.csv
+++ b/ports/stm32/boards/STM32H7B3I_DK/pins.csv
@@ -144,8 +144,8 @@
 ,PI15
 DAC1,PA4
 DAC2,PA5
-LED1,G11
-LED2,G2
+LED1,PG11
+LED2,PG2
 SW,PC13
 I2C1_SDA,PB9
 I2C1_SCL,PB8
diff --git a/ports/stm32/boards/VCC_GND_F407VE/pins.csv b/ports/stm32/boards/VCC_GND_F407VE/pins.csv
index f04d96771b..8d37e01b0d 100644
--- a/ports/stm32/boards/VCC_GND_F407VE/pins.csv
+++ b/ports/stm32/boards/VCC_GND_F407VE/pins.csv
@@ -1,9 +1,9 @@
-P1_1,GND
-P1_2,GND
-P1_3,VBAT
-P1_4,VCC_3V3
-P1_5,VIN_5V
-P1_6,VIN_5V
+#P1_1,GND
+#P1_2,GND
+#P1_3,VBAT
+#P1_4,VCC_3V3
+#P1_5,VIN_5V
+#P1_6,VIN_5V
 P1_7,PE0
 P1_8,PE1
 P1_9,PE2
@@ -84,12 +84,12 @@ P3_27,PB6
 P3_28,PB7
 P3_29,PB8
 P3_30,PB9
-P3_31,GND
-P3_32,GND
-P3_33,VCC_3V3
-P3_34,VCC_3V3
-P3_35,GND
-P3_36,GND
+#P3_31,GND
+#P3_32,GND
+#P3_33,VCC_3V3
+#P3_34,VCC_3V3
+#P3_35,GND
+#P3_36,GND
 DAC1,PA4
 DAC2,PA5
 BLUE_LED,PB9
diff --git a/ports/stm32/boards/VCC_GND_F407ZG/pins.csv b/ports/stm32/boards/VCC_GND_F407ZG/pins.csv
index 780523a075..f992c9ae5e 100644
--- a/ports/stm32/boards/VCC_GND_F407ZG/pins.csv
+++ b/ports/stm32/boards/VCC_GND_F407ZG/pins.csv
@@ -1,9 +1,9 @@
-P1_1,GND
-P1_2,GND
-P1_3,VBAT
-P1_4,VCC_3V3
-P1_5,VIN_5V
-P1_6,VIN_5V
+#P1_1,GND
+#P1_2,GND
+#P1_3,VBAT
+#P1_4,VCC_3V3
+#P1_5,VIN_5V
+#P1_6,VIN_5V
 P1_7,PF2
 P1_8,PF3
 P1_9,PF4
@@ -40,8 +40,8 @@ P1_39,PG1
 P1_40,PE7
 P1_41,PE8
 P1_42,PE9
-P1_43,GND
-P1_44,GND
+#P1_43,GND
+#P1_44,GND
 P2_1,PG7
 P2_2,PG6
 P2_3,PG5
@@ -80,10 +80,10 @@ P3_9,PE3
 P3_10,PE2
 P3_11,PE1
 P3_12,PE0
-P4_1,GND
-P4_2,GND
-P4_3,VCC_3V3
-P4_4,VCC_3V3
+#P4_1,GND
+#P4_2,GND
+#P4_3,VCC_3V3
+#P4_4,VCC_3V3
 P4_5,PB9
 P4_6,PB8
 P4_7,PB7
@@ -122,8 +122,8 @@ P4_39,PC8
 P4_40,PC7
 P4_41,PC6
 P4_42,PG8
-P4_43,GND
-P4_44,GND
+#P4_43,GND
+#P4_44,GND
 DAC1,PA4
 DAC2,PA5
 SRAM_CS,PG10
diff --git a/ports/stm32/boards/stm32h743_af.csv b/ports/stm32/boards/stm32h743_af.csv
index 32e67e2bdc..4b8ef6afdd 100644
--- a/ports/stm32/boards/stm32h743_af.csv
+++ b/ports/stm32/boards/stm32h743_af.csv
@@ -92,8 +92,8 @@ PortF,PF8,,TIM16_CH1N,,,,SPI5_MISO,SAI1_SCK_B,UART7_RTS,SAI4_SCK_B,TIM13_CH1,QUA
 PortF,PF9,,TIM17_CH1N,,,,SPI5_MOSI,SAI1_FS_B,UART7_CTS,SAI4_FS_B,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_INP2
 PortF,PF10,,TIM16_BKIN,SAI1_D3,,,,,,,QUADSPI_CLK,SAI4_D3,,,DCMI_D11,LCD_DE,EVENTOUT,ADC3_INN2/ADC3_INP6
 PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,ADC1_INP2
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,ADC1_INN2/DC1_INP6
-PortF,PF13,,,,DFSDM_DATIN6,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT,ACD2_INP2
+PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,ADC1_INN2/ADC1_INP6
+PortF,PF13,,,,DFSDM_DATIN6,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT,ADC2_INP2
 PortF,PF14,,,,DFSDM_CKIN6,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT,ADC2_INN2/ADC2_INP6
 PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT,
 PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
diff --git a/ports/stm32/boards/stm32h7b3_af.csv b/ports/stm32/boards/stm32h7b3_af.csv
index 0e1747161f..e14ff481e8 100644
--- a/ports/stm32/boards/stm32h7b3_af.csv
+++ b/ports/stm32/boards/stm32h7b3_af.csv
@@ -1,7 +1,6 @@
 Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
 ,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,ADC
 PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,TIM15_BKIN,I2S6_WS/SPI6_NSS,,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI2_SD_B,,,,,EVENTOUT/EVENTOUT,ADC1_INP16,
-PortA,PA0_C,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,TIM15_BKIN,I2S6_WS/SPI6_NSS,,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI2_SD_B,,,,,EVENTOUT/EVENTOUT,ADC1_INP16,
 PortA,PA1,,TIM2_CH2,TIM5_CH2,LPTIM3_OUT,TIM15_CH1N,,,USART2_DE/USART2_RTS,UART4_RX,OCTOSPIM_P1_IO3,SAI2_MCLK_B,OCTOSPIM_P1_DQS,,,LTDC_R2,EVENTOUT/EVENTOUT,ADC1_INN16/ADC1_INP17,
 PortA,PA10,,TIM1_CH3,,LPUART1_RX,,,,USART1_RX,,,USB_OTG_HS_ID,MDIOS_MDIO,LTDC_B4,DCMI_D1/PSSI_D1,LTDC_B1,EVENTOUT/EVENTOUT,,
 PortA,PA11,,TIM1_CH4,,LPUART1_CTS,,I2S2_WS/SPI2_NSS,UART4_RX,USART1_CTS/USART1_NSS,,FDCAN1_RX,,,,,LTDC_R4,EVENTOUT/EVENTOUT,,
@@ -9,7 +8,6 @@ PortA,PA12,,TIM1_ETR,,LPUART1_DE/LPUART1_RTS,,I2S2_CK/SPI2_SCK,UART4_TX,USART1_D
 PortA,PA13,DEBUG_JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
 PortA,PA14,DEBUG_JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
 PortA,PA15,DEBUG_JTDI,TIM2_CH1/TIM2_ETR,,,CEC,I2S1_WS/SPI1_NSS,I2S3_WS/SPI3_NSS,I2S6_WS/SPI6_NSS,UART4_DE/UART4_RTS,LTDC_R3,,UART7_TX,,,LTDC_B6,EVENTOUT/EVENTOUT,,
-PortA,PA1_C,,TIM2_CH2,TIM5_CH2,LPTIM3_OUT,TIM15_CH1N,,,USART2_DE/USART2_RTS,UART4_RX,OCTOSPIM_P1_IO3,SAI2_MCLK_B,OCTOSPIM_P1_DQS,,,LTDC_R2,EVENTOUT/EVENTOUT,ADC1_INN16/ADC1_INP17,
 PortA,PA2,,TIM2_CH3,TIM5_CH3,,TIM15_CH1,,DFSDM2_CKIN1,USART2_TX,SAI2_SCK_B,,,,MDIOS_MDIO,,LTDC_R1,EVENTOUT/EVENTOUT,ADC1_INP14,
 PortA,PA3,,TIM2_CH4,TIM5_CH4,OCTOSPIM_P1_CLK,TIM15_CH2,I2S6_MCK,,USART2_RX,,LTDC_B2,USB_OTG_HS_ULPI_D0,,,,LTDC_B5,EVENTOUT/EVENTOUT,ADC1_INP15,
 PortA,PA4,,,TIM5_ETR,,,I2S1_WS/SPI1_NSS,I2S3_WS/SPI3_NSS,USART2_CK,I2S6_WS/SPI6_NSS,,,,,DCMI_HSYNC/PSSI_DE,LTDC_VSYNC,EVENTOUT/EVENTOUT,ADC1_INP18,
@@ -40,12 +38,10 @@ PortC,PC10,,,,DFSDM1_CKIN5,DFSDM2_CKIN0,,I2S3_CK/SPI3_SCK,USART3_TX,UART4_TX,OCT
 PortC,PC11,,,,DFSDM1_DATIN5,DFSDM2_DATIN0,,I2S3_SDI/SPI3_MISO,USART3_RX,UART4_RX,OCTOSPIM_P1_NCS,,,SDMMC1_D3,DCMI_D4/PSSI_D4,LTDC_B4,EVENTOUT/EVENTOUT,,
 PortC,PC12,DEBUG_TRACED3,,TIM15_CH1,,DFSDM2_CKOUT,I2S6_CK/SPI6_SCK,I2S3_SDO/SPI3_MOSI,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9/PSSI_D9,LTDC_R6,EVENTOUT/EVENTOUT,,
 PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortC,PC14-OSC32_IN,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortC,PC15-OSC32_OUT,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
+PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
+PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
 PortC,PC2,PWR_CSTOP,,,DFSDM1_CKIN1,,I2S2_SDI/SPI2_MISO,DFSDM1_CKOUT,,,OCTOSPIM_P1_IO2,USB_OTG_HS_ULPI_DIR,OCTOSPIM_P1_IO5,FMC_SDNE0,,,EVENTOUT/EVENTOUT,ADC1_INN11/ADC1_INP12/ADC2_INN11/ADC2_INP12,
-PortC,PC2_C,PWR_CSTOP,,,DFSDM1_CKIN1,,I2S2_SDI/SPI2_MISO,DFSDM1_CKOUT,,,OCTOSPIM_P1_IO2,USB_OTG_HS_ULPI_DIR,OCTOSPIM_P1_IO5,FMC_SDNE0,,,EVENTOUT/EVENTOUT,ADC1_INN11/ADC1_INP12/ADC2_INN11/ADC2_INP12,
 PortC,PC3,PWR_CSLEEP,,,DFSDM1_DATIN1,,I2S2_SDO/SPI2_MOSI,,,,OCTOSPIM_P1_IO0,USB_OTG_HS_ULPI_NXT,OCTOSPIM_P1_IO6,FMC_SDCKE0,,,EVENTOUT/EVENTOUT,ADC2_INP1,
-PortC,PC3_C,PWR_CSLEEP,,,DFSDM1_DATIN1,,I2S2_SDO/SPI2_MOSI,,,,OCTOSPIM_P1_IO0,USB_OTG_HS_ULPI_NXT,OCTOSPIM_P1_IO6,FMC_SDCKE0,,,EVENTOUT/EVENTOUT,ADC2_INP1,
 PortC,PC4,,,,DFSDM1_CKIN2,,I2S1_MCK,,,,SPDIFRX_IN3,,,FMC_SDNE0,,LTDC_R7,EVENTOUT/EVENTOUT,ADC1_INP4/ADC2_INP4,
 PortC,PC5,,,SAI1_D3,DFSDM1_DATIN2,PSSI_D15,,,,,SPDIFRX_IN4,OCTOSPIM_P1_DQS,,FMC_SDCKE0,COMP1_OUT,LTDC_DE,EVENTOUT/EVENTOUT,ADC1_INN4/ADC1_INP8/ADC2_INN4/ADC2_INP8,
 PortC,PC6,,,TIM3_CH1,TIM8_CH1,DFSDM1_CKIN3,I2S2_MCK,,USART6_TX,SDMMC1_D0DIR,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0/PSSI_D0,LTDC_HSYNC,EVENTOUT/EVENTOUT,,
@@ -68,7 +64,6 @@ PortD,PD6,,,SAI1_D1,DFSDM1_CKIN4,DFSDM1_DATIN1,I2S3_SDO/SPI3_MOSI,SAI1_SD_A,USAR
 PortD,PD7,,,,DFSDM1_DATIN4,,I2S1_SDO/SPI1_MOSI,DFSDM1_CKIN1,USART2_CK,,SPDIFRX_IN1,OCTOSPIM_P1_IO7,SDMMC2_CMD,FMC_NE1,,,EVENTOUT/EVENTOUT,,
 PortD,PD8,,,,DFSDM1_CKIN3,,,,USART3_TX,,SPDIFRX_IN2,,,FMC_D13/FMC_DA13,,,EVENTOUT/EVENTOUT,,
 PortD,PD9,,,,DFSDM1_DATIN3,,,,USART3_RX,,,,,FMC_D14/FMC_DA14,,,EVENTOUT/EVENTOUT,,
-PortD,PDR_ON,,,,,,,,,,,,,,,,EVENTOUT,,
 PortE,PE0,,LPTIM1_ETR,TIM4_ETR,,LPTIM2_ETR,,,,UART8_RX,,SAI2_MCLK_A,,FMC_NBL0,DCMI_D2/PSSI_D2,LTDC_R0,EVENTOUT/EVENTOUT,,
 PortE,PE1,,LPTIM1_IN2,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3/PSSI_D3,LTDC_R6,EVENTOUT/EVENTOUT,,
 PortE,PE10,,TIM1_CH2N,,DFSDM1_DATIN4,,,,UART7_CTS,,,OCTOSPIM_P1_IO7,,FMC_D7/FMC_DA7,,,EVENTOUT/EVENTOUT,,
@@ -117,8 +112,8 @@ PortG,PG6,,TIM17_BKIN,,,,,,,,,OCTOSPIM_P1_NCS,,FMC_NE3,DCMI_D12/PSSI_D12,LTDC_R7
 PortG,PG7,,,,,,,SAI1_MCLK_A,USART6_CK,,OCTOSPIM_P2_DQS,,,FMC_INT,DCMI_D13/PSSI_D13,LTDC_CLK,EVENTOUT/EVENTOUT,,
 PortG,PG8,,,,TIM8_ETR,,I2S6_WS/SPI6_NSS,,USART6_DE/USART6_RTS,SPDIFRX_IN3,,,,FMC_SDCLK,,LTDC_G7,EVENTOUT/EVENTOUT,,
 PortG,PG9,,,,,,I2S1_SDI/SPI1_MISO,,USART6_RX,SPDIFRX_IN4,OCTOSPIM_P1_IO6,SAI2_FS_B,SDMMC2_D0,FMC_NCE/FMC_NE2,DCMI_VSYNC/PSSI_RDY,,EVENTOUT/EVENTOUT,,
-PortH,PH0-OSC_IN,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortH,PH1-OSC_OUT,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
+PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
+PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
 PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1/PSSI_D1,LTDC_R4,EVENTOUT/EVENTOUT,,
 PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2/PSSI_D2,LTDC_R5,EVENTOUT/EVENTOUT,,
 PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3/PSSI_D3,LTDC_R6,EVENTOUT/EVENTOUT,,

From 286b1b3ed9da4db156a7fc3fc4f191efb9125aa0 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 2 Nov 2023 14:34:34 +1100
Subject: [PATCH 103/310] stm32/boards: Format stm32 alternate function csv
 files.

Changes are:
- Pad all cells to make them easier to read.
- Ensure all files have exactly 19 columns (Port,Pin,AF0-15,ADC)

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/boards/stm32f091_af.csv | 180 +++++++--------
 ports/stm32/boards/stm32f401_af.csv | 166 +++++++-------
 ports/stm32/boards/stm32f405_af.csv | 284 +++++++++++------------
 ports/stm32/boards/stm32f411_af.csv | 168 +++++++-------
 ports/stm32/boards/stm32f412_af.csv | 232 +++++++++----------
 ports/stm32/boards/stm32f413_af.csv | 232 +++++++++----------
 ports/stm32/boards/stm32f429_af.csv | 340 ++++++++++++++--------------
 ports/stm32/boards/stm32f439_af.csv | 340 ++++++++++++++--------------
 ports/stm32/boards/stm32f446_af.csv | 232 +++++++++----------
 ports/stm32/boards/stm32f479_af.csv | 322 +++++++++++++-------------
 ports/stm32/boards/stm32f722_af.csv | 292 ++++++++++++------------
 ports/stm32/boards/stm32f746_af.csv | 340 ++++++++++++++--------------
 ports/stm32/boards/stm32f767_af.csv | 340 ++++++++++++++--------------
 ports/stm32/boards/stm32g0b1_af.csv | 192 ++++++++--------
 ports/stm32/boards/stm32g474_af.csv | 218 +++++++++---------
 ports/stm32/boards/stm32h573_af.csv | 284 +++++++++++------------
 ports/stm32/boards/stm32h723_af.csv | 232 +++++++++----------
 ports/stm32/boards/stm32h743_af.csv | 340 ++++++++++++++--------------
 ports/stm32/boards/stm32h7b3_af.csv | 340 ++++++++++++++--------------
 ports/stm32/boards/stm32l072_af.csv | 168 +++++++-------
 ports/stm32/boards/stm32l152_af.csv | 234 +++++++++----------
 ports/stm32/boards/stm32l432_af.csv |  56 ++---
 ports/stm32/boards/stm32l452_af.csv | 170 +++++++-------
 ports/stm32/boards/stm32l476_af.csv | 232 +++++++++----------
 ports/stm32/boards/stm32l496_af.csv | 284 +++++++++++------------
 ports/stm32/boards/stm32wb55_af.csv | 148 ++++++------
 ports/stm32/boards/stm32wl55_af.csv |  90 ++++----
 27 files changed, 3228 insertions(+), 3228 deletions(-)

diff --git a/ports/stm32/boards/stm32f091_af.csv b/ports/stm32/boards/stm32f091_af.csv
index 8074fd22b7..5e44697776 100644
--- a/ports/stm32/boards/stm32f091_af.csv
+++ b/ports/stm32/boards/stm32f091_af.csv
@@ -1,90 +1,90 @@
-Port,Pin,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,,,,,,,,,
-,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,,,,,,,,,ADC
-PortA,PA0,,USART2_CTS,TIM2_CH1_ETR,TSC_G1_IO1,USART4_TX,,,COMP1_OUT,,,,,,,,,ADC1_IN0
-PortA,PA1,EVENTOUT,USART2_RTS,TIM2_CH2,TSC_G1_IO2,USART4_RX,TIM15_CH1N,,,,,,,,,,,ADC1_IN1
-PortA,PA2,TIM15_CH1,USART2_TX,TIM2_CH3,TSC_G1_IO3,,,,COMP2_OUT,,,,,,,,,ADC1_IN2
-PortA,PA3,TIM15_CH2,USART2_RX,TIM2_CH4,TSC_G1_IO4,,,,,,,,,,,,,ADC1_IN3
-PortA,PA4,SPI1_NSS/I2S1_WS,USART2_CK,,TSC_G2_IO1,TIM14_CH1,USART6_TX,,,,,,,,,,,ADC1_IN4
-PortA,PA5,SPI1_SCK/I2S1_CK,CEC,TIM2_CH1_ETR,TSC_G2_IO2,,USART6_RX,,,,,,,,,,,ADC1_IN5
-PortA,PA6,SPI1_MISO/I2S1_MCK,TIM3_CH1,TIM1_BKIN,TSC_G2_IO3,USART3_CTS,TIM16_CH1,EVENTOUT,COMP1_OUT,,,,,,,,,ADC1_IN6
-PortA,PA7,SPI1_MOSI/I2S1_SD,TIM3_CH2,TIM1_CH1N,TSC_G2_IO4,TIM14_CH1,TIM17_CH1,EVENTOUT,COMP2_OUT,,,,,,,,,ADC1_IN7
-PortA,PA8,MCO,USART1_CK,TIM1_CH1,EVENTOUT,CRS_SYNC,,,,,,,,,,,,
-PortA,PA9,TIM15_BKIN,USART1_TX,TIM1_CH2,TSC_G4_IO1,I2C1_SCL,MCO,,,,,,,,,,,
-PortA,PA10,TIM17_BKIN,USART1_RX,TIM1_CH3,TSC_G4_IO2,I2C1_SDA,,,,,,,,,,,,
-PortA,PA11,EVENTOUT,USART1_CTS,TIM1_CH4,TSC_G4_IO3,CAN1_RX,I2C2_SCL,,COMP1_OUT,,,,,,,,,
-PortA,PA12,EVENTOUT,USART1_RTS,TIM1_ETR,TSC_G4_IO4,CAN1_TX,I2C2_SDA,,COMP2_OUT,,,,,,,,,
-PortA,PA13,SWDIO,IR_OUT,,,,,,,,,,,,,,,
-PortA,PA14,SWCLK,USART2_TX,,,,,,,,,,,,,,,
-PortA,PA15,SPI1_NSS/I2S1_WS,USART2_RX,TIM2_CH1_ETR,EVENTOUT,USART4_RTS,,,,,,,,,,,,
-PortB,PB0,EVENTOUT,TIM3_CH3,TIM1_CH2N,TSC_G3_IO2,USART3_CK,,,,,,,,,,,,ADC1_IN8
-PortB,PB1,TIM14_CH1,TIM3_CH4,TIM1_CH3N,TSC_G3_IO3,USART3_RTS,,,,,,,,,,,,ADC1_IN9
-PortB,PB2,,,,TSC_G3_IO4,,,,,,,,,,,,,
-PortB,PB3,SPI1_SCK/I2S1_CK,EVENTOUT,TIM2_CH2,TSC_G5_IO1,USART5_TX,,,,,,,,,,
-PortB,PB4,SPI1_MISO/I2S1_MCK,TIM3_CH1,EVENTOUT,TSC_G5_IO2,USART5_RX,TIM17_BKIN,,,,,,,,,
-PortB,PB5,SPI1_MOSI/I2S1_SD,TIM3_CH2,TIM16_BKIN,I2C1_SMBA,USART5_CK/USART5_RTS,,,,,,,,,,
-PortB,PB6,USART1_TX,I2C1_SCL,TIM16_CH1N,TSC_G5_IO3,,,,,,,,,,,
-PortB,PB7,USART1_RX,I2C1_SDA,TIM17_CH1N,TSC_G5_IO4,USART4_CTS,,,,,,,,,,
-PortB,PB8,CEC,I2C1_SCL,TIM16_CH1,TSC_SYNC,CAN1_RX,,,,,,,,,,
-PortB,PB9,IR_OUT,I2C1_SDA,TIM17_CH1,EVENTOUT,CAN1_TX,SPI2_NSS/I2S2_WS,,,,,,,,,
-PortB,PB10,CEC,I2C2_SCL,TIM2_CH3,TSC_SYNC,USART3_TX,SPI2_SCK/I2S2_CK,,,,,,,,,
-PortB,PB11,EVENTOUT,I2C2_SDA,TIM2_CH4,TSC_G6_IO1,USART3_RX,,,,,,,,,,
-PortB,PB12,SPI2_NSS/I2S2_WS,EVENTOUT,TIM1_BKIN,TSC_G6_IO2,USART3_CK,TIM15_BKIN,,,,,,,,,
-PortB,PB13,SPI2_SCK/I2S2_CK,,TIM1_CH1N,TSC_G6_IO3,USART3_CTS,I2C2_SCL,,,,,,,,,
-PortB,PB14,SPI2_MISO/I2S2_MCK,TIM15_CH1,TIM1_CH2N,TSC_G6_IO4,USART3_RTS,I2C2_SDA,,,,,,,,,
-PortB,PB15,SPI2_MOSI/I2S2_SD,TIM15_CH2,TIM1_CH3N,TIM15_CH1N,,,,,,,,,,,
-PortC,PC0,EVENTOUT,USART7_TX,USART6_TX,,,,,,,,,,,,,,ADC1_IN10
-PortC,PC1,EVENTOUT,USART7_RX,USART6_RX,,,,,,,,,,,,,,ADC1_IN11
-PortC,PC2,EVENTOUT,SPI2_MISO/I2S2_MCK,USART8_TX,,,,,,,,,,,,,,ADC1_IN12
-PortC,PC3,EVENTOUT,SPI2_MOSI/I2S2_SD,USART8_RX,,,,,,,,,,,,,,ADC1_IN13
-PortC,PC4,EVENTOUT,USART3_TX,,,,,,,,,,,,,,,ADC1_IN14
-PortC,PC5,TSC_G3_IO1,USART3_RX,,,,,,,,,,,,,,,ADC1_IN15
-PortC,PC6,TIM3_CH1,USART7_TX,,,,,,,,,,,,,,,
-PortC,PC7,TIM3_CH2,USART7_RX,,,,,,,,,,,,,,,
-PortC,PC8,TIM3_CH3,USART8_TX,,,,,,,,,,,,,,,
-PortC,PC9,TIM3_CH4,USART8_RX,,,,,,,,,,,,,,,
-PortC,PC10,USART4_TX,USART3_TX,,,,,,,,,,,,,,,
-PortC,PC11,USART4_RX,USART3_RX,,,,,,,,,,,,,,,
-PortC,PC12,USART4_CK,USART3_CK,USART5_TX,,,,,,,,,,,,,,
-PortC,PC13,,,,,,,,,,,,,,,,,
-PortC,PC14,,,,,,,,,,,,,,,,,
-PortC,PC15,,,,,,,,,,,,,,,,,
-PortD,PD0,CAN1_RX,SPI2_NSS/I2S2_WS,,,,,,,,,,,,,,,
-PortD,PD1,CAN1_TX,SPI2_SCK/I2S2_CK,,,,,,,,,,,,,,,
-PortD,PD2,TIM3_ETR,USART3_RTS,USART5_RX,,,,,,,,,,,,,,
-PortD,PD3,USART2_CTS,SPI2_MISO/I2S2_MCK,,,,,,,,,,,,,,,
-PortD,PD4,USART2_RTS,SPI2_MOSI/I2S2_SD,,,,,,,,,,,,,,,
-PortD,PD5,USART2_TX,,,,,,,,,,,,,,,,
-PortD,PD6,USART2_RX,,,,,,,,,,,,,,,,
-PortD,PD7,USART2_CK,,,,,,,,,,,,,,,,
-PortD,PD8,USART3_TX,,,,,,,,,,,,,,,,
-PortD,PD9,USART3_RX,,,,,,,,,,,,,,,,
-PortD,PD10,USART3_CK,,,,,,,,,,,,,,,,
-PortD,PD11,USART3_CTS,,,,,,,,,,,,,,,,
-PortD,PD12,USART3_RTS,TSC_G8_IO1,USART8_CK/USART8_RTS,,,,,,,,,,,,,,
-PortD,PD13,USART8_TX,TSC_G8_IO2,,,,,,,,,,,,,,,
-PortD,PD14,USART8_RX,TSC_G8_IO3,,,,,,,,,,,,,,,
-PortD,PD15,CRS_SYNC,TSC_G8_IO4,USART7_CK/USART7_RTS,,,,,,,,,,,,,,
-PortE,PE0,TIM16_CH1,EVENTOUT,,,,,,,,,,,,,,,
-PortE,PE1,TIM17_CH1,EVENTOUT,,,,,,,,,,,,,,,
-PortE,PE2,TIM3_ETR,TSC_G7_IO1,,,,,,,,,,,,,,,
-PortE,PE3,TIM3_CH1,TSC_G7_IO2,,,,,,,,,,,,,,,
-PortE,PE4,TIM3_CH2,TSC_G7_IO3,,,,,,,,,,,,,,,
-PortE,PE5,TIM3_CH3,TSC_G7_IO4,,,,,,,,,,,,,,,
-PortE,PE6,TIM3_CH4,,,,,,,,,,,,,,,,
-PortE,PE7,TIM1_ETR,USART5_CK/USART5_RTS,,,,,,,,,,,,,,,
-PortE,PE8,TIM1_CH1N,USART4_TX,,,,,,,,,,,,,,,
-PortE,PE9,TIM1_CH1,USART4_RX,,,,,,,,,,,,,,,
-PortE,PE10,TIM1_CH2N,USART5_TX,,,,,,,,,,,,,,,
-PortE,PE11,TIM1_CH2,USART5_RX,,,,,,,,,,,,,,,
-PortE,PE12,TIM1_CH3N,SPI1_NSS/I2S1_WS,,,,,,,,,,,,,,,
-PortE,PE13,TIM1_CH3,SPI1_SCK/I2S1_CK,,,,,,,,,,,,,,,
-PortE,PE14,TIM1_CH4,SPI1_MISO/I2S1_MCK,,,,,,,,,,,,,,,
-PortE,PE15,TIM1_BKIN,SPI1_MOSI/I2S1_SD,,,,,,,,,,,,,,,
-PortF,PF0,CRS_SYNC,I2C1_SDA,,,,,,,,,,,,,,,
-PortF,PF1,,I2C1_SCL,,,,,,,,,,,,,,,
-PortF,PF2,EVENTOUT,USART7_TX,USART7_CK/USART7_RTS,,,,,,,,,,,,,,
-PortF,PF3,EVENTOUT,USART7_RX,USART6_CK/USART6_RTS,,,,,,,,,,,,,,
-PortF,PF6,,,,,,,,,,,,,,,,,
-PortF,PF9,TIM15_CH1,USART6_TX,,,,,,,,,,,,,,,
-PortF,PF10,TIM15_CH2,USART6_RX,,,,,,,,,,,,,,,
-PortF,PF11,,,,,,,,,,,,,,,,,
+Port ,Pin ,AF0               ,AF1                 ,AF2                 ,AF3       ,AF4                 ,AF5             ,AF6     ,AF7      ,,,,,,,,,ADC
+     ,    ,AF0               ,AF1                 ,AF2                 ,AF3       ,AF4                 ,AF5             ,AF6     ,AF7      ,,,,,,,,,ADC
+PortA,PA0 ,                  ,USART2_CTS          ,TIM2_CH1_ETR        ,TSC_G1_IO1,USART4_TX           ,                ,        ,COMP1_OUT,,,,,,,,,ADC1_IN0
+PortA,PA1 ,EVENTOUT          ,USART2_RTS          ,TIM2_CH2            ,TSC_G1_IO2,USART4_RX           ,TIM15_CH1N      ,        ,         ,,,,,,,,,ADC1_IN1
+PortA,PA2 ,TIM15_CH1         ,USART2_TX           ,TIM2_CH3            ,TSC_G1_IO3,                    ,                ,        ,COMP2_OUT,,,,,,,,,ADC1_IN2
+PortA,PA3 ,TIM15_CH2         ,USART2_RX           ,TIM2_CH4            ,TSC_G1_IO4,                    ,                ,        ,         ,,,,,,,,,ADC1_IN3
+PortA,PA4 ,SPI1_NSS/I2S1_WS  ,USART2_CK           ,                    ,TSC_G2_IO1,TIM14_CH1           ,USART6_TX       ,        ,         ,,,,,,,,,ADC1_IN4
+PortA,PA5 ,SPI1_SCK/I2S1_CK  ,CEC                 ,TIM2_CH1_ETR        ,TSC_G2_IO2,                    ,USART6_RX       ,        ,         ,,,,,,,,,ADC1_IN5
+PortA,PA6 ,SPI1_MISO/I2S1_MCK,TIM3_CH1            ,TIM1_BKIN           ,TSC_G2_IO3,USART3_CTS          ,TIM16_CH1       ,EVENTOUT,COMP1_OUT,,,,,,,,,ADC1_IN6
+PortA,PA7 ,SPI1_MOSI/I2S1_SD ,TIM3_CH2            ,TIM1_CH1N           ,TSC_G2_IO4,TIM14_CH1           ,TIM17_CH1       ,EVENTOUT,COMP2_OUT,,,,,,,,,ADC1_IN7
+PortA,PA8 ,MCO               ,USART1_CK           ,TIM1_CH1            ,EVENTOUT  ,CRS_SYNC            ,                ,        ,         ,,,,,,,,,
+PortA,PA9 ,TIM15_BKIN        ,USART1_TX           ,TIM1_CH2            ,TSC_G4_IO1,I2C1_SCL            ,MCO             ,        ,         ,,,,,,,,,
+PortA,PA10,TIM17_BKIN        ,USART1_RX           ,TIM1_CH3            ,TSC_G4_IO2,I2C1_SDA            ,                ,        ,         ,,,,,,,,,
+PortA,PA11,EVENTOUT          ,USART1_CTS          ,TIM1_CH4            ,TSC_G4_IO3,CAN1_RX             ,I2C2_SCL        ,        ,COMP1_OUT,,,,,,,,,
+PortA,PA12,EVENTOUT          ,USART1_RTS          ,TIM1_ETR            ,TSC_G4_IO4,CAN1_TX             ,I2C2_SDA        ,        ,COMP2_OUT,,,,,,,,,
+PortA,PA13,SWDIO             ,IR_OUT              ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortA,PA14,SWCLK             ,USART2_TX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortA,PA15,SPI1_NSS/I2S1_WS  ,USART2_RX           ,TIM2_CH1_ETR        ,EVENTOUT  ,USART4_RTS          ,                ,        ,         ,,,,,,,,,
+PortB,PB0 ,EVENTOUT          ,TIM3_CH3            ,TIM1_CH2N           ,TSC_G3_IO2,USART3_CK           ,                ,        ,         ,,,,,,,,,ADC1_IN8
+PortB,PB1 ,TIM14_CH1         ,TIM3_CH4            ,TIM1_CH3N           ,TSC_G3_IO3,USART3_RTS          ,                ,        ,         ,,,,,,,,,ADC1_IN9
+PortB,PB2 ,                  ,                    ,                    ,TSC_G3_IO4,                    ,                ,        ,         ,,,,,,,,,
+PortB,PB3 ,SPI1_SCK/I2S1_CK  ,EVENTOUT            ,TIM2_CH2            ,TSC_G5_IO1,USART5_TX           ,                ,        ,         ,,,,,,,,,
+PortB,PB4 ,SPI1_MISO/I2S1_MCK,TIM3_CH1            ,EVENTOUT            ,TSC_G5_IO2,USART5_RX           ,TIM17_BKIN      ,        ,         ,,,,,,,,,
+PortB,PB5 ,SPI1_MOSI/I2S1_SD ,TIM3_CH2            ,TIM16_BKIN          ,I2C1_SMBA ,USART5_CK/USART5_RTS,                ,        ,         ,,,,,,,,,
+PortB,PB6 ,USART1_TX         ,I2C1_SCL            ,TIM16_CH1N          ,TSC_G5_IO3,                    ,                ,        ,         ,,,,,,,,,
+PortB,PB7 ,USART1_RX         ,I2C1_SDA            ,TIM17_CH1N          ,TSC_G5_IO4,USART4_CTS          ,                ,        ,         ,,,,,,,,,
+PortB,PB8 ,CEC               ,I2C1_SCL            ,TIM16_CH1           ,TSC_SYNC  ,CAN1_RX             ,                ,        ,         ,,,,,,,,,
+PortB,PB9 ,IR_OUT            ,I2C1_SDA            ,TIM17_CH1           ,EVENTOUT  ,CAN1_TX             ,SPI2_NSS/I2S2_WS,        ,         ,,,,,,,,,
+PortB,PB10,CEC               ,I2C2_SCL            ,TIM2_CH3            ,TSC_SYNC  ,USART3_TX           ,SPI2_SCK/I2S2_CK,        ,         ,,,,,,,,,
+PortB,PB11,EVENTOUT          ,I2C2_SDA            ,TIM2_CH4            ,TSC_G6_IO1,USART3_RX           ,                ,        ,         ,,,,,,,,,
+PortB,PB12,SPI2_NSS/I2S2_WS  ,EVENTOUT            ,TIM1_BKIN           ,TSC_G6_IO2,USART3_CK           ,TIM15_BKIN      ,        ,         ,,,,,,,,,
+PortB,PB13,SPI2_SCK/I2S2_CK  ,                    ,TIM1_CH1N           ,TSC_G6_IO3,USART3_CTS          ,I2C2_SCL        ,        ,         ,,,,,,,,,
+PortB,PB14,SPI2_MISO/I2S2_MCK,TIM15_CH1           ,TIM1_CH2N           ,TSC_G6_IO4,USART3_RTS          ,I2C2_SDA        ,        ,         ,,,,,,,,,
+PortB,PB15,SPI2_MOSI/I2S2_SD ,TIM15_CH2           ,TIM1_CH3N           ,TIM15_CH1N,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC0 ,EVENTOUT          ,USART7_TX           ,USART6_TX           ,          ,                    ,                ,        ,         ,,,,,,,,,ADC1_IN10
+PortC,PC1 ,EVENTOUT          ,USART7_RX           ,USART6_RX           ,          ,                    ,                ,        ,         ,,,,,,,,,ADC1_IN11
+PortC,PC2 ,EVENTOUT          ,SPI2_MISO/I2S2_MCK  ,USART8_TX           ,          ,                    ,                ,        ,         ,,,,,,,,,ADC1_IN12
+PortC,PC3 ,EVENTOUT          ,SPI2_MOSI/I2S2_SD   ,USART8_RX           ,          ,                    ,                ,        ,         ,,,,,,,,,ADC1_IN13
+PortC,PC4 ,EVENTOUT          ,USART3_TX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,ADC1_IN14
+PortC,PC5 ,TSC_G3_IO1        ,USART3_RX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,ADC1_IN15
+PortC,PC6 ,TIM3_CH1          ,USART7_TX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC7 ,TIM3_CH2          ,USART7_RX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC8 ,TIM3_CH3          ,USART8_TX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC9 ,TIM3_CH4          ,USART8_RX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC10,USART4_TX         ,USART3_TX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC11,USART4_RX         ,USART3_RX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC12,USART4_CK         ,USART3_CK           ,USART5_TX           ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC13,                  ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC14,                  ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortC,PC15,                  ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD0 ,CAN1_RX           ,SPI2_NSS/I2S2_WS    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD1 ,CAN1_TX           ,SPI2_SCK/I2S2_CK    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD2 ,TIM3_ETR          ,USART3_RTS          ,USART5_RX           ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD3 ,USART2_CTS        ,SPI2_MISO/I2S2_MCK  ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD4 ,USART2_RTS        ,SPI2_MOSI/I2S2_SD   ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD5 ,USART2_TX         ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD6 ,USART2_RX         ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD7 ,USART2_CK         ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD8 ,USART3_TX         ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD9 ,USART3_RX         ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD10,USART3_CK         ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD11,USART3_CTS        ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD12,USART3_RTS        ,TSC_G8_IO1          ,USART8_CK/USART8_RTS,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD13,USART8_TX         ,TSC_G8_IO2          ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD14,USART8_RX         ,TSC_G8_IO3          ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortD,PD15,CRS_SYNC          ,TSC_G8_IO4          ,USART7_CK/USART7_RTS,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE0 ,TIM16_CH1         ,EVENTOUT            ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE1 ,TIM17_CH1         ,EVENTOUT            ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE2 ,TIM3_ETR          ,TSC_G7_IO1          ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE3 ,TIM3_CH1          ,TSC_G7_IO2          ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE4 ,TIM3_CH2          ,TSC_G7_IO3          ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE5 ,TIM3_CH3          ,TSC_G7_IO4          ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE6 ,TIM3_CH4          ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE7 ,TIM1_ETR          ,USART5_CK/USART5_RTS,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE8 ,TIM1_CH1N         ,USART4_TX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE9 ,TIM1_CH1          ,USART4_RX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE10,TIM1_CH2N         ,USART5_TX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE11,TIM1_CH2          ,USART5_RX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE12,TIM1_CH3N         ,SPI1_NSS/I2S1_WS    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE13,TIM1_CH3          ,SPI1_SCK/I2S1_CK    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE14,TIM1_CH4          ,SPI1_MISO/I2S1_MCK  ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortE,PE15,TIM1_BKIN         ,SPI1_MOSI/I2S1_SD   ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortF,PF0 ,CRS_SYNC          ,I2C1_SDA            ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortF,PF1 ,                  ,I2C1_SCL            ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortF,PF2 ,EVENTOUT          ,USART7_TX           ,USART7_CK/USART7_RTS,          ,                    ,                ,        ,         ,,,,,,,,,
+PortF,PF3 ,EVENTOUT          ,USART7_RX           ,USART6_CK/USART6_RTS,          ,                    ,                ,        ,         ,,,,,,,,,
+PortF,PF6 ,                  ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortF,PF9 ,TIM15_CH1         ,USART6_TX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortF,PF10,TIM15_CH2         ,USART6_RX           ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
+PortF,PF11,                  ,                    ,                    ,          ,                    ,                ,        ,         ,,,,,,,,,
diff --git a/ports/stm32/boards/stm32f401_af.csv b/ports/stm32/boards/stm32f401_af.csv
index 1acb8e4313..28266da944 100644
--- a/ports/stm32/boards/stm32f401_af.csv
+++ b/ports/stm32/boards/stm32f401_af.csv
@@ -1,83 +1,83 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS_AF,TIM1/TIM2,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/SPI2/I2S2/SPI3/I2S3/SPI4,SPI2/I2S2/SPI3/I2S3,SPI3/I2S3/USART1/USART2,USART6,I2C2/I2C3,OTG1_FS,,SDIO,,,,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,,,,,USART2_CTS,,,,,,,,EVENTOUT,ADC1_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,,,,,,,,EVENTOUT,ADC1_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,,,,,EVENTOUT,ADC1_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,,,,,,EVENTOUT,ADC1_IN3
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,,,EVENTOUT,ADC1_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,,,SPI1_SCK,,,,,,,,,,EVENTOUT,ADC1_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,,,SPI1_MISO,,,,,,,,,,EVENTOUT,ADC1_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,,,SPI1_MOSI,,,,,,,,,,EVENTOUT,ADC1_IN7
-PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,OTG_FS_VBUS,,,,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,USART6_TX,,OTG_FS_DM,,,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,USART6_RX,,OTG_FS_DP,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,,,,,,,,,,,,,EVENTOUT,ADC1_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,,,,,,,,,,,,,EVENTOUT,ADC1_IN9
-PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,I2C2_SDA,,,,,,EVENTOUT,
-PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,I2C3_SDA,,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,,,,,,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,,,,,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,,,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,,,,SDIO_D4,,,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,,,,SDIO_D5,,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,,,,,,,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,
-PortC,PC0,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN10
-PortC,PC1,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN11
-PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT,ADC1_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,ADC1_IN13
-PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN14
-PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN15
-PortC,PC6,,,TIM3_CH1,,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,,,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,,,EVENTOUT,
-PortC,PC8,,,TIM3_CH3,,,,,,USART6_CK,,,,SDIO_D0,,,EVENTOUT,
-PortC,PC9,MCO_2,,TIM3_CH4,,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,,,,,,SDIO_D2,,,EVENTOUT,
-PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,,,,,,SDIO_D3,,,EVENTOUT,
-PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,,,,,,SDIO_CK,,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,,,,,,,,,,SDIO_CMD,,,EVENTOUT,
-PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,,,,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,,USART2_RX,,,,,,,,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,,,,,,,,EVENTOUT,
-PortD,PD8,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD9,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD10,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD11,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,,,,,,,,,,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,,,,,,,,,,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,,,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,,,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,,,,,,,,,,,,,EVENTOUT,
-PortE,PE1,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK,,,,,,,,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS,,,,,,,,,,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,,,,,,,,,,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,,,,,,,,,,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,,,,,,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,,,,,,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,,,,,,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,,,,,,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2           ,AF3             ,AF4           ,AF5                          ,AF6                ,AF7                    ,AF8      ,AF9      ,AF10       ,AF11,AF12    ,AF13,AF14,AF15    ,ADC
+     ,    ,SYS_AF       ,TIM1/TIM2        ,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/SPI2/I2S2/SPI3/I2S3/SPI4,SPI2/I2S2/SPI3/I2S3,SPI3/I2S3/USART1/USART2,USART6   ,I2C2/I2C3,OTG1_FS    ,    ,SDIO    ,    ,    ,        ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1      ,                ,              ,                             ,                   ,USART2_CTS             ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2      ,                ,              ,                             ,                   ,USART2_RTS             ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3      ,TIM9_CH1        ,              ,                             ,                   ,USART2_TX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4      ,TIM9_CH2        ,              ,                             ,                   ,USART2_RX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN3
+PortA,PA4 ,             ,                 ,              ,                ,              ,SPI1_NSS                     ,SPI3_NSS/I2S3_WS   ,USART2_CK              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,              ,                ,              ,SPI1_SCK                     ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1      ,                ,              ,SPI1_MISO                    ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2      ,                ,              ,SPI1_MOSI                    ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN7
+PortA,PA8 ,MCO_1        ,TIM1_CH1         ,              ,                ,I2C3_SCL      ,                             ,                   ,USART1_CK              ,         ,         ,OTG_FS_SOF ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,              ,                ,I2C3_SMBA     ,                             ,                   ,USART1_TX              ,         ,         ,OTG_FS_VBUS,    ,        ,    ,    ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,              ,                ,              ,                             ,                   ,USART1_RX              ,         ,         ,OTG_FS_ID  ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,              ,                ,              ,                             ,                   ,USART1_CTS             ,USART6_TX,         ,OTG_FS_DM  ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,              ,                ,              ,                             ,                   ,USART1_RTS             ,USART6_RX,         ,OTG_FS_DP  ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,              ,                ,              ,SPI1_NSS                     ,SPI3_NSS/I2S3_WS   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3      ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4      ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN9
+PortB,PB2 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,              ,                ,              ,SPI1_SCK                     ,SPI3_SCK/I2S3_CK   ,                       ,         ,I2C2_SDA ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB4 ,JTRST        ,                 ,TIM3_CH1      ,                ,              ,SPI1_MISO                    ,SPI3_MISO          ,I2S3ext_SD             ,         ,I2C3_SDA ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2      ,                ,I2C1_SMBA     ,SPI1_MOSI                    ,SPI3_MOSI/I2S3_SD  ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1      ,                ,I2C1_SCL      ,                             ,                   ,USART1_TX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2      ,                ,I2C1_SDA      ,                             ,                   ,USART1_RX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3      ,TIM10_CH1       ,I2C1_SCL      ,                             ,                   ,                       ,         ,         ,           ,    ,SDIO_D4 ,    ,    ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4      ,TIM11_CH1       ,I2C1_SDA      ,SPI2_NSS/I2S2_WS             ,                   ,                       ,         ,         ,           ,    ,SDIO_D5 ,    ,    ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,              ,                ,I2C2_SCL      ,SPI2_SCK/I2S2_CK             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,              ,                ,I2C2_SMBA     ,SPI2_NSS/I2S2_WS             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,              ,                ,              ,SPI2_SCK/I2S2_CK             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,              ,                ,              ,SPI2_MISO                    ,I2S2ext_SD         ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,              ,                ,              ,SPI2_MOSI/I2S2_SD            ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortC,PC0 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN10
+PortC,PC1 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN11
+PortC,PC2 ,             ,                 ,              ,                ,              ,SPI2_MISO                    ,I2S2ext_SD         ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN12
+PortC,PC3 ,             ,                 ,              ,                ,              ,SPI2_MOSI/I2S2_SD            ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN13
+PortC,PC4 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN14
+PortC,PC5 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1      ,                ,              ,I2S2_MCK                     ,                   ,                       ,USART6_TX,         ,           ,    ,SDIO_D6 ,    ,    ,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2      ,                ,              ,                             ,I2S3_MCK           ,                       ,USART6_RX,         ,           ,    ,SDIO_D7 ,    ,    ,EVENTOUT,
+PortC,PC8 ,             ,                 ,TIM3_CH3      ,                ,              ,                             ,                   ,                       ,USART6_CK,         ,           ,    ,SDIO_D0 ,    ,    ,EVENTOUT,
+PortC,PC9 ,MCO_2        ,                 ,TIM3_CH4      ,                ,I2C3_SDA      ,I2S_CKIN                     ,                   ,                       ,         ,         ,           ,    ,SDIO_D1 ,    ,    ,EVENTOUT,
+PortC,PC10,             ,                 ,              ,                ,              ,                             ,SPI3_SCK/I2S3_CK   ,                       ,         ,         ,           ,    ,SDIO_D2 ,    ,    ,EVENTOUT,
+PortC,PC11,             ,                 ,              ,                ,              ,I2S3ext_SD                   ,SPI3_MISO          ,                       ,         ,         ,           ,    ,SDIO_D3 ,    ,    ,EVENTOUT,
+PortC,PC12,             ,                 ,              ,                ,              ,                             ,SPI3_MOSI/I2S3_SD  ,                       ,         ,         ,           ,    ,SDIO_CK ,    ,    ,EVENTOUT,
+PortC,PC13,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortC,PC14,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortC,PC15,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD0 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD1 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR      ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,SDIO_CMD,    ,    ,EVENTOUT,
+PortD,PD3 ,             ,                 ,              ,                ,              ,SPI2_SCK/I2S2_CK             ,                   ,USART2_CTS             ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD4 ,             ,                 ,              ,                ,              ,                             ,                   ,USART2_RTS             ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD5 ,             ,                 ,              ,                ,              ,                             ,                   ,USART2_TX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD6 ,             ,                 ,              ,                ,              ,SPI3_MOSI/I2S3_SD            ,                   ,USART2_RX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD7 ,             ,                 ,              ,                ,              ,                             ,                   ,USART2_CK              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD8 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD9 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD10,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD11,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1      ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2      ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3      ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4      ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR      ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE1 ,             ,TIM1_CH2N        ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,              ,                ,              ,SPI4_SCK                     ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,              ,                ,              ,SPI4_NSS                     ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,              ,TIM9_CH1        ,              ,SPI4_MISO                    ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,              ,TIM9_CH2        ,              ,SPI4_MOSI                    ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,              ,                ,              ,SPI4_NSS                     ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,              ,                ,              ,SPI4_SCK                     ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,              ,                ,              ,SPI4_MISO                    ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,              ,                ,              ,SPI4_MOSI                    ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortH,PH0 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortH,PH1 ,             ,                 ,              ,                ,              ,                             ,                   ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f405_af.csv b/ports/stm32/boards/stm32f405_af.csv
index 2602db8775..d30779d45f 100644
--- a/ports/stm32/boards/stm32f405_af.csv
+++ b/ports/stm32/boards/stm32f405_af.csv
@@ -1,142 +1,142 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/SPI2/I2S2/I2S2ext,SPI3/I2Sext/I2S3,USART1/2/3/I2S3ext,UART4/5/USART6,CAN1/CAN2/TIM12/13/14,OTG_FS/OTG_HS,ETH,FSMC/SDIO/OTG_FS,DCMI,,,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC123_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,,EVENTOUT,ADC123_IN3
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCK,,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9
-PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,,DCMI_D10,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,,DCMI_D5,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FSMC_NL,DCMI_VSYNC,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,,,,EVENTOUT,ADC123_IN10
-PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,,,,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC123_IN14
-PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC123_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,,EVENTOUT,
-PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,,EVENTOUT,
-PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT,
-PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,CAN1_RX,,,FSMC_D2,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,CAN1_TX,,,FSMC_D3,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT,
-PortD,PD3,,,,,,,,USART2_CTS,,,,,FSMC_CLK,,,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,FSMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FSMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,,,USART2_RX,,,,,FSMC_NWAIT,,,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,,,,,FSMC_NE1/FSMC_NCE2,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FSMC_D13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FSMC_D14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,FSMC_D15,,,EVENTOUT,
-PortD,PD11,,,,,,,,USART3_CTS,,,,,FSMC_A16,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FSMC_A17,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,,,,,,,,,FSMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,,FSMC_D0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,,FSMC_D1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,,,,,,,,,,FSMC_NBL0,DCMI_D2,,EVENTOUT,
-PortE,PE1,,,,,,,,,,,,,FSMC_NBL1,DCMI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,,,,,,,ETH_MII_TXD3,FSMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,,,,,,,FSMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,,,,,,,,FSMC_A20,DCMI_D4,,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,,,,,,,,FSMC_A21,DCMI_D6,,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,,,,,,,,FSMC_A22,DCMI_D7,,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,,,,,FSMC_D4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,,,,,FSMC_D5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,,,,,FSMC_D6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FSMC_D7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,,,,,,,,FSMC_D8,,,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,,,,,,,,FSMC_D9,,,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,,,,,,,,FSMC_D10,,,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,,,,,,,,FSMC_D11,,,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FSMC_D12,,,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FSMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FSMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FSMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FSMC_A3,,,EVENTOUT,ADC3_IN9
-PortF,PF4,,,,,,,,,,,,,FSMC_A4,,,EVENTOUT,ADC3_IN14
-PortF,PF5,,,,,,,,,,,,,FSMC_A5,,,EVENTOUT,ADC3_IN15
-PortF,PF6,,,,TIM10_CH1,,,,,,,,,FSMC_NIORD,,,EVENTOUT,ADC3_IN4
-PortF,PF7,,,,TIM11_CH1,,,,,,,,,FSMC_NREG,,,EVENTOUT,ADC3_IN5
-PortF,PF8,,,,,,,,,,TIM13_CH1,,,FSMC_NIOWR,,,EVENTOUT,ADC3_IN6
-PortF,PF9,,,,,,,,,,TIM14_CH1,,,FSMC_CD,,,EVENTOUT,ADC3_IN7
-PortF,PF10,,,,,,,,,,,,,FSMC_INTR,,,EVENTOUT,ADC3_IN8
-PortF,PF11,,,,,,,,,,,,,,DCMI_D12,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,FSMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,,,,,,,,,FSMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,,,,,,,,,FSMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,,,,,,,,,FSMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FSMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FSMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FSMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FSMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FSMC_A14,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FSMC_A15,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,,,FSMC_INT2,,,EVENTOUT,
-PortG,PG7,,,,,,,,,USART6_CK,,,,FSMC_INT3,,,EVENTOUT,
-PortG,PG8,,,,,,,,,USART6_RTS,,,ETH_PPS_OUT,,,,EVENTOUT,
-PortG,PG9,,,,,,,,,USART6_RX,,,,FSMC_NE2/FSMC_NCE3,,,EVENTOUT,
-PortG,PG10,,,,,,,,,,,,,FSMC_NCE4_1/FSMC_NE3,,,EVENTOUT,
-PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FSMC_NCE4_2,,,EVENTOUT,
-PortG,PG12,,,,,,,,,USART6_RTS,,,,FSMC_NE4,,,EVENTOUT,
-PortG,PG13,,,,,,,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FSMC_A24,,,EVENTOUT,
-PortG,PG14,,,,,,,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FSMC_A25,,,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,,DCMI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,,,,EVENTOUT,
-PortH,PH3,,,,,,,,,,,,ETH_MII_COL,,,,EVENTOUT,
-PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT,
-PortH,PH5,,,,,I2C2_SDA,,,,,,,,,,,EVENTOUT,
-PortH,PH6,,,,,I2C2_SMBA,,,,,TIM12_CH1,,ETH_MII_RXD2,,,,EVENTOUT,
-PortH,PH7,,,,,I2C3_SCL,,,,,,,ETH_MII_RXD3,,,,EVENTOUT,
-PortH,PH8,,,,,I2C3_SDA,,,,,,,,,DCMI_HSYNC,,EVENTOUT,
-PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,,DCMI_D0,,EVENTOUT,
-PortH,PH10,,,TIM5_CH1,,,,,,,,,,,DCMI_D1,,EVENTOUT,
-PortH,PH11,,,TIM5_CH2,,,,,,,,,,,DCMI_D2,,EVENTOUT,
-PortH,PH12,,,TIM5_CH3,,,,,,,,,,,DCMI_D3,,EVENTOUT,
-PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,,,,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,,,,,,DCMI_D4,,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,,DCMI_D11,,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,,DCMI_D13,,EVENTOUT,
-PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,,DCMI_D8,,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,,DCMI_D9,,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,,DCMI_D10,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,,,,DCMI_D5,,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,,,,DCMI_VSYNC,,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,,,,DCMI_D6,,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,,,,DCMI_D7,,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,,CAN1_RX,,,,,,EVENTOUT,
-PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,,,,EVENTOUT,
-PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5                   ,AF6              ,AF7               ,AF8           ,AF9                  ,AF10           ,AF11                           ,AF12                ,AF13      ,AF14,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/SPI2/I2S2/I2S2ext,SPI3/I2Sext/I2S3 ,USART1/2/3/I2S3ext,UART4/5/USART6,CAN1/CAN2/TIM12/13/14,OTG_FS/OTG_HS  ,ETH                            ,FSMC/SDIO/OTG_FS    ,DCMI      ,    ,        ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                      ,                 ,USART2_CTS        ,UART4_TX      ,                     ,               ,ETH_MII_CRS                    ,                    ,          ,    ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                      ,                 ,USART2_RTS        ,UART4_RX      ,                     ,               ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                    ,          ,    ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                      ,                 ,USART2_TX         ,              ,                     ,               ,ETH_MDIO                       ,                    ,          ,    ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                      ,                 ,USART2_RX         ,              ,                     ,OTG_HS_ULPI_D0 ,ETH_MII_COL                    ,                    ,          ,    ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS              ,SPI3_NSS/I2S3_WS ,USART2_CK         ,              ,                     ,               ,                               ,OTG_HS_SOF          ,DCMI_HSYNC,    ,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK              ,                 ,                  ,              ,                     ,OTG_HS_ULPI_CK ,                               ,                    ,          ,    ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO             ,                 ,                  ,              ,TIM13_CH1            ,               ,                               ,                    ,DCMI_PIXCK,    ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI             ,                 ,                  ,              ,TIM14_CH1            ,               ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,                    ,          ,    ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                      ,                 ,USART1_CK         ,              ,                     ,OTG_FS_SOF     ,                               ,                    ,          ,    ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,                      ,                 ,USART1_TX         ,              ,                     ,               ,                               ,                    ,DCMI_D0   ,    ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                      ,                 ,USART1_RX         ,              ,                     ,OTG_FS_ID      ,                               ,                    ,DCMI_D1   ,    ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                      ,                 ,USART1_CTS        ,              ,CAN1_RX              ,OTG_FS_DM      ,                               ,                    ,          ,    ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                      ,                 ,USART1_RTS        ,              ,CAN1_TX              ,OTG_FS_DP      ,                               ,                    ,          ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS              ,SPI3_NSS/I2S3_WS ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                      ,                 ,                  ,              ,                     ,OTG_HS_ULPI_D1 ,ETH_MII_RXD2                   ,                    ,          ,    ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                      ,                 ,                  ,              ,                     ,OTG_HS_ULPI_D2 ,ETH_MII_RXD3                   ,                    ,          ,    ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK              ,SPI3_SCK/I2S3_CK ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO             ,SPI3_MISO        ,I2S3ext_SD        ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI             ,SPI3_MOSI/I2S3_SD,                  ,              ,CAN2_RX              ,OTG_HS_ULPI_D7 ,ETH_PPS_OUT                    ,                    ,DCMI_D10  ,    ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                      ,                 ,USART1_TX         ,              ,CAN2_TX              ,               ,                               ,                    ,DCMI_D5   ,    ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                      ,                 ,USART1_RX         ,              ,                     ,               ,                               ,FSMC_NL             ,DCMI_VSYNC,    ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                      ,                 ,                  ,              ,CAN1_RX              ,               ,ETH_MII_TXD3                   ,SDIO_D4             ,DCMI_D6   ,    ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS      ,                 ,                  ,              ,CAN1_TX              ,               ,                               ,SDIO_D5             ,DCMI_D7   ,    ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK      ,                 ,USART3_TX         ,              ,                     ,OTG_HS_ULPI_D3 ,ETH_MII_RX_ER                  ,                    ,          ,    ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                      ,                 ,USART3_RX         ,              ,                     ,OTG_HS_ULPI_D4 ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                    ,          ,    ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS      ,                 ,USART3_CK         ,              ,CAN2_RX              ,OTG_HS_ULPI_D5 ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID           ,          ,    ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK      ,                 ,USART3_CTS        ,              ,CAN2_TX              ,OTG_HS_ULPI_D6 ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                    ,          ,    ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO             ,I2S2ext_SD       ,USART3_RTS        ,              ,TIM12_CH1            ,               ,                               ,OTG_HS_DM           ,          ,    ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD     ,                 ,                  ,              ,TIM12_CH2            ,               ,                               ,OTG_HS_DP           ,          ,    ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,OTG_HS_ULPI_STP,                               ,                    ,          ,    ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,ETH_MDC                        ,                    ,          ,    ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO             ,I2S2ext_SD       ,                  ,              ,                     ,OTG_HS_ULPI_DIR,ETH_MII_TXD2                   ,                    ,          ,    ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD     ,                 ,                  ,              ,                     ,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK                 ,                    ,          ,    ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,ETH_MII_RXD0/ETH_RMII_RXD0     ,                    ,          ,    ,EVENTOUT,ADC123_IN14
+PortC,PC5 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,ETH_MII_RXD1/ETH_RMII_RXD1     ,                    ,          ,    ,EVENTOUT,ADC123_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK              ,                 ,                  ,USART6_TX     ,                     ,               ,                               ,SDIO_D6             ,DCMI_D0   ,    ,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                      ,I2S3_MCK         ,                  ,USART6_RX     ,                     ,               ,                               ,SDIO_D7             ,DCMI_D1   ,    ,EVENTOUT,
+PortC,PC8 ,             ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                      ,                 ,                  ,USART6_CK     ,                     ,               ,                               ,SDIO_D0             ,DCMI_D2   ,    ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN              ,                 ,                  ,              ,                     ,               ,                               ,SDIO_D1             ,DCMI_D3   ,    ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,            ,         ,                      ,SPI3_SCK/I2S3_CK ,USART3_TX         ,UART4_TX      ,                     ,               ,                               ,SDIO_D2             ,DCMI_D8   ,    ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,            ,         ,I2S3ext_SD            ,SPI3_MISO        ,USART3_RX         ,UART4_RX      ,                     ,               ,                               ,SDIO_D3             ,DCMI_D4   ,    ,EVENTOUT,
+PortC,PC12,             ,                 ,        ,            ,         ,                      ,SPI3_MOSI/I2S3_SD,USART3_CK         ,UART5_TX      ,                     ,               ,                               ,SDIO_CK             ,DCMI_D9   ,    ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,CAN1_RX              ,               ,                               ,FSMC_D2             ,          ,    ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,CAN1_TX              ,               ,                               ,FSMC_D3             ,          ,    ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR,            ,         ,                      ,                 ,                  ,UART5_RX      ,                     ,               ,                               ,SDIO_CMD            ,DCMI_D11  ,    ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,            ,         ,                      ,                 ,USART2_CTS        ,              ,                     ,               ,                               ,FSMC_CLK            ,          ,    ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,            ,         ,                      ,                 ,USART2_RTS        ,              ,                     ,               ,                               ,FSMC_NOE            ,          ,    ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,            ,         ,                      ,                 ,USART2_TX         ,              ,                     ,               ,                               ,FSMC_NWE            ,          ,    ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,            ,         ,                      ,                 ,USART2_RX         ,              ,                     ,               ,                               ,FSMC_NWAIT          ,          ,    ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,            ,         ,                      ,                 ,USART2_CK         ,              ,                     ,               ,                               ,FSMC_NE1/FSMC_NCE2  ,          ,    ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,            ,         ,                      ,                 ,USART3_TX         ,              ,                     ,               ,                               ,FSMC_D13            ,          ,    ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,            ,         ,                      ,                 ,USART3_RX         ,              ,                     ,               ,                               ,FSMC_D14            ,          ,    ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,            ,         ,                      ,                 ,USART3_CK         ,              ,                     ,               ,                               ,FSMC_D15            ,          ,    ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,            ,         ,                      ,                 ,USART3_CTS        ,              ,                     ,               ,                               ,FSMC_A16            ,          ,    ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                      ,                 ,USART3_RTS        ,              ,                     ,               ,                               ,FSMC_A17            ,          ,    ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A18            ,          ,    ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D0             ,          ,    ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D1             ,          ,    ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_NBL0           ,DCMI_D2   ,    ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_NBL1           ,DCMI_D3   ,    ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,ETH_MII_TXD3                   ,FSMC_A23            ,          ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A19            ,          ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A20            ,DCMI_D4   ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A21            ,DCMI_D6   ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A22            ,DCMI_D7   ,    ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D4             ,          ,    ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D5             ,          ,    ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D6             ,          ,    ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D7             ,          ,    ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D8             ,          ,    ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D9             ,          ,    ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D10            ,          ,    ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D11            ,          ,    ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_D12            ,          ,    ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A0             ,          ,    ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A1             ,          ,    ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A2             ,          ,    ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A3             ,          ,    ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A4             ,          ,    ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A5             ,          ,    ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_NIORD          ,          ,    ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_NREG           ,          ,    ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,TIM13_CH1            ,               ,                               ,FSMC_NIOWR          ,          ,    ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,TIM14_CH1            ,               ,                               ,FSMC_CD             ,          ,    ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_INTR           ,          ,    ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D12  ,    ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A6             ,          ,    ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A7             ,          ,    ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A8             ,          ,    ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A9             ,          ,    ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A10            ,          ,    ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A11            ,          ,    ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A12            ,          ,    ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A13            ,          ,    ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A14            ,          ,    ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_A15            ,          ,    ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_INT2           ,          ,    ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,USART6_CK     ,                     ,               ,                               ,FSMC_INT3           ,          ,    ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,USART6_RTS    ,                     ,               ,ETH_PPS_OUT                    ,                    ,          ,    ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,USART6_RX     ,                     ,               ,                               ,FSMC_NE2/FSMC_NCE3  ,          ,    ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,FSMC_NCE4_1/FSMC_NE3,          ,    ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,FSMC_NCE4_2         ,          ,    ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,            ,         ,                      ,                 ,                  ,USART6_RTS    ,                     ,               ,                               ,FSMC_NE4            ,          ,    ,EVENTOUT,
+PortG,PG13,             ,                 ,        ,            ,         ,                      ,                 ,                  ,USART6_CTS    ,                     ,               ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FSMC_A24            ,          ,    ,EVENTOUT,
+PortG,PG14,             ,                 ,        ,            ,         ,                      ,                 ,                  ,USART6_TX     ,                     ,               ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FSMC_A25            ,          ,    ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,            ,         ,                      ,                 ,                  ,USART6_CTS    ,                     ,               ,                               ,                    ,DCMI_D13  ,    ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,ETH_MII_CRS                    ,                    ,          ,    ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,ETH_MII_COL                    ,                    ,          ,    ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                      ,                 ,                  ,              ,                     ,OTG_HS_ULPI_NXT,                               ,                    ,          ,    ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,                      ,                 ,                  ,              ,TIM12_CH1            ,               ,ETH_MII_RXD2                   ,                    ,          ,    ,EVENTOUT,
+PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,                      ,                 ,                  ,              ,                     ,               ,ETH_MII_RXD3                   ,                    ,          ,    ,EVENTOUT,
+PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_HSYNC,    ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                      ,                 ,                  ,              ,TIM12_CH2            ,               ,                               ,                    ,DCMI_D0   ,    ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D1   ,    ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D2   ,    ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D3   ,    ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                      ,                 ,                  ,              ,CAN1_TX              ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D4   ,    ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D11  ,    ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D13  ,    ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D8   ,    ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO             ,I2S2ext_SD       ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D9   ,    ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD     ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D10  ,    ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D5   ,    ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_VSYNC,    ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D6   ,    ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,DCMI_D7   ,    ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,CAN1_RX              ,               ,                               ,                    ,          ,    ,EVENTOUT,
+PortI,PI10,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,               ,ETH_MII_RX_ER                  ,                    ,          ,    ,EVENTOUT,
+PortI,PI11,             ,                 ,        ,            ,         ,                      ,                 ,                  ,              ,                     ,OTG_HS_ULPI_DIR,                               ,                    ,          ,    ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f411_af.csv b/ports/stm32/boards/stm32f411_af.csv
index d5b7a61deb..752048a405 100644
--- a/ports/stm32/boards/stm32f411_af.csv
+++ b/ports/stm32/boards/stm32f411_af.csv
@@ -1,84 +1,84 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS_AF,TIM1/TIM2,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3,SPI2/I2S2/SPI3/I2S3/SPI4/I2S4/SPI5/I2S5,SPI3/I2S3/USART1/USART2,USART6,I2C2/I2C3,,,SDIO,,,,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,,,,,USART2_CTS,,,,,,,,EVENTOUT,ADC1_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,SPI4_MOSI/I2S4_SD,,USART2_RTS,,,,,,,,EVENTOUT,ADC1_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,I2S2_CKIN,,USART2_TX,,,,,,,,EVENTOUT,ADC1_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,I2S2_MCK,,USART2_RX,,,,,,,,EVENTOUT,ADC1_IN3
-PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,,,EVENTOUT,ADC1_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,,,SPI1_SCK/I2S1_CK,,,,,,,,,,EVENTOUT,ADC1_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,,,SPI1_MISO,I2S2_MCK,,,,,,SDIO_CMD,,,EVENTOUT,ADC1_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,,,SPI1_MOSI/I2S1_SD,,,,,,,,,,EVENTOUT,ADC1_IN7
-PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,USB_FS_SOF,,SDIO_D1,,,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,USB_FS_VBUS,,SDIO_D2,,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,SPI5_MOSI/I2S5_SD,USART1_RX,,,USB_FS_ID,,,,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,SPI4_MISO,USART1_CTS,USART6_TX,,USB_FS_DM,,,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,SPI5_MISO,USART1_RTS,USART6_RX,,USB_FS_DP,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART1_TX,,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,,,,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,ADC1_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,,,,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT,ADC1_IN9
-PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,USART1_RX,,I2C2_SDA,,,,,,EVENTOUT,
-PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,I2C3_SDA,,,SDIO_D0,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,,,,SDIO_D3,,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,,,,,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,SDIO_D0,,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,SPI5_MOSI/I2S5_SD,,,I2C3_SDA,,,SDIO_D4,,,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,I2C2_SDA,,,SDIO_D5,,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,I2S3_MCK,,,,,,SDIO_D7,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,I2S2_CKIN,,,,,,,,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,SPI4_NSS/I2S4_WS,SPI3_SCK/I2S3_CK,,,,,,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,SPI4_SCK/I2S4_CK,,,,,,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,,,SPI2_MISO,I2S2ext_SD,,,,,,SDIO_D6,,,EVENTOUT,
-PortB,PB15,RTC_50Hz,TIM1_CH3N,,,,SPI2_MOSI/I2S2_SD,,,,,,,SDIO_CK,,,EVENTOUT,
-PortC,PC0,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN10
-PortC,PC1,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN11
-PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT,ADC1_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,ADC1_IN13
-PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN14
-PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN15
-PortC,PC6,,,TIM3_CH1,,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,,,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,,,SPI2_SCK/I2S2_CK,I2S3_MCK,,USART6_RX,,,,SDIO_D7,,,EVENTOUT,
-PortC,PC8,,,TIM3_CH3,,,,,,USART6_CK,,,,SDIO_D0,,,EVENTOUT,
-PortC,PC9,MCO_2,,TIM3_CH4,,I2C3_SDA,I2S2_CKIN,,,,,,,SDIO_D1,,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,,,,,,SDIO_D2,,,EVENTOUT,
-PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,,,,,,SDIO_D3,,,EVENTOUT,
-PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,,,,,,SDIO_CK,,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,,,,,,,,,,SDIO_CMD,,,EVENTOUT,
-PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,,,,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,,USART2_RX,,,,,,,,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,,,,,,,,EVENTOUT,
-PortD,PD8,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD9,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD10,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD11,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,,,,,,,,,,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,,,,,,,,,,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,,,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,,,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,,,,,,,,,,,,,EVENTOUT,
-PortE,PE1,,,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SPI5_MISO,,,,,,,,,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,,,,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,SPI5_MISO,,,,,,,,,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,,,,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2           ,AF3             ,AF4           ,AF5                          ,AF6                                    ,AF7                    ,AF8      ,AF9      ,AF10       ,AF11,AF12    ,AF13,AF14,AF15    ,ADC
+     ,    ,SYS_AF       ,TIM1/TIM2        ,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3,SPI2/I2S2/SPI3/I2S3/SPI4/I2S4/SPI5/I2S5,SPI3/I2S3/USART1/USART2,USART6   ,I2C2/I2C3,           ,    ,SDIO    ,    ,    ,        ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1      ,                ,              ,                             ,                                       ,USART2_CTS             ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2      ,                ,              ,SPI4_MOSI/I2S4_SD            ,                                       ,USART2_RTS             ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3      ,TIM9_CH1        ,              ,I2S2_CKIN                    ,                                       ,USART2_TX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4      ,TIM9_CH2        ,              ,I2S2_MCK                     ,                                       ,USART2_RX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN3
+PortA,PA4 ,             ,                 ,              ,                ,              ,SPI1_NSS/I2S1_WS             ,SPI3_NSS/I2S3_WS                       ,USART2_CK              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,              ,                ,              ,SPI1_SCK/I2S1_CK             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1      ,                ,              ,SPI1_MISO                    ,I2S2_MCK                               ,                       ,         ,         ,           ,    ,SDIO_CMD,    ,    ,EVENTOUT,ADC1_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2      ,                ,              ,SPI1_MOSI/I2S1_SD            ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN7
+PortA,PA8 ,MCO_1        ,TIM1_CH1         ,              ,                ,I2C3_SCL      ,                             ,                                       ,USART1_CK              ,         ,         ,USB_FS_SOF ,    ,SDIO_D1 ,    ,    ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,              ,                ,I2C3_SMBA     ,                             ,                                       ,USART1_TX              ,         ,         ,USB_FS_VBUS,    ,SDIO_D2 ,    ,    ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,              ,                ,              ,                             ,SPI5_MOSI/I2S5_SD                      ,USART1_RX              ,         ,         ,USB_FS_ID  ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,              ,                ,              ,                             ,SPI4_MISO                              ,USART1_CTS             ,USART6_TX,         ,USB_FS_DM  ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,              ,                ,              ,                             ,SPI5_MISO                              ,USART1_RTS             ,USART6_RX,         ,USB_FS_DP  ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,              ,                ,              ,SPI1_NSS/I2S1_WS             ,SPI3_NSS/I2S3_WS                       ,USART1_TX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3      ,                ,              ,                             ,SPI5_SCK/I2S5_CK                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4      ,                ,              ,                             ,SPI5_NSS/I2S5_WS                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN9
+PortB,PB2 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,              ,                ,              ,SPI1_SCK/I2S1_CK             ,SPI3_SCK/I2S3_CK                       ,USART1_RX              ,         ,I2C2_SDA ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB4 ,JTRST        ,                 ,TIM3_CH1      ,                ,              ,SPI1_MISO                    ,SPI3_MISO                              ,I2S3ext_SD             ,         ,I2C3_SDA ,           ,    ,SDIO_D0 ,    ,    ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2      ,                ,I2C1_SMBA     ,SPI1_MOSI/I2S1_SD            ,SPI3_MOSI/I2S3_SD                      ,                       ,         ,         ,           ,    ,SDIO_D3 ,    ,    ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1      ,                ,I2C1_SCL      ,                             ,                                       ,USART1_TX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2      ,                ,I2C1_SDA      ,                             ,                                       ,USART1_RX              ,         ,         ,           ,    ,SDIO_D0 ,    ,    ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3      ,TIM10_CH1       ,I2C1_SCL      ,                             ,SPI5_MOSI/I2S5_SD                      ,                       ,         ,I2C3_SDA ,           ,    ,SDIO_D4 ,    ,    ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4      ,TIM11_CH1       ,I2C1_SDA      ,SPI2_NSS/I2S2_WS             ,                                       ,                       ,         ,I2C2_SDA ,           ,    ,SDIO_D5 ,    ,    ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,              ,                ,I2C2_SCL      ,SPI2_SCK/I2S2_CK             ,I2S3_MCK                               ,                       ,         ,         ,           ,    ,SDIO_D7 ,    ,    ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,              ,                ,I2C2_SDA      ,I2S2_CKIN                    ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,              ,                ,I2C2_SMBA     ,SPI2_NSS/I2S2_WS             ,SPI4_NSS/I2S4_WS                       ,SPI3_SCK/I2S3_CK       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,              ,                ,              ,SPI2_SCK/I2S2_CK             ,SPI4_SCK/I2S4_CK                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,              ,                ,              ,SPI2_MISO                    ,I2S2ext_SD                             ,                       ,         ,         ,           ,    ,SDIO_D6 ,    ,    ,EVENTOUT,
+PortB,PB15,RTC_50Hz     ,TIM1_CH3N        ,              ,                ,              ,SPI2_MOSI/I2S2_SD            ,                                       ,                       ,         ,         ,           ,    ,SDIO_CK ,    ,    ,EVENTOUT,
+PortC,PC0 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN10
+PortC,PC1 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN11
+PortC,PC2 ,             ,                 ,              ,                ,              ,SPI2_MISO                    ,I2S2ext_SD                             ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN12
+PortC,PC3 ,             ,                 ,              ,                ,              ,SPI2_MOSI/I2S2_SD            ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN13
+PortC,PC4 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN14
+PortC,PC5 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,ADC1_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1      ,                ,              ,I2S2_MCK                     ,                                       ,                       ,USART6_TX,         ,           ,    ,SDIO_D6 ,    ,    ,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2      ,                ,              ,SPI2_SCK/I2S2_CK             ,I2S3_MCK                               ,                       ,USART6_RX,         ,           ,    ,SDIO_D7 ,    ,    ,EVENTOUT,
+PortC,PC8 ,             ,                 ,TIM3_CH3      ,                ,              ,                             ,                                       ,                       ,USART6_CK,         ,           ,    ,SDIO_D0 ,    ,    ,EVENTOUT,
+PortC,PC9 ,MCO_2        ,                 ,TIM3_CH4      ,                ,I2C3_SDA      ,I2S2_CKIN                    ,                                       ,                       ,         ,         ,           ,    ,SDIO_D1 ,    ,    ,EVENTOUT,
+PortC,PC10,             ,                 ,              ,                ,              ,                             ,SPI3_SCK/I2S3_CK                       ,                       ,         ,         ,           ,    ,SDIO_D2 ,    ,    ,EVENTOUT,
+PortC,PC11,             ,                 ,              ,                ,              ,I2S3ext_SD                   ,SPI3_MISO                              ,                       ,         ,         ,           ,    ,SDIO_D3 ,    ,    ,EVENTOUT,
+PortC,PC12,             ,                 ,              ,                ,              ,                             ,SPI3_MOSI/I2S3_SD                      ,                       ,         ,         ,           ,    ,SDIO_CK ,    ,    ,EVENTOUT,
+PortC,PC13,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortC,PC14,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortC,PC15,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD0 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD1 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR      ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,SDIO_CMD,    ,    ,EVENTOUT,
+PortD,PD3 ,             ,                 ,              ,                ,              ,SPI2_SCK/I2S2_CK             ,                                       ,USART2_CTS             ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD4 ,             ,                 ,              ,                ,              ,                             ,                                       ,USART2_RTS             ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD5 ,             ,                 ,              ,                ,              ,                             ,                                       ,USART2_TX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD6 ,             ,                 ,              ,                ,              ,SPI3_MOSI/I2S3_SD            ,                                       ,USART2_RX              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD7 ,             ,                 ,              ,                ,              ,                             ,                                       ,USART2_CK              ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD8 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD9 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD10,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD11,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1      ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2      ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3      ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4      ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR      ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE1 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,              ,                ,              ,SPI4_SCK/I2S4_CK             ,SPI5_SCK/I2S5_CK                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,              ,                ,              ,SPI4_NSS/I2S4_WS             ,SPI5_NSS/I2S5_WS                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,              ,TIM9_CH1        ,              ,SPI4_MISO                    ,SPI5_MISO                              ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,              ,TIM9_CH2        ,              ,SPI4_MOSI/I2S4_SD            ,SPI5_MOSI/I2S5_SD                      ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,              ,                ,              ,SPI4_NSS/I2S4_WS             ,SPI5_NSS/I2S5_WS                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,              ,                ,              ,SPI4_SCK/I2S4_CK             ,SPI5_SCK/I2S5_CK                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,              ,                ,              ,SPI4_MISO                    ,SPI5_MISO                              ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,              ,                ,              ,SPI4_MOSI/I2S4_SD            ,SPI5_MOSI/I2S5_SD                      ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortH,PH0 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
+PortH,PH1 ,             ,                 ,              ,                ,              ,                             ,                                       ,                       ,         ,         ,           ,    ,        ,    ,    ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f412_af.csv b/ports/stm32/boards/stm32f412_af.csv
index 90eb3d1df6..b6281c1e42 100644
--- a/ports/stm32/boards/stm32f412_af.csv
+++ b/ports/stm32/boards/stm32f412_af.csv
@@ -1,116 +1,116 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS_AF,TIM1/TIM2,TIM3/TIM4/TIM5,TIM8/9/10/11,I2C1/2/3/I2CFMP1,SPI1/2/3/4/I2S1/2/3/4,SPI2/3/4/5/I2S2/3/4/5/DFSDM1/2,SPI3/I2S3/USART1/2/3,USART3/6/CAN1/DFSDM1,I2C2/I2C3/I2CFMP1/CAN1/2/TIM12/13/14/QUADSPI,DFSDM1/QUADSPI/FSMC/OTG1_FS,,FSMC /SDIO,,,SYS_AF,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,,,,,,,,EVENTOUT,ADC1_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,SPI4_MOSI/I2S4_SD,,USART2_RTS,,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC1_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,I2S2_CKIN,,USART2_TX,,,,,FSMC_D4,,,EVENTOUT,ADC1_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,I2S2_MCK,,USART2_RX,,,,,FSMC_D5,,,EVENTOUT,ADC1_IN3
-PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,DFSDM1_DATIN1,,,,FSMC_D6,,,EVENTOUT,ADC1_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,DFSDM1_CKIN1,,,,FSMC_D7,,,EVENTOUT,ADC1_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,I2S2_MCK,,,TIM13_CH1,QUADSPI_BK2_IO0,,SDIO_CMD,,,EVENTOUT,ADC1_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,QUADSPI_BK2_IO1,,,,,EVENTOUT,ADC1_IN7
-PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,DFSDM1_CKOUT,USART1_CK,,,USB_FS_SOF,,SDIO_D1,,,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,USB_FS_VBUS,,SDIO_D2,,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,SPI2_MOSI/I2S2_SD,SPI5_MOSI/I2S5_SD,USART1_RX,,,USB_FS_ID,,,,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,SPI2_NSS/I2S2_WS,SPI4_MISO,USART1_CTS,USART6_TX,CAN1_RX,USB_FS_DM,,,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,SPI2_MISO,SPI5_MISO,USART1_RTS,USART6_RX,CAN1_TX,USB_FS_DP,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART1_TX,,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,ADC1_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,SPI5_NSS/I2S5_WS,,DFSDM1_DATIN0,QUADSPI_CLK,,,,,,EVENTOUT,ADC1_IN9
-PortB,PB2,,,,,,,DFSDM1_CKIN0,,,QUADSPI_CLK,,,,,,EVENTOUT,
-PortB,PB3,JTDO,TIM2_CH2,,,I2CFMP1_SDA,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,USART1_RX,UART7_RX,I2C2_SDA,,,,,,EVENTOUT,
-PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,UART7_TX,I2C3_SDA,,,SDIO_D0,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,,,SDIO_D3,,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,DFSDM2_CKIN7,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,SDIO_D0,,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,DFSDM2_DATIN7,USART1_RX,,,,,FSMC_NL,,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,SPI5_MOSI/I2S5_SD,,CAN1_RX,I2C3_SDA,,,SDIO_D4,,,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,DFSDM2_DATIN1,,CAN1_TX,I2C2_SDA,,,SDIO_D5,,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,I2S3_MCK,USART3_TX,,I2CFMP4_SCL,,,SDIO_D7,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,I2S2_CKIN,,USART3_RX,,,,,,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,SPI4_NSS/I2S4_WS,SPI3_SCK/I2S3_CK,USART3__CK,CAN2_RX,DFSDM1_DATIN1,,FSMC_D13/FSMC_DA13,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,I2CFMP1_SMBA,SPI2_SCK/I2S2_CK,SPI4_SCK/I2S4_CK,,USART3_CTS,CAN2_TX,DFSDM1_CKIN1,,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,I2CFMP1_SDA,SPI2_MISO,I2S2ext_SD,USART3_RTS,DFSDM1_DATIN2,TIM12_CH1,FSMC_D0,,SDIO_D6,,,EVENTOUT,
-PortB,PB15,RTC_50HZ,TIM1_CH3N,,TIM8_CH3N,I2CFMP1_SCL,SPI2_MOSI/I2S2_SD,,,DFSDM1_CKIN2,TIM12_CH2,,,SDIO_CK,,,EVENTOUT,
-PortC,PC0,,,,,,,,SAI1_MCLK_B,,,,,,,,EVENTOUT,ADC1_IN10
-PortC,PC1,,,,,,,,SAI1_SD_B,,,,,,,,EVENTOUT,ADC1_IN11
-PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,SAI1_SCK_B,DFSDM1_CKOUT,,,,FSMC_NWE,,,EVENTOUT,ADC1_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,SAI1_FS_B,,,,,FSMC_A0,,,EVENTOUT,ADC1_IN13
-PortC,PC4,,,,,,I2S1_MCK,,,,,QUADSPI_BK2_IO2,,FSMC_NE4,,,EVENTOUT,ADC1_IN14
-PortC,PC5,,,,,I2CFMP1_SMBA,,,USART3_RX,,,QUADSPI_BK2_IO3,,FSMC_NOE,,,EVENTOUT,ADC1_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,2CFMP1_SCL,I2S2_MCK,DFSDM1_CKIN3,,USART6_TX,,FSMC_D1,,SDIO_D6,,,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,I2CFMP1_SDA,SPI2_SCK/I2S2_CK,I2S3_MCK,,USART6_RX,,DFSDM1_DATIN3,,SDIO_D7,,,EVENTOUT,
-PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,QUADSPI_BK1_IO2,,,SDIO_D0,,,EVENTOUT,
-PortC,PC9,MCO_2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S2_CKIN,,,,QUADSPI_BK1_IO0,,,SDIO_D1,,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,,QUADSPI_BK1_IO1,,,SDIO_D2,,,EVENTOUT,
-PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,,QUADSPI_BK2_NCS,FSMC_D2,,SDIO_D3,,,EVENTOUT,
-PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,,,FSMC_D3,,SDIO_CK,,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,CAN1_RX,,,FSMC_D2/FSMC_DA2,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,CAN1_TX,,,FSMC_D3/FSMC_DA3,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,,,,,,,,FSMC_NWE,,SDIO_CMD,,,EVENTOUT,
-PortD,PD3,TRACED1,,,,,SPI2_SCK/I2S2_CK,DFSDM1_DATIN0,USART2_CTS,,QUADSPI_CLK,,,FSMC_CLK,,,EVENTOUT,
-PortD,PD4,,,,,,,DFSDM1_CKIN0,USART2_RTS,,,,,FSMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FSMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,DFSDM1_DATIN1,USART2_RX,,,,,FSMC_NWAIT,,,EVENTOUT,
-PortD,PD7,,,,,,,DFSDM1_CKIN1,USART2_CK,,,,,FSMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FSMC_D13/FSMC_DA13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FSMC_D14/FSMC_DA14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,FSMC_D15/FSMC_DA15,,,EVENTOUT,
-PortD,PD11,,,,,I2CFMP1_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,,,FSMC_A16,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,I2CFMP1_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,,,FSMC_A17,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,I2CFMP1_SDA,,,,,QUADSPI_BK1_IO3,,,FSMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,I2CFMP1_SCL,,,,,,,,FSMC_D0/FSMC_DA0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,I2CFMP1_SDA,,,,,,,,FSMC_D1/FSMC_DA1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,,,,,,,,,,FSMC_NBL0,,,EVENTOUT,
-PortE,PE1,,,,,,,,,,,,,FSMC_NBL1,,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,SAI1_MCLK_A,,QUADSPI_BK1_IO2,,,FSMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,,SAI1_SD_B,,,,,FSMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,SAI1_SD_A,DFSDM1_DATIN3,,,,FSMC_A20,,,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SPI5_MISO,SAI1_SCK_A,DFSDM1_CKIN3,,,,FSMC_A21,,,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,SAI1_FS_A,,,,,FSMC_A22,,,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,DFSDM1_DATIN2,,,,QUADSPI_BK2_IO0,,FSMC_D4/FSMC_DA4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,DFSDM1_CKIN2,,,,QUADSPI_BK2_IO1,,FSMC_D5/FSMC_DA5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,DFSDM1_CKOUT,,,,QUADSPI_BK2_IO2,,FSMC_D6/FSMC_DA6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,,,QUADSPI_BK2_IO3,,FSMC_D7/FSMC_DA7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,FSMC_D8/FSMC_DA8,,,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,FSMC_D9/FSMC_DA9,,,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,SPI5_MISO,,,,,,FSMC_D10/FSMC_DA10,,,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,FSMC_D11/FSMC_DA11,,,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FSMC_D12/FSMC_DA12,,,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FSMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FSMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FSMC_A2,,,EVENTOUT,
-PortF,PF3,,,TIM5_CH1,,,,,,,,,,FSMC_A3,,,EVENTOUT,
-PortF,PF4,,,TIM5_CH2,,,,,,,,,,FSMC_A4,,,EVENTOUT,
-PortF,PF5,,,TIM5_CH3,,,,,,,,,,FSMC_A5,,,EVENTOUT,
-PortF,PF6,TRACED0,,,TIM10_CH1,,,,SAI1_SD_B,,QUADSPI_BK1_IO3,,,,,,EVENTOUT,
-PortF,PF7,TRACED1,,,TIM11_CH1,,,,SAI1_MCLK_B,,QUADSPI_BK1_IO2,,,,,,EVENTOUT,
-PortF,PF8,,,,,,,,SAI1_SCK_B,,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,
-PortF,PF9,,,,,,,,SAI1_FS_B,,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,
-PortF,PF10,,TIM1_ETR,TIM5_CH4,,,,,,,,,,,,,EVENTOUT,
-PortF,PF11,,,,TIM8_ETR,,,,,,,,,,,,EVENTOUT,
-PortF,PF12,,,,TIM8_BKIN,,,,,,,,,FSMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,I2CFMP1_SMBA,,,,,,,,FSMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,I2CFMP1_SCL,,,,,,,,FSMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,I2CFMP1_SDA,,,,,,,,FSMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,CAN1_RX,,,FSMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,CAN1_TX,,,FSMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FSMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FSMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FSMC_A14,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FSMC_A15,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,QUADSPI_BK1_NCS,,,,,EVENTOUT,
-PortG,PG7,,,,,,,,,USART6_CK,,,,,,,EVENTOUT,
-PortG,PG8,,,,,,,,,USART6_RTS,,,,,,,EVENTOUT,
-PortG,PG9,,,,,,,,,USART6_RX,QUADSPI_BK2_IO2,,,FSMC_NE2,,,EVENTOUT,
-PortG,PG10,,,,,,,,,,,,,FSMC_NE3,,,EVENTOUT,
-PortG,PG11,,,,,,,,,,CAN2_RX,,,,,,EVENTOUT,
-PortG,PG12,,,,,,,,,USART6_RTS,CAN2_TX,,,FSMC_NE4,,,EVENTOUT,
-PortG,PG13,TRACED2,,,,,,,,USART6_CTS,,,,FSMC_A24,,,EVENTOUT,
-PortG,PG14,TRACED3,,,,,,,,USART6_TX,QUADSPI_BK2_IO3,,,FSMC_A25,,,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,,,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0       ,AF1              ,AF2           ,AF3         ,AF4             ,AF5                  ,AF6                           ,AF7                 ,AF8                 ,AF9                                         ,AF10                       ,AF11,AF12              ,AF13,AF14,AF15    ,ADC
+     ,    ,SYS_AF    ,TIM1/TIM2        ,TIM3/TIM4/TIM5,TIM8/9/10/11,I2C1/2/3/I2CFMP1,SPI1/2/3/4/I2S1/2/3/4,SPI2/3/4/5/I2S2/3/4/5/DFSDM1/2,SPI3/I2S3/USART1/2/3,USART3/6/CAN1/DFSDM1,I2C2/I2C3/I2CFMP1/CAN1/2/TIM12/13/14/QUADSPI,DFSDM1/QUADSPI/FSMC/OTG1_FS,    ,FSMC /SDIO        ,    ,    ,SYS_AF  ,ADC
+PortA,PA0 ,          ,TIM2_CH1/TIM2_ETR,TIM5_CH1      ,TIM8_ETR    ,                ,                     ,                              ,USART2_CTS          ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,ADC1_IN0
+PortA,PA1 ,          ,TIM2_CH2         ,TIM5_CH2      ,            ,                ,SPI4_MOSI/I2S4_SD    ,                              ,USART2_RTS          ,                    ,QUADSPI_BK1_IO3                             ,                           ,    ,                  ,    ,    ,EVENTOUT,ADC1_IN1
+PortA,PA2 ,          ,TIM2_CH3         ,TIM5_CH3      ,TIM9_CH1    ,                ,I2S2_CKIN            ,                              ,USART2_TX           ,                    ,                                            ,                           ,    ,FSMC_D4           ,    ,    ,EVENTOUT,ADC1_IN2
+PortA,PA3 ,          ,TIM2_CH4         ,TIM5_CH4      ,TIM9_CH2    ,                ,I2S2_MCK             ,                              ,USART2_RX           ,                    ,                                            ,                           ,    ,FSMC_D5           ,    ,    ,EVENTOUT,ADC1_IN3
+PortA,PA4 ,          ,                 ,              ,            ,                ,SPI1_NSS/I2S1_WS     ,SPI3_NSS/I2S3_WS              ,USART2_CK           ,DFSDM1_DATIN1       ,                                            ,                           ,    ,FSMC_D6           ,    ,    ,EVENTOUT,ADC1_IN4
+PortA,PA5 ,          ,TIM2_CH1/TIM2_ETR,              ,TIM8_CH1N   ,                ,SPI1_SCK/I2S1_CK     ,                              ,                    ,DFSDM1_CKIN1        ,                                            ,                           ,    ,FSMC_D7           ,    ,    ,EVENTOUT,ADC1_IN5
+PortA,PA6 ,          ,TIM1_BKIN        ,TIM3_CH1      ,TIM8_BKIN   ,                ,SPI1_MISO            ,I2S2_MCK                      ,                    ,                    ,TIM13_CH1                                   ,QUADSPI_BK2_IO0            ,    ,SDIO_CMD          ,    ,    ,EVENTOUT,ADC1_IN6
+PortA,PA7 ,          ,TIM1_CH1N        ,TIM3_CH2      ,TIM8_CH1N   ,                ,SPI1_MOSI/I2S1_SD    ,                              ,                    ,                    ,TIM14_CH1                                   ,QUADSPI_BK2_IO1            ,    ,                  ,    ,    ,EVENTOUT,ADC1_IN7
+PortA,PA8 ,MCO_1     ,TIM1_CH1         ,              ,            ,I2C3_SCL        ,                     ,DFSDM1_CKOUT                  ,USART1_CK           ,                    ,                                            ,USB_FS_SOF                 ,    ,SDIO_D1           ,    ,    ,EVENTOUT,
+PortA,PA9 ,          ,TIM1_CH2         ,              ,            ,I2C3_SMBA       ,SPI2_SCK/I2S2_CK     ,                              ,USART1_TX           ,                    ,                                            ,USB_FS_VBUS                ,    ,SDIO_D2           ,    ,    ,EVENTOUT,
+PortA,PA10,          ,TIM1_CH3         ,              ,            ,                ,SPI2_MOSI/I2S2_SD    ,SPI5_MOSI/I2S5_SD             ,USART1_RX           ,                    ,                                            ,USB_FS_ID                  ,    ,                  ,    ,    ,EVENTOUT,
+PortA,PA11,          ,TIM1_CH4         ,              ,            ,                ,SPI2_NSS/I2S2_WS     ,SPI4_MISO                     ,USART1_CTS          ,USART6_TX           ,CAN1_RX                                     ,USB_FS_DM                  ,    ,                  ,    ,    ,EVENTOUT,
+PortA,PA12,          ,TIM1_ETR         ,              ,            ,                ,SPI2_MISO            ,SPI5_MISO                     ,USART1_RTS          ,USART6_RX           ,CAN1_TX                                     ,USB_FS_DP                  ,    ,                  ,    ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortA,PA15,JTDI      ,TIM2_CH1/TIM2_ETR,              ,            ,                ,SPI1_NSS/I2S1_WS     ,SPI3_NSS/I2S3_WS              ,USART1_TX           ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortB,PB0 ,          ,TIM1_CH2N        ,TIM3_CH3      ,TIM8_CH2N   ,                ,                     ,SPI5_SCK/I2S5_CK              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,ADC1_IN8
+PortB,PB1 ,          ,TIM1_CH3N        ,TIM3_CH4      ,TIM8_CH3N   ,                ,                     ,SPI5_NSS/I2S5_WS              ,                    ,DFSDM1_DATIN0       ,QUADSPI_CLK                                 ,                           ,    ,                  ,    ,    ,EVENTOUT,ADC1_IN9
+PortB,PB2 ,          ,                 ,              ,            ,                ,                     ,DFSDM1_CKIN0                  ,                    ,                    ,QUADSPI_CLK                                 ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortB,PB3 ,JTDO      ,TIM2_CH2         ,              ,            ,I2CFMP1_SDA     ,SPI1_SCK/I2S1_CK     ,SPI3_SCK/I2S3_CK              ,USART1_RX           ,UART7_RX            ,I2C2_SDA                                    ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortB,PB4 ,JTRST     ,                 ,TIM3_CH1      ,            ,                ,SPI1_MISO            ,SPI3_MISO                     ,I2S3ext_SD          ,UART7_TX            ,I2C3_SDA                                    ,                           ,    ,SDIO_D0           ,    ,    ,EVENTOUT,
+PortB,PB5 ,          ,                 ,TIM3_CH2      ,            ,I2C1_SMBA       ,SPI1_MOSI/I2S1_SD    ,SPI3_MOSI/I2S3_SD             ,                    ,                    ,CAN2_RX                                     ,                           ,    ,SDIO_D3           ,    ,    ,EVENTOUT,
+PortB,PB6 ,          ,                 ,TIM4_CH1      ,            ,I2C1_SCL        ,                     ,DFSDM2_CKIN7                  ,USART1_TX           ,                    ,CAN2_TX                                     ,QUADSPI_BK1_NCS            ,    ,SDIO_D0           ,    ,    ,EVENTOUT,
+PortB,PB7 ,          ,                 ,TIM4_CH2      ,            ,I2C1_SDA        ,                     ,DFSDM2_DATIN7                 ,USART1_RX           ,                    ,                                            ,                           ,    ,FSMC_NL           ,    ,    ,EVENTOUT,
+PortB,PB8 ,          ,                 ,TIM4_CH3      ,TIM10_CH1   ,I2C1_SCL        ,                     ,SPI5_MOSI/I2S5_SD             ,                    ,CAN1_RX             ,I2C3_SDA                                    ,                           ,    ,SDIO_D4           ,    ,    ,EVENTOUT,
+PortB,PB9 ,          ,                 ,TIM4_CH4      ,TIM11_CH1   ,I2C1_SDA        ,SPI2_NSS/I2S2_WS     ,DFSDM2_DATIN1                 ,                    ,CAN1_TX             ,I2C2_SDA                                    ,                           ,    ,SDIO_D5           ,    ,    ,EVENTOUT,
+PortB,PB10,          ,TIM2_CH3         ,              ,            ,I2C2_SCL        ,SPI2_SCK/I2S2_CK     ,I2S3_MCK                      ,USART3_TX           ,                    ,I2CFMP4_SCL                                 ,                           ,    ,SDIO_D7           ,    ,    ,EVENTOUT,
+PortB,PB11,          ,TIM2_CH4         ,              ,            ,I2C2_SDA        ,I2S2_CKIN            ,                              ,USART3_RX           ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortB,PB12,          ,TIM1_BKIN        ,              ,            ,I2C2_SMBA       ,SPI2_NSS/I2S2_WS     ,SPI4_NSS/I2S4_WS              ,SPI3_SCK/I2S3_CK    ,USART3__CK          ,CAN2_RX                                     ,DFSDM1_DATIN1              ,    ,FSMC_D13/FSMC_DA13,    ,    ,EVENTOUT,
+PortB,PB13,          ,TIM1_CH1N        ,              ,            ,I2CFMP1_SMBA    ,SPI2_SCK/I2S2_CK     ,SPI4_SCK/I2S4_CK              ,                    ,USART3_CTS          ,CAN2_TX                                     ,DFSDM1_CKIN1               ,    ,                  ,    ,    ,EVENTOUT,
+PortB,PB14,          ,TIM1_CH2N        ,              ,TIM8_CH2N   ,I2CFMP1_SDA     ,SPI2_MISO            ,I2S2ext_SD                    ,USART3_RTS          ,DFSDM1_DATIN2       ,TIM12_CH1                                   ,FSMC_D0                    ,    ,SDIO_D6           ,    ,    ,EVENTOUT,
+PortB,PB15,RTC_50HZ  ,TIM1_CH3N        ,              ,TIM8_CH3N   ,I2CFMP1_SCL     ,SPI2_MOSI/I2S2_SD    ,                              ,                    ,DFSDM1_CKIN2        ,TIM12_CH2                                   ,                           ,    ,SDIO_CK           ,    ,    ,EVENTOUT,
+PortC,PC0 ,          ,                 ,              ,            ,                ,                     ,                              ,SAI1_MCLK_B         ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,ADC1_IN10
+PortC,PC1 ,          ,                 ,              ,            ,                ,                     ,                              ,SAI1_SD_B           ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,ADC1_IN11
+PortC,PC2 ,          ,                 ,              ,            ,                ,SPI2_MISO            ,I2S2ext_SD                    ,SAI1_SCK_B          ,DFSDM1_CKOUT        ,                                            ,                           ,    ,FSMC_NWE          ,    ,    ,EVENTOUT,ADC1_IN12
+PortC,PC3 ,          ,                 ,              ,            ,                ,SPI2_MOSI/I2S2_SD    ,                              ,SAI1_FS_B           ,                    ,                                            ,                           ,    ,FSMC_A0           ,    ,    ,EVENTOUT,ADC1_IN13
+PortC,PC4 ,          ,                 ,              ,            ,                ,I2S1_MCK             ,                              ,                    ,                    ,                                            ,QUADSPI_BK2_IO2            ,    ,FSMC_NE4          ,    ,    ,EVENTOUT,ADC1_IN14
+PortC,PC5 ,          ,                 ,              ,            ,I2CFMP1_SMBA    ,                     ,                              ,USART3_RX           ,                    ,                                            ,QUADSPI_BK2_IO3            ,    ,FSMC_NOE          ,    ,    ,EVENTOUT,ADC1_IN15
+PortC,PC6 ,          ,                 ,TIM3_CH1      ,TIM8_CH1    ,2CFMP1_SCL      ,I2S2_MCK             ,DFSDM1_CKIN3                  ,                    ,USART6_TX           ,                                            ,FSMC_D1                    ,    ,SDIO_D6           ,    ,    ,EVENTOUT,
+PortC,PC7 ,          ,                 ,TIM3_CH2      ,TIM8_CH2    ,I2CFMP1_SDA     ,SPI2_SCK/I2S2_CK     ,I2S3_MCK                      ,                    ,USART6_RX           ,                                            ,DFSDM1_DATIN3              ,    ,SDIO_D7           ,    ,    ,EVENTOUT,
+PortC,PC8 ,          ,                 ,TIM3_CH3      ,TIM8_CH3    ,                ,                     ,                              ,                    ,USART6_CK           ,QUADSPI_BK1_IO2                             ,                           ,    ,SDIO_D0           ,    ,    ,EVENTOUT,
+PortC,PC9 ,MCO_2     ,                 ,TIM3_CH4      ,TIM8_CH4    ,I2C3_SDA        ,I2S2_CKIN            ,                              ,                    ,                    ,QUADSPI_BK1_IO0                             ,                           ,    ,SDIO_D1           ,    ,    ,EVENTOUT,
+PortC,PC10,          ,                 ,              ,            ,                ,                     ,SPI3_SCK/I2S3_CK              ,USART3_TX           ,                    ,QUADSPI_BK1_IO1                             ,                           ,    ,SDIO_D2           ,    ,    ,EVENTOUT,
+PortC,PC11,          ,                 ,              ,            ,                ,I2S3ext_SD           ,SPI3_MISO                     ,USART3_RX           ,                    ,QUADSPI_BK2_NCS                             ,FSMC_D2                    ,    ,SDIO_D3           ,    ,    ,EVENTOUT,
+PortC,PC12,          ,                 ,              ,            ,                ,                     ,SPI3_MOSI/I2S3_SD             ,USART3_CK           ,                    ,                                            ,FSMC_D3                    ,    ,SDIO_CK           ,    ,    ,EVENTOUT,
+PortC,PC13,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortC,PC14,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortC,PC15,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortD,PD0 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,CAN1_RX                                     ,                           ,    ,FSMC_D2/FSMC_DA2  ,    ,    ,EVENTOUT,
+PortD,PD1 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,CAN1_TX                                     ,                           ,    ,FSMC_D3/FSMC_DA3  ,    ,    ,EVENTOUT,
+PortD,PD2 ,          ,                 ,TIM3_ETR      ,            ,                ,                     ,                              ,                    ,                    ,                                            ,FSMC_NWE                   ,    ,SDIO_CMD          ,    ,    ,EVENTOUT,
+PortD,PD3 ,TRACED1   ,                 ,              ,            ,                ,SPI2_SCK/I2S2_CK     ,DFSDM1_DATIN0                 ,USART2_CTS          ,                    ,QUADSPI_CLK                                 ,                           ,    ,FSMC_CLK          ,    ,    ,EVENTOUT,
+PortD,PD4 ,          ,                 ,              ,            ,                ,                     ,DFSDM1_CKIN0                  ,USART2_RTS          ,                    ,                                            ,                           ,    ,FSMC_NOE          ,    ,    ,EVENTOUT,
+PortD,PD5 ,          ,                 ,              ,            ,                ,                     ,                              ,USART2_TX           ,                    ,                                            ,                           ,    ,FSMC_NWE          ,    ,    ,EVENTOUT,
+PortD,PD6 ,          ,                 ,              ,            ,                ,SPI3_MOSI/I2S3_SD    ,DFSDM1_DATIN1                 ,USART2_RX           ,                    ,                                            ,                           ,    ,FSMC_NWAIT        ,    ,    ,EVENTOUT,
+PortD,PD7 ,          ,                 ,              ,            ,                ,                     ,DFSDM1_CKIN1                  ,USART2_CK           ,                    ,                                            ,                           ,    ,FSMC_NE1          ,    ,    ,EVENTOUT,
+PortD,PD8 ,          ,                 ,              ,            ,                ,                     ,                              ,USART3_TX           ,                    ,                                            ,                           ,    ,FSMC_D13/FSMC_DA13,    ,    ,EVENTOUT,
+PortD,PD9 ,          ,                 ,              ,            ,                ,                     ,                              ,USART3_RX           ,                    ,                                            ,                           ,    ,FSMC_D14/FSMC_DA14,    ,    ,EVENTOUT,
+PortD,PD10,          ,                 ,              ,            ,                ,                     ,                              ,USART3_CK           ,                    ,                                            ,                           ,    ,FSMC_D15/FSMC_DA15,    ,    ,EVENTOUT,
+PortD,PD11,          ,                 ,              ,            ,I2CFMP1_SMBA    ,                     ,                              ,USART3_CTS          ,                    ,QUADSPI_BK1_IO0                             ,                           ,    ,FSMC_A16          ,    ,    ,EVENTOUT,
+PortD,PD12,          ,                 ,TIM4_CH1      ,            ,I2CFMP1_SCL     ,                     ,                              ,USART3_RTS          ,                    ,QUADSPI_BK1_IO1                             ,                           ,    ,FSMC_A17          ,    ,    ,EVENTOUT,
+PortD,PD13,          ,                 ,TIM4_CH2      ,            ,I2CFMP1_SDA     ,                     ,                              ,                    ,                    ,QUADSPI_BK1_IO3                             ,                           ,    ,FSMC_A18          ,    ,    ,EVENTOUT,
+PortD,PD14,          ,                 ,TIM4_CH3      ,            ,I2CFMP1_SCL     ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_D0/FSMC_DA0  ,    ,    ,EVENTOUT,
+PortD,PD15,          ,                 ,TIM4_CH4      ,            ,I2CFMP1_SDA     ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_D1/FSMC_DA1  ,    ,    ,EVENTOUT,
+PortE,PE0 ,          ,                 ,TIM4_ETR      ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_NBL0         ,    ,    ,EVENTOUT,
+PortE,PE1 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_NBL1         ,    ,    ,EVENTOUT,
+PortE,PE2 ,TRACECLK  ,                 ,              ,            ,                ,SPI4_SCK/I2S4_CK     ,SPI5_SCK/I2S5_CK              ,SAI1_MCLK_A         ,                    ,QUADSPI_BK1_IO2                             ,                           ,    ,FSMC_A23          ,    ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0   ,                 ,              ,            ,                ,                     ,                              ,SAI1_SD_B           ,                    ,                                            ,                           ,    ,FSMC_A19          ,    ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1   ,                 ,              ,            ,                ,SPI4_NSS/I2S4_WS     ,SPI5_NSS/I2S5_WS              ,SAI1_SD_A           ,DFSDM1_DATIN3       ,                                            ,                           ,    ,FSMC_A20          ,    ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2   ,                 ,              ,TIM9_CH1    ,                ,SPI4_MISO            ,SPI5_MISO                     ,SAI1_SCK_A          ,DFSDM1_CKIN3        ,                                            ,                           ,    ,FSMC_A21          ,    ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3   ,                 ,              ,TIM9_CH2    ,                ,SPI4_MOSI/I2S4_SD    ,SPI5_MOSI/I2S5_SD             ,SAI1_FS_A           ,                    ,                                            ,                           ,    ,FSMC_A22          ,    ,    ,EVENTOUT,
+PortE,PE7 ,          ,TIM1_ETR         ,              ,            ,                ,                     ,DFSDM1_DATIN2                 ,                    ,                    ,                                            ,QUADSPI_BK2_IO0            ,    ,FSMC_D4/FSMC_DA4  ,    ,    ,EVENTOUT,
+PortE,PE8 ,          ,TIM1_CH1N        ,              ,            ,                ,                     ,DFSDM1_CKIN2                  ,                    ,                    ,                                            ,QUADSPI_BK2_IO1            ,    ,FSMC_D5/FSMC_DA5  ,    ,    ,EVENTOUT,
+PortE,PE9 ,          ,TIM1_CH1         ,              ,            ,                ,                     ,DFSDM1_CKOUT                  ,                    ,                    ,                                            ,QUADSPI_BK2_IO2            ,    ,FSMC_D6/FSMC_DA6  ,    ,    ,EVENTOUT,
+PortE,PE10,          ,TIM1_CH2N        ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,QUADSPI_BK2_IO3            ,    ,FSMC_D7/FSMC_DA7  ,    ,    ,EVENTOUT,
+PortE,PE11,          ,TIM1_CH2         ,              ,            ,                ,SPI4_NSS/I2S4_WS     ,SPI5_NSS/I2S5_WS              ,                    ,                    ,                                            ,                           ,    ,FSMC_D8/FSMC_DA8  ,    ,    ,EVENTOUT,
+PortE,PE12,          ,TIM1_CH3N        ,              ,            ,                ,SPI4_SCK/I2S4_CK     ,SPI5_SCK/I2S5_CK              ,                    ,                    ,                                            ,                           ,    ,FSMC_D9/FSMC_DA9  ,    ,    ,EVENTOUT,
+PortE,PE13,          ,TIM1_CH3         ,              ,            ,                ,SPI4_MISO            ,SPI5_MISO                     ,                    ,                    ,                                            ,                           ,    ,FSMC_D10/FSMC_DA10,    ,    ,EVENTOUT,
+PortE,PE14,          ,TIM1_CH4         ,              ,            ,                ,SPI4_MOSI/I2S4_SD    ,SPI5_MOSI/I2S5_SD             ,                    ,                    ,                                            ,                           ,    ,FSMC_D11/FSMC_DA11,    ,    ,EVENTOUT,
+PortE,PE15,          ,TIM1_BKIN        ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_D12/FSMC_DA12,    ,    ,EVENTOUT,
+PortF,PF0 ,          ,                 ,              ,            ,I2C2_SDA        ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A0           ,    ,    ,EVENTOUT,
+PortF,PF1 ,          ,                 ,              ,            ,I2C2_SCL        ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A1           ,    ,    ,EVENTOUT,
+PortF,PF2 ,          ,                 ,              ,            ,I2C2_SMBA       ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A2           ,    ,    ,EVENTOUT,
+PortF,PF3 ,          ,                 ,TIM5_CH1      ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A3           ,    ,    ,EVENTOUT,
+PortF,PF4 ,          ,                 ,TIM5_CH2      ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A4           ,    ,    ,EVENTOUT,
+PortF,PF5 ,          ,                 ,TIM5_CH3      ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A5           ,    ,    ,EVENTOUT,
+PortF,PF6 ,TRACED0   ,                 ,              ,TIM10_CH1   ,                ,                     ,                              ,SAI1_SD_B           ,                    ,QUADSPI_BK1_IO3                             ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortF,PF7 ,TRACED1   ,                 ,              ,TIM11_CH1   ,                ,                     ,                              ,SAI1_MCLK_B         ,                    ,QUADSPI_BK1_IO2                             ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortF,PF8 ,          ,                 ,              ,            ,                ,                     ,                              ,SAI1_SCK_B          ,                    ,TIM13_CH1                                   ,QUADSPI_BK1_IO0            ,    ,                  ,    ,    ,EVENTOUT,
+PortF,PF9 ,          ,                 ,              ,            ,                ,                     ,                              ,SAI1_FS_B           ,                    ,TIM14_CH1                                   ,QUADSPI_BK1_IO1            ,    ,                  ,    ,    ,EVENTOUT,
+PortF,PF10,          ,TIM1_ETR         ,TIM5_CH4      ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortF,PF11,          ,                 ,              ,TIM8_ETR    ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortF,PF12,          ,                 ,              ,TIM8_BKIN   ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A6           ,    ,    ,EVENTOUT,
+PortF,PF13,          ,                 ,              ,            ,I2CFMP1_SMBA    ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A7           ,    ,    ,EVENTOUT,
+PortF,PF14,          ,                 ,              ,            ,I2CFMP1_SCL     ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A8           ,    ,    ,EVENTOUT,
+PortF,PF15,          ,                 ,              ,            ,I2CFMP1_SDA     ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A9           ,    ,    ,EVENTOUT,
+PortG,PG0 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,CAN1_RX                                     ,                           ,    ,FSMC_A10          ,    ,    ,EVENTOUT,
+PortG,PG1 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,CAN1_TX                                     ,                           ,    ,FSMC_A11          ,    ,    ,EVENTOUT,
+PortG,PG2 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A12          ,    ,    ,EVENTOUT,
+PortG,PG3 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A13          ,    ,    ,EVENTOUT,
+PortG,PG4 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A14          ,    ,    ,EVENTOUT,
+PortG,PG5 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_A15          ,    ,    ,EVENTOUT,
+PortG,PG6 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,QUADSPI_BK1_NCS            ,    ,                  ,    ,    ,EVENTOUT,
+PortG,PG7 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,USART6_CK           ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortG,PG8 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,USART6_RTS          ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortG,PG9 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,USART6_RX           ,QUADSPI_BK2_IO2                             ,                           ,    ,FSMC_NE2          ,    ,    ,EVENTOUT,
+PortG,PG10,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,FSMC_NE3          ,    ,    ,EVENTOUT,
+PortG,PG11,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,CAN2_RX                                     ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortG,PG12,          ,                 ,              ,            ,                ,                     ,                              ,                    ,USART6_RTS          ,CAN2_TX                                     ,                           ,    ,FSMC_NE4          ,    ,    ,EVENTOUT,
+PortG,PG13,TRACED2   ,                 ,              ,            ,                ,                     ,                              ,                    ,USART6_CTS          ,                                            ,                           ,    ,FSMC_A24          ,    ,    ,EVENTOUT,
+PortG,PG14,TRACED3   ,                 ,              ,            ,                ,                     ,                              ,                    ,USART6_TX           ,QUADSPI_BK2_IO3                             ,                           ,    ,FSMC_A25          ,    ,    ,EVENTOUT,
+PortG,PG15,          ,                 ,              ,            ,                ,                     ,                              ,                    ,USART6_CTS          ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortH,PH0 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
+PortH,PH1 ,          ,                 ,              ,            ,                ,                     ,                              ,                    ,                    ,                                            ,                           ,    ,                  ,    ,    ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f413_af.csv b/ports/stm32/boards/stm32f413_af.csv
index 428ce44cfc..c564ea090b 100644
--- a/ports/stm32/boards/stm32f413_af.csv
+++ b/ports/stm32/boards/stm32f413_af.csv
@@ -1,116 +1,116 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS_AF,TIM1/TIM2/LPTIM1,TIM3/TIM4/TIM5,TIM8/9/10/11/DFSDM2,I2C1/2/3/I2CFMP1,SPI1/2/3/4/I2S1/2/3/4,SPI2/3/4/5/I2S2/3/4/5/DFSDM1/2,SPI3/I2S3/USART1/2/3/DFSDM2,USART3/4/5/6/7/8/CAN1/DFSDM1,I2C2/I2C3/I2CFMP1/CAN1/2/TIM12/13/14/QUADSPI,SAI1/DFSDM1/DFSDM2/QUADSPI/FSMC/OTG1_FS,UART4/5/9/10/CAN3,FSMC /SDIO,,RNG,SYS_AF,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,,,,,EVENTOUT,ADC1_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,SPI4_MOSI/I2S4_SD,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC1_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,I2S2_CKIN,,USART2_TX,,,,,FSMC_D4,,,EVENTOUT,ADC1_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,I2S2_MCK,,USART2_RX,,,SAI1_SD_B,,FSMC_D5,,,EVENTOUT,ADC1_IN3
-PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,DFSDM1_DATIN1,,,,FSMC_D6,,,EVENTOUT,ADC1_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,DFSDM1_CKIN1,,,,FSMC_D7,,,EVENTOUT,ADC1_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,I2S2_MCK,DFSDM2_CKIN1,,TIM13_CH1,QUADSPI_BK2_IO0,,SDIO_CMD,,,EVENTOUT,ADC1_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,DFSDM2_DATIN1,,TIM14_CH1,QUADSPI_BK2_IO1,,,,,EVENTOUT,ADC1_IN7
-PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,DFSDM1_CKOUT,USART1_CK,UART7_RX,,USB_FS_SOF,CAN3_RX,SDIO_D1,,,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,DFSDM2_CKIN3,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,USB_FS_VBUS,,SDIO_D2,,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,DFSDM2_DATIN3,,SPI2_MOSI/I2S2_SD,SPI5_MOSI/I2S5_SD,USART1_RX,,,USB_FS_ID,,,,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,DFSDM2_CKIN5,,SPI2_NSS/I2S2_WS,SPI4_MISO,USART1_CTS,USART6_TX,CAN1_RX,USB_FS_DM,UART4_RX,,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,DFSDM2_DATIN5,,SPI2_MISO,SPI5_MISO,USART1_RTS,USART6_RX,CAN1_TX,USB_FS_DP,UART4_TX,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART1_TX,UART7_TX,,SAI1_MCLK_A,CAN3_TX,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,ADC1_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,SPI5_NSS/I2S5_WS,,DFSDM1_DATIN0,QUADSPI_CLK,,,,,,EVENTOUT,ADC1_IN9
-PortB,PB2,,LPTIM1_OUT,,,,,DFSDM1_CKIN0,,,QUADSPI_CLK,,,,,,EVENTOUT,
-PortB,PB3,JTDO,TIM2_CH2,,,I2CFMP1_SDA,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,USART1_RX,UART7_RX,I2C2_SDA,SAI1_SD_A,CAN3_RX,,,,EVENTOUT,
-PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,UART7_TX,I2C3_SDA,SAI1_SCK_A,CAN3_TX,SDIO_D0,,,EVENTOUT,
-PortB,PB5,,LPTIM1_IN1,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,SAI1_FS_A,UART5_RX,SDIO_D3,,,EVENTOUT,
-PortB,PB6,,LPTIM1_ETR,TIM4_CH1,,I2C1_SCL,,DFSDM2_CKIN7,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,UART5_TX,SDIO_D0,,,EVENTOUT,
-PortB,PB7,,LPTIM1_IN2,TIM4_CH2,,I2C1_SDA,,DFSDM2_DATIN7,USART1_RX,,,,,FSMC_NL,,,EVENTOUT,
-PortB,PB8,,LPTIM1_OUT,TIM4_CH3,TIM10_CH1,I2C1_SCL,,SPI5_MOSI/I2S5_SD,DFSDM2_CKIN1,CAN1_RX,I2C3_SDA,,UART5_RX,SDIO_D4,,,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,DFSDM2_DATIN1,,CAN1_TX,I2C2_SDA,,UART5_TX,SDIO_D5,,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,I2S3_MCK,USART3_TX,,I2CFMP4_SCL,DFSDM2_CKOUT,,SDIO_D7,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,I2S2_CKIN,,USART3_RX,,,,,,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,SPI4_NSS/I2S4_WS,SPI3_SCK/I2S3_CK,USART3__CK,CAN2_RX,DFSDM1_DATIN1,UART5_RX,FSMC_D13/FSMC_DA13,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,I2CFMP1_SMBA,SPI2_SCK/I2S2_CK,SPI4_SCK/I2S4_CK,,USART3_CTS,CAN2_TX,DFSDM1_CKIN1,UART5_TX,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,I2CFMP1_SDA,SPI2_MISO,I2S2ext_SD,USART3_RTS,DFSDM1_DATIN2,TIM12_CH1,FSMC_D0,,SDIO_D6,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,I2CFMP1_SCL,SPI2_MOSI/I2S2_SD,,,DFSDM1_CKIN2,TIM12_CH2,,,SDIO_CK,,,EVENTOUT,
-PortC,PC0,,LPTIM1_IN1,,DFSDM2_CKIN4,,,,SAI1_MCLK_B,,,,,,,,EVENTOUT,ADC1_IN10
-PortC,PC1,,LPTIM1_OUT,,DFSDM2_DATIN4,,,,SAI1_SD_B,,,,,,,,EVENTOUT,ADC1_IN11
-PortC,PC2,,LPTIM1_IN2,,DFSDM2_DATIN7,,SPI2_MISO,I2S2ext_SD,SAI1_SCK_B,DFSDM1_CKOUT,,,,FSMC_NWE,,,EVENTOUT,ADC1_IN12
-PortC,PC3,,LPTIM1_ETR,,DFSDM2_CKIN7,,SPI2_MOSI/I2S2_SD,,SAI1_FS_B,,,,,FSMC_A0,,,EVENTOUT,ADC1_IN13
-PortC,PC4,,,,DFSDM2_CKIN2,,I2S1_MCK,,,,,QUADSPI_BK2_IO2,,FSMC_NE4,,,EVENTOUT,ADC1_IN14
-PortC,PC5,,,,DFSDM2_DATIN2,I2CFMP1_SMBA,,,USART3_RX,,,QUADSPI_BK2_IO3,,FSMC_NOE,,,EVENTOUT,ADC1_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,2CFMP1_SCL,I2S2_MCK,DFSDM1_CKIN3,DFSDM2_DATIN6,USART6_TX,,FSMC_D1,,SDIO_D6,,,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,I2CFMP1_SDA,SPI2_SCK/I2S2_CK,I2S3_MCK,DFSDM2_CKIN6,USART6_RX,,DFSDM1_DATIN3,,SDIO_D7,,,EVENTOUT,
-PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,DFSDM2_CKIN3,USART6_CK,QUADSPI_BK1_IO2,,,SDIO_D0,,,EVENTOUT,
-PortC,PC9,MCO_2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S2_CKIN,,DFSDM2_DATIN3,,QUADSPI_BK1_IO0,,,SDIO_D1,,,EVENTOUT,
-PortC,PC10,,,,DFSDM2_CKIN5,,,SPI3_SCK/I2S3_CK,USART3_TX,,QUADSPI_BK1_IO1,,,SDIO_D2,,,EVENTOUT,
-PortC,PC11,,,,DFSDM2_DATIN5,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,FSMC_D2,,SDIO_D3,,,EVENTOUT,
-PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,FSMC_D3,,SDIO_CK,,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,DFSDM2_CKIN6,,,,,,CAN1_RX,,UART4_RX,FSMC_D2/FSMC_DA2,,,EVENTOUT,
-PortD,PD1,,,,DFSDM2_DATIN6,,,,,,CAN1_TX,,UART4_TX,FSMC_D3/FSMC_DA3,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,DFSDM2_CKOUT,,,,,UART5_RX,,FSMC_NWE,,SDIO_CMD,,,EVENTOUT,
-PortD,PD3,TRACED1,,,,,SPI2_SCK/I2S2_CK,DFSDM1_DATIN0,USART2_CTS,,QUADSPI_CLK,,,FSMC_CLK,,,EVENTOUT,
-PortD,PD4,,,,,,,DFSDM1_CKIN0,USART2_RTS,,,,,FSMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,DFSDM2_CKOUT,,,,USART2_TX,,,,,FSMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,DFSDM1_DATIN1,USART2_RX,,,,,FSMC_NWAIT,,,EVENTOUT,
-PortD,PD7,,,,,,,DFSDM1_CKIN1,USART2_CK,,,,,FSMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FSMC_D13/FSMC_DA13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FSMC_D14/FSMC_DA14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,UART4_TX,,,,FSMC_D15/FSMC_DA15,,,EVENTOUT,
-PortD,PD11,,,,DFSDM2_DATIN2,I2CFMP1_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,,,FSMC_A16,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,DFSDM2_CKIN2,I2CFMP1_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,,,FSMC_A17,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,I2CFMP1_SDA,,,,,QUADSPI_BK1_IO3,,,FSMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,I2CFMP1_SCL,,,,,,DFSDM2_CKIN0,UART9_RX,FSMC_D0/FSMC_DA0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,I2CFMP1_SDA,,,,,,DFSDM2_DATIN0,UART9_TX,FSMC_D1/FSMC_DA1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,DFSDM2_CKIN4,,,,,UART8_RX,,,,FSMC_NBL0,,,EVENTOUT,
-PortE,PE1,,,,DFSDM2_DATIN4,,,,,UART8_TX,,,,FSMC_NBL1,,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,SAI1_MCLK_A,,QUADSPI_BK1_IO2,,UART10_RX,FSMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,,SAI1_SD_B,,,,UART10_TX,FSMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,SAI1_SD_A,DFSDM1_DATIN3,,,,FSMC_A20,,,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SPI5_MISO,SAI1_SCK_A,DFSDM1_CKIN3,,,,FSMC_A21,,,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,SAI1_FS_A,,,,,FSMC_A22,,,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,DFSDM1_DATIN2,,UART7_RX,,QUADSPI_BK2_IO0,,FSMC_D4/FSMC_DA4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,DFSDM1_CKIN2,,UART7_TX,,QUADSPI_BK2_IO1,,FSMC_D5/FSMC_DA5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,DFSDM1_CKOUT,,,,QUADSPI_BK2_IO2,,FSMC_D6/FSMC_DA6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,DFSDM2_DATIN0,,,,,,,QUADSPI_BK2_IO3,,FSMC_D7/FSMC_DA7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,DFSDM2_CKIN0,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,FSMC_D8/FSMC_DA8,,,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,DFSDM2_DATIN7,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,FSMC_D9/FSMC_DA9,,,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,DFSDM2_CKIN7,,SPI4_MISO,SPI5_MISO,,,,,,FSMC_D10/FSMC_DA10,,,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,DFSDM2_DATIN1,,FSMC_D11/FSMC_DA11,,,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,DFSDM2_CKIN1,,FSMC_D12/FSMC_DA12,,,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FSMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FSMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FSMC_A2,,,EVENTOUT,
-PortF,PF3,,,TIM5_CH1,,,,,,,,,,FSMC_A3,,,EVENTOUT,
-PortF,PF4,,,TIM5_CH2,,,,,,,,,,FSMC_A4,,,EVENTOUT,
-PortF,PF5,,,TIM5_CH3,,,,,,,,,,FSMC_A5,,,EVENTOUT,
-PortF,PF6,TRACED0,,,TIM10_CH1,,,,SAI1_SD_B,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,
-PortF,PF7,TRACED1,,,TIM11_CH1,,,,SAI1_MCLK_B,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT,
-PortF,PF8,,,,,,,,SAI1_SCK_B,UART8_RX,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,
-PortF,PF9,,,,,,,,SAI1_FS_B,UART8_TX,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,
-PortF,PF10,,TIM1_ETR,TIM5_CH4,,,,,,,,,,,,,EVENTOUT,
-PortF,PF11,,,,TIM8_ETR,,,,,,,,,,,,EVENTOUT,
-PortF,PF12,,,,TIM8_BKIN,,,,,,,,,FSMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,I2CFMP1_SMBA,,,,,,,,FSMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,I2CFMP1_SCL,,,,,,,,FSMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,I2CFMP1_SDA,,,,,,,,FSMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,CAN1_RX,,UART9_RX,FSMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,CAN1_TX,,UART9_TX,FSMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FSMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FSMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FSMC_A14,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FSMC_A15,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,QUADSPI_BK1_NCS,,,,,EVENTOUT,
-PortG,PG7,,,,,,,,,USART6_CK,,,,,,,EVENTOUT,
-PortG,PG8,,,,,,,,,USART6_RTS,,,,,,,EVENTOUT,
-PortG,PG9,,,,,,,,,USART6_RX,QUADSPI_BK2_IO2,,,FSMC_NE2,,,EVENTOUT,
-PortG,PG10,,,,,,,,,,,,,FSMC_NE3,,,EVENTOUT,
-PortG,PG11,,,,,,,,,,CAN2_RX,,UART10_RX,,,,EVENTOUT,
-PortG,PG12,,,,,,,,,USART6_RTS,CAN2_TX,,UART10_TX,FSMC_NE4,,,EVENTOUT,
-PortG,PG13,TRACED2,,,,,,,,USART6_CTS,,,,FSMC_A24,,,EVENTOUT,
-PortG,PG14,TRACED3,,,,,,,,USART6_TX,QUADSPI_BK2_IO3,,,FSMC_A25,,,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,,,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0       ,AF1              ,AF2           ,AF3                ,AF4             ,AF5                  ,AF6                           ,AF7                        ,AF8                         ,AF9                                         ,AF10                                   ,AF11             ,AF12              ,AF13,AF14,AF15    ,ADC
+     ,    ,SYS_AF    ,TIM1/TIM2/LPTIM1 ,TIM3/TIM4/TIM5,TIM8/9/10/11/DFSDM2,I2C1/2/3/I2CFMP1,SPI1/2/3/4/I2S1/2/3/4,SPI2/3/4/5/I2S2/3/4/5/DFSDM1/2,SPI3/I2S3/USART1/2/3/DFSDM2,USART3/4/5/6/7/8/CAN1/DFSDM1,I2C2/I2C3/I2CFMP1/CAN1/2/TIM12/13/14/QUADSPI,SAI1/DFSDM1/DFSDM2/QUADSPI/FSMC/OTG1_FS,UART4/5/9/10/CAN3,FSMC /SDIO        ,    ,RNG ,SYS_AF  ,ADC
+PortA,PA0 ,          ,TIM2_CH1/TIM2_ETR,TIM5_CH1      ,TIM8_ETR           ,                ,                     ,                              ,USART2_CTS                 ,UART4_TX                    ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,ADC1_IN0
+PortA,PA1 ,          ,TIM2_CH2         ,TIM5_CH2      ,                   ,                ,SPI4_MOSI/I2S4_SD    ,                              ,USART2_RTS                 ,UART4_RX                    ,QUADSPI_BK1_IO3                             ,                                       ,                 ,                  ,    ,    ,EVENTOUT,ADC1_IN1
+PortA,PA2 ,          ,TIM2_CH3         ,TIM5_CH3      ,TIM9_CH1           ,                ,I2S2_CKIN            ,                              ,USART2_TX                  ,                            ,                                            ,                                       ,                 ,FSMC_D4           ,    ,    ,EVENTOUT,ADC1_IN2
+PortA,PA3 ,          ,TIM2_CH4         ,TIM5_CH4      ,TIM9_CH2           ,                ,I2S2_MCK             ,                              ,USART2_RX                  ,                            ,                                            ,SAI1_SD_B                              ,                 ,FSMC_D5           ,    ,    ,EVENTOUT,ADC1_IN3
+PortA,PA4 ,          ,                 ,              ,                   ,                ,SPI1_NSS/I2S1_WS     ,SPI3_NSS/I2S3_WS              ,USART2_CK                  ,DFSDM1_DATIN1               ,                                            ,                                       ,                 ,FSMC_D6           ,    ,    ,EVENTOUT,ADC1_IN4
+PortA,PA5 ,          ,TIM2_CH1/TIM2_ETR,              ,TIM8_CH1N          ,                ,SPI1_SCK/I2S1_CK     ,                              ,                           ,DFSDM1_CKIN1                ,                                            ,                                       ,                 ,FSMC_D7           ,    ,    ,EVENTOUT,ADC1_IN5
+PortA,PA6 ,          ,TIM1_BKIN        ,TIM3_CH1      ,TIM8_BKIN          ,                ,SPI1_MISO            ,I2S2_MCK                      ,DFSDM2_CKIN1               ,                            ,TIM13_CH1                                   ,QUADSPI_BK2_IO0                        ,                 ,SDIO_CMD          ,    ,    ,EVENTOUT,ADC1_IN6
+PortA,PA7 ,          ,TIM1_CH1N        ,TIM3_CH2      ,TIM8_CH1N          ,                ,SPI1_MOSI/I2S1_SD    ,                              ,DFSDM2_DATIN1              ,                            ,TIM14_CH1                                   ,QUADSPI_BK2_IO1                        ,                 ,                  ,    ,    ,EVENTOUT,ADC1_IN7
+PortA,PA8 ,MCO_1     ,TIM1_CH1         ,              ,                   ,I2C3_SCL        ,                     ,DFSDM1_CKOUT                  ,USART1_CK                  ,UART7_RX                    ,                                            ,USB_FS_SOF                             ,CAN3_RX          ,SDIO_D1           ,    ,    ,EVENTOUT,
+PortA,PA9 ,          ,TIM1_CH2         ,              ,DFSDM2_CKIN3       ,I2C3_SMBA       ,SPI2_SCK/I2S2_CK     ,                              ,USART1_TX                  ,                            ,                                            ,USB_FS_VBUS                            ,                 ,SDIO_D2           ,    ,    ,EVENTOUT,
+PortA,PA10,          ,TIM1_CH3         ,              ,DFSDM2_DATIN3      ,                ,SPI2_MOSI/I2S2_SD    ,SPI5_MOSI/I2S5_SD             ,USART1_RX                  ,                            ,                                            ,USB_FS_ID                              ,                 ,                  ,    ,    ,EVENTOUT,
+PortA,PA11,          ,TIM1_CH4         ,              ,DFSDM2_CKIN5       ,                ,SPI2_NSS/I2S2_WS     ,SPI4_MISO                     ,USART1_CTS                 ,USART6_TX                   ,CAN1_RX                                     ,USB_FS_DM                              ,UART4_RX         ,                  ,    ,    ,EVENTOUT,
+PortA,PA12,          ,TIM1_ETR         ,              ,DFSDM2_DATIN5      ,                ,SPI2_MISO            ,SPI5_MISO                     ,USART1_RTS                 ,USART6_RX                   ,CAN1_TX                                     ,USB_FS_DP                              ,UART4_TX         ,                  ,    ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortA,PA15,JTDI      ,TIM2_CH1/TIM2_ETR,              ,                   ,                ,SPI1_NSS/I2S1_WS     ,SPI3_NSS/I2S3_WS              ,USART1_TX                  ,UART7_TX                    ,                                            ,SAI1_MCLK_A                            ,CAN3_TX          ,                  ,    ,    ,EVENTOUT,
+PortB,PB0 ,          ,TIM1_CH2N        ,TIM3_CH3      ,TIM8_CH2N          ,                ,                     ,SPI5_SCK/I2S5_CK              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,ADC1_IN8
+PortB,PB1 ,          ,TIM1_CH3N        ,TIM3_CH4      ,TIM8_CH3N          ,                ,                     ,SPI5_NSS/I2S5_WS              ,                           ,DFSDM1_DATIN0               ,QUADSPI_CLK                                 ,                                       ,                 ,                  ,    ,    ,EVENTOUT,ADC1_IN9
+PortB,PB2 ,          ,LPTIM1_OUT       ,              ,                   ,                ,                     ,DFSDM1_CKIN0                  ,                           ,                            ,QUADSPI_CLK                                 ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortB,PB3 ,JTDO      ,TIM2_CH2         ,              ,                   ,I2CFMP1_SDA     ,SPI1_SCK/I2S1_CK     ,SPI3_SCK/I2S3_CK              ,USART1_RX                  ,UART7_RX                    ,I2C2_SDA                                    ,SAI1_SD_A                              ,CAN3_RX          ,                  ,    ,    ,EVENTOUT,
+PortB,PB4 ,JTRST     ,                 ,TIM3_CH1      ,                   ,                ,SPI1_MISO            ,SPI3_MISO                     ,I2S3ext_SD                 ,UART7_TX                    ,I2C3_SDA                                    ,SAI1_SCK_A                             ,CAN3_TX          ,SDIO_D0           ,    ,    ,EVENTOUT,
+PortB,PB5 ,          ,LPTIM1_IN1       ,TIM3_CH2      ,                   ,I2C1_SMBA       ,SPI1_MOSI/I2S1_SD    ,SPI3_MOSI/I2S3_SD             ,                           ,                            ,CAN2_RX                                     ,SAI1_FS_A                              ,UART5_RX         ,SDIO_D3           ,    ,    ,EVENTOUT,
+PortB,PB6 ,          ,LPTIM1_ETR       ,TIM4_CH1      ,                   ,I2C1_SCL        ,                     ,DFSDM2_CKIN7                  ,USART1_TX                  ,                            ,CAN2_TX                                     ,QUADSPI_BK1_NCS                        ,UART5_TX         ,SDIO_D0           ,    ,    ,EVENTOUT,
+PortB,PB7 ,          ,LPTIM1_IN2       ,TIM4_CH2      ,                   ,I2C1_SDA        ,                     ,DFSDM2_DATIN7                 ,USART1_RX                  ,                            ,                                            ,                                       ,                 ,FSMC_NL           ,    ,    ,EVENTOUT,
+PortB,PB8 ,          ,LPTIM1_OUT       ,TIM4_CH3      ,TIM10_CH1          ,I2C1_SCL        ,                     ,SPI5_MOSI/I2S5_SD             ,DFSDM2_CKIN1               ,CAN1_RX                     ,I2C3_SDA                                    ,                                       ,UART5_RX         ,SDIO_D4           ,    ,    ,EVENTOUT,
+PortB,PB9 ,          ,                 ,TIM4_CH4      ,TIM11_CH1          ,I2C1_SDA        ,SPI2_NSS/I2S2_WS     ,DFSDM2_DATIN1                 ,                           ,CAN1_TX                     ,I2C2_SDA                                    ,                                       ,UART5_TX         ,SDIO_D5           ,    ,    ,EVENTOUT,
+PortB,PB10,          ,TIM2_CH3         ,              ,                   ,I2C2_SCL        ,SPI2_SCK/I2S2_CK     ,I2S3_MCK                      ,USART3_TX                  ,                            ,I2CFMP4_SCL                                 ,DFSDM2_CKOUT                           ,                 ,SDIO_D7           ,    ,    ,EVENTOUT,
+PortB,PB11,          ,TIM2_CH4         ,              ,                   ,I2C2_SDA        ,I2S2_CKIN            ,                              ,USART3_RX                  ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortB,PB12,          ,TIM1_BKIN        ,              ,                   ,I2C2_SMBA       ,SPI2_NSS/I2S2_WS     ,SPI4_NSS/I2S4_WS              ,SPI3_SCK/I2S3_CK           ,USART3__CK                  ,CAN2_RX                                     ,DFSDM1_DATIN1                          ,UART5_RX         ,FSMC_D13/FSMC_DA13,    ,    ,EVENTOUT,
+PortB,PB13,          ,TIM1_CH1N        ,              ,                   ,I2CFMP1_SMBA    ,SPI2_SCK/I2S2_CK     ,SPI4_SCK/I2S4_CK              ,                           ,USART3_CTS                  ,CAN2_TX                                     ,DFSDM1_CKIN1                           ,UART5_TX         ,                  ,    ,    ,EVENTOUT,
+PortB,PB14,          ,TIM1_CH2N        ,              ,TIM8_CH2N          ,I2CFMP1_SDA     ,SPI2_MISO            ,I2S2ext_SD                    ,USART3_RTS                 ,DFSDM1_DATIN2               ,TIM12_CH1                                   ,FSMC_D0                                ,                 ,SDIO_D6           ,    ,    ,EVENTOUT,
+PortB,PB15,RTC_REFIN ,TIM1_CH3N        ,              ,TIM8_CH3N          ,I2CFMP1_SCL     ,SPI2_MOSI/I2S2_SD    ,                              ,                           ,DFSDM1_CKIN2                ,TIM12_CH2                                   ,                                       ,                 ,SDIO_CK           ,    ,    ,EVENTOUT,
+PortC,PC0 ,          ,LPTIM1_IN1       ,              ,DFSDM2_CKIN4       ,                ,                     ,                              ,SAI1_MCLK_B                ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,ADC1_IN10
+PortC,PC1 ,          ,LPTIM1_OUT       ,              ,DFSDM2_DATIN4      ,                ,                     ,                              ,SAI1_SD_B                  ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,ADC1_IN11
+PortC,PC2 ,          ,LPTIM1_IN2       ,              ,DFSDM2_DATIN7      ,                ,SPI2_MISO            ,I2S2ext_SD                    ,SAI1_SCK_B                 ,DFSDM1_CKOUT                ,                                            ,                                       ,                 ,FSMC_NWE          ,    ,    ,EVENTOUT,ADC1_IN12
+PortC,PC3 ,          ,LPTIM1_ETR       ,              ,DFSDM2_CKIN7       ,                ,SPI2_MOSI/I2S2_SD    ,                              ,SAI1_FS_B                  ,                            ,                                            ,                                       ,                 ,FSMC_A0           ,    ,    ,EVENTOUT,ADC1_IN13
+PortC,PC4 ,          ,                 ,              ,DFSDM2_CKIN2       ,                ,I2S1_MCK             ,                              ,                           ,                            ,                                            ,QUADSPI_BK2_IO2                        ,                 ,FSMC_NE4          ,    ,    ,EVENTOUT,ADC1_IN14
+PortC,PC5 ,          ,                 ,              ,DFSDM2_DATIN2      ,I2CFMP1_SMBA    ,                     ,                              ,USART3_RX                  ,                            ,                                            ,QUADSPI_BK2_IO3                        ,                 ,FSMC_NOE          ,    ,    ,EVENTOUT,ADC1_IN15
+PortC,PC6 ,          ,                 ,TIM3_CH1      ,TIM8_CH1           ,2CFMP1_SCL      ,I2S2_MCK             ,DFSDM1_CKIN3                  ,DFSDM2_DATIN6              ,USART6_TX                   ,                                            ,FSMC_D1                                ,                 ,SDIO_D6           ,    ,    ,EVENTOUT,
+PortC,PC7 ,          ,                 ,TIM3_CH2      ,TIM8_CH2           ,I2CFMP1_SDA     ,SPI2_SCK/I2S2_CK     ,I2S3_MCK                      ,DFSDM2_CKIN6               ,USART6_RX                   ,                                            ,DFSDM1_DATIN3                          ,                 ,SDIO_D7           ,    ,    ,EVENTOUT,
+PortC,PC8 ,          ,                 ,TIM3_CH3      ,TIM8_CH3           ,                ,                     ,                              ,DFSDM2_CKIN3               ,USART6_CK                   ,QUADSPI_BK1_IO2                             ,                                       ,                 ,SDIO_D0           ,    ,    ,EVENTOUT,
+PortC,PC9 ,MCO_2     ,                 ,TIM3_CH4      ,TIM8_CH4           ,I2C3_SDA        ,I2S2_CKIN            ,                              ,DFSDM2_DATIN3              ,                            ,QUADSPI_BK1_IO0                             ,                                       ,                 ,SDIO_D1           ,    ,    ,EVENTOUT,
+PortC,PC10,          ,                 ,              ,DFSDM2_CKIN5       ,                ,                     ,SPI3_SCK/I2S3_CK              ,USART3_TX                  ,                            ,QUADSPI_BK1_IO1                             ,                                       ,                 ,SDIO_D2           ,    ,    ,EVENTOUT,
+PortC,PC11,          ,                 ,              ,DFSDM2_DATIN5      ,                ,I2S3ext_SD           ,SPI3_MISO                     ,USART3_RX                  ,UART4_RX                    ,QUADSPI_BK2_NCS                             ,FSMC_D2                                ,                 ,SDIO_D3           ,    ,    ,EVENTOUT,
+PortC,PC12,          ,                 ,              ,                   ,                ,                     ,SPI3_MOSI/I2S3_SD             ,USART3_CK                  ,UART5_TX                    ,                                            ,FSMC_D3                                ,                 ,SDIO_CK           ,    ,    ,EVENTOUT,
+PortC,PC13,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortC,PC14,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortC,PC15,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortD,PD0 ,          ,                 ,              ,DFSDM2_CKIN6       ,                ,                     ,                              ,                           ,                            ,CAN1_RX                                     ,                                       ,UART4_RX         ,FSMC_D2/FSMC_DA2  ,    ,    ,EVENTOUT,
+PortD,PD1 ,          ,                 ,              ,DFSDM2_DATIN6      ,                ,                     ,                              ,                           ,                            ,CAN1_TX                                     ,                                       ,UART4_TX         ,FSMC_D3/FSMC_DA3  ,    ,    ,EVENTOUT,
+PortD,PD2 ,          ,                 ,TIM3_ETR      ,DFSDM2_CKOUT       ,                ,                     ,                              ,                           ,UART5_RX                    ,                                            ,FSMC_NWE                               ,                 ,SDIO_CMD          ,    ,    ,EVENTOUT,
+PortD,PD3 ,TRACED1   ,                 ,              ,                   ,                ,SPI2_SCK/I2S2_CK     ,DFSDM1_DATIN0                 ,USART2_CTS                 ,                            ,QUADSPI_CLK                                 ,                                       ,                 ,FSMC_CLK          ,    ,    ,EVENTOUT,
+PortD,PD4 ,          ,                 ,              ,                   ,                ,                     ,DFSDM1_CKIN0                  ,USART2_RTS                 ,                            ,                                            ,                                       ,                 ,FSMC_NOE          ,    ,    ,EVENTOUT,
+PortD,PD5 ,          ,                 ,              ,DFSDM2_CKOUT       ,                ,                     ,                              ,USART2_TX                  ,                            ,                                            ,                                       ,                 ,FSMC_NWE          ,    ,    ,EVENTOUT,
+PortD,PD6 ,          ,                 ,              ,                   ,                ,SPI3_MOSI/I2S3_SD    ,DFSDM1_DATIN1                 ,USART2_RX                  ,                            ,                                            ,                                       ,                 ,FSMC_NWAIT        ,    ,    ,EVENTOUT,
+PortD,PD7 ,          ,                 ,              ,                   ,                ,                     ,DFSDM1_CKIN1                  ,USART2_CK                  ,                            ,                                            ,                                       ,                 ,FSMC_NE1          ,    ,    ,EVENTOUT,
+PortD,PD8 ,          ,                 ,              ,                   ,                ,                     ,                              ,USART3_TX                  ,                            ,                                            ,                                       ,                 ,FSMC_D13/FSMC_DA13,    ,    ,EVENTOUT,
+PortD,PD9 ,          ,                 ,              ,                   ,                ,                     ,                              ,USART3_RX                  ,                            ,                                            ,                                       ,                 ,FSMC_D14/FSMC_DA14,    ,    ,EVENTOUT,
+PortD,PD10,          ,                 ,              ,                   ,                ,                     ,                              ,USART3_CK                  ,UART4_TX                    ,                                            ,                                       ,                 ,FSMC_D15/FSMC_DA15,    ,    ,EVENTOUT,
+PortD,PD11,          ,                 ,              ,DFSDM2_DATIN2      ,I2CFMP1_SMBA    ,                     ,                              ,USART3_CTS                 ,                            ,QUADSPI_BK1_IO0                             ,                                       ,                 ,FSMC_A16          ,    ,    ,EVENTOUT,
+PortD,PD12,          ,                 ,TIM4_CH1      ,DFSDM2_CKIN2       ,I2CFMP1_SCL     ,                     ,                              ,USART3_RTS                 ,                            ,QUADSPI_BK1_IO1                             ,                                       ,                 ,FSMC_A17          ,    ,    ,EVENTOUT,
+PortD,PD13,          ,                 ,TIM4_CH2      ,                   ,I2CFMP1_SDA     ,                     ,                              ,                           ,                            ,QUADSPI_BK1_IO3                             ,                                       ,                 ,FSMC_A18          ,    ,    ,EVENTOUT,
+PortD,PD14,          ,                 ,TIM4_CH3      ,                   ,I2CFMP1_SCL     ,                     ,                              ,                           ,                            ,                                            ,DFSDM2_CKIN0                           ,UART9_RX         ,FSMC_D0/FSMC_DA0  ,    ,    ,EVENTOUT,
+PortD,PD15,          ,                 ,TIM4_CH4      ,                   ,I2CFMP1_SDA     ,                     ,                              ,                           ,                            ,                                            ,DFSDM2_DATIN0                          ,UART9_TX         ,FSMC_D1/FSMC_DA1  ,    ,    ,EVENTOUT,
+PortE,PE0 ,          ,                 ,TIM4_ETR      ,DFSDM2_CKIN4       ,                ,                     ,                              ,                           ,UART8_RX                    ,                                            ,                                       ,                 ,FSMC_NBL0         ,    ,    ,EVENTOUT,
+PortE,PE1 ,          ,                 ,              ,DFSDM2_DATIN4      ,                ,                     ,                              ,                           ,UART8_TX                    ,                                            ,                                       ,                 ,FSMC_NBL1         ,    ,    ,EVENTOUT,
+PortE,PE2 ,TRACECLK  ,                 ,              ,                   ,                ,SPI4_SCK/I2S4_CK     ,SPI5_SCK/I2S5_CK              ,SAI1_MCLK_A                ,                            ,QUADSPI_BK1_IO2                             ,                                       ,UART10_RX        ,FSMC_A23          ,    ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0   ,                 ,              ,                   ,                ,                     ,                              ,SAI1_SD_B                  ,                            ,                                            ,                                       ,UART10_TX        ,FSMC_A19          ,    ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1   ,                 ,              ,                   ,                ,SPI4_NSS/I2S4_WS     ,SPI5_NSS/I2S5_WS              ,SAI1_SD_A                  ,DFSDM1_DATIN3               ,                                            ,                                       ,                 ,FSMC_A20          ,    ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2   ,                 ,              ,TIM9_CH1           ,                ,SPI4_MISO            ,SPI5_MISO                     ,SAI1_SCK_A                 ,DFSDM1_CKIN3                ,                                            ,                                       ,                 ,FSMC_A21          ,    ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3   ,                 ,              ,TIM9_CH2           ,                ,SPI4_MOSI/I2S4_SD    ,SPI5_MOSI/I2S5_SD             ,SAI1_FS_A                  ,                            ,                                            ,                                       ,                 ,FSMC_A22          ,    ,    ,EVENTOUT,
+PortE,PE7 ,          ,TIM1_ETR         ,              ,                   ,                ,                     ,DFSDM1_DATIN2                 ,                           ,UART7_RX                    ,                                            ,QUADSPI_BK2_IO0                        ,                 ,FSMC_D4/FSMC_DA4  ,    ,    ,EVENTOUT,
+PortE,PE8 ,          ,TIM1_CH1N        ,              ,                   ,                ,                     ,DFSDM1_CKIN2                  ,                           ,UART7_TX                    ,                                            ,QUADSPI_BK2_IO1                        ,                 ,FSMC_D5/FSMC_DA5  ,    ,    ,EVENTOUT,
+PortE,PE9 ,          ,TIM1_CH1         ,              ,                   ,                ,                     ,DFSDM1_CKOUT                  ,                           ,                            ,                                            ,QUADSPI_BK2_IO2                        ,                 ,FSMC_D6/FSMC_DA6  ,    ,    ,EVENTOUT,
+PortE,PE10,          ,TIM1_CH2N        ,              ,DFSDM2_DATIN0      ,                ,                     ,                              ,                           ,                            ,                                            ,QUADSPI_BK2_IO3                        ,                 ,FSMC_D7/FSMC_DA7  ,    ,    ,EVENTOUT,
+PortE,PE11,          ,TIM1_CH2         ,              ,DFSDM2_CKIN0       ,                ,SPI4_NSS/I2S4_WS     ,SPI5_NSS/I2S5_WS              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_D8/FSMC_DA8  ,    ,    ,EVENTOUT,
+PortE,PE12,          ,TIM1_CH3N        ,              ,DFSDM2_DATIN7      ,                ,SPI4_SCK/I2S4_CK     ,SPI5_SCK/I2S5_CK              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_D9/FSMC_DA9  ,    ,    ,EVENTOUT,
+PortE,PE13,          ,TIM1_CH3         ,              ,DFSDM2_CKIN7       ,                ,SPI4_MISO            ,SPI5_MISO                     ,                           ,                            ,                                            ,                                       ,                 ,FSMC_D10/FSMC_DA10,    ,    ,EVENTOUT,
+PortE,PE14,          ,TIM1_CH4         ,              ,                   ,                ,SPI4_MOSI/I2S4_SD    ,SPI5_MOSI/I2S5_SD             ,                           ,                            ,                                            ,DFSDM2_DATIN1                          ,                 ,FSMC_D11/FSMC_DA11,    ,    ,EVENTOUT,
+PortE,PE15,          ,TIM1_BKIN        ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,DFSDM2_CKIN1                           ,                 ,FSMC_D12/FSMC_DA12,    ,    ,EVENTOUT,
+PortF,PF0 ,          ,                 ,              ,                   ,I2C2_SDA        ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A0           ,    ,    ,EVENTOUT,
+PortF,PF1 ,          ,                 ,              ,                   ,I2C2_SCL        ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A1           ,    ,    ,EVENTOUT,
+PortF,PF2 ,          ,                 ,              ,                   ,I2C2_SMBA       ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A2           ,    ,    ,EVENTOUT,
+PortF,PF3 ,          ,                 ,TIM5_CH1      ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A3           ,    ,    ,EVENTOUT,
+PortF,PF4 ,          ,                 ,TIM5_CH2      ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A4           ,    ,    ,EVENTOUT,
+PortF,PF5 ,          ,                 ,TIM5_CH3      ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A5           ,    ,    ,EVENTOUT,
+PortF,PF6 ,TRACED0   ,                 ,              ,TIM10_CH1          ,                ,                     ,                              ,SAI1_SD_B                  ,UART7_RX                    ,QUADSPI_BK1_IO3                             ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortF,PF7 ,TRACED1   ,                 ,              ,TIM11_CH1          ,                ,                     ,                              ,SAI1_MCLK_B                ,UART7_TX                    ,QUADSPI_BK1_IO2                             ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortF,PF8 ,          ,                 ,              ,                   ,                ,                     ,                              ,SAI1_SCK_B                 ,UART8_RX                    ,TIM13_CH1                                   ,QUADSPI_BK1_IO0                        ,                 ,                  ,    ,    ,EVENTOUT,
+PortF,PF9 ,          ,                 ,              ,                   ,                ,                     ,                              ,SAI1_FS_B                  ,UART8_TX                    ,TIM14_CH1                                   ,QUADSPI_BK1_IO1                        ,                 ,                  ,    ,    ,EVENTOUT,
+PortF,PF10,          ,TIM1_ETR         ,TIM5_CH4      ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortF,PF11,          ,                 ,              ,TIM8_ETR           ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortF,PF12,          ,                 ,              ,TIM8_BKIN          ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A6           ,    ,    ,EVENTOUT,
+PortF,PF13,          ,                 ,              ,                   ,I2CFMP1_SMBA    ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A7           ,    ,    ,EVENTOUT,
+PortF,PF14,          ,                 ,              ,                   ,I2CFMP1_SCL     ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A8           ,    ,    ,EVENTOUT,
+PortF,PF15,          ,                 ,              ,                   ,I2CFMP1_SDA     ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A9           ,    ,    ,EVENTOUT,
+PortG,PG0 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,CAN1_RX                                     ,                                       ,UART9_RX         ,FSMC_A10          ,    ,    ,EVENTOUT,
+PortG,PG1 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,CAN1_TX                                     ,                                       ,UART9_TX         ,FSMC_A11          ,    ,    ,EVENTOUT,
+PortG,PG2 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A12          ,    ,    ,EVENTOUT,
+PortG,PG3 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A13          ,    ,    ,EVENTOUT,
+PortG,PG4 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A14          ,    ,    ,EVENTOUT,
+PortG,PG5 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_A15          ,    ,    ,EVENTOUT,
+PortG,PG6 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,QUADSPI_BK1_NCS                        ,                 ,                  ,    ,    ,EVENTOUT,
+PortG,PG7 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,USART6_CK                   ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortG,PG8 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,USART6_RTS                  ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortG,PG9 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,USART6_RX                   ,QUADSPI_BK2_IO2                             ,                                       ,                 ,FSMC_NE2          ,    ,    ,EVENTOUT,
+PortG,PG10,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,FSMC_NE3          ,    ,    ,EVENTOUT,
+PortG,PG11,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,CAN2_RX                                     ,                                       ,UART10_RX        ,                  ,    ,    ,EVENTOUT,
+PortG,PG12,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,USART6_RTS                  ,CAN2_TX                                     ,                                       ,UART10_TX        ,FSMC_NE4          ,    ,    ,EVENTOUT,
+PortG,PG13,TRACED2   ,                 ,              ,                   ,                ,                     ,                              ,                           ,USART6_CTS                  ,                                            ,                                       ,                 ,FSMC_A24          ,    ,    ,EVENTOUT,
+PortG,PG14,TRACED3   ,                 ,              ,                   ,                ,                     ,                              ,                           ,USART6_TX                   ,QUADSPI_BK2_IO3                             ,                                       ,                 ,FSMC_A25          ,    ,    ,EVENTOUT,
+PortG,PG15,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,USART6_CTS                  ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortH,PH0 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
+PortH,PH1 ,          ,                 ,              ,                   ,                ,                     ,                              ,                           ,                            ,                                            ,                                       ,                 ,                  ,    ,    ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f429_af.csv b/ports/stm32/boards/stm32f429_af.csv
index 002d634a20..e9cf2880b4 100644
--- a/ports/stm32/boards/stm32f429_af.csv
+++ b/ports/stm32/boards/stm32f429_af.csv
@@ -1,170 +1,170 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/2/3/4/5/6,SPI2/3/SAI1,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH,FMC/SDIO/OTG2_FS,DCMI,LCD,SYS,
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC123_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9
-PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,FMC_SDNE1,DCMI_D5,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,LCD_B6,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,LCD_B7,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10
-PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC12_IN14
-PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC12_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,LCD_HSYNC,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,LCD_G6,EVENTOUT,
-PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,LCD_R2,EVENTOUT,
-PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT,
-PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT,
-PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,,,,,FMC_NE1/FMC_NCE2,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT,
-PortD,PD11,,,,,,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FMC_A17,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,,,,,,UART8_RX,,,,FMC_NBL0,DCMI_D2,,EVENTOUT,
-PortE,PE1,,,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,,,FMC_D4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,,,FMC_D5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,,,,,FMC_D6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FMC_D7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,,,FMC_D8,,LCD_G3,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,,,FMC_D9,,LCD_B4,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,,,FMC_D10,,LCD_DE,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,,,FMC_D11,,LCD_CLK,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
-PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4
-PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5
-PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,,,FMC_NIOWR,,,EVENTOUT,ADC3_IN6
-PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,,,FMC_CD,,,EVENTOUT,ADC3_IN7
-PortF,PF10,,,,,,,,,,,,,FMC_INTR,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8
-PortF,PF11,,,,,,SPI5_MOSI,,,,,,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,,,FMC_INT2,DCMI_D12,LCD_R7,EVENTOUT,
-PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT3,DCMI_D13,LCD_CLK,EVENTOUT,
-PortG,PG8,,,,,,SPI6_NSS,,,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT,
-PortG,PG9,,,,,,,,,USART6_RX,,,,FMC_NE2/FMC_NCE3,DCMI_VSYNC(1),,EVENTOUT,
-PortG,PG10,,,,,,,,,,LCD_G3,,,FMC_NCE4_1/FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT,
-PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FMC_NCE4_2,DCMI_D3,LCD_B3,EVENTOUT,
-PortG,PG12,,,,,,SPI6_MISO,,,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT,
-PortG,PG13,,,,,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,,EVENTOUT,
-PortG,PG14,,,,,,SPI6_MOSI,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT,
-PortH,PH3,,,,,,,,,,,,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT,
-PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT,
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,
-PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,DCMI_D8,,,
-PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,,
-PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT,
-PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT,
-PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT,
-PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT,
-PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT,
-PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT,
-PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT,
-PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT,
-PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
-PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT,
-PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT,
-PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT,
-PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT,
-PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT,
-PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT,
-PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT,
-PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT,
-PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT,
-PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT,
-PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT,
-PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT,
-PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT,
-PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT,
-PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT,
-PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT,
-PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT,
-PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT,
-PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT,
-PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT,
-PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT,
-PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT,
-PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT,
-PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT,
-PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT,
-PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT,
-PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT,
-PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5              ,AF6              ,AF7            ,AF8               ,AF9                   ,AF10           ,AF11                           ,AF12              ,AF13         ,AF14     ,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/2/3/4/5/6   ,SPI2/3/SAI1      ,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH                            ,FMC/SDIO/OTG2_FS  ,DCMI         ,LCD      ,SYS     ,
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                 ,                 ,USART2_CTS     ,UART4_TX          ,                      ,               ,ETH_MII_CRS                    ,                  ,             ,         ,EVENTOUT,
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                 ,                 ,USART2_RTS     ,UART4_RX          ,                      ,               ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                  ,             ,         ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,ETH_MDIO                       ,                  ,             ,         ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                 ,                 ,USART2_RX      ,                  ,                      ,OTG_HS_ULPI_D0 ,ETH_MII_COL                    ,                  ,             ,LCD_B5   ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK      ,                  ,                      ,               ,                               ,OTG_HS_SOF        ,DCMI_HSYNC   ,LCD_VSYNC,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK         ,                 ,               ,                  ,                      ,OTG_HS_ULPI_CK ,                               ,                  ,             ,         ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO        ,                 ,               ,                  ,TIM13_CH1             ,               ,                               ,                  ,DCMI_PIXCLK  ,LCD_G2   ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI        ,                 ,               ,                  ,TIM14_CH1             ,               ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,                  ,             ,         ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                 ,                 ,USART1_CK      ,                  ,                      ,OTG_FS_SOF     ,                               ,                  ,             ,LCD_R6   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,                 ,                 ,USART1_TX      ,                  ,                      ,               ,                               ,                  ,DCMI_D0      ,         ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                 ,                 ,USART1_RX      ,                  ,                      ,OTG_FS_ID      ,                               ,                  ,DCMI_D1      ,         ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                 ,                 ,USART1_CTS     ,                  ,CAN1_RX               ,OTG_FS_DM      ,                               ,                  ,             ,LCD_R4   ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,USART1_RTS     ,                  ,CAN1_TX               ,OTG_FS_DP      ,                               ,                  ,             ,LCD_R5   ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,LCD_R3                ,OTG_HS_ULPI_D1 ,ETH_MII_RXD2                   ,                  ,             ,         ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,LCD_R6                ,OTG_HS_ULPI_D2 ,ETH_MII_RXD3                   ,                  ,             ,         ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO        ,SPI3_MISO        ,I2S3ext_SD     ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,               ,                  ,CAN2_RX               ,OTG_HS_ULPI_D7 ,ETH_PPS_OUT                    ,FMC_SDCKE1        ,DCMI_D10     ,         ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                 ,                 ,USART1_TX      ,                  ,CAN2_TX               ,               ,                               ,FMC_SDNE1         ,DCMI_D5      ,         ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                 ,                 ,USART1_RX      ,                  ,                      ,               ,                               ,FMC_NL            ,DCMI_VSYNC   ,         ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,ETH_MII_TXD3                   ,SDIO_D4           ,DCMI_D6      ,LCD_B6   ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,SDIO_D5           ,DCMI_D7      ,LCD_B7   ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX      ,                  ,                      ,OTG_HS_ULPI_D3 ,ETH_MII_RX_ER                  ,                  ,             ,LCD_G4   ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                 ,                 ,USART3_RX      ,                  ,                      ,OTG_HS_ULPI_D4 ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,             ,LCD_G5   ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK      ,                  ,CAN2_RX               ,OTG_HS_ULPI_D5 ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID         ,             ,         ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS     ,                  ,CAN2_TX               ,OTG_HS_ULPI_D6 ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                  ,             ,         ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO        ,I2S2ext_SD       ,USART3_RTS     ,                  ,TIM12_CH1             ,               ,                               ,OTG_HS_DM         ,             ,         ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,OTG_HS_DP         ,             ,         ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_STP,                               ,FMC_SDNWE         ,             ,         ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MDC                        ,                  ,             ,         ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,OTG_HS_ULPI_DIR,ETH_MII_TXD2                   ,FMC_SDNE0         ,             ,         ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK                 ,FMC_SDCKE0        ,             ,         ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD0/ETH_RMII_RXD0     ,                  ,             ,         ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD1/ETH_RMII_RXD1     ,                  ,             ,         ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK         ,                 ,               ,USART6_TX         ,                      ,               ,                               ,SDIO_D6           ,DCMI_D0      ,LCD_HSYNC,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                 ,I2S3_MCK         ,               ,USART6_RX         ,                      ,               ,                               ,SDIO_D7           ,DCMI_D1      ,LCD_G6   ,EVENTOUT,
+PortC,PC8 ,             ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,SDIO_D0           ,DCMI_D2      ,         ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN         ,                 ,               ,                  ,                      ,               ,                               ,SDIO_D1           ,DCMI_D3      ,         ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,            ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX      ,UART4_TX          ,                      ,               ,                               ,SDIO_D2           ,DCMI_D8      ,LCD_R2   ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,            ,         ,I2S3ext_SD       ,SPI3_MISO        ,USART3_RX      ,UART4_RX          ,                      ,               ,                               ,SDIO_D3           ,DCMI_D4      ,         ,EVENTOUT,
+PortC,PC12,             ,                 ,        ,            ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK      ,UART5_TX          ,                      ,               ,                               ,SDIO_CK           ,DCMI_D9      ,         ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D2            ,             ,         ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D3            ,             ,         ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR,            ,         ,                 ,                 ,               ,UART5_RX          ,                      ,               ,                               ,SDIO_CMD          ,DCMI_D11     ,         ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS     ,                  ,                      ,               ,                               ,FMC_CLK           ,DCMI_D5      ,LCD_G7   ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_RTS     ,                  ,                      ,               ,                               ,FMC_NOE           ,             ,         ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,                               ,FMC_NWE           ,             ,         ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,            ,         ,SPI3_MOSI/I2S3_SD,SAI1_SD_A        ,USART2_RX      ,                  ,                      ,               ,                               ,FMC_NWAIT         ,DCMI_D10     ,LCD_B2   ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_CK      ,                  ,                      ,               ,                               ,FMC_NE1/FMC_NCE2  ,             ,         ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_TX      ,                  ,                      ,               ,                               ,FMC_D13           ,             ,         ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_RX      ,                  ,                      ,               ,                               ,FMC_D14           ,             ,         ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CK      ,                  ,                      ,               ,                               ,FMC_D15           ,             ,LCD_B3   ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CTS     ,                  ,                      ,               ,                               ,FMC_A16           ,             ,         ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                 ,                 ,USART3_RTS     ,                  ,                      ,               ,                               ,FMC_A17           ,             ,         ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A18           ,             ,         ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D0            ,             ,         ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D1            ,             ,         ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                 ,                 ,               ,UART8_RX          ,                      ,               ,                               ,FMC_NBL0          ,DCMI_D2      ,         ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,UART8_TX          ,                      ,               ,                               ,FMC_NBL1          ,DCMI_D3      ,         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,SPI4_SCK         ,SAI1_MCLK_A      ,               ,                  ,                      ,               ,ETH_MII_TXD3                   ,FMC_A23           ,             ,         ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                 ,SAI1_SD_B        ,               ,                  ,                      ,               ,                               ,FMC_A19           ,             ,         ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,SPI4_NSS         ,SAI1_FS_A        ,               ,                  ,                      ,               ,                               ,FMC_A20           ,DCMI_D4      ,LCD_B0   ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,SPI4_MISO        ,SAI1_SCK_A       ,               ,                  ,                      ,               ,                               ,FMC_A21           ,DCMI_D6      ,LCD_G0   ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,SPI4_MOSI        ,SAI1_SD_A        ,               ,                  ,                      ,               ,                               ,FMC_A22           ,DCMI_D7      ,LCD_G1   ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,               ,UART7_RX          ,                      ,               ,                               ,FMC_D4            ,             ,         ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                 ,                 ,               ,UART7_TX          ,                      ,               ,                               ,FMC_D5            ,             ,         ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D6            ,             ,         ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D7            ,             ,         ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,SPI4_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_D8            ,             ,LCD_G3   ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,SPI4_SCK         ,                 ,               ,                  ,                      ,               ,                               ,FMC_D9            ,             ,LCD_B4   ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,SPI4_MISO        ,                 ,               ,                  ,                      ,               ,                               ,FMC_D10           ,             ,LCD_DE   ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,SPI4_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_D11           ,             ,LCD_CLK  ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D12           ,             ,LCD_R7   ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A0            ,             ,         ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A1            ,             ,         ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A2            ,             ,         ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A3            ,             ,         ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A4            ,             ,         ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A5            ,             ,         ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,SPI5_NSS         ,SAI1_SD_B        ,               ,UART7_RX          ,                      ,               ,                               ,FMC_NIORD         ,             ,         ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,SPI5_SCK         ,SAI1_MCLK_B      ,               ,UART7_TX          ,                      ,               ,                               ,FMC_NREG          ,             ,         ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,            ,         ,SPI5_MISO        ,SAI1_SCK_B       ,               ,                  ,TIM13_CH1             ,               ,                               ,FMC_NIOWR         ,             ,         ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,            ,         ,SPI5_MOSI        ,SAI1_FS_B        ,               ,                  ,TIM14_CH1             ,               ,                               ,FMC_CD            ,             ,         ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INTR          ,DCMI_D11     ,LCD_DE   ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,            ,         ,SPI5_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNRAS        ,DCMI_D12     ,         ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A6            ,             ,         ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A7            ,             ,         ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A8            ,             ,         ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A9            ,             ,         ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A10           ,             ,         ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A11           ,             ,         ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A12           ,             ,         ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A13           ,             ,         ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A14/FMC_BA0   ,             ,         ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A15/FMC_BA1   ,             ,         ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INT2          ,DCMI_D12     ,LCD_R7   ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,FMC_INT3          ,DCMI_D13     ,LCD_CLK  ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,            ,         ,SPI6_NSS         ,                 ,               ,USART6_RTS        ,                      ,               ,ETH_PPS_OUT                    ,FMC_SDCLK         ,             ,         ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_RX         ,                      ,               ,                               ,FMC_NE2/FMC_NCE3  ,DCMI_VSYNC(1),         ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,LCD_G3                ,               ,                               ,FMC_NCE4_1/FMC_NE3,DCMI_D2      ,LCD_B2   ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,FMC_NCE4_2        ,DCMI_D3      ,LCD_B3   ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,            ,         ,SPI6_MISO        ,                 ,               ,USART6_RTS        ,LCD_B4                ,               ,                               ,FMC_NE4           ,             ,LCD_B1   ,EVENTOUT,
+PortG,PG13,             ,                 ,        ,            ,         ,SPI6_SCK         ,                 ,               ,USART6_CTS        ,                      ,               ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24           ,             ,         ,EVENTOUT,
+PortG,PG14,             ,                 ,        ,            ,         ,SPI6_MOSI        ,                 ,               ,USART6_TX         ,                      ,               ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25           ,             ,         ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CTS        ,                      ,               ,                               ,FMC_SDNCAS        ,DCMI_D13     ,         ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_CRS                    ,FMC_SDCKE0        ,             ,LCD_R0   ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_COL                    ,FMC_SDNE0         ,             ,LCD_R1   ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,                               ,                  ,             ,         ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,SPI5_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNWE         ,             ,         ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,SPI5_SCK         ,                 ,               ,                  ,TIM12_CH1             ,               ,                               ,FMC_SDNE1         ,DCMI_D8      ,         ,        ,
+PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,SPI5_MISO        ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD3                   ,FMC_SDCKE1        ,DCMI_D9      ,         ,        ,
+PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D16           ,DCMI_HSYNC   ,LCD_R2   ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                 ,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,FMC_D17           ,DCMI_D0      ,LCD_R3   ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D18           ,DCMI_D1      ,LCD_R4   ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D19           ,DCMI_D2      ,LCD_R5   ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D20           ,DCMI_D3      ,LCD_R6   ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D21           ,             ,LCD_G2   ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D22           ,DCMI_D4      ,LCD_G3   ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D23           ,DCMI_D11     ,LCD_G4   ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,                      ,               ,                               ,FMC_D24           ,DCMI_D13     ,LCD_G5   ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,               ,                  ,                      ,               ,                               ,FMC_D25           ,DCMI_D8      ,LCD_G6   ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,               ,                               ,FMC_D26           ,DCMI_D9      ,LCD_G7   ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,               ,                               ,FMC_D27           ,DCMI_D10     ,         ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL2          ,DCMI_D5      ,LCD_B4   ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL3          ,DCMI_VSYNC   ,LCD_B5   ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D28           ,DCMI_D6      ,LCD_B6   ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D29           ,DCMI_D7      ,LCD_B7   ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D30           ,             ,LCD_VSYNC,EVENTOUT,
+PortI,PI10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RX_ER                  ,FMC_D31           ,             ,LCD_HSYNC,EVENTOUT,
+PortI,PI11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_DIR,                               ,                  ,             ,         ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_HSYNC,EVENTOUT,
+PortI,PI13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_VSYNC,EVENTOUT,
+PortI,PI14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_CLK  ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R0   ,EVENTOUT,
+PortJ,PJ0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R1   ,EVENTOUT,
+PortJ,PJ1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R2   ,EVENTOUT,
+PortJ,PJ2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R3   ,EVENTOUT,
+PortJ,PJ3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R4   ,EVENTOUT,
+PortJ,PJ4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R5   ,EVENTOUT,
+PortJ,PJ5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R6   ,EVENTOUT,
+PortJ,PJ6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R7   ,EVENTOUT,
+PortJ,PJ7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G0   ,EVENTOUT,
+PortJ,PJ8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G1   ,EVENTOUT,
+PortJ,PJ9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G2   ,EVENTOUT,
+PortJ,PJ10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G3   ,EVENTOUT,
+PortJ,PJ11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G4   ,EVENTOUT,
+PortJ,PJ12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B0   ,EVENTOUT,
+PortJ,PJ13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B1   ,EVENTOUT,
+PortJ,PJ14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B2   ,EVENTOUT,
+PortJ,PJ15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B3   ,EVENTOUT,
+PortK,PK0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G5   ,EVENTOUT,
+PortK,PK1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G6   ,EVENTOUT,
+PortK,PK2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G7   ,EVENTOUT,
+PortK,PK3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B4   ,EVENTOUT,
+PortK,PK4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B5   ,EVENTOUT,
+PortK,PK5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B6   ,EVENTOUT,
+PortK,PK6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B7   ,EVENTOUT,
+PortK,PK7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_DE   ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f439_af.csv b/ports/stm32/boards/stm32f439_af.csv
index 4fc1f1116c..94466c6c1a 100644
--- a/ports/stm32/boards/stm32f439_af.csv
+++ b/ports/stm32/boards/stm32f439_af.csv
@@ -1,170 +1,170 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/2/3/4/5/6,SPI2/3/SAI1,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH,FMC/SDIO/OTG2_FS,DCMI,LCD,SYS,
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC123_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9
-PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,FMC_SDNE1,DCMI_D5,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,LCD_B6,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,LCD_B7,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10
-PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC12_IN14
-PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC12_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,LCD_HSYNC,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,LCD_G6,EVENTOUT,
-PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,LCD_R2,EVENTOUT,
-PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT,
-PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT,
-PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,,,,,FMC_NE1/FMC_NCE2,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT,
-PortD,PD11,,,,,,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FMC_A17,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,,,,,,UART8_RX,,,,FMC_NBL0,DCMI_D2,,EVENTOUT,
-PortE,PE1,,,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,,,FMC_D4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,,,FMC_D5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,,,,,FMC_D6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FMC_D7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,SPI3_NSS,,,,,,FMC_D8,,LCD_G3,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,SPI3_SCK,,,,,,FMC_D9,,LCD_B4,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,SPI3_MISO,,,,,,FMC_D10,,LCD_DE,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,SP3_MOSI,,,,,,FMC_D11,,LCD_CLK,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
-PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4
-PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5
-PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,,,FMC_NIOWR,,,EVENTOUT,ADC3_IN6
-PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,,,FMC_CD,,,EVENTOUT,ADC3_IN7
-PortF,PF10,,,,,,,,,,,,,FMC_INTR,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8
-PortF,PF11,,,,,,SPI5_MOSI,,,,,,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,,,FMC_INT2,DCMI_D12,LCD_R7,EVENTOUT,
-PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT3,DCMI_D13,LCD_CLK,EVENTOUT,
-PortG,PG8,,,,,,SPI6_NSS,,,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT,
-PortG,PG9,,,,,,,,,USART6_RX,,,,FMC_NE2/FMC_NCE3,DCMI_VSYNC(1),,EVENTOUT,
-PortG,PG10,,,,,,,,,,LCD_G3,,,FMC_NCE4_1/FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT,
-PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FMC_NCE4_2,DCMI_D3,LCD_B3,EVENTOUT,
-PortG,PG12,,,,,,SPI6_MISO,,,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT,
-PortG,PG13,,,,,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,,EVENTOUT,
-PortG,PG14,,,,,,SPI6_MOSI,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT,
-PortH,PH3,,,,,,,,,,,,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT,
-PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT,
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,
-PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,DCMI_D8,,,
-PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,,
-PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT,
-PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT,
-PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT,
-PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT,
-PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT,
-PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT,
-PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT,
-PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT,
-PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
-PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT,
-PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT,
-PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT,
-PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT,
-PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT,
-PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT,
-PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT,
-PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT,
-PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT,
-PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT,
-PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT,
-PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT,
-PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT,
-PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT,
-PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT,
-PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT,
-PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT,
-PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT,
-PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT,
-PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT,
-PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT,
-PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT,
-PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT,
-PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT,
-PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT,
-PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT,
-PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT,
-PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5              ,AF6              ,AF7            ,AF8               ,AF9                   ,AF10           ,AF11                           ,AF12              ,AF13         ,AF14     ,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/2/3/4/5/6   ,SPI2/3/SAI1      ,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH                            ,FMC/SDIO/OTG2_FS  ,DCMI         ,LCD      ,SYS     ,
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                 ,                 ,USART2_CTS     ,UART4_TX          ,                      ,               ,ETH_MII_CRS                    ,                  ,             ,         ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                 ,                 ,USART2_RTS     ,UART4_RX          ,                      ,               ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                  ,             ,         ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,ETH_MDIO                       ,                  ,             ,         ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                 ,                 ,USART2_RX      ,                  ,                      ,OTG_HS_ULPI_D0 ,ETH_MII_COL                    ,                  ,             ,LCD_B5   ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK      ,                  ,                      ,               ,                               ,OTG_HS_SOF        ,DCMI_HSYNC   ,LCD_VSYNC,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK         ,                 ,               ,                  ,                      ,OTG_HS_ULPI_CK ,                               ,                  ,             ,         ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO        ,                 ,               ,                  ,TIM13_CH1             ,               ,                               ,                  ,DCMI_PIXCLK  ,LCD_G2   ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI        ,                 ,               ,                  ,TIM14_CH1             ,               ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,                  ,             ,         ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                 ,                 ,USART1_CK      ,                  ,                      ,OTG_FS_SOF     ,                               ,                  ,             ,LCD_R6   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,                 ,                 ,USART1_TX      ,                  ,                      ,               ,                               ,                  ,DCMI_D0      ,         ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                 ,                 ,USART1_RX      ,                  ,                      ,OTG_FS_ID      ,                               ,                  ,DCMI_D1      ,         ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                 ,                 ,USART1_CTS     ,                  ,CAN1_RX               ,OTG_FS_DM      ,                               ,                  ,             ,LCD_R4   ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,USART1_RTS     ,                  ,CAN1_TX               ,OTG_FS_DP      ,                               ,                  ,             ,LCD_R5   ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,LCD_R3                ,OTG_HS_ULPI_D1 ,ETH_MII_RXD2                   ,                  ,             ,         ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,LCD_R6                ,OTG_HS_ULPI_D2 ,ETH_MII_RXD3                   ,                  ,             ,         ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO        ,SPI3_MISO        ,I2S3ext_SD     ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,               ,                  ,CAN2_RX               ,OTG_HS_ULPI_D7 ,ETH_PPS_OUT                    ,FMC_SDCKE1        ,DCMI_D10     ,         ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                 ,                 ,USART1_TX      ,                  ,CAN2_TX               ,               ,                               ,FMC_SDNE1         ,DCMI_D5      ,         ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                 ,                 ,USART1_RX      ,                  ,                      ,               ,                               ,FMC_NL            ,DCMI_VSYNC   ,         ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,ETH_MII_TXD3                   ,SDIO_D4           ,DCMI_D6      ,LCD_B6   ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,SDIO_D5           ,DCMI_D7      ,LCD_B7   ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX      ,                  ,                      ,OTG_HS_ULPI_D3 ,ETH_MII_RX_ER                  ,                  ,             ,LCD_G4   ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                 ,                 ,USART3_RX      ,                  ,                      ,OTG_HS_ULPI_D4 ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,             ,LCD_G5   ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK      ,                  ,CAN2_RX               ,OTG_HS_ULPI_D5 ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID         ,             ,         ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS     ,                  ,CAN2_TX               ,OTG_HS_ULPI_D6 ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                  ,             ,         ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO        ,I2S2ext_SD       ,USART3_RTS     ,                  ,TIM12_CH1             ,               ,                               ,OTG_HS_DM         ,             ,         ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,OTG_HS_DP         ,             ,         ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_STP,                               ,FMC_SDNWE         ,             ,         ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MDC                        ,                  ,             ,         ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,OTG_HS_ULPI_DIR,ETH_MII_TXD2                   ,FMC_SDNE0         ,             ,         ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK                 ,FMC_SDCKE0        ,             ,         ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD0/ETH_RMII_RXD0     ,                  ,             ,         ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD1/ETH_RMII_RXD1     ,                  ,             ,         ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK         ,                 ,               ,USART6_TX         ,                      ,               ,                               ,SDIO_D6           ,DCMI_D0      ,LCD_HSYNC,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                 ,I2S3_MCK         ,               ,USART6_RX         ,                      ,               ,                               ,SDIO_D7           ,DCMI_D1      ,LCD_G6   ,EVENTOUT,
+PortC,PC8 ,             ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,SDIO_D0           ,DCMI_D2      ,         ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN         ,                 ,               ,                  ,                      ,               ,                               ,SDIO_D1           ,DCMI_D3      ,         ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,            ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX      ,UART4_TX          ,                      ,               ,                               ,SDIO_D2           ,DCMI_D8      ,LCD_R2   ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,            ,         ,I2S3ext_SD       ,SPI3_MISO        ,USART3_RX      ,UART4_RX          ,                      ,               ,                               ,SDIO_D3           ,DCMI_D4      ,         ,EVENTOUT,
+PortC,PC12,             ,                 ,        ,            ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK      ,UART5_TX          ,                      ,               ,                               ,SDIO_CK           ,DCMI_D9      ,         ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D2            ,             ,         ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D3            ,             ,         ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR,            ,         ,                 ,                 ,               ,UART5_RX          ,                      ,               ,                               ,SDIO_CMD          ,DCMI_D11     ,         ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS     ,                  ,                      ,               ,                               ,FMC_CLK           ,DCMI_D5      ,LCD_G7   ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_RTS     ,                  ,                      ,               ,                               ,FMC_NOE           ,             ,         ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,                               ,FMC_NWE           ,             ,         ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,            ,         ,I2S3_SD          ,SAI1_SD_A        ,USART2_RX      ,                  ,                      ,               ,                               ,FMC_NWAIT         ,DCMI_D10     ,LCD_B2   ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_CK      ,                  ,                      ,               ,                               ,FMC_NE1/FMC_NCE2  ,             ,         ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_TX      ,                  ,                      ,               ,                               ,FMC_D13           ,             ,         ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_RX      ,                  ,                      ,               ,                               ,FMC_D14           ,             ,         ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CK      ,                  ,                      ,               ,                               ,FMC_D15           ,             ,LCD_B3   ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CTS     ,                  ,                      ,               ,                               ,FMC_A16           ,             ,         ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                 ,                 ,USART3_RTS     ,                  ,                      ,               ,                               ,FMC_A17           ,             ,         ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A18           ,             ,         ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D0            ,             ,         ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D1            ,             ,         ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                 ,                 ,               ,UART8_RX          ,                      ,               ,                               ,FMC_NBL0          ,DCMI_D2      ,         ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,UART8_TX          ,                      ,               ,                               ,FMC_NBL1          ,DCMI_D3      ,         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,SPI4_SCK         ,SAI1_MCLK_A      ,               ,                  ,                      ,               ,ETH_MII_TXD3                   ,FMC_A23           ,             ,         ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                 ,SAI1_SD_B        ,               ,                  ,                      ,               ,                               ,FMC_A19           ,             ,         ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,SPI4_NSS         ,SAI1_FS_A        ,               ,                  ,                      ,               ,                               ,FMC_A20           ,DCMI_D4      ,LCD_B0   ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,SPI4_MISO        ,SAI1_SCK_A       ,               ,                  ,                      ,               ,                               ,FMC_A21           ,DCMI_D6      ,LCD_G0   ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,SPI4_MOSI        ,SAI1_SD_A        ,               ,                  ,                      ,               ,                               ,FMC_A22           ,DCMI_D7      ,LCD_G1   ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,               ,UART7_RX          ,                      ,               ,                               ,FMC_D4            ,             ,         ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                 ,                 ,               ,UART7_TX          ,                      ,               ,                               ,FMC_D5            ,             ,         ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D6            ,             ,         ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D7            ,             ,         ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,SPI4_NSS         ,SPI3_NSS         ,               ,                  ,                      ,               ,                               ,FMC_D8            ,             ,LCD_G3   ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,SPI4_SCK         ,SPI3_SCK         ,               ,                  ,                      ,               ,                               ,FMC_D9            ,             ,LCD_B4   ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,SPI4_MISO        ,SPI3_MISO        ,               ,                  ,                      ,               ,                               ,FMC_D10           ,             ,LCD_DE   ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,SPI4_MOSI        ,SP3_MOSI         ,               ,                  ,                      ,               ,                               ,FMC_D11           ,             ,LCD_CLK  ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D12           ,             ,LCD_R7   ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A0            ,             ,         ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A1            ,             ,         ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A2            ,             ,         ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A3            ,             ,         ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A4            ,             ,         ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A5            ,             ,         ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,SPI5_NSS         ,SAI1_SD_B        ,               ,UART7_RX          ,                      ,               ,                               ,FMC_NIORD         ,             ,         ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,SPI5_SCK         ,SAI1_MCLK_B      ,               ,UART7_TX          ,                      ,               ,                               ,FMC_NREG          ,             ,         ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,            ,         ,SPI5_MISO        ,SAI1_SCK_B       ,               ,                  ,TIM13_CH1             ,               ,                               ,FMC_NIOWR         ,             ,         ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,            ,         ,SPI5_MOSI        ,SAI1_FS_B        ,               ,                  ,TIM14_CH1             ,               ,                               ,FMC_CD            ,             ,         ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INTR          ,DCMI_D11     ,LCD_DE   ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,            ,         ,SPI5_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNRAS        ,DCMI_D12     ,         ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A6            ,             ,         ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A7            ,             ,         ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A8            ,             ,         ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A9            ,             ,         ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A10           ,             ,         ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A11           ,             ,         ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A12           ,             ,         ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A13           ,             ,         ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A14/FMC_BA0   ,             ,         ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A15/FMC_BA1   ,             ,         ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INT2          ,DCMI_D12     ,LCD_R7   ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,FMC_INT3          ,DCMI_D13     ,LCD_CLK  ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,            ,         ,SPI6_NSS         ,                 ,               ,USART6_RTS        ,                      ,               ,ETH_PPS_OUT                    ,FMC_SDCLK         ,             ,         ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_RX         ,                      ,               ,                               ,FMC_NE2/FMC_NCE3  ,DCMI_VSYNC(1),         ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,LCD_G3                ,               ,                               ,FMC_NCE4_1/FMC_NE3,DCMI_D2      ,LCD_B2   ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,FMC_NCE4_2        ,DCMI_D3      ,LCD_B3   ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,            ,         ,SPI6_MISO        ,                 ,               ,USART6_RTS        ,LCD_B4                ,               ,                               ,FMC_NE4           ,             ,LCD_B1   ,EVENTOUT,
+PortG,PG13,             ,                 ,        ,            ,         ,SPI6_SCK         ,                 ,               ,USART6_CTS        ,                      ,               ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24           ,             ,         ,EVENTOUT,
+PortG,PG14,             ,                 ,        ,            ,         ,SPI6_MOSI        ,                 ,               ,USART6_TX         ,                      ,               ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25           ,             ,         ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CTS        ,                      ,               ,                               ,FMC_SDNCAS        ,DCMI_D13     ,         ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_CRS                    ,FMC_SDCKE0        ,             ,LCD_R0   ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_COL                    ,FMC_SDNE0         ,             ,LCD_R1   ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,                               ,                  ,             ,         ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,SPI5_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNWE         ,             ,         ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,SPI5_SCK         ,                 ,               ,                  ,TIM12_CH1             ,               ,                               ,FMC_SDNE1         ,DCMI_D8      ,         ,        ,
+PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,SPI5_MISO        ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD3                   ,FMC_SDCKE1        ,DCMI_D9      ,         ,        ,
+PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D16           ,DCMI_HSYNC   ,LCD_R2   ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                 ,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,FMC_D17           ,DCMI_D0      ,LCD_R3   ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D18           ,DCMI_D1      ,LCD_R4   ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D19           ,DCMI_D2      ,LCD_R5   ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D20           ,DCMI_D3      ,LCD_R6   ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D21           ,             ,LCD_G2   ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D22           ,DCMI_D4      ,LCD_G3   ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D23           ,DCMI_D11     ,LCD_G4   ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,                      ,               ,                               ,FMC_D24           ,DCMI_D13     ,LCD_G5   ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,               ,                  ,                      ,               ,                               ,FMC_D25           ,DCMI_D8      ,LCD_G6   ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,               ,                               ,FMC_D26           ,DCMI_D9      ,LCD_G7   ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,               ,                               ,FMC_D27           ,DCMI_D10     ,         ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL2          ,DCMI_D5      ,LCD_B4   ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL3          ,DCMI_VSYNC   ,LCD_B5   ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D28           ,DCMI_D6      ,LCD_B6   ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D29           ,DCMI_D7      ,LCD_B7   ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D30           ,             ,LCD_VSYNC,EVENTOUT,
+PortI,PI10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RX_ER                  ,FMC_D31           ,             ,LCD_HSYNC,EVENTOUT,
+PortI,PI11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_DIR,                               ,                  ,             ,         ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_HSYNC,EVENTOUT,
+PortI,PI13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_VSYNC,EVENTOUT,
+PortI,PI14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_CLK  ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R0   ,EVENTOUT,
+PortJ,PJ0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R1   ,EVENTOUT,
+PortJ,PJ1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R2   ,EVENTOUT,
+PortJ,PJ2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R3   ,EVENTOUT,
+PortJ,PJ3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R4   ,EVENTOUT,
+PortJ,PJ4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R5   ,EVENTOUT,
+PortJ,PJ5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R6   ,EVENTOUT,
+PortJ,PJ6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R7   ,EVENTOUT,
+PortJ,PJ7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G0   ,EVENTOUT,
+PortJ,PJ8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G1   ,EVENTOUT,
+PortJ,PJ9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G2   ,EVENTOUT,
+PortJ,PJ10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G3   ,EVENTOUT,
+PortJ,PJ11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G4   ,EVENTOUT,
+PortJ,PJ12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B0   ,EVENTOUT,
+PortJ,PJ13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B1   ,EVENTOUT,
+PortJ,PJ14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B2   ,EVENTOUT,
+PortJ,PJ15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B3   ,EVENTOUT,
+PortK,PK0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G5   ,EVENTOUT,
+PortK,PK1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G6   ,EVENTOUT,
+PortK,PK2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G7   ,EVENTOUT,
+PortK,PK3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B4   ,EVENTOUT,
+PortK,PK4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B5   ,EVENTOUT,
+PortK,PK5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B6   ,EVENTOUT,
+PortK,PK6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B7   ,EVENTOUT,
+PortK,PK7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_DE   ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f446_af.csv b/ports/stm32/boards/stm32f446_af.csv
index 0838ed089d..0e80bbb9b0 100644
--- a/ports/stm32/boards/stm32f446_af.csv
+++ b/ports/stm32/boards/stm32f446_af.csv
@@ -1,116 +1,116 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4,SPI2/3/4/SAI1,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI/USART6/UART4/5/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI,SAI2/QUADSPI/OTG2_HS/OTG1_FS,OTG1_FS,FMC/SDIO/OTG2_FS,DCMI,,SYS,
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,,,,,EVENTOUT,ADC123_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCLK_B,,,,,EVENTOUT,ADC123_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,,,,,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,SAI1_FS_A,USART2_RX,,,OTG_HS_ULPI_D0,,,,,EVENTOUT,ADC123_IN3
-PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,I2S2_MCK,,,TIM13_CH1,,,,DCMI_PIXCLK,,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,,,FMC_SDNWE,,,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,SAI1_SD_B,USART1_TX,,,,,,DCMI_D0,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,UART4_RTS,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,SPI3_MOSI/I2S3_SD,UART4_CTS,,OTG_HS_ULPI_D1,,SDIO_D1,,,EVENTOUT,ADC12_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,,OTG_HS_ULPI_D2,,SDIO_D2,,,EVENTOUT,ADC12_IN9
-PortB,PB2,,TIM2_CH4,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,OTG_HS_ULPI_D4,,SDIO_CK,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,I2C2_SDA,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,I2C3_SDA,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,,FMC_SDCKE1,DCMI_D10,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,HDMI_CEC,I2C1_SCL,,,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,FMC_SDNE1,DCMI_D5,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,SPDIF_RX0,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT,
-PortB,PB8,,TIM2_CH1/TIM2_ETR,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,,SDIO_D4,DCMI_D6,,EVENTOUT,
-PortB,PB9,,TIM2_CH2,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,SAI1_FS_B,,,CAN1_TX,,,SDIO_D5,DCMI_D7,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,SAI1_SCK_A,USART3_TX,,,OTG_HS_ULPI_D3,,,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,SAI2_SD_A,,,,,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,SAI1_SCK_B,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,,OTG_HS_ID,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,,,,SAI1_MCLK_B,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10
-PortC,PC1,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,SPI2_MOSI/I2S2_SD,,,,,,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,,,I2S1_MCK,,,SPDIF_RX2,,,,FMC_SDNE0,,,EVENTOUT,ADC12_IN14
-PortC,PC5,,,,,,,,USART3_RX,SPDIF_RX3,,,,FMC_SDCKE0,,,EVENTOUT,ADC12_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,FMPI2C1_SCL,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,FMPI2C1_SDA,SPI2_SCK/I2S2_CK,I2S3_MCK,SPDIF_RX1,USART6_RX,,,,SDIO_D7,DCMI_D1,,EVENTOUT,
-PortC,PC8,TRACED0,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDIO_D1,DCMI_D3,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDIO_D2,DCMI_D8,,EVENTOUT,
-PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDIO_D3,DCMI_D4,,EVENTOUT,
-PortC,PC12,,,,,I2C2_SDA,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,SPI4_MISO,SPI3_MOSI/I2S3_SD,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,
-PortD,PD1,,,,,,,,SPI2_NSS/I2S2_WS,,CAN1_TX,,,FMC_D3,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT,
-PortD,PD3,TRACED1,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,QUADSPI_CLK,,,FMC_CLK,DCMI_D5,,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,SPDIF_RX0,,,,FMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,SPDIF_RX1,,,,FMC_D13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,,EVENTOUT,
-PortD,PD11,,,,,FMPI2C1_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,FMPI2C1_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,FMPI2C1_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,FMPI2C1_SCL,,,,SAI2_SCK_A,,,,FMC_D0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,FMPI2C1_SDA,,,,,,,,FMC_D1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,,,,,,,,SAI2_MCLK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT,
-PortE,PE1,,,,,,,,,,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,UART5_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,UART5_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8,,,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9,,,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10,,,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCLK_B,,FMC_D11,,,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
-PortF,PF6,,,,TIM10_CH1,,,SAI1_SD_B,,,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_IN4
-PortF,PF7,,,,TIM11_CH1,,,SAI1_MCLK_B,,,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_IN5
-PortF,PF8,,,,,,,SAI1_SCK_B,,,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_IN6
-PortF,PF9,,,,,,,SAI1_FS_B,,,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_IN7
-PortF,PF10,,,,,,,,,,,,,,DCMI_D11,,EVENTOUT,ADC3_IN8
-PortF,PF11,,,,,,,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,FMPI2C1_SMBA,,,,,,,,FMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,FMPI2C1_SCL,,,,,,,,FMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,FMPI2C1_SDA,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,QUADSPI_BK1_NCS,,,DCMI_D12,,EVENTOUT,
-PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,DCMI_D13,,EVENTOUT,
-PortG,PG8,,,,,,,,SPDIFRX_IN2,USART6_RTS,,,,FMC_SDCLK,,,EVENTOUT,
-PortG,PG9,,,,,,,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,,FMC_NE2/FMC_NCE3,DCMI_VSYNC,,EVENTOUT,
-PortG,PG10,,,,,,,,,,,SAI2_SD_B,,FMC_NE3,DCMI_D2,,EVENTOUT,
-PortG,PG11,,,,,,,SPI4_SCK,SPDIFRX_IN0,,,,,,DCMI_D3,,EVENTOUT,
-PortG,PG12,,,,,,,SPI4_MISO,SPDIFRX_IN1,USART6_RTS,,,,FMC_NE4,,,EVENTOUT,
-PortG,PG13,TRACED2,,,,,,SPI4_MOSI,,USART6_CTS,,,,FMC_A24,,,EVENTOUT,
-PortG,PG14,TRACED3,,,,,,SPI4_NSS,,USART6_TX,QUADSPI_BK2_IO3,,,FMC_A25,,,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3             ,AF4           ,AF5              ,AF6              ,AF7                            ,AF8                       ,AF9                       ,AF10                        ,AF11   ,AF12            ,AF13       ,AF14,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4       ,SPI2/3/4/SAI1    ,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI/USART6/UART4/5/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI,SAI2/QUADSPI/OTG2_HS/OTG1_FS,OTG1_FS,FMC/SDIO/OTG2_FS,DCMI       ,    ,SYS     ,
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR        ,              ,                 ,                 ,USART2_CTS                     ,UART4_TX                  ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,                ,              ,                 ,                 ,USART2_RTS                     ,UART4_RX                  ,QUADSPI_BK1_IO3           ,SAI2_MCLK_B                 ,       ,                ,           ,    ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1        ,              ,                 ,                 ,USART2_TX                      ,SAI2_SCK_B                ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2        ,              ,                 ,SAI1_FS_A        ,USART2_RX                      ,                          ,                          ,OTG_HS_ULPI_D0              ,       ,                ,           ,    ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,                ,              ,SPI1_NSS/I2S1_WS ,SPI3_NSS/I2S3_WS ,USART2_CK                      ,                          ,                          ,                            ,       ,OTG_HS_SOF      ,DCMI_HSYNC ,    ,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N       ,              ,SPI1_SCK/I2S1_CK ,                 ,                               ,                          ,                          ,OTG_HS_ULPI_CK              ,       ,                ,           ,    ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN       ,              ,SPI1_MISO        ,I2S2_MCK         ,                               ,                          ,TIM13_CH1                 ,                            ,       ,                ,DCMI_PIXCLK,    ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N       ,              ,SPI1_MOSI/I2S1_SD,                 ,                               ,                          ,TIM14_CH1                 ,                            ,       ,FMC_SDNWE       ,           ,    ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,                ,I2C3_SCL      ,                 ,                 ,USART1_CK                      ,                          ,                          ,OTG_FS_SOF                  ,       ,                ,           ,    ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,                ,I2C3_SMBA     ,SPI2_SCK/I2S2_CK ,SAI1_SD_B        ,USART1_TX                      ,                          ,                          ,                            ,       ,                ,DCMI_D0    ,    ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,                ,              ,                 ,                 ,USART1_RX                      ,                          ,                          ,OTG_FS_ID                   ,       ,                ,DCMI_D1    ,    ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,                ,              ,                 ,                 ,USART1_CTS                     ,                          ,CAN1_RX                   ,OTG_FS_DM                   ,       ,                ,           ,    ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,                ,              ,                 ,                 ,USART1_RTS                     ,SAI2_FS_B                 ,CAN1_TX                   ,OTG_FS_DP                   ,       ,                ,           ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,                ,HDMI_CEC      ,SPI1_NSS/I2S1_WS ,SPI3_NSS/I2S3_WS ,                               ,UART4_RTS                 ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N       ,              ,                 ,                 ,SPI3_MOSI/I2S3_SD              ,UART4_CTS                 ,                          ,OTG_HS_ULPI_D1              ,       ,SDIO_D1         ,           ,    ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N       ,              ,                 ,                 ,                               ,                          ,                          ,OTG_HS_ULPI_D2              ,       ,SDIO_D2         ,           ,    ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,TIM2_CH4         ,        ,                ,              ,                 ,SAI1_SD_A        ,SPI3_MOSI/I2S3_SD              ,                          ,QUADSPI_CLK               ,OTG_HS_ULPI_D4              ,       ,SDIO_CK         ,           ,    ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,                ,I2C2_SDA      ,SPI1_SCK/I2S1_CK ,SPI3_SCK/I2S3_CK ,                               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,                ,I2C3_SDA      ,SPI1_MISO        ,SPI3_MISO        ,SPI2_NSS/I2S2_WS               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,                ,I2C1_SMBA     ,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,                               ,                          ,CAN2_RX                   ,OTG_HS_ULPI_D7              ,       ,FMC_SDCKE1      ,DCMI_D10   ,    ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,HDMI_CEC        ,I2C1_SCL      ,                 ,                 ,USART1_TX                      ,                          ,CAN2_TX                   ,QUADSPI_BK1_NCS             ,       ,FMC_SDNE1       ,DCMI_D5    ,    ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,                ,I2C1_SDA      ,                 ,                 ,USART1_RX                      ,SPDIF_RX0                 ,                          ,                            ,       ,FMC_NL          ,DCMI_VSYNC ,    ,EVENTOUT,
+PortB,PB8 ,             ,TIM2_CH1/TIM2_ETR,TIM4_CH3,TIM10_CH1       ,I2C1_SCL      ,                 ,                 ,                               ,                          ,CAN1_RX                   ,                            ,       ,SDIO_D4         ,DCMI_D6    ,    ,EVENTOUT,
+PortB,PB9 ,             ,TIM2_CH2         ,TIM4_CH4,TIM11_CH1       ,I2C1_SDA      ,SPI2_NSS/I2S2_WS ,SAI1_FS_B        ,                               ,                          ,CAN1_TX                   ,                            ,       ,SDIO_D5         ,DCMI_D7    ,    ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,                ,I2C2_SCL      ,SPI2_SCK/I2S2_CK ,SAI1_SCK_A       ,USART3_TX                      ,                          ,                          ,OTG_HS_ULPI_D3              ,       ,                ,           ,    ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,                ,I2C2_SDA      ,                 ,                 ,USART3_RX                      ,SAI2_SD_A                 ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,                ,I2C2_SMBA     ,SPI2_NSS/I2S2_WS ,SAI1_SCK_B       ,USART3_CK                      ,                          ,CAN2_RX                   ,OTG_HS_ULPI_D5              ,       ,OTG_HS_ID       ,           ,    ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,                ,              ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS                     ,                          ,CAN2_TX                   ,OTG_HS_ULPI_D6              ,       ,                ,           ,    ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N       ,              ,SPI2_MISO        ,                 ,USART3_RTS                     ,                          ,TIM12_CH1                 ,                            ,       ,OTG_HS_DM       ,           ,    ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N       ,              ,SPI2_MOSI/I2S2_SD,                 ,                               ,                          ,TIM12_CH2                 ,                            ,       ,OTG_HS_DP       ,           ,    ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,                ,              ,                 ,SAI1_MCLK_B      ,                               ,                          ,                          ,OTG_HS_ULPI_STP             ,       ,FMC_SDNWE       ,           ,    ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,             ,                 ,        ,                ,              ,SPI3_MOSI/I2S3_SD,SAI1_SD_A        ,SPI2_MOSI/I2S2_SD              ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,                ,              ,SPI2_MISO        ,                 ,                               ,                          ,                          ,OTG_HS_ULPI_DIR             ,       ,FMC_SDNE0       ,           ,    ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,                ,              ,SPI2_MOSI/I2S2_SD,                 ,                               ,                          ,                          ,OTG_HS_ULPI_NXT             ,       ,FMC_SDCKE0      ,           ,    ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,                ,              ,I2S1_MCK         ,                 ,                               ,SPDIF_RX2                 ,                          ,                            ,       ,FMC_SDNE0       ,           ,    ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,                ,              ,                 ,                 ,USART3_RX                      ,SPDIF_RX3                 ,                          ,                            ,       ,FMC_SDCKE0      ,           ,    ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1        ,FMPI2C1_SCL   ,I2S2_MCK         ,                 ,                               ,USART6_TX                 ,                          ,                            ,       ,SDIO_D6         ,DCMI_D0    ,    ,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2        ,FMPI2C1_SDA   ,SPI2_SCK/I2S2_CK ,I2S3_MCK         ,SPDIF_RX1                      ,USART6_RX                 ,                          ,                            ,       ,SDIO_D7         ,DCMI_D1    ,    ,EVENTOUT,
+PortC,PC8 ,TRACED0      ,                 ,TIM3_CH3,TIM8_CH3        ,              ,                 ,                 ,UART5_RTS                      ,USART6_CK                 ,                          ,                            ,       ,SDIO_D0         ,DCMI_D2    ,    ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4        ,I2C3_SDA      ,I2S_CKIN         ,                 ,UART5_CTS                      ,                          ,QUADSPI_BK1_IO0           ,                            ,       ,SDIO_D1         ,DCMI_D3    ,    ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,                ,              ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX                      ,UART4_TX                  ,QUADSPI_BK1_IO1           ,                            ,       ,SDIO_D2         ,DCMI_D8    ,    ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,                ,              ,                 ,SPI3_MISO        ,USART3_RX                      ,UART4_RX                  ,QUADSPI_BK2_NCS           ,                            ,       ,SDIO_D3         ,DCMI_D4    ,    ,EVENTOUT,
+PortC,PC12,             ,                 ,        ,                ,I2C2_SDA      ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK                      ,UART5_TX                  ,                          ,                            ,       ,SDIO_CK         ,DCMI_D9    ,    ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,                ,              ,SPI4_MISO        ,SPI3_MOSI/I2S3_SD,                               ,                          ,CAN1_RX                   ,                            ,       ,FMC_D2          ,           ,    ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,                ,              ,                 ,                 ,SPI2_NSS/I2S2_WS               ,                          ,CAN1_TX                   ,                            ,       ,FMC_D3          ,           ,    ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR,                ,              ,                 ,                 ,                               ,UART5_RX                  ,                          ,                            ,       ,SDIO_CMD        ,DCMI_D11   ,    ,EVENTOUT,
+PortD,PD3 ,TRACED1      ,                 ,        ,                ,              ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS                     ,                          ,QUADSPI_CLK               ,                            ,       ,FMC_CLK         ,DCMI_D5    ,    ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,                ,              ,                 ,                 ,USART2_RTS                     ,                          ,                          ,                            ,       ,FMC_NOE         ,           ,    ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,                ,              ,                 ,                 ,USART2_TX                      ,                          ,                          ,                            ,       ,FMC_NWE         ,           ,    ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,                ,              ,SPI3_MOSI/I2S3_SD,SAI1_SD_A        ,USART2_RX                      ,                          ,                          ,                            ,       ,FMC_NWAIT       ,DCMI_D10   ,    ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,                ,              ,                 ,                 ,USART2_CK                      ,SPDIF_RX0                 ,                          ,                            ,       ,FMC_NE1         ,           ,    ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,                ,              ,                 ,                 ,USART3_TX                      ,SPDIF_RX1                 ,                          ,                            ,       ,FMC_D13         ,           ,    ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,                ,              ,                 ,                 ,USART3_RX                      ,                          ,                          ,                            ,       ,FMC_D14         ,           ,    ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,                ,              ,                 ,                 ,USART3_CK                      ,                          ,                          ,                            ,       ,FMC_D15         ,           ,    ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,                ,FMPI2C1_SMBA  ,                 ,                 ,USART3_CTS                     ,                          ,QUADSPI_BK1_IO0           ,SAI2_SD_A                   ,       ,FMC_A16         ,           ,    ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,                ,FMPI2C1_SCL   ,                 ,                 ,USART3_RTS                     ,                          ,QUADSPI_BK1_IO1           ,SAI2_FS_A                   ,       ,FMC_A17         ,           ,    ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,                ,FMPI2C1_SDA   ,                 ,                 ,                               ,                          ,QUADSPI_BK1_IO3           ,SAI2_SCK_A                  ,       ,FMC_A18         ,           ,    ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,                ,FMPI2C1_SCL   ,                 ,                 ,                               ,SAI2_SCK_A                ,                          ,                            ,       ,FMC_D0          ,           ,    ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,                ,FMPI2C1_SDA   ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_D1          ,           ,    ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,                ,              ,                 ,                 ,                               ,                          ,                          ,SAI2_MCLK_A                 ,       ,FMC_NBL0        ,DCMI_D2    ,    ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_NBL1        ,DCMI_D3    ,    ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,                ,              ,SPI4_SCK         ,SAI1_MCLK_A      ,                               ,                          ,QUADSPI_BK1_IO2           ,                            ,       ,FMC_A23         ,           ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,                ,              ,                 ,SAI1_SD_B        ,                               ,                          ,                          ,                            ,       ,FMC_A19         ,           ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,                ,              ,SPI4_NSS         ,SAI1_FS_A        ,                               ,                          ,                          ,                            ,       ,FMC_A20         ,DCMI_D4    ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1        ,              ,SPI4_MISO        ,SAI1_SCK_A       ,                               ,                          ,                          ,                            ,       ,FMC_A21         ,DCMI_D6    ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2        ,              ,SPI4_MOSI        ,SAI1_SD_A        ,                               ,                          ,                          ,                            ,       ,FMC_A22         ,DCMI_D7    ,    ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,                ,              ,                 ,                 ,                               ,UART5_RX                  ,                          ,QUADSPI_BK2_IO0             ,       ,FMC_D4          ,           ,    ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,                ,              ,                 ,                 ,                               ,UART5_TX                  ,                          ,QUADSPI_BK2_IO1             ,       ,FMC_D5          ,           ,    ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,QUADSPI_BK2_IO2             ,       ,FMC_D6          ,           ,    ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,QUADSPI_BK2_IO3             ,       ,FMC_D7          ,           ,    ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,                ,              ,SPI4_NSS         ,                 ,                               ,                          ,                          ,SAI2_SD_B                   ,       ,FMC_D8          ,           ,    ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,                ,              ,SPI4_SCK         ,                 ,                               ,                          ,                          ,SAI2_SCK_B                  ,       ,FMC_D9          ,           ,    ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,                ,              ,SPI4_MISO        ,                 ,                               ,                          ,                          ,SAI2_FS_B                   ,       ,FMC_D10         ,           ,    ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,                ,              ,SPI4_MOSI        ,                 ,                               ,                          ,                          ,SAI2_MCLK_B                 ,       ,FMC_D11         ,           ,    ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_D12         ,           ,    ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,                ,I2C2_SDA      ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A0          ,           ,    ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,                ,I2C2_SCL      ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A1          ,           ,    ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,                ,I2C2_SMBA     ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A2          ,           ,    ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A3          ,           ,    ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A4          ,           ,    ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A5          ,           ,    ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1       ,              ,                 ,SAI1_SD_B        ,                               ,                          ,QUADSPI_BK1_IO3           ,                            ,       ,                ,           ,    ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1       ,              ,                 ,SAI1_MCLK_B      ,                               ,                          ,QUADSPI_BK1_IO2           ,                            ,       ,                ,           ,    ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,                ,              ,                 ,SAI1_SCK_B       ,                               ,                          ,TIM13_CH1                 ,QUADSPI_BK1_IO0             ,       ,                ,           ,    ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,                ,              ,                 ,SAI1_FS_B        ,                               ,                          ,TIM14_CH1                 ,QUADSPI_BK1_IO1             ,       ,                ,           ,    ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,                ,DCMI_D11   ,    ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,SAI2_SD_B                   ,       ,FMC_SDNRAS      ,DCMI_D12   ,    ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A6          ,           ,    ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,                ,FMPI2C1_SMBA  ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A7          ,           ,    ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,                ,FMPI2C1_SCL   ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A8          ,           ,    ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,                ,FMPI2C1_SDA   ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A9          ,           ,    ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A10         ,           ,    ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A11         ,           ,    ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A12         ,           ,    ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A13         ,           ,    ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A14/FMC_BA0 ,           ,    ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,FMC_A15/FMC_BA1 ,           ,    ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,QUADSPI_BK1_NCS             ,       ,                ,DCMI_D12   ,    ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,USART6_CK                 ,                          ,                            ,       ,FMC_INT         ,DCMI_D13   ,    ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,                ,              ,                 ,                 ,SPDIFRX_IN2                    ,USART6_RTS                ,                          ,                            ,       ,FMC_SDCLK       ,           ,    ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,                ,              ,                 ,                 ,SPDIFRX_IN3                    ,USART6_RX                 ,QUADSPI_BK2_IO2           ,SAI2_FS_B                   ,       ,FMC_NE2/FMC_NCE3,DCMI_VSYNC ,    ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,SAI2_SD_B                   ,       ,FMC_NE3         ,DCMI_D2    ,    ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,                ,              ,                 ,SPI4_SCK         ,SPDIFRX_IN0                    ,                          ,                          ,                            ,       ,                ,DCMI_D3    ,    ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,                ,              ,                 ,SPI4_MISO        ,SPDIFRX_IN1                    ,USART6_RTS                ,                          ,                            ,       ,FMC_NE4         ,           ,    ,EVENTOUT,
+PortG,PG13,TRACED2      ,                 ,        ,                ,              ,                 ,SPI4_MOSI        ,                               ,USART6_CTS                ,                          ,                            ,       ,FMC_A24         ,           ,    ,EVENTOUT,
+PortG,PG14,TRACED3      ,                 ,        ,                ,              ,                 ,SPI4_NSS         ,                               ,USART6_TX                 ,QUADSPI_BK2_IO3           ,                            ,       ,FMC_A25         ,           ,    ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,                ,              ,                 ,                 ,                               ,USART6_CTS                ,                          ,                            ,       ,FMC_SDNCAS      ,DCMI_D13   ,    ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,                ,              ,                 ,                 ,                               ,                          ,                          ,                            ,       ,                ,           ,    ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f479_af.csv b/ports/stm32/boards/stm32f479_af.csv
index 7cbb242a52..a86926a84c 100644
--- a/ports/stm32/boards/stm32f479_af.csv
+++ b/ports/stm32/boards/stm32f479_af.csv
@@ -1,161 +1,161 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/2/3/4/5/6,SPI2/3/SAI1,SPI2/3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/QUADSPI/LCD,QUADSPI/OTG2_HS/OTG1_FS,ETH,FMC/SDIO/OTG2_FS,DCMI/DSIHOST,LCD,SYS,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT,ADC123_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,LCD_R1,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,LCD_B2,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,QUADSPI_CLK,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,LCD_G1,EVENTOUT,ADC12_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,LCD_G0,EVENTOUT,ADC12_IN9
-PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3_EXTSD,,,,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,LCD_G7,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,FMC_SDNE1,DCMI_D5,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,LCD_B6,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,LCD_B7,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,QUADSPI_BK1_NCS,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DSIHOST_TE,LCD_G5,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2_EXTSD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT,ADC123_IN10
-PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,,,,,SPI2_MISO,I2S2_EXTSD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT,ADC12_IN14
-PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT,ADC12_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,LCD_HSYNC,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,LCD_G6,EVENTOUT,
-PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,QUADSPI_BK1_IO0,,,SDIO_D1,DCMI_D3,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDIO_D2,DCMI_D8,LCD_R2,EVENTOUT,
-PortC,PC11,,,,,,I2S3_EXTSD,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDIO_D3,DCMI_D4,,EVENTOUT,
-PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,
-PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT,
-PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,,,,,FMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT,
-PortD,PD11,,,,,,,,USART3_CTS,,QUADSPI_BK1_IO0,,,FMC_A16/FMC_CLE,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,QUADSPI_BK1_IO1,,,FMC_A17/FMC_ALE,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,,,,,,QUADSPI_BK1_IO3,,,FMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,,,,,,UART8_RX,,,,FMC_NBL0,DCMI_D2,,EVENTOUT,
-PortE,PE1,,,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,,,FMC_D8,,LCD_G3,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,,,FMC_D9,,LCD_B4,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,,,FMC_D10,,LCD_DE,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,,,FMC_D11,,LCD_CLK,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
-PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_IN4
-PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_IN5
-PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_IN6
-PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_IN7
-PortF,PF10,,,,,,,,,,QUADSPI_CLK,,,,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8
-PortF,PF11,,,,,,SPI5_MOSI,,,,,,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,,,,DCMI_D12,LCD_R7,EVENTOUT,
-PortG,PG7,,,,,,,SAI1_MCLK_A,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT,
-PortG,PG8,,,,,,SPI6_NSS,,,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,LCD_G7,EVENTOUT,
-PortG,PG9,,,,,,,,,USART6_RX,QUADSPI_BK2_IO2,,,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT,
-PortG,PG10,,,,,,,,,,LCD_G3,,,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT,
-PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT,
-PortG,PG12,,,,,,SPI6_MISO,,,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT,
-PortG,PG13,TRACED0,,,,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT,
-PortG,PG14,TRACED1,,,,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,,,,,,,,,QUADSPI_BK2_IO0,,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT,
-PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT,
-PortH,PH4,,,,,I2C2_SCL,,,,,LCD_G5,OTG_HS_ULPI_NXT,,,,LCD_G4,EVENTOUT,
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,
-PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,,,EVENTOUT,
-PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT,
-PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT,
-PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT,
-PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT,
-PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT,
-PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT,
-PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT,
-PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2_EXTSD,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT,
-PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT,
-PortI,PI11,,,,,,,,,,LCD_G6,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
-PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT,
-PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT,
-PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT,
-PortI,PI15,,,,,,,,,,LCD_G2,,,,,LCD_R0,EVENTOUT,
-PortJ,PJ0,,,,,,,,,,LCD_R7,,,,,LCD_R1,EVENTOUT,
-PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT,
-PortJ,PJ2,,,,,,,,,,,,,,DSIHOST_TE,LCD_R3,EVENTOUT,
-PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT,
-PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT,
-PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT,
-PortJ,PJ12,,,,,,,,,,LCD_G3,,,,,LCD_B0,EVENTOUT,
-PortJ,PJ13,,,,,,,,,,LCD_G4,,,,,LCD_B1,EVENTOUT,
-PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT,
-PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT,
-PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT,
-PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT,
-PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT,
-PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT,
-PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5              ,AF6              ,AF7              ,AF8               ,AF9                           ,AF10                   ,AF11                           ,AF12            ,AF13        ,AF14     ,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/2/3/4/5/6   ,SPI2/3/SAI1      ,SPI2/3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/QUADSPI/LCD,QUADSPI/OTG2_HS/OTG1_FS,ETH                            ,FMC/SDIO/OTG2_FS,DCMI/DSIHOST,LCD      ,SYS     ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                 ,                 ,USART2_CTS       ,UART4_TX          ,                              ,                       ,ETH_MII_CRS                    ,                ,            ,         ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                 ,                 ,USART2_RTS       ,UART4_RX          ,QUADSPI_BK1_IO3               ,                       ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                ,            ,LCD_R2   ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                 ,                 ,USART2_TX        ,                  ,                              ,                       ,ETH_MDIO                       ,                ,            ,LCD_R1   ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                 ,                 ,USART2_RX        ,                  ,LCD_B2                        ,OTG_HS_ULPI_D0         ,ETH_MII_COL                    ,                ,            ,LCD_B5   ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK        ,                  ,                              ,                       ,                               ,OTG_HS_SOF      ,DCMI_HSYNC  ,LCD_VSYNC,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK         ,                 ,                 ,                  ,                              ,OTG_HS_ULPI_CK         ,                               ,                ,            ,LCD_R4   ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO        ,                 ,                 ,                  ,TIM13_CH1                     ,                       ,                               ,                ,DCMI_PIXCLK ,LCD_G2   ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI        ,                 ,                 ,                  ,TIM14_CH1                     ,QUADSPI_CLK            ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,FMC_SDNWE       ,            ,         ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                 ,                 ,USART1_CK        ,                  ,                              ,OTG_FS_SOF             ,                               ,                ,            ,LCD_R6   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,SPI2_SCK/I2S2_CK ,                 ,USART1_TX        ,                  ,                              ,                       ,                               ,                ,DCMI_D0     ,         ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                 ,                 ,USART1_RX        ,                  ,                              ,OTG_FS_ID              ,                               ,                ,DCMI_D1     ,         ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                 ,                 ,USART1_CTS       ,                  ,CAN1_RX                       ,OTG_FS_DM              ,                               ,                ,            ,LCD_R4   ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,USART1_RTS       ,                  ,CAN1_TX                       ,OTG_FS_DP              ,                               ,                ,            ,LCD_R5   ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                 ,                 ,                 ,                  ,LCD_R3                        ,OTG_HS_ULPI_D1         ,ETH_MII_RXD2                   ,                ,            ,LCD_G1   ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                 ,                 ,                 ,                  ,LCD_R6                        ,OTG_HS_ULPI_D2         ,ETH_MII_RXD3                   ,                ,            ,LCD_G0   ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO        ,SPI3_MISO        ,I2S3_EXTSD       ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,                 ,                  ,CAN2_RX                       ,OTG_HS_ULPI_D7         ,ETH_PPS_OUT                    ,FMC_SDCKE1      ,DCMI_D10    ,LCD_G7   ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                 ,                 ,USART1_TX        ,                  ,CAN2_TX                       ,QUADSPI_BK1_NCS        ,                               ,FMC_SDNE1       ,DCMI_D5     ,         ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                 ,                 ,USART1_RX        ,                  ,                              ,                       ,                               ,FMC_NL          ,DCMI_VSYNC  ,         ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                 ,                 ,                 ,                  ,CAN1_RX                       ,                       ,ETH_MII_TXD3                   ,SDIO_D4         ,DCMI_D6     ,LCD_B6   ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS ,                 ,                 ,                  ,CAN1_TX                       ,                       ,                               ,SDIO_D5         ,DCMI_D7     ,LCD_B7   ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX        ,                  ,QUADSPI_BK1_NCS               ,OTG_HS_ULPI_D3         ,ETH_MII_RX_ER                  ,                ,            ,LCD_G4   ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                 ,                 ,USART3_RX        ,                  ,                              ,OTG_HS_ULPI_D4         ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                ,DSIHOST_TE  ,LCD_G5   ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK        ,                  ,CAN2_RX                       ,OTG_HS_ULPI_D5         ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID       ,            ,         ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS       ,                  ,CAN2_TX                       ,OTG_HS_ULPI_D6         ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                ,            ,         ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO        ,I2S2_EXTSD       ,USART3_RTS       ,                  ,TIM12_CH1                     ,                       ,                               ,OTG_HS_DM       ,            ,         ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD,                 ,                 ,                  ,TIM12_CH2                     ,                       ,                               ,OTG_HS_DP       ,            ,         ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,OTG_HS_ULPI_STP        ,                               ,FMC_SDNWE       ,            ,LCD_R5   ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,TRACED0      ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,SAI1_SD_A        ,                 ,                  ,                              ,                       ,ETH_MDC                        ,                ,            ,         ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO        ,I2S2_EXTSD       ,                 ,                  ,                              ,OTG_HS_ULPI_DIR        ,ETH_MII_TXD2                   ,FMC_SDNE0       ,            ,         ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,                 ,                 ,                  ,                              ,OTG_HS_ULPI_NXT        ,ETH_MII_TX_CLK                 ,FMC_SDCKE0      ,            ,         ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,ETH_MII_RXD0/ETH_RMII_RXD0     ,FMC_SDNE0       ,            ,         ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,ETH_MII_RXD1/ETH_RMII_RXD1     ,FMC_SDCKE0      ,            ,         ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK         ,                 ,                 ,USART6_TX         ,                              ,                       ,                               ,SDIO_D6         ,DCMI_D0     ,LCD_HSYNC,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                 ,I2S3_MCK         ,                 ,USART6_RX         ,                              ,                       ,                               ,SDIO_D7         ,DCMI_D1     ,LCD_G6   ,EVENTOUT,
+PortC,PC8 ,TRACED1      ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                 ,                 ,                 ,USART6_CK         ,                              ,                       ,                               ,SDIO_D0         ,DCMI_D2     ,         ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN         ,                 ,                 ,                  ,QUADSPI_BK1_IO0               ,                       ,                               ,SDIO_D1         ,DCMI_D3     ,         ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,            ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX        ,UART4_TX          ,QUADSPI_BK1_IO1               ,                       ,                               ,SDIO_D2         ,DCMI_D8     ,LCD_R2   ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,            ,         ,I2S3_EXTSD       ,SPI3_MISO        ,USART3_RX        ,UART4_RX          ,QUADSPI_BK2_NCS               ,                       ,                               ,SDIO_D3         ,DCMI_D4     ,         ,EVENTOUT,
+PortC,PC12,TRACED3      ,                 ,        ,            ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK        ,UART5_TX          ,                              ,                       ,                               ,SDIO_CK         ,DCMI_D9     ,         ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,CAN1_RX                       ,                       ,                               ,FMC_D2          ,            ,         ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,CAN1_TX                       ,                       ,                               ,FMC_D3          ,            ,         ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                 ,TIM3_ETR,            ,         ,                 ,                 ,                 ,UART5_RX          ,                              ,                       ,                               ,SDIO_CMD        ,DCMI_D11    ,         ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS       ,                  ,                              ,                       ,                               ,FMC_CLK         ,DCMI_D5     ,LCD_G7   ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_RTS       ,                  ,                              ,                       ,                               ,FMC_NOE         ,            ,         ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_TX        ,                  ,                              ,                       ,                               ,FMC_NWE         ,            ,         ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,            ,         ,SPI3_MOSI/I2S3_SD,SAI1_SD_A        ,USART2_RX        ,                  ,                              ,                       ,                               ,FMC_NWAIT       ,DCMI_D10    ,LCD_B2   ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_CK        ,                  ,                              ,                       ,                               ,FMC_NE1         ,            ,         ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_TX        ,                  ,                              ,                       ,                               ,FMC_D13         ,            ,         ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_RX        ,                  ,                              ,                       ,                               ,FMC_D14         ,            ,         ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CK        ,                  ,                              ,                       ,                               ,FMC_D15         ,            ,LCD_B3   ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CTS       ,                  ,QUADSPI_BK1_IO0               ,                       ,                               ,FMC_A16/FMC_CLE ,            ,         ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                 ,                 ,USART3_RTS       ,                  ,QUADSPI_BK1_IO1               ,                       ,                               ,FMC_A17/FMC_ALE ,            ,         ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                 ,                 ,                 ,                  ,QUADSPI_BK1_IO3               ,                       ,                               ,FMC_A18         ,            ,         ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D0          ,            ,         ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D1          ,            ,         ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                 ,                 ,                 ,UART8_RX          ,                              ,                       ,                               ,FMC_NBL0        ,DCMI_D2     ,         ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,UART8_TX          ,                              ,                       ,                               ,FMC_NBL1        ,DCMI_D3     ,         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,SPI4_SCK         ,SAI1_MCLK_A      ,                 ,                  ,QUADSPI_BK1_IO2               ,                       ,ETH_MII_TXD3                   ,FMC_A23         ,            ,         ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                 ,SAI1_SD_B        ,                 ,                  ,                              ,                       ,                               ,FMC_A19         ,            ,         ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,SPI4_NSS         ,SAI1_FS_A        ,                 ,                  ,                              ,                       ,                               ,FMC_A20         ,DCMI_D4     ,LCD_B0   ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,SPI4_MISO        ,SAI1_SCK_A       ,                 ,                  ,                              ,                       ,                               ,FMC_A21         ,DCMI_D6     ,LCD_G0   ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,SPI4_MOSI        ,SAI1_SD_A        ,                 ,                  ,                              ,                       ,                               ,FMC_A22         ,DCMI_D7     ,LCD_G1   ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,                 ,UART7_RX          ,                              ,QUADSPI_BK2_IO0        ,                               ,FMC_D4          ,            ,         ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                 ,                 ,                 ,UART7_TX          ,                              ,QUADSPI_BK2_IO1        ,                               ,FMC_D5          ,            ,         ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,QUADSPI_BK2_IO2        ,                               ,FMC_D6          ,            ,         ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,QUADSPI_BK2_IO3        ,                               ,FMC_D7          ,            ,         ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,SPI4_NSS         ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D8          ,            ,LCD_G3   ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,SPI4_SCK         ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D9          ,            ,LCD_B4   ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,SPI4_MISO        ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D10         ,            ,LCD_DE   ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,SPI4_MOSI        ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D11         ,            ,LCD_CLK  ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D12         ,            ,LCD_R7   ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A0          ,            ,         ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A1          ,            ,         ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A2          ,            ,         ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A3          ,            ,         ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A4          ,            ,         ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A5          ,            ,         ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,SPI5_NSS         ,SAI1_SD_B        ,                 ,UART7_RX          ,QUADSPI_BK1_IO3               ,                       ,                               ,                ,            ,         ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,SPI5_SCK         ,SAI1_MCLK_B      ,                 ,UART7_TX          ,QUADSPI_BK1_IO2               ,                       ,                               ,                ,            ,         ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,            ,         ,SPI5_MISO        ,SAI1_SCK_B       ,                 ,                  ,TIM13_CH1                     ,QUADSPI_BK1_IO0        ,                               ,                ,            ,         ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,            ,         ,SPI5_MOSI        ,SAI1_FS_B        ,                 ,                  ,TIM14_CH1                     ,QUADSPI_BK1_IO1        ,                               ,                ,            ,         ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,QUADSPI_CLK                   ,                       ,                               ,                ,DCMI_D11    ,LCD_DE   ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,            ,         ,SPI5_MOSI        ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_SDNRAS      ,DCMI_D12    ,         ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A6          ,            ,         ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A7          ,            ,         ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A8          ,            ,         ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A9          ,            ,         ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A10         ,            ,         ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A11         ,            ,         ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A12         ,            ,         ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A13         ,            ,         ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A14/FMC_BA0 ,            ,         ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_A15/FMC_BA1 ,            ,         ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,DCMI_D12    ,LCD_R7   ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,            ,         ,                 ,SAI1_MCLK_A      ,                 ,USART6_CK         ,                              ,                       ,                               ,FMC_INT         ,DCMI_D13    ,LCD_CLK  ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,            ,         ,SPI6_NSS         ,                 ,                 ,USART6_RTS        ,                              ,                       ,ETH_PPS_OUT                    ,FMC_SDCLK       ,            ,LCD_G7   ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,USART6_RX         ,QUADSPI_BK2_IO2               ,                       ,                               ,FMC_NE2/FMC_NCE ,DCMI_VSYNC  ,         ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,LCD_G3                        ,                       ,                               ,FMC_NE3         ,DCMI_D2     ,LCD_B2   ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                ,DCMI_D3     ,LCD_B3   ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,            ,         ,SPI6_MISO        ,                 ,                 ,USART6_RTS        ,LCD_B4                        ,                       ,                               ,FMC_NE4         ,            ,LCD_B1   ,EVENTOUT,
+PortG,PG13,TRACED0      ,                 ,        ,            ,         ,SPI6_SCK         ,                 ,                 ,USART6_CTS        ,                              ,                       ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24         ,            ,LCD_R0   ,EVENTOUT,
+PortG,PG14,TRACED1      ,                 ,        ,            ,         ,SPI6_MOSI        ,                 ,                 ,USART6_TX         ,QUADSPI_BK2_IO3               ,                       ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25         ,            ,LCD_B0   ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,            ,         ,                 ,                 ,                 ,USART6_CTS        ,                              ,                       ,                               ,FMC_SDNCAS      ,DCMI_D13    ,         ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,QUADSPI_BK2_IO0               ,                       ,ETH_MII_CRS                    ,FMC_SDCKE0      ,            ,LCD_R0   ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,QUADSPI_BK2_IO1               ,                       ,ETH_MII_COL                    ,FMC_SDNE0       ,            ,LCD_R1   ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,                 ,                  ,LCD_G5                        ,OTG_HS_ULPI_NXT        ,                               ,                ,            ,LCD_G4   ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,SPI5_NSS         ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_SDNWE       ,            ,         ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,SPI5_SCK         ,                 ,                 ,                  ,TIM12_CH1                     ,                       ,ETH_MII_RXD2                   ,FMC_SDNE1       ,            ,         ,EVENTOUT,
+PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,SPI5_MISO        ,                 ,                 ,                  ,                              ,                       ,ETH_MII_RXD3                   ,FMC_SDCKE1      ,DCMI_D9     ,         ,EVENTOUT,
+PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D16         ,DCMI_HSYNC  ,LCD_R2   ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                 ,                 ,                 ,                  ,TIM12_CH2                     ,                       ,                               ,FMC_D17         ,DCMI_D0     ,LCD_R3   ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D18         ,DCMI_D1     ,LCD_R4   ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D19         ,DCMI_D2     ,LCD_R5   ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D20         ,DCMI_D3     ,LCD_R6   ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                 ,                 ,                 ,                  ,CAN1_TX                       ,                       ,                               ,FMC_D21         ,            ,LCD_G2   ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D22         ,DCMI_D4     ,LCD_G3   ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D23         ,DCMI_D11    ,LCD_G4   ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D24         ,DCMI_D13    ,LCD_G5   ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D25         ,DCMI_D8     ,LCD_G6   ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO        ,I2S2_EXTSD       ,                 ,                  ,                              ,                       ,                               ,FMC_D26         ,DCMI_D9     ,LCD_G7   ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D27         ,DCMI_D10    ,         ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_NBL2        ,DCMI_D5     ,LCD_B4   ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_NBL3        ,DCMI_VSYNC  ,LCD_B5   ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D28         ,DCMI_D6     ,LCD_B6   ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,FMC_D29         ,DCMI_D7     ,LCD_B7   ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,         ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,CAN1_RX                       ,                       ,                               ,FMC_D30         ,            ,LCD_VSYNC,EVENTOUT,
+PortI,PI10,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,ETH_MII_RX_ER                  ,FMC_D31         ,            ,LCD_HSYNC,EVENTOUT,
+PortI,PI11,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,LCD_G6                        ,OTG_HS_ULPI_DIR        ,                               ,                ,            ,         ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_HSYNC,EVENTOUT,
+PortI,PI13,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_VSYNC,EVENTOUT,
+PortI,PI14,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_CLK  ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,LCD_G2                        ,                       ,                               ,                ,            ,LCD_R0   ,EVENTOUT,
+PortJ,PJ0 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,LCD_R7                        ,                       ,                               ,                ,            ,LCD_R1   ,EVENTOUT,
+PortJ,PJ1 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_R2   ,EVENTOUT,
+PortJ,PJ2 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,DSIHOST_TE  ,LCD_R3   ,EVENTOUT,
+PortJ,PJ3 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_R4   ,EVENTOUT,
+PortJ,PJ4 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_R5   ,EVENTOUT,
+PortJ,PJ5 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_R6   ,EVENTOUT,
+PortJ,PJ12,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,LCD_G3                        ,                       ,                               ,                ,            ,LCD_B0   ,EVENTOUT,
+PortJ,PJ13,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,LCD_G4                        ,                       ,                               ,                ,            ,LCD_B1   ,EVENTOUT,
+PortJ,PJ14,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_B2   ,EVENTOUT,
+PortJ,PJ15,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_B3   ,EVENTOUT,
+PortK,PK3 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_B4   ,EVENTOUT,
+PortK,PK4 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_B5   ,EVENTOUT,
+PortK,PK5 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_B6   ,EVENTOUT,
+PortK,PK6 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_B7   ,EVENTOUT,
+PortK,PK7 ,             ,                 ,        ,            ,         ,                 ,                 ,                 ,                  ,                              ,                       ,                               ,                ,            ,LCD_DE   ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f722_af.csv b/ports/stm32/boards/stm32f722_af.csv
index 24500f5057..f353cde7dd 100644
--- a/ports/stm32/boards/stm32f722_af.csv
+++ b/ports/stm32/boards/stm32f722_af.csv
@@ -1,146 +1,146 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1,I2C1/2/3/USART1,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5,SPI2/I2S2/SPI3/I2S3/SPI3/I2S3/SAI1/UART4,SPI2/I2S2/SPI3/I2S3/USART1/2/3/UART5,SAI2/USART6/UART4/5/7/8/OTG1_FS,CAN1/TIM12/13/14/QUADSPI/FMC/OTG2_HS,SAI2/QUADSPI/SDMMC2/OTG2_HS/OTG1_FS,SDMMC2,UART7/FMC/SDMMC1/OTG2_FS,,,SYS,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,,,,,EVENTOUT,ADC123_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,,,,,EVENTOUT,ADC123_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,,,,,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,,,,,EVENTOUT,ADC123_IN3
-PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,,,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,,,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,,,FMC_SDNWE,,,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,UART4_RTS,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,UART4_CTS,,OTG_HS_ULPI_D1,,,,,EVENTOUT,ADC12_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,,OTG_HS_ULPI_D2,,,,,EVENTOUT,ADC12_IN9
-PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,SDMMC2_D2,,,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,SDMMC2_D3,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,,OTG_HS_ULPI_D7,,FMC_SDCKE1,,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,QUADSPI_BK1_NCS,,FMC_SDNE1,,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,SDMMC2_D4,,SDMMC1_D4,,,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,SDMMC2_D5,,SDMMC1_D5,,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,,,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,,,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,,OTG_HS_ULPI_D5,,OTG_HS_ID,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,,OTG_HS_ULPI_D6,,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,SDMMC2_D0,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,SDMMC2_D1,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,,,,,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10
-PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,,,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,,,I2S1_MCK,,,,,,,FMC_SDNE0,,,EVENTOUT,ADC12_IN14
-PortC,PC5,,,,,,,,,,,,,FMC_SDCKE0,,,EVENTOUT,ADC12_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,SDMMC2_D6,,SDMMC1_D6,,,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,SDMMC2_D7,,SDMMC1_D7,,,EVENTOUT,
-PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDMMC1_D0,,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDMMC1_D1,,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,,,EVENTOUT,
-PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,,,EVENTOUT,
-PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,
-PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,,,EVENTOUT,
-PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,,,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,SDMMC2_CK,FMC_NWAIT,,,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,,,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,,EVENTOUT,
-PortD,PD11,,,,,,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,,,EVENTOUT,
-PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,,,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,,,EVENTOUT,
-PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,,,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8,,,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9,,,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10,,,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
-PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_IN4
-PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_IN5
-PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_IN6
-PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_IN7
-PortF,PF10,,,,,,,,,,,,,,,,EVENTOUT,ADC3_IN8
-PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,,,EVENTOUT,
-PortG,PG8,,,,,,,,,USART6_RTS,,,,FMC_SDCLK,,,EVENTOUT,
-PortG,PG9,,,,,,,,,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,,,EVENTOUT,
-PortG,PG10,,,,,,,,,,,SAI2_SD_B,SDMMC2_D1,FMC_NE3,,,EVENTOUT,
-PortG,PG11,,,,,,,,,,,SDMMC2_D2,,,,,EVENTOUT,
-PortG,PG12,,,,LPTIM1_IN1,,,,,USART6_RTS,,,SDMMC2_D3,FMC_NE4,,,EVENTOUT,
-PortG,PG13,TRACED0,,,LPTIM1_OUT,,,,,USART6_CTS,,,,FMC_A24,,,EVENTOUT,
-PortG,PG14,TRACED1,,,LPTIM1_ETR,,,,,USART6_TX,QUADSPI_BK2_IO3,,,FMC_A25,,,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,,FMC_SDCKE0,,,EVENTOUT,
-PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,,FMC_SDNE0,,,EVENTOUT,
-PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT,
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,
-PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,,,EVENTOUT,
-PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,,FMC_SDCKE1,,,EVENTOUT,
-PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,,,EVENTOUT,
-PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,,,EVENTOUT,
-PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,,,EVENTOUT,
-PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,,,EVENTOUT,
-PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,,,EVENTOUT,
-PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,CAN1_TX,,,FMC_D21,,,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,CAN1_RX,,,FMC_D22,,,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,,,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,,,EVENTOUT,
-PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,,,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,,,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,,,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,,,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,,,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,,,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,UART4_RX,CAN1_RX,,,FMC_D30,,,EVENTOUT,
-PortI,PI10,,,,,,,,,,,,,FMC_D31,,,EVENTOUT,
-PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
-PortI,PI12,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI13,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI14,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI15,,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3                ,AF4            ,AF5                                 ,AF6                                     ,AF7                                 ,AF8                            ,AF9                                 ,AF10                               ,AF11      ,AF12                    ,AF13,AF14,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11/LPTIM1,I2C1/2/3/USART1,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5,SPI2/I2S2/SPI3/I2S3/SPI3/I2S3/SAI1/UART4,SPI2/I2S2/SPI3/I2S3/USART1/2/3/UART5,SAI2/USART6/UART4/5/7/8/OTG1_FS,CAN1/TIM12/13/14/QUADSPI/FMC/OTG2_HS,SAI2/QUADSPI/SDMMC2/OTG2_HS/OTG1_FS,SDMMC2    ,UART7/FMC/SDMMC1/OTG2_FS,    ,    ,SYS     ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR           ,               ,                                    ,                                        ,USART2_CTS                          ,UART4_TX                       ,                                    ,SAI2_SD_B                          ,          ,                        ,    ,    ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,                   ,               ,                                    ,                                        ,USART2_RTS                          ,UART4_RX                       ,QUADSPI_BK1_IO3                     ,SAI2_MCK_B                         ,          ,                        ,    ,    ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1           ,               ,                                    ,                                        ,USART2_TX                           ,SAI2_SCK_B                     ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2           ,               ,                                    ,                                        ,USART2_RX                           ,                               ,                                    ,OTG_HS_ULPI_D0                     ,          ,                        ,    ,    ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,                   ,               ,SPI1_NSS/I2S1_WS                    ,SPI3_NSS/I2S3_WS                        ,USART2_CK                           ,                               ,                                    ,                                   ,          ,OTG_HS_SOF              ,    ,    ,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N          ,               ,SPI1_SCK/I2S1_CK                    ,                                        ,                                    ,                               ,                                    ,OTG_HS_ULPI_CK                     ,          ,                        ,    ,    ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN          ,               ,SPI1_MISO                           ,                                        ,                                    ,                               ,TIM13_CH1                           ,                                   ,          ,                        ,    ,    ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N          ,               ,SPI1_MOSI/I2S1_SD                   ,                                        ,                                    ,                               ,TIM14_CH1                           ,                                   ,          ,FMC_SDNWE               ,    ,    ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,TIM8_BKIN2         ,I2C3_SCL       ,                                    ,                                        ,USART1_CK                           ,                               ,                                    ,OTG_FS_SOF                         ,          ,                        ,    ,    ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,                   ,I2C3_SMBA      ,SPI2_SCK/I2S2_CK                    ,                                        ,USART1_TX                           ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,                   ,               ,                                    ,                                        ,USART1_RX                           ,                               ,                                    ,OTG_FS_ID                          ,          ,                        ,    ,    ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,                   ,               ,                                    ,                                        ,USART1_CTS                          ,                               ,CAN1_RX                             ,OTG_FS_DM                          ,          ,                        ,    ,    ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,                   ,               ,                                    ,                                        ,USART1_RTS                          ,SAI2_FS_B                      ,CAN1_TX                             ,OTG_FS_DP                          ,          ,                        ,    ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,                   ,               ,SPI1_NSS/I2S1_WS                    ,SPI3_NSS/I2S3_WS                        ,                                    ,UART4_RTS                      ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N          ,               ,                                    ,                                        ,                                    ,UART4_CTS                      ,                                    ,OTG_HS_ULPI_D1                     ,          ,                        ,    ,    ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N          ,               ,                                    ,                                        ,                                    ,                               ,                                    ,OTG_HS_ULPI_D2                     ,          ,                        ,    ,    ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,                   ,               ,                                    ,SAI1_SD_A                               ,SPI3_MOSI/I2S3_SD                   ,                               ,QUADSPI_CLK                         ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,                   ,               ,SPI1_SCK/I2S1_CK                    ,SPI3_SCK/I2S3_CK                        ,                                    ,                               ,                                    ,SDMMC2_D2                          ,          ,                        ,    ,    ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,                   ,               ,SPI1_MISO                           ,SPI3_MISO                               ,SPI2_NSS/I2S2_WS                    ,                               ,                                    ,SDMMC2_D3                          ,          ,                        ,    ,    ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,                   ,I2C1_SMBA      ,SPI1_MOSI/I2S1_SD                   ,SPI3_MOSI/I2S3_SD                       ,                                    ,                               ,                                    ,OTG_HS_ULPI_D7                     ,          ,FMC_SDCKE1              ,    ,    ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,                   ,I2C1_SCL       ,                                    ,                                        ,USART1_TX                           ,                               ,                                    ,QUADSPI_BK1_NCS                    ,          ,FMC_SDNE1               ,    ,    ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,                   ,I2C1_SDA       ,                                    ,                                        ,USART1_RX                           ,                               ,                                    ,                                   ,          ,FMC_NL                  ,    ,    ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1          ,I2C1_SCL       ,                                    ,                                        ,                                    ,                               ,CAN1_RX                             ,SDMMC2_D4                          ,          ,SDMMC1_D4               ,    ,    ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1          ,I2C1_SDA       ,SPI2_NSS/I2S2_WS                    ,                                        ,                                    ,                               ,CAN1_TX                             ,SDMMC2_D5                          ,          ,SDMMC1_D5               ,    ,    ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,                   ,I2C2_SCL       ,SPI2_SCK/I2S2_CK                    ,                                        ,USART3_TX                           ,                               ,                                    ,OTG_HS_ULPI_D3                     ,          ,                        ,    ,    ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,                   ,I2C2_SDA       ,                                    ,                                        ,USART3_RX                           ,                               ,                                    ,OTG_HS_ULPI_D4                     ,          ,                        ,    ,    ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,                   ,I2C2_SMBA      ,SPI2_NSS/I2S2_WS                    ,                                        ,USART3_CK                           ,                               ,                                    ,OTG_HS_ULPI_D5                     ,          ,OTG_HS_ID               ,    ,    ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,                   ,               ,SPI2_SCK/I2S2_CK                    ,                                        ,USART3_CTS                          ,                               ,                                    ,OTG_HS_ULPI_D6                     ,          ,                        ,    ,    ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N          ,               ,SPI2_MISO                           ,                                        ,USART3_RTS                          ,                               ,TIM12_CH1                           ,SDMMC2_D0                          ,          ,OTG_HS_DM               ,    ,    ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N          ,               ,SPI2_MOSI/I2S2_SD                   ,                                        ,                                    ,                               ,TIM12_CH2                           ,SDMMC2_D1                          ,          ,OTG_HS_DP               ,    ,    ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,SAI2_FS_B                      ,                                    ,OTG_HS_ULPI_STP                    ,          ,FMC_SDNWE               ,    ,    ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,TRACED0      ,                 ,        ,                   ,               ,SPI2_MOSI/I2S2_SD                   ,SAI1_SD_A                               ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,                   ,               ,SPI2_MISO                           ,                                        ,                                    ,                               ,                                    ,OTG_HS_ULPI_DIR                    ,          ,FMC_SDNE0               ,    ,    ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,                   ,               ,SPI2_MOSI/I2S2_SD                   ,                                        ,                                    ,                               ,                                    ,OTG_HS_ULPI_NXT                    ,          ,FMC_SDCKE0              ,    ,    ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,                   ,               ,I2S1_MCK                            ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_SDNE0               ,    ,    ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_SDCKE0              ,    ,    ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1           ,               ,I2S2_MCK                            ,                                        ,                                    ,USART6_TX                      ,                                    ,SDMMC2_D6                          ,          ,SDMMC1_D6               ,    ,    ,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2           ,               ,                                    ,I2S3_MCK                                ,                                    ,USART6_RX                      ,                                    ,SDMMC2_D7                          ,          ,SDMMC1_D7               ,    ,    ,EVENTOUT,
+PortC,PC8 ,TRACED1      ,                 ,TIM3_CH3,TIM8_CH3           ,               ,                                    ,                                        ,UART5_RTS                           ,USART6_CK                      ,                                    ,                                   ,          ,SDMMC1_D0               ,    ,    ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4           ,I2C3_SDA       ,I2S_CKIN                            ,                                        ,UART5_CTS                           ,                               ,QUADSPI_BK1_IO0                     ,                                   ,          ,SDMMC1_D1               ,    ,    ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,                   ,               ,                                    ,SPI3_SCK/I2S3_CK                        ,USART3_TX                           ,UART4_TX                       ,QUADSPI_BK1_IO1                     ,                                   ,          ,SDMMC1_D2               ,    ,    ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,                   ,               ,                                    ,SPI3_MISO                               ,USART3_RX                           ,UART4_RX                       ,QUADSPI_BK2_NCS                     ,                                   ,          ,SDMMC1_D3               ,    ,    ,EVENTOUT,
+PortC,PC12,TRACED3      ,                 ,        ,                   ,               ,                                    ,SPI3_MOSI/I2S3_SD                       ,USART3_CK                           ,UART5_TX                       ,                                    ,                                   ,          ,SDMMC1_CK               ,    ,    ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,CAN1_RX                             ,                                   ,          ,FMC_D2                  ,    ,    ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,CAN1_TX                             ,                                   ,          ,FMC_D3                  ,    ,    ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                 ,TIM3_ETR,                   ,               ,                                    ,                                        ,                                    ,UART5_RX                       ,                                    ,                                   ,          ,SDMMC1_CMD              ,    ,    ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,                   ,               ,SPI2_SCK/I2S2_CK                    ,                                        ,USART2_CTS                          ,                               ,                                    ,                                   ,          ,FMC_CLK                 ,    ,    ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,USART2_RTS                          ,                               ,                                    ,                                   ,          ,FMC_NOE                 ,    ,    ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,USART2_TX                           ,                               ,                                    ,                                   ,          ,FMC_NWE                 ,    ,    ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,                   ,               ,SPI3_MOSI/I2S3_SD                   ,SAI1_SD_A                               ,USART2_RX                           ,                               ,                                    ,                                   ,SDMMC2_CK ,FMC_NWAIT               ,    ,    ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,USART2_CK                           ,                               ,                                    ,                                   ,SDMMC2_CMD,FMC_NE1                 ,    ,    ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,USART3_TX                           ,                               ,                                    ,                                   ,          ,FMC_D13                 ,    ,    ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,USART3_RX                           ,                               ,                                    ,                                   ,          ,FMC_D14                 ,    ,    ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,                   ,               ,                                    ,                                        ,USART3_CK                           ,                               ,                                    ,                                   ,          ,FMC_D15                 ,    ,    ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,                   ,               ,                                    ,                                        ,USART3_CTS                          ,                               ,QUADSPI_BK1_IO0                     ,SAI2_SD_A                          ,          ,FMC_A16/FMC_CLE         ,    ,    ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,LPTIM1_IN1         ,               ,                                    ,                                        ,USART3_RTS                          ,                               ,QUADSPI_BK1_IO1                     ,SAI2_FS_A                          ,          ,FMC_A17/FMC_ALE         ,    ,    ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,LPTIM1_OUT         ,               ,                                    ,                                        ,                                    ,                               ,QUADSPI_BK1_IO3                     ,SAI2_SCK_A                         ,          ,FMC_A18                 ,    ,    ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,                   ,               ,                                    ,                                        ,                                    ,UART8_CTS                      ,                                    ,                                   ,          ,FMC_D0                  ,    ,    ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,                   ,               ,                                    ,                                        ,                                    ,UART8_RTS                      ,                                    ,                                   ,          ,FMC_D1                  ,    ,    ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,LPTIM1_ETR         ,               ,                                    ,                                        ,                                    ,UART8_RX                       ,                                    ,SAI2_MCK_A                         ,          ,FMC_NBL0                ,    ,    ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,LPTIM1_IN2         ,               ,                                    ,                                        ,                                    ,UART8_TX                       ,                                    ,                                   ,          ,FMC_NBL1                ,    ,    ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,                   ,               ,SPI4_SCK                            ,SAI1_MCLK_A                             ,                                    ,                               ,QUADSPI_BK1_IO2                     ,                                   ,          ,FMC_A23                 ,    ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,                   ,               ,                                    ,SAI1_SD_B                               ,                                    ,                               ,                                    ,                                   ,          ,FMC_A19                 ,    ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,                   ,               ,SPI4_NSS                            ,SAI1_FS_A                               ,                                    ,                               ,                                    ,                                   ,          ,FMC_A20                 ,    ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1           ,               ,SPI4_MISO                           ,SAI1_SCK_A                              ,                                    ,                               ,                                    ,                                   ,          ,FMC_A21                 ,    ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,TIM1_BKIN2       ,        ,TIM9_CH2           ,               ,SPI4_MOSI                           ,SAI1_SD_A                               ,                                    ,                               ,                                    ,SAI2_MCK_B                         ,          ,FMC_A22                 ,    ,    ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,                   ,               ,                                    ,                                        ,                                    ,UART7_RX                       ,                                    ,QUADSPI_BK2_IO0                    ,          ,FMC_D4                  ,    ,    ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,                   ,               ,                                    ,                                        ,                                    ,UART7_TX                       ,                                    ,QUADSPI_BK2_IO1                    ,          ,FMC_D5                  ,    ,    ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,                   ,               ,                                    ,                                        ,                                    ,UART7_RTS                      ,                                    ,QUADSPI_BK2_IO2                    ,          ,FMC_D6                  ,    ,    ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,                   ,               ,                                    ,                                        ,                                    ,UART7_CTS                      ,                                    ,QUADSPI_BK2_IO3                    ,          ,FMC_D7                  ,    ,    ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,                   ,               ,SPI4_NSS                            ,                                        ,                                    ,                               ,                                    ,SAI2_SD_B                          ,          ,FMC_D8                  ,    ,    ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,                   ,               ,SPI4_SCK                            ,                                        ,                                    ,                               ,                                    ,SAI2_SCK_B                         ,          ,FMC_D9                  ,    ,    ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,                   ,               ,SPI4_MISO                           ,                                        ,                                    ,                               ,                                    ,SAI2_FS_B                          ,          ,FMC_D10                 ,    ,    ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,                   ,               ,SPI4_MOSI                           ,                                        ,                                    ,                               ,                                    ,SAI2_MCK_B                         ,          ,FMC_D11                 ,    ,    ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D12                 ,    ,    ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,                   ,I2C2_SDA       ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A0                  ,    ,    ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,                   ,I2C2_SCL       ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A1                  ,    ,    ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,                   ,I2C2_SMBA      ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A2                  ,    ,    ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A3                  ,    ,    ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A4                  ,    ,    ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A5                  ,    ,    ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1          ,               ,SPI5_NSS                            ,SAI1_SD_B                               ,                                    ,UART7_RX                       ,QUADSPI_BK1_IO3                     ,                                   ,          ,                        ,    ,    ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1          ,               ,SPI5_SCK                            ,SAI1_MCLK_B                             ,                                    ,UART7_TX                       ,QUADSPI_BK1_IO2                     ,                                   ,          ,                        ,    ,    ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,                   ,               ,SPI5_MISO                           ,SAI1_SCK_B                              ,                                    ,UART7_RTS                      ,TIM13_CH1                           ,QUADSPI_BK1_IO0                    ,          ,                        ,    ,    ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,                   ,               ,SPI5_MOSI                           ,SAI1_FS_B                               ,                                    ,UART7_CTS                      ,TIM14_CH1                           ,QUADSPI_BK1_IO1                    ,          ,                        ,    ,    ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,                   ,               ,SPI5_MOSI                           ,                                        ,                                    ,                               ,                                    ,SAI2_SD_B                          ,          ,FMC_SDNRAS              ,    ,    ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A6                  ,    ,    ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A7                  ,    ,    ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A8                  ,    ,    ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A9                  ,    ,    ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A10                 ,    ,    ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A11                 ,    ,    ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A12                 ,    ,    ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A13                 ,    ,    ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A14/FMC_BA0         ,    ,    ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_A15/FMC_BA1         ,    ,    ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,USART6_CK                      ,                                    ,                                   ,          ,FMC_INT                 ,    ,    ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,USART6_RTS                     ,                                    ,                                   ,          ,FMC_SDCLK               ,    ,    ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,USART6_RX                      ,QUADSPI_BK2_IO2                     ,SAI2_FS_B                          ,SDMMC2_D0 ,FMC_NE2/FMC_NCE         ,    ,    ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,SAI2_SD_B                          ,SDMMC2_D1 ,FMC_NE3                 ,    ,    ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,SDMMC2_D2                          ,          ,                        ,    ,    ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,LPTIM1_IN1         ,               ,                                    ,                                        ,                                    ,USART6_RTS                     ,                                    ,                                   ,SDMMC2_D3 ,FMC_NE4                 ,    ,    ,EVENTOUT,
+PortG,PG13,TRACED0      ,                 ,        ,LPTIM1_OUT         ,               ,                                    ,                                        ,                                    ,USART6_CTS                     ,                                    ,                                   ,          ,FMC_A24                 ,    ,    ,EVENTOUT,
+PortG,PG14,TRACED1      ,                 ,        ,LPTIM1_ETR         ,               ,                                    ,                                        ,                                    ,USART6_TX                      ,QUADSPI_BK2_IO3                     ,                                   ,          ,FMC_A25                 ,    ,    ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,USART6_CTS                     ,                                    ,                                   ,          ,FMC_SDNCAS              ,    ,    ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,LPTIM1_IN2         ,               ,                                    ,                                        ,                                    ,                               ,QUADSPI_BK2_IO0                     ,SAI2_SCK_B                         ,          ,FMC_SDCKE0              ,    ,    ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,QUADSPI_BK2_IO1                     ,SAI2_MCK_B                         ,          ,FMC_SDNE0               ,    ,    ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,                   ,I2C2_SCL       ,                                    ,                                        ,                                    ,                               ,                                    ,OTG_HS_ULPI_NXT                    ,          ,                        ,    ,    ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,                   ,I2C2_SDA       ,SPI5_NSS                            ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_SDNWE               ,    ,    ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,                   ,I2C2_SMBA      ,SPI5_SCK                            ,                                        ,                                    ,                               ,TIM12_CH1                           ,                                   ,          ,FMC_SDNE1               ,    ,    ,EVENTOUT,
+PortH,PH7 ,             ,                 ,        ,                   ,I2C3_SCL       ,SPI5_MISO                           ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_SDCKE1              ,    ,    ,EVENTOUT,
+PortH,PH8 ,             ,                 ,        ,                   ,I2C3_SDA       ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D16                 ,    ,    ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,                   ,I2C3_SMBA      ,                                    ,                                        ,                                    ,                               ,TIM12_CH2                           ,                                   ,          ,FMC_D17                 ,    ,    ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D18                 ,    ,    ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D19                 ,    ,    ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D20                 ,    ,    ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N          ,               ,                                    ,                                        ,                                    ,UART4_TX                       ,CAN1_TX                             ,                                   ,          ,FMC_D21                 ,    ,    ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N          ,               ,                                    ,                                        ,                                    ,UART4_RX                       ,CAN1_RX                             ,                                   ,          ,FMC_D22                 ,    ,    ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N          ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D23                 ,    ,    ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,                   ,               ,SPI2_NSS/I2S2_WS                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D24                 ,    ,    ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,TIM8_BKIN2         ,               ,SPI2_SCK/I2S2_CK                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D25                 ,    ,    ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4           ,               ,SPI2_MISO                           ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D26                 ,    ,    ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR           ,               ,SPI2_MOSI/I2S2_SD                   ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D27                 ,    ,    ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN          ,               ,                                    ,                                        ,                                    ,                               ,                                    ,SAI2_MCK_A                         ,          ,FMC_NBL2                ,    ,    ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1           ,               ,                                    ,                                        ,                                    ,                               ,                                    ,SAI2_SCK_A                         ,          ,FMC_NBL3                ,    ,    ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2           ,               ,                                    ,                                        ,                                    ,                               ,                                    ,SAI2_SD_A                          ,          ,FMC_D28                 ,    ,    ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3           ,               ,                                    ,                                        ,                                    ,                               ,                                    ,SAI2_FS_A                          ,          ,FMC_D29                 ,    ,    ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,UART4_RX                       ,CAN1_RX                             ,                                   ,          ,FMC_D30                 ,    ,    ,EVENTOUT,
+PortI,PI10,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,FMC_D31                 ,    ,    ,EVENTOUT,
+PortI,PI11,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,OTG_HS_ULPI_DIR                    ,          ,                        ,    ,    ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortI,PI13,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortI,PI14,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,                   ,               ,                                    ,                                        ,                                    ,                               ,                                    ,                                   ,          ,                        ,    ,    ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f746_af.csv b/ports/stm32/boards/stm32f746_af.csv
index d9e42008d6..167feb6d62 100644
--- a/ports/stm32/boards/stm32f746_af.csv
+++ b/ports/stm32/boards/stm32f746_af.csv
@@ -1,170 +1,170 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4/5/6,SPI3/SAI1,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI2/USART6/UART4/5/7/8/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI/LCD,SAI2/QUADSPI/OTG2_HS/OTG1_FS,ETH/OTG1_FS,FMC/SDMMC1/OTG2_FS,DCMI,LCD,SYS,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT,ADC123_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,,,LCD_R1,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3
-PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,UART4_RTS,,,,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9
-PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,HDMI_CEC,I2C1_SCL,,,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,FMC_SDNE1,DCMI_D5,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,,,,,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT,ADC123_IN10
-PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT,ADC12_IN14
-PortC,PC5,,,,,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT,ADC12_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT,
-PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDMMC1_D0,DCMI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDMMC1_D1,DCMI_D3,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT,
-PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT,
-PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,
-PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,
-PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT,
-PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT,
-PortD,PD7,,,,,,,,USART2_CK,SPDIFRX_IN0,,,,FMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT,
-PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT,
-PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
-PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8,,LCD_G3,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9,,LCD_B4,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10,,LCD_DE,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,LCD_CLK,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
-PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_IN4
-PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_IN5
-PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_IN6
-PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_IN7
-PortF,PF10,,,,,,,,,,,,,,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8
-PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,,,,DCMI_D12,LCD_R7,EVENTOUT,
-PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT,
-PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT,
-PortG,PG9,,,,,,,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT,
-PortG,PG10,,,,,,,,,,LCD_G3,SAI2_SD_B,,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT,
-PortG,PG11,,,,,,,,SPDIFRX_IN0,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT,
-PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT,
-PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT,
-PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT,
-PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT,
-PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT,
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,
-PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT,
-PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT,
-PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT,
-PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT,
-PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT,
-PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT,
-PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT,
-PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT,
-PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT,
-PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT,
-PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
-PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT,
-PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT,
-PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT,
-PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT,
-PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT,
-PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT,
-PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT,
-PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT,
-PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT,
-PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT,
-PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT,
-PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT,
-PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT,
-PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT,
-PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT,
-PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT,
-PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT,
-PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT,
-PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT,
-PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT,
-PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT,
-PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT,
-PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT,
-PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT,
-PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT,
-PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT,
-PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT,
-PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3                    ,AF4           ,AF5              ,AF6              ,AF7                            ,AF8                            ,AF9                           ,AF10                        ,AF11                           ,AF12              ,AF13       ,AF14     ,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11/LPTIM1/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4/5/6   ,SPI3/SAI1        ,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI2/USART6/UART4/5/7/8/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI/LCD,SAI2/QUADSPI/OTG2_HS/OTG1_FS,ETH/OTG1_FS                    ,FMC/SDMMC1/OTG2_FS,DCMI       ,LCD      ,SYS     ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR               ,              ,                 ,                 ,USART2_CTS                     ,UART4_TX                       ,                              ,SAI2_SD_B                   ,ETH_MII_CRS                    ,                  ,           ,         ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,                       ,              ,                 ,                 ,USART2_RTS                     ,UART4_RX                       ,QUADSPI_BK1_IO3               ,SAI2_MCK_B                  ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                  ,           ,LCD_R2   ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1               ,              ,                 ,                 ,USART2_TX                      ,SAI2_SCK_B                     ,                              ,                            ,ETH_MDIO                       ,                  ,           ,LCD_R1   ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2               ,              ,                 ,                 ,USART2_RX                      ,                               ,                              ,OTG_HS_ULPI_D0              ,ETH_MII_COL                    ,                  ,           ,LCD_B5   ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,                       ,              ,SPI1_NSS/I2S1_WS ,SPI3_NSS/I2S3_WS ,USART2_CK                      ,                               ,                              ,                            ,                               ,OTG_HS_SOF        ,DCMI_HSYNC ,LCD_VSYNC,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N              ,              ,SPI1_SCK/I2S1_CK ,                 ,                               ,                               ,                              ,OTG_HS_ULPI_CK              ,                               ,                  ,           ,LCD_R4   ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN              ,              ,SPI1_MISO        ,                 ,                               ,                               ,TIM13_CH1                     ,                            ,                               ,                  ,DCMI_PIXCLK,LCD_G2   ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N              ,              ,SPI1_MOSI/I2S1_SD,                 ,                               ,                               ,TIM14_CH1                     ,                            ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,FMC_SDNWE         ,           ,         ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,TIM8_BKIN2             ,I2C3_SCL      ,                 ,                 ,USART1_CK                      ,                               ,                              ,OTG_FS_SOF                  ,                               ,                  ,           ,LCD_R6   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,                       ,I2C3_SMBA     ,SPI2_SCK/I2S2_CK ,                 ,USART1_TX                      ,                               ,                              ,                            ,                               ,                  ,DCMI_D0    ,         ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,                       ,              ,                 ,                 ,USART1_RX                      ,                               ,                              ,OTG_FS_ID                   ,                               ,                  ,DCMI_D1    ,         ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,                       ,              ,                 ,                 ,USART1_CTS                     ,                               ,CAN1_RX                       ,OTG_FS_DM                   ,                               ,                  ,           ,LCD_R4   ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,                       ,              ,                 ,                 ,USART1_RTS                     ,SAI2_FS_B                      ,CAN1_TX                       ,OTG_FS_DP                   ,                               ,                  ,           ,LCD_R5   ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,                       ,HDMI_CEC      ,SPI1_NSS/I2S1_WS ,SPI3_NSS/I2S3_WS ,                               ,UART4_RTS                      ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N              ,              ,                 ,                 ,                               ,UART4_CTS                      ,LCD_R3                        ,OTG_HS_ULPI_D1              ,ETH_MII_RXD2                   ,                  ,           ,         ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N              ,              ,                 ,                 ,                               ,                               ,LCD_R6                        ,OTG_HS_ULPI_D2              ,ETH_MII_RXD3                   ,                  ,           ,         ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,                       ,              ,                 ,SAI1_SD_A        ,SPI3_MOSI/I2S3_SD              ,                               ,QUADSPI_CLK                   ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,                       ,              ,SPI1_SCK/I2S1_CK ,SPI3_SCK/I2S3_CK ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,                       ,              ,SPI1_MISO        ,SPI3_MISO        ,SPI2_NSS/I2S2_WS               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,                       ,I2C1_SMBA     ,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,                               ,                               ,CAN2_RX                       ,OTG_HS_ULPI_D7              ,ETH_PPS_OUT                    ,FMC_SDCKE1        ,DCMI_D10   ,         ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,HDMI_CEC               ,I2C1_SCL      ,                 ,                 ,USART1_TX                      ,                               ,CAN2_TX                       ,QUADSPI_BK1_NCS             ,                               ,FMC_SDNE1         ,DCMI_D5    ,         ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,                       ,I2C1_SDA      ,                 ,                 ,USART1_RX                      ,                               ,                              ,                            ,                               ,FMC_NL            ,DCMI_VSYNC ,         ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1              ,I2C1_SCL      ,                 ,                 ,                               ,                               ,CAN1_RX                       ,                            ,ETH_MII_TXD3                   ,SDMMC1_D4         ,DCMI_D6    ,LCD_B6   ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1              ,I2C1_SDA      ,SPI2_NSS/I2S2_WS ,                 ,                               ,                               ,CAN1_TX                       ,                            ,                               ,SDMMC1_D5         ,DCMI_D7    ,LCD_B7   ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,                       ,I2C2_SCL      ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX                      ,                               ,                              ,OTG_HS_ULPI_D3              ,ETH_MII_RX_ER                  ,                  ,           ,LCD_G4   ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,                       ,I2C2_SDA      ,                 ,                 ,USART3_RX                      ,                               ,                              ,OTG_HS_ULPI_D4              ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,           ,LCD_G5   ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,                       ,I2C2_SMBA     ,SPI2_NSS/I2S2_WS ,                 ,USART3_CK                      ,                               ,CAN2_RX                       ,OTG_HS_ULPI_D5              ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID         ,           ,         ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,                       ,              ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS                     ,                               ,CAN2_TX                       ,OTG_HS_ULPI_D6              ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                  ,           ,         ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N              ,              ,SPI2_MISO        ,                 ,USART3_RTS                     ,                               ,TIM12_CH1                     ,                            ,                               ,OTG_HS_DM         ,           ,         ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N              ,              ,SPI2_MOSI/I2S2_SD,                 ,                               ,                               ,TIM12_CH2                     ,                            ,                               ,OTG_HS_DP         ,           ,         ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,SAI2_FS_B                      ,                              ,OTG_HS_ULPI_STP             ,                               ,FMC_SDNWE         ,           ,LCD_R5   ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,TRACED0      ,                 ,        ,                       ,              ,SPI2_MOSI/I2S2_SD,SAI1_SD_A        ,                               ,                               ,                              ,                            ,ETH_MDC                        ,                  ,           ,         ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,                       ,              ,SPI2_MISO        ,                 ,                               ,                               ,                              ,OTG_HS_ULPI_DIR             ,ETH_MII_TXD2                   ,FMC_SDNE0         ,           ,         ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,                       ,              ,SPI2_MOSI/I2S2_SD,                 ,                               ,                               ,                              ,OTG_HS_ULPI_NXT             ,ETH_MII_TX_CLK                 ,FMC_SDCKE0        ,           ,         ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,                       ,              ,I2S1_MCK         ,                 ,                               ,SPDIFRX_IN2                    ,                              ,                            ,ETH_MII_RXD0/ETH_RMII_RXD0     ,FMC_SDNE0         ,           ,         ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,SPDIFRX_IN3                    ,                              ,                            ,ETH_MII_RXD1/ETH_RMII_RXD1     ,FMC_SDCKE0        ,           ,         ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1               ,              ,I2S2_MCK         ,                 ,                               ,USART6_TX                      ,                              ,                            ,                               ,SDMMC1_D6         ,DCMI_D0    ,LCD_HSYNC,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2               ,              ,                 ,I2S3_MCK         ,                               ,USART6_RX                      ,                              ,                            ,                               ,SDMMC1_D7         ,DCMI_D1    ,LCD_G6   ,EVENTOUT,
+PortC,PC8 ,TRACED1      ,                 ,TIM3_CH3,TIM8_CH3               ,              ,                 ,                 ,UART5_RTS                      ,USART6_CK                      ,                              ,                            ,                               ,SDMMC1_D0         ,DCMI_D2    ,         ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4               ,I2C3_SDA      ,I2S_CKIN         ,                 ,UART5_CTS                      ,                               ,QUADSPI_BK1_IO0               ,                            ,                               ,SDMMC1_D1         ,DCMI_D3    ,         ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,                       ,              ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX                      ,UART4_TX                       ,QUADSPI_BK1_IO1               ,                            ,                               ,SDMMC1_D2         ,DCMI_D8    ,LCD_R2   ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,                       ,              ,                 ,SPI3_MISO        ,USART3_RX                      ,UART4_RX                       ,QUADSPI_BK2_NCS               ,                            ,                               ,SDMMC1_D3         ,DCMI_D4    ,         ,EVENTOUT,
+PortC,PC12,TRACED3      ,                 ,        ,                       ,              ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK                      ,UART5_TX                       ,                              ,                            ,                               ,SDMMC1_CK         ,DCMI_D9    ,         ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,CAN1_RX                       ,                            ,                               ,FMC_D2            ,           ,         ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,CAN1_TX                       ,                            ,                               ,FMC_D3            ,           ,         ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                 ,TIM3_ETR,                       ,              ,                 ,                 ,                               ,UART5_RX                       ,                              ,                            ,                               ,SDMMC1_CMD        ,DCMI_D11   ,         ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,                       ,              ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS                     ,                               ,                              ,                            ,                               ,FMC_CLK           ,DCMI_D5    ,LCD_G7   ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,                       ,              ,                 ,                 ,USART2_RTS                     ,                               ,                              ,                            ,                               ,FMC_NOE           ,           ,         ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,                       ,              ,                 ,                 ,USART2_TX                      ,                               ,                              ,                            ,                               ,FMC_NWE           ,           ,         ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,                       ,              ,SPI3_MOSI/I2S3_SD,SAI1_SD_A        ,USART2_RX                      ,                               ,                              ,                            ,                               ,FMC_NWAIT         ,DCMI_D10   ,LCD_B2   ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,                       ,              ,                 ,                 ,USART2_CK                      ,SPDIFRX_IN0                    ,                              ,                            ,                               ,FMC_NE1           ,           ,         ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,                       ,              ,                 ,                 ,USART3_TX                      ,SPDIFRX_IN1                    ,                              ,                            ,                               ,FMC_D13           ,           ,         ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,                       ,              ,                 ,                 ,USART3_RX                      ,                               ,                              ,                            ,                               ,FMC_D14           ,           ,         ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,                       ,              ,                 ,                 ,USART3_CK                      ,                               ,                              ,                            ,                               ,FMC_D15           ,           ,LCD_B3   ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,                       ,I2C4_SMBA     ,                 ,                 ,USART3_CTS                     ,                               ,QUADSPI_BK1_IO0               ,SAI2_SD_A                   ,                               ,FMC_A16/FMC_CLE   ,           ,         ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,LPTIM1_IN1             ,I2C4_SCL      ,                 ,                 ,USART3_RTS                     ,                               ,QUADSPI_BK1_IO1               ,SAI2_FS_A                   ,                               ,FMC_A17/FMC_ALE   ,           ,         ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,LPTIM1_OUT             ,I2C4_SDA      ,                 ,                 ,                               ,                               ,QUADSPI_BK1_IO3               ,SAI2_SCK_A                  ,                               ,FMC_A18           ,           ,         ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,                       ,              ,                 ,                 ,                               ,UART8_CTS                      ,                              ,                            ,                               ,FMC_D0            ,           ,         ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,                       ,              ,                 ,                 ,                               ,UART8_RTS                      ,                              ,                            ,                               ,FMC_D1            ,           ,         ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,LPTIM1_ETR             ,              ,                 ,                 ,                               ,UART8_RX                       ,                              ,SAI2_MCK_A                  ,                               ,FMC_NBL0          ,DCMI_D2    ,         ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,LPTIM1_IN2             ,              ,                 ,                 ,                               ,UART8_TX                       ,                              ,                            ,                               ,FMC_NBL1          ,DCMI_D3    ,         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,                       ,              ,SPI4_SCK         ,SAI1_MCLK_A      ,                               ,                               ,QUADSPI_BK1_IO2               ,                            ,ETH_MII_TXD3                   ,FMC_A23           ,           ,         ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,                       ,              ,                 ,SAI1_SD_B        ,                               ,                               ,                              ,                            ,                               ,FMC_A19           ,           ,         ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,                       ,              ,SPI4_NSS         ,SAI1_FS_A        ,                               ,                               ,                              ,                            ,                               ,FMC_A20           ,DCMI_D4    ,LCD_B0   ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1               ,              ,SPI4_MISO        ,SAI1_SCK_A       ,                               ,                               ,                              ,                            ,                               ,FMC_A21           ,DCMI_D6    ,LCD_G0   ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,TIM1_BKIN2       ,        ,TIM9_CH2               ,              ,SPI4_MOSI        ,SAI1_SD_A        ,                               ,                               ,                              ,SAI2_MCK_B                  ,                               ,FMC_A22           ,DCMI_D7    ,LCD_G1   ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,                       ,              ,                 ,                 ,                               ,UART7_RX                       ,                              ,QUADSPI_BK2_IO0             ,                               ,FMC_D4            ,           ,         ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,                       ,              ,                 ,                 ,                               ,UART7_TX                       ,                              ,QUADSPI_BK2_IO1             ,                               ,FMC_D5            ,           ,         ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,                       ,              ,                 ,                 ,                               ,UART7_RTS                      ,                              ,QUADSPI_BK2_IO2             ,                               ,FMC_D6            ,           ,         ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,                       ,              ,                 ,                 ,                               ,UART7_CTS                      ,                              ,QUADSPI_BK2_IO3             ,                               ,FMC_D7            ,           ,         ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,                       ,              ,SPI4_NSS         ,                 ,                               ,                               ,                              ,SAI2_SD_B                   ,                               ,FMC_D8            ,           ,LCD_G3   ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,                       ,              ,SPI4_SCK         ,                 ,                               ,                               ,                              ,SAI2_SCK_B                  ,                               ,FMC_D9            ,           ,LCD_B4   ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,                       ,              ,SPI4_MISO        ,                 ,                               ,                               ,                              ,SAI2_FS_B                   ,                               ,FMC_D10           ,           ,LCD_DE   ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,                       ,              ,SPI4_MOSI        ,                 ,                               ,                               ,                              ,SAI2_MCK_B                  ,                               ,FMC_D11           ,           ,LCD_CLK  ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D12           ,           ,LCD_R7   ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,                       ,I2C2_SDA      ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A0            ,           ,         ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,                       ,I2C2_SCL      ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A1            ,           ,         ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,                       ,I2C2_SMBA     ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A2            ,           ,         ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A3            ,           ,         ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A4            ,           ,         ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A5            ,           ,         ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1              ,              ,SPI5_NSS         ,SAI1_SD_B        ,                               ,UART7_RX                       ,QUADSPI_BK1_IO3               ,                            ,                               ,                  ,           ,         ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1              ,              ,SPI5_SCK         ,SAI1_MCLK_B      ,                               ,UART7_TX                       ,QUADSPI_BK1_IO2               ,                            ,                               ,                  ,           ,         ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,                       ,              ,SPI5_MISO        ,SAI1_SCK_B       ,                               ,UART7_RTS                      ,TIM13_CH1                     ,QUADSPI_BK1_IO0             ,                               ,                  ,           ,         ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,                       ,              ,SPI5_MOSI        ,SAI1_FS_B        ,                               ,UART7_CTS                      ,TIM14_CH1                     ,QUADSPI_BK1_IO1             ,                               ,                  ,           ,         ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,DCMI_D11   ,LCD_DE   ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,                       ,              ,SPI5_MOSI        ,                 ,                               ,                               ,                              ,SAI2_SD_B                   ,                               ,FMC_SDNRAS        ,DCMI_D12   ,         ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A6            ,           ,         ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,                       ,I2C4_SMBA     ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A7            ,           ,         ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,                       ,I2C4_SCL      ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A8            ,           ,         ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,                       ,I2C4_SDA      ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A9            ,           ,         ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A10           ,           ,         ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A11           ,           ,         ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A12           ,           ,         ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A13           ,           ,         ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A14/FMC_BA0   ,           ,         ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_A15/FMC_BA1   ,           ,         ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,DCMI_D12   ,LCD_R7   ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,USART6_CK                      ,                              ,                            ,                               ,FMC_INT           ,DCMI_D13   ,LCD_CLK  ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,                       ,              ,SPI6_NSS         ,                 ,SPDIFRX_IN2                    ,USART6_RTS                     ,                              ,                            ,ETH_PPS_OUT                    ,FMC_SDCLK         ,           ,         ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,                       ,              ,                 ,                 ,SPDIFRX_IN3                    ,USART6_RX                      ,QUADSPI_BK2_IO2               ,SAI2_FS_B                   ,                               ,FMC_NE2/FMC_NCE   ,DCMI_VSYNC ,         ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,LCD_G3                        ,SAI2_SD_B                   ,                               ,FMC_NE3           ,DCMI_D2    ,LCD_B2   ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,                       ,              ,                 ,                 ,SPDIFRX_IN0                    ,                               ,                              ,                            ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,DCMI_D3    ,LCD_B3   ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,LPTIM1_IN1             ,              ,SPI6_MISO        ,                 ,SPDIFRX_IN1                    ,USART6_RTS                     ,LCD_B4                        ,                            ,                               ,FMC_NE4           ,           ,LCD_B1   ,EVENTOUT,
+PortG,PG13,TRACED0      ,                 ,        ,LPTIM1_OUT             ,              ,SPI6_SCK         ,                 ,                               ,USART6_CTS                     ,                              ,                            ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24           ,           ,LCD_R0   ,EVENTOUT,
+PortG,PG14,TRACED1      ,                 ,        ,LPTIM1_ETR             ,              ,SPI6_MOSI        ,                 ,                               ,USART6_TX                      ,QUADSPI_BK2_IO3               ,                            ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25           ,           ,LCD_B0   ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,USART6_CTS                     ,                              ,                            ,                               ,FMC_SDNCAS        ,DCMI_D13   ,         ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,LPTIM1_IN2             ,              ,                 ,                 ,                               ,                               ,QUADSPI_BK2_IO0               ,SAI2_SCK_B                  ,ETH_MII_CRS                    ,FMC_SDCKE0        ,           ,LCD_R0   ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,QUADSPI_BK2_IO1               ,SAI2_MCK_B                  ,ETH_MII_COL                    ,FMC_SDNE0         ,           ,LCD_R1   ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,                       ,I2C2_SCL      ,                 ,                 ,                               ,                               ,                              ,OTG_HS_ULPI_NXT             ,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,                       ,I2C2_SDA      ,SPI5_NSS         ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_SDNWE         ,           ,         ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,                       ,I2C2_SMBA     ,SPI5_SCK         ,                 ,                               ,                               ,TIM12_CH1                     ,                            ,ETH_MII_RXD2                   ,FMC_SDNE1         ,DCMI_D8    ,         ,EVENTOUT,
+PortH,PH7 ,             ,                 ,        ,                       ,I2C3_SCL      ,SPI5_MISO        ,                 ,                               ,                               ,                              ,                            ,ETH_MII_RXD3                   ,FMC_SDCKE1        ,DCMI_D9    ,         ,EVENTOUT,
+PortH,PH8 ,             ,                 ,        ,                       ,I2C3_SDA      ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D16           ,DCMI_HSYNC ,LCD_R2   ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,                       ,I2C3_SMBA     ,                 ,                 ,                               ,                               ,TIM12_CH2                     ,                            ,                               ,FMC_D17           ,DCMI_D0    ,LCD_R3   ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,                       ,I2C4_SMBA     ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D18           ,DCMI_D1    ,LCD_R4   ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,                       ,I2C4_SCL      ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D19           ,DCMI_D2    ,LCD_R5   ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,                       ,I2C4_SDA      ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D20           ,DCMI_D3    ,LCD_R6   ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N              ,              ,                 ,                 ,                               ,                               ,CAN1_TX                       ,                            ,                               ,FMC_D21           ,           ,LCD_G2   ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N              ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D22           ,DCMI_D4    ,LCD_G3   ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N              ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D23           ,DCMI_D11   ,LCD_G4   ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,                       ,              ,SPI2_NSS/I2S2_WS ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D24           ,DCMI_D13   ,LCD_G5   ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,TIM8_BKIN2             ,              ,SPI2_SCK/I2S2_CK ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D25           ,DCMI_D8    ,LCD_G6   ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4               ,              ,SPI2_MISO        ,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D26           ,DCMI_D9    ,LCD_G7   ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR               ,              ,SPI2_MOSI/I2S2_SD,                 ,                               ,                               ,                              ,                            ,                               ,FMC_D27           ,DCMI_D10   ,         ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN              ,              ,                 ,                 ,                               ,                               ,                              ,SAI2_MCK_A                  ,                               ,FMC_NBL2          ,DCMI_D5    ,LCD_B4   ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1               ,              ,                 ,                 ,                               ,                               ,                              ,SAI2_SCK_A                  ,                               ,FMC_NBL3          ,DCMI_VSYNC ,LCD_B5   ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2               ,              ,                 ,                 ,                               ,                               ,                              ,SAI2_SD_A                   ,                               ,FMC_D28           ,DCMI_D6    ,LCD_B6   ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3               ,              ,                 ,                 ,                               ,                               ,                              ,SAI2_FS_A                   ,                               ,FMC_D29           ,DCMI_D7    ,LCD_B7   ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,         ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,CAN1_RX                       ,                            ,                               ,FMC_D30           ,           ,LCD_VSYNC,EVENTOUT,
+PortI,PI10,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,ETH_MII_RX_ER                  ,FMC_D31           ,           ,LCD_HSYNC,EVENTOUT,
+PortI,PI11,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,OTG_HS_ULPI_DIR             ,                               ,                  ,           ,         ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_HSYNC,EVENTOUT,
+PortI,PI13,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_VSYNC,EVENTOUT,
+PortI,PI14,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_CLK  ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_R0   ,EVENTOUT,
+PortJ,PJ0 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_R1   ,EVENTOUT,
+PortJ,PJ1 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_R2   ,EVENTOUT,
+PortJ,PJ2 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_R3   ,EVENTOUT,
+PortJ,PJ3 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_R4   ,EVENTOUT,
+PortJ,PJ4 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_R5   ,EVENTOUT,
+PortJ,PJ5 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_R6   ,EVENTOUT,
+PortJ,PJ6 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_R7   ,EVENTOUT,
+PortJ,PJ7 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_G0   ,EVENTOUT,
+PortJ,PJ8 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_G1   ,EVENTOUT,
+PortJ,PJ9 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_G2   ,EVENTOUT,
+PortJ,PJ10,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_G3   ,EVENTOUT,
+PortJ,PJ11,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_G4   ,EVENTOUT,
+PortJ,PJ12,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_B0   ,EVENTOUT,
+PortJ,PJ13,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_B1   ,EVENTOUT,
+PortJ,PJ14,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_B2   ,EVENTOUT,
+PortJ,PJ15,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_B3   ,EVENTOUT,
+PortK,PK0 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_G5   ,EVENTOUT,
+PortK,PK1 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_G6   ,EVENTOUT,
+PortK,PK2 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_G7   ,EVENTOUT,
+PortK,PK3 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_B4   ,EVENTOUT,
+PortK,PK4 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_B5   ,EVENTOUT,
+PortK,PK5 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_B6   ,EVENTOUT,
+PortK,PK6 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_B7   ,EVENTOUT,
+PortK,PK7 ,             ,                 ,        ,                       ,              ,                 ,                 ,                               ,                               ,                              ,                            ,                               ,                  ,           ,LCD_DE   ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f767_af.csv b/ports/stm32/boards/stm32f767_af.csv
index 0c8069ec26..c86c3bfe31 100644
--- a/ports/stm32/boards/stm32f767_af.csv
+++ b/ports/stm32/boards/stm32f767_af.csv
@@ -1,170 +1,170 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,I2C4/UART5/TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/DFSDM1/CEC,I2C1/2/3/4/USART1/CEC,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/6,SPI2/I2S2/SPI3/I2S3/SAI1/I2C4/UART4/DFSDM1,SPI2/I2S2/SPI3/I2S3/SPI6/USART1/2/3/UART5/DFSDM1/SPDIF,SPI6/SAI2/USART6/UART4/5/7/8/OTG_FS/SPDIF,CAN1/2/TIM12/13/14/QUADSPI/FMC/LCD,SAI2/QUADSPI/SDMMC2/DFSDM1/OTG2_HS/OTG1_FS/LCD,I2C4/CAN3/SDMMC2/ETH,UART7/FMC/SDMMC1/MDIOS/OTG2_FS,DCMI/LCD/DSI,LCD,SYS,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT,ADC123_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,MDIOS_MDIO,,LCD_R1,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,LCD_B2,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3
-PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,SPI6_NSS,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,SPI6_SCK,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,SPI6_MISO,TIM13_CH1,,,MDIOS_MDC,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,SPI6_MOSI,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,CAN3_RX,UART7_RX,LCD_B3,LCD_R6,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,LCD_R5,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,LCD_B4,OTG_FS_ID,,MDIOS_MDIO,DCMI_D1,LCD_B1,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,,,SPI2_NSS/I2S2_WS,UART4_RX,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,SPI2_SCK/I2S2_CK,UART4_TX,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,SPI6_NSS,UART4_RTS,,,CAN3_TX,UART7_TX,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,DFSDM1_CKOUT,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,LCD_G1,EVENTOUT,ADC12_IN8
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM1_DATAIN1,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,LCD_G0,EVENTOUT,ADC12_IN9
-PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,DFSDM1_CKIN1,,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,SPI6_SCK,,SDMMC2_D2,CAN3_RX,UART7_RX,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,SPI6_MISO,,SDMMC2_D3,CAN3_TX,UART7_TX,,,EVENTOUT,
-PortB,PB5,,UART5_RX,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,SPI6_MOSI,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,LCD_G7,EVENTOUT,
-PortB,PB6,,UART5_TX,TIM4_CH1,HDMI_CEC,I2C1_SCL,,DFSDM1_DATAIN5,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,I2C4_SCL,FMC_SDNE1,DCMI_D5,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,DFSDM1_CKIN5,USART1_RX,,,,I2C4_SDA,FMC_NL,DCMI_VSYNC,,EVENTOUT,
-PortB,PB8,,I2C4_SCL,TIM4_CH3,TIM10_CH1,I2C1_SCL,,DFSDM1_CKIN7,UART5_RX,,CAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT,
-PortB,PB9,,I2C4_SDA,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,DFSDM1_DATAIN7,UART5_TX,,CAN1_TX,SDMMC2_D5,I2C4_SMBA,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,DFSDM1_DATAIN7,USART3_TX,,QUADSPI_BK1_NCS,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,DFSDM1_CKIN7,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DSI_TE,LCD_G5,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,DFSDM1_DATAIN1,USART3_CK,UART5_RX,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,DFSDM1_CKIN1,USART3_CTS,UART5_TX,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,USART1_TX,SPI2_MISO,DFSDM1_DATAIN2,USART3_RTS,UART4_RTS,TIM12_CH1,SDMMC2_D0,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,USART1_RX,SPI2_MOSI/I2S2_SD,DFSDM1_CKIN2,,UART4_CTS,TIM12_CH2,SDMMC2_D1,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,DFSDM1_CKIN0,,,DFSDM1_DATAIN4,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT,ADC123_IN10
-PortC,PC1,TRACED0,,,DFSDM1_DATAIN0,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,DFSDM1_CKIN4,ETH_MDC,MDIOS_MDC,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,,,DFSDM1_CKIN1,,SPI2_MISO,DFSDM1_CKOUT,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,,,DFSDM1_DATAIN1,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,DFSDM1_CKIN2,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT,ADC12_IN14
-PortC,PC5,,,,DFSDM1_DATAIN2,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT,ADC12_IN15
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,DFSDM1_CKIN3,USART6_TX,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,DFSDM1_DATAIN3,USART6_RX,FMC_NE1,SDMMC2_D7,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT,
-PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,FMC_NE2/FMC_NCE,,,SDMMC1_D0,DCMI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,LCD_G3,,SDMMC1_D1,DCMI_D3,LCD_B2,EVENTOUT,
-PortC,PC10,,,,DFSDM1_CKIN5,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT,
-PortC,PC11,,,,DFSDM1_DATAIN5,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT,
-PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,DFSDM1_CKIN6,,,DFSDM1_DATAIN7,,UART4_RX,CAN1_RX,,,FMC_D2,,,EVENTOUT,
-PortD,PD1,,,,DFSDM1_DATAIN6,,,DFSDM1_CKIN7,,UART4_TX,CAN1_TX,,,FMC_D3,,,EVENTOUT,
-PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT,
-PortD,PD3,,,,DFSDM1_CKOUT,,SPI2_SCK/I2S2_CK,DFSDM1_DATAIN0,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT,
-PortD,PD4,,,,,,,DFSDM1_CKIN0,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,,DFSDM1_CKIN4,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,DFSDM1_DATAIN1,SDMMC2_CK,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT,
-PortD,PD7,,,,DFSDM1_DATAIN4,,SPI1_MOSI/I2S1_SD,DFSDM1_CKIN1,USART2_CK,SPDIFRX_IN0,,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,DFSDM1_CKIN3,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT,
-PortD,PD9,,,,DFSDM1_DATAIN3,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
-PortD,PD10,,,,DFSDM1_CKOUT,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT,
-PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT,
-PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,DFSDM1_DATAIN3,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,DFSDM1_CKIN3,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
-PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,DFSDM1_DATAIN2,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,DFSDM1_CKIN2,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,DFSDM1_CKOUT,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,DFSDM1_DATAIN4,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,DFSDM1_CKIN4,,,,SAI2_SD_B,,FMC_D8,,LCD_G3,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,DFSDM1_DATAIN5,,,,SAI2_SCK_B,,FMC_D9,,LCD_B4,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,DFSDM1_CKIN5,,,,SAI2_FS_B,,FMC_D10,,LCD_DE,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,LCD_CLK,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
-PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_IN4
-PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_IN5
-PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_IN6
-PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_IN7
-PortF,PF10,,,,,,,,,,QUADSPI_CLK,,,,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8
-PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
-PortF,PF13,,,,,I2C4_SMBA,,DFSDM1_DATAIN6,,,,,,FMC_A7,,,EVENTOUT,
-PortF,PF14,,,,,I2C4_SCL,,DFSDM1_CKIN6,,,,,,FMC_A8,,,EVENTOUT,
-PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,,,FMC_NE3,DCMI_D12,LCD_R7,EVENTOUT,
-PortG,PG7,,,,,,,SAI1_MCLK_A,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT,
-PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,LCD_G7,EVENTOUT,
-PortG,PG9,,,,,,SPI1_MISO,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT,
-PortG,PG10,,,,,,SPI1_NSS/I2S1_WS,,,,LCD_G3,SAI2_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT,
-PortG,PG11,,,,,,SPI1_SCK/I2S1_CK,,SPDIFRX_IN0,,,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT,
-PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,SDMMC2_D3,FMC_NE4,,LCD_B1,EVENTOUT,
-PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT,
-PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT,
-PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT,
-PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT,
-PortH,PH4,,,,,I2C2_SCL,,,,,LCD_G5,OTG_HS_ULPI_NXT,,,,LCD_G4,EVENTOUT,
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,
-PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT,
-PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT,
-PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT,
-PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT,
-PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT,
-PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT,
-PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT,
-PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,CAN1_RX,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT,
-PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,UART4_RX,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT,
-PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT,
-PortI,PI11,,,,,,,,,,LCD_G6,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
-PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT,
-PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT,
-PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT,
-PortI,PI15,,,,,,,,,,LCD_G2,,,,,LCD_R0,EVENTOUT,
-PortJ,PJ0,,,,,,,,,,LCD_R7,,,,,LCD_R1,EVENTOUT,
-PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT,
-PortJ,PJ2,,,,,,,,,,,,,,DSI_TE,LCD_R3,EVENTOUT,
-PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT,
-PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT,
-PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT,
-PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT,
-PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT,
-PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT,
-PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT,
-PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT,
-PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT,
-PortJ,PJ12,,,,,,,,,,LCD_G3,,,,,LCD_B0,EVENTOUT,
-PortJ,PJ13,,,,,,,,,,LCD_G4,,,,,LCD_B1,EVENTOUT,
-PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT,
-PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT,
-PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT,
-PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT,
-PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT,
-PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT,
-PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT,
-PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT,
-PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT,
-PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3                           ,AF4                  ,AF5                                   ,AF6                                       ,AF7                                                   ,AF8                                      ,AF9                               ,AF10                                          ,AF11                           ,AF12                          ,AF13        ,AF14     ,AF15    ,ADC
+     ,    ,SYS          ,I2C4/UART5/TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/DFSDM1/CEC,I2C1/2/3/4/USART1/CEC,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/6,SPI2/I2S2/SPI3/I2S3/SAI1/I2C4/UART4/DFSDM1,SPI2/I2S2/SPI3/I2S3/SPI6/USART1/2/3/UART5/DFSDM1/SPDIF,SPI6/SAI2/USART6/UART4/5/7/8/OTG_FS/SPDIF,CAN1/2/TIM12/13/14/QUADSPI/FMC/LCD,SAI2/QUADSPI/SDMMC2/DFSDM1/OTG2_HS/OTG1_FS/LCD,I2C4/CAN3/SDMMC2/ETH           ,UART7/FMC/SDMMC1/MDIOS/OTG2_FS,DCMI/LCD/DSI,LCD      ,SYS     ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR                      ,                     ,                                      ,                                          ,USART2_CTS                                            ,UART4_TX                                 ,                                  ,SAI2_SD_B                                     ,ETH_MII_CRS                    ,                              ,            ,         ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,                              ,                     ,                                      ,                                          ,USART2_RTS                                            ,UART4_RX                                 ,QUADSPI_BK1_IO3                   ,SAI2_MCK_B                                    ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                              ,            ,LCD_R2   ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1                      ,                     ,                                      ,                                          ,USART2_TX                                             ,SAI2_SCK_B                               ,                                  ,                                              ,ETH_MDIO                       ,MDIOS_MDIO                    ,            ,LCD_R1   ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2                      ,                     ,                                      ,                                          ,USART2_RX                                             ,                                         ,LCD_B2                            ,OTG_HS_ULPI_D0                                ,ETH_MII_COL                    ,                              ,            ,LCD_B5   ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,                              ,                     ,SPI1_NSS/I2S1_WS                      ,SPI3_NSS/I2S3_WS                          ,USART2_CK                                             ,SPI6_NSS                                 ,                                  ,                                              ,                               ,OTG_HS_SOF                    ,DCMI_HSYNC  ,LCD_VSYNC,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N                     ,                     ,SPI1_SCK/I2S1_CK                      ,                                          ,                                                      ,SPI6_SCK                                 ,                                  ,OTG_HS_ULPI_CK                                ,                               ,                              ,            ,LCD_R4   ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN                     ,                     ,SPI1_MISO                             ,                                          ,                                                      ,SPI6_MISO                                ,TIM13_CH1                         ,                                              ,                               ,MDIOS_MDC                     ,DCMI_PIXCLK ,LCD_G2   ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N                     ,                     ,SPI1_MOSI/I2S1_SD                     ,                                          ,                                                      ,SPI6_MOSI                                ,TIM14_CH1                         ,                                              ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,FMC_SDNWE                     ,            ,         ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,TIM8_BKIN2                    ,I2C3_SCL             ,                                      ,                                          ,USART1_CK                                             ,                                         ,                                  ,OTG_FS_SOF                                    ,CAN3_RX                        ,UART7_RX                      ,LCD_B3      ,LCD_R6   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,                              ,I2C3_SMBA            ,SPI2_SCK/I2S2_CK                      ,                                          ,USART1_TX                                             ,                                         ,                                  ,                                              ,                               ,                              ,DCMI_D0     ,LCD_R5   ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,                              ,                     ,                                      ,                                          ,USART1_RX                                             ,                                         ,LCD_B4                            ,OTG_FS_ID                                     ,                               ,MDIOS_MDIO                    ,DCMI_D1     ,LCD_B1   ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,                              ,                     ,SPI2_NSS/I2S2_WS                      ,UART4_RX                                  ,USART1_CTS                                            ,                                         ,CAN1_RX                           ,OTG_FS_DM                                     ,                               ,                              ,            ,LCD_R4   ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,                              ,                     ,SPI2_SCK/I2S2_CK                      ,UART4_TX                                  ,USART1_RTS                                            ,SAI2_FS_B                                ,CAN1_TX                           ,OTG_FS_DP                                     ,                               ,                              ,            ,LCD_R5   ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,         ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,         ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,                              ,HDMI_CEC             ,SPI1_NSS/I2S1_WS                      ,SPI3_NSS/I2S3_WS                          ,SPI6_NSS                                              ,UART4_RTS                                ,                                  ,                                              ,CAN3_TX                        ,UART7_TX                      ,            ,         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N                     ,                     ,                                      ,DFSDM1_CKOUT                              ,                                                      ,UART4_CTS                                ,LCD_R3                            ,OTG_HS_ULPI_D1                                ,ETH_MII_RXD2                   ,                              ,            ,LCD_G1   ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N                     ,                     ,                                      ,DFSDM1_DATAIN1                            ,                                                      ,                                         ,LCD_R6                            ,OTG_HS_ULPI_D2                                ,ETH_MII_RXD3                   ,                              ,            ,LCD_G0   ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,                              ,                     ,                                      ,SAI1_SD_A                                 ,SPI3_MOSI/I2S3_SD                                     ,                                         ,QUADSPI_CLK                       ,DFSDM1_CKIN1                                  ,                               ,                              ,            ,         ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,                              ,                     ,SPI1_SCK/I2S1_CK                      ,SPI3_SCK/I2S3_CK                          ,                                                      ,SPI6_SCK                                 ,                                  ,SDMMC2_D2                                     ,CAN3_RX                        ,UART7_RX                      ,            ,         ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,                              ,                     ,SPI1_MISO                             ,SPI3_MISO                                 ,SPI2_NSS/I2S2_WS                                      ,SPI6_MISO                                ,                                  ,SDMMC2_D3                                     ,CAN3_TX                        ,UART7_TX                      ,            ,         ,EVENTOUT,
+PortB,PB5 ,             ,UART5_RX         ,TIM3_CH2,                              ,I2C1_SMBA            ,SPI1_MOSI/I2S1_SD                     ,SPI3_MOSI/I2S3_SD                         ,                                                      ,SPI6_MOSI                                ,CAN2_RX                           ,OTG_HS_ULPI_D7                                ,ETH_PPS_OUT                    ,FMC_SDCKE1                    ,DCMI_D10    ,LCD_G7   ,EVENTOUT,
+PortB,PB6 ,             ,UART5_TX         ,TIM4_CH1,HDMI_CEC                      ,I2C1_SCL             ,                                      ,DFSDM1_DATAIN5                            ,USART1_TX                                             ,                                         ,CAN2_TX                           ,QUADSPI_BK1_NCS                               ,I2C4_SCL                       ,FMC_SDNE1                     ,DCMI_D5     ,         ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,                              ,I2C1_SDA             ,                                      ,DFSDM1_CKIN5                              ,USART1_RX                                             ,                                         ,                                  ,                                              ,I2C4_SDA                       ,FMC_NL                        ,DCMI_VSYNC  ,         ,EVENTOUT,
+PortB,PB8 ,             ,I2C4_SCL         ,TIM4_CH3,TIM10_CH1                     ,I2C1_SCL             ,                                      ,DFSDM1_CKIN7                              ,UART5_RX                                              ,                                         ,CAN1_RX                           ,SDMMC2_D4                                     ,ETH_MII_TXD3                   ,SDMMC1_D4                     ,DCMI_D6     ,LCD_B6   ,EVENTOUT,
+PortB,PB9 ,             ,I2C4_SDA         ,TIM4_CH4,TIM11_CH1                     ,I2C1_SDA             ,SPI2_NSS/I2S2_WS                      ,DFSDM1_DATAIN7                            ,UART5_TX                                              ,                                         ,CAN1_TX                           ,SDMMC2_D5                                     ,I2C4_SMBA                      ,SDMMC1_D5                     ,DCMI_D7     ,LCD_B7   ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,                              ,I2C2_SCL             ,SPI2_SCK/I2S2_CK                      ,DFSDM1_DATAIN7                            ,USART3_TX                                             ,                                         ,QUADSPI_BK1_NCS                   ,OTG_HS_ULPI_D3                                ,ETH_MII_RX_ER                  ,                              ,            ,LCD_G4   ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,                              ,I2C2_SDA             ,                                      ,DFSDM1_CKIN7                              ,USART3_RX                                             ,                                         ,                                  ,OTG_HS_ULPI_D4                                ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                              ,DSI_TE      ,LCD_G5   ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,                              ,I2C2_SMBA            ,SPI2_NSS/I2S2_WS                      ,DFSDM1_DATAIN1                            ,USART3_CK                                             ,UART5_RX                                 ,CAN2_RX                           ,OTG_HS_ULPI_D5                                ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID                     ,            ,         ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,                              ,                     ,SPI2_SCK/I2S2_CK                      ,DFSDM1_CKIN1                              ,USART3_CTS                                            ,UART5_TX                                 ,CAN2_TX                           ,OTG_HS_ULPI_D6                                ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                              ,            ,         ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N                     ,USART1_TX            ,SPI2_MISO                             ,DFSDM1_DATAIN2                            ,USART3_RTS                                            ,UART4_RTS                                ,TIM12_CH1                         ,SDMMC2_D0                                     ,                               ,OTG_HS_DM                     ,            ,         ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N                     ,USART1_RX            ,SPI2_MOSI/I2S2_SD                     ,DFSDM1_CKIN2                              ,                                                      ,UART4_CTS                                ,TIM12_CH2                         ,SDMMC2_D1                                     ,                               ,OTG_HS_DP                     ,            ,         ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,DFSDM1_CKIN0                  ,                     ,                                      ,DFSDM1_DATAIN4                            ,                                                      ,SAI2_FS_B                                ,                                  ,OTG_HS_ULPI_STP                               ,                               ,FMC_SDNWE                     ,            ,LCD_R5   ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,TRACED0      ,                 ,        ,DFSDM1_DATAIN0                ,                     ,SPI2_MOSI/I2S2_SD                     ,SAI1_SD_A                                 ,                                                      ,                                         ,                                  ,DFSDM1_CKIN4                                  ,ETH_MDC                        ,MDIOS_MDC                     ,            ,         ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,DFSDM1_CKIN1                  ,                     ,SPI2_MISO                             ,DFSDM1_CKOUT                              ,                                                      ,                                         ,                                  ,OTG_HS_ULPI_DIR                               ,ETH_MII_TXD2                   ,FMC_SDNE0                     ,            ,         ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,DFSDM1_DATAIN1                ,                     ,SPI2_MOSI/I2S2_SD                     ,                                          ,                                                      ,                                         ,                                  ,OTG_HS_ULPI_NXT                               ,ETH_MII_TX_CLK                 ,FMC_SDCKE0                    ,            ,         ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,DFSDM1_CKIN2                  ,                     ,I2S1_MCK                              ,                                          ,                                                      ,SPDIFRX_IN2                              ,                                  ,                                              ,ETH_MII_RXD0/ETH_RMII_RXD0     ,FMC_SDNE0                     ,            ,         ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,DFSDM1_DATAIN2                ,                     ,                                      ,                                          ,                                                      ,SPDIFRX_IN3                              ,                                  ,                                              ,ETH_MII_RXD1/ETH_RMII_RXD1     ,FMC_SDCKE0                    ,            ,         ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1                      ,                     ,I2S2_MCK                              ,                                          ,DFSDM1_CKIN3                                          ,USART6_TX                                ,FMC_NWAIT                         ,SDMMC2_D6                                     ,                               ,SDMMC1_D6                     ,DCMI_D0     ,LCD_HSYNC,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2                      ,                     ,                                      ,I2S3_MCK                                  ,DFSDM1_DATAIN3                                        ,USART6_RX                                ,FMC_NE1                           ,SDMMC2_D7                                     ,                               ,SDMMC1_D7                     ,DCMI_D1     ,LCD_G6   ,EVENTOUT,
+PortC,PC8 ,TRACED1      ,                 ,TIM3_CH3,TIM8_CH3                      ,                     ,                                      ,                                          ,UART5_RTS                                             ,USART6_CK                                ,FMC_NE2/FMC_NCE                   ,                                              ,                               ,SDMMC1_D0                     ,DCMI_D2     ,         ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4                      ,I2C3_SDA             ,I2S_CKIN                              ,                                          ,UART5_CTS                                             ,                                         ,QUADSPI_BK1_IO0                   ,LCD_G3                                        ,                               ,SDMMC1_D1                     ,DCMI_D3     ,LCD_B2   ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,DFSDM1_CKIN5                  ,                     ,                                      ,SPI3_SCK/I2S3_CK                          ,USART3_TX                                             ,UART4_TX                                 ,QUADSPI_BK1_IO1                   ,                                              ,                               ,SDMMC1_D2                     ,DCMI_D8     ,LCD_R2   ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,DFSDM1_DATAIN5                ,                     ,                                      ,SPI3_MISO                                 ,USART3_RX                                             ,UART4_RX                                 ,QUADSPI_BK2_NCS                   ,                                              ,                               ,SDMMC1_D3                     ,DCMI_D4     ,         ,EVENTOUT,
+PortC,PC12,TRACED3      ,                 ,        ,                              ,                     ,                                      ,SPI3_MOSI/I2S3_SD                         ,USART3_CK                                             ,UART5_TX                                 ,                                  ,                                              ,                               ,SDMMC1_CK                     ,DCMI_D9     ,         ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,         ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,         ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,         ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,DFSDM1_CKIN6                  ,                     ,                                      ,DFSDM1_DATAIN7                            ,                                                      ,UART4_RX                                 ,CAN1_RX                           ,                                              ,                               ,FMC_D2                        ,            ,         ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,DFSDM1_DATAIN6                ,                     ,                                      ,DFSDM1_CKIN7                              ,                                                      ,UART4_TX                                 ,CAN1_TX                           ,                                              ,                               ,FMC_D3                        ,            ,         ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                 ,TIM3_ETR,                              ,                     ,                                      ,                                          ,                                                      ,UART5_RX                                 ,                                  ,                                              ,                               ,SDMMC1_CMD                    ,DCMI_D11    ,         ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,DFSDM1_CKOUT                  ,                     ,SPI2_SCK/I2S2_CK                      ,DFSDM1_DATAIN0                            ,USART2_CTS                                            ,                                         ,                                  ,                                              ,                               ,FMC_CLK                       ,DCMI_D5     ,LCD_G7   ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,                              ,                     ,                                      ,DFSDM1_CKIN0                              ,USART2_RTS                                            ,                                         ,                                  ,                                              ,                               ,FMC_NOE                       ,            ,         ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,USART2_TX                                             ,                                         ,                                  ,                                              ,                               ,FMC_NWE                       ,            ,         ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,DFSDM1_CKIN4                  ,                     ,SPI3_MOSI/I2S3_SD                     ,SAI1_SD_A                                 ,USART2_RX                                             ,                                         ,                                  ,DFSDM1_DATAIN1                                ,SDMMC2_CK                      ,FMC_NWAIT                     ,DCMI_D10    ,LCD_B2   ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,DFSDM1_DATAIN4                ,                     ,SPI1_MOSI/I2S1_SD                     ,DFSDM1_CKIN1                              ,USART2_CK                                             ,SPDIFRX_IN0                              ,                                  ,                                              ,SDMMC2_CMD                     ,FMC_NE1                       ,            ,         ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,DFSDM1_CKIN3                  ,                     ,                                      ,                                          ,USART3_TX                                             ,SPDIFRX_IN1                              ,                                  ,                                              ,                               ,FMC_D13                       ,            ,         ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,DFSDM1_DATAIN3                ,                     ,                                      ,                                          ,USART3_RX                                             ,                                         ,                                  ,                                              ,                               ,FMC_D14                       ,            ,         ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,DFSDM1_CKOUT                  ,                     ,                                      ,                                          ,USART3_CK                                             ,                                         ,                                  ,                                              ,                               ,FMC_D15                       ,            ,LCD_B3   ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,                              ,I2C4_SMBA            ,                                      ,                                          ,USART3_CTS                                            ,                                         ,QUADSPI_BK1_IO0                   ,SAI2_SD_A                                     ,                               ,FMC_A16/FMC_CLE               ,            ,         ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,LPTIM1_IN1                    ,I2C4_SCL             ,                                      ,                                          ,USART3_RTS                                            ,                                         ,QUADSPI_BK1_IO1                   ,SAI2_FS_A                                     ,                               ,FMC_A17/FMC_ALE               ,            ,         ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,LPTIM1_OUT                    ,I2C4_SDA             ,                                      ,                                          ,                                                      ,                                         ,QUADSPI_BK1_IO3                   ,SAI2_SCK_A                                    ,                               ,FMC_A18                       ,            ,         ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,                              ,                     ,                                      ,                                          ,                                                      ,UART8_CTS                                ,                                  ,                                              ,                               ,FMC_D0                        ,            ,         ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,                              ,                     ,                                      ,                                          ,                                                      ,UART8_RTS                                ,                                  ,                                              ,                               ,FMC_D1                        ,            ,         ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,LPTIM1_ETR                    ,                     ,                                      ,                                          ,                                                      ,UART8_RX                                 ,                                  ,SAI2_MCK_A                                    ,                               ,FMC_NBL0                      ,DCMI_D2     ,         ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,LPTIM1_IN2                    ,                     ,                                      ,                                          ,                                                      ,UART8_TX                                 ,                                  ,                                              ,                               ,FMC_NBL1                      ,DCMI_D3     ,         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,                              ,                     ,SPI4_SCK                              ,SAI1_MCLK_A                               ,                                                      ,                                         ,QUADSPI_BK1_IO2                   ,                                              ,ETH_MII_TXD3                   ,FMC_A23                       ,            ,         ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,                              ,                     ,                                      ,SAI1_SD_B                                 ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A19                       ,            ,         ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,                              ,                     ,SPI4_NSS                              ,SAI1_FS_A                                 ,                                                      ,                                         ,                                  ,DFSDM1_DATAIN3                                ,                               ,FMC_A20                       ,DCMI_D4     ,LCD_B0   ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1                      ,                     ,SPI4_MISO                             ,SAI1_SCK_A                                ,                                                      ,                                         ,                                  ,DFSDM1_CKIN3                                  ,                               ,FMC_A21                       ,DCMI_D6     ,LCD_G0   ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,TIM1_BKIN2       ,        ,TIM9_CH2                      ,                     ,SPI4_MOSI                             ,SAI1_SD_A                                 ,                                                      ,                                         ,                                  ,SAI2_MCK_B                                    ,                               ,FMC_A22                       ,DCMI_D7     ,LCD_G1   ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,                              ,                     ,                                      ,DFSDM1_DATAIN2                            ,                                                      ,UART7_RX                                 ,                                  ,QUADSPI_BK2_IO0                               ,                               ,FMC_D4                        ,            ,         ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,                              ,                     ,                                      ,DFSDM1_CKIN2                              ,                                                      ,UART7_TX                                 ,                                  ,QUADSPI_BK2_IO1                               ,                               ,FMC_D5                        ,            ,         ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,                              ,                     ,                                      ,DFSDM1_CKOUT                              ,                                                      ,UART7_RTS                                ,                                  ,QUADSPI_BK2_IO2                               ,                               ,FMC_D6                        ,            ,         ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,                              ,                     ,                                      ,DFSDM1_DATAIN4                            ,                                                      ,UART7_CTS                                ,                                  ,QUADSPI_BK2_IO3                               ,                               ,FMC_D7                        ,            ,         ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,                              ,                     ,SPI4_NSS                              ,DFSDM1_CKIN4                              ,                                                      ,                                         ,                                  ,SAI2_SD_B                                     ,                               ,FMC_D8                        ,            ,LCD_G3   ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,                              ,                     ,SPI4_SCK                              ,DFSDM1_DATAIN5                            ,                                                      ,                                         ,                                  ,SAI2_SCK_B                                    ,                               ,FMC_D9                        ,            ,LCD_B4   ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,                              ,                     ,SPI4_MISO                             ,DFSDM1_CKIN5                              ,                                                      ,                                         ,                                  ,SAI2_FS_B                                     ,                               ,FMC_D10                       ,            ,LCD_DE   ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,                              ,                     ,SPI4_MOSI                             ,                                          ,                                                      ,                                         ,                                  ,SAI2_MCK_B                                    ,                               ,FMC_D11                       ,            ,LCD_CLK  ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D12                       ,            ,LCD_R7   ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,                              ,I2C2_SDA             ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A0                        ,            ,         ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,                              ,I2C2_SCL             ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A1                        ,            ,         ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,                              ,I2C2_SMBA            ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A2                        ,            ,         ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A3                        ,            ,         ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A4                        ,            ,         ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A5                        ,            ,         ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1                     ,                     ,SPI5_NSS                              ,SAI1_SD_B                                 ,                                                      ,UART7_RX                                 ,QUADSPI_BK1_IO3                   ,                                              ,                               ,                              ,            ,         ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1                     ,                     ,SPI5_SCK                              ,SAI1_MCLK_B                               ,                                                      ,UART7_TX                                 ,QUADSPI_BK1_IO2                   ,                                              ,                               ,                              ,            ,         ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,                              ,                     ,SPI5_MISO                             ,SAI1_SCK_B                                ,                                                      ,UART7_RTS                                ,TIM13_CH1                         ,QUADSPI_BK1_IO0                               ,                               ,                              ,            ,         ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,                              ,                     ,SPI5_MOSI                             ,SAI1_FS_B                                 ,                                                      ,UART7_CTS                                ,TIM14_CH1                         ,QUADSPI_BK1_IO1                               ,                               ,                              ,            ,         ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,QUADSPI_CLK                       ,                                              ,                               ,                              ,DCMI_D11    ,LCD_DE   ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,                              ,                     ,SPI5_MOSI                             ,                                          ,                                                      ,                                         ,                                  ,SAI2_SD_B                                     ,                               ,FMC_SDNRAS                    ,DCMI_D12    ,         ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A6                        ,            ,         ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,                              ,I2C4_SMBA            ,                                      ,DFSDM1_DATAIN6                            ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A7                        ,            ,         ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,                              ,I2C4_SCL             ,                                      ,DFSDM1_CKIN6                              ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A8                        ,            ,         ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,                              ,I2C4_SDA             ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A9                        ,            ,         ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A10                       ,            ,         ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A11                       ,            ,         ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A12                       ,            ,         ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A13                       ,            ,         ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A14/FMC_BA0               ,            ,         ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_A15/FMC_BA1               ,            ,         ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_NE3                       ,DCMI_D12    ,LCD_R7   ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,                              ,                     ,                                      ,SAI1_MCLK_A                               ,                                                      ,USART6_CK                                ,                                  ,                                              ,                               ,FMC_INT                       ,DCMI_D13    ,LCD_CLK  ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,                              ,                     ,SPI6_NSS                              ,                                          ,SPDIFRX_IN2                                           ,USART6_RTS                               ,                                  ,                                              ,ETH_PPS_OUT                    ,FMC_SDCLK                     ,            ,LCD_G7   ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,                              ,                     ,SPI1_MISO                             ,                                          ,SPDIFRX_IN3                                           ,USART6_RX                                ,QUADSPI_BK2_IO2                   ,SAI2_FS_B                                     ,SDMMC2_D0                      ,FMC_NE2/FMC_NCE               ,DCMI_VSYNC  ,         ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,                              ,                     ,SPI1_NSS/I2S1_WS                      ,                                          ,                                                      ,                                         ,LCD_G3                            ,SAI2_SD_B                                     ,SDMMC2_D1                      ,FMC_NE3                       ,DCMI_D2     ,LCD_B2   ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,                              ,                     ,SPI1_SCK/I2S1_CK                      ,                                          ,SPDIFRX_IN0                                           ,                                         ,                                  ,SDMMC2_D2                                     ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                              ,DCMI_D3     ,LCD_B3   ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,LPTIM1_IN1                    ,                     ,SPI6_MISO                             ,                                          ,SPDIFRX_IN1                                           ,USART6_RTS                               ,LCD_B4                            ,                                              ,SDMMC2_D3                      ,FMC_NE4                       ,            ,LCD_B1   ,EVENTOUT,
+PortG,PG13,TRACED0      ,                 ,        ,LPTIM1_OUT                    ,                     ,SPI6_SCK                              ,                                          ,                                                      ,USART6_CTS                               ,                                  ,                                              ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24                       ,            ,LCD_R0   ,EVENTOUT,
+PortG,PG14,TRACED1      ,                 ,        ,LPTIM1_ETR                    ,                     ,SPI6_MOSI                             ,                                          ,                                                      ,USART6_TX                                ,QUADSPI_BK2_IO3                   ,                                              ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25                       ,            ,LCD_B0   ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,USART6_CTS                               ,                                  ,                                              ,                               ,FMC_SDNCAS                    ,DCMI_D13    ,         ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,         ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,         ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,LPTIM1_IN2                    ,                     ,                                      ,                                          ,                                                      ,                                         ,QUADSPI_BK2_IO0                   ,SAI2_SCK_B                                    ,ETH_MII_CRS                    ,FMC_SDCKE0                    ,            ,LCD_R0   ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,QUADSPI_BK2_IO1                   ,SAI2_MCK_B                                    ,ETH_MII_COL                    ,FMC_SDNE0                     ,            ,LCD_R1   ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,                              ,I2C2_SCL             ,                                      ,                                          ,                                                      ,                                         ,LCD_G5                            ,OTG_HS_ULPI_NXT                               ,                               ,                              ,            ,LCD_G4   ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,                              ,I2C2_SDA             ,SPI5_NSS                              ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_SDNWE                     ,            ,         ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,                              ,I2C2_SMBA            ,SPI5_SCK                              ,                                          ,                                                      ,                                         ,TIM12_CH1                         ,                                              ,ETH_MII_RXD2                   ,FMC_SDNE1                     ,DCMI_D8     ,         ,EVENTOUT,
+PortH,PH7 ,             ,                 ,        ,                              ,I2C3_SCL             ,SPI5_MISO                             ,                                          ,                                                      ,                                         ,                                  ,                                              ,ETH_MII_RXD3                   ,FMC_SDCKE1                    ,DCMI_D9     ,         ,EVENTOUT,
+PortH,PH8 ,             ,                 ,        ,                              ,I2C3_SDA             ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D16                       ,DCMI_HSYNC  ,LCD_R2   ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,                              ,I2C3_SMBA            ,                                      ,                                          ,                                                      ,                                         ,TIM12_CH2                         ,                                              ,                               ,FMC_D17                       ,DCMI_D0     ,LCD_R3   ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,                              ,I2C4_SMBA            ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D18                       ,DCMI_D1     ,LCD_R4   ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,                              ,I2C4_SCL             ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D19                       ,DCMI_D2     ,LCD_R5   ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,                              ,I2C4_SDA             ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D20                       ,DCMI_D3     ,LCD_R6   ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N                     ,                     ,                                      ,                                          ,                                                      ,UART4_TX                                 ,CAN1_TX                           ,                                              ,                               ,FMC_D21                       ,            ,LCD_G2   ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N                     ,                     ,                                      ,                                          ,                                                      ,UART4_RX                                 ,CAN1_RX                           ,                                              ,                               ,FMC_D22                       ,DCMI_D4     ,LCD_G3   ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N                     ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D23                       ,DCMI_D11    ,LCD_G4   ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,                              ,                     ,SPI2_NSS/I2S2_WS                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D24                       ,DCMI_D13    ,LCD_G5   ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,TIM8_BKIN2                    ,                     ,SPI2_SCK/I2S2_CK                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D25                       ,DCMI_D8     ,LCD_G6   ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4                      ,                     ,SPI2_MISO                             ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D26                       ,DCMI_D9     ,LCD_G7   ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR                      ,                     ,SPI2_MOSI/I2S2_SD                     ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,FMC_D27                       ,DCMI_D10    ,         ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN                     ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,SAI2_MCK_A                                    ,                               ,FMC_NBL2                      ,DCMI_D5     ,LCD_B4   ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1                      ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,SAI2_SCK_A                                    ,                               ,FMC_NBL3                      ,DCMI_VSYNC  ,LCD_B5   ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2                      ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,SAI2_SD_A                                     ,                               ,FMC_D28                       ,DCMI_D6     ,LCD_B6   ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3                      ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,SAI2_FS_A                                     ,                               ,FMC_D29                       ,DCMI_D7     ,LCD_B7   ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,         ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,UART4_RX                                 ,CAN1_RX                           ,                                              ,                               ,FMC_D30                       ,            ,LCD_VSYNC,EVENTOUT,
+PortI,PI10,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,ETH_MII_RX_ER                  ,FMC_D31                       ,            ,LCD_HSYNC,EVENTOUT,
+PortI,PI11,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,LCD_G6                            ,OTG_HS_ULPI_DIR                               ,                               ,                              ,            ,         ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_HSYNC,EVENTOUT,
+PortI,PI13,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_VSYNC,EVENTOUT,
+PortI,PI14,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_CLK  ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,LCD_G2                            ,                                              ,                               ,                              ,            ,LCD_R0   ,EVENTOUT,
+PortJ,PJ0 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,LCD_R7                            ,                                              ,                               ,                              ,            ,LCD_R1   ,EVENTOUT,
+PortJ,PJ1 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_R2   ,EVENTOUT,
+PortJ,PJ2 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,DSI_TE      ,LCD_R3   ,EVENTOUT,
+PortJ,PJ3 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_R4   ,EVENTOUT,
+PortJ,PJ4 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_R5   ,EVENTOUT,
+PortJ,PJ5 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_R6   ,EVENTOUT,
+PortJ,PJ6 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_R7   ,EVENTOUT,
+PortJ,PJ7 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_G0   ,EVENTOUT,
+PortJ,PJ8 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_G1   ,EVENTOUT,
+PortJ,PJ9 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_G2   ,EVENTOUT,
+PortJ,PJ10,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_G3   ,EVENTOUT,
+PortJ,PJ11,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_G4   ,EVENTOUT,
+PortJ,PJ12,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,LCD_G3                            ,                                              ,                               ,                              ,            ,LCD_B0   ,EVENTOUT,
+PortJ,PJ13,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,LCD_G4                            ,                                              ,                               ,                              ,            ,LCD_B1   ,EVENTOUT,
+PortJ,PJ14,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_B2   ,EVENTOUT,
+PortJ,PJ15,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_B3   ,EVENTOUT,
+PortK,PK0 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_G5   ,EVENTOUT,
+PortK,PK1 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_G6   ,EVENTOUT,
+PortK,PK2 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_G7   ,EVENTOUT,
+PortK,PK3 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_B4   ,EVENTOUT,
+PortK,PK4 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_B5   ,EVENTOUT,
+PortK,PK5 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_B6   ,EVENTOUT,
+PortK,PK6 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_B7   ,EVENTOUT,
+PortK,PK7 ,             ,                 ,        ,                              ,                     ,                                      ,                                          ,                                                      ,                                         ,                                  ,                                              ,                               ,                              ,            ,LCD_DE   ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32g0b1_af.csv b/ports/stm32/boards/stm32g0b1_af.csv
index bea1c1e156..609360fb22 100644
--- a/ports/stm32/boards/stm32g0b1_af.csv
+++ b/ports/stm32/boards/stm32g0b1_af.csv
@@ -1,96 +1,96 @@
-Port,Pin,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,ADC
-PortA,PA0,SPI2_SCK/I2S2_CK,USART2_CTS,TIM2_CH1/TIM2_ETR,,USART4_TX,LPTIM1_OUT,UCPD2_FRSTX,COMP1_OUT,,,,,,,,,ADC1_IN0
-PortA,PA1,SPI1_SCK/I2S1_CK,USART2_RTS/USART2_DE/USART2_CK,TIM2_CH2,,USART4_RX,TIM15_CH1N,I2C1_SMBA,EVENTOUT,,,,,,,,,ADC1_IN1
-PortA,PA2,SPI1_MOSI/I2S1_SD,USART2_TX,TIM2_CH3,,UCPD1_FRSTX,TIM15_CH1,LPUART1_TX,COMP2_OUT,,,,,,,,,ADC1_IN2
-PortA,PA3,SPI2_MISO/I2S2_MCK,USART2_RX,TIM2_CH4,,UCPD2_FRSTX,TIM15_CH2,LPUART1_RX,EVENTOUT,,,,,,,,,ADC1_IN3
-PortA,PA4,SPI1_NSS/I2S1_WS,SPI2_MOSI/I2S2_SD,USB_NOE,USART6_TX,TIM14_CH1,LPTIM2_OUT,UCPD2_FRSTX,EVENTOUT,,SPI3_NSS,,,,,,,ADC1_IN4
-PortA,PA5,SPI1_SCK/I2S1_CK,CEC,TIM2_CH1/TIM2_ETR,USART6_RX,USART3_TX,LPTIM2_ETR,UCPD1_FRSTX,EVENTOUT,,,,,,,,,ADC1_IN5
-PortA,PA6,SPI1_MISO/I2S1_MCK,TIM3_CH1,TIM1_BKIN,USART6_CTS,USART3_CTS,TIM16_CH1,LPUART1_CTS,COMP1_OUT,I2C2_SDA,I2C3_SDA,,,,,,,ADC1_IN6
-PortA,PA7,SPI1_MOSI/I2S1_SD,TIM3_CH2,TIM1_CH1N,USART6_RTS/USART6_DE/USART6_CK,TIM14_CH1,TIM17_CH1,UCPD1_FRSTX,COMP2_OUT,I2C2_SCL,I2C3_SCL,,,,,,,ADC1_IN7
-PortA,PA8,MCO,SPI2_NSS/I2S2_WS,TIM1_CH1,,CRS1_SYNC,LPTIM2_OUT,,EVENTOUT,I2C2_SMBA,,,,,,,,
-PortA,PA9,MCO,USART1_TX,TIM1_CH2,,SPI2_MISO/I2S2_MCK,TIM15_BKIN,I2C1_SCL,EVENTOUT,I2C2_SCL,,,,,,,,
-PortA,PA10,SPI2_MOSI/I2S2_SD,USART1_RX,TIM1_CH3,MCO2,,TIM17_BKIN,I2C1_SDA,EVENTOUT,I2C2_SDA,,,,,,,,
-PortA,PA11,SPI1_MISO/I2S1_MCK,USART1_CTS,TIM1_CH4,FDCAN1_RX,,TIM1_BKIN2,I2C2_SCL,COMP1_OUT,,,,,,,,,
-PortA,PA12,SPI1_MOSI/I2S1_SD,USART1_RTS/USART1_DE/USART1_CK,TIM1_ETR,FDCAN1_TX,,I2S_CKIN,I2C2_SDA,COMP2_OUT,,,,,,,,,
-PortA,PA13,SWDIO,IR_OUT,USB_NOE,,,,,EVENTOUT,,,LPUART2_RX,,,,,,
-PortA,PA14,SWCLK,USART2_TX,,,,,,EVENTOUT,,,LPUART2_TX,,,,,,
-PortA,PA15,SPI1_NSS/I2S1_WS,USART2_RX,TIM2_CH1/TIM2_ETR,MCO2,USART4_RTS/USART4_DE/USART4_CK,USART3_RTS/USART3_DE/USART3_CK,USB_NOE,EVENTOUT,I2C2_SMBA,SPI3_NSS,,,,,,,
-PortB,PB0,SPI1_NSS/I2S1_WS,TIM3_CH3,TIM1_CH2N,FDCAN2_RX,USART3_RX,LPTIM1_OUT,UCPD1_FRSTX,COMP1_OUT,USART5_TX,,LPUART2_CTS,,,,,,ADC1_IN8
-PortB,PB1,TIM14_CH1,TIM3_CH4,TIM1_CH3N,FDCAN2_TX,USART3_RTS/USART3_DE/USART3_CK,LPTIM2_IN1,LPUART1_RTS/LPUART1_DE,COMP3_OUT,USART5_RX,,LPUART2_RTS/LPUART2_DE,,,,,,ADC1_IN9
-PortB,PB2,,SPI2_MISO/I2S2_MCK,,MCO2,USART3_TX,LPTIM1_OUT,,EVENTOUT,,,,,,,,,ADC1_IN10
-PortB,PB3,SPI1_SCK/I2S1_CK,TIM1_CH2,TIM2_CH2,USART5_TX,USART1_RTS/USART1_DE/USART1_CK,,I2C3_SCL,EVENTOUT,I2C2_SCL,SPI3_SCK,,,,,,,
-PortB,PB4,SPI1_MISO/I2S1_MCK,TIM3_CH1,,USART5_RX,USART1_CTS,TIM17_BKIN,I2C3_SDA,EVENTOUT,I2C2_SDA,SPI3_MISO,,,,,,,
-PortB,PB5,SPI1_MOSI/I2S1_SD,TIM3_CH2,TIM16_BKIN,FDCAN2_RX,,LPTIM1_IN1,I2C1_SMBA,COMP2_OUT,USART5_RTS/USART5_DE/USART5_CK,SPI3_MOSI,,,,,,,
-PortB,PB6,USART1_TX,TIM1_CH3,TIM16_CH1N,FDCAN2_TX,SPI2_MISO/I2S2_MCK,LPTIM1_ETR,I2C1_SCL,EVENTOUT,USART5_CTS,TIM4_CH1,LPUART2_TX,,,,,,
-PortB,PB7,USART1_RX,SPI2_MOSI/I2S2_SD,TIM17_CH1N,,USART4_CTS,LPTIM1_IN2,I2C1_SDA,EVENTOUT,,TIM4_CH2,LPUART2_RX,,,,,,
-PortB,PB8,CEC,SPI2_SCK/I2S2_CK,TIM16_CH1,FDCAN1_RX,USART3_TX,TIM15_BKIN,I2C1_SCL,EVENTOUT,USART6_TX,TIM4_CH3,,,,,,,
-PortB,PB9,IR_OUT,UCPD2_FRSTX,TIM17_CH1,FDCAN1_TX,USART3_RX,SPI2_NSS/I2S2_WS,I2C1_SDA,EVENTOUT,USART6_RX,TIM4_CH4,,,,,,,
-PortB,PB10,CEC,LPUART1_RX,TIM2_CH3,,USART3_TX,SPI2_SCK/I2S2_CK,I2C2_SCL,COMP1_OUT,,,,,,,,,ADC1_IN11
-PortB,PB11,SPI2_MOSI/I2S2_SD,LPUART1_TX,TIM2_CH4,,USART3_RX,,I2C2_SDA,COMP2_OUT,,,,,,,,,
-PortB,PB12,SPI2_NSS/I2S2_WS,LPUART1_RTS/LPUART1_DE,TIM1_BKIN,FDCAN2_RX,,TIM15_BKIN,UCPD2_FRSTX,EVENTOUT,I2C2_SMBA,,,,,,,,
-PortB,PB13,SPI2_SCK/I2S2_CK,LPUART1_CTS,TIM1_CH1N,FDCAN2_TX,USART3_CTS,TIM15_CH1N,I2C2_SCL,EVENTOUT,,,,,,,,,
-PortB,PB14,SPI2_MISO/I2S2_MCK,UCPD1_FRSTX,TIM1_CH2N,,USART3_RTS/USART3_DE/USART3_CK,TIM15_CH1,I2C2_SDA,EVENTOUT,USART6_RTS/USART6_DE/USART6_CK,,,,,,,,
-PortB,PB15,SPI2_MOSI/I2S2_SD,,TIM1_CH3N,,TIM15_CH1N,TIM15_CH2,,EVENTOUT,USART6_CTS,,,,,,,,
-PortC,PC0,LPTIM1_IN1,LPUART1_RX,LPTIM2_IN1,LPUART2_TX,USART6_TX,,I2C3_SCL,COMP3_OUT,,,,,,,,,
-PortC,PC1,LPTIM1_OUT,LPUART1_TX,TIM15_CH1,LPUART2_RX,USART6_RX,,I2C3_SDA,,,,,,,,,,
-PortC,PC2,LPTIM1_IN2,SPI2_MISO/I2S2_MCK,TIM15_CH2,FDCAN2_RX,,,,COMP3_OUT,,,,,,,,,
-PortC,PC3,LPTIM1_ETR,SPI2_MOSI/I2S2_SD,LPTIM2_ETR,FDCAN2_TX,,,,,,,,,,,,,
-PortC,PC4,USART3_TX,USART1_TX,TIM2_CH1/TIM2_ETR,FDCAN1_RX,,,,,,,,,,,,,
-PortC,PC5,USART3_RX,USART1_RX,TIM2_CH2,FDCAN1_TX,,,,,,,,,,,,,ADC1_IN18
-PortC,PC6,UCPD1_FRSTX,TIM3_CH1,TIM2_CH3,LPUART2_TX,,,,,,,,,,,,,
-PortC,PC7,UCPD2_FRSTX,TIM3_CH2,TIM2_CH4,LPUART2_RX,,,,,,,,,,,,,
-PortC,PC8,UCPD2_FRSTX,TIM3_CH3,TIM1_CH1,LPUART2_CTS,,,,,,,,,,,,,
-PortC,PC9,I2S_CKIN,TIM3_CH4,TIM1_CH2,LPUART2_RTS/LPUART2_DE,,,USB_NOE,,,,,,,,,,
-PortC,PC10,USART3_TX,USART4_TX,TIM1_CH3,,SPI3_SCK,,,,,,,,,,,,
-PortC,PC11,USART3_RX,USART4_RX,TIM1_CH4,,SPI3_MISO,,,,,,,,,,,,
-PortC,PC12,LPTIM1_IN1,UCPD1_FRSTX,TIM14_CH1,USART5_TX,SPI3_MOSI,,,,,,,,,,,,
-PortC,PC13,,,TIM1_BKIN,,,,,,,,,,,,,,
-PortC,PC14,,,TIM1_BKIN2,,,,,,,,,,,,,,
-PortC,PC15,OSC32_EN,OSC_EN,TIM15_BKIN,,,,,,,,,,,,,,
-PortD,PD0,EVENTOUT,SPI2_NSS/I2S2_WS,TIM16_CH1,FDCAN1_RX,,,,,,,,,,,,,
-PortD,PD1,EVENTOUT,SPI2_SCK/I2S2_CK,TIM17_CH1,FDCAN1_TX,,,,,,,,,,,,,
-PortD,PD2,USART3_RTS/USART3_DE/USART3_CK,TIM3_ETR,TIM1_CH1N,USART5_RX,,,,,,,,,,,,,
-PortD,PD3,USART2_CTS,SPI2_MISO/I2S2_MCK,TIM1_CH2N,USART5_TX,,,,,,,,,,,,,
-PortD,PD4,USART2_RTS/USART2_DE/USART2_CK,SPI2_MOSI/I2S2_SD,TIM1_CH3N,USART5_RTS/USART5_DE/USART5_CK,,,,,,,,,,,,,
-PortD,PD5,USART2_TX,SPI1_MISO/I2S1_MCK,TIM1_BKIN,USART5_CTS,,,,,,,,,,,,,
-PortD,PD6,USART2_RX,SPI1_MOSI/I2S1_SD,LPTIM2_OUT,,,,,,,,,,,,,,
-PortD,PD7,,,,MCO2,,,,,,,,,,,,,
-PortD,PD8,USART3_TX,SPI1_SCK/I2S1_CK,LPTIM1_OUT,,,,,,,,,,,,,,
-PortD,PD9,USART3_RX,SPI1_NSS/I2S1_WS,TIM1_BKIN2,,,,,,,,,,,,,,
-PortD,PD10,MCO,,,,,,,,,,,,,,,,
-PortD,PD11,USART3_CTS,LPTIM2_ETR,,,,,,,,,,,,,,,
-PortD,PD12,USART3_RTS/USART3_DE/USART3_CK,LPTIM2_IN1,TIM4_CH1,FDCAN1_RX,,,,,,,,,,,,,
-PortD,PD13,,LPTIM2_OUT,TIM4_CH2,FDCAN1_TX,,,,,,,,,,,,,
-PortD,PD14,,LPUART2_CTS,TIM4_CH3,FDCAN2_RX,,,,,,,,,,,,,
-PortD,PD15,CRS1_SYNC,LPUART2_RTS/LPUART2_DE,TIM4_CH4,FDCAN2_TX,,,,,,,,,,,,,
-PortE,PE0,TIM16_CH1,EVENTOUT,TIM4_ETR,,,,,,,,,,,,,,
-PortE,PE1,TIM17_CH1,EVENTOUT,,,,,,,,,,,,,,,
-PortE,PE2,,TIM3_ETR,,,,,,,,,,,,,,,
-PortE,PE3,,TIM3_CH1,,,,,,,,,,,,,,,
-PortE,PE4,,TIM3_CH2,,,,,,,,,,,,,,,
-PortE,PE5,,TIM3_CH3,,,,,,,,,,,,,,,
-PortE,PE6,,TIM3_CH4,,,,,,,,,,,,,,,
-PortE,PE7,,TIM1_ETR,,USART5_RTS/USART5_DE/USART5_CK,,,,,,,,,,,,,
-PortE,PE8,USART4_TX,TIM1_CH1N,,,,,,,,,,,,,,,
-PortE,PE9,USART4_RX,TIM1_CH1,,,,,,,,,,,,,,,
-PortE,PE10,,TIM1_CH2N,,USART5_TX,,,,,,,,,,,,,
-PortE,PE11,,TIM1_CH2,,USART5_RX,,,,,,,,,,,,,
-PortE,PE12,SPI1_NSS/I2S1_WS,TIM1_CH3N,,,,,,,,,,,,,,,
-PortE,PE13,SPI1_SCK/I2S1_CK,TIM1_CH3,,,,,,,,,,,,,,,
-PortE,PE14,SPI1_MISO/I2S1_MCK,TIM1_CH4,TIM1_BK2,,,,,,,,,,,,,,
-PortE,PE15,SPI1_MOSI/I2S1_SD,TIM1_BK,,,,,,,,,,,,,,,
-PortF,PF0,CRS1_SYNC,EVENTOUT,TIM14_CH1,,,,,,,,,,,,,,
-PortF,PF1,OSC_EN,EVENTOUT,TIM15_CH1N,,,,,,,,,,,,,,
-PortF,PF2,MCO,LPUART2_TX,,LPUART2_RTS/LPUART2_DE,,,,,,,,,,,,,
-PortF,PF3,,LPUART2_RX,,USART6_RTS/USART6_DE/USART6_CK,,,,,,,,,,,,,
-PortF,PF4,,LPUART1_TX,,,,,,,,,,,,,,,
-PortF,PF5,,LPUART1_RX,,,,,,,,,,,,,,,
-PortF,PF6,,LPUART1_RTS/LPUART1_DE,,,,,,,,,,,,,,,
-PortF,PF7,,LPUART1_CTS,,USART5_CTS,,,,,,,,,,,,,
-PortF,PF8,,,,,,,,,,,,,,,,,
-PortF,PF9,,,,USART6_TX,,,,,,,,,,,,,
-PortF,PF10,,,,USART6_RX,,,,,,,,,,,,,
-PortF,PF11,,,,USART6_RTS/USART6_DE/USART6_CK,,,,,,,,,,,,,
-PortF,PF12,TIM15_CH1,,,USART6_CTS,,,,,,,,,,,,,
-PortF,PF13,TIM15_CH2,,,,,,,,,,,,,,,,
+Port ,Pin ,AF0                           ,AF1                           ,AF2              ,AF3                           ,AF4                           ,AF5                           ,AF6                   ,AF7      ,AF8                           ,AF9      ,AF10                  ,AF11,AF12,AF13,AF14,AF15,ADC
+     ,    ,AF0                           ,AF1                           ,AF2              ,AF3                           ,AF4                           ,AF5                           ,AF6                   ,AF7      ,AF8                           ,AF9      ,AF10                  ,AF11,AF12,AF13,AF14,AF15,ADC
+PortA,PA0 ,SPI2_SCK/I2S2_CK              ,USART2_CTS                    ,TIM2_CH1/TIM2_ETR,                              ,USART4_TX                     ,LPTIM1_OUT                    ,UCPD2_FRSTX           ,COMP1_OUT,                              ,         ,                      ,    ,    ,    ,    ,    ,ADC1_IN0
+PortA,PA1 ,SPI1_SCK/I2S1_CK              ,USART2_RTS/USART2_DE/USART2_CK,TIM2_CH2         ,                              ,USART4_RX                     ,TIM15_CH1N                    ,I2C1_SMBA             ,EVENTOUT ,                              ,         ,                      ,    ,    ,    ,    ,    ,ADC1_IN1
+PortA,PA2 ,SPI1_MOSI/I2S1_SD             ,USART2_TX                     ,TIM2_CH3         ,                              ,UCPD1_FRSTX                   ,TIM15_CH1                     ,LPUART1_TX            ,COMP2_OUT,                              ,         ,                      ,    ,    ,    ,    ,    ,ADC1_IN2
+PortA,PA3 ,SPI2_MISO/I2S2_MCK            ,USART2_RX                     ,TIM2_CH4         ,                              ,UCPD2_FRSTX                   ,TIM15_CH2                     ,LPUART1_RX            ,EVENTOUT ,                              ,         ,                      ,    ,    ,    ,    ,    ,ADC1_IN3
+PortA,PA4 ,SPI1_NSS/I2S1_WS              ,SPI2_MOSI/I2S2_SD             ,USB_NOE          ,USART6_TX                     ,TIM14_CH1                     ,LPTIM2_OUT                    ,UCPD2_FRSTX           ,EVENTOUT ,                              ,SPI3_NSS ,                      ,    ,    ,    ,    ,    ,ADC1_IN4
+PortA,PA5 ,SPI1_SCK/I2S1_CK              ,CEC                           ,TIM2_CH1/TIM2_ETR,USART6_RX                     ,USART3_TX                     ,LPTIM2_ETR                    ,UCPD1_FRSTX           ,EVENTOUT ,                              ,         ,                      ,    ,    ,    ,    ,    ,ADC1_IN5
+PortA,PA6 ,SPI1_MISO/I2S1_MCK            ,TIM3_CH1                      ,TIM1_BKIN        ,USART6_CTS                    ,USART3_CTS                    ,TIM16_CH1                     ,LPUART1_CTS           ,COMP1_OUT,I2C2_SDA                      ,I2C3_SDA ,                      ,    ,    ,    ,    ,    ,ADC1_IN6
+PortA,PA7 ,SPI1_MOSI/I2S1_SD             ,TIM3_CH2                      ,TIM1_CH1N        ,USART6_RTS/USART6_DE/USART6_CK,TIM14_CH1                     ,TIM17_CH1                     ,UCPD1_FRSTX           ,COMP2_OUT,I2C2_SCL                      ,I2C3_SCL ,                      ,    ,    ,    ,    ,    ,ADC1_IN7
+PortA,PA8 ,MCO                           ,SPI2_NSS/I2S2_WS              ,TIM1_CH1         ,                              ,CRS1_SYNC                     ,LPTIM2_OUT                    ,                      ,EVENTOUT ,I2C2_SMBA                     ,         ,                      ,    ,    ,    ,    ,    ,
+PortA,PA9 ,MCO                           ,USART1_TX                     ,TIM1_CH2         ,                              ,SPI2_MISO/I2S2_MCK            ,TIM15_BKIN                    ,I2C1_SCL              ,EVENTOUT ,I2C2_SCL                      ,         ,                      ,    ,    ,    ,    ,    ,
+PortA,PA10,SPI2_MOSI/I2S2_SD             ,USART1_RX                     ,TIM1_CH3         ,MCO2                          ,                              ,TIM17_BKIN                    ,I2C1_SDA              ,EVENTOUT ,I2C2_SDA                      ,         ,                      ,    ,    ,    ,    ,    ,
+PortA,PA11,SPI1_MISO/I2S1_MCK            ,USART1_CTS                    ,TIM1_CH4         ,FDCAN1_RX                     ,                              ,TIM1_BKIN2                    ,I2C2_SCL              ,COMP1_OUT,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortA,PA12,SPI1_MOSI/I2S1_SD             ,USART1_RTS/USART1_DE/USART1_CK,TIM1_ETR         ,FDCAN1_TX                     ,                              ,I2S_CKIN                      ,I2C2_SDA              ,COMP2_OUT,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortA,PA13,SWDIO                         ,IR_OUT                        ,USB_NOE          ,                              ,                              ,                              ,                      ,EVENTOUT ,                              ,         ,LPUART2_RX            ,    ,    ,    ,    ,    ,
+PortA,PA14,SWCLK                         ,USART2_TX                     ,                 ,                              ,                              ,                              ,                      ,EVENTOUT ,                              ,         ,LPUART2_TX            ,    ,    ,    ,    ,    ,
+PortA,PA15,SPI1_NSS/I2S1_WS              ,USART2_RX                     ,TIM2_CH1/TIM2_ETR,MCO2                          ,USART4_RTS/USART4_DE/USART4_CK,USART3_RTS/USART3_DE/USART3_CK,USB_NOE               ,EVENTOUT ,I2C2_SMBA                     ,SPI3_NSS ,                      ,    ,    ,    ,    ,    ,
+PortB,PB0 ,SPI1_NSS/I2S1_WS              ,TIM3_CH3                      ,TIM1_CH2N        ,FDCAN2_RX                     ,USART3_RX                     ,LPTIM1_OUT                    ,UCPD1_FRSTX           ,COMP1_OUT,USART5_TX                     ,         ,LPUART2_CTS           ,    ,    ,    ,    ,    ,ADC1_IN8
+PortB,PB1 ,TIM14_CH1                     ,TIM3_CH4                      ,TIM1_CH3N        ,FDCAN2_TX                     ,USART3_RTS/USART3_DE/USART3_CK,LPTIM2_IN1                    ,LPUART1_RTS/LPUART1_DE,COMP3_OUT,USART5_RX                     ,         ,LPUART2_RTS/LPUART2_DE,    ,    ,    ,    ,    ,ADC1_IN9
+PortB,PB2 ,                              ,SPI2_MISO/I2S2_MCK            ,                 ,MCO2                          ,USART3_TX                     ,LPTIM1_OUT                    ,                      ,EVENTOUT ,                              ,         ,                      ,    ,    ,    ,    ,    ,ADC1_IN10
+PortB,PB3 ,SPI1_SCK/I2S1_CK              ,TIM1_CH2                      ,TIM2_CH2         ,USART5_TX                     ,USART1_RTS/USART1_DE/USART1_CK,                              ,I2C3_SCL              ,EVENTOUT ,I2C2_SCL                      ,SPI3_SCK ,                      ,    ,    ,    ,    ,    ,
+PortB,PB4 ,SPI1_MISO/I2S1_MCK            ,TIM3_CH1                      ,                 ,USART5_RX                     ,USART1_CTS                    ,TIM17_BKIN                    ,I2C3_SDA              ,EVENTOUT ,I2C2_SDA                      ,SPI3_MISO,                      ,    ,    ,    ,    ,    ,
+PortB,PB5 ,SPI1_MOSI/I2S1_SD             ,TIM3_CH2                      ,TIM16_BKIN       ,FDCAN2_RX                     ,                              ,LPTIM1_IN1                    ,I2C1_SMBA             ,COMP2_OUT,USART5_RTS/USART5_DE/USART5_CK,SPI3_MOSI,                      ,    ,    ,    ,    ,    ,
+PortB,PB6 ,USART1_TX                     ,TIM1_CH3                      ,TIM16_CH1N       ,FDCAN2_TX                     ,SPI2_MISO/I2S2_MCK            ,LPTIM1_ETR                    ,I2C1_SCL              ,EVENTOUT ,USART5_CTS                    ,TIM4_CH1 ,LPUART2_TX            ,    ,    ,    ,    ,    ,
+PortB,PB7 ,USART1_RX                     ,SPI2_MOSI/I2S2_SD             ,TIM17_CH1N       ,                              ,USART4_CTS                    ,LPTIM1_IN2                    ,I2C1_SDA              ,EVENTOUT ,                              ,TIM4_CH2 ,LPUART2_RX            ,    ,    ,    ,    ,    ,
+PortB,PB8 ,CEC                           ,SPI2_SCK/I2S2_CK              ,TIM16_CH1        ,FDCAN1_RX                     ,USART3_TX                     ,TIM15_BKIN                    ,I2C1_SCL              ,EVENTOUT ,USART6_TX                     ,TIM4_CH3 ,                      ,    ,    ,    ,    ,    ,
+PortB,PB9 ,IR_OUT                        ,UCPD2_FRSTX                   ,TIM17_CH1        ,FDCAN1_TX                     ,USART3_RX                     ,SPI2_NSS/I2S2_WS              ,I2C1_SDA              ,EVENTOUT ,USART6_RX                     ,TIM4_CH4 ,                      ,    ,    ,    ,    ,    ,
+PortB,PB10,CEC                           ,LPUART1_RX                    ,TIM2_CH3         ,                              ,USART3_TX                     ,SPI2_SCK/I2S2_CK              ,I2C2_SCL              ,COMP1_OUT,                              ,         ,                      ,    ,    ,    ,    ,    ,ADC1_IN11
+PortB,PB11,SPI2_MOSI/I2S2_SD             ,LPUART1_TX                    ,TIM2_CH4         ,                              ,USART3_RX                     ,                              ,I2C2_SDA              ,COMP2_OUT,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortB,PB12,SPI2_NSS/I2S2_WS              ,LPUART1_RTS/LPUART1_DE        ,TIM1_BKIN        ,FDCAN2_RX                     ,                              ,TIM15_BKIN                    ,UCPD2_FRSTX           ,EVENTOUT ,I2C2_SMBA                     ,         ,                      ,    ,    ,    ,    ,    ,
+PortB,PB13,SPI2_SCK/I2S2_CK              ,LPUART1_CTS                   ,TIM1_CH1N        ,FDCAN2_TX                     ,USART3_CTS                    ,TIM15_CH1N                    ,I2C2_SCL              ,EVENTOUT ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortB,PB14,SPI2_MISO/I2S2_MCK            ,UCPD1_FRSTX                   ,TIM1_CH2N        ,                              ,USART3_RTS/USART3_DE/USART3_CK,TIM15_CH1                     ,I2C2_SDA              ,EVENTOUT ,USART6_RTS/USART6_DE/USART6_CK,         ,                      ,    ,    ,    ,    ,    ,
+PortB,PB15,SPI2_MOSI/I2S2_SD             ,                              ,TIM1_CH3N        ,                              ,TIM15_CH1N                    ,TIM15_CH2                     ,                      ,EVENTOUT ,USART6_CTS                    ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC0 ,LPTIM1_IN1                    ,LPUART1_RX                    ,LPTIM2_IN1       ,LPUART2_TX                    ,USART6_TX                     ,                              ,I2C3_SCL              ,COMP3_OUT,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC1 ,LPTIM1_OUT                    ,LPUART1_TX                    ,TIM15_CH1        ,LPUART2_RX                    ,USART6_RX                     ,                              ,I2C3_SDA              ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC2 ,LPTIM1_IN2                    ,SPI2_MISO/I2S2_MCK            ,TIM15_CH2        ,FDCAN2_RX                     ,                              ,                              ,                      ,COMP3_OUT,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC3 ,LPTIM1_ETR                    ,SPI2_MOSI/I2S2_SD             ,LPTIM2_ETR       ,FDCAN2_TX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC4 ,USART3_TX                     ,USART1_TX                     ,TIM2_CH1/TIM2_ETR,FDCAN1_RX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC5 ,USART3_RX                     ,USART1_RX                     ,TIM2_CH2         ,FDCAN1_TX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,ADC1_IN18
+PortC,PC6 ,UCPD1_FRSTX                   ,TIM3_CH1                      ,TIM2_CH3         ,LPUART2_TX                    ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC7 ,UCPD2_FRSTX                   ,TIM3_CH2                      ,TIM2_CH4         ,LPUART2_RX                    ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC8 ,UCPD2_FRSTX                   ,TIM3_CH3                      ,TIM1_CH1         ,LPUART2_CTS                   ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC9 ,I2S_CKIN                      ,TIM3_CH4                      ,TIM1_CH2         ,LPUART2_RTS/LPUART2_DE        ,                              ,                              ,USB_NOE               ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC10,USART3_TX                     ,USART4_TX                     ,TIM1_CH3         ,                              ,SPI3_SCK                      ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC11,USART3_RX                     ,USART4_RX                     ,TIM1_CH4         ,                              ,SPI3_MISO                     ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC12,LPTIM1_IN1                    ,UCPD1_FRSTX                   ,TIM14_CH1        ,USART5_TX                     ,SPI3_MOSI                     ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC13,                              ,                              ,TIM1_BKIN        ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC14,                              ,                              ,TIM1_BKIN2       ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortC,PC15,OSC32_EN                      ,OSC_EN                        ,TIM15_BKIN       ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD0 ,EVENTOUT                      ,SPI2_NSS/I2S2_WS              ,TIM16_CH1        ,FDCAN1_RX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD1 ,EVENTOUT                      ,SPI2_SCK/I2S2_CK              ,TIM17_CH1        ,FDCAN1_TX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD2 ,USART3_RTS/USART3_DE/USART3_CK,TIM3_ETR                      ,TIM1_CH1N        ,USART5_RX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD3 ,USART2_CTS                    ,SPI2_MISO/I2S2_MCK            ,TIM1_CH2N        ,USART5_TX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD4 ,USART2_RTS/USART2_DE/USART2_CK,SPI2_MOSI/I2S2_SD             ,TIM1_CH3N        ,USART5_RTS/USART5_DE/USART5_CK,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD5 ,USART2_TX                     ,SPI1_MISO/I2S1_MCK            ,TIM1_BKIN        ,USART5_CTS                    ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD6 ,USART2_RX                     ,SPI1_MOSI/I2S1_SD             ,LPTIM2_OUT       ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD7 ,                              ,                              ,                 ,MCO2                          ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD8 ,USART3_TX                     ,SPI1_SCK/I2S1_CK              ,LPTIM1_OUT       ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD9 ,USART3_RX                     ,SPI1_NSS/I2S1_WS              ,TIM1_BKIN2       ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD10,MCO                           ,                              ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD11,USART3_CTS                    ,LPTIM2_ETR                    ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD12,USART3_RTS/USART3_DE/USART3_CK,LPTIM2_IN1                    ,TIM4_CH1         ,FDCAN1_RX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD13,                              ,LPTIM2_OUT                    ,TIM4_CH2         ,FDCAN1_TX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD14,                              ,LPUART2_CTS                   ,TIM4_CH3         ,FDCAN2_RX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortD,PD15,CRS1_SYNC                     ,LPUART2_RTS/LPUART2_DE        ,TIM4_CH4         ,FDCAN2_TX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE0 ,TIM16_CH1                     ,EVENTOUT                      ,TIM4_ETR         ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE1 ,TIM17_CH1                     ,EVENTOUT                      ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE2 ,                              ,TIM3_ETR                      ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE3 ,                              ,TIM3_CH1                      ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE4 ,                              ,TIM3_CH2                      ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE5 ,                              ,TIM3_CH3                      ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE6 ,                              ,TIM3_CH4                      ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE7 ,                              ,TIM1_ETR                      ,                 ,USART5_RTS/USART5_DE/USART5_CK,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE8 ,USART4_TX                     ,TIM1_CH1N                     ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE9 ,USART4_RX                     ,TIM1_CH1                      ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE10,                              ,TIM1_CH2N                     ,                 ,USART5_TX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE11,                              ,TIM1_CH2                      ,                 ,USART5_RX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE12,SPI1_NSS/I2S1_WS              ,TIM1_CH3N                     ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE13,SPI1_SCK/I2S1_CK              ,TIM1_CH3                      ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE14,SPI1_MISO/I2S1_MCK            ,TIM1_CH4                      ,TIM1_BK2         ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortE,PE15,SPI1_MOSI/I2S1_SD             ,TIM1_BK                       ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF0 ,CRS1_SYNC                     ,EVENTOUT                      ,TIM14_CH1        ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF1 ,OSC_EN                        ,EVENTOUT                      ,TIM15_CH1N       ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF2 ,MCO                           ,LPUART2_TX                    ,                 ,LPUART2_RTS/LPUART2_DE        ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF3 ,                              ,LPUART2_RX                    ,                 ,USART6_RTS/USART6_DE/USART6_CK,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF4 ,                              ,LPUART1_TX                    ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF5 ,                              ,LPUART1_RX                    ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF6 ,                              ,LPUART1_RTS/LPUART1_DE        ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF7 ,                              ,LPUART1_CTS                   ,                 ,USART5_CTS                    ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF8 ,                              ,                              ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF9 ,                              ,                              ,                 ,USART6_TX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF10,                              ,                              ,                 ,USART6_RX                     ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF11,                              ,                              ,                 ,USART6_RTS/USART6_DE/USART6_CK,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF12,TIM15_CH1                     ,                              ,                 ,USART6_CTS                    ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
+PortF,PF13,TIM15_CH2                     ,                              ,                 ,                              ,                              ,                              ,                      ,         ,                              ,         ,                      ,    ,    ,    ,    ,    ,
diff --git a/ports/stm32/boards/stm32g474_af.csv b/ports/stm32/boards/stm32g474_af.csv
index 0108ee9013..34ab285837 100644
--- a/ports/stm32/boards/stm32g474_af.csv
+++ b/ports/stm32/boards/stm32g474_af.csv
@@ -1,109 +1,109 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,I2C4/SYS_AF,LPTIM1/TIM2/5/15/16/17,I2C1/3/TIM1/2/3/4/5/8/20/15/COMP1,QUADSPI1/I2C3/4/SAI1/USB/HRTIM1/TIM8/20/15/COMP3,I2C1/2/3/4/TIM1/8/16/17,QUADSPI1/SPI1/2/3/4/I2S2/3/I2C4/UART4/5/TIM8/Infrared,QUADSPI1/SPI2/3/I2S2/3/TIM1/5/8/20/Infrared,USART1/2/3/CAN/COMP7/5/6,I2C3/4/UART4/5/LPUART1/COMP1/2/7/4/5/6/3,CAN/TIM1/8/15/CAN1/2,QUADSPI1/TIM2/3/4/8/17,LPTIM1/TIM1/8/CAN1/3,FMC/LPUART1/SAI1/HRTIM1/TIM1,SAI1SAI1/HRTIM1/OPAMP2,UART4/5/SAI1/TIM2/15/UCPD1,SYS,ADC,COMP,DAC,OPAMP
-PortA,PA0,,TIM2_CH1,TIM5_CH1,,,,,USART2_CTS,COMP1_OUT,TIM8_BKIN,TIM8_ETR,,,,TIM2_ETR,EVENTOUT,ADC12_IN1,COMP1_INM/COMP3_INP,,
-PortA,PA1,RTC_REFIN,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS_DE,,TIM15_CH1N,,,,,,EVENTOUT,ADC12_IN2,COMP1_INP,,OPAMP1_VINP/OPAMP3_VINP/OPAMP6_VINM
-PortA,PA2,,TIM2_CH3,TIM5_CH3,,,,,USART2_TX,COMP2_OUT,TIM15_CH1,QUADSPI1_BK1_NCS,,LPUART1_TX,,UCPD1_FRSTX,EVENTOUT,ADC1_IN3,COMP2_INM,,OPAMP1_VOUT
-PortA,PA3,,TIM2_CH4,TIM5_CH4,SAI1_CK1,,,,USART2_RX,,TIM15_CH2,QUADSPI1_CLK,,LPUART1_RX,SAI1_MCLK_A,,EVENTOUT,ADC1_IN4,COMP2_INP,,OPAMP1_VINM/OPAMP1_VINP/OPAMP5_VINM
-PortA,PA4,,,TIM3_CH2,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,SAI1_FS_B,,EVENTOUT,ADC2_IN17,COMP1_INM,DAC1_OUT1,
-PortA,PA5,,TIM2_CH1,TIM2_ETR,,,SPI1_SCK,,,,,,,,,UCPD1_FRSTX,EVENTOUT,ADC2_IN13,COMP2_INM,DAC1_OUT2,OPAMP2_VINM
-PortA,PA6,,TIM16_CH1,TIM3_CH1,,TIM8_BKIN,SPI1_MISO,TIM1_BKIN,,COMP1_OUT,,QUADSPI1_BK1_IO3,,LPUART1_CTS,,,EVENTOUT,ADC2_IN3,,DAC2_OUT1,OPAMP2_VOUT
-PortA,PA7,,TIM17_CH1,TIM3_CH2,,TIM8_CH1N,SPI1_MOSI,TIM1_CH1N,,COMP2_OUT,,QUADSPI1_BK1_IO2,,,,UCPD1_FRSTX,EVENTOUT,ADC2_IN4,COMP2_INP,,OPAMP1_VINP/OPAMP2_VINP
-PortA,PA8,MCO,,I2C3_SCL,,I2C2_SDA,I2S2_MCK,TIM1_CH1,USART1_CK,COMP7_OUT,,TIM4_ETR,CAN3_RX,SAI1_CK2,HRTIM1_CHA1,SAI1_SCK_A,EVENTOUT,ADC5_IN1,,,OPAMP5_VOUT
-PortA,PA9,,,I2C3_SMBA,,I2C2_SCL,I2S3_MCK,TIM1_CH2,USART1_TX,COMP5_OUT,TIM15_BKIN,TIM2_CH3,,,HRTIM1_CHA2,SAI1_FS_A,EVENTOUT,ADC5_IN2,,,
-PortA,PA10,,TIM17_BKIN,,USB_CRS_SYNC,I2C2_SMBA,SPI2_MISO,TIM1_CH3,USART1_RX,COMP6_OUT,,TIM2_CH4,TIM8_BKIN,SAI1_D1,HRTIM1_CHB1,SAI1_SD_A,EVENTOUT,,,,
-PortA,PA11,,,,,,SPI2_MOSI/I2S2_SD,TIM1_CH1N,USART1_CTS,COMP1_OUT,CAN1_RX,TIM4_CH1,TIM1_CH4,TIM1_BKIN2,HRTIM1_CHB2,,EVENTOUT,,,,
-PortA,PA12,,TIM16_CH1,,,,I2SCKIN,TIM1_CH2N,USART1_RTS_DE,COMP2_OUT,CAN1_TX,TIM4_CH2,TIM1_ETR,,HRTIM1_FLT1,,EVENTOUT,,,,
-PortA,PA13,SWDIOJTMS,TIM16_CH1N,,I2C4_SCL,I2C1_SCL,IR_OUT,,USART3_CTS,,,TIM4_CH3,,,SAI1_SD_B,,EVENTOUT,,,,
-PortA,PA14,SWCLKJTCK,LPTIM1_OUT,,I2C4_SMBA,I2C1_SDA,TIM8_CH2,TIM1_BKIN,USART2_TX,,,,,,SAI1_FS_B,,EVENTOUT,,,,
-PortA,PA15,JTDI,TIM2_CH1,TIM8_CH1,,I2C1_SCL,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_RX,UART4_RTS_DE,TIM1_BKIN,,CAN3_TX,,HRTIM1_FLT2,TIM2_ETR,EVENTOUT,,,,
-PortB,PB0,,,TIM3_CH3,,TIM8_CH2N,,TIM1_CH2N,,,,QUADSPI1_BK1_IO1,,,HRTIM1_FLT5,UCPD1_FRSTX,EVENTOUT,ADC3_IN12/ADC1_IN15,COMP4_INP,,OPAMP2_VINP/OPAMP3_VINP
-PortB,PB1,,,TIM3_CH4,,TIM8_CH3N,,TIM1_CH3N,,COMP4_OUT,,QUADSPI1_BK1_IO0,,LPUART1_RTS_DE,HRTIM1_SCOUT,,EVENTOUT,ADC3_IN1/ADC1_IN12,COMP1_INP,,OPAMP3_VOUT/OPAMP6_VINM
-PortB,PB2,RTC_OUT2,LPTIM1_OUT,TIM5_CH1,TIM20_CH1,I2C3_SMBA,,,,,,QUADSPI1_BK2_IO1,,,HRTIM1_SCIN,,EVENTOUT,ADC2_IN12,COMP4_INM,,OPAMP3_VINM
-PortB,PB3,JTDOTRACESWO,TIM2_CH2,TIM4_ETR,USB_CRS_SYNC,TIM8_CH1N,SPI1_SCK,SPI3_SCK/I2S3_CK,USART2_TX,,,TIM3_ETR,CAN3_RX,HRTIM1_SCOUT,HRTIM1_EEV9,SAI1_SCK_B,EVENTOUT,,,,
-PortB,PB4,JTRST,TIM16_CH1,TIM3_CH1,,TIM8_CH2N,SPI1_MISO,SPI3_MISO,USART2_RX,UART5_RTS_DE,,TIM17_BKIN,CAN3_TX,,HRTIM1_EEV7,SAI1_MCLK_B,EVENTOUT,,,,
-PortB,PB5,,TIM16_BKIN,TIM3_CH2,TIM8_CH3N,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,USART2_CK,I2C3_SDA,CAN2_RX,TIM17_CH1,LPTIM1_IN1,SAI1_SD_B,HRTIM1_EEV6,UART5_CTS,EVENTOUT,,,,
-PortB,PB6,,TIM16_CH1N,TIM4_CH1,,,TIM8_CH1,TIM8_ETR,USART1_TX,COMP4_OUT,CAN2_TX,TIM8_BKIN2,LPTIM1_ETR,HRTIM1_SCIN,HRTIM1_EEV4,SAI1_FS_B,EVENTOUT,,,,
-PortB,PB7,,TIM17_CH1N,TIM4_CH2,I2C4_SDA,I2C1_SDA,TIM8_BKIN,,USART1_RX,COMP3_OUT,,TIM3_CH4,LPTIM1_IN2,FMC_NL,HRTIM1_EEV3,UART4_CTS,EVENTOUT,,,,
-PortB,PB8,,TIM16_CH1,TIM4_CH3,SAI1_CK1,I2C1_SCL,,,USART3_RX,COMP1_OUT,CAN1_RX,TIM8_CH2,,TIM1_BKIN,HRTIM1_EEV8,SAI1_MCLK_A,EVENTOUT,,,,
-PortB,PB9,,TIM17_CH1,TIM4_CH4,SAI1_D2,I2C1_SDA,,IR_OUT,USART3_TX,COMP2_OUT,CAN1_TX,TIM8_CH3,,TIM1_CH3N,HRTIM1_EEV5,SAI1_FS_A,EVENTOUT,,,,
-PortB,PB10,,TIM2_CH3,,,,,,USART3_TX,LPUART1_RX,,QUADSPI1_CLK,,TIM1_BKIN,HRTIM1_FLT3,SAI1_SCK_A,EVENTOUT,,COMP5_INM,,OPAMP3_VINM/OPAMP4_VINM
-PortB,PB11,,TIM2_CH4,,,,,,USART3_RX,LPUART1_TX,,QUADSPI1_BK1_NCS,,,HRTIM1_FLT4,,EVENTOUT,ADC12_IN14,COMP6_INP,,OPAMP4_VINP/OPAMP6_VOUT
-PortB,PB12,,,TIM5_ETR,,I2C2_SMBA,SPI2_NSS/I2S2_WS,TIM1_BKIN,USART3_CK,LPUART1_RTS_DE,CAN2_RX,,,,HRTIM1_CHC1,,EVENTOUT,ADC4_IN3/ADC1_IN11,COMP7_INM,,OPAMP4_VOUT/OPAMP6_VINP
-PortB,PB13,,,,,,SPI2_SCK/I2S2_CK,TIM1_CH1N,USART3_CTS,LPUART1_CTS,CAN2_TX,,,,HRTIM1_CHC2,,EVENTOUT,ADC3_IN5,COMP5_INP,,OPAMP3_VINP/OPAMP4_VINP/OPAMP6_VINP
-PortB,PB14,,TIM15_CH1,,,,SPI2_MISO,TIM1_CH2N,USART3_RTS_DE,COMP4_OUT,,,,,HRTIM1_CHD1,,EVENTOUT,ADC4_IN4/ADC1_IN5,COMP7_INP,,OPAMP2_VINP/OPAMP5_VINP
-PortB,PB15,RTC_REFIN,TIM15_CH2,TIM15_CH1N,COMP3_OUT,TIM1_CH3N,SPI2_MOSI/I2S2_SD,,,,,,,,HRTIM1_CHD2,,EVENTOUT,ADC4_IN5/ADC2_IN15,COMP6_INM,,OPAMP5_VINM
-PortC,PC0,,LPTIM1_IN1,TIM1_CH1,,,,,,LPUART1_RX,,,,,,,EVENTOUT,ADC12_IN6,COMP3_INM,
-PortC,PC1,,LPTIM1_OUT,TIM1_CH2,,,,,,LPUART1_TX,,QUADSPI1_BK2_IO0,,,SAI1_SD_A,,EVENTOUT,ADC12_IN7,COMP3_INP,,
-PortC,PC2,,LPTIM1_IN2,TIM1_CH3,COMP3_OUT,,,TIM20_CH2,,,,QUADSPI1_BK2_IO1,,,,,EVENTOUT,ADC12_IN8,,
-PortC,PC3,,LPTIM1_ETR,TIM1_CH4,SAI1_D1,,,TIM1_BKIN2,,,,QUADSPI1_BK2_IO2,,,SAI1_SD_A,,EVENTOUT,ADC12_IN9,,,OPAMP5_VINP
-PortC,PC4,,,TIM1_ETR,,I2C2_SCL,,,USART1_TX,,,QUADSPI1_BK2_IO3,,,,,EVENTOUT,ADC2_IN5,,,
-PortC,PC5,,,TIM15_BKIN,SAI1_D3,,,TIM1_CH4N,USART1_RX,,,,,,HRTIM1_EEV10,,EVENTOUT,ADC2_IN11,,,OPAMP1_VINM/OPAMP2_VINM
-PortC,PC6,,,TIM3_CH1,HRTIM1_EEV10,TIM8_CH1,,I2S2_MCK,COMP6_OUT,I2C4_SCL,,,,,HRTIM1_CHF1,,EVENTOUT,,,,
-PortC,PC7,,,TIM3_CH2,HRTIM1_FLT5,TIM8_CH2,,I2S3_MCK,COMP5_OUT,I2C4_SDA,,,,,HRTIM1_CHF2,,EVENTOUT,,,,
-PortC,PC8,,,TIM3_CH3,HRTIM1_CHE1,TIM8_CH3,,TIM20_CH3,COMP7_OUT,I2C3_SCL,,,,,,,EVENTOUT,,,,
-PortC,PC9,,,TIM3_CH4,HRTIM1_CHE2,TIM8_CH4,I2SCKIN,TIM8_BKIN2,,I2C3_SDA,,,,,,,EVENTOUT,,,,
-PortC,PC10,,,,,TIM8_CH1N,UART4_TX,SPI3_SCK/I2S3_CK,USART3_TX,,,,,,HRTIM1_FLT6,,EVENTOUT,,,,
-PortC,PC11,,,,HRTIM1_EEV2,TIM8_CH2N,UART4_RX,SPI3_MISO,USART3_RX,I2C3_SDA,,,,,,,EVENTOUT,,,,
-PortC,PC12,,TIM5_CH2,,HRTIM1_EEV1,TIM8_CH3N,UART5_TX,SPI3_MOSI/I2S3_SD,USART3_CK,,,,,,,UCPD1_FRSTX,EVENTOUT,,,,
-PortC,PC13,,,TIM1_BKIN,,TIM1_CH1N,,TIM8_CH4N,,,,,,,,,EVENTOUT,,,,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,,,,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,,,,
-PortD,PD0,,,,,,,TIM8_CH4N,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,,,,
-PortD,PD1,,,,,TIM8_CH4,,TIM8_BKIN2,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,,,,
-PortD,PD2,,,TIM3_ETR,,TIM8_BKIN,UART5_RX,,,,,,,,,,EVENTOUT,,,,
-PortD,PD3,,,TIM2_CH1/TIM2_ETR,,,,,USART2_CTS,,,QUADSPI1_BK2_NCS,,FMC_CLK,,,EVENTOUT,,,,
-PortD,PD4,,,TIM2_CH2,,,,,USART2_RTS_DE,,,QUADSPI1_BK2_IO0,,FMC_NOE,,,EVENTOUT,,,,
-PortD,PD5,,,,,,,,USART2_TX,,,QUADSPI1_BK2_IO1,,FMC_NWE,,,EVENTOUT,,,,
-PortD,PD6,,,TIM2_CH4,SAI1_D1,,,,USART2_RX,,,QUADSPI1_BK2_IO2,,FMC_NWAIT,SAI1_SD_A,,EVENTOUT,,,,
-PortD,PD7,,,TIM2_CH3,,,,,USART2_CK,,,QUADSPI1_BK2_IO3,,FMC_NCE/FMC_NE1,,,EVENTOUT,,,,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT,ADC4_IN12/ADC5_IN12,,,OPAMP4_VINM
-PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,ADC4_IN13/ADC5_IN13,,,OPAMP6_VINP
-PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,,EVENTOUT,ADC345_IN7,COMP6_INM,,
-PortD,PD11,,TIM5_ETR,,,I2C4_SMBA,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT,ADC345_IN8,COMP6_INP,,OPAMP4_VINP
-PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS_DE,,,,,FMC_A17,,,EVENTOUT,ADC345_IN9,COMP5_INP,,OPAMP5_VINP
-PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT,ADC345_IN10,COMP5_INM,,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT,ADC345_IN11,COMP7_INP,,OPAMP2_VINP
-PortD,PD15,,,TIM4_CH4,,,,SPI2_NSS,,,,,,FMC_D1,,,EVENTOUT,,COMP7_INM,,
-PortE,PE0,,,TIM4_ETR,TIM20_CH4N,TIM16_CH1,,TIM20_ETR,USART1_TX,,CAN1_RXFD,,,FMC_NBL0,,,EVENTOUT,,,,
-PortE,PE1,,,,,TIM17_CH1,,TIM20_CH4,USART1_RX,,,,,FMC_NBL1,,,EVENTOUT,,,,
-PortE,PE2,TRACECK,,TIM3_CH1,SAI1_CK1,,SPI4_SCK,TIM20_CH1,,,,,,FMC_A23,SAI1_MCLK_A,,EVENTOUT,,,,
-PortE,PE3,TRACED0,,TIM3_CH2,,,SPI4_NSS,TIM20_CH2,,,,,,FMC_A19,SAI1_SD_B,,EVENTOUT,,,,
-PortE,PE4,TRACED1,,TIM3_CH3,SAI1_D2,,SPI4_NSS,TIM20_CH1N,,,,,,FMC_A20,SAI1_FS_A,,EVENTOUT,,,,
-PortE,PE5,TRACED2,,TIM3_CH4,SAI1_CK2,,SPI4_MISO,TIM20_CH2N,,,,,,FMC_A21,SAI1_SCK_A,,EVENTOUT,,,,
-PortE,PE6,TRACED3,,,SAI1_D1,,SPI4_MOSI,TIM20_CH3N,,,,,,FMC_A22,SAI1_SD_A,,EVENTOUT,,,,
-PortE,PE7,,,TIM1_ETR,,,,,,,,,,FMC_D4,SAI1_SD_B,,EVENTOUT,ADC3_IN4,COMP4_INP,,
-PortE,PE8,,TIM5_CH3,TIM1_CH1N,,,,,,,,,,FMC_D5,SAI1_SCK_B,,EVENTOUT,ADC345_IN6,COMP4_INM,,
-PortE,PE9,,TIM5_CH4,TIM1_CH1,,,,,,,,,,FMC_D6,SAI1_FS_B,,EVENTOUT,ADC3_IN2,,,
-PortE,PE10,,,TIM1_CH2N,,,,,,,,QUADSPI1_CLK,,FMC_D7,SAI1_MCLK_B,,EVENTOUT,ADC345_IN14,,,
-PortE,PE11,,,TIM1_CH2,,,SPI4_NSS,,,,,QUADSPI1_BK1_NCS,,FMC_D8,,,EVENTOUT,ADC345_IN15,,,
-PortE,PE12,,,TIM1_CH3N,,,SPI4_SCK,,,,,QUADSPI1_BK1_IO0,,FMC_D9,,,EVENTOUT,ADC345_IN16,,,
-PortE,PE13,,,TIM1_CH3,,,SPI4_MISO,,,,,QUADSPI1_BK1_IO1,,FMC_D10,,,EVENTOUT,ADC3_IN3,,,
-PortE,PE14,,,TIM1_CH4,,,SPI4_MOSI,TIM1_BKIN2,,,,QUADSPI1_BK1_IO2,,FMC_D11,,,EVENTOUT,ADC4_IN1,,,
-PortE,PE15,,,TIM1_BKIN,,,,TIM1_CH4N,USART3_RX,,,QUADSPI1_BK1_IO3,,FMC_D12,,,EVENTOUT,ADC4_IN2,,,
-PortF,PF0,,,,,I2C2_SDA,SPI2_NSS/I2S2_WS,TIM1_CH3N,,,,,,,,,EVENTOUT,ADC1_IN10,,,
-PortF,PF1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT,ADC2_IN10,COMP3_INM,,
-PortF,PF2,,,TIM20_CH3,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,,,,
-PortF,PF3,,,TIM20_CH4,,I2C3_SCL,,,,,,,,FMC_A3,,,EVENTOUT,,,,
-PortF,PF4,,,COMP1_OUT,TIM20_CH1N,I2C3_SDA,,,,,,,,FMC_A4,,,EVENTOUT,,,,
-PortF,PF5,,,TIM20_CH2N,,,,,,,,,,FMC_A5,,,EVENTOUT,,,,
-PortF,PF6,,TIM5_ETR,TIM4_CH4,SAI1_SD_B,I2C2_SCL,,TIM5_CH1,USART3_RTS,,,QUADSPI1_BK1_IO3,,,,,EVENTOUT,,,,
-PortF,PF7,,,TIM20_BKIN,,,,TIM5_CH2,,,,QUADSPI1_BK1_IO2,,FMC_A1,SAI1_MCLK_B,,EVENTOUT,,,,
-PortF,PF8,,,TIM20_BKIN2,,,,TIM5_CH3,,,,QUADSPI1_BK1_IO0,,FMC_A24,SAI1_SCK_B,,EVENTOUT,,,,
-PortF,PF9,,,TIM20_BKIN,TIM15_CH1,,SPI2_SCK,TIM5_CH4,,,,QUADSPI1_BK1_IO1,,FMC_A25,SAI1_FS_B,,EVENTOUT,,,,
-PortF,PF10,,,TIM20_BKIN2,TIM15_CH2,,SPI2_SCK,,,,,QUADSPI1_CLK,,FMC_A0,SAI1_D3,,EVENTOUT,,,,
-PortF,PF11,,,TIM20_ETR,,,,,,,,,,FMC_NE4,,,EVENTOUT,,,,
-PortF,PF12,,,TIM20_CH1,,,,,,,,,,FMC_A6,,,EVENTOUT,,,,
-PortF,PF13,,,TIM20_CH2,,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT,,,,
-PortF,PF14,,,TIM20_CH3,,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT,,,,
-PortF,PF15,,,TIM20_CH4,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT,,,,
-PortG,PG0,,,TIM20_CH1N,,,,,,,,,,FMC_A10,,,EVENTOUT,,,,
-PortG,PG1,,,TIM20_CH2N,,,,,,,,,,FMC_A11,,,EVENTOUT,,,,
-PortG,PG2,,,TIM20_CH3N,,,SPI1_SCK,,,,,,,FMC_A12,,,EVENTOUT,,,,
-PortG,PG3,,,TIM20_BKIN,,I2C4_SCL,SPI1_MISO,TIM20_CH4N,,,,,,FMC_A13,,,EVENTOUT,,,,
-PortG,PG4,,,TIM20_BKIN2,,I2C4_SDA,SPI1_MOSI,,,,,,,FMC_A14,,,EVENTOUT,,,,
-PortG,PG5,,,TIM20_ETR,,,SPI1_NSS,,,LPUART1_CTS,,,,FMC_A15,,,EVENTOUT,,,,
-PortG,PG6,,,TIM20_BKIN,,I2C3_SMBA,,,,LPUART1_RTS_DE,,,,FMC_INT,,,EVENTOUT,,,,
-PortG,PG7,,,,SAI1_CK1,I2C3_SCL,,,,LPUART1_TX,,,,FMC_INT,SAI1_MCLK_A,,EVENTOUT,,,,
-PortG,PG8,,,,,I2C3_SDA,,,,LPUART1_RX,,,,FMC_NE3,,,EVENTOUT,,,,
-PortG,PG9,,,,,,,SPI3_SCK,USART1_TX,,,,,FMC_NCE/FMC_NE2,,TIM15_CH1N,EVENTOUT,,,,
-PortG,PG10,MCO,,,,,,,,,,,,,,,EVENTOUT
+Port ,Pin ,AF0         ,AF1                   ,AF2                              ,AF3                                             ,AF4                    ,AF5                                                  ,AF6                                        ,AF7                     ,AF8                                     ,AF9                 ,AF10                  ,AF11                ,AF12                        ,AF13                  ,AF14                      ,AF15    ,ADC
+     ,    ,I2C4/SYS_AF ,LPTIM1/TIM2/5/15/16/17,I2C1/3/TIM1/2/3/4/5/8/20/15/COMP1,QUADSPI1/I2C3/4/SAI1/USB/HRTIM1/TIM8/20/15/COMP3,I2C1/2/3/4/TIM1/8/16/17,QUADSPI1/SPI1/2/3/4/I2S2/3/I2C4/UART4/5/TIM8/Infrared,QUADSPI1/SPI2/3/I2S2/3/TIM1/5/8/20/Infrared,USART1/2/3/CAN/COMP7/5/6,I2C3/4/UART4/5/LPUART1/COMP1/2/7/4/5/6/3,CAN/TIM1/8/15/CAN1/2,QUADSPI1/TIM2/3/4/8/17,LPTIM1/TIM1/8/CAN1/3,FMC/LPUART1/SAI1/HRTIM1/TIM1,SAI1SAI1/HRTIM1/OPAMP2,UART4/5/SAI1/TIM2/15/UCPD1,SYS     ,ADC
+PortA,PA0 ,            ,TIM2_CH1              ,TIM5_CH1                         ,                                                ,                       ,                                                     ,                                           ,USART2_CTS              ,COMP1_OUT                               ,TIM8_BKIN           ,TIM8_ETR              ,                    ,                            ,                      ,TIM2_ETR                  ,EVENTOUT,ADC12_IN1
+PortA,PA1 ,RTC_REFIN   ,TIM2_CH2              ,TIM5_CH2                         ,                                                ,                       ,                                                     ,                                           ,USART2_RTS_DE           ,                                        ,TIM15_CH1N          ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC12_IN2
+PortA,PA2 ,            ,TIM2_CH3              ,TIM5_CH3                         ,                                                ,                       ,                                                     ,                                           ,USART2_TX               ,COMP2_OUT                               ,TIM15_CH1           ,QUADSPI1_BK1_NCS      ,                    ,LPUART1_TX                  ,                      ,UCPD1_FRSTX               ,EVENTOUT,ADC1_IN3
+PortA,PA3 ,            ,TIM2_CH4              ,TIM5_CH4                         ,SAI1_CK1                                        ,                       ,                                                     ,                                           ,USART2_RX               ,                                        ,TIM15_CH2           ,QUADSPI1_CLK          ,                    ,LPUART1_RX                  ,SAI1_MCLK_A           ,                          ,EVENTOUT,ADC1_IN4
+PortA,PA4 ,            ,                      ,TIM3_CH2                         ,                                                ,                       ,SPI1_NSS                                             ,SPI3_NSS/I2S3_WS                           ,USART2_CK               ,                                        ,                    ,                      ,                    ,                            ,SAI1_FS_B             ,                          ,EVENTOUT,ADC2_IN17
+PortA,PA5 ,            ,TIM2_CH1              ,TIM2_ETR                         ,                                                ,                       ,SPI1_SCK                                             ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,UCPD1_FRSTX               ,EVENTOUT,ADC2_IN13
+PortA,PA6 ,            ,TIM16_CH1             ,TIM3_CH1                         ,                                                ,TIM8_BKIN              ,SPI1_MISO                                            ,TIM1_BKIN                                  ,                        ,COMP1_OUT                               ,                    ,QUADSPI1_BK1_IO3      ,                    ,LPUART1_CTS                 ,                      ,                          ,EVENTOUT,ADC2_IN3
+PortA,PA7 ,            ,TIM17_CH1             ,TIM3_CH2                         ,                                                ,TIM8_CH1N              ,SPI1_MOSI                                            ,TIM1_CH1N                                  ,                        ,COMP2_OUT                               ,                    ,QUADSPI1_BK1_IO2      ,                    ,                            ,                      ,UCPD1_FRSTX               ,EVENTOUT,ADC2_IN4
+PortA,PA8 ,MCO         ,                      ,I2C3_SCL                         ,                                                ,I2C2_SDA               ,I2S2_MCK                                             ,TIM1_CH1                                   ,USART1_CK               ,COMP7_OUT                               ,                    ,TIM4_ETR              ,CAN3_RX             ,SAI1_CK2                    ,HRTIM1_CHA1           ,SAI1_SCK_A                ,EVENTOUT,ADC5_IN1
+PortA,PA9 ,            ,                      ,I2C3_SMBA                        ,                                                ,I2C2_SCL               ,I2S3_MCK                                             ,TIM1_CH2                                   ,USART1_TX               ,COMP5_OUT                               ,TIM15_BKIN          ,TIM2_CH3              ,                    ,                            ,HRTIM1_CHA2           ,SAI1_FS_A                 ,EVENTOUT,ADC5_IN2
+PortA,PA10,            ,TIM17_BKIN            ,                                 ,USB_CRS_SYNC                                    ,I2C2_SMBA              ,SPI2_MISO                                            ,TIM1_CH3                                   ,USART1_RX               ,COMP6_OUT                               ,                    ,TIM2_CH4              ,TIM8_BKIN           ,SAI1_D1                     ,HRTIM1_CHB1           ,SAI1_SD_A                 ,EVENTOUT,
+PortA,PA11,            ,                      ,                                 ,                                                ,                       ,SPI2_MOSI/I2S2_SD                                    ,TIM1_CH1N                                  ,USART1_CTS              ,COMP1_OUT                               ,CAN1_RX             ,TIM4_CH1              ,TIM1_CH4            ,TIM1_BKIN2                  ,HRTIM1_CHB2           ,                          ,EVENTOUT,
+PortA,PA12,            ,TIM16_CH1             ,                                 ,                                                ,                       ,I2SCKIN                                              ,TIM1_CH2N                                  ,USART1_RTS_DE           ,COMP2_OUT                               ,CAN1_TX             ,TIM4_CH2              ,TIM1_ETR            ,                            ,HRTIM1_FLT1           ,                          ,EVENTOUT,
+PortA,PA13,SWDIOJTMS   ,TIM16_CH1N            ,                                 ,I2C4_SCL                                        ,I2C1_SCL               ,IR_OUT                                               ,                                           ,USART3_CTS              ,                                        ,                    ,TIM4_CH3              ,                    ,                            ,SAI1_SD_B             ,                          ,EVENTOUT,
+PortA,PA14,SWCLKJTCK   ,LPTIM1_OUT            ,                                 ,I2C4_SMBA                                       ,I2C1_SDA               ,TIM8_CH2                                             ,TIM1_BKIN                                  ,USART2_TX               ,                                        ,                    ,                      ,                    ,                            ,SAI1_FS_B             ,                          ,EVENTOUT,
+PortA,PA15,JTDI        ,TIM2_CH1              ,TIM8_CH1                         ,                                                ,I2C1_SCL               ,SPI1_NSS                                             ,SPI3_NSS/I2S3_WS                           ,USART2_RX               ,UART4_RTS_DE                            ,TIM1_BKIN           ,                      ,CAN3_TX             ,                            ,HRTIM1_FLT2           ,TIM2_ETR                  ,EVENTOUT,
+PortB,PB0 ,            ,                      ,TIM3_CH3                         ,                                                ,TIM8_CH2N              ,                                                     ,TIM1_CH2N                                  ,                        ,                                        ,                    ,QUADSPI1_BK1_IO1      ,                    ,                            ,HRTIM1_FLT5           ,UCPD1_FRSTX               ,EVENTOUT,ADC3_IN12/ADC1_IN15
+PortB,PB1 ,            ,                      ,TIM3_CH4                         ,                                                ,TIM8_CH3N              ,                                                     ,TIM1_CH3N                                  ,                        ,COMP4_OUT                               ,                    ,QUADSPI1_BK1_IO0      ,                    ,LPUART1_RTS_DE              ,HRTIM1_SCOUT          ,                          ,EVENTOUT,ADC3_IN1/ADC1_IN12
+PortB,PB2 ,RTC_OUT2    ,LPTIM1_OUT            ,TIM5_CH1                         ,TIM20_CH1                                       ,I2C3_SMBA              ,                                                     ,                                           ,                        ,                                        ,                    ,QUADSPI1_BK2_IO1      ,                    ,                            ,HRTIM1_SCIN           ,                          ,EVENTOUT,ADC2_IN12
+PortB,PB3 ,JTDOTRACESWO,TIM2_CH2              ,TIM4_ETR                         ,USB_CRS_SYNC                                    ,TIM8_CH1N              ,SPI1_SCK                                             ,SPI3_SCK/I2S3_CK                           ,USART2_TX               ,                                        ,                    ,TIM3_ETR              ,CAN3_RX             ,HRTIM1_SCOUT                ,HRTIM1_EEV9           ,SAI1_SCK_B                ,EVENTOUT,
+PortB,PB4 ,JTRST       ,TIM16_CH1             ,TIM3_CH1                         ,                                                ,TIM8_CH2N              ,SPI1_MISO                                            ,SPI3_MISO                                  ,USART2_RX               ,UART5_RTS_DE                            ,                    ,TIM17_BKIN            ,CAN3_TX             ,                            ,HRTIM1_EEV7           ,SAI1_MCLK_B               ,EVENTOUT,
+PortB,PB5 ,            ,TIM16_BKIN            ,TIM3_CH2                         ,TIM8_CH3N                                       ,I2C1_SMBA              ,SPI1_MOSI                                            ,SPI3_MOSI/I2S3_SD                          ,USART2_CK               ,I2C3_SDA                                ,CAN2_RX             ,TIM17_CH1             ,LPTIM1_IN1          ,SAI1_SD_B                   ,HRTIM1_EEV6           ,UART5_CTS                 ,EVENTOUT,
+PortB,PB6 ,            ,TIM16_CH1N            ,TIM4_CH1                         ,                                                ,                       ,TIM8_CH1                                             ,TIM8_ETR                                   ,USART1_TX               ,COMP4_OUT                               ,CAN2_TX             ,TIM8_BKIN2            ,LPTIM1_ETR          ,HRTIM1_SCIN                 ,HRTIM1_EEV4           ,SAI1_FS_B                 ,EVENTOUT,
+PortB,PB7 ,            ,TIM17_CH1N            ,TIM4_CH2                         ,I2C4_SDA                                        ,I2C1_SDA               ,TIM8_BKIN                                            ,                                           ,USART1_RX               ,COMP3_OUT                               ,                    ,TIM3_CH4              ,LPTIM1_IN2          ,FMC_NL                      ,HRTIM1_EEV3           ,UART4_CTS                 ,EVENTOUT,
+PortB,PB8 ,            ,TIM16_CH1             ,TIM4_CH3                         ,SAI1_CK1                                        ,I2C1_SCL               ,                                                     ,                                           ,USART3_RX               ,COMP1_OUT                               ,CAN1_RX             ,TIM8_CH2              ,                    ,TIM1_BKIN                   ,HRTIM1_EEV8           ,SAI1_MCLK_A               ,EVENTOUT,
+PortB,PB9 ,            ,TIM17_CH1             ,TIM4_CH4                         ,SAI1_D2                                         ,I2C1_SDA               ,                                                     ,IR_OUT                                     ,USART3_TX               ,COMP2_OUT                               ,CAN1_TX             ,TIM8_CH3              ,                    ,TIM1_CH3N                   ,HRTIM1_EEV5           ,SAI1_FS_A                 ,EVENTOUT,
+PortB,PB10,            ,TIM2_CH3              ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_TX               ,LPUART1_RX                              ,                    ,QUADSPI1_CLK          ,                    ,TIM1_BKIN                   ,HRTIM1_FLT3           ,SAI1_SCK_A                ,EVENTOUT,
+PortB,PB11,            ,TIM2_CH4              ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_RX               ,LPUART1_TX                              ,                    ,QUADSPI1_BK1_NCS      ,                    ,                            ,HRTIM1_FLT4           ,                          ,EVENTOUT,ADC12_IN14
+PortB,PB12,            ,                      ,TIM5_ETR                         ,                                                ,I2C2_SMBA              ,SPI2_NSS/I2S2_WS                                     ,TIM1_BKIN                                  ,USART3_CK               ,LPUART1_RTS_DE                          ,CAN2_RX             ,                      ,                    ,                            ,HRTIM1_CHC1           ,                          ,EVENTOUT,ADC4_IN3/ADC1_IN11
+PortB,PB13,            ,                      ,                                 ,                                                ,                       ,SPI2_SCK/I2S2_CK                                     ,TIM1_CH1N                                  ,USART3_CTS              ,LPUART1_CTS                             ,CAN2_TX             ,                      ,                    ,                            ,HRTIM1_CHC2           ,                          ,EVENTOUT,ADC3_IN5
+PortB,PB14,            ,TIM15_CH1             ,                                 ,                                                ,                       ,SPI2_MISO                                            ,TIM1_CH2N                                  ,USART3_RTS_DE           ,COMP4_OUT                               ,                    ,                      ,                    ,                            ,HRTIM1_CHD1           ,                          ,EVENTOUT,ADC4_IN4/ADC1_IN5
+PortB,PB15,RTC_REFIN   ,TIM15_CH2             ,TIM15_CH1N                       ,COMP3_OUT                                       ,TIM1_CH3N              ,SPI2_MOSI/I2S2_SD                                    ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,HRTIM1_CHD2           ,                          ,EVENTOUT,ADC4_IN5/ADC2_IN15
+PortC,PC0 ,            ,LPTIM1_IN1            ,TIM1_CH1                         ,                                                ,                       ,                                                     ,                                           ,                        ,LPUART1_RX                              ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC12_IN6
+PortC,PC1 ,            ,LPTIM1_OUT            ,TIM1_CH2                         ,                                                ,                       ,                                                     ,                                           ,                        ,LPUART1_TX                              ,                    ,QUADSPI1_BK2_IO0      ,                    ,                            ,SAI1_SD_A             ,                          ,EVENTOUT,ADC12_IN7
+PortC,PC2 ,            ,LPTIM1_IN2            ,TIM1_CH3                         ,COMP3_OUT                                       ,                       ,                                                     ,TIM20_CH2                                  ,                        ,                                        ,                    ,QUADSPI1_BK2_IO1      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC12_IN8
+PortC,PC3 ,            ,LPTIM1_ETR            ,TIM1_CH4                         ,SAI1_D1                                         ,                       ,                                                     ,TIM1_BKIN2                                 ,                        ,                                        ,                    ,QUADSPI1_BK2_IO2      ,                    ,                            ,SAI1_SD_A             ,                          ,EVENTOUT,ADC12_IN9
+PortC,PC4 ,            ,                      ,TIM1_ETR                         ,                                                ,I2C2_SCL               ,                                                     ,                                           ,USART1_TX               ,                                        ,                    ,QUADSPI1_BK2_IO3      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC2_IN5
+PortC,PC5 ,            ,                      ,TIM15_BKIN                       ,SAI1_D3                                         ,                       ,                                                     ,TIM1_CH4N                                  ,USART1_RX               ,                                        ,                    ,                      ,                    ,                            ,HRTIM1_EEV10          ,                          ,EVENTOUT,ADC2_IN11
+PortC,PC6 ,            ,                      ,TIM3_CH1                         ,HRTIM1_EEV10                                    ,TIM8_CH1               ,                                                     ,I2S2_MCK                                   ,COMP6_OUT               ,I2C4_SCL                                ,                    ,                      ,                    ,                            ,HRTIM1_CHF1           ,                          ,EVENTOUT,
+PortC,PC7 ,            ,                      ,TIM3_CH2                         ,HRTIM1_FLT5                                     ,TIM8_CH2               ,                                                     ,I2S3_MCK                                   ,COMP5_OUT               ,I2C4_SDA                                ,                    ,                      ,                    ,                            ,HRTIM1_CHF2           ,                          ,EVENTOUT,
+PortC,PC8 ,            ,                      ,TIM3_CH3                         ,HRTIM1_CHE1                                     ,TIM8_CH3               ,                                                     ,TIM20_CH3                                  ,COMP7_OUT               ,I2C3_SCL                                ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortC,PC9 ,            ,                      ,TIM3_CH4                         ,HRTIM1_CHE2                                     ,TIM8_CH4               ,I2SCKIN                                              ,TIM8_BKIN2                                 ,                        ,I2C3_SDA                                ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortC,PC10,            ,                      ,                                 ,                                                ,TIM8_CH1N              ,UART4_TX                                             ,SPI3_SCK/I2S3_CK                           ,USART3_TX               ,                                        ,                    ,                      ,                    ,                            ,HRTIM1_FLT6           ,                          ,EVENTOUT,
+PortC,PC11,            ,                      ,                                 ,HRTIM1_EEV2                                     ,TIM8_CH2N              ,UART4_RX                                             ,SPI3_MISO                                  ,USART3_RX               ,I2C3_SDA                                ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortC,PC12,            ,TIM5_CH2              ,                                 ,HRTIM1_EEV1                                     ,TIM8_CH3N              ,UART5_TX                                             ,SPI3_MOSI/I2S3_SD                          ,USART3_CK               ,                                        ,                    ,                      ,                    ,                            ,                      ,UCPD1_FRSTX               ,EVENTOUT,
+PortC,PC13,            ,                      ,TIM1_BKIN                        ,                                                ,TIM1_CH1N              ,                                                     ,TIM8_CH4N                                  ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortC,PC14,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortC,PC15,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortD,PD0 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,TIM8_CH4N                                  ,                        ,                                        ,CAN1_RX             ,                      ,                    ,FMC_D2                      ,                      ,                          ,EVENTOUT,
+PortD,PD1 ,            ,                      ,                                 ,                                                ,TIM8_CH4               ,                                                     ,TIM8_BKIN2                                 ,                        ,                                        ,CAN1_TX             ,                      ,                    ,FMC_D3                      ,                      ,                          ,EVENTOUT,
+PortD,PD2 ,            ,                      ,TIM3_ETR                         ,                                                ,TIM8_BKIN              ,UART5_RX                                             ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortD,PD3 ,            ,                      ,TIM2_CH1/TIM2_ETR                ,                                                ,                       ,                                                     ,                                           ,USART2_CTS              ,                                        ,                    ,QUADSPI1_BK2_NCS      ,                    ,FMC_CLK                     ,                      ,                          ,EVENTOUT,
+PortD,PD4 ,            ,                      ,TIM2_CH2                         ,                                                ,                       ,                                                     ,                                           ,USART2_RTS_DE           ,                                        ,                    ,QUADSPI1_BK2_IO0      ,                    ,FMC_NOE                     ,                      ,                          ,EVENTOUT,
+PortD,PD5 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART2_TX               ,                                        ,                    ,QUADSPI1_BK2_IO1      ,                    ,FMC_NWE                     ,                      ,                          ,EVENTOUT,
+PortD,PD6 ,            ,                      ,TIM2_CH4                         ,SAI1_D1                                         ,                       ,                                                     ,                                           ,USART2_RX               ,                                        ,                    ,QUADSPI1_BK2_IO2      ,                    ,FMC_NWAIT                   ,SAI1_SD_A             ,                          ,EVENTOUT,
+PortD,PD7 ,            ,                      ,TIM2_CH3                         ,                                                ,                       ,                                                     ,                                           ,USART2_CK               ,                                        ,                    ,QUADSPI1_BK2_IO3      ,                    ,FMC_NCE/FMC_NE1             ,                      ,                          ,EVENTOUT,
+PortD,PD8 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_TX               ,                                        ,                    ,                      ,                    ,FMC_D13                     ,                      ,                          ,EVENTOUT,ADC4_IN12/ADC5_IN12
+PortD,PD9 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_RX               ,                                        ,                    ,                      ,                    ,FMC_D14                     ,                      ,                          ,EVENTOUT,ADC4_IN13/ADC5_IN13
+PortD,PD10,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_CK               ,                                        ,                    ,                      ,                    ,FMC_D15                     ,                      ,                          ,EVENTOUT,ADC345_IN7
+PortD,PD11,            ,TIM5_ETR              ,                                 ,                                                ,I2C4_SMBA              ,                                                     ,                                           ,USART3_CTS              ,                                        ,                    ,                      ,                    ,FMC_A16                     ,                      ,                          ,EVENTOUT,ADC345_IN8
+PortD,PD12,            ,                      ,TIM4_CH1                         ,                                                ,                       ,                                                     ,                                           ,USART3_RTS_DE           ,                                        ,                    ,                      ,                    ,FMC_A17                     ,                      ,                          ,EVENTOUT,ADC345_IN9
+PortD,PD13,            ,                      ,TIM4_CH2                         ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A18                     ,                      ,                          ,EVENTOUT,ADC345_IN10
+PortD,PD14,            ,                      ,TIM4_CH3                         ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_D0                      ,                      ,                          ,EVENTOUT,ADC345_IN11
+PortD,PD15,            ,                      ,TIM4_CH4                         ,                                                ,                       ,                                                     ,SPI2_NSS                                   ,                        ,                                        ,                    ,                      ,                    ,FMC_D1                      ,                      ,                          ,EVENTOUT,
+PortE,PE0 ,            ,                      ,TIM4_ETR                         ,TIM20_CH4N                                      ,TIM16_CH1              ,                                                     ,TIM20_ETR                                  ,USART1_TX               ,                                        ,CAN1_RXFD           ,                      ,                    ,FMC_NBL0                    ,                      ,                          ,EVENTOUT,
+PortE,PE1 ,            ,                      ,                                 ,                                                ,TIM17_CH1              ,                                                     ,TIM20_CH4                                  ,USART1_RX               ,                                        ,                    ,                      ,                    ,FMC_NBL1                    ,                      ,                          ,EVENTOUT,
+PortE,PE2 ,TRACECK     ,                      ,TIM3_CH1                         ,SAI1_CK1                                        ,                       ,SPI4_SCK                                             ,TIM20_CH1                                  ,                        ,                                        ,                    ,                      ,                    ,FMC_A23                     ,SAI1_MCLK_A           ,                          ,EVENTOUT,
+PortE,PE3 ,TRACED0     ,                      ,TIM3_CH2                         ,                                                ,                       ,SPI4_NSS                                             ,TIM20_CH2                                  ,                        ,                                        ,                    ,                      ,                    ,FMC_A19                     ,SAI1_SD_B             ,                          ,EVENTOUT,
+PortE,PE4 ,TRACED1     ,                      ,TIM3_CH3                         ,SAI1_D2                                         ,                       ,SPI4_NSS                                             ,TIM20_CH1N                                 ,                        ,                                        ,                    ,                      ,                    ,FMC_A20                     ,SAI1_FS_A             ,                          ,EVENTOUT,
+PortE,PE5 ,TRACED2     ,                      ,TIM3_CH4                         ,SAI1_CK2                                        ,                       ,SPI4_MISO                                            ,TIM20_CH2N                                 ,                        ,                                        ,                    ,                      ,                    ,FMC_A21                     ,SAI1_SCK_A            ,                          ,EVENTOUT,
+PortE,PE6 ,TRACED3     ,                      ,                                 ,SAI1_D1                                         ,                       ,SPI4_MOSI                                            ,TIM20_CH3N                                 ,                        ,                                        ,                    ,                      ,                    ,FMC_A22                     ,SAI1_SD_A             ,                          ,EVENTOUT,
+PortE,PE7 ,            ,                      ,TIM1_ETR                         ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_D4                      ,SAI1_SD_B             ,                          ,EVENTOUT,ADC3_IN4
+PortE,PE8 ,            ,TIM5_CH3              ,TIM1_CH1N                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_D5                      ,SAI1_SCK_B            ,                          ,EVENTOUT,ADC345_IN6
+PortE,PE9 ,            ,TIM5_CH4              ,TIM1_CH1                         ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_D6                      ,SAI1_FS_B             ,                          ,EVENTOUT,ADC3_IN2
+PortE,PE10,            ,                      ,TIM1_CH2N                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,QUADSPI1_CLK          ,                    ,FMC_D7                      ,SAI1_MCLK_B           ,                          ,EVENTOUT,ADC345_IN14
+PortE,PE11,            ,                      ,TIM1_CH2                         ,                                                ,                       ,SPI4_NSS                                             ,                                           ,                        ,                                        ,                    ,QUADSPI1_BK1_NCS      ,                    ,FMC_D8                      ,                      ,                          ,EVENTOUT,ADC345_IN15
+PortE,PE12,            ,                      ,TIM1_CH3N                        ,                                                ,                       ,SPI4_SCK                                             ,                                           ,                        ,                                        ,                    ,QUADSPI1_BK1_IO0      ,                    ,FMC_D9                      ,                      ,                          ,EVENTOUT,ADC345_IN16
+PortE,PE13,            ,                      ,TIM1_CH3                         ,                                                ,                       ,SPI4_MISO                                            ,                                           ,                        ,                                        ,                    ,QUADSPI1_BK1_IO1      ,                    ,FMC_D10                     ,                      ,                          ,EVENTOUT,ADC3_IN3
+PortE,PE14,            ,                      ,TIM1_CH4                         ,                                                ,                       ,SPI4_MOSI                                            ,TIM1_BKIN2                                 ,                        ,                                        ,                    ,QUADSPI1_BK1_IO2      ,                    ,FMC_D11                     ,                      ,                          ,EVENTOUT,ADC4_IN1
+PortE,PE15,            ,                      ,TIM1_BKIN                        ,                                                ,                       ,                                                     ,TIM1_CH4N                                  ,USART3_RX               ,                                        ,                    ,QUADSPI1_BK1_IO3      ,                    ,FMC_D12                     ,                      ,                          ,EVENTOUT,ADC4_IN2
+PortF,PF0 ,            ,                      ,                                 ,                                                ,I2C2_SDA               ,SPI2_NSS/I2S2_WS                                     ,TIM1_CH3N                                  ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC1_IN10
+PortF,PF1 ,            ,                      ,                                 ,                                                ,                       ,SPI2_SCK/I2S2_CK                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC2_IN10
+PortF,PF2 ,            ,                      ,TIM20_CH3                        ,                                                ,I2C2_SMBA              ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A2                      ,                      ,                          ,EVENTOUT,
+PortF,PF3 ,            ,                      ,TIM20_CH4                        ,                                                ,I2C3_SCL               ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A3                      ,                      ,                          ,EVENTOUT,
+PortF,PF4 ,            ,                      ,COMP1_OUT                        ,TIM20_CH1N                                      ,I2C3_SDA               ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A4                      ,                      ,                          ,EVENTOUT,
+PortF,PF5 ,            ,                      ,TIM20_CH2N                       ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A5                      ,                      ,                          ,EVENTOUT,
+PortF,PF6 ,            ,TIM5_ETR              ,TIM4_CH4                         ,SAI1_SD_B                                       ,I2C2_SCL               ,                                                     ,TIM5_CH1                                   ,USART3_RTS              ,                                        ,                    ,QUADSPI1_BK1_IO3      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortF,PF7 ,            ,                      ,TIM20_BKIN                       ,                                                ,                       ,                                                     ,TIM5_CH2                                   ,                        ,                                        ,                    ,QUADSPI1_BK1_IO2      ,                    ,FMC_A1                      ,SAI1_MCLK_B           ,                          ,EVENTOUT,
+PortF,PF8 ,            ,                      ,TIM20_BKIN2                      ,                                                ,                       ,                                                     ,TIM5_CH3                                   ,                        ,                                        ,                    ,QUADSPI1_BK1_IO0      ,                    ,FMC_A24                     ,SAI1_SCK_B            ,                          ,EVENTOUT,
+PortF,PF9 ,            ,                      ,TIM20_BKIN                       ,TIM15_CH1                                       ,                       ,SPI2_SCK                                             ,TIM5_CH4                                   ,                        ,                                        ,                    ,QUADSPI1_BK1_IO1      ,                    ,FMC_A25                     ,SAI1_FS_B             ,                          ,EVENTOUT,
+PortF,PF10,            ,                      ,TIM20_BKIN2                      ,TIM15_CH2                                       ,                       ,SPI2_SCK                                             ,                                           ,                        ,                                        ,                    ,QUADSPI1_CLK          ,                    ,FMC_A0                      ,SAI1_D3               ,                          ,EVENTOUT,
+PortF,PF11,            ,                      ,TIM20_ETR                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_NE4                     ,                      ,                          ,EVENTOUT,
+PortF,PF12,            ,                      ,TIM20_CH1                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A6                      ,                      ,                          ,EVENTOUT,
+PortF,PF13,            ,                      ,TIM20_CH2                        ,                                                ,I2C4_SMBA              ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A7                      ,                      ,                          ,EVENTOUT,
+PortF,PF14,            ,                      ,TIM20_CH3                        ,                                                ,I2C4_SCL               ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A8                      ,                      ,                          ,EVENTOUT,
+PortF,PF15,            ,                      ,TIM20_CH4                        ,                                                ,I2C4_SDA               ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A9                      ,                      ,                          ,EVENTOUT,
+PortG,PG0 ,            ,                      ,TIM20_CH1N                       ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A10                     ,                      ,                          ,EVENTOUT,
+PortG,PG1 ,            ,                      ,TIM20_CH2N                       ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A11                     ,                      ,                          ,EVENTOUT,
+PortG,PG2 ,            ,                      ,TIM20_CH3N                       ,                                                ,                       ,SPI1_SCK                                             ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A12                     ,                      ,                          ,EVENTOUT,
+PortG,PG3 ,            ,                      ,TIM20_BKIN                       ,                                                ,I2C4_SCL               ,SPI1_MISO                                            ,TIM20_CH4N                                 ,                        ,                                        ,                    ,                      ,                    ,FMC_A13                     ,                      ,                          ,EVENTOUT,
+PortG,PG4 ,            ,                      ,TIM20_BKIN2                      ,                                                ,I2C4_SDA               ,SPI1_MOSI                                            ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A14                     ,                      ,                          ,EVENTOUT,
+PortG,PG5 ,            ,                      ,TIM20_ETR                        ,                                                ,                       ,SPI1_NSS                                             ,                                           ,                        ,LPUART1_CTS                             ,                    ,                      ,                    ,FMC_A15                     ,                      ,                          ,EVENTOUT,
+PortG,PG6 ,            ,                      ,TIM20_BKIN                       ,                                                ,I2C3_SMBA              ,                                                     ,                                           ,                        ,LPUART1_RTS_DE                          ,                    ,                      ,                    ,FMC_INT                     ,                      ,                          ,EVENTOUT,
+PortG,PG7 ,            ,                      ,                                 ,SAI1_CK1                                        ,I2C3_SCL               ,                                                     ,                                           ,                        ,LPUART1_TX                              ,                    ,                      ,                    ,FMC_INT                     ,SAI1_MCLK_A           ,                          ,EVENTOUT,
+PortG,PG8 ,            ,                      ,                                 ,                                                ,I2C3_SDA               ,                                                     ,                                           ,                        ,LPUART1_RX                              ,                    ,                      ,                    ,FMC_NE3                     ,                      ,                          ,EVENTOUT,
+PortG,PG9 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,SPI3_SCK                                   ,USART1_TX               ,                                        ,                    ,                      ,                    ,FMC_NCE/FMC_NE2             ,                      ,TIM15_CH1N                ,EVENTOUT,
+PortG,PG10,MCO         ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,        ,EVENTOUT
diff --git a/ports/stm32/boards/stm32h573_af.csv b/ports/stm32/boards/stm32h573_af.csv
index bdc29ebe2a..b47bb3c8ff 100644
--- a/ports/stm32/boards/stm32h573_af.csv
+++ b/ports/stm32/boards/stm32h573_af.csv
@@ -1,142 +1,142 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,LPTIM1/TIM1/2/16/17,LPTIM3/PDM_SAI1/TIM3/4/5/12/15,I3C1/LPTIM2/3/LPUART1/OCTOSPI/TIM1/8,CEC/DCMI/I2C1/2/3/4/LPTIM1/2/SPI1/I2S1/TIM15/USART1,CEC/I3C1/LPTIM1/SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/6,I2C4/OCTOSPI/SAI1/SPI3/I2S3/SPI4/UART4/12/USART10/USB_PD,SDMMC1/SPI2/I2S2/SPI3/I2S3/SPI6/UART7/8/12/USART1/2/3/6/10/11,LPUART1/SAI2/SDMMC1/SPI6/UART4/5/8,FDCAN1/2/FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/OCTOSPI/SDMMC2/TIM13/14,CRS/FMC[NAND16]/OCTOSPI/SAI2/SDMMC2/TIM8/USB_,ETH[MII/RMII]/FMC[NAND16]/OCTOSPI/SDMMC2/UART7/9/USB_PD,FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/FMC[SDRAM_16bit]/SDMMC1,DCMI/FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/LPTIM5,LPTIM3/4/5/6/TIM2/UART5,SYS,ADC
-PortA,PA0,,TIM2_CH1,TIM5_CH1,TIM8_ETR,TIM15_BKIN,SPI6_NSS,SPI3_RDY,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI2_SD_B,ETH_MII_CRS,,,TIM2_ETR,EVENTOUT,ADC12_INP0/ADC12_INN1
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,TIM15_CH1N,LPTIM1_IN1,OCTOSPI1_DQS,USART2_RTS,UART4_RX,OCTOSPI1_IO3,SAI2_MCLK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC12_INP1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,,TIM15_CH1,LPTIM1_IN2,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,,,,EVENTOUT,ADC12_INP14
-PortA,PA3,,TIM2_CH4,TIM5_CH4,OCTOSPI1_CLK,TIM15_CH2,SPI2_NSS/I2S2_WS,SAI1_SD_B,USART2_RX,,,,ETH_MII_COL,,,,EVENTOUT,ADC12_INP15
-PortA,PA4,,,TIM5_ETR,LPTIM2_CH1,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,SPI6_NSS,,,,,DCMI_HSYNC/PSSI_DE,,EVENTOUT,ADC12_INP18
-PortA,PA5,,TIM2_CH1,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,SPI6_SCK,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,,PSSI_D14,TIM2_ETR,EVENTOUT,ADC12_INP19/ADC12_INN18
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO/I2S1_SDI,OCTOSPI1_IO3,USART11_TX,SPI6_MISO,TIM13_CH1,,,,DCMI_PIXCLK/PSSI_PDCK,,EVENTOUT,ADC12_INP3
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SDO,,USART11_RX,SPI6_MOSI,TIM14_CH1,OCTOSPI1_IO2,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,FMC_NWE,,EVENTOUT,ADC12_INP7/ADC12_INN3
-PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,SPI1_RDY,,USART1_CK,,,USB_SOF,UART7_RX,FMC_NOE,DCMI_D3/PSSI_D3,,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,LPUART1_TX,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,ETH_MII_TX_ER,FMC_NWE,DCMI_D0/PSSI_D0,,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,LPUART1_RX,LPTIM2_IN2,,UCPD1_FRSTX,USART1_RX,,FDCAN2_TX,,,SDMMC1_D0,DCMI_D1/PSSI_D1,,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,LPUART1_CTS,,SPI2_NSS/I2S2_WS,UART4_RX,USART1_CTS/USART1_NSS,,FDCAN1_RX,USB_DM,,,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,LPUART1_RTS,,SPI2_SCK/I2S2_CK,UART4_TX,USART1_RTS,SAI2_FS_B,FDCAN1_TX,USB_DP,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1,LPTIM3_IN2,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,SPI6_NSS,UART4_RTS,,,UART7_TX,FMC_NBL1,DCMI_D11/PSSI_D11,TIM2_ETR,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,OCTOSPI1_IO1,USART11_CK,UART4_CTS,,,ETH_MII_RXD2,,,LPTIM3_CH1,EVENTOUT,ADC12_INP9/ADC12_INN5
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,OCTOSPI1_IO0,,,,,ETH_MII_RXD3,,,LPTIM3_CH2,EVENTOUT,ADC12_INP5
-PortB,PB2,RTC_OUT2,,SAI1_D1,TIM8_CH4N,SPI1_RDY,LPTIM1_CH1,SAI1_SD_A,SPI3_MOSI/I2S3_SDO,,OCTOSPI1_CLK,OCTOSPI1_DQS,,SDMMC1_CMD,LPTIM5_ETR,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,I2C2_SDA,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,UART12_CTS/UART12_NSS,SPI6_SCK,SDMMC2_D2,CRS_SYNC,UART7_RX,,,LPTIM6_ETR,EVENTOUT,
-PortB,PB4,NJTRST,TIM16_BKIN,TIM3_CH1,OCTOSPI1_CLK,LPTIM1_CH2,SPI1_MISO/I2S1_SDI,SPI3_MISO/I2S3_SDI,SPI2_NSS/I2S2_WS,SPI6_MISO,SDMMC2_D3,,UART7_TX,,DCMI_D7/PSSI_D7,,EVENTOUT,
-PortB,PB5,,TIM17_BKIN,TIM3_CH2,OCTOSPI1_NCLK,I2C1_SMBA,SPI1_MOSI/I2S1_SDO,I2C4_SMBA,SPI3_MOSI/I2S3_SDO,SPI6_MOSI,FDCAN2_RX,,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10/PSSI_D10,UART5_RX,EVENTOUT,
-PortB,PB6,,TIM16_CH1N,TIM4_CH1,I3C1_SCL,I2C1_SCL,HDMI_CEC,I2C4_SCL,USART1_TX,LPUART1_TX,FDCAN2_TX,OCTOSPI1_NCS,,FMC_SDNE1,DCMI_D5/PSSI_D5,UART5_TX,EVENTOUT,
-PortB,PB7,,TIM17_CH1N,TIM4_CH2,I3C1_SDA,I2C1_SDA,,I2C4_SDA,USART1_RX,LPUART1_RX,FDCAN1_TX,SDMMC2_D5,SDMMC2_CKIN,FMC_NL,DCMI_VSYNC/PSSI_RDY,,EVENTOUT,
-PortB,PB8,,TIM16_CH1,TIM4_CH3,I3C1_SCL,I2C1_SCL,SPI4_RDY,I2C4_SCL,SDMMC1_CKIN,UART4_RX,FDCAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6/PSSI_D6,,EVENTOUT,
-PortB,PB9,,TIM17_CH1,TIM4_CH4,I3C1_SDA,I2C1_SDA,SPI2_NSS/I2S2_WS,I2C4_SDA,SDMMC1_CDIR,UART4_TX,FDCAN1_TX,SDMMC2_D5,SDMMC2_CKIN,SDMMC1_D5,DCMI_D7/PSSI_D7,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,LPTIM3_CH1,LPTIM2_IN1,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,OCTOSPI1_NCS,,ETH_MII_RX_ER,,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,LPTIM2_ETR,I2C2_SDA,SPI2_RDY,SPI4_RDY,USART3_RX,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FMC_NBL1,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,OCTOSPI1_NCLK,I2C2_SDA,SPI2_NSS/I2S2_WS,UCPD1_FRSTX,USART3_CK,,FDCAN2_RX,,ETH_MII_TXD0/ETH_RMII_TXD0,,,UART5_RX,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,LPTIM3_IN1,LPTIM2_CH1,I2C2_SMBA,SPI2_SCK/I2S2_CK,,USART3_CTS/USART3_NSS,,FDCAN2_TX,,,SDMMC1_D0,,UART5_TX,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,TIM12_CH1,TIM8_CH2N,USART1_TX,SPI2_MISO/I2S2_SDI,,USART3_RTS,UART4_RTS,SDMMC2_D0,,,,,LPTIM3_ETR,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,TIM12_CH2,TIM8_CH3N,USART1_RX,SPI2_MOSI/I2S2_SDO,,USART11_CTS/USART11_NSS,UART4_CTS,SDMMC2_D1,OCTOSPI1_CLK,ETH_MII_TXD1/ETH_RMII_TXD1,,DCMI_D2/PSSI_D2,UART5_RX,EVENTOUT,
-PortC,PC0,,TIM16_BKIN,,,,,SAI1_MCLK_A,SPI2_RDY,SAI2_FS_B,FMC_A25,OCTOSPI1_IO7,,FMC_SDNWE,,,EVENTOUT,ADC12_INP10
-PortC,PC1,TRACED0,,SAI1_D1,,,SPI2_MOSI/I2S2_SDO,SAI1_SD_A,USART11_RTS,SAI2_SD_A,SDMMC2_CK,OCTOSPI1_IO4,ETH_MDC,,,,EVENTOUT,ADC12_INP11/ADC12_INN10
-PortC,PC2,PWR_CSLEEP,TIM17_CH1,TIM4_CH4,,,SPI2_MISO/I2S2_SDI,OCTOSPI1_IO5,,,OCTOSPI1_IO2,,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC12_INP12/ADC12_INN11
-PortC,PC3,PWR_CSTOP,,SAI1_D3,LPTIM3_CH1,,SPI2_MOSI/I2S2_SDO,OCTOSPI1_IO6,,,OCTOSPI1_IO0,,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC12_INP13/ADC12_INN12
-PortC,PC4,,TIM2_CH4,SAI1_CK1,LPTIM2_ETR,,I2S1_MCK,,USART3_RX,,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT,ADC12_INP4
-PortC,PC5,,TIM1_CH4N,SAI1_D3,,PSSI_D15,,SAI1_FS_A,UART12_RTS,,,OCTOSPI1_DQS,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT,ADC12_INP8/ADC12_INN4
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,SAI1_SCK_A,USART6_TX,SDMMC1_D0DIR,FMC_NWAIT,SDMMC2_D6,OCTOSPI1_IO5,SDMMC1_D6,DCMI_D0/PSSI_D0,,EVENTOUT,
-PortC,PC7,TRGIO,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,USART6_RX,SDMMC1_D123DIR,FMC_NE1,SDMMC2_D7,OCTOSPI1_IO6,SDMMC1_D7,DCMI_D1/PSSI_D1,,EVENTOUT,
-PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,USART6_CK,UART5_RTS,FMC_NE2/FMC_NCE,FMC_INT,FMC_ALE,SDMMC1_D0,DCMI_D2/PSSI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,AUDIOCLK,,,UART5_CTS,OCTOSPI1_IO0,,FMC_CLE,SDMMC1_D1,DCMI_D3/PSSI_D3,,EVENTOUT,
-PortC,PC10,,,LPTIM3_ETR,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,OCTOSPI1_IO1,,ETH_MII_TXD0/ETH_RMII_TXD0,SDMMC1_D2,DCMI_D8/PSSI_D8,,EVENTOUT,
-PortC,PC11,,,LPTIM3_IN1,,,,SPI3_MISO/I2S3_SDI,USART3_RX,UART4_RX,OCTOSPI1_NCS,,,SDMMC1_D3,DCMI_D4/PSSI_D4,,EVENTOUT,
-PortC,PC12,TRACED3,,TIM15_CH1,,,SPI6_SCK,SPI3_MOSI/I2S3_SDO,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9/PSSI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,TIM8_CH4N,,,,,UART4_RX,FDCAN1_RX,,UART9_CTS,FMC_D2/FMC_AD2,,,EVENTOUT,
-PortD,PD1,,,,,,,,,UART4_TX,FDCAN1_TX,,,FMC_D3/FMC_AD3,,,EVENTOUT,
-PortD,PD2,TRACED2,,TIM3_ETR,,TIM15_BKIN,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11/PSSI_D11,LPTIM4_ETR,EVENTOUT,
-PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS/USART2_NSS,,,,,FMC_CLK,DCMI_D5/PSSI_D5,,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS,,,OCTOSPI1_IO4,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,TIM1_CH4N,,,,SPI2_RDY,,USART2_TX,,FDCAN1_TX,OCTOSPI1_IO5,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,SAI1_D1,,,SPI3_MOSI/I2S3_SDO,SAI1_SD_A,USART2_RX,,,OCTOSPI1_IO6,SDMMC2_CK,FMC_NWAIT,DCMI_D10/PSSI_D10,,EVENTOUT,
-PortD,PD7,,,,,,SPI1_MOSI/I2S1_SDO,,USART2_CK,,,OCTOSPI1_IO7,SDMMC2_CMD,FMC_NE1/FMC_NCE,,LPTIM4_OUT,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13/FMC_AD13,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,FDCAN2_RX,,,FMC_D14/FMC_AD14,,,EVENTOUT,
-PortD,PD10,,,,LPTIM2_CH2,,,,USART3_CK,,,,,FMC_D15/FMC_AD15,,,EVENTOUT,
-PortD,PD11,,,SAI1_CK1,LPTIM2_IN2,I2C4_SMBA,,,USART3_CTS/USART3_NSS,UART4_RX,OCTOSPI1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT,
-PortD,PD12,,LPTIM1_IN1,TIM4_CH1,LPTIM2_IN1,I2C4_SCL,I3C1_SCL,SAI1_D1,USART3_RTS,UART4_TX,OCTOSPI1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,DCMI_D12/PSSI_D12,,EVENTOUT,
-PortD,PD13,,LPTIM1_CH1,TIM4_CH2,LPTIM2_CH1,I2C4_SDA,I3C1_SDA,,,,OCTOSPI1_IO3,SAI2_SCK_A,UART9_RTS,FMC_A18,DCMI_D13/PSSI_D13,LPTIM4_IN1,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,UART9_RX,FMC_D0/FMC_AD0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,UART9_TX,FMC_D1/FMC_AD1,,,EVENTOUT,
-PortE,PE0,,LPTIM1_ETR,TIM4_ETR,LPTIM2_CH2,LPTIM2_ETR,,SPI3_RDY,,UART8_RX,FDCAN1_RX,SAI2_MCLK_A,,FMC_NBL0,DCMI_D2/PSSI_D2,,EVENTOUT,
-PortE,PE1,,LPTIM1_IN2,,,,,,,UART8_TX,FDCAN1_TX,,,FMC_NBL1,DCMI_D3/PSSI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,LPTIM1_IN2,SAI1_CK1,,,SPI4_SCK,SAI1_MCLK_A,USART10_RX,UART8_TX,OCTOSPI1_IO2,,ETH_MII_TXD3,FMC_A23,DCMI_D3/PSSI_D3,,EVENTOUT,
-PortE,PE3,TRACED0,,,,TIM15_BKIN,,SAI1_SD_B,USART10_TX,,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,SAI1_D2,,TIM15_CH1N,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4/PSSI_D4,,EVENTOUT,
-PortE,PE5,TRACED2,,SAI1_CK2,,TIM15_CH1,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6/PSSI_D6,,EVENTOUT,
-PortE,PE6,TRACED3,TIM1_BKIN2,SAI1_D1,,TIM15_CH2,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCLK_B,,FMC_A22,DCMI_D7/PSSI_D7,,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,,,,UART12_RTS,UART7_RX,,,OCTOSPI1_IO4,,FMC_D4/FMC_AD4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,,,,UART12_CTS/UART12_NSS,UART7_TX,,,OCTOSPI1_IO5,,FMC_D5/FMC_AD5,,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,,,,UART12_RX,UART7_RTS,,,OCTOSPI1_IO6,,FMC_D6/FMC_AD6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,,,,UART12_TX,UART7_CTS,,,OCTOSPI1_IO7,,FMC_D7/FMC_AD7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,,SPI1_RDY,SPI4_NSS,OCTOSPI1_NCS,,,,SAI2_SD_B,,FMC_D8/FMC_AD8,,,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9/FMC_AD9,,,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10/FMC_AD10,,,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCLK_B,,FMC_D11/FMC_AD11,,,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,TIM1_CH4N,,,,USART10_CK,,,,,FMC_D12/FMC_AD12,,,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,LPTIM5_CH1,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,LPTIM5_CH2,,EVENTOUT,
-PortF,PF2,,,LPTIM3_CH2,LPTIM3_IN2,I2C2_SMBA,,UART12_TX,USART11_CK,,,,,FMC_A2,LPTIM5_IN1,,EVENTOUT,
-PortF,PF3,,,LPTIM3_IN1,,,,,USART11_TX,,,,,FMC_A3,LPTIM5_IN2,,EVENTOUT,
-PortF,PF4,,,LPTIM3_ETR,,,,,USART11_RX,,,,,FMC_A4,,,EVENTOUT,
-PortF,PF5,,,LPTIM3_CH1,,I2C4_SCL,I3C1_SCL,UART12_RX,USART11_CTS/USART11_NSS,,,,,FMC_A5,,LPTIM3_IN1,EVENTOUT,
-PortF,PF6,,TIM16_CH1,,,,SPI5_NSS,SAI1_SD_B,UART7_RX,,,OCTOSPI1_IO3,,,LPTIM5_CH1,,EVENTOUT,
-PortF,PF7,,TIM17_CH1,,,,SPI5_SCK,SAI1_MCLK_B,UART7_TX,,,OCTOSPI1_IO2,,,LPTIM5_CH2,,EVENTOUT,
-PortF,PF8,,TIM16_CH1N,,,,SPI5_MISO,SAI1_SCK_B,UART7_RTS,,TIM13_CH1,OCTOSPI1_IO0,,,LPTIM5_IN1,,EVENTOUT,
-PortF,PF9,,TIM17_CH1N,,,,SPI5_MOSI,SAI1_FS_B,UART7_CTS,,TIM14_CH1,OCTOSPI1_IO1,,,LPTIM5_IN2,,EVENTOUT,
-PortF,PF10,,TIM16_BKIN,SAI1_D3,,PSSI_D15,,,,,OCTOSPI1_CLK,,,,DCMI_D11/PSSI_D11,,EVENTOUT,
-PortF,PF11,,,,,,SPI5_MOSI,,,,OCTOSPI1_NCLK,SAI2_SD_B,,FMC_NRAS,DCMI_D12/PSSI_D12,LPTIM6_CH1,EVENTOUT,ADC1_INP2
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,LPTIM6_CH2,EVENTOUT,ADC1_INP6/ADC1_INN2
-PortF,PF13,,,,,I2C4_SMBA,,,,,,,,FMC_A7,,LPTIM6_IN1,EVENTOUT,ADC2_INP2
-PortF,PF14,,,,,,,,,,,,,FMC_A8,,LPTIM6_IN2,EVENTOUT,ADC2_INP6/ADC2_INN2
-PortF,PF15,,,,,I2C4_SDA,I3C1_SDA,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,UART9_RX,FMC_A10,,LPTIM4_IN1,EVENTOUT,
-PortG,PG1,,,,,,,,SPI2_MOSI/I2S2_SDO,,,,UART9_TX,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,TIM8_BKIN,,,,UART12_RX,,,,,FMC_A12,,LPTIM6_ETR,EVENTOUT,
-PortG,PG3,,,,TIM8_BKIN2,,,,UART12_TX,,,,,FMC_A13,LPTIM5_ETR,,EVENTOUT,
-PortG,PG4,,TIM1_BKIN2,,,,,,,,,,,FMC_A14/FMC_BA0,,LPTIM4_ETR,EVENTOUT,
-PortG,PG5,,TIM1_ETR,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,TIM17_BKIN,,I3C1_SDA,I2C4_SDA,SPI1_RDY,,,,,OCTOSPI1_NCS,UCPD1_FRSTX,FMC_NE3,DCMI_D12/PSSI_D12,,EVENTOUT,
-PortG,PG7,,,SAI1_CK2,I3C1_SCL,I2C4_SCL,,SAI1_MCLK_A,USART6_CK,,,,UCPD1_FRSTX,FMC_INT,DCMI_D13/PSSI_D13,,EVENTOUT,
-PortG,PG8,,,,TIM8_ETR,,SPI6_NSS,,USART6_RTS,,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT,
-PortG,PG9,,,,,,SPI1_MISO/I2S1_SDI,,USART6_RX,,OCTOSPI1_IO6,SAI2_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,DCMI_VSYNC/PSSI_RDY,,EVENTOUT,
-PortG,PG10,,,,,,SPI1_NSS/I2S1_WS,,,,,SAI2_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2/PSSI_D2,,EVENTOUT,
-PortG,PG11,,LPTIM1_IN2,,,,SPI1_SCK/I2S1_CK,USART10_RX,USART11_RTS,,,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3/PSSI_D3,,EVENTOUT,
-PortG,PG12,,LPTIM1_IN1,,,PSSI_D15,SPI6_MISO,USART10_TX,USART6_RTS,,,SDMMC2_D3,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_NE4,DCMI_D11/PSSI_D11,LPTIM5_CH1,EVENTOUT,
-PortG,PG13,TRACED0,LPTIM1_CH1,,,,SPI6_SCK,USART10_CTS/USART10_NSS,USART6_CTS/USART6_NSS,,,SDMMC2_D6,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,LPTIM5_CH2,,EVENTOUT,
-PortG,PG14,TRACED1,LPTIM1_ETR,,,LPTIM1_CH2,SPI6_MOSI,USART10_RTS,USART6_TX,,OCTOSPI1_IO7,SDMMC2_D7,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,LPTIM5_IN1,,EVENTOUT,
-PortG,PG15,,,,,,SPI4_RDY,USART10_CK,USART6_CTS/USART6_NSS,,,,,FMC_NCAS,DCMI_D13/PSSI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,LPTIM1_IN2,,,,,,,,OCTOSPI1_IO4,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,,EVENTOUT,
-PortH,PH3,,,,,,,,,,OCTOSPI1_IO5,SAI2_MCLK_B,ETH_MII_COL,FMC_SDNE0,,,EVENTOUT,
-PortH,PH4,,,,,I2C2_SCL,SPI5_RDY,,SPI6_RDY,,,,,,PSSI_D14,,EVENTOUT,
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,SPI6_RDY,,,,,FMC_SDNWE,,,EVENTOUT,
-PortH,PH6,,TIM1_CH3N,TIM12_CH1,TIM8_CH1,I2C2_SMBA,SPI5_SCK,,,,,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8/PSSI_D8,,EVENTOUT,
-PortH,PH7,,TIM1_CH3,,TIM8_CH1N,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9/PSSI_D9,,EVENTOUT,
-PortH,PH8,,TIM1_CH2N,TIM5_ETR,TIM8_CH2,I2C3_SDA,SPI5_MOSI,,,,,,,,DCMI_HSYNC/PSSI_DE,,EVENTOUT,
-PortH,PH9,,TIM1_CH2,TIM12_CH2,TIM8_CH2N,I2C3_SMBA,SPI5_NSS,,,,,,,,DCMI_D0/PSSI_D0,,EVENTOUT,
-PortH,PH10,,TIM1_CH1N,TIM5_CH1,TIM8_CH3,I2C4_SMBA,SPI5_RDY,,,,,,,,DCMI_D1/PSSI_D1,,EVENTOUT,
-PortH,PH11,,TIM1_CH1,TIM5_CH2,TIM8_CH3N,I2C4_SCL,I3C1_SCL,,,,,,,,DCMI_D2/PSSI_D2,,EVENTOUT,
-PortH,PH12,,TIM1_BKIN,TIM5_CH3,TIM8_BKIN,I2C4_SDA,I3C1_SDA,,,,,TIM8_CH4N,,,DCMI_D3/PSSI_D3,,EVENTOUT,
-PortH,PH13,,LPTIM1_IN2,,TIM8_CH1N,,,,UART8_TX,UART4_TX,FDCAN1_TX,,,,DCMI_D3/PSSI_D3,,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,FDCAN1_RX,,,,DCMI_D4/PSSI_D4,,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,,DCMI_D11/PSSI_D11,,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,,DCMI_D13/PSSI_D13,,EVENTOUT,
-PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,,DCMI_D8/PSSI_D8,,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO/I2S2_SDI,,,,,,,,DCMI_D9/PSSI_D9,,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SDO,,,,,,,,DCMI_D10/PSSI_D10,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,SPI2_RDY,,,SAI2_MCLK_A,,,DCMI_D5/PSSI_D5,,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,,DCMI_VSYNC/PSSI_RDY,,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,,DCMI_D6/PSSI_D6,,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,,DCMI_D7/PSSI_D7,,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,UART4_RX,FDCAN1_RX,,,,,,EVENTOUT,
-PortI,PI10,,,,,,,,,,FDCAN1_RX,,ETH_MII_RX_ER,,PSSI_D14,,EVENTOUT,
-PortI,PI11,,,,,,,,,,,,,,PSSI_D15,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1                ,AF2                           ,AF3                                 ,AF4                                                ,AF5                                                   ,AF6                                                     ,AF7                                                          ,AF8                               ,AF9                                                                  ,AF10                                         ,AF11                                                   ,AF12                                                        ,AF13                                            ,AF14                   ,AF15    ,ADC
+     ,    ,SYS          ,LPTIM1/TIM1/2/16/17,LPTIM3/PDM_SAI1/TIM3/4/5/12/15,I3C1/LPTIM2/3/LPUART1/OCTOSPI/TIM1/8,CEC/DCMI/I2C1/2/3/4/LPTIM1/2/SPI1/I2S1/TIM15/USART1,CEC/I3C1/LPTIM1/SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/6,I2C4/OCTOSPI/SAI1/SPI3/I2S3/SPI4/UART4/12/USART10/USB_PD,SDMMC1/SPI2/I2S2/SPI3/I2S3/SPI6/UART7/8/12/USART1/2/3/6/10/11,LPUART1/SAI2/SDMMC1/SPI6/UART4/5/8,FDCAN1/2/FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/OCTOSPI/SDMMC2/TIM13/14,CRS/FMC[NAND16]/OCTOSPI/SAI2/SDMMC2/TIM8/USB_,ETH[MII/RMII]/FMC[NAND16]/OCTOSPI/SDMMC2/UART7/9/USB_PD,FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/FMC[SDRAM_16bit]/SDMMC1,DCMI/FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/LPTIM5,LPTIM3/4/5/6/TIM2/UART5,SYS     ,ADC
+PortA,PA0 ,             ,TIM2_CH1           ,TIM5_CH1                      ,TIM8_ETR                            ,TIM15_BKIN                                         ,SPI6_NSS                                              ,SPI3_RDY                                                ,USART2_CTS/USART2_NSS                                        ,UART4_TX                          ,SDMMC2_CMD                                                           ,SAI2_SD_B                                    ,ETH_MII_CRS                                            ,                                                            ,                                                ,TIM2_ETR               ,EVENTOUT,ADC12_INP0/ADC12_INN1
+PortA,PA1 ,             ,TIM2_CH2           ,TIM5_CH2                      ,                                    ,TIM15_CH1N                                         ,LPTIM1_IN1                                            ,OCTOSPI1_DQS                                            ,USART2_RTS                                                   ,UART4_RX                          ,OCTOSPI1_IO3                                                         ,SAI2_MCLK_B                                  ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK                        ,                                                            ,                                                ,                       ,EVENTOUT,ADC12_INP1
+PortA,PA2 ,             ,TIM2_CH3           ,TIM5_CH3                      ,                                    ,TIM15_CH1                                          ,LPTIM1_IN2                                            ,                                                        ,USART2_TX                                                    ,SAI2_SCK_B                        ,                                                                     ,                                             ,ETH_MDIO                                               ,                                                            ,                                                ,                       ,EVENTOUT,ADC12_INP14
+PortA,PA3 ,             ,TIM2_CH4           ,TIM5_CH4                      ,OCTOSPI1_CLK                        ,TIM15_CH2                                          ,SPI2_NSS/I2S2_WS                                      ,SAI1_SD_B                                               ,USART2_RX                                                    ,                                  ,                                                                     ,                                             ,ETH_MII_COL                                            ,                                                            ,                                                ,                       ,EVENTOUT,ADC12_INP15
+PortA,PA4 ,             ,                   ,TIM5_ETR                      ,LPTIM2_CH1                          ,                                                   ,SPI1_NSS/I2S1_WS                                      ,SPI3_NSS/I2S3_WS                                        ,USART2_CK                                                    ,SPI6_NSS                          ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_HSYNC/PSSI_DE                              ,                       ,EVENTOUT,ADC12_INP18
+PortA,PA5 ,             ,TIM2_CH1           ,                              ,TIM8_CH1N                           ,                                                   ,SPI1_SCK/I2S1_CK                                      ,                                                        ,                                                             ,SPI6_SCK                          ,                                                                     ,                                             ,ETH_MII_TX_EN/ETH_RMII_TX_EN                           ,                                                            ,PSSI_D14                                        ,TIM2_ETR               ,EVENTOUT,ADC12_INP19/ADC12_INN18
+PortA,PA6 ,             ,TIM1_BKIN          ,TIM3_CH1                      ,TIM8_BKIN                           ,                                                   ,SPI1_MISO/I2S1_SDI                                    ,OCTOSPI1_IO3                                            ,USART11_TX                                                   ,SPI6_MISO                         ,TIM13_CH1                                                            ,                                             ,                                                       ,                                                            ,DCMI_PIXCLK/PSSI_PDCK                           ,                       ,EVENTOUT,ADC12_INP3
+PortA,PA7 ,             ,TIM1_CH1N          ,TIM3_CH2                      ,TIM8_CH1N                           ,                                                   ,SPI1_MOSI/I2S1_SDO                                    ,                                                        ,USART11_RX                                                   ,SPI6_MOSI                         ,TIM14_CH1                                                            ,OCTOSPI1_IO2                                 ,ETH_MII_RX_DV/ETH_RMII_CRS_DV                          ,FMC_SDNWE                                                   ,FMC_NWE                                         ,                       ,EVENTOUT,ADC12_INP7/ADC12_INN3
+PortA,PA8 ,MCO1         ,TIM1_CH1           ,                              ,TIM8_BKIN2                          ,I2C3_SCL                                           ,SPI1_RDY                                              ,                                                        ,USART1_CK                                                    ,                                  ,                                                                     ,USB_SOF                                      ,UART7_RX                                               ,FMC_NOE                                                     ,DCMI_D3/PSSI_D3                                 ,                       ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2           ,                              ,LPUART1_TX                          ,I2C3_SMBA                                          ,SPI2_SCK/I2S2_CK                                      ,                                                        ,USART1_TX                                                    ,                                  ,                                                                     ,                                             ,ETH_MII_TX_ER                                          ,FMC_NWE                                                     ,DCMI_D0/PSSI_D0                                 ,                       ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3           ,                              ,LPUART1_RX                          ,LPTIM2_IN2                                         ,                                                      ,UCPD1_FRSTX                                             ,USART1_RX                                                    ,                                  ,FDCAN2_TX                                                            ,                                             ,                                                       ,SDMMC1_D0                                                   ,DCMI_D1/PSSI_D1                                 ,                       ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4           ,                              ,LPUART1_CTS                         ,                                                   ,SPI2_NSS/I2S2_WS                                      ,UART4_RX                                                ,USART1_CTS/USART1_NSS                                        ,                                  ,FDCAN1_RX                                                            ,USB_DM                                       ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR           ,                              ,LPUART1_RTS                         ,                                                   ,SPI2_SCK/I2S2_CK                                      ,UART4_TX                                                ,USART1_RTS                                                   ,SAI2_FS_B                         ,FDCAN1_TX                                                            ,USB_DP                                       ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1           ,LPTIM3_IN2                    ,                                    ,HDMI_CEC                                           ,SPI1_NSS/I2S1_WS                                      ,SPI3_NSS/I2S3_WS                                        ,SPI6_NSS                                                     ,UART4_RTS                         ,                                                                     ,                                             ,UART7_TX                                               ,FMC_NBL1                                                    ,DCMI_D11/PSSI_D11                               ,TIM2_ETR               ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N          ,TIM3_CH3                      ,TIM8_CH2N                           ,                                                   ,                                                      ,OCTOSPI1_IO1                                            ,USART11_CK                                                   ,UART4_CTS                         ,                                                                     ,                                             ,ETH_MII_RXD2                                           ,                                                            ,                                                ,LPTIM3_CH1             ,EVENTOUT,ADC12_INP9/ADC12_INN5
+PortB,PB1 ,             ,TIM1_CH3N          ,TIM3_CH4                      ,TIM8_CH3N                           ,                                                   ,                                                      ,OCTOSPI1_IO0                                            ,                                                             ,                                  ,                                                                     ,                                             ,ETH_MII_RXD3                                           ,                                                            ,                                                ,LPTIM3_CH2             ,EVENTOUT,ADC12_INP5
+PortB,PB2 ,RTC_OUT2     ,                   ,SAI1_D1                       ,TIM8_CH4N                           ,SPI1_RDY                                           ,LPTIM1_CH1                                            ,SAI1_SD_A                                               ,SPI3_MOSI/I2S3_SDO                                           ,                                  ,OCTOSPI1_CLK                                                         ,OCTOSPI1_DQS                                 ,                                                       ,SDMMC1_CMD                                                  ,LPTIM5_ETR                                      ,                       ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2           ,                              ,                                    ,I2C2_SDA                                           ,SPI1_SCK/I2S1_CK                                      ,SPI3_SCK/I2S3_CK                                        ,UART12_CTS/UART12_NSS                                        ,SPI6_SCK                          ,SDMMC2_D2                                                            ,CRS_SYNC                                     ,UART7_RX                                               ,                                                            ,                                                ,LPTIM6_ETR             ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,TIM16_BKIN         ,TIM3_CH1                      ,OCTOSPI1_CLK                        ,LPTIM1_CH2                                         ,SPI1_MISO/I2S1_SDI                                    ,SPI3_MISO/I2S3_SDI                                      ,SPI2_NSS/I2S2_WS                                             ,SPI6_MISO                         ,SDMMC2_D3                                                            ,                                             ,UART7_TX                                               ,                                                            ,DCMI_D7/PSSI_D7                                 ,                       ,EVENTOUT,
+PortB,PB5 ,             ,TIM17_BKIN         ,TIM3_CH2                      ,OCTOSPI1_NCLK                       ,I2C1_SMBA                                          ,SPI1_MOSI/I2S1_SDO                                    ,I2C4_SMBA                                               ,SPI3_MOSI/I2S3_SDO                                           ,SPI6_MOSI                         ,FDCAN2_RX                                                            ,                                             ,ETH_PPS_OUT                                            ,FMC_SDCKE1                                                  ,DCMI_D10/PSSI_D10                               ,UART5_RX               ,EVENTOUT,
+PortB,PB6 ,             ,TIM16_CH1N         ,TIM4_CH1                      ,I3C1_SCL                            ,I2C1_SCL                                           ,HDMI_CEC                                              ,I2C4_SCL                                                ,USART1_TX                                                    ,LPUART1_TX                        ,FDCAN2_TX                                                            ,OCTOSPI1_NCS                                 ,                                                       ,FMC_SDNE1                                                   ,DCMI_D5/PSSI_D5                                 ,UART5_TX               ,EVENTOUT,
+PortB,PB7 ,             ,TIM17_CH1N         ,TIM4_CH2                      ,I3C1_SDA                            ,I2C1_SDA                                           ,                                                      ,I2C4_SDA                                                ,USART1_RX                                                    ,LPUART1_RX                        ,FDCAN1_TX                                                            ,SDMMC2_D5                                    ,SDMMC2_CKIN                                            ,FMC_NL                                                      ,DCMI_VSYNC/PSSI_RDY                             ,                       ,EVENTOUT,
+PortB,PB8 ,             ,TIM16_CH1          ,TIM4_CH3                      ,I3C1_SCL                            ,I2C1_SCL                                           ,SPI4_RDY                                              ,I2C4_SCL                                                ,SDMMC1_CKIN                                                  ,UART4_RX                          ,FDCAN1_RX                                                            ,SDMMC2_D4                                    ,ETH_MII_TXD3                                           ,SDMMC1_D4                                                   ,DCMI_D6/PSSI_D6                                 ,                       ,EVENTOUT,
+PortB,PB9 ,             ,TIM17_CH1          ,TIM4_CH4                      ,I3C1_SDA                            ,I2C1_SDA                                           ,SPI2_NSS/I2S2_WS                                      ,I2C4_SDA                                                ,SDMMC1_CDIR                                                  ,UART4_TX                          ,FDCAN1_TX                                                            ,SDMMC2_D5                                    ,SDMMC2_CKIN                                            ,SDMMC1_D5                                                   ,DCMI_D7/PSSI_D7                                 ,                       ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3           ,LPTIM3_CH1                    ,LPTIM2_IN1                          ,I2C2_SCL                                           ,SPI2_SCK/I2S2_CK                                      ,                                                        ,USART3_TX                                                    ,                                  ,OCTOSPI1_NCS                                                         ,                                             ,ETH_MII_RX_ER                                          ,                                                            ,                                                ,                       ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4           ,                              ,LPTIM2_ETR                          ,I2C2_SDA                                           ,SPI2_RDY                                              ,SPI4_RDY                                                ,USART3_RX                                                    ,                                  ,                                                                     ,                                             ,ETH_MII_TX_EN/ETH_RMII_TX_EN                           ,FMC_NBL1                                                    ,                                                ,                       ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN          ,                              ,OCTOSPI1_NCLK                       ,I2C2_SDA                                           ,SPI2_NSS/I2S2_WS                                      ,UCPD1_FRSTX                                             ,USART3_CK                                                    ,                                  ,FDCAN2_RX                                                            ,                                             ,ETH_MII_TXD0/ETH_RMII_TXD0                             ,                                                            ,                                                ,UART5_RX               ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N          ,LPTIM3_IN1                    ,LPTIM2_CH1                          ,I2C2_SMBA                                          ,SPI2_SCK/I2S2_CK                                      ,                                                        ,USART3_CTS/USART3_NSS                                        ,                                  ,FDCAN2_TX                                                            ,                                             ,                                                       ,SDMMC1_D0                                                   ,                                                ,UART5_TX               ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N          ,TIM12_CH1                     ,TIM8_CH2N                           ,USART1_TX                                          ,SPI2_MISO/I2S2_SDI                                    ,                                                        ,USART3_RTS                                                   ,UART4_RTS                         ,SDMMC2_D0                                                            ,                                             ,                                                       ,                                                            ,                                                ,LPTIM3_ETR             ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N          ,TIM12_CH2                     ,TIM8_CH3N                           ,USART1_RX                                          ,SPI2_MOSI/I2S2_SDO                                    ,                                                        ,USART11_CTS/USART11_NSS                                      ,UART4_CTS                         ,SDMMC2_D1                                                            ,OCTOSPI1_CLK                                 ,ETH_MII_TXD1/ETH_RMII_TXD1                             ,                                                            ,DCMI_D2/PSSI_D2                                 ,UART5_RX               ,EVENTOUT,
+PortC,PC0 ,             ,TIM16_BKIN         ,                              ,                                    ,                                                   ,                                                      ,SAI1_MCLK_A                                             ,SPI2_RDY                                                     ,SAI2_FS_B                         ,FMC_A25                                                              ,OCTOSPI1_IO7                                 ,                                                       ,FMC_SDNWE                                                   ,                                                ,                       ,EVENTOUT,ADC12_INP10
+PortC,PC1 ,TRACED0      ,                   ,SAI1_D1                       ,                                    ,                                                   ,SPI2_MOSI/I2S2_SDO                                    ,SAI1_SD_A                                               ,USART11_RTS                                                  ,SAI2_SD_A                         ,SDMMC2_CK                                                            ,OCTOSPI1_IO4                                 ,ETH_MDC                                                ,                                                            ,                                                ,                       ,EVENTOUT,ADC12_INP11/ADC12_INN10
+PortC,PC2 ,PWR_CSLEEP   ,TIM17_CH1          ,TIM4_CH4                      ,                                    ,                                                   ,SPI2_MISO/I2S2_SDI                                    ,OCTOSPI1_IO5                                            ,                                                             ,                                  ,OCTOSPI1_IO2                                                         ,                                             ,ETH_MII_TXD2                                           ,FMC_SDNE0                                                   ,                                                ,                       ,EVENTOUT,ADC12_INP12/ADC12_INN11
+PortC,PC3 ,PWR_CSTOP    ,                   ,SAI1_D3                       ,LPTIM3_CH1                          ,                                                   ,SPI2_MOSI/I2S2_SDO                                    ,OCTOSPI1_IO6                                            ,                                                             ,                                  ,OCTOSPI1_IO0                                                         ,                                             ,ETH_MII_TX_CLK                                         ,FMC_SDCKE0                                                  ,                                                ,                       ,EVENTOUT,ADC12_INP13/ADC12_INN12
+PortC,PC4 ,             ,TIM2_CH4           ,SAI1_CK1                      ,LPTIM2_ETR                          ,                                                   ,I2S1_MCK                                              ,                                                        ,USART3_RX                                                    ,                                  ,                                                                     ,                                             ,ETH_MII_RXD0/ETH_RMII_RXD0                             ,FMC_SDNE0                                                   ,                                                ,                       ,EVENTOUT,ADC12_INP4
+PortC,PC5 ,             ,TIM1_CH4N          ,SAI1_D3                       ,                                    ,PSSI_D15                                           ,                                                      ,SAI1_FS_A                                               ,UART12_RTS                                                   ,                                  ,                                                                     ,OCTOSPI1_DQS                                 ,ETH_MII_RXD1/ETH_RMII_RXD1                             ,FMC_SDCKE0                                                  ,                                                ,                       ,EVENTOUT,ADC12_INP8/ADC12_INN4
+PortC,PC6 ,             ,                   ,TIM3_CH1                      ,TIM8_CH1                            ,                                                   ,I2S2_MCK                                              ,SAI1_SCK_A                                              ,USART6_TX                                                    ,SDMMC1_D0DIR                      ,FMC_NWAIT                                                            ,SDMMC2_D6                                    ,OCTOSPI1_IO5                                           ,SDMMC1_D6                                                   ,DCMI_D0/PSSI_D0                                 ,                       ,EVENTOUT,
+PortC,PC7 ,TRGIO        ,                   ,TIM3_CH2                      ,TIM8_CH2                            ,                                                   ,                                                      ,I2S3_MCK                                                ,USART6_RX                                                    ,SDMMC1_D123DIR                    ,FMC_NE1                                                              ,SDMMC2_D7                                    ,OCTOSPI1_IO6                                           ,SDMMC1_D7                                                   ,DCMI_D1/PSSI_D1                                 ,                       ,EVENTOUT,
+PortC,PC8 ,TRACED1      ,                   ,TIM3_CH3                      ,TIM8_CH3                            ,                                                   ,                                                      ,                                                        ,USART6_CK                                                    ,UART5_RTS                         ,FMC_NE2/FMC_NCE                                                      ,FMC_INT                                      ,FMC_ALE                                                ,SDMMC1_D0                                                   ,DCMI_D2/PSSI_D2                                 ,                       ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                   ,TIM3_CH4                      ,TIM8_CH4                            ,I2C3_SDA                                           ,AUDIOCLK                                              ,                                                        ,                                                             ,UART5_CTS                         ,OCTOSPI1_IO0                                                         ,                                             ,FMC_CLE                                                ,SDMMC1_D1                                                   ,DCMI_D3/PSSI_D3                                 ,                       ,EVENTOUT,
+PortC,PC10,             ,                   ,LPTIM3_ETR                    ,                                    ,                                                   ,                                                      ,SPI3_SCK/I2S3_CK                                        ,USART3_TX                                                    ,UART4_TX                          ,OCTOSPI1_IO1                                                         ,                                             ,ETH_MII_TXD0/ETH_RMII_TXD0                             ,SDMMC1_D2                                                   ,DCMI_D8/PSSI_D8                                 ,                       ,EVENTOUT,
+PortC,PC11,             ,                   ,LPTIM3_IN1                    ,                                    ,                                                   ,                                                      ,SPI3_MISO/I2S3_SDI                                      ,USART3_RX                                                    ,UART4_RX                          ,OCTOSPI1_NCS                                                         ,                                             ,                                                       ,SDMMC1_D3                                                   ,DCMI_D4/PSSI_D4                                 ,                       ,EVENTOUT,
+PortC,PC12,TRACED3      ,                   ,TIM15_CH1                     ,                                    ,                                                   ,SPI6_SCK                                              ,SPI3_MOSI/I2S3_SDO                                      ,USART3_CK                                                    ,UART5_TX                          ,                                                                     ,                                             ,                                                       ,SDMMC1_CK                                                   ,DCMI_D9/PSSI_D9                                 ,                       ,EVENTOUT,
+PortC,PC13,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortC,PC14,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortC,PC15,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortD,PD0 ,             ,                   ,                              ,TIM8_CH4N                           ,                                                   ,                                                      ,                                                        ,                                                             ,UART4_RX                          ,FDCAN1_RX                                                            ,                                             ,UART9_CTS                                              ,FMC_D2/FMC_AD2                                              ,                                                ,                       ,EVENTOUT,
+PortD,PD1 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,UART4_TX                          ,FDCAN1_TX                                                            ,                                             ,                                                       ,FMC_D3/FMC_AD3                                              ,                                                ,                       ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                   ,TIM3_ETR                      ,                                    ,TIM15_BKIN                                         ,                                                      ,                                                        ,                                                             ,UART5_RX                          ,                                                                     ,                                             ,                                                       ,SDMMC1_CMD                                                  ,DCMI_D11/PSSI_D11                               ,LPTIM4_ETR             ,EVENTOUT,
+PortD,PD3 ,             ,                   ,                              ,                                    ,                                                   ,SPI2_SCK/I2S2_CK                                      ,                                                        ,USART2_CTS/USART2_NSS                                        ,                                  ,                                                                     ,                                             ,                                                       ,FMC_CLK                                                     ,DCMI_D5/PSSI_D5                                 ,                       ,EVENTOUT,
+PortD,PD4 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,USART2_RTS                                                   ,                                  ,                                                                     ,OCTOSPI1_IO4                                 ,                                                       ,FMC_NOE                                                     ,                                                ,                       ,EVENTOUT,
+PortD,PD5 ,             ,TIM1_CH4N          ,                              ,                                    ,                                                   ,SPI2_RDY                                              ,                                                        ,USART2_TX                                                    ,                                  ,FDCAN1_TX                                                            ,OCTOSPI1_IO5                                 ,                                                       ,FMC_NWE                                                     ,                                                ,                       ,EVENTOUT,
+PortD,PD6 ,             ,                   ,SAI1_D1                       ,                                    ,                                                   ,SPI3_MOSI/I2S3_SDO                                    ,SAI1_SD_A                                               ,USART2_RX                                                    ,                                  ,                                                                     ,OCTOSPI1_IO6                                 ,SDMMC2_CK                                              ,FMC_NWAIT                                                   ,DCMI_D10/PSSI_D10                               ,                       ,EVENTOUT,
+PortD,PD7 ,             ,                   ,                              ,                                    ,                                                   ,SPI1_MOSI/I2S1_SDO                                    ,                                                        ,USART2_CK                                                    ,                                  ,                                                                     ,OCTOSPI1_IO7                                 ,SDMMC2_CMD                                             ,FMC_NE1/FMC_NCE                                             ,                                                ,LPTIM4_OUT             ,EVENTOUT,
+PortD,PD8 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,USART3_TX                                                    ,                                  ,                                                                     ,                                             ,                                                       ,FMC_D13/FMC_AD13                                            ,                                                ,                       ,EVENTOUT,
+PortD,PD9 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,USART3_RX                                                    ,                                  ,FDCAN2_RX                                                            ,                                             ,                                                       ,FMC_D14/FMC_AD14                                            ,                                                ,                       ,EVENTOUT,
+PortD,PD10,             ,                   ,                              ,LPTIM2_CH2                          ,                                                   ,                                                      ,                                                        ,USART3_CK                                                    ,                                  ,                                                                     ,                                             ,                                                       ,FMC_D15/FMC_AD15                                            ,                                                ,                       ,EVENTOUT,
+PortD,PD11,             ,                   ,SAI1_CK1                      ,LPTIM2_IN2                          ,I2C4_SMBA                                          ,                                                      ,                                                        ,USART3_CTS/USART3_NSS                                        ,UART4_RX                          ,OCTOSPI1_IO0                                                         ,SAI2_SD_A                                    ,                                                       ,FMC_A16/FMC_CLE                                             ,                                                ,                       ,EVENTOUT,
+PortD,PD12,             ,LPTIM1_IN1         ,TIM4_CH1                      ,LPTIM2_IN1                          ,I2C4_SCL                                           ,I3C1_SCL                                              ,SAI1_D1                                                 ,USART3_RTS                                                   ,UART4_TX                          ,OCTOSPI1_IO1                                                         ,SAI2_FS_A                                    ,                                                       ,FMC_A17/FMC_ALE                                             ,DCMI_D12/PSSI_D12                               ,                       ,EVENTOUT,
+PortD,PD13,             ,LPTIM1_CH1         ,TIM4_CH2                      ,LPTIM2_CH1                          ,I2C4_SDA                                           ,I3C1_SDA                                              ,                                                        ,                                                             ,                                  ,OCTOSPI1_IO3                                                         ,SAI2_SCK_A                                   ,UART9_RTS                                              ,FMC_A18                                                     ,DCMI_D13/PSSI_D13                               ,LPTIM4_IN1             ,EVENTOUT,
+PortD,PD14,             ,                   ,TIM4_CH3                      ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,UART8_CTS                         ,                                                                     ,                                             ,UART9_RX                                               ,FMC_D0/FMC_AD0                                              ,                                                ,                       ,EVENTOUT,
+PortD,PD15,             ,                   ,TIM4_CH4                      ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,UART8_RTS                         ,                                                                     ,                                             ,UART9_TX                                               ,FMC_D1/FMC_AD1                                              ,                                                ,                       ,EVENTOUT,
+PortE,PE0 ,             ,LPTIM1_ETR         ,TIM4_ETR                      ,LPTIM2_CH2                          ,LPTIM2_ETR                                         ,                                                      ,SPI3_RDY                                                ,                                                             ,UART8_RX                          ,FDCAN1_RX                                                            ,SAI2_MCLK_A                                  ,                                                       ,FMC_NBL0                                                    ,DCMI_D2/PSSI_D2                                 ,                       ,EVENTOUT,
+PortE,PE1 ,             ,LPTIM1_IN2         ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,UART8_TX                          ,FDCAN1_TX                                                            ,                                             ,                                                       ,FMC_NBL1                                                    ,DCMI_D3/PSSI_D3                                 ,                       ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,LPTIM1_IN2         ,SAI1_CK1                      ,                                    ,                                                   ,SPI4_SCK                                              ,SAI1_MCLK_A                                             ,USART10_RX                                                   ,UART8_TX                          ,OCTOSPI1_IO2                                                         ,                                             ,ETH_MII_TXD3                                           ,FMC_A23                                                     ,DCMI_D3/PSSI_D3                                 ,                       ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                   ,                              ,                                    ,TIM15_BKIN                                         ,                                                      ,SAI1_SD_B                                               ,USART10_TX                                                   ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A19                                                     ,                                                ,                       ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                   ,SAI1_D2                       ,                                    ,TIM15_CH1N                                         ,SPI4_NSS                                              ,SAI1_FS_A                                               ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A20                                                     ,DCMI_D4/PSSI_D4                                 ,                       ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                   ,SAI1_CK2                      ,                                    ,TIM15_CH1                                          ,SPI4_MISO                                             ,SAI1_SCK_A                                              ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A21                                                     ,DCMI_D6/PSSI_D6                                 ,                       ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,TIM1_BKIN2         ,SAI1_D1                       ,                                    ,TIM15_CH2                                          ,SPI4_MOSI                                             ,SAI1_SD_A                                               ,                                                             ,                                  ,                                                                     ,SAI2_MCLK_B                                  ,                                                       ,FMC_A22                                                     ,DCMI_D7/PSSI_D7                                 ,                       ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR           ,                              ,                                    ,                                                   ,                                                      ,UART12_RTS                                              ,UART7_RX                                                     ,                                  ,                                                                     ,OCTOSPI1_IO4                                 ,                                                       ,FMC_D4/FMC_AD4                                              ,                                                ,                       ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N          ,                              ,                                    ,                                                   ,                                                      ,UART12_CTS/UART12_NSS                                   ,UART7_TX                                                     ,                                  ,                                                                     ,OCTOSPI1_IO5                                 ,                                                       ,FMC_D5/FMC_AD5                                              ,                                                ,                       ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1           ,                              ,                                    ,                                                   ,                                                      ,UART12_RX                                               ,UART7_RTS                                                    ,                                  ,                                                                     ,OCTOSPI1_IO6                                 ,                                                       ,FMC_D6/FMC_AD6                                              ,                                                ,                       ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N          ,                              ,                                    ,                                                   ,                                                      ,UART12_TX                                               ,UART7_CTS                                                    ,                                  ,                                                                     ,OCTOSPI1_IO7                                 ,                                                       ,FMC_D7/FMC_AD7                                              ,                                                ,                       ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2           ,                              ,                                    ,SPI1_RDY                                           ,SPI4_NSS                                              ,OCTOSPI1_NCS                                            ,                                                             ,                                  ,                                                                     ,SAI2_SD_B                                    ,                                                       ,FMC_D8/FMC_AD8                                              ,                                                ,                       ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N          ,                              ,                                    ,                                                   ,SPI4_SCK                                              ,                                                        ,                                                             ,                                  ,                                                                     ,SAI2_SCK_B                                   ,                                                       ,FMC_D9/FMC_AD9                                              ,                                                ,                       ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3           ,                              ,                                    ,                                                   ,SPI4_MISO                                             ,                                                        ,                                                             ,                                  ,                                                                     ,SAI2_FS_B                                    ,                                                       ,FMC_D10/FMC_AD10                                            ,                                                ,                       ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4           ,                              ,                                    ,                                                   ,SPI4_MOSI                                             ,                                                        ,                                                             ,                                  ,                                                                     ,SAI2_MCLK_B                                  ,                                                       ,FMC_D11/FMC_AD11                                            ,                                                ,                       ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN          ,                              ,TIM1_CH4N                           ,                                                   ,                                                      ,                                                        ,USART10_CK                                                   ,                                  ,                                                                     ,                                             ,                                                       ,FMC_D12/FMC_AD12                                            ,                                                ,                       ,EVENTOUT,
+PortF,PF0 ,             ,                   ,                              ,                                    ,I2C2_SDA                                           ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A0                                                      ,LPTIM5_CH1                                      ,                       ,EVENTOUT,
+PortF,PF1 ,             ,                   ,                              ,                                    ,I2C2_SCL                                           ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A1                                                      ,LPTIM5_CH2                                      ,                       ,EVENTOUT,
+PortF,PF2 ,             ,                   ,LPTIM3_CH2                    ,LPTIM3_IN2                          ,I2C2_SMBA                                          ,                                                      ,UART12_TX                                               ,USART11_CK                                                   ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A2                                                      ,LPTIM5_IN1                                      ,                       ,EVENTOUT,
+PortF,PF3 ,             ,                   ,LPTIM3_IN1                    ,                                    ,                                                   ,                                                      ,                                                        ,USART11_TX                                                   ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A3                                                      ,LPTIM5_IN2                                      ,                       ,EVENTOUT,
+PortF,PF4 ,             ,                   ,LPTIM3_ETR                    ,                                    ,                                                   ,                                                      ,                                                        ,USART11_RX                                                   ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A4                                                      ,                                                ,                       ,EVENTOUT,
+PortF,PF5 ,             ,                   ,LPTIM3_CH1                    ,                                    ,I2C4_SCL                                           ,I3C1_SCL                                              ,UART12_RX                                               ,USART11_CTS/USART11_NSS                                      ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A5                                                      ,                                                ,LPTIM3_IN1             ,EVENTOUT,
+PortF,PF6 ,             ,TIM16_CH1          ,                              ,                                    ,                                                   ,SPI5_NSS                                              ,SAI1_SD_B                                               ,UART7_RX                                                     ,                                  ,                                                                     ,OCTOSPI1_IO3                                 ,                                                       ,                                                            ,LPTIM5_CH1                                      ,                       ,EVENTOUT,
+PortF,PF7 ,             ,TIM17_CH1          ,                              ,                                    ,                                                   ,SPI5_SCK                                              ,SAI1_MCLK_B                                             ,UART7_TX                                                     ,                                  ,                                                                     ,OCTOSPI1_IO2                                 ,                                                       ,                                                            ,LPTIM5_CH2                                      ,                       ,EVENTOUT,
+PortF,PF8 ,             ,TIM16_CH1N         ,                              ,                                    ,                                                   ,SPI5_MISO                                             ,SAI1_SCK_B                                              ,UART7_RTS                                                    ,                                  ,TIM13_CH1                                                            ,OCTOSPI1_IO0                                 ,                                                       ,                                                            ,LPTIM5_IN1                                      ,                       ,EVENTOUT,
+PortF,PF9 ,             ,TIM17_CH1N         ,                              ,                                    ,                                                   ,SPI5_MOSI                                             ,SAI1_FS_B                                               ,UART7_CTS                                                    ,                                  ,TIM14_CH1                                                            ,OCTOSPI1_IO1                                 ,                                                       ,                                                            ,LPTIM5_IN2                                      ,                       ,EVENTOUT,
+PortF,PF10,             ,TIM16_BKIN         ,SAI1_D3                       ,                                    ,PSSI_D15                                           ,                                                      ,                                                        ,                                                             ,                                  ,OCTOSPI1_CLK                                                         ,                                             ,                                                       ,                                                            ,DCMI_D11/PSSI_D11                               ,                       ,EVENTOUT,
+PortF,PF11,             ,                   ,                              ,                                    ,                                                   ,SPI5_MOSI                                             ,                                                        ,                                                             ,                                  ,OCTOSPI1_NCLK                                                        ,SAI2_SD_B                                    ,                                                       ,FMC_NRAS                                                    ,DCMI_D12/PSSI_D12                               ,LPTIM6_CH1             ,EVENTOUT,ADC1_INP2
+PortF,PF12,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A6                                                      ,                                                ,LPTIM6_CH2             ,EVENTOUT,ADC1_INP6/ADC1_INN2
+PortF,PF13,             ,                   ,                              ,                                    ,I2C4_SMBA                                          ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A7                                                      ,                                                ,LPTIM6_IN1             ,EVENTOUT,ADC2_INP2
+PortF,PF14,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A8                                                      ,                                                ,LPTIM6_IN2             ,EVENTOUT,ADC2_INP6/ADC2_INN2
+PortF,PF15,             ,                   ,                              ,                                    ,I2C4_SDA                                           ,I3C1_SDA                                              ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A9                                                      ,                                                ,                       ,EVENTOUT,
+PortG,PG0 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,UART9_RX                                               ,FMC_A10                                                     ,                                                ,LPTIM4_IN1             ,EVENTOUT,
+PortG,PG1 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,SPI2_MOSI/I2S2_SDO                                           ,                                  ,                                                                     ,                                             ,UART9_TX                                               ,FMC_A11                                                     ,                                                ,                       ,EVENTOUT,
+PortG,PG2 ,             ,                   ,                              ,TIM8_BKIN                           ,                                                   ,                                                      ,                                                        ,UART12_RX                                                    ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A12                                                     ,                                                ,LPTIM6_ETR             ,EVENTOUT,
+PortG,PG3 ,             ,                   ,                              ,TIM8_BKIN2                          ,                                                   ,                                                      ,                                                        ,UART12_TX                                                    ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A13                                                     ,LPTIM5_ETR                                      ,                       ,EVENTOUT,
+PortG,PG4 ,             ,TIM1_BKIN2         ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A14/FMC_BA0                                             ,                                                ,LPTIM4_ETR             ,EVENTOUT,
+PortG,PG5 ,             ,TIM1_ETR           ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,FMC_A15/FMC_BA1                                             ,                                                ,                       ,EVENTOUT,
+PortG,PG6 ,             ,TIM17_BKIN         ,                              ,I3C1_SDA                            ,I2C4_SDA                                           ,SPI1_RDY                                              ,                                                        ,                                                             ,                                  ,                                                                     ,OCTOSPI1_NCS                                 ,UCPD1_FRSTX                                            ,FMC_NE3                                                     ,DCMI_D12/PSSI_D12                               ,                       ,EVENTOUT,
+PortG,PG7 ,             ,                   ,SAI1_CK2                      ,I3C1_SCL                            ,I2C4_SCL                                           ,                                                      ,SAI1_MCLK_A                                             ,USART6_CK                                                    ,                                  ,                                                                     ,                                             ,UCPD1_FRSTX                                            ,FMC_INT                                                     ,DCMI_D13/PSSI_D13                               ,                       ,EVENTOUT,
+PortG,PG8 ,             ,                   ,                              ,TIM8_ETR                            ,                                                   ,SPI6_NSS                                              ,                                                        ,USART6_RTS                                                   ,                                  ,                                                                     ,                                             ,ETH_PPS_OUT                                            ,FMC_SDCLK                                                   ,                                                ,                       ,EVENTOUT,
+PortG,PG9 ,             ,                   ,                              ,                                    ,                                                   ,SPI1_MISO/I2S1_SDI                                    ,                                                        ,USART6_RX                                                    ,                                  ,OCTOSPI1_IO6                                                         ,SAI2_FS_B                                    ,SDMMC2_D0                                              ,FMC_NE2/FMC_NCE                                             ,DCMI_VSYNC/PSSI_RDY                             ,                       ,EVENTOUT,
+PortG,PG10,             ,                   ,                              ,                                    ,                                                   ,SPI1_NSS/I2S1_WS                                      ,                                                        ,                                                             ,                                  ,                                                                     ,SAI2_SD_B                                    ,SDMMC2_D1                                              ,FMC_NE3                                                     ,DCMI_D2/PSSI_D2                                 ,                       ,EVENTOUT,
+PortG,PG11,             ,LPTIM1_IN2         ,                              ,                                    ,                                                   ,SPI1_SCK/I2S1_CK                                      ,USART10_RX                                              ,USART11_RTS                                                  ,                                  ,                                                                     ,SDMMC2_D2                                    ,ETH_MII_TX_EN/ETH_RMII_TX_EN                           ,                                                            ,DCMI_D3/PSSI_D3                                 ,                       ,EVENTOUT,
+PortG,PG12,             ,LPTIM1_IN1         ,                              ,                                    ,PSSI_D15                                           ,SPI6_MISO                                             ,USART10_TX                                              ,USART6_RTS                                                   ,                                  ,                                                                     ,SDMMC2_D3                                    ,ETH_MII_TXD1/ETH_RMII_TXD1                             ,FMC_NE4                                                     ,DCMI_D11/PSSI_D11                               ,LPTIM5_CH1             ,EVENTOUT,
+PortG,PG13,TRACED0      ,LPTIM1_CH1         ,                              ,                                    ,                                                   ,SPI6_SCK                                              ,USART10_CTS/USART10_NSS                                 ,USART6_CTS/USART6_NSS                                        ,                                  ,                                                                     ,SDMMC2_D6                                    ,ETH_MII_TXD0/ETH_RMII_TXD0                             ,FMC_A24                                                     ,LPTIM5_CH2                                      ,                       ,EVENTOUT,
+PortG,PG14,TRACED1      ,LPTIM1_ETR         ,                              ,                                    ,LPTIM1_CH2                                         ,SPI6_MOSI                                             ,USART10_RTS                                             ,USART6_TX                                                    ,                                  ,OCTOSPI1_IO7                                                         ,SDMMC2_D7                                    ,ETH_MII_TXD1/ETH_RMII_TXD1                             ,FMC_A25                                                     ,LPTIM5_IN1                                      ,                       ,EVENTOUT,
+PortG,PG15,             ,                   ,                              ,                                    ,                                                   ,SPI4_RDY                                              ,USART10_CK                                              ,USART6_CTS/USART6_NSS                                        ,                                  ,                                                                     ,                                             ,                                                       ,FMC_NCAS                                                    ,DCMI_D13/PSSI_D13                               ,                       ,EVENTOUT,
+PortH,PH0 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortH,PH1 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortH,PH2 ,             ,LPTIM1_IN2         ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,OCTOSPI1_IO4                                                         ,SAI2_SCK_B                                   ,ETH_MII_CRS                                            ,FMC_SDCKE0                                                  ,                                                ,                       ,EVENTOUT,
+PortH,PH3 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,OCTOSPI1_IO5                                                         ,SAI2_MCLK_B                                  ,ETH_MII_COL                                            ,FMC_SDNE0                                                   ,                                                ,                       ,EVENTOUT,
+PortH,PH4 ,             ,                   ,                              ,                                    ,I2C2_SCL                                           ,SPI5_RDY                                              ,                                                        ,SPI6_RDY                                                     ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,PSSI_D14                                        ,                       ,EVENTOUT,
+PortH,PH5 ,             ,                   ,                              ,                                    ,I2C2_SDA                                           ,SPI5_NSS                                              ,                                                        ,SPI6_RDY                                                     ,                                  ,                                                                     ,                                             ,                                                       ,FMC_SDNWE                                                   ,                                                ,                       ,EVENTOUT,
+PortH,PH6 ,             ,TIM1_CH3N          ,TIM12_CH1                     ,TIM8_CH1                            ,I2C2_SMBA                                          ,SPI5_SCK                                              ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,ETH_MII_RXD2                                           ,FMC_SDNE1                                                   ,DCMI_D8/PSSI_D8                                 ,                       ,EVENTOUT,
+PortH,PH7 ,             ,TIM1_CH3           ,                              ,TIM8_CH1N                           ,I2C3_SCL                                           ,SPI5_MISO                                             ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,ETH_MII_RXD3                                           ,FMC_SDCKE1                                                  ,DCMI_D9/PSSI_D9                                 ,                       ,EVENTOUT,
+PortH,PH8 ,             ,TIM1_CH2N          ,TIM5_ETR                      ,TIM8_CH2                            ,I2C3_SDA                                           ,SPI5_MOSI                                             ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_HSYNC/PSSI_DE                              ,                       ,EVENTOUT,
+PortH,PH9 ,             ,TIM1_CH2           ,TIM12_CH2                     ,TIM8_CH2N                           ,I2C3_SMBA                                          ,SPI5_NSS                                              ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_D0/PSSI_D0                                 ,                       ,EVENTOUT,
+PortH,PH10,             ,TIM1_CH1N          ,TIM5_CH1                      ,TIM8_CH3                            ,I2C4_SMBA                                          ,SPI5_RDY                                              ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_D1/PSSI_D1                                 ,                       ,EVENTOUT,
+PortH,PH11,             ,TIM1_CH1           ,TIM5_CH2                      ,TIM8_CH3N                           ,I2C4_SCL                                           ,I3C1_SCL                                              ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_D2/PSSI_D2                                 ,                       ,EVENTOUT,
+PortH,PH12,             ,TIM1_BKIN          ,TIM5_CH3                      ,TIM8_BKIN                           ,I2C4_SDA                                           ,I3C1_SDA                                              ,                                                        ,                                                             ,                                  ,                                                                     ,TIM8_CH4N                                    ,                                                       ,                                                            ,DCMI_D3/PSSI_D3                                 ,                       ,EVENTOUT,
+PortH,PH13,             ,LPTIM1_IN2         ,                              ,TIM8_CH1N                           ,                                                   ,                                                      ,                                                        ,UART8_TX                                                     ,UART4_TX                          ,FDCAN1_TX                                                            ,                                             ,                                                       ,                                                            ,DCMI_D3/PSSI_D3                                 ,                       ,EVENTOUT,
+PortH,PH14,             ,                   ,                              ,TIM8_CH2N                           ,                                                   ,                                                      ,                                                        ,                                                             ,UART4_RX                          ,FDCAN1_RX                                                            ,                                             ,                                                       ,                                                            ,DCMI_D4/PSSI_D4                                 ,                       ,EVENTOUT,
+PortH,PH15,             ,                   ,                              ,TIM8_CH3N                           ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_D11/PSSI_D11                               ,                       ,EVENTOUT,
+PortI,PI0 ,             ,                   ,TIM5_CH4                      ,                                    ,                                                   ,SPI2_NSS/I2S2_WS                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_D13/PSSI_D13                               ,                       ,EVENTOUT,
+PortI,PI1 ,             ,                   ,                              ,TIM8_BKIN2                          ,                                                   ,SPI2_SCK/I2S2_CK                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_D8/PSSI_D8                                 ,                       ,EVENTOUT,
+PortI,PI2 ,             ,                   ,                              ,TIM8_CH4                            ,                                                   ,SPI2_MISO/I2S2_SDI                                    ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_D9/PSSI_D9                                 ,                       ,EVENTOUT,
+PortI,PI3 ,             ,                   ,                              ,TIM8_ETR                            ,                                                   ,SPI2_MOSI/I2S2_SDO                                    ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,DCMI_D10/PSSI_D10                               ,                       ,EVENTOUT,
+PortI,PI4 ,             ,                   ,                              ,TIM8_BKIN                           ,                                                   ,                                                      ,                                                        ,SPI2_RDY                                                     ,                                  ,                                                                     ,SAI2_MCLK_A                                  ,                                                       ,                                                            ,DCMI_D5/PSSI_D5                                 ,                       ,EVENTOUT,
+PortI,PI5 ,             ,                   ,                              ,TIM8_CH1                            ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,SAI2_SCK_A                                   ,                                                       ,                                                            ,DCMI_VSYNC/PSSI_RDY                             ,                       ,EVENTOUT,
+PortI,PI6 ,             ,                   ,                              ,TIM8_CH2                            ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,SAI2_SD_A                                    ,                                                       ,                                                            ,DCMI_D6/PSSI_D6                                 ,                       ,EVENTOUT,
+PortI,PI7 ,             ,                   ,                              ,TIM8_CH3                            ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,SAI2_FS_A                                    ,                                                       ,                                                            ,DCMI_D7/PSSI_D7                                 ,                       ,EVENTOUT,
+PortI,PI8 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortI,PI9 ,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,UART4_RX                          ,FDCAN1_RX                                                            ,                                             ,                                                       ,                                                            ,                                                ,                       ,EVENTOUT,
+PortI,PI10,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,FDCAN1_RX                                                            ,                                             ,ETH_MII_RX_ER                                          ,                                                            ,PSSI_D14                                        ,                       ,EVENTOUT,
+PortI,PI11,             ,                   ,                              ,                                    ,                                                   ,                                                      ,                                                        ,                                                             ,                                  ,                                                                     ,                                             ,                                                       ,                                                            ,PSSI_D15                                        ,                       ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32h723_af.csv b/ports/stm32/boards/stm32h723_af.csv
index 701e9381b2..aa87379786 100644
--- a/ports/stm32/boards/stm32h723_af.csv
+++ b/ports/stm32/boards/stm32h723_af.csv
@@ -1,116 +1,116 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,FMC/LPTIM1/SAI4/TIM16/17/TIM1x/TIM2x,FDCAN3/PDM_SAI1/TIM3/4/5/12/15,DFSDM1/LCD/LPTIM2/3/4/5/LPUART1/OCTOSPIM_P1/2/TIM8,CEC/DCMI/PSSI/DFSDM1/I2C1/2/3/4/5/LPTIM2/OCTOSPIM_P1/TIM15/USART1/10,CEC/FDCAN3/SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/6,DFSDM1/I2C4/5/OCTOSPIM_P1/SAI1/SPI3/I2S3/UART4,SDMMC1/SPI2/I2S2/SPI3/I2S3/SPI6/UART7/USART1/2/3/6,LPUART1/SAI4/SDMMC1/SPDIFRX1/SPI6/UART4/5/8,FDCAN1/2/FMC/LCD/OCTOSPIM_P1/2/SAI4/SDMMC2/SPDIFRX1/TIM13/14,CRS/FMC/LCD/OCTOSPIM_P1/OTG1_FS/OTG1_HS/SAI4/SDMMC2/TIM8,DFSDM1/ETH/I2C4/LCD/MDIOS/OCTOSPIM_P1/SDMMC2/SWPMI1/TIM1x/TIM8/UART7/9/USART10,FMC/LCD/MDIOS/OCTOSPIM_P1/SDMMC1/TIM1x/TIM8,COMP/DCMI/PSSI/LCD/TIM1x/TIM23,LCD/TIM24/UART5,SYS,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,TIM15_BKIN,SPI6_NSS/I2S6_WS,,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI4_SD_B,ETH_MII_CRS,FMC_A19,,,EVENTOUT,ADC1_INP16
-PortA,PA1,,TIM2_CH2,TIM5_CH2,LPTIM3_OUT,TIM15_CH1N,,,USART2_RTS/USART2_DE,UART4_RX,OCTOSPIM_P1_IO3,SAI4_MCLK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,OCTOSPIM_P1_DQS,,LCD_R2,EVENTOUT,ADC1_INP17/ADC1_INN16
-PortA,PA2,,TIM2_CH3,TIM5_CH3,LPTIM4_OUT,TIM15_CH1,,OCTOSPIM_P1_IO0,USART2_TX,SAI4_SCK_B,,,ETH_MDIO,MDIOS_MDIO,,LCD_R1,EVENTOUT,ADC12_INP14
-PortA,PA3,,TIM2_CH4,TIM5_CH4,LPTIM5_OUT,TIM15_CH2,I2S6_MCK,OCTOSPIM_P1_IO2,USART2_RX,,LCD_B2,OTG_HS_ULPI_D0,ETH_MII_COL,OCTOSPIM_P1_CLK,,LCD_B5,EVENTOUT,ADC12_INP15
-PortA,PA4,D1PWREN,,TIM5_ETR,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,SPI6_NSS/I2S6_WS,,,,FMC_D8/FMC_AD8,DCMI_HSYNC/PSSI_DE,LCD_VSYNC,EVENTOUT,ADC12_INP18
-PortA,PA5,D2PWREN,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,SPI6_SCK/I2S6_CK,,OTG_HS_ULPI_CK,,FMC_D9/FMC_AD9,PSSI_D14,LCD_R4,EVENTOUT,ADC12_INP19/ADC12_INN18
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO/I2S1_SDI,OCTOSPIM_P1_IO3,,SPI6_MISO/I2S6_SDI,TIM13_CH1,TIM8_BKIN_COMP12,MDIOS_MDC,TIM1_BKIN_COMP12,DCMI_PIXCLK/PSSI_PDCK,LCD_G2,EVENTOUT,ADC12_INP3
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SDO,,,SPI6_MOSI/I2S6_SDO,TIM14_CH1,OCTOSPIM_P1_IO2,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,LCD_VSYNC,EVENTOUT,ADC12_INP7/ADC12_INN3
-PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,I2C5_SCL,USART1_CK,,,OTG_HS_SOF,UART7_RX,TIM8_BKIN2_COMP12,LCD_B3,LCD_R6,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,LPUART1_TX,I2C3_SMBA,SPI2_SCK/I2S2_CK,I2C5_SMBA,USART1_TX,,,,ETH_TX_ER,,DCMI_D0/PSSI_D0,LCD_R5,EVENTOUT,
-PortA,PA10,,TIM1_CH3,,LPUART1_RX,,,,USART1_RX,,,OTG_HS_ID,MDIOS_MDIO,LCD_B4,DCMI_D1/PSSI_D1,LCD_B1,EVENTOUT,
-PortA,PA11,,TIM1_CH4,,LPUART1_CTS,,SPI2_NSS/I2S2_WS,UART4_RX,USART1_CTS/USART1_NSS,,FDCAN1_RX,,,,,LCD_R4,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,LPUART1_RTS/LPUART1_DE,,SPI2_SCK/I2S2_CK,UART4_TX,USART1_RTS/USART1_DE,SAI4_FS_B,FDCAN1_TX,,,TIM1_BKIN2,,LCD_R5,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,SPI6_NSS/I2S6_WS,UART4_RTS/UART4_DE,LCD_R3,,UART7_TX,,,LCD_B6,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,OCTOSPIM_P1_IO1,,DFSDM1_CKOUT,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,LCD_G1,EVENTOUT,ADC12_INP9/ADC12_INN5
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,OCTOSPIM_P1_IO0,,DFSDM1_DATIN1,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,LCD_G0,EVENTOUT,ADC12_INP5
-PortB,PB2,RTC_OUT,SAI4_D1,SAI1_D1,,DFSDM1_CKIN1,,SAI1_SD_A,SPI3_MOSI/I2S3_SDO,SAI4_SD_A,OCTOSPIM_P1_CLK,OCTOSPIM_P1_DQS,ETH_TX_ER,,TIM23_ETR,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,SPI6_SCK/I2S6_CK,SDMMC2_D2,CRS_SYNC,UART7_RX,,,TIM24_ETR,EVENTOUT,
-PortB,PB4,NJTRST,TIM16_BKIN,TIM3_CH1,,,SPI1_MISO/I2S1_SDI,SPI3_MISO/I2S3_SDI,SPI2_NSS/I2S2_WS,SPI6_MISO/I2S6_SDI,SDMMC2_D3,,UART7_TX,,,,EVENTOUT,
-PortB,PB5,,TIM17_BKIN,TIM3_CH2,LCD_B5,I2C1_SMBA,SPI1_MOSI/I2S1_SDO,I2C4_SMBA,SPI3_MOSI/I2S3_SDO,SPI6_MOSI/I2S6_SDO,FDCAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10/PSSI_D10,UART5_RX,EVENTOUT,
-PortB,PB6,,TIM16_CH1N,TIM4_CH1,,I2C1_SCL,CEC,I2C4_SCL,USART1_TX,LPUART1_TX,FDCAN2_TX,OCTOSPIM_P1_NCS,DFSDM1_DATIN5,FMC_SDNE1,DCMI_D5/PSSI_D5,UART5_TX,EVENTOUT,
-PortB,PB7,,TIM17_CH1N,TIM4_CH2,,I2C1_SDA,,I2C4_SDA,USART1_RX,LPUART1_RX,,,DFSDM1_CKIN5,FMC_NL,DCMI_VSYNC/PSSI_RDY,,EVENTOUT,
-PortB,PB8,,TIM16_CH1,TIM4_CH3,DFSDM1_CKIN7,I2C1_SCL,,I2C4_SCL,SDMMC1_CKIN,UART4_RX,FDCAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6/PSSI_D6,LCD_B6,EVENTOUT,
-PortB,PB9,,TIM17_CH1,TIM4_CH4,DFSDM1_DATIN7,I2C1_SDA,SPI2_NSS/I2S2_WS,I2C4_SDA,SDMMC1_CDIR,UART4_TX,FDCAN1_TX,SDMMC2_D5,I2C4_SMBA,SDMMC1_D5,DCMI_D7/PSSI_D7,LCD_B7,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,LPTIM2_IN1,I2C2_SCL,SPI2_SCK/I2S2_CK,DFSDM1_DATIN7,USART3_TX,,OCTOSPIM_P1_NCS,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,LPTIM2_ETR,I2C2_SDA,,DFSDM1_CKIN7,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,OCTOSPIM_P1_NCLK,I2C2_SMBA,SPI2_NSS/I2S2_WS,DFSDM1_DATIN1,USART3_CK,,FDCAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OCTOSPIM_P1_IO0,TIM1_BKIN_COMP12,UART5_RX,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,LPTIM2_OUT,OCTOSPIM_P1_IO2,SPI2_SCK/I2S2_CK,DFSDM1_CKIN1,USART3_CTS/USART3_NSS,,FDCAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,SDMMC1_D0,DCMI_D2/PSSI_D2,UART5_TX,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,TIM12_CH1,TIM8_CH2N,USART1_TX,SPI2_MISO/I2S2_SDI,DFSDM1_DATIN2,USART3_RTS/USART3_DE,UART4_RTS/UART4_DE,SDMMC2_D0,,,FMC_D10/FMC_AD10,,LCD_CLK,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,TIM12_CH2,TIM8_CH3N,USART1_RX,SPI2_MOSI/I2S2_SDO,DFSDM1_CKIN2,,UART4_CTS,SDMMC2_D1,,,FMC_D11/FMC_AD11,,LCD_G7,EVENTOUT,
-PortC,PC0,,FMC_D12/FMC_AD12,,DFSDM1_CKIN0,,,DFSDM1_DATIN4,,SAI4_FS_B,FMC_A25,OTG_HS_ULPI_STP,LCD_G2,FMC_SDNWE,,LCD_R5,EVENTOUT,ADC123_INP10
-PortC,PC1,TRACED0,SAI4_D1,SAI1_D1,DFSDM1_DATIN0,DFSDM1_CKIN4,SPI2_MOSI/I2S2_SDO,SAI1_SD_A,,SAI4_SD_A,SDMMC2_CK,OCTOSPIM_P1_IO4,ETH_MDC,MDIOS_MDC,,LCD_G5,EVENTOUT,ADC123_INP11/ADC123_INN10
-PortC,PC2,PWR_DEEPSLEEP,,,DFSDM1_CKIN1,OCTOSPIM_P1_IO5,SPI2_MISO/I2S2_SDI,DFSDM1_CKOUT,,,OCTOSPIM_P1_IO2,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_INP12/ADC123_INN11
-PortC,PC3,PWR_SLEEP,,,DFSDM1_DATIN1,OCTOSPIM_P1_IO6,SPI2_MOSI/I2S2_SDO,,,,OCTOSPIM_P1_IO0,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_INP13/ADC123_INN12
-PortC,PC4,PWR_DEEPSLEEP,FMC_A22,,DFSDM1_CKIN2,,I2S1_MCK,,,,SPDIFRX1_IN3,SDMMC2_CKIN,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,LCD_R7,EVENTOUT,ADC12_INP4
-PortC,PC5,PWR_SLEEP,SAI4_D3,SAI1_D3,DFSDM1_DATIN2,PSSI_D15,,,,,SPDIFRX1_IN4,OCTOSPIM_P1_DQS,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,COMP1_OUT,LCD_DE,EVENTOUT,ADC12_INP8/ADC12_INN4
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,DFSDM1_CKIN3,I2S2_MCK,,USART6_TX,SDMMC1_D0DIR,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0/PSSI_D0,LCD_HSYNC,EVENTOUT,
-PortC,PC7,DBTRGIO,,TIM3_CH2,TIM8_CH2,DFSDM1_DATIN3,,I2S3_MCK,USART6_RX,SDMMC1_D123DIR,FMC_NE1,SDMMC2_D7,SWPMI_TX,SDMMC1_D7,DCMI_D1/PSSI_D1,LCD_G6,EVENTOUT,
-PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,USART6_CK,UART5_RTS/UART5_DE,FMC_NE2/FMC_NCE,FMC_INT,SWPMI_RX,SDMMC1_D0,DCMI_D2/PSSI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,I2C5_SDA,,UART5_CTS,OCTOSPIM_P1_IO0,LCD_G3,SWPMI_SUSPEND,SDMMC1_D1,DCMI_D3/PSSI_D3,LCD_B2,EVENTOUT,
-PortC,PC10,,,,DFSDM1_CKIN5,I2C5_SDA,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,OCTOSPIM_P1_IO1,LCD_B1,SWPMI_RX,SDMMC1_D2,DCMI_D8/PSSI_D8,LCD_R2,EVENTOUT,
-PortC,PC11,,,,DFSDM1_DATIN5,I2C5_SCL,,SPI3_MISO/I2S3_SDI,USART3_RX,UART4_RX,OCTOSPIM_P1_NCS,,,SDMMC1_D3,DCMI_D4/PSSI_D4,LCD_B4,EVENTOUT,
-PortC,PC12,TRACED3,FMC_D6/FMC_AD6,TIM15_CH1,,I2C5_SMBA,SPI6_SCK/I2S6_CK,SPI3_MOSI/I2S3_SDO,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9/PSSI_D9,LCD_R6,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,DFSDM1_CKIN6,,,,,UART4_RX,FDCAN1_RX,,UART9_CTS,FMC_D2/FMC_AD2,,LCD_B1,EVENTOUT,
-PortD,PD1,,,,DFSDM1_DATIN6,,,,,UART4_TX,FDCAN1_TX,,,FMC_D3/FMC_AD3,,,EVENTOUT,
-PortD,PD2,TRACED2,FMC_D7/FMC_AD7,TIM3_ETR,,TIM15_BKIN,,,,UART5_RX,LCD_B7,,,SDMMC1_CMD,DCMI_D11/PSSI_D11,LCD_B2,EVENTOUT,
-PortD,PD3,,,,DFSDM1_CKOUT,,SPI2_SCK/I2S2_CK,,USART2_CTS/USART2_NSS,,,,,FMC_CLK,DCMI_D5/PSSI_D5,LCD_G7,EVENTOUT,
-PortD,PD4,,,,,,,,USART2_RTS/USART2_DE,,,OCTOSPIM_P1_IO4,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,OCTOSPIM_P1_IO5,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,SAI4_D1,SAI1_D1,DFSDM1_CKIN4,DFSDM1_DATIN1,SPI3_MOSI/I2S3_SDO,SAI1_SD_A,USART2_RX,SAI4_SD_A,,OCTOSPIM_P1_IO6,SDMMC2_CK,FMC_NWAIT,DCMI_D10/PSSI_D10,LCD_B2,EVENTOUT,
-PortD,PD7,,,,DFSDM1_DATIN4,,SPI1_MOSI/I2S1_SDO,DFSDM1_CKIN1,USART2_CK,,SPDIFRX1_IN1,OCTOSPIM_P1_IO7,SDMMC2_CMD,FMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,DFSDM1_CKIN3,,,,USART3_TX,,SPDIFRX1_IN2,,,FMC_D13/FMC_AD13,,,EVENTOUT,
-PortD,PD9,,,,DFSDM1_DATIN3,,,,USART3_RX,,,,,FMC_D14/FMC_AD14,,,EVENTOUT,
-PortD,PD10,,,,DFSDM1_CKOUT,,,,USART3_CK,,,,,FMC_D15/FMC_AD15,,LCD_B3,EVENTOUT,
-PortD,PD11,,,,LPTIM2_IN2,I2C4_SMBA,,,USART3_CTS/USART3_NSS,,OCTOSPIM_P1_IO0,SAI4_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT,
-PortD,PD12,,LPTIM1_IN1,TIM4_CH1,LPTIM2_IN1,I2C4_SCL,FDCAN3_RX,,USART3_RTS/USART3_DE,,OCTOSPIM_P1_IO1,SAI4_FS_A,,FMC_A17/FMC_ALE,DCMI_D12/PSSI_D12,,EVENTOUT,
-PortD,PD13,,LPTIM1_OUT,TIM4_CH2,,I2C4_SDA,FDCAN3_TX,,,,OCTOSPIM_P1_IO3,SAI4_SCK_A,UART9_RTS/UART9_DE,FMC_A18,DCMI_D13/PSSI_D13,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,UART9_RX,FMC_D0/FMC_AD0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS/UART8_DE,,,UART9_TX,FMC_D1/FMC_AD1,,,EVENTOUT,
-PortE,PE0,,LPTIM1_ETR,TIM4_ETR,,LPTIM2_ETR,,,,UART8_RX,,SAI4_MCLK_A,,FMC_NBL0,DCMI_D2/PSSI_D2,LCD_R0,EVENTOUT,
-PortE,PE1,,LPTIM1_IN2,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3/PSSI_D3,LCD_R6,EVENTOUT,
-PortE,PE2,TRACECLK,,SAI1_CK1,,USART10_RX,SPI4_SCK,SAI1_MCLK_A,,SAI4_MCLK_A,OCTOSPIM_P1_IO2,SAI4_CK1,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,TIM15_BKIN,,SAI1_SD_B,,SAI4_SD_B,,,USART10_TX,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,SAI1_D2,DFSDM1_DATIN3,TIM15_CH1N,SPI4_NSS,SAI1_FS_A,,SAI4_FS_A,,SAI4_D2,,FMC_A20,DCMI_D4/PSSI_D4,LCD_B0,EVENTOUT,
-PortE,PE5,TRACED2,,SAI1_CK2,DFSDM1_CKIN3,TIM15_CH1,SPI4_MISO,SAI1_SCK_A,,SAI4_SCK_A,,SAI4_CK2,,FMC_A21,DCMI_D6/PSSI_D6,LCD_G0,EVENTOUT,
-PortE,PE6,TRACED3,TIM1_BKIN2,SAI1_D1,,TIM15_CH2,SPI4_MOSI,SAI1_SD_A,,SAI4_SD_A,SAI4_D1,SAI4_MCLK_B,TIM1_BKIN2_COMP12,FMC_A22,DCMI_D7/PSSI_D7,LCD_G1,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,DFSDM1_DATIN2,,,,UART7_RX,,,OCTOSPIM_P1_IO4,,FMC_D4/FMC_AD4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,DFSDM1_CKIN2,,,,UART7_TX,,,OCTOSPIM_P1_IO5,,FMC_D5/FMC_AD5,COMP2_OUT,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,DFSDM1_CKOUT,,,,UART7_RTS/UART7_DE,,,OCTOSPIM_P1_IO6,,FMC_D6/FMC_AD6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,DFSDM1_DATIN4,,,,UART7_CTS,,,OCTOSPIM_P1_IO7,,FMC_D7/FMC_AD7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,DFSDM1_CKIN4,,SPI4_NSS,,,,,SAI4_SD_B,OCTOSPIM_P1_NCS,FMC_D8/FMC_AD8,,LCD_G3,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,DFSDM1_DATIN5,,SPI4_SCK,,,,,SAI4_SCK_B,,FMC_D9/FMC_AD9,COMP1_OUT,LCD_B4,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,DFSDM1_CKIN5,,SPI4_MISO,,,,,SAI4_FS_B,,FMC_D10/FMC_AD10,COMP2_OUT,LCD_DE,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI4_MCLK_B,,FMC_D11/FMC_AD11,,LCD_CLK,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,USART10_CK,FMC_D12/FMC_AD12,TIM1_BKIN_COMP12,LCD_R7,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,I2C5_SDA,,,OCTOSPIM_P2_IO0,,,FMC_A0,TIM23_CH1,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,I2C5_SCL,,,OCTOSPIM_P2_IO1,,,FMC_A1,TIM23_CH2,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,I2C5_SMBA,,,OCTOSPIM_P2_IO2,,,FMC_A2,TIM23_CH3,,EVENTOUT,
-PortF,PF3,,,,,,,,,,OCTOSPIM_P2_IO3,,,FMC_A3,TIM23_CH4,,EVENTOUT,ADC3_INP5
-PortF,PF4,,,,,,,,,,OCTOSPIM_P2_CLK,,,FMC_A4,,,EVENTOUT,ADC3_INP9/ADC3_INN5
-PortF,PF5,,,,,,,,,,OCTOSPIM_P2_NCLK,,,FMC_A5,,,EVENTOUT,ADC3_INP4
-PortF,PF6,,TIM16_CH1,FDCAN3_RX,,,SPI5_NSS,SAI1_SD_B,UART7_RX,SAI4_SD_B,,OCTOSPIM_P1_IO3,,,TIM23_CH1,,EVENTOUT,ADC3_INP8/ADC3_INN4
-PortF,PF7,,TIM17_CH1,FDCAN3_TX,,,SPI5_SCK,SAI1_MCLK_B,UART7_TX,SAI4_MCLK_B,,OCTOSPIM_P1_IO2,,,TIM23_CH2,,EVENTOUT,ADC3_INP3
-PortF,PF8,,TIM16_CH1N,,,,SPI5_MISO,SAI1_SCK_B,UART7_RTS/UART7_DE,SAI4_SCK_B,TIM13_CH1,OCTOSPIM_P1_IO0,,,TIM23_CH3,,EVENTOUT,ADC3_INP7/ADC3_INN3
-PortF,PF9,,TIM17_CH1N,,,,SPI5_MOSI,SAI1_FS_B,UART7_CTS,SAI4_FS_B,TIM14_CH1,OCTOSPIM_P1_IO1,,,TIM23_CH4,,EVENTOUT,ADC3_INP2
-PortF,PF10,,TIM16_BKIN,SAI1_D3,,PSSI_D15,,,,,OCTOSPIM_P1_CLK,SAI4_D3,,,DCMI_D11/PSSI_D11,LCD_DE,EVENTOUT,ADC3_INP6/ADC3_INN2
-PortF,PF11,,,,,,SPI5_MOSI,,,,OCTOSPIM_P1_NCLK,SAI4_SD_B,,FMC_NRAS,DCMI_D12/PSSI_D12,TIM24_CH1,EVENTOUT,ADC1_INP2
-PortF,PF12,,,,,,,,,,OCTOSPIM_P2_DQS,,,FMC_A6,,TIM24_CH2,EVENTOUT,ADC1_INP5/ADC1_INN2
-PortF,PF13,,,,DFSDM1_DATIN6,I2C4_SMBA,,,,,,,,FMC_A7,,TIM24_CH3,EVENTOUT,ADC2_INP2
-PortF,PF14,,,,DFSDM1_CKIN6,I2C4_SCL,,,,,,,,FMC_A8,,TIM24_CH4,EVENTOUT,ADC2_INP6/ADC2_INN2
-PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,OCTOSPIM_P2_IO4,,UART9_RX,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,OCTOSPIM_P2_IO5,,UART9_TX,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,TIM8_BKIN,,,,,,,,TIM8_BKIN_COMP12,FMC_A12,,TIM24_ETR,EVENTOUT,
-PortG,PG3,,,,TIM8_BKIN2,,,,,,,,TIM8_BKIN2_COMP12,FMC_A13,TIM23_ETR,,EVENTOUT,
-PortG,PG4,,TIM1_BKIN2,,,,,,,,,,TIM1_BKIN2_COMP12,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,TIM1_ETR,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,TIM17_BKIN,,,,,,,,,OCTOSPIM_P1_NCS,,FMC_NE3,DCMI_D12/PSSI_D12,LCD_R7,EVENTOUT,
-PortG,PG7,,,,,,,SAI1_MCLK_A,USART6_CK,,OCTOSPIM_P2_DQS,,,FMC_INT,DCMI_D13/PSSI_D13,LCD_CLK,EVENTOUT,
-PortG,PG8,,,,TIM8_ETR,,SPI6_NSS/I2S6_WS,,USART6_RTS/USART6_DE,SPDIFRX1_IN3,,,ETH_PPS_OUT,FMC_SDCLK,,LCD_G7,EVENTOUT,
-PortG,PG9,,,FDCAN3_TX,,,SPI1_MISO/I2S1_SDI,,USART6_RX,SPDIFRX1_IN4,OCTOSPIM_P1_IO6,SAI4_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,DCMI_VSYNC/PSSI_RDY,,EVENTOUT,
-PortG,PG10,,,FDCAN3_RX,OCTOSPIM_P2_IO6,,SPI1_NSS/I2S1_WS,,,,LCD_G3,SAI4_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2/PSSI_D2,LCD_B2,EVENTOUT,
-PortG,PG11,,LPTIM1_IN2,,,USART10_RX,SPI1_SCK/I2S1_CK,,,SPDIFRX1_IN1,OCTOSPIM_P2_IO7,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3/PSSI_D3,LCD_B3,EVENTOUT,
-PortG,PG12,,LPTIM1_IN1,,OCTOSPIM_P2_NCS,USART10_TX,SPI6_MISO/I2S6_SDI,,USART6_RTS/USART6_DE,SPDIFRX1_IN2,LCD_B4,SDMMC2_D3,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_NE4,TIM23_CH1,LCD_B1,EVENTOUT,
-PortG,PG13,TRACED0,LPTIM1_OUT,,,USART10_CTS/USART10_NSS,SPI6_SCK/I2S6_CK,,USART6_CTS/USART6_NSS,,,SDMMC2_D6,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,TIM23_CH2,LCD_R0,EVENTOUT,
-PortG,PG14,TRACED1,LPTIM1_ETR,,,USART10_RTS/USART10_DE,SPI6_MOSI/I2S6_SDO,,USART6_TX,,OCTOSPIM_P1_IO7,SDMMC2_D7,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,TIM23_CH3,LCD_B0,EVENTOUT,
-PortG,PG15,,,,,,,,USART6_CTS/USART6_NSS,,OCTOSPIM_P2_DQS,,USART10_CK,FMC_NCAS,DCMI_D13/PSSI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1                                 ,AF2                           ,AF3                                               ,AF4                                                                 ,AF5                                              ,AF6                                           ,AF7                                               ,AF8                                        ,AF9                                                         ,AF10                                                    ,AF11                                                                          ,AF12                                       ,AF13                          ,AF14           ,AF15    ,ADC
+     ,    ,SYS          ,FMC/LPTIM1/SAI4/TIM16/17/TIM1x/TIM2x,FDCAN3/PDM_SAI1/TIM3/4/5/12/15,DFSDM1/LCD/LPTIM2/3/4/5/LPUART1/OCTOSPIM_P1/2/TIM8,CEC/DCMI/PSSI/DFSDM1/I2C1/2/3/4/5/LPTIM2/OCTOSPIM_P1/TIM15/USART1/10,CEC/FDCAN3/SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/6,DFSDM1/I2C4/5/OCTOSPIM_P1/SAI1/SPI3/I2S3/UART4,SDMMC1/SPI2/I2S2/SPI3/I2S3/SPI6/UART7/USART1/2/3/6,LPUART1/SAI4/SDMMC1/SPDIFRX1/SPI6/UART4/5/8,FDCAN1/2/FMC/LCD/OCTOSPIM_P1/2/SAI4/SDMMC2/SPDIFRX1/TIM13/14,CRS/FMC/LCD/OCTOSPIM_P1/OTG1_FS/OTG1_HS/SAI4/SDMMC2/TIM8,DFSDM1/ETH/I2C4/LCD/MDIOS/OCTOSPIM_P1/SDMMC2/SWPMI1/TIM1x/TIM8/UART7/9/USART10,FMC/LCD/MDIOS/OCTOSPIM_P1/SDMMC1/TIM1x/TIM8,COMP/DCMI/PSSI/LCD/TIM1x/TIM23,LCD/TIM24/UART5,SYS     ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR                   ,TIM5_CH1                      ,TIM8_ETR                                          ,TIM15_BKIN                                                          ,SPI6_NSS/I2S6_WS                                 ,                                              ,USART2_CTS/USART2_NSS                             ,UART4_TX                                   ,SDMMC2_CMD                                                  ,SAI4_SD_B                                               ,ETH_MII_CRS                                                                   ,FMC_A19                                    ,                              ,               ,EVENTOUT,ADC1_INP16
+PortA,PA1 ,             ,TIM2_CH2                            ,TIM5_CH2                      ,LPTIM3_OUT                                        ,TIM15_CH1N                                                          ,                                                 ,                                              ,USART2_RTS/USART2_DE                              ,UART4_RX                                   ,OCTOSPIM_P1_IO3                                             ,SAI4_MCLK_B                                             ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK                                               ,OCTOSPIM_P1_DQS                            ,                              ,LCD_R2         ,EVENTOUT,ADC1_INP17/ADC1_INN16
+PortA,PA2 ,             ,TIM2_CH3                            ,TIM5_CH3                      ,LPTIM4_OUT                                        ,TIM15_CH1                                                           ,                                                 ,OCTOSPIM_P1_IO0                               ,USART2_TX                                         ,SAI4_SCK_B                                 ,                                                            ,                                                        ,ETH_MDIO                                                                      ,MDIOS_MDIO                                 ,                              ,LCD_R1         ,EVENTOUT,ADC12_INP14
+PortA,PA3 ,             ,TIM2_CH4                            ,TIM5_CH4                      ,LPTIM5_OUT                                        ,TIM15_CH2                                                           ,I2S6_MCK                                         ,OCTOSPIM_P1_IO2                               ,USART2_RX                                         ,                                           ,LCD_B2                                                      ,OTG_HS_ULPI_D0                                          ,ETH_MII_COL                                                                   ,OCTOSPIM_P1_CLK                            ,                              ,LCD_B5         ,EVENTOUT,ADC12_INP15
+PortA,PA4 ,D1PWREN      ,                                    ,TIM5_ETR                      ,                                                  ,                                                                    ,SPI1_NSS/I2S1_WS                                 ,SPI3_NSS/I2S3_WS                              ,USART2_CK                                         ,SPI6_NSS/I2S6_WS                           ,                                                            ,                                                        ,                                                                              ,FMC_D8/FMC_AD8                             ,DCMI_HSYNC/PSSI_DE            ,LCD_VSYNC      ,EVENTOUT,ADC12_INP18
+PortA,PA5 ,D2PWREN      ,TIM2_CH1/TIM2_ETR                   ,                              ,TIM8_CH1N                                         ,                                                                    ,SPI1_SCK/I2S1_CK                                 ,                                              ,                                                  ,SPI6_SCK/I2S6_CK                           ,                                                            ,OTG_HS_ULPI_CK                                          ,                                                                              ,FMC_D9/FMC_AD9                             ,PSSI_D14                      ,LCD_R4         ,EVENTOUT,ADC12_INP19/ADC12_INN18
+PortA,PA6 ,             ,TIM1_BKIN                           ,TIM3_CH1                      ,TIM8_BKIN                                         ,                                                                    ,SPI1_MISO/I2S1_SDI                               ,OCTOSPIM_P1_IO3                               ,                                                  ,SPI6_MISO/I2S6_SDI                         ,TIM13_CH1                                                   ,TIM8_BKIN_COMP12                                        ,MDIOS_MDC                                                                     ,TIM1_BKIN_COMP12                           ,DCMI_PIXCLK/PSSI_PDCK         ,LCD_G2         ,EVENTOUT,ADC12_INP3
+PortA,PA7 ,             ,TIM1_CH1N                           ,TIM3_CH2                      ,TIM8_CH1N                                         ,                                                                    ,SPI1_MOSI/I2S1_SDO                               ,                                              ,                                                  ,SPI6_MOSI/I2S6_SDO                         ,TIM14_CH1                                                   ,OCTOSPIM_P1_IO2                                         ,ETH_MII_RX_DV/ETH_RMII_CRS_DV                                                 ,FMC_SDNWE                                  ,                              ,LCD_VSYNC      ,EVENTOUT,ADC12_INP7/ADC12_INN3
+PortA,PA8 ,MCO1         ,TIM1_CH1                            ,                              ,TIM8_BKIN2                                        ,I2C3_SCL                                                            ,                                                 ,I2C5_SCL                                      ,USART1_CK                                         ,                                           ,                                                            ,OTG_HS_SOF                                              ,UART7_RX                                                                      ,TIM8_BKIN2_COMP12                          ,LCD_B3                        ,LCD_R6         ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2                            ,                              ,LPUART1_TX                                        ,I2C3_SMBA                                                           ,SPI2_SCK/I2S2_CK                                 ,I2C5_SMBA                                     ,USART1_TX                                         ,                                           ,                                                            ,                                                        ,ETH_TX_ER                                                                     ,                                           ,DCMI_D0/PSSI_D0               ,LCD_R5         ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3                            ,                              ,LPUART1_RX                                        ,                                                                    ,                                                 ,                                              ,USART1_RX                                         ,                                           ,                                                            ,OTG_HS_ID                                               ,MDIOS_MDIO                                                                    ,LCD_B4                                     ,DCMI_D1/PSSI_D1               ,LCD_B1         ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4                            ,                              ,LPUART1_CTS                                       ,                                                                    ,SPI2_NSS/I2S2_WS                                 ,UART4_RX                                      ,USART1_CTS/USART1_NSS                             ,                                           ,FDCAN1_RX                                                   ,                                                        ,                                                                              ,                                           ,                              ,LCD_R4         ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR                            ,                              ,LPUART1_RTS/LPUART1_DE                            ,                                                                    ,SPI2_SCK/I2S2_CK                                 ,UART4_TX                                      ,USART1_RTS/USART1_DE                              ,SAI4_FS_B                                  ,FDCAN1_TX                                                   ,                                                        ,                                                                              ,TIM1_BKIN2                                 ,                              ,LCD_R5         ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,                                           ,                              ,               ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,                                           ,                              ,               ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR                   ,                              ,                                                  ,CEC                                                                 ,SPI1_NSS/I2S1_WS                                 ,SPI3_NSS/I2S3_WS                              ,SPI6_NSS/I2S6_WS                                  ,UART4_RTS/UART4_DE                         ,LCD_R3                                                      ,                                                        ,UART7_TX                                                                      ,                                           ,                              ,LCD_B6         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N                           ,TIM3_CH3                      ,TIM8_CH2N                                         ,OCTOSPIM_P1_IO1                                                     ,                                                 ,DFSDM1_CKOUT                                  ,                                                  ,UART4_CTS                                  ,LCD_R3                                                      ,OTG_HS_ULPI_D1                                          ,ETH_MII_RXD2                                                                  ,                                           ,                              ,LCD_G1         ,EVENTOUT,ADC12_INP9/ADC12_INN5
+PortB,PB1 ,             ,TIM1_CH3N                           ,TIM3_CH4                      ,TIM8_CH3N                                         ,OCTOSPIM_P1_IO0                                                     ,                                                 ,DFSDM1_DATIN1                                 ,                                                  ,                                           ,LCD_R6                                                      ,OTG_HS_ULPI_D2                                          ,ETH_MII_RXD3                                                                  ,                                           ,                              ,LCD_G0         ,EVENTOUT,ADC12_INP5
+PortB,PB2 ,RTC_OUT      ,SAI4_D1                             ,SAI1_D1                       ,                                                  ,DFSDM1_CKIN1                                                        ,                                                 ,SAI1_SD_A                                     ,SPI3_MOSI/I2S3_SDO                                ,SAI4_SD_A                                  ,OCTOSPIM_P1_CLK                                             ,OCTOSPIM_P1_DQS                                         ,ETH_TX_ER                                                                     ,                                           ,TIM23_ETR                     ,               ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2                            ,                              ,                                                  ,                                                                    ,SPI1_SCK/I2S1_CK                                 ,SPI3_SCK/I2S3_CK                              ,                                                  ,SPI6_SCK/I2S6_CK                           ,SDMMC2_D2                                                   ,CRS_SYNC                                                ,UART7_RX                                                                      ,                                           ,                              ,TIM24_ETR      ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,TIM16_BKIN                          ,TIM3_CH1                      ,                                                  ,                                                                    ,SPI1_MISO/I2S1_SDI                               ,SPI3_MISO/I2S3_SDI                            ,SPI2_NSS/I2S2_WS                                  ,SPI6_MISO/I2S6_SDI                         ,SDMMC2_D3                                                   ,                                                        ,UART7_TX                                                                      ,                                           ,                              ,               ,EVENTOUT,
+PortB,PB5 ,             ,TIM17_BKIN                          ,TIM3_CH2                      ,LCD_B5                                            ,I2C1_SMBA                                                           ,SPI1_MOSI/I2S1_SDO                               ,I2C4_SMBA                                     ,SPI3_MOSI/I2S3_SDO                                ,SPI6_MOSI/I2S6_SDO                         ,FDCAN2_RX                                                   ,OTG_HS_ULPI_D7                                          ,ETH_PPS_OUT                                                                   ,FMC_SDCKE1                                 ,DCMI_D10/PSSI_D10             ,UART5_RX       ,EVENTOUT,
+PortB,PB6 ,             ,TIM16_CH1N                          ,TIM4_CH1                      ,                                                  ,I2C1_SCL                                                            ,CEC                                              ,I2C4_SCL                                      ,USART1_TX                                         ,LPUART1_TX                                 ,FDCAN2_TX                                                   ,OCTOSPIM_P1_NCS                                         ,DFSDM1_DATIN5                                                                 ,FMC_SDNE1                                  ,DCMI_D5/PSSI_D5               ,UART5_TX       ,EVENTOUT,
+PortB,PB7 ,             ,TIM17_CH1N                          ,TIM4_CH2                      ,                                                  ,I2C1_SDA                                                            ,                                                 ,I2C4_SDA                                      ,USART1_RX                                         ,LPUART1_RX                                 ,                                                            ,                                                        ,DFSDM1_CKIN5                                                                  ,FMC_NL                                     ,DCMI_VSYNC/PSSI_RDY           ,               ,EVENTOUT,
+PortB,PB8 ,             ,TIM16_CH1                           ,TIM4_CH3                      ,DFSDM1_CKIN7                                      ,I2C1_SCL                                                            ,                                                 ,I2C4_SCL                                      ,SDMMC1_CKIN                                       ,UART4_RX                                   ,FDCAN1_RX                                                   ,SDMMC2_D4                                               ,ETH_MII_TXD3                                                                  ,SDMMC1_D4                                  ,DCMI_D6/PSSI_D6               ,LCD_B6         ,EVENTOUT,
+PortB,PB9 ,             ,TIM17_CH1                           ,TIM4_CH4                      ,DFSDM1_DATIN7                                     ,I2C1_SDA                                                            ,SPI2_NSS/I2S2_WS                                 ,I2C4_SDA                                      ,SDMMC1_CDIR                                       ,UART4_TX                                   ,FDCAN1_TX                                                   ,SDMMC2_D5                                               ,I2C4_SMBA                                                                     ,SDMMC1_D5                                  ,DCMI_D7/PSSI_D7               ,LCD_B7         ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3                            ,                              ,LPTIM2_IN1                                        ,I2C2_SCL                                                            ,SPI2_SCK/I2S2_CK                                 ,DFSDM1_DATIN7                                 ,USART3_TX                                         ,                                           ,OCTOSPIM_P1_NCS                                             ,OTG_HS_ULPI_D3                                          ,ETH_MII_RX_ER                                                                 ,                                           ,                              ,LCD_G4         ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4                            ,                              ,LPTIM2_ETR                                        ,I2C2_SDA                                                            ,                                                 ,DFSDM1_CKIN7                                  ,USART3_RX                                         ,                                           ,                                                            ,OTG_HS_ULPI_D4                                          ,ETH_MII_TX_EN/ETH_RMII_TX_EN                                                  ,                                           ,                              ,LCD_G5         ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN                           ,                              ,OCTOSPIM_P1_NCLK                                  ,I2C2_SMBA                                                           ,SPI2_NSS/I2S2_WS                                 ,DFSDM1_DATIN1                                 ,USART3_CK                                         ,                                           ,FDCAN2_RX                                                   ,OTG_HS_ULPI_D5                                          ,ETH_MII_TXD0/ETH_RMII_TXD0                                                    ,OCTOSPIM_P1_IO0                            ,TIM1_BKIN_COMP12              ,UART5_RX       ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N                           ,                              ,LPTIM2_OUT                                        ,OCTOSPIM_P1_IO2                                                     ,SPI2_SCK/I2S2_CK                                 ,DFSDM1_CKIN1                                  ,USART3_CTS/USART3_NSS                             ,                                           ,FDCAN2_TX                                                   ,OTG_HS_ULPI_D6                                          ,ETH_MII_TXD1/ETH_RMII_TXD1                                                    ,SDMMC1_D0                                  ,DCMI_D2/PSSI_D2               ,UART5_TX       ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N                           ,TIM12_CH1                     ,TIM8_CH2N                                         ,USART1_TX                                                           ,SPI2_MISO/I2S2_SDI                               ,DFSDM1_DATIN2                                 ,USART3_RTS/USART3_DE                              ,UART4_RTS/UART4_DE                         ,SDMMC2_D0                                                   ,                                                        ,                                                                              ,FMC_D10/FMC_AD10                           ,                              ,LCD_CLK        ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N                           ,TIM12_CH2                     ,TIM8_CH3N                                         ,USART1_RX                                                           ,SPI2_MOSI/I2S2_SDO                               ,DFSDM1_CKIN2                                  ,                                                  ,UART4_CTS                                  ,SDMMC2_D1                                                   ,                                                        ,                                                                              ,FMC_D11/FMC_AD11                           ,                              ,LCD_G7         ,EVENTOUT,
+PortC,PC0 ,             ,FMC_D12/FMC_AD12                    ,                              ,DFSDM1_CKIN0                                      ,                                                                    ,                                                 ,DFSDM1_DATIN4                                 ,                                                  ,SAI4_FS_B                                  ,FMC_A25                                                     ,OTG_HS_ULPI_STP                                         ,LCD_G2                                                                        ,FMC_SDNWE                                  ,                              ,LCD_R5         ,EVENTOUT,ADC123_INP10
+PortC,PC1 ,TRACED0      ,SAI4_D1                             ,SAI1_D1                       ,DFSDM1_DATIN0                                     ,DFSDM1_CKIN4                                                        ,SPI2_MOSI/I2S2_SDO                               ,SAI1_SD_A                                     ,                                                  ,SAI4_SD_A                                  ,SDMMC2_CK                                                   ,OCTOSPIM_P1_IO4                                         ,ETH_MDC                                                                       ,MDIOS_MDC                                  ,                              ,LCD_G5         ,EVENTOUT,ADC123_INP11/ADC123_INN10
+PortC,PC2 ,PWR_DEEPSLEEP,                                    ,                              ,DFSDM1_CKIN1                                      ,OCTOSPIM_P1_IO5                                                     ,SPI2_MISO/I2S2_SDI                               ,DFSDM1_CKOUT                                  ,                                                  ,                                           ,OCTOSPIM_P1_IO2                                             ,OTG_HS_ULPI_DIR                                         ,ETH_MII_TXD2                                                                  ,FMC_SDNE0                                  ,                              ,               ,EVENTOUT,ADC123_INP12/ADC123_INN11
+PortC,PC3 ,PWR_SLEEP    ,                                    ,                              ,DFSDM1_DATIN1                                     ,OCTOSPIM_P1_IO6                                                     ,SPI2_MOSI/I2S2_SDO                               ,                                              ,                                                  ,                                           ,OCTOSPIM_P1_IO0                                             ,OTG_HS_ULPI_NXT                                         ,ETH_MII_TX_CLK                                                                ,FMC_SDCKE0                                 ,                              ,               ,EVENTOUT,ADC123_INP13/ADC123_INN12
+PortC,PC4 ,PWR_DEEPSLEEP,FMC_A22                             ,                              ,DFSDM1_CKIN2                                      ,                                                                    ,I2S1_MCK                                         ,                                              ,                                                  ,                                           ,SPDIFRX1_IN3                                                ,SDMMC2_CKIN                                             ,ETH_MII_RXD0/ETH_RMII_RXD0                                                    ,FMC_SDNE0                                  ,                              ,LCD_R7         ,EVENTOUT,ADC12_INP4
+PortC,PC5 ,PWR_SLEEP    ,SAI4_D3                             ,SAI1_D3                       ,DFSDM1_DATIN2                                     ,PSSI_D15                                                            ,                                                 ,                                              ,                                                  ,                                           ,SPDIFRX1_IN4                                                ,OCTOSPIM_P1_DQS                                         ,ETH_MII_RXD1/ETH_RMII_RXD1                                                    ,FMC_SDCKE0                                 ,COMP1_OUT                     ,LCD_DE         ,EVENTOUT,ADC12_INP8/ADC12_INN4
+PortC,PC6 ,             ,                                    ,TIM3_CH1                      ,TIM8_CH1                                          ,DFSDM1_CKIN3                                                        ,I2S2_MCK                                         ,                                              ,USART6_TX                                         ,SDMMC1_D0DIR                               ,FMC_NWAIT                                                   ,SDMMC2_D6                                               ,                                                                              ,SDMMC1_D6                                  ,DCMI_D0/PSSI_D0               ,LCD_HSYNC      ,EVENTOUT,
+PortC,PC7 ,DBTRGIO      ,                                    ,TIM3_CH2                      ,TIM8_CH2                                          ,DFSDM1_DATIN3                                                       ,                                                 ,I2S3_MCK                                      ,USART6_RX                                         ,SDMMC1_D123DIR                             ,FMC_NE1                                                     ,SDMMC2_D7                                               ,SWPMI_TX                                                                      ,SDMMC1_D7                                  ,DCMI_D1/PSSI_D1               ,LCD_G6         ,EVENTOUT,
+PortC,PC8 ,TRACED1      ,                                    ,TIM3_CH3                      ,TIM8_CH3                                          ,                                                                    ,                                                 ,                                              ,USART6_CK                                         ,UART5_RTS/UART5_DE                         ,FMC_NE2/FMC_NCE                                             ,FMC_INT                                                 ,SWPMI_RX                                                                      ,SDMMC1_D0                                  ,DCMI_D2/PSSI_D2               ,               ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                                    ,TIM3_CH4                      ,TIM8_CH4                                          ,I2C3_SDA                                                            ,I2S_CKIN                                         ,I2C5_SDA                                      ,                                                  ,UART5_CTS                                  ,OCTOSPIM_P1_IO0                                             ,LCD_G3                                                  ,SWPMI_SUSPEND                                                                 ,SDMMC1_D1                                  ,DCMI_D3/PSSI_D3               ,LCD_B2         ,EVENTOUT,
+PortC,PC10,             ,                                    ,                              ,DFSDM1_CKIN5                                      ,I2C5_SDA                                                            ,                                                 ,SPI3_SCK/I2S3_CK                              ,USART3_TX                                         ,UART4_TX                                   ,OCTOSPIM_P1_IO1                                             ,LCD_B1                                                  ,SWPMI_RX                                                                      ,SDMMC1_D2                                  ,DCMI_D8/PSSI_D8               ,LCD_R2         ,EVENTOUT,
+PortC,PC11,             ,                                    ,                              ,DFSDM1_DATIN5                                     ,I2C5_SCL                                                            ,                                                 ,SPI3_MISO/I2S3_SDI                            ,USART3_RX                                         ,UART4_RX                                   ,OCTOSPIM_P1_NCS                                             ,                                                        ,                                                                              ,SDMMC1_D3                                  ,DCMI_D4/PSSI_D4               ,LCD_B4         ,EVENTOUT,
+PortC,PC12,TRACED3      ,FMC_D6/FMC_AD6                      ,TIM15_CH1                     ,                                                  ,I2C5_SMBA                                                           ,SPI6_SCK/I2S6_CK                                 ,SPI3_MOSI/I2S3_SDO                            ,USART3_CK                                         ,UART5_TX                                   ,                                                            ,                                                        ,                                                                              ,SDMMC1_CK                                  ,DCMI_D9/PSSI_D9               ,LCD_R6         ,EVENTOUT,
+PortC,PC13,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,                                           ,                              ,               ,EVENTOUT,
+PortC,PC14,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,                                           ,                              ,               ,EVENTOUT,
+PortC,PC15,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,                                           ,                              ,               ,EVENTOUT,
+PortD,PD0 ,             ,                                    ,                              ,DFSDM1_CKIN6                                      ,                                                                    ,                                                 ,                                              ,                                                  ,UART4_RX                                   ,FDCAN1_RX                                                   ,                                                        ,UART9_CTS                                                                     ,FMC_D2/FMC_AD2                             ,                              ,LCD_B1         ,EVENTOUT,
+PortD,PD1 ,             ,                                    ,                              ,DFSDM1_DATIN6                                     ,                                                                    ,                                                 ,                                              ,                                                  ,UART4_TX                                   ,FDCAN1_TX                                                   ,                                                        ,                                                                              ,FMC_D3/FMC_AD3                             ,                              ,               ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,FMC_D7/FMC_AD7                      ,TIM3_ETR                      ,                                                  ,TIM15_BKIN                                                          ,                                                 ,                                              ,                                                  ,UART5_RX                                   ,LCD_B7                                                      ,                                                        ,                                                                              ,SDMMC1_CMD                                 ,DCMI_D11/PSSI_D11             ,LCD_B2         ,EVENTOUT,
+PortD,PD3 ,             ,                                    ,                              ,DFSDM1_CKOUT                                      ,                                                                    ,SPI2_SCK/I2S2_CK                                 ,                                              ,USART2_CTS/USART2_NSS                             ,                                           ,                                                            ,                                                        ,                                                                              ,FMC_CLK                                    ,DCMI_D5/PSSI_D5               ,LCD_G7         ,EVENTOUT,
+PortD,PD4 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,USART2_RTS/USART2_DE                              ,                                           ,                                                            ,OCTOSPIM_P1_IO4                                         ,                                                                              ,FMC_NOE                                    ,                              ,               ,EVENTOUT,
+PortD,PD5 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,USART2_TX                                         ,                                           ,                                                            ,OCTOSPIM_P1_IO5                                         ,                                                                              ,FMC_NWE                                    ,                              ,               ,EVENTOUT,
+PortD,PD6 ,             ,SAI4_D1                             ,SAI1_D1                       ,DFSDM1_CKIN4                                      ,DFSDM1_DATIN1                                                       ,SPI3_MOSI/I2S3_SDO                               ,SAI1_SD_A                                     ,USART2_RX                                         ,SAI4_SD_A                                  ,                                                            ,OCTOSPIM_P1_IO6                                         ,SDMMC2_CK                                                                     ,FMC_NWAIT                                  ,DCMI_D10/PSSI_D10             ,LCD_B2         ,EVENTOUT,
+PortD,PD7 ,             ,                                    ,                              ,DFSDM1_DATIN4                                     ,                                                                    ,SPI1_MOSI/I2S1_SDO                               ,DFSDM1_CKIN1                                  ,USART2_CK                                         ,                                           ,SPDIFRX1_IN1                                                ,OCTOSPIM_P1_IO7                                         ,SDMMC2_CMD                                                                    ,FMC_NE1                                    ,                              ,               ,EVENTOUT,
+PortD,PD8 ,             ,                                    ,                              ,DFSDM1_CKIN3                                      ,                                                                    ,                                                 ,                                              ,USART3_TX                                         ,                                           ,SPDIFRX1_IN2                                                ,                                                        ,                                                                              ,FMC_D13/FMC_AD13                           ,                              ,               ,EVENTOUT,
+PortD,PD9 ,             ,                                    ,                              ,DFSDM1_DATIN3                                     ,                                                                    ,                                                 ,                                              ,USART3_RX                                         ,                                           ,                                                            ,                                                        ,                                                                              ,FMC_D14/FMC_AD14                           ,                              ,               ,EVENTOUT,
+PortD,PD10,             ,                                    ,                              ,DFSDM1_CKOUT                                      ,                                                                    ,                                                 ,                                              ,USART3_CK                                         ,                                           ,                                                            ,                                                        ,                                                                              ,FMC_D15/FMC_AD15                           ,                              ,LCD_B3         ,EVENTOUT,
+PortD,PD11,             ,                                    ,                              ,LPTIM2_IN2                                        ,I2C4_SMBA                                                           ,                                                 ,                                              ,USART3_CTS/USART3_NSS                             ,                                           ,OCTOSPIM_P1_IO0                                             ,SAI4_SD_A                                               ,                                                                              ,FMC_A16/FMC_CLE                            ,                              ,               ,EVENTOUT,
+PortD,PD12,             ,LPTIM1_IN1                          ,TIM4_CH1                      ,LPTIM2_IN1                                        ,I2C4_SCL                                                            ,FDCAN3_RX                                        ,                                              ,USART3_RTS/USART3_DE                              ,                                           ,OCTOSPIM_P1_IO1                                             ,SAI4_FS_A                                               ,                                                                              ,FMC_A17/FMC_ALE                            ,DCMI_D12/PSSI_D12             ,               ,EVENTOUT,
+PortD,PD13,             ,LPTIM1_OUT                          ,TIM4_CH2                      ,                                                  ,I2C4_SDA                                                            ,FDCAN3_TX                                        ,                                              ,                                                  ,                                           ,OCTOSPIM_P1_IO3                                             ,SAI4_SCK_A                                              ,UART9_RTS/UART9_DE                                                            ,FMC_A18                                    ,DCMI_D13/PSSI_D13             ,               ,EVENTOUT,
+PortD,PD14,             ,                                    ,TIM4_CH3                      ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,UART8_CTS                                  ,                                                            ,                                                        ,UART9_RX                                                                      ,FMC_D0/FMC_AD0                             ,                              ,               ,EVENTOUT,
+PortD,PD15,             ,                                    ,TIM4_CH4                      ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,UART8_RTS/UART8_DE                         ,                                                            ,                                                        ,UART9_TX                                                                      ,FMC_D1/FMC_AD1                             ,                              ,               ,EVENTOUT,
+PortE,PE0 ,             ,LPTIM1_ETR                          ,TIM4_ETR                      ,                                                  ,LPTIM2_ETR                                                          ,                                                 ,                                              ,                                                  ,UART8_RX                                   ,                                                            ,SAI4_MCLK_A                                             ,                                                                              ,FMC_NBL0                                   ,DCMI_D2/PSSI_D2               ,LCD_R0         ,EVENTOUT,
+PortE,PE1 ,             ,LPTIM1_IN2                          ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,UART8_TX                                   ,                                                            ,                                                        ,                                                                              ,FMC_NBL1                                   ,DCMI_D3/PSSI_D3               ,LCD_R6         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                                    ,SAI1_CK1                      ,                                                  ,USART10_RX                                                          ,SPI4_SCK                                         ,SAI1_MCLK_A                                   ,                                                  ,SAI4_MCLK_A                                ,OCTOSPIM_P1_IO2                                             ,SAI4_CK1                                                ,ETH_MII_TXD3                                                                  ,FMC_A23                                    ,                              ,               ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                                    ,                              ,                                                  ,TIM15_BKIN                                                          ,                                                 ,SAI1_SD_B                                     ,                                                  ,SAI4_SD_B                                  ,                                                            ,                                                        ,USART10_TX                                                                    ,FMC_A19                                    ,                              ,               ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                                    ,SAI1_D2                       ,DFSDM1_DATIN3                                     ,TIM15_CH1N                                                          ,SPI4_NSS                                         ,SAI1_FS_A                                     ,                                                  ,SAI4_FS_A                                  ,                                                            ,SAI4_D2                                                 ,                                                                              ,FMC_A20                                    ,DCMI_D4/PSSI_D4               ,LCD_B0         ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                                    ,SAI1_CK2                      ,DFSDM1_CKIN3                                      ,TIM15_CH1                                                           ,SPI4_MISO                                        ,SAI1_SCK_A                                    ,                                                  ,SAI4_SCK_A                                 ,                                                            ,SAI4_CK2                                                ,                                                                              ,FMC_A21                                    ,DCMI_D6/PSSI_D6               ,LCD_G0         ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,TIM1_BKIN2                          ,SAI1_D1                       ,                                                  ,TIM15_CH2                                                           ,SPI4_MOSI                                        ,SAI1_SD_A                                     ,                                                  ,SAI4_SD_A                                  ,SAI4_D1                                                     ,SAI4_MCLK_B                                             ,TIM1_BKIN2_COMP12                                                             ,FMC_A22                                    ,DCMI_D7/PSSI_D7               ,LCD_G1         ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR                            ,                              ,DFSDM1_DATIN2                                     ,                                                                    ,                                                 ,                                              ,UART7_RX                                          ,                                           ,                                                            ,OCTOSPIM_P1_IO4                                         ,                                                                              ,FMC_D4/FMC_AD4                             ,                              ,               ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N                           ,                              ,DFSDM1_CKIN2                                      ,                                                                    ,                                                 ,                                              ,UART7_TX                                          ,                                           ,                                                            ,OCTOSPIM_P1_IO5                                         ,                                                                              ,FMC_D5/FMC_AD5                             ,COMP2_OUT                     ,               ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1                            ,                              ,DFSDM1_CKOUT                                      ,                                                                    ,                                                 ,                                              ,UART7_RTS/UART7_DE                                ,                                           ,                                                            ,OCTOSPIM_P1_IO6                                         ,                                                                              ,FMC_D6/FMC_AD6                             ,                              ,               ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N                           ,                              ,DFSDM1_DATIN4                                     ,                                                                    ,                                                 ,                                              ,UART7_CTS                                         ,                                           ,                                                            ,OCTOSPIM_P1_IO7                                         ,                                                                              ,FMC_D7/FMC_AD7                             ,                              ,               ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2                            ,                              ,DFSDM1_CKIN4                                      ,                                                                    ,SPI4_NSS                                         ,                                              ,                                                  ,                                           ,                                                            ,SAI4_SD_B                                               ,OCTOSPIM_P1_NCS                                                               ,FMC_D8/FMC_AD8                             ,                              ,LCD_G3         ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N                           ,                              ,DFSDM1_DATIN5                                     ,                                                                    ,SPI4_SCK                                         ,                                              ,                                                  ,                                           ,                                                            ,SAI4_SCK_B                                              ,                                                                              ,FMC_D9/FMC_AD9                             ,COMP1_OUT                     ,LCD_B4         ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3                            ,                              ,DFSDM1_CKIN5                                      ,                                                                    ,SPI4_MISO                                        ,                                              ,                                                  ,                                           ,                                                            ,SAI4_FS_B                                               ,                                                                              ,FMC_D10/FMC_AD10                           ,COMP2_OUT                     ,LCD_DE         ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4                            ,                              ,                                                  ,                                                                    ,SPI4_MOSI                                        ,                                              ,                                                  ,                                           ,                                                            ,SAI4_MCLK_B                                             ,                                                                              ,FMC_D11/FMC_AD11                           ,                              ,LCD_CLK        ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN                           ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,USART10_CK                                                                    ,FMC_D12/FMC_AD12                           ,TIM1_BKIN_COMP12              ,LCD_R7         ,EVENTOUT,
+PortF,PF0 ,             ,                                    ,                              ,                                                  ,I2C2_SDA                                                            ,                                                 ,I2C5_SDA                                      ,                                                  ,                                           ,OCTOSPIM_P2_IO0                                             ,                                                        ,                                                                              ,FMC_A0                                     ,TIM23_CH1                     ,               ,EVENTOUT,
+PortF,PF1 ,             ,                                    ,                              ,                                                  ,I2C2_SCL                                                            ,                                                 ,I2C5_SCL                                      ,                                                  ,                                           ,OCTOSPIM_P2_IO1                                             ,                                                        ,                                                                              ,FMC_A1                                     ,TIM23_CH2                     ,               ,EVENTOUT,
+PortF,PF2 ,             ,                                    ,                              ,                                                  ,I2C2_SMBA                                                           ,                                                 ,I2C5_SMBA                                     ,                                                  ,                                           ,OCTOSPIM_P2_IO2                                             ,                                                        ,                                                                              ,FMC_A2                                     ,TIM23_CH3                     ,               ,EVENTOUT,
+PortF,PF3 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,OCTOSPIM_P2_IO3                                             ,                                                        ,                                                                              ,FMC_A3                                     ,TIM23_CH4                     ,               ,EVENTOUT,ADC3_INP5
+PortF,PF4 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,OCTOSPIM_P2_CLK                                             ,                                                        ,                                                                              ,FMC_A4                                     ,                              ,               ,EVENTOUT,ADC3_INP9/ADC3_INN5
+PortF,PF5 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,OCTOSPIM_P2_NCLK                                            ,                                                        ,                                                                              ,FMC_A5                                     ,                              ,               ,EVENTOUT,ADC3_INP4
+PortF,PF6 ,             ,TIM16_CH1                           ,FDCAN3_RX                     ,                                                  ,                                                                    ,SPI5_NSS                                         ,SAI1_SD_B                                     ,UART7_RX                                          ,SAI4_SD_B                                  ,                                                            ,OCTOSPIM_P1_IO3                                         ,                                                                              ,                                           ,TIM23_CH1                     ,               ,EVENTOUT,ADC3_INP8/ADC3_INN4
+PortF,PF7 ,             ,TIM17_CH1                           ,FDCAN3_TX                     ,                                                  ,                                                                    ,SPI5_SCK                                         ,SAI1_MCLK_B                                   ,UART7_TX                                          ,SAI4_MCLK_B                                ,                                                            ,OCTOSPIM_P1_IO2                                         ,                                                                              ,                                           ,TIM23_CH2                     ,               ,EVENTOUT,ADC3_INP3
+PortF,PF8 ,             ,TIM16_CH1N                          ,                              ,                                                  ,                                                                    ,SPI5_MISO                                        ,SAI1_SCK_B                                    ,UART7_RTS/UART7_DE                                ,SAI4_SCK_B                                 ,TIM13_CH1                                                   ,OCTOSPIM_P1_IO0                                         ,                                                                              ,                                           ,TIM23_CH3                     ,               ,EVENTOUT,ADC3_INP7/ADC3_INN3
+PortF,PF9 ,             ,TIM17_CH1N                          ,                              ,                                                  ,                                                                    ,SPI5_MOSI                                        ,SAI1_FS_B                                     ,UART7_CTS                                         ,SAI4_FS_B                                  ,TIM14_CH1                                                   ,OCTOSPIM_P1_IO1                                         ,                                                                              ,                                           ,TIM23_CH4                     ,               ,EVENTOUT,ADC3_INP2
+PortF,PF10,             ,TIM16_BKIN                          ,SAI1_D3                       ,                                                  ,PSSI_D15                                                            ,                                                 ,                                              ,                                                  ,                                           ,OCTOSPIM_P1_CLK                                             ,SAI4_D3                                                 ,                                                                              ,                                           ,DCMI_D11/PSSI_D11             ,LCD_DE         ,EVENTOUT,ADC3_INP6/ADC3_INN2
+PortF,PF11,             ,                                    ,                              ,                                                  ,                                                                    ,SPI5_MOSI                                        ,                                              ,                                                  ,                                           ,OCTOSPIM_P1_NCLK                                            ,SAI4_SD_B                                               ,                                                                              ,FMC_NRAS                                   ,DCMI_D12/PSSI_D12             ,TIM24_CH1      ,EVENTOUT,ADC1_INP2
+PortF,PF12,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,OCTOSPIM_P2_DQS                                             ,                                                        ,                                                                              ,FMC_A6                                     ,                              ,TIM24_CH2      ,EVENTOUT,ADC1_INP5/ADC1_INN2
+PortF,PF13,             ,                                    ,                              ,DFSDM1_DATIN6                                     ,I2C4_SMBA                                                           ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,FMC_A7                                     ,                              ,TIM24_CH3      ,EVENTOUT,ADC2_INP2
+PortF,PF14,             ,                                    ,                              ,DFSDM1_CKIN6                                      ,I2C4_SCL                                                            ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,FMC_A8                                     ,                              ,TIM24_CH4      ,EVENTOUT,ADC2_INP6/ADC2_INN2
+PortF,PF15,             ,                                    ,                              ,                                                  ,I2C4_SDA                                                            ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,FMC_A9                                     ,                              ,               ,EVENTOUT,
+PortG,PG0 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,OCTOSPIM_P2_IO4                                             ,                                                        ,UART9_RX                                                                      ,FMC_A10                                    ,                              ,               ,EVENTOUT,
+PortG,PG1 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,OCTOSPIM_P2_IO5                                             ,                                                        ,UART9_TX                                                                      ,FMC_A11                                    ,                              ,               ,EVENTOUT,
+PortG,PG2 ,             ,                                    ,                              ,TIM8_BKIN                                         ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,TIM8_BKIN_COMP12                                                              ,FMC_A12                                    ,                              ,TIM24_ETR      ,EVENTOUT,
+PortG,PG3 ,             ,                                    ,                              ,TIM8_BKIN2                                        ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,TIM8_BKIN2_COMP12                                                             ,FMC_A13                                    ,TIM23_ETR                     ,               ,EVENTOUT,
+PortG,PG4 ,             ,TIM1_BKIN2                          ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,TIM1_BKIN2_COMP12                                                             ,FMC_A14/FMC_BA0                            ,                              ,               ,EVENTOUT,
+PortG,PG5 ,             ,TIM1_ETR                            ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,FMC_A15/FMC_BA1                            ,                              ,               ,EVENTOUT,
+PortG,PG6 ,             ,TIM17_BKIN                          ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,OCTOSPIM_P1_NCS                                         ,                                                                              ,FMC_NE3                                    ,DCMI_D12/PSSI_D12             ,LCD_R7         ,EVENTOUT,
+PortG,PG7 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,SAI1_MCLK_A                                   ,USART6_CK                                         ,                                           ,OCTOSPIM_P2_DQS                                             ,                                                        ,                                                                              ,FMC_INT                                    ,DCMI_D13/PSSI_D13             ,LCD_CLK        ,EVENTOUT,
+PortG,PG8 ,             ,                                    ,                              ,TIM8_ETR                                          ,                                                                    ,SPI6_NSS/I2S6_WS                                 ,                                              ,USART6_RTS/USART6_DE                              ,SPDIFRX1_IN3                               ,                                                            ,                                                        ,ETH_PPS_OUT                                                                   ,FMC_SDCLK                                  ,                              ,LCD_G7         ,EVENTOUT,
+PortG,PG9 ,             ,                                    ,FDCAN3_TX                     ,                                                  ,                                                                    ,SPI1_MISO/I2S1_SDI                               ,                                              ,USART6_RX                                         ,SPDIFRX1_IN4                               ,OCTOSPIM_P1_IO6                                             ,SAI4_FS_B                                               ,SDMMC2_D0                                                                     ,FMC_NE2/FMC_NCE                            ,DCMI_VSYNC/PSSI_RDY           ,               ,EVENTOUT,
+PortG,PG10,             ,                                    ,FDCAN3_RX                     ,OCTOSPIM_P2_IO6                                   ,                                                                    ,SPI1_NSS/I2S1_WS                                 ,                                              ,                                                  ,                                           ,LCD_G3                                                      ,SAI4_SD_B                                               ,SDMMC2_D1                                                                     ,FMC_NE3                                    ,DCMI_D2/PSSI_D2               ,LCD_B2         ,EVENTOUT,
+PortG,PG11,             ,LPTIM1_IN2                          ,                              ,                                                  ,USART10_RX                                                          ,SPI1_SCK/I2S1_CK                                 ,                                              ,                                                  ,SPDIFRX1_IN1                               ,OCTOSPIM_P2_IO7                                             ,SDMMC2_D2                                               ,ETH_MII_TX_EN/ETH_RMII_TX_EN                                                  ,                                           ,DCMI_D3/PSSI_D3               ,LCD_B3         ,EVENTOUT,
+PortG,PG12,             ,LPTIM1_IN1                          ,                              ,OCTOSPIM_P2_NCS                                   ,USART10_TX                                                          ,SPI6_MISO/I2S6_SDI                               ,                                              ,USART6_RTS/USART6_DE                              ,SPDIFRX1_IN2                               ,LCD_B4                                                      ,SDMMC2_D3                                               ,ETH_MII_TXD1/ETH_RMII_TXD1                                                    ,FMC_NE4                                    ,TIM23_CH1                     ,LCD_B1         ,EVENTOUT,
+PortG,PG13,TRACED0      ,LPTIM1_OUT                          ,                              ,                                                  ,USART10_CTS/USART10_NSS                                             ,SPI6_SCK/I2S6_CK                                 ,                                              ,USART6_CTS/USART6_NSS                             ,                                           ,                                                            ,SDMMC2_D6                                               ,ETH_MII_TXD0/ETH_RMII_TXD0                                                    ,FMC_A24                                    ,TIM23_CH2                     ,LCD_R0         ,EVENTOUT,
+PortG,PG14,TRACED1      ,LPTIM1_ETR                          ,                              ,                                                  ,USART10_RTS/USART10_DE                                              ,SPI6_MOSI/I2S6_SDO                               ,                                              ,USART6_TX                                         ,                                           ,OCTOSPIM_P1_IO7                                             ,SDMMC2_D7                                               ,ETH_MII_TXD1/ETH_RMII_TXD1                                                    ,FMC_A25                                    ,TIM23_CH3                     ,LCD_B0         ,EVENTOUT,
+PortG,PG15,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,USART6_CTS/USART6_NSS                             ,                                           ,OCTOSPIM_P2_DQS                                             ,                                                        ,USART10_CK                                                                    ,FMC_NCAS                                   ,DCMI_D13/PSSI_D13             ,               ,EVENTOUT,
+PortH,PH0 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,                                           ,                              ,               ,EVENTOUT,
+PortH,PH1 ,             ,                                    ,                              ,                                                  ,                                                                    ,                                                 ,                                              ,                                                  ,                                           ,                                                            ,                                                        ,                                                                              ,                                           ,                              ,               ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32h743_af.csv b/ports/stm32/boards/stm32h743_af.csv
index 4b8ef6afdd..2287209c49 100644
--- a/ports/stm32/boards/stm32h743_af.csv
+++ b/ports/stm32/boards/stm32h743_af.csv
@@ -1,170 +1,170 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS,TIM1/2/16/17/LPTIM1/HRTIM1,SAI1/TIM3/4/5/12/HRTIM1,LPUART/TIM8/LPTIM2/3/4/5/HRTIM1/DFSDM,I2C1/2/3/4/USART1/TIM15/LPTIM2/DFSDM/CEC,SPI1/2/3/4/5/6/CEC,SPI2/3/SAI1/3/I2C4/UART4/DFSDM,SPI2/3/6/USART1/2/3/6/UART7/SDMMC1,SPI6/SAI2/4/UART4/5/8/LPUART/SDMMC1/SPDIFRX,SAI4/FDCAN1/2/TIM13/14/QUADSPI/FMC/SDMMC2/LCD/SPDIFRX,SAI2/4/TIM8/QUADSPI/SDMMC2/OTG1_HS/OTG2_FS/LCD,I2C4/UART7/SWPMI1/TIM1/8/DFSDM/SDMMC2/MDIOS/ETH,TIM1/8/FMC/SDMMC1/MDIOS/OTG1_FS/LCD,TIM1/DCMI/LCD/COMP,UART5/LCD,SYS,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,TIM15_BKIN,,,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT,ADC1_INP16/ADC12_INN1/ADC12_INP0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,LPTIM3_OUT,TIM15_CH1N,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT,ADC1_INN16/ADC1_INP17/ADC12_INP1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,LPTIM4_OUT,TIM15_CH1,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,MDIOS_MDIO,,LCD_R1,EVENTOUT,ADC12_INP14
-PortA,PA3,,TIM2_CH4,TIM5_CH4,LPTIM5_OUT,TIM15_CH2,,,USART2_RX,,LCD_B2,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC12_INP15
-PortA,PA4,,,TIM5_ETR,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,SPI6_NSS,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_INP18
-PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,SPI6_SCK,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT,ADC12_INN18/ADC12_INP19
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO/I2S1_SDI,,,SPI6_MISO,TIM13_CH1,TIM8_BKIN_COMP12,MDIOS_MDC,TIM1_BKIN_COMP12,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_INP3
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SDO,,,SPI6_MOSI,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT,ADC12_INN3/ADC12_INP7
-PortA,PA8,MCO1,TIM1_CH1,HRTIM_CHB2,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,UART7_RX,TIM8_BKIN2_COMP12,LCD_B3,LCD_R6,EVENTOUT,
-PortA,PA9,,TIM1_CH2,HRTIM_CHC1,LPUART1_TX,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,CAN1_RXFD,,ETH_TX_ER,,DCMI_D0,LCD_R5,EVENTOUT,
-PortA,PA10,,TIM1_CH3,HRTIM_CHC2,LPUART1_RX,,,,USART1_RX,,CAN1_TXFD,OTG_FS_ID,MDIOS_MDIO,LCD_B4,DCMI_D1,LCD_B1,EVENTOUT,
-PortA,PA11,,TIM1_CH4,HRTIM_CHD1,LPUART1_CTS,,SPI2_NSS/I2S2_WS,UART4_RX,USART1_CTS/USART1_NSS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT,
-PortA,PA12,,TIM1_ETR,HRTIM_CHD2,LPUART1_RTS,,SPI2_SCK/I2S2_CK,UART4_TX,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,HRTIM_FLT1,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,SPI6_NSS,UART4_RTS,,,UART7_TX,,,,EVENTOUT,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,DFSDM_CKOUT,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,LCD_G1,EVENTOUT,ADC12_INN5/ADC12_INP9
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM_DATIN1,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,LCD_G0,EVENTOUT,ADC12_INP5
-PortB,PB2,,,SAI1_D1,,DFSDM_CKIN1,,SAI1_SD_A,SPI3_MOSI/I2S3_SDO,SAI4_SD_A,QUADSPI_CLK,SAI4_D1,ETH_TX_ER,,,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,HRTIM_FLT4,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,SPI6_SCK,SDMMC2_D2,,UART7_RX,,,,EVENTOUT,
-PortB,PB4,NJTRST,TIM16_BKIN,TIM3_CH1,HRTIM_EEV6,,SPI1_MISO/I2S1_SDI,SPI3_MISO/I2S3_SDI,SPI2_NSS/I2S2_WS,SPI6_MISO,SDMMC2_D3,,UART7_TX,,,,EVENTOUT,
-PortB,PB5,,TIM17_BKIN,TIM3_CH2,HRTIM_EEV7,I2C1_SMBA,SPI1_MOSI/I2S1_SDO,I2C4_SMBA,SPI3_MOSI/I2S3_SDO,SPI6_MOSI,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,UART5_RX,EVENTOUT,
-PortB,PB6,,TIM16_CH1N,TIM4_CH1,HRTIM_EEV8,I2C1_SCL,HDMI_CEC,I2C4_SCL,USART1_TX,LPUART1_TX,CAN2_TX,QUADSPI_BK1_NCS,DFSDM_DATIN5,FMC_SDNE1,DCMI_D5,UART5_TX,EVENTOUT,
-PortB,PB7,,TIM17_CH1N,TIM4_CH2,HRTIM_EEV9,I2C1_SDA,,I2C4_SDA,USART1_RX,LPUART1_RX,CAN2_TXFD,,DFSDM_CKIN5,FMC_NL,DCMI_VSYNC,,EVENTOUT,
-PortB,PB8,,TIM16_CH1,TIM4_CH3,DFSDM_CKIN7,I2C1_SCL,,I2C4_SCL,SDMMC1_CKIN,UART4_RX,CAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT,
-PortB,PB9,,TIM17_CH1,TIM4_CH4,DFSDM_DATIN7,I2C1_SDA,SPI2_NSS/I2S2_WS,I2C4_SDA,SDMMC1_CDIR,UART4_TX,CAN1_TX,SDMMC2_D5,I2C4_SMBA,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT,
-PortB,PB10,,TIM2_CH3,HRTIM_SCOUT,LPTIM2_IN1,I2C2_SCL,SPI2_SCK/I2S2_CK,DFSDM_DATIN7,USART3_TX,,QUADSPI_BK1_NCS,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
-PortB,PB11,,TIM2_CH4,HRTIM_SCIN,LPTIM2_ETR,I2C2_SDA,,DFSDM_CKIN7,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,DFSDM_DATIN1,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,TIM1_BKIN_COMP12,UART5_RX,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,LPTIM2_OUT,,SPI2_SCK/I2S2_CK,DFSDM_CKIN1,USART3_CTS/USART3_NSS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,UART5_TX,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,TIM12_CH1,TIM8_CH2N,USART1_TX,SPI2_MISO/I2S2_SDI,DFSDM_DATIN2,USART3_RTS,UART4_RTS,SDMMC2_D0,,,OTG_HS_DM,,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,TIM12_CH2,TIM8_CH3N,USART1_RX,SPI2_MOSI/I2S2_SDO,DFSDM_CKIN2,,UART4_CTS,SDMMC2_D1,,,OTG_HS_DP,,,EVENTOUT,
-PortC,PC0,,,,DFSDM_CKIN0,,,DFSDM_DATIN4,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT,ADC123_INP10
-PortC,PC1,TRACED0,,SAI1_D1,DFSDM_DATIN0,DFSDM_CKIN4,SPI2_MOSI/I2S2_SDO,SAI1_SD_A,,SAI4_SD_A,SDMMC2_CK,SAI4_D1,ETH_MDC,MDIOS_MDC,,,EVENTOUT,ADC123_INN10/ADC123_INP11
-PortC,PC2,,,,DFSDM_CKIN1,,SPI2_MISO/I2S2_SDI,DFSDM_CKOUT,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_INN11/ADC123_INP12/ADC3_INN1/ADC3_INP0
-PortC,PC3,,,,DFSDM_DATIN1,,SPI2_MOSI/I2S2_SDO,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC12_INN12/ADC12_INP13/ADC3_INP1
-PortC,PC4,,,,DFSDM_CKIN2,,I2S1_MCK,,,,SPDIFRX_IN2,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT,ADC12_INP4
-PortC,PC5,,,SAI1_D3,DFSDM_DATIN2,,,,,,SPDIFRX_IN3,SAI4_D3,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,COMP_1_OUT,,EVENTOUT,ADC12_INN4/ADC12_INP8
-PortC,PC6,,HRTIM_CHA1,TIM3_CH1,TIM8_CH1,DFSDM_CKIN3,I2S2_MCK,,USART6_TX,SDMMC1_D0DIR,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT,
-PortC,PC7,TRGIO,HRTIM_CHA2,TIM3_CH2,TIM8_CH2,DFSDM_DATIN3,,I2S3_MCK,USART6_RX,SDMMC1_D123DIR,FMC_NE1,SDMMC2_D7,SWPMI_TX,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT,
-PortC,PC8,TRACED1,HRTIM_CHB1,TIM3_CH3,TIM8_CH3,,,,USART6_CK,UART5_RTS,FMC_NE2/FMC_NCE,,SWPMI_RX,SDMMC1_D0,DCMI_D2,,EVENTOUT,
-PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,UART5_CTS,QUADSPI_BK1_IO0,LCD_G3,SWPMI_SUSPEND,SDMMC1_D1,DCMI_D3,LCD_B2,EVENTOUT,
-PortC,PC10,,,HRTIM_EEV1,DFSDM_CKIN5,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT,
-PortC,PC11,,,HRTIM_FLT2,DFSDM_DATIN5,,,SPI3_MISO/I2S3_SDI,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT,
-PortC,PC12,TRACED3,,HRTIM_EEV2,,,,SPI3_MOSI/I2S3_SDO,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,DFSDM_CKIN6,,,SAI3_SCK_A,,UART4_RX,CAN1_RX,,,FMC_D2/FMC_DA2,,,EVENTOUT,
-PortD,PD1,,,,DFSDM_DATIN6,,,SAI3_SD_A,,UART4_TX,CAN1_TX,,,FMC_D3/FMC_DA3,,,EVENTOUT,
-PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT,
-PortD,PD3,,,,DFSDM_CKOUT,,SPI2_SCK/I2S2_CK,,USART2_CTS/USART2_NSS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT,
-PortD,PD4,,,HRTIM_FLT3,,,,SAI3_FS_A,USART2_RTS,,CAN1_RXFD,,,FMC_NOE,,,EVENTOUT,
-PortD,PD5,,,HRTIM_EEV3,,,,,USART2_TX,,CAN1_TXFD,,,FMC_NWE,,,EVENTOUT,
-PortD,PD6,,,SAI1_D1,DFSDM_CKIN4,DFSDM_DATIN1,SPI3_MOSI/I2S3_SDO,SAI1_SD_A,USART2_RX,SAI4_SD_A,CAN2_RXFD,SAI4_D1,SDMMC2_CK,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT,
-PortD,PD7,,,,DFSDM_DATIN4,,SPI1_MOSI/I2S1_SDO,DFSDM_CKIN1,USART2_CK,,SPDIFRX_IN0,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT,
-PortD,PD8,,,,DFSDM_CKIN3,,,SAI3_SCK_B,USART3_TX,,SPDIFRX_IN1,,,FMC_D13/FMC_DA13,,,EVENTOUT,
-PortD,PD9,,,,DFSDM_DATIN3,,,SAI3_SD_B,USART3_RX,,CAN2_RXFD,,,FMC_D14/FMC_DA14,,,EVENTOUT,
-PortD,PD10,,,,DFSDM_CKOUT,,,SAI3_FS_B,USART3_CK,,CAN2_TXFD,,,FMC_D15/FMC_DA15,,LCD_B3,EVENTOUT,
-PortD,PD11,,,,LPTIM2_IN2,I2C4_SMBA,,,USART3_CTS/USART3_NSS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16,,,EVENTOUT,
-PortD,PD12,,LPTIM1_IN1,TIM4_CH1,LPTIM2_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17,,,EVENTOUT,
-PortD,PD13,,LPTIM1_OUT,TIM4_CH2,,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,SAI3_MCLK_B,,UART8_CTS,,,,FMC_D0/FMC_DA0,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,SAI3_MCLK_A,,UART8_RTS,,,,FMC_D1/FMC_DA1,,,EVENTOUT,
-PortE,PE0,,LPTIM1_ETR,TIM4_ETR,HRTIM_SCIN,LPTIM2_ETR,,,,UART8_RX,CAN1_RXFD,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT,
-PortE,PE1,,LPTIM1_IN2,,HRTIM_SCOUT,,,,,UART8_TX,CAN1_TXFD,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
-PortE,PE2,TRACECLK,,SAI1_CK1,,,SPI4_SCK,SAI1_MCLK_A,,SAI4_MCLK_A,QUADSPI_BK1_IO2,SAI4_CK1,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
-PortE,PE3,TRACED0,,,,TIM15_BKIN,,SAI1_SD_B,,SAI4_SD_B,,,,FMC_A19,,,EVENTOUT,
-PortE,PE4,TRACED1,,SAI1_D2,DFSDM_DATIN3,TIM15_CH1N,SPI4_NSS,SAI1_FS_A,,SAI4_FS_A,,SAI4_D2,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
-PortE,PE5,TRACED2,,SAI1_CK2,DFSDM_CKIN3,TIM15_CH1,SPI4_MISO,SAI1_SCK_A,,SAI4_SCK_A,,SAI4_CK2,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
-PortE,PE6,TRACED3,TIM1_BKIN2,SAI1_D1,,TIM15_CH2,SPI4_MOSI,SAI1_SD_A,,SAI4_SD_A,SAI4_D1,SAI2_MCK_B,TIM1_BKIN2_COMP12,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
-PortE,PE7,,TIM1_ETR,,DFSDM_DATIN2,,,,UART7_RX,,,QUADSPI_BK2_IO0,,FMC_D4/FMC_DA4,,,EVENTOUT,
-PortE,PE8,,TIM1_CH1N,,DFSDM_CKIN2,,,,UART7_TX,,,QUADSPI_BK2_IO1,,FMC_D5/FMC_DA5,COMP_2_OUT,,EVENTOUT,
-PortE,PE9,,TIM1_CH1,,DFSDM_CKOUT,,,,UART7_RTS,,,QUADSPI_BK2_IO2,,FMC_D6/FMC_DA6,,,EVENTOUT,
-PortE,PE10,,TIM1_CH2N,,DFSDM_DATIN4,,,,UART7_CTS,,,QUADSPI_BK2_IO3,,FMC_D7/FMC_DA7,,,EVENTOUT,
-PortE,PE11,,TIM1_CH2,,DFSDM_CKIN4,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8/FMC_DA8,,LCD_G3,EVENTOUT,
-PortE,PE12,,TIM1_CH3N,,DFSDM_DATIN5,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9/FMC_DA9,COMP_1_OUT,LCD_B4,EVENTOUT,
-PortE,PE13,,TIM1_CH3,,DFSDM_CKIN5,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10/FMC_DA10,COMP_2_OUT,LCD_DE,EVENTOUT,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11/FMC_DA11,,LCD_CLK,EVENTOUT,
-PortE,PE15,,TIM1_BKIN,,,,HDMI__TIM1_BKIN,,,,,,,FMC_D12/FMC_DA12,TIM1_BKIN_COMP12,LCD_R7,EVENTOUT,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_INP5
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_INN5/ADC3_INP9
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_INP4
-PortF,PF6,,TIM16_CH1,,,,SPI5_NSS,SAI1_SD_B,UART7_RX,SAI4_SD_B,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_INN4/ADC3_INP8
-PortF,PF7,,TIM17_CH1,,,,SPI5_SCK,SAI1_MCLK_B,UART7_TX,SAI4_MCLK_B,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_INP3
-PortF,PF8,,TIM16_CH1N,,,,SPI5_MISO,SAI1_SCK_B,UART7_RTS,SAI4_SCK_B,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_INN3/ADC3_INP7
-PortF,PF9,,TIM17_CH1N,,,,SPI5_MOSI,SAI1_FS_B,UART7_CTS,SAI4_FS_B,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_INP2
-PortF,PF10,,TIM16_BKIN,SAI1_D3,,,,,,,QUADSPI_CLK,SAI4_D3,,,DCMI_D11,LCD_DE,EVENTOUT,ADC3_INN2/ADC3_INP6
-PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,ADC1_INP2
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,ADC1_INN2/ADC1_INP6
-PortF,PF13,,,,DFSDM_DATIN6,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT,ADC2_INP2
-PortF,PF14,,,,DFSDM_CKIN6,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT,ADC2_INN2/ADC2_INP6
-PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
-PortG,PG2,,,,TIM8_BKIN,,,,,,,,TIM8_BKIN_COMP12,FMC_A12,,,EVENTOUT,
-PortG,PG3,,,,TIM8_BKIN2,,,,,,,,TIM8_BKIN2_COMP12,FMC_A13,,,EVENTOUT,
-PortG,PG4,,TIM1_BKIN2,,,,,,,,,,TIM1_BKIN2_COMP12,FMC_A14/FMC_BA0,,,EVENTOUT,
-PortG,PG5,,TIM1_ETR,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
-PortG,PG6,,TIM17_BKIN,HRTIM_CHE1,,,,,,,,QUADSPI_BK1_NCS,,FMC_NE3,DCMI_D12,LCD_R7,EVENTOUT,
-PortG,PG7,,,HRTIM_CHE2,,,,SAI1_MCLK_A,USART6_CK,,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT,
-PortG,PG8,,,,TIM8_ETR,,SPI6_NSS,,USART6_RTS,SPDIFRX_IN2,,,ETH_PPS_OUT,FMC_SDCLK,,LCD_G7,EVENTOUT,
-PortG,PG9,,,,,,SPI1_MISO/I2S1_SDI,,USART6_RX,SPDIFRX_IN3,QUADSPI_BK2_IO2,SAI2_FS_B,,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT,
-PortG,PG10,,,HRTIM_FLT5,,,SPI1_NSS/I2S1_WS,,,,LCD_G3,SAI2_SD_B,,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT,
-PortG,PG11,,,HRTIM_EEV4,,,SPI1_SCK/I2S1_CK,,,SPDIFRX_IN0,,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT,
-PortG,PG12,,LPTIM1_IN1,HRTIM_EEV5,,,SPI6_MISO,,USART6_RTS,SPDIFRX_IN1,LCD_B4,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_NE4,,LCD_B1,EVENTOUT,
-PortG,PG13,TRACED0,LPTIM1_OUT,HRTIM_EEV10,,,SPI6_SCK,,USART6_CTS/USART6_NSS,,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT,
-PortG,PG14,TRACED1,LPTIM1_ETR,,,,SPI6_MOSI,,USART6_TX,,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT,
-PortG,PG15,,,,,,,,USART6_CTS/USART6_NSS,,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH2,,LPTIM1_IN2,,,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT,ADC3_INP13
-PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT,ADC3_INN13/ADC3_INP14
-PortH,PH4,,,,,I2C2_SCL,,,,,LCD_G5,OTG_HS_ULPI_NXT,,,,LCD_G4,EVENTOUT,ADC3_INN14/ADC3_INP15
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,ADC3_INN15/ADC3_INP16
-PortH,PH6,,,TIM12_CH1,,I2C2_SMBA,SPI5_SCK,,,,,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT,
-PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT,
-PortH,PH8,,,TIM5_ETR,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT,
-PortH,PH9,,,TIM12_CH2,,I2C3_SMBA,,,,,,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT,
-PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT,
-PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT,
-PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT,
-PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT,
-PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,CAN1_RX,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT,
-PortH,PH15,,,,TIM8_CH3N,,,,,,CAN1_TXFD,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,CAN1_RXFD,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT,
-PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,TIM8_BKIN2_COMP12,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO/I2S2_SDI,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SDO,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,TIM8_BKIN_COMP12,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT,
-PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT,
-PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT,
-PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
-PortI,PI9,,,,,,,,,UART4_RX,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT,
-PortI,PI10,,,,,,,,,,CAN1_RXFD,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT,
-PortI,PI11,,,,,,,,,,LCD_G6,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
-PortI,PI12,,,,,,,,,,,,ETH_TX_ER,,,LCD_HSYNC,EVENTOUT,
-PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT,
-PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT,
-PortI,PI15,,,,,,,,,,LCD_G2,,,,,LCD_R0,EVENTOUT,
-PortJ,PJ0,,,,,,,,,,LCD_R7,,,,,LCD_R1,EVENTOUT,
-PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT,
-PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT,
-PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT,
-PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT,
-PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT,
-PortJ,PJ6,,,,TIM8_CH2,,,,,,,,,,,LCD_R7,EVENTOUT,
-PortJ,PJ7,TRGIN,,,TIM8_CH2N,,,,,,,,,,,LCD_G0,EVENTOUT,
-PortJ,PJ8,,TIM1_CH3N,,TIM8_CH1,,,,,UART8_TX,,,,,,LCD_G1,EVENTOUT,
-PortJ,PJ9,,TIM1_CH3,,TIM8_CH1N,,,,,UART8_RX,,,,,,LCD_G2,EVENTOUT,
-PortJ,PJ10,,TIM1_CH2N,,TIM8_CH2,,SPI5_MOSI,,,,,,,,,LCD_G3,EVENTOUT,
-PortJ,PJ11,,TIM1_CH2,,TIM8_CH2N,,SPI5_MISO,,,,,,,,,LCD_G4,EVENTOUT,
-PortJ,PJ12,TRGOUT,,,,,,,,,LCD_G3,,,,,LCD_B0,EVENTOUT,
-PortJ,PJ13,,,,,,,,,,LCD_B4,,,,,LCD_B1,EVENTOUT,
-PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT,
-PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT,
-PortK,PK0,,TIM1_CH1N,,TIM8_CH3,,SPI5_SCK,,,,,,,,,LCD_G5,EVENTOUT,
-PortK,PK1,,TIM1_CH1,,TIM8_CH3N,,SPI5_NSS,,,,,,,,,LCD_G6,EVENTOUT,
-PortK,PK2,,TIM1_BKIN,,TIM8_BKIN,,,,,,,TIM8_BKIN_COMP12,TIM1_BKIN_COMP12,,,LCD_G7,EVENTOUT,
-PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT,
-PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT,
-PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT,
-PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT,
-PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT,
+Port ,Pin ,AF0          ,AF1                       ,AF2                    ,AF3                                  ,AF4                                     ,AF5               ,AF6                           ,AF7                               ,AF8                                        ,AF9                                                  ,AF10                                          ,AF11                                           ,AF12                               ,AF13              ,AF14     ,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2/16/17/LPTIM1/HRTIM1,SAI1/TIM3/4/5/12/HRTIM1,LPUART/TIM8/LPTIM2/3/4/5/HRTIM1/DFSDM,I2C1/2/3/4/USART1/TIM15/LPTIM2/DFSDM/CEC,SPI1/2/3/4/5/6/CEC,SPI2/3/SAI1/3/I2C4/UART4/DFSDM,SPI2/3/6/USART1/2/3/6/UART7/SDMMC1,SPI6/SAI2/4/UART4/5/8/LPUART/SDMMC1/SPDIFRX,SAI4/FDCAN1/2/TIM13/14/QUADSPI/FMC/SDMMC2/LCD/SPDIFRX,SAI2/4/TIM8/QUADSPI/SDMMC2/OTG1_HS/OTG2_FS/LCD,I2C4/UART7/SWPMI1/TIM1/8/DFSDM/SDMMC2/MDIOS/ETH,TIM1/8/FMC/SDMMC1/MDIOS/OTG1_FS/LCD,TIM1/DCMI/LCD/COMP,UART5/LCD,SYS     ,ADC
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR         ,TIM5_CH1               ,TIM8_ETR                             ,TIM15_BKIN                              ,                  ,                              ,USART2_CTS/USART2_NSS             ,UART4_TX                                   ,SDMMC2_CMD                                           ,SAI2_SD_B                                     ,ETH_MII_CRS                                    ,                                   ,                  ,         ,EVENTOUT,ADC1_INP16/ADC12_INN1/ADC12_INP0
+PortA,PA1 ,             ,TIM2_CH2                  ,TIM5_CH2               ,LPTIM3_OUT                           ,TIM15_CH1N                              ,                  ,                              ,USART2_RTS                        ,UART4_RX                                   ,QUADSPI_BK1_IO3                                      ,SAI2_MCK_B                                    ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK                ,                                   ,                  ,LCD_R2   ,EVENTOUT,ADC1_INN16/ADC1_INP17/ADC12_INP1
+PortA,PA2 ,             ,TIM2_CH3                  ,TIM5_CH3               ,LPTIM4_OUT                           ,TIM15_CH1                               ,                  ,                              ,USART2_TX                         ,SAI2_SCK_B                                 ,                                                     ,                                              ,ETH_MDIO                                       ,MDIOS_MDIO                         ,                  ,LCD_R1   ,EVENTOUT,ADC12_INP14
+PortA,PA3 ,             ,TIM2_CH4                  ,TIM5_CH4               ,LPTIM5_OUT                           ,TIM15_CH2                               ,                  ,                              ,USART2_RX                         ,                                           ,LCD_B2                                               ,OTG_HS_ULPI_D0                                ,ETH_MII_COL                                    ,                                   ,                  ,LCD_B5   ,EVENTOUT,ADC12_INP15
+PortA,PA4 ,             ,                          ,TIM5_ETR               ,                                     ,                                        ,SPI1_NSS/I2S1_WS  ,SPI3_NSS/I2S3_WS              ,USART2_CK                         ,SPI6_NSS                                   ,                                                     ,                                              ,                                               ,OTG_HS_SOF                         ,DCMI_HSYNC        ,LCD_VSYNC,EVENTOUT,ADC12_INP18
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR         ,                       ,TIM8_CH1N                            ,                                        ,SPI1_SCK/I2S1_CK  ,                              ,                                  ,SPI6_SCK                                   ,                                                     ,OTG_HS_ULPI_CK                                ,                                               ,                                   ,                  ,LCD_R4   ,EVENTOUT,ADC12_INN18/ADC12_INP19
+PortA,PA6 ,             ,TIM1_BKIN                 ,TIM3_CH1               ,TIM8_BKIN                            ,                                        ,SPI1_MISO/I2S1_SDI,                              ,                                  ,SPI6_MISO                                  ,TIM13_CH1                                            ,TIM8_BKIN_COMP12                              ,MDIOS_MDC                                      ,TIM1_BKIN_COMP12                   ,DCMI_PIXCLK       ,LCD_G2   ,EVENTOUT,ADC12_INP3
+PortA,PA7 ,             ,TIM1_CH1N                 ,TIM3_CH2               ,TIM8_CH1N                            ,                                        ,SPI1_MOSI/I2S1_SDO,                              ,                                  ,SPI6_MOSI                                  ,TIM14_CH1                                            ,                                              ,ETH_MII_RX_DV/ETH_RMII_CRS_DV                  ,FMC_SDNWE                          ,                  ,         ,EVENTOUT,ADC12_INN3/ADC12_INP7
+PortA,PA8 ,MCO1         ,TIM1_CH1                  ,HRTIM_CHB2             ,TIM8_BKIN2                           ,I2C3_SCL                                ,                  ,                              ,USART1_CK                         ,                                           ,                                                     ,OTG_FS_SOF                                    ,UART7_RX                                       ,TIM8_BKIN2_COMP12                  ,LCD_B3            ,LCD_R6   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2                  ,HRTIM_CHC1             ,LPUART1_TX                           ,I2C3_SMBA                               ,SPI2_SCK/I2S2_CK  ,                              ,USART1_TX                         ,                                           ,CAN1_RXFD                                            ,                                              ,ETH_TX_ER                                      ,                                   ,DCMI_D0           ,LCD_R5   ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3                  ,HRTIM_CHC2             ,LPUART1_RX                           ,                                        ,                  ,                              ,USART1_RX                         ,                                           ,CAN1_TXFD                                            ,OTG_FS_ID                                     ,MDIOS_MDIO                                     ,LCD_B4                             ,DCMI_D1           ,LCD_B1   ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4                  ,HRTIM_CHD1             ,LPUART1_CTS                          ,                                        ,SPI2_NSS/I2S2_WS  ,UART4_RX                      ,USART1_CTS/USART1_NSS             ,                                           ,CAN1_RX                                              ,OTG_FS_DM                                     ,                                               ,                                   ,                  ,LCD_R4   ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR                  ,HRTIM_CHD2             ,LPUART1_RTS                          ,                                        ,SPI2_SCK/I2S2_CK  ,UART4_TX                      ,USART1_RTS                        ,SAI2_FS_B                                  ,CAN1_TX                                              ,OTG_FS_DP                                     ,                                               ,                                   ,                  ,LCD_R5   ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR         ,HRTIM_FLT1             ,                                     ,HDMI_CEC                                ,SPI1_NSS/I2S1_WS  ,SPI3_NSS/I2S3_WS              ,SPI6_NSS                          ,UART4_RTS                                  ,                                                     ,                                              ,UART7_TX                                       ,                                   ,                  ,         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N                 ,TIM3_CH3               ,TIM8_CH2N                            ,                                        ,                  ,DFSDM_CKOUT                   ,                                  ,UART4_CTS                                  ,LCD_R3                                               ,OTG_HS_ULPI_D1                                ,ETH_MII_RXD2                                   ,                                   ,                  ,LCD_G1   ,EVENTOUT,ADC12_INN5/ADC12_INP9
+PortB,PB1 ,             ,TIM1_CH3N                 ,TIM3_CH4               ,TIM8_CH3N                            ,                                        ,                  ,DFSDM_DATIN1                  ,                                  ,                                           ,LCD_R6                                               ,OTG_HS_ULPI_D2                                ,ETH_MII_RXD3                                   ,                                   ,                  ,LCD_G0   ,EVENTOUT,ADC12_INP5
+PortB,PB2 ,             ,                          ,SAI1_D1                ,                                     ,DFSDM_CKIN1                             ,                  ,SAI1_SD_A                     ,SPI3_MOSI/I2S3_SDO                ,SAI4_SD_A                                  ,QUADSPI_CLK                                          ,SAI4_D1                                       ,ETH_TX_ER                                      ,                                   ,                  ,         ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2                  ,HRTIM_FLT4             ,                                     ,                                        ,SPI1_SCK/I2S1_CK  ,SPI3_SCK/I2S3_CK              ,                                  ,SPI6_SCK                                   ,SDMMC2_D2                                            ,                                              ,UART7_RX                                       ,                                   ,                  ,         ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,TIM16_BKIN                ,TIM3_CH1               ,HRTIM_EEV6                           ,                                        ,SPI1_MISO/I2S1_SDI,SPI3_MISO/I2S3_SDI            ,SPI2_NSS/I2S2_WS                  ,SPI6_MISO                                  ,SDMMC2_D3                                            ,                                              ,UART7_TX                                       ,                                   ,                  ,         ,EVENTOUT,
+PortB,PB5 ,             ,TIM17_BKIN                ,TIM3_CH2               ,HRTIM_EEV7                           ,I2C1_SMBA                               ,SPI1_MOSI/I2S1_SDO,I2C4_SMBA                     ,SPI3_MOSI/I2S3_SDO                ,SPI6_MOSI                                  ,CAN2_RX                                              ,OTG_HS_ULPI_D7                                ,ETH_PPS_OUT                                    ,FMC_SDCKE1                         ,DCMI_D10          ,UART5_RX ,EVENTOUT,
+PortB,PB6 ,             ,TIM16_CH1N                ,TIM4_CH1               ,HRTIM_EEV8                           ,I2C1_SCL                                ,HDMI_CEC          ,I2C4_SCL                      ,USART1_TX                         ,LPUART1_TX                                 ,CAN2_TX                                              ,QUADSPI_BK1_NCS                               ,DFSDM_DATIN5                                   ,FMC_SDNE1                          ,DCMI_D5           ,UART5_TX ,EVENTOUT,
+PortB,PB7 ,             ,TIM17_CH1N                ,TIM4_CH2               ,HRTIM_EEV9                           ,I2C1_SDA                                ,                  ,I2C4_SDA                      ,USART1_RX                         ,LPUART1_RX                                 ,CAN2_TXFD                                            ,                                              ,DFSDM_CKIN5                                    ,FMC_NL                             ,DCMI_VSYNC        ,         ,EVENTOUT,
+PortB,PB8 ,             ,TIM16_CH1                 ,TIM4_CH3               ,DFSDM_CKIN7                          ,I2C1_SCL                                ,                  ,I2C4_SCL                      ,SDMMC1_CKIN                       ,UART4_RX                                   ,CAN1_RX                                              ,SDMMC2_D4                                     ,ETH_MII_TXD3                                   ,SDMMC1_D4                          ,DCMI_D6           ,LCD_B6   ,EVENTOUT,
+PortB,PB9 ,             ,TIM17_CH1                 ,TIM4_CH4               ,DFSDM_DATIN7                         ,I2C1_SDA                                ,SPI2_NSS/I2S2_WS  ,I2C4_SDA                      ,SDMMC1_CDIR                       ,UART4_TX                                   ,CAN1_TX                                              ,SDMMC2_D5                                     ,I2C4_SMBA                                      ,SDMMC1_D5                          ,DCMI_D7           ,LCD_B7   ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3                  ,HRTIM_SCOUT            ,LPTIM2_IN1                           ,I2C2_SCL                                ,SPI2_SCK/I2S2_CK  ,DFSDM_DATIN7                  ,USART3_TX                         ,                                           ,QUADSPI_BK1_NCS                                      ,OTG_HS_ULPI_D3                                ,ETH_MII_RX_ER                                  ,                                   ,                  ,LCD_G4   ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4                  ,HRTIM_SCIN             ,LPTIM2_ETR                           ,I2C2_SDA                                ,                  ,DFSDM_CKIN7                   ,USART3_RX                         ,                                           ,                                                     ,OTG_HS_ULPI_D4                                ,ETH_MII_TX_EN/ETH_RMII_TX_EN                   ,                                   ,                  ,LCD_G5   ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN                 ,                       ,                                     ,I2C2_SMBA                               ,SPI2_NSS/I2S2_WS  ,DFSDM_DATIN1                  ,USART3_CK                         ,                                           ,CAN2_RX                                              ,OTG_HS_ULPI_D5                                ,ETH_MII_TXD0/ETH_RMII_TXD0                     ,OTG_HS_ID                          ,TIM1_BKIN_COMP12  ,UART5_RX ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N                 ,                       ,LPTIM2_OUT                           ,                                        ,SPI2_SCK/I2S2_CK  ,DFSDM_CKIN1                   ,USART3_CTS/USART3_NSS             ,                                           ,CAN2_TX                                              ,OTG_HS_ULPI_D6                                ,ETH_MII_TXD1/ETH_RMII_TXD1                     ,                                   ,                  ,UART5_TX ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N                 ,TIM12_CH1              ,TIM8_CH2N                            ,USART1_TX                               ,SPI2_MISO/I2S2_SDI,DFSDM_DATIN2                  ,USART3_RTS                        ,UART4_RTS                                  ,SDMMC2_D0                                            ,                                              ,                                               ,OTG_HS_DM                          ,                  ,         ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N                 ,TIM12_CH2              ,TIM8_CH3N                            ,USART1_RX                               ,SPI2_MOSI/I2S2_SDO,DFSDM_CKIN2                   ,                                  ,UART4_CTS                                  ,SDMMC2_D1                                            ,                                              ,                                               ,OTG_HS_DP                          ,                  ,         ,EVENTOUT,
+PortC,PC0 ,             ,                          ,                       ,DFSDM_CKIN0                          ,                                        ,                  ,DFSDM_DATIN4                  ,                                  ,SAI2_FS_B                                  ,                                                     ,OTG_HS_ULPI_STP                               ,                                               ,FMC_SDNWE                          ,                  ,LCD_R5   ,EVENTOUT,ADC123_INP10
+PortC,PC1 ,TRACED0      ,                          ,SAI1_D1                ,DFSDM_DATIN0                         ,DFSDM_CKIN4                             ,SPI2_MOSI/I2S2_SDO,SAI1_SD_A                     ,                                  ,SAI4_SD_A                                  ,SDMMC2_CK                                            ,SAI4_D1                                       ,ETH_MDC                                        ,MDIOS_MDC                          ,                  ,         ,EVENTOUT,ADC123_INN10/ADC123_INP11
+PortC,PC2 ,             ,                          ,                       ,DFSDM_CKIN1                          ,                                        ,SPI2_MISO/I2S2_SDI,DFSDM_CKOUT                   ,                                  ,                                           ,                                                     ,OTG_HS_ULPI_DIR                               ,ETH_MII_TXD2                                   ,FMC_SDNE0                          ,                  ,         ,EVENTOUT,ADC123_INN11/ADC123_INP12/ADC3_INN1/ADC3_INP0
+PortC,PC3 ,             ,                          ,                       ,DFSDM_DATIN1                         ,                                        ,SPI2_MOSI/I2S2_SDO,                              ,                                  ,                                           ,                                                     ,OTG_HS_ULPI_NXT                               ,ETH_MII_TX_CLK                                 ,FMC_SDCKE0                         ,                  ,         ,EVENTOUT,ADC12_INN12/ADC12_INP13/ADC3_INP1
+PortC,PC4 ,             ,                          ,                       ,DFSDM_CKIN2                          ,                                        ,I2S1_MCK          ,                              ,                                  ,                                           ,SPDIFRX_IN2                                          ,                                              ,ETH_MII_RXD0/ETH_RMII_RXD0                     ,FMC_SDNE0                          ,                  ,         ,EVENTOUT,ADC12_INP4
+PortC,PC5 ,             ,                          ,SAI1_D3                ,DFSDM_DATIN2                         ,                                        ,                  ,                              ,                                  ,                                           ,SPDIFRX_IN3                                          ,SAI4_D3                                       ,ETH_MII_RXD1/ETH_RMII_RXD1                     ,FMC_SDCKE0                         ,COMP_1_OUT        ,         ,EVENTOUT,ADC12_INN4/ADC12_INP8
+PortC,PC6 ,             ,HRTIM_CHA1                ,TIM3_CH1               ,TIM8_CH1                             ,DFSDM_CKIN3                             ,I2S2_MCK          ,                              ,USART6_TX                         ,SDMMC1_D0DIR                               ,FMC_NWAIT                                            ,SDMMC2_D6                                     ,                                               ,SDMMC1_D6                          ,DCMI_D0           ,LCD_HSYNC,EVENTOUT,
+PortC,PC7 ,TRGIO        ,HRTIM_CHA2                ,TIM3_CH2               ,TIM8_CH2                             ,DFSDM_DATIN3                            ,                  ,I2S3_MCK                      ,USART6_RX                         ,SDMMC1_D123DIR                             ,FMC_NE1                                              ,SDMMC2_D7                                     ,SWPMI_TX                                       ,SDMMC1_D7                          ,DCMI_D1           ,LCD_G6   ,EVENTOUT,
+PortC,PC8 ,TRACED1      ,HRTIM_CHB1                ,TIM3_CH3               ,TIM8_CH3                             ,                                        ,                  ,                              ,USART6_CK                         ,UART5_RTS                                  ,FMC_NE2/FMC_NCE                                      ,                                              ,SWPMI_RX                                       ,SDMMC1_D0                          ,DCMI_D2           ,         ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                          ,TIM3_CH4               ,TIM8_CH4                             ,I2C3_SDA                                ,I2S_CKIN          ,                              ,                                  ,UART5_CTS                                  ,QUADSPI_BK1_IO0                                      ,LCD_G3                                        ,SWPMI_SUSPEND                                  ,SDMMC1_D1                          ,DCMI_D3           ,LCD_B2   ,EVENTOUT,
+PortC,PC10,             ,                          ,HRTIM_EEV1             ,DFSDM_CKIN5                          ,                                        ,                  ,SPI3_SCK/I2S3_CK              ,USART3_TX                         ,UART4_TX                                   ,QUADSPI_BK1_IO1                                      ,                                              ,                                               ,SDMMC1_D2                          ,DCMI_D8           ,LCD_R2   ,EVENTOUT,
+PortC,PC11,             ,                          ,HRTIM_FLT2             ,DFSDM_DATIN5                         ,                                        ,                  ,SPI3_MISO/I2S3_SDI            ,USART3_RX                         ,UART4_RX                                   ,QUADSPI_BK2_NCS                                      ,                                              ,                                               ,SDMMC1_D3                          ,DCMI_D4           ,         ,EVENTOUT,
+PortC,PC12,TRACED3      ,                          ,HRTIM_EEV2             ,                                     ,                                        ,                  ,SPI3_MOSI/I2S3_SDO            ,USART3_CK                         ,UART5_TX                                   ,                                                     ,                                              ,                                               ,SDMMC1_CK                          ,DCMI_D9           ,         ,EVENTOUT,
+PortC,PC13,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortC,PC14,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortC,PC15,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortD,PD0 ,             ,                          ,                       ,DFSDM_CKIN6                          ,                                        ,                  ,SAI3_SCK_A                    ,                                  ,UART4_RX                                   ,CAN1_RX                                              ,                                              ,                                               ,FMC_D2/FMC_DA2                     ,                  ,         ,EVENTOUT,
+PortD,PD1 ,             ,                          ,                       ,DFSDM_DATIN6                         ,                                        ,                  ,SAI3_SD_A                     ,                                  ,UART4_TX                                   ,CAN1_TX                                              ,                                              ,                                               ,FMC_D3/FMC_DA3                     ,                  ,         ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                          ,TIM3_ETR               ,                                     ,                                        ,                  ,                              ,                                  ,UART5_RX                                   ,                                                     ,                                              ,                                               ,SDMMC1_CMD                         ,DCMI_D11          ,         ,EVENTOUT,
+PortD,PD3 ,             ,                          ,                       ,DFSDM_CKOUT                          ,                                        ,SPI2_SCK/I2S2_CK  ,                              ,USART2_CTS/USART2_NSS             ,                                           ,                                                     ,                                              ,                                               ,FMC_CLK                            ,DCMI_D5           ,LCD_G7   ,EVENTOUT,
+PortD,PD4 ,             ,                          ,HRTIM_FLT3             ,                                     ,                                        ,                  ,SAI3_FS_A                     ,USART2_RTS                        ,                                           ,CAN1_RXFD                                            ,                                              ,                                               ,FMC_NOE                            ,                  ,         ,EVENTOUT,
+PortD,PD5 ,             ,                          ,HRTIM_EEV3             ,                                     ,                                        ,                  ,                              ,USART2_TX                         ,                                           ,CAN1_TXFD                                            ,                                              ,                                               ,FMC_NWE                            ,                  ,         ,EVENTOUT,
+PortD,PD6 ,             ,                          ,SAI1_D1                ,DFSDM_CKIN4                          ,DFSDM_DATIN1                            ,SPI3_MOSI/I2S3_SDO,SAI1_SD_A                     ,USART2_RX                         ,SAI4_SD_A                                  ,CAN2_RXFD                                            ,SAI4_D1                                       ,SDMMC2_CK                                      ,FMC_NWAIT                          ,DCMI_D10          ,LCD_B2   ,EVENTOUT,
+PortD,PD7 ,             ,                          ,                       ,DFSDM_DATIN4                         ,                                        ,SPI1_MOSI/I2S1_SDO,DFSDM_CKIN1                   ,USART2_CK                         ,                                           ,SPDIFRX_IN0                                          ,                                              ,SDMMC2_CMD                                     ,FMC_NE1                            ,                  ,         ,EVENTOUT,
+PortD,PD8 ,             ,                          ,                       ,DFSDM_CKIN3                          ,                                        ,                  ,SAI3_SCK_B                    ,USART3_TX                         ,                                           ,SPDIFRX_IN1                                          ,                                              ,                                               ,FMC_D13/FMC_DA13                   ,                  ,         ,EVENTOUT,
+PortD,PD9 ,             ,                          ,                       ,DFSDM_DATIN3                         ,                                        ,                  ,SAI3_SD_B                     ,USART3_RX                         ,                                           ,CAN2_RXFD                                            ,                                              ,                                               ,FMC_D14/FMC_DA14                   ,                  ,         ,EVENTOUT,
+PortD,PD10,             ,                          ,                       ,DFSDM_CKOUT                          ,                                        ,                  ,SAI3_FS_B                     ,USART3_CK                         ,                                           ,CAN2_TXFD                                            ,                                              ,                                               ,FMC_D15/FMC_DA15                   ,                  ,LCD_B3   ,EVENTOUT,
+PortD,PD11,             ,                          ,                       ,LPTIM2_IN2                           ,I2C4_SMBA                               ,                  ,                              ,USART3_CTS/USART3_NSS             ,                                           ,QUADSPI_BK1_IO0                                      ,SAI2_SD_A                                     ,                                               ,FMC_A16                            ,                  ,         ,EVENTOUT,
+PortD,PD12,             ,LPTIM1_IN1                ,TIM4_CH1               ,LPTIM2_IN1                           ,I2C4_SCL                                ,                  ,                              ,USART3_RTS                        ,                                           ,QUADSPI_BK1_IO1                                      ,SAI2_FS_A                                     ,                                               ,FMC_A17                            ,                  ,         ,EVENTOUT,
+PortD,PD13,             ,LPTIM1_OUT                ,TIM4_CH2               ,                                     ,I2C4_SDA                                ,                  ,                              ,                                  ,                                           ,QUADSPI_BK1_IO3                                      ,SAI2_SCK_A                                    ,                                               ,FMC_A18                            ,                  ,         ,EVENTOUT,
+PortD,PD14,             ,                          ,TIM4_CH3               ,                                     ,                                        ,                  ,SAI3_MCLK_B                   ,                                  ,UART8_CTS                                  ,                                                     ,                                              ,                                               ,FMC_D0/FMC_DA0                     ,                  ,         ,EVENTOUT,
+PortD,PD15,             ,                          ,TIM4_CH4               ,                                     ,                                        ,                  ,SAI3_MCLK_A                   ,                                  ,UART8_RTS                                  ,                                                     ,                                              ,                                               ,FMC_D1/FMC_DA1                     ,                  ,         ,EVENTOUT,
+PortE,PE0 ,             ,LPTIM1_ETR                ,TIM4_ETR               ,HRTIM_SCIN                           ,LPTIM2_ETR                              ,                  ,                              ,                                  ,UART8_RX                                   ,CAN1_RXFD                                            ,SAI2_MCK_A                                    ,                                               ,FMC_NBL0                           ,DCMI_D2           ,         ,EVENTOUT,
+PortE,PE1 ,             ,LPTIM1_IN2                ,                       ,HRTIM_SCOUT                          ,                                        ,                  ,                              ,                                  ,UART8_TX                                   ,CAN1_TXFD                                            ,                                              ,                                               ,FMC_NBL1                           ,DCMI_D3           ,         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                          ,SAI1_CK1               ,                                     ,                                        ,SPI4_SCK          ,SAI1_MCLK_A                   ,                                  ,SAI4_MCLK_A                                ,QUADSPI_BK1_IO2                                      ,SAI4_CK1                                      ,ETH_MII_TXD3                                   ,FMC_A23                            ,                  ,         ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                          ,                       ,                                     ,TIM15_BKIN                              ,                  ,SAI1_SD_B                     ,                                  ,SAI4_SD_B                                  ,                                                     ,                                              ,                                               ,FMC_A19                            ,                  ,         ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                          ,SAI1_D2                ,DFSDM_DATIN3                         ,TIM15_CH1N                              ,SPI4_NSS          ,SAI1_FS_A                     ,                                  ,SAI4_FS_A                                  ,                                                     ,SAI4_D2                                       ,                                               ,FMC_A20                            ,DCMI_D4           ,LCD_B0   ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                          ,SAI1_CK2               ,DFSDM_CKIN3                          ,TIM15_CH1                               ,SPI4_MISO         ,SAI1_SCK_A                    ,                                  ,SAI4_SCK_A                                 ,                                                     ,SAI4_CK2                                      ,                                               ,FMC_A21                            ,DCMI_D6           ,LCD_G0   ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,TIM1_BKIN2                ,SAI1_D1                ,                                     ,TIM15_CH2                               ,SPI4_MOSI         ,SAI1_SD_A                     ,                                  ,SAI4_SD_A                                  ,SAI4_D1                                              ,SAI2_MCK_B                                    ,TIM1_BKIN2_COMP12                              ,FMC_A22                            ,DCMI_D7           ,LCD_G1   ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR                  ,                       ,DFSDM_DATIN2                         ,                                        ,                  ,                              ,UART7_RX                          ,                                           ,                                                     ,QUADSPI_BK2_IO0                               ,                                               ,FMC_D4/FMC_DA4                     ,                  ,         ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N                 ,                       ,DFSDM_CKIN2                          ,                                        ,                  ,                              ,UART7_TX                          ,                                           ,                                                     ,QUADSPI_BK2_IO1                               ,                                               ,FMC_D5/FMC_DA5                     ,COMP_2_OUT        ,         ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1                  ,                       ,DFSDM_CKOUT                          ,                                        ,                  ,                              ,UART7_RTS                         ,                                           ,                                                     ,QUADSPI_BK2_IO2                               ,                                               ,FMC_D6/FMC_DA6                     ,                  ,         ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N                 ,                       ,DFSDM_DATIN4                         ,                                        ,                  ,                              ,UART7_CTS                         ,                                           ,                                                     ,QUADSPI_BK2_IO3                               ,                                               ,FMC_D7/FMC_DA7                     ,                  ,         ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2                  ,                       ,DFSDM_CKIN4                          ,                                        ,SPI4_NSS          ,                              ,                                  ,                                           ,                                                     ,SAI2_SD_B                                     ,                                               ,FMC_D8/FMC_DA8                     ,                  ,LCD_G3   ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N                 ,                       ,DFSDM_DATIN5                         ,                                        ,SPI4_SCK          ,                              ,                                  ,                                           ,                                                     ,SAI2_SCK_B                                    ,                                               ,FMC_D9/FMC_DA9                     ,COMP_1_OUT        ,LCD_B4   ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3                  ,                       ,DFSDM_CKIN5                          ,                                        ,SPI4_MISO         ,                              ,                                  ,                                           ,                                                     ,SAI2_FS_B                                     ,                                               ,FMC_D10/FMC_DA10                   ,COMP_2_OUT        ,LCD_DE   ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4                  ,                       ,                                     ,                                        ,SPI4_MOSI         ,                              ,                                  ,                                           ,                                                     ,SAI2_MCK_B                                    ,                                               ,FMC_D11/FMC_DA11                   ,                  ,LCD_CLK  ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN                 ,                       ,                                     ,                                        ,HDMI__TIM1_BKIN   ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_D12/FMC_DA12                   ,TIM1_BKIN_COMP12  ,LCD_R7   ,EVENTOUT,
+PortF,PF0 ,             ,                          ,                       ,                                     ,I2C2_SDA                                ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A0                             ,                  ,         ,EVENTOUT,
+PortF,PF1 ,             ,                          ,                       ,                                     ,I2C2_SCL                                ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A1                             ,                  ,         ,EVENTOUT,
+PortF,PF2 ,             ,                          ,                       ,                                     ,I2C2_SMBA                               ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A2                             ,                  ,         ,EVENTOUT,
+PortF,PF3 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A3                             ,                  ,         ,EVENTOUT,ADC3_INP5
+PortF,PF4 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A4                             ,                  ,         ,EVENTOUT,ADC3_INN5/ADC3_INP9
+PortF,PF5 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A5                             ,                  ,         ,EVENTOUT,ADC3_INP4
+PortF,PF6 ,             ,TIM16_CH1                 ,                       ,                                     ,                                        ,SPI5_NSS          ,SAI1_SD_B                     ,UART7_RX                          ,SAI4_SD_B                                  ,QUADSPI_BK1_IO3                                      ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,ADC3_INN4/ADC3_INP8
+PortF,PF7 ,             ,TIM17_CH1                 ,                       ,                                     ,                                        ,SPI5_SCK          ,SAI1_MCLK_B                   ,UART7_TX                          ,SAI4_MCLK_B                                ,QUADSPI_BK1_IO2                                      ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,ADC3_INP3
+PortF,PF8 ,             ,TIM16_CH1N                ,                       ,                                     ,                                        ,SPI5_MISO         ,SAI1_SCK_B                    ,UART7_RTS                         ,SAI4_SCK_B                                 ,TIM13_CH1                                            ,QUADSPI_BK1_IO0                               ,                                               ,                                   ,                  ,         ,EVENTOUT,ADC3_INN3/ADC3_INP7
+PortF,PF9 ,             ,TIM17_CH1N                ,                       ,                                     ,                                        ,SPI5_MOSI         ,SAI1_FS_B                     ,UART7_CTS                         ,SAI4_FS_B                                  ,TIM14_CH1                                            ,QUADSPI_BK1_IO1                               ,                                               ,                                   ,                  ,         ,EVENTOUT,ADC3_INP2
+PortF,PF10,             ,TIM16_BKIN                ,SAI1_D3                ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,QUADSPI_CLK                                          ,SAI4_D3                                       ,                                               ,                                   ,DCMI_D11          ,LCD_DE   ,EVENTOUT,ADC3_INN2/ADC3_INP6
+PortF,PF11,             ,                          ,                       ,                                     ,                                        ,SPI5_MOSI         ,                              ,                                  ,                                           ,                                                     ,SAI2_SD_B                                     ,                                               ,FMC_SDNRAS                         ,DCMI_D12          ,         ,EVENTOUT,ADC1_INP2
+PortF,PF12,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A6                             ,                  ,         ,EVENTOUT,ADC1_INN2/ADC1_INP6
+PortF,PF13,             ,                          ,                       ,DFSDM_DATIN6                         ,I2C4_SMBA                               ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A7                             ,                  ,         ,EVENTOUT,ADC2_INP2
+PortF,PF14,             ,                          ,                       ,DFSDM_CKIN6                          ,I2C4_SCL                                ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A8                             ,                  ,         ,EVENTOUT,ADC2_INN2/ADC2_INP6
+PortF,PF15,             ,                          ,                       ,                                     ,I2C4_SDA                                ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A9                             ,                  ,         ,EVENTOUT,
+PortG,PG0 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A10                            ,                  ,         ,EVENTOUT,
+PortG,PG1 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A11                            ,                  ,         ,EVENTOUT,
+PortG,PG2 ,             ,                          ,                       ,TIM8_BKIN                            ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,TIM8_BKIN_COMP12                               ,FMC_A12                            ,                  ,         ,EVENTOUT,
+PortG,PG3 ,             ,                          ,                       ,TIM8_BKIN2                           ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,TIM8_BKIN2_COMP12                              ,FMC_A13                            ,                  ,         ,EVENTOUT,
+PortG,PG4 ,             ,TIM1_BKIN2                ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,TIM1_BKIN2_COMP12                              ,FMC_A14/FMC_BA0                    ,                  ,         ,EVENTOUT,
+PortG,PG5 ,             ,TIM1_ETR                  ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_A15/FMC_BA1                    ,                  ,         ,EVENTOUT,
+PortG,PG6 ,             ,TIM17_BKIN                ,HRTIM_CHE1             ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,QUADSPI_BK1_NCS                               ,                                               ,FMC_NE3                            ,DCMI_D12          ,LCD_R7   ,EVENTOUT,
+PortG,PG7 ,             ,                          ,HRTIM_CHE2             ,                                     ,                                        ,                  ,SAI1_MCLK_A                   ,USART6_CK                         ,                                           ,                                                     ,                                              ,                                               ,FMC_INT                            ,DCMI_D13          ,LCD_CLK  ,EVENTOUT,
+PortG,PG8 ,             ,                          ,                       ,TIM8_ETR                             ,                                        ,SPI6_NSS          ,                              ,USART6_RTS                        ,SPDIFRX_IN2                                ,                                                     ,                                              ,ETH_PPS_OUT                                    ,FMC_SDCLK                          ,                  ,LCD_G7   ,EVENTOUT,
+PortG,PG9 ,             ,                          ,                       ,                                     ,                                        ,SPI1_MISO/I2S1_SDI,                              ,USART6_RX                         ,SPDIFRX_IN3                                ,QUADSPI_BK2_IO2                                      ,SAI2_FS_B                                     ,                                               ,FMC_NE2/FMC_NCE                    ,DCMI_VSYNC        ,         ,EVENTOUT,
+PortG,PG10,             ,                          ,HRTIM_FLT5             ,                                     ,                                        ,SPI1_NSS/I2S1_WS  ,                              ,                                  ,                                           ,LCD_G3                                               ,SAI2_SD_B                                     ,                                               ,FMC_NE3                            ,DCMI_D2           ,LCD_B2   ,EVENTOUT,
+PortG,PG11,             ,                          ,HRTIM_EEV4             ,                                     ,                                        ,SPI1_SCK/I2S1_CK  ,                              ,                                  ,SPDIFRX_IN0                                ,                                                     ,SDMMC2_D2                                     ,ETH_MII_TX_EN/ETH_RMII_TX_EN                   ,                                   ,DCMI_D3           ,LCD_B3   ,EVENTOUT,
+PortG,PG12,             ,LPTIM1_IN1                ,HRTIM_EEV5             ,                                     ,                                        ,SPI6_MISO         ,                              ,USART6_RTS                        ,SPDIFRX_IN1                                ,LCD_B4                                               ,                                              ,ETH_MII_TXD1/ETH_RMII_TXD1                     ,FMC_NE4                            ,                  ,LCD_B1   ,EVENTOUT,
+PortG,PG13,TRACED0      ,LPTIM1_OUT                ,HRTIM_EEV10            ,                                     ,                                        ,SPI6_SCK          ,                              ,USART6_CTS/USART6_NSS             ,                                           ,                                                     ,                                              ,ETH_MII_TXD0/ETH_RMII_TXD0                     ,FMC_A24                            ,                  ,LCD_R0   ,EVENTOUT,
+PortG,PG14,TRACED1      ,LPTIM1_ETR                ,                       ,                                     ,                                        ,SPI6_MOSI         ,                              ,USART6_TX                         ,                                           ,QUADSPI_BK2_IO3                                      ,                                              ,ETH_MII_TXD1/ETH_RMII_TXD1                     ,FMC_A25                            ,                  ,LCD_B0   ,EVENTOUT,
+PortG,PG15,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,USART6_CTS/USART6_NSS             ,                                           ,                                                     ,                                              ,                                               ,FMC_SDNCAS                         ,DCMI_D13          ,         ,EVENTOUT,
+PortH,PH0 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortH,PH1 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortH,PH2 ,             ,LPTIM1_IN2                ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,QUADSPI_BK2_IO0                                      ,SAI2_SCK_B                                    ,ETH_MII_CRS                                    ,FMC_SDCKE0                         ,                  ,LCD_R0   ,EVENTOUT,ADC3_INP13
+PortH,PH3 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,QUADSPI_BK2_IO1                                      ,SAI2_MCK_B                                    ,ETH_MII_COL                                    ,FMC_SDNE0                          ,                  ,LCD_R1   ,EVENTOUT,ADC3_INN13/ADC3_INP14
+PortH,PH4 ,             ,                          ,                       ,                                     ,I2C2_SCL                                ,                  ,                              ,                                  ,                                           ,LCD_G5                                               ,OTG_HS_ULPI_NXT                               ,                                               ,                                   ,                  ,LCD_G4   ,EVENTOUT,ADC3_INN14/ADC3_INP15
+PortH,PH5 ,             ,                          ,                       ,                                     ,I2C2_SDA                                ,SPI5_NSS          ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_SDNWE                          ,                  ,         ,EVENTOUT,ADC3_INN15/ADC3_INP16
+PortH,PH6 ,             ,                          ,TIM12_CH1              ,                                     ,I2C2_SMBA                               ,SPI5_SCK          ,                              ,                                  ,                                           ,                                                     ,                                              ,ETH_MII_RXD2                                   ,FMC_SDNE1                          ,DCMI_D8           ,         ,EVENTOUT,
+PortH,PH7 ,             ,                          ,                       ,                                     ,I2C3_SCL                                ,SPI5_MISO         ,                              ,                                  ,                                           ,                                                     ,                                              ,ETH_MII_RXD3                                   ,FMC_SDCKE1                         ,DCMI_D9           ,         ,EVENTOUT,
+PortH,PH8 ,             ,                          ,TIM5_ETR               ,                                     ,I2C3_SDA                                ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_D16                            ,DCMI_HSYNC        ,LCD_R2   ,EVENTOUT,
+PortH,PH9 ,             ,                          ,TIM12_CH2              ,                                     ,I2C3_SMBA                               ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_D17                            ,DCMI_D0           ,LCD_R3   ,EVENTOUT,
+PortH,PH10,             ,                          ,TIM5_CH1               ,                                     ,I2C4_SMBA                               ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_D18                            ,DCMI_D1           ,LCD_R4   ,EVENTOUT,
+PortH,PH11,             ,                          ,TIM5_CH2               ,                                     ,I2C4_SCL                                ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_D19                            ,DCMI_D2           ,LCD_R5   ,EVENTOUT,
+PortH,PH12,             ,                          ,TIM5_CH3               ,                                     ,I2C4_SDA                                ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_D20                            ,DCMI_D3           ,LCD_R6   ,EVENTOUT,
+PortH,PH13,             ,                          ,                       ,TIM8_CH1N                            ,                                        ,                  ,                              ,                                  ,UART4_TX                                   ,CAN1_TX                                              ,                                              ,                                               ,FMC_D21                            ,                  ,LCD_G2   ,EVENTOUT,
+PortH,PH14,             ,                          ,                       ,TIM8_CH2N                            ,                                        ,                  ,                              ,                                  ,UART4_RX                                   ,CAN1_RX                                              ,                                              ,                                               ,FMC_D22                            ,DCMI_D4           ,LCD_G3   ,EVENTOUT,
+PortH,PH15,             ,                          ,                       ,TIM8_CH3N                            ,                                        ,                  ,                              ,                                  ,                                           ,CAN1_TXFD                                            ,                                              ,                                               ,FMC_D23                            ,DCMI_D11          ,LCD_G4   ,EVENTOUT,
+PortI,PI0 ,             ,                          ,TIM5_CH4               ,                                     ,                                        ,SPI2_NSS/I2S2_WS  ,                              ,                                  ,                                           ,CAN1_RXFD                                            ,                                              ,                                               ,FMC_D24                            ,DCMI_D13          ,LCD_G5   ,EVENTOUT,
+PortI,PI1 ,             ,                          ,                       ,TIM8_BKIN2                           ,                                        ,SPI2_SCK/I2S2_CK  ,                              ,                                  ,                                           ,                                                     ,                                              ,TIM8_BKIN2_COMP12                              ,FMC_D25                            ,DCMI_D8           ,LCD_G6   ,EVENTOUT,
+PortI,PI2 ,             ,                          ,                       ,TIM8_CH4                             ,                                        ,SPI2_MISO/I2S2_SDI,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_D26                            ,DCMI_D9           ,LCD_G7   ,EVENTOUT,
+PortI,PI3 ,             ,                          ,                       ,TIM8_ETR                             ,                                        ,SPI2_MOSI/I2S2_SDO,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,FMC_D27                            ,DCMI_D10          ,         ,EVENTOUT,
+PortI,PI4 ,             ,                          ,                       ,TIM8_BKIN                            ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,SAI2_MCK_A                                    ,TIM8_BKIN_COMP12                               ,FMC_NBL2                           ,DCMI_D5           ,LCD_B4   ,EVENTOUT,
+PortI,PI5 ,             ,                          ,                       ,TIM8_CH1                             ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,SAI2_SCK_A                                    ,                                               ,FMC_NBL3                           ,DCMI_VSYNC        ,LCD_B5   ,EVENTOUT,
+PortI,PI6 ,             ,                          ,                       ,TIM8_CH2                             ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,SAI2_SD_A                                     ,                                               ,FMC_D28                            ,DCMI_D6           ,LCD_B6   ,EVENTOUT,
+PortI,PI7 ,             ,                          ,                       ,TIM8_CH3                             ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,SAI2_FS_A                                     ,                                               ,FMC_D29                            ,DCMI_D7           ,LCD_B7   ,EVENTOUT,
+PortI,PI8 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortI,PI9 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,UART4_RX                                   ,CAN1_RX                                              ,                                              ,                                               ,FMC_D30                            ,                  ,LCD_VSYNC,EVENTOUT,
+PortI,PI10,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,CAN1_RXFD                                            ,                                              ,ETH_MII_RX_ER                                  ,FMC_D31                            ,                  ,LCD_HSYNC,EVENTOUT,
+PortI,PI11,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,LCD_G6                                               ,OTG_HS_ULPI_DIR                               ,                                               ,                                   ,                  ,         ,EVENTOUT,
+PortI,PI12,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,ETH_TX_ER                                      ,                                   ,                  ,LCD_HSYNC,EVENTOUT,
+PortI,PI13,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_VSYNC,EVENTOUT,
+PortI,PI14,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_CLK  ,EVENTOUT,
+PortI,PI15,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,LCD_G2                                               ,                                              ,                                               ,                                   ,                  ,LCD_R0   ,EVENTOUT,
+PortJ,PJ0 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,LCD_R7                                               ,                                              ,                                               ,                                   ,                  ,LCD_R1   ,EVENTOUT,
+PortJ,PJ1 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_R2   ,EVENTOUT,
+PortJ,PJ2 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_R3   ,EVENTOUT,
+PortJ,PJ3 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_R4   ,EVENTOUT,
+PortJ,PJ4 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_R5   ,EVENTOUT,
+PortJ,PJ5 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_R6   ,EVENTOUT,
+PortJ,PJ6 ,             ,                          ,                       ,TIM8_CH2                             ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_R7   ,EVENTOUT,
+PortJ,PJ7 ,TRGIN        ,                          ,                       ,TIM8_CH2N                            ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_G0   ,EVENTOUT,
+PortJ,PJ8 ,             ,TIM1_CH3N                 ,                       ,TIM8_CH1                             ,                                        ,                  ,                              ,                                  ,UART8_TX                                   ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_G1   ,EVENTOUT,
+PortJ,PJ9 ,             ,TIM1_CH3                  ,                       ,TIM8_CH1N                            ,                                        ,                  ,                              ,                                  ,UART8_RX                                   ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_G2   ,EVENTOUT,
+PortJ,PJ10,             ,TIM1_CH2N                 ,                       ,TIM8_CH2                             ,                                        ,SPI5_MOSI         ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_G3   ,EVENTOUT,
+PortJ,PJ11,             ,TIM1_CH2                  ,                       ,TIM8_CH2N                            ,                                        ,SPI5_MISO         ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_G4   ,EVENTOUT,
+PortJ,PJ12,TRGOUT       ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,LCD_G3                                               ,                                              ,                                               ,                                   ,                  ,LCD_B0   ,EVENTOUT,
+PortJ,PJ13,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,LCD_B4                                               ,                                              ,                                               ,                                   ,                  ,LCD_B1   ,EVENTOUT,
+PortJ,PJ14,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_B2   ,EVENTOUT,
+PortJ,PJ15,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_B3   ,EVENTOUT,
+PortK,PK0 ,             ,TIM1_CH1N                 ,                       ,TIM8_CH3                             ,                                        ,SPI5_SCK          ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_G5   ,EVENTOUT,
+PortK,PK1 ,             ,TIM1_CH1                  ,                       ,TIM8_CH3N                            ,                                        ,SPI5_NSS          ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_G6   ,EVENTOUT,
+PortK,PK2 ,             ,TIM1_BKIN                 ,                       ,TIM8_BKIN                            ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,TIM8_BKIN_COMP12                              ,TIM1_BKIN_COMP12                               ,                                   ,                  ,LCD_G7   ,EVENTOUT,
+PortK,PK3 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_B4   ,EVENTOUT,
+PortK,PK4 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_B5   ,EVENTOUT,
+PortK,PK5 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_B6   ,EVENTOUT,
+PortK,PK6 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_B7   ,EVENTOUT,
+PortK,PK7 ,             ,                          ,                       ,                                     ,                                        ,                  ,                              ,                                  ,                                           ,                                                     ,                                              ,                                               ,                                   ,                  ,LCD_DE   ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32h7b3_af.csv b/ports/stm32/boards/stm32h7b3_af.csv
index e14ff481e8..0846689a07 100644
--- a/ports/stm32/boards/stm32h7b3_af.csv
+++ b/ports/stm32/boards/stm32h7b3_af.csv
@@ -1,170 +1,170 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,ADC
-PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,TIM15_BKIN,I2S6_WS/SPI6_NSS,,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI2_SD_B,,,,,EVENTOUT/EVENTOUT,ADC1_INP16,
-PortA,PA1,,TIM2_CH2,TIM5_CH2,LPTIM3_OUT,TIM15_CH1N,,,USART2_DE/USART2_RTS,UART4_RX,OCTOSPIM_P1_IO3,SAI2_MCLK_B,OCTOSPIM_P1_DQS,,,LTDC_R2,EVENTOUT/EVENTOUT,ADC1_INN16/ADC1_INP17,
-PortA,PA10,,TIM1_CH3,,LPUART1_RX,,,,USART1_RX,,,USB_OTG_HS_ID,MDIOS_MDIO,LTDC_B4,DCMI_D1/PSSI_D1,LTDC_B1,EVENTOUT/EVENTOUT,,
-PortA,PA11,,TIM1_CH4,,LPUART1_CTS,,I2S2_WS/SPI2_NSS,UART4_RX,USART1_CTS/USART1_NSS,,FDCAN1_RX,,,,,LTDC_R4,EVENTOUT/EVENTOUT,,
-PortA,PA12,,TIM1_ETR,,LPUART1_DE/LPUART1_RTS,,I2S2_CK/SPI2_SCK,UART4_TX,USART1_DE/USART1_RTS,SAI2_FS_B,FDCAN1_TX,,,,,LTDC_R5,EVENTOUT/EVENTOUT,,
-PortA,PA13,DEBUG_JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortA,PA14,DEBUG_JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortA,PA15,DEBUG_JTDI,TIM2_CH1/TIM2_ETR,,,CEC,I2S1_WS/SPI1_NSS,I2S3_WS/SPI3_NSS,I2S6_WS/SPI6_NSS,UART4_DE/UART4_RTS,LTDC_R3,,UART7_TX,,,LTDC_B6,EVENTOUT/EVENTOUT,,
-PortA,PA2,,TIM2_CH3,TIM5_CH3,,TIM15_CH1,,DFSDM2_CKIN1,USART2_TX,SAI2_SCK_B,,,,MDIOS_MDIO,,LTDC_R1,EVENTOUT/EVENTOUT,ADC1_INP14,
-PortA,PA3,,TIM2_CH4,TIM5_CH4,OCTOSPIM_P1_CLK,TIM15_CH2,I2S6_MCK,,USART2_RX,,LTDC_B2,USB_OTG_HS_ULPI_D0,,,,LTDC_B5,EVENTOUT/EVENTOUT,ADC1_INP15,
-PortA,PA4,,,TIM5_ETR,,,I2S1_WS/SPI1_NSS,I2S3_WS/SPI3_NSS,USART2_CK,I2S6_WS/SPI6_NSS,,,,,DCMI_HSYNC/PSSI_DE,LTDC_VSYNC,EVENTOUT/EVENTOUT,ADC1_INP18,
-PortA,PA5,PWR_NDSTOP2,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,I2S1_CK/SPI1_SCK,,,I2S6_CK/SPI6_SCK,,USB_OTG_HS_ULPI_CK,,,PSSI_D14,LTDC_R4,EVENTOUT/EVENTOUT,ADC1_INN18/ADC1_INP19,
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,I2S1_SDI/SPI1_MISO,OCTOSPIM_P1_IO3,,I2S6_SDI/SPI6_MISO,TIM13_CH1,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2,MDIOS_MDC,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,DCMI_PIXCLK/PSSI_PDCK,LTDC_G2,EVENTOUT/EVENTOUT,ADC1_INP3/ADC2_INP3,
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,DFSDM2_DATIN1,I2S1_SDO/SPI1_MOSI,,,I2S6_SDO/SPI6_MOSI,TIM14_CH1,OCTOSPIM_P1_IO2,,FMC_SDNWE,,LTDC_VSYNC,EVENTOUT/EVENTOUT,ADC1_INN3/ADC1_INP7/ADC2_INN3/ADC2_INP7,
-PortA,PA8,RCC_MCO_1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,USB_OTG_HS_SOF,UART7_RX,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2,LTDC_B3,LTDC_R6,EVENTOUT/EVENTOUT,,
-PortA,PA9,,TIM1_CH2,,LPUART1_TX,I2C3_SMBA,I2S2_CK/SPI2_SCK,,USART1_TX,,,,,,DCMI_D0/PSSI_D0,LTDC_R5,EVENTOUT/EVENTOUT,,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,DFSDM2_CKOUT,,DFSDM1_CKOUT,,UART4_CTS,LTDC_R3,USB_OTG_HS_ULPI_D1,OCTOSPIM_P1_IO1,,,LTDC_G1,EVENTOUT/EVENTOUT,ADC1_INN5/ADC1_INP9/ADC2_INN5/ADC2_INP9,
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM1_DATIN1,,,LTDC_R6,USB_OTG_HS_ULPI_D2,OCTOSPIM_P1_IO0,,,LTDC_G0,EVENTOUT/EVENTOUT,ADC1_INP5/ADC2_INP5,
-PortB,PB10,,TIM2_CH3,,LPTIM2_IN1,I2C2_SCL,I2S2_CK/SPI2_SCK,DFSDM1_DATIN7,USART3_TX,,OCTOSPIM_P1_NCS,USB_OTG_HS_ULPI_D3,,,,LTDC_G4,EVENTOUT/EVENTOUT,,
-PortB,PB11,,TIM2_CH4,,LPTIM2_ETR,I2C2_SDA,,DFSDM1_CKIN7,USART3_RX,,,USB_OTG_HS_ULPI_D4,,,,LTDC_G5,EVENTOUT/EVENTOUT,,
-PortB,PB12,,TIM1_BKIN,,OCTOSPIM_P1_NCLK,I2C2_SMBA,I2S2_WS/SPI2_NSS,DFSDM1_DATIN1,USART3_CK,,FDCAN2_RX,USB_OTG_HS_ULPI_D5,DFSDM2_DATIN1,,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,UART5_RX,EVENTOUT/EVENTOUT,,
-PortB,PB13,,TIM1_CH1N,,LPTIM2_OUT,DFSDM2_CKIN1,I2S2_CK/SPI2_SCK,DFSDM1_CKIN1,USART3_CTS/USART3_NSS,,FDCAN2_TX,USB_OTG_HS_ULPI_D6,,SDMMC1_D0,DCMI_D2/PSSI_D2,UART5_TX,EVENTOUT/EVENTOUT,,
-PortB,PB14,,TIM1_CH2N,TIM12_CH1,TIM8_CH2N,USART1_TX,I2S2_SDI/SPI2_MISO,DFSDM1_DATIN2,USART3_DE/USART3_RTS,UART4_DE/UART4_RTS,SDMMC2_D0,,,,,LTDC_CLK,EVENTOUT/EVENTOUT,,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,TIM12_CH2,TIM8_CH3N,USART1_RX,I2S2_SDO/SPI2_MOSI,DFSDM1_CKIN2,,UART4_CTS,SDMMC2_D1,,,,,LTDC_G7,EVENTOUT/EVENTOUT,,
-PortB,PB2,RTC_OUT_ALARM,,SAI1_D1,,DFSDM1_CKIN1,,SAI1_SD_A,I2S3_SDO/SPI3_MOSI,,OCTOSPIM_P1_CLK,OCTOSPIM_P1_DQS,,,,,EVENTOUT/EVENTOUT,,
-PortB,PB3,DEBUG_JTDO/SWO,TIM2_CH2,,,,I2S1_CK/SPI1_SCK,I2S3_CK/SPI3_SCK,,I2S6_CK/SPI6_SCK,SDMMC2_D2,CRS_SYNC,UART7_RX,,,,EVENTOUT/EVENTOUT,,
-PortB,PB4,,TIM16_BKIN,TIM3_CH1,,,I2S1_SDI/SPI1_MISO,I2S3_SDI/SPI3_MISO,I2S2_WS/SPI2_NSS,I2S6_SDI/SPI6_MISO,SDMMC2_D3,,UART7_TX,,,,EVENTOUT/EVENTOUT,,
-PortB,PB5,,TIM17_BKIN,TIM3_CH2,,I2C1_SMBA,I2S1_SDO/SPI1_MOSI,I2C4_SMBA,I2S3_SDO/SPI3_MOSI,I2S6_SDO/SPI6_MOSI,FDCAN2_RX,USB_OTG_HS_ULPI_D7,LTDC_B5,FMC_SDCKE1,DCMI_D10/PSSI_D10,UART5_RX,EVENTOUT/EVENTOUT,,
-PortB,PB6,,TIM16_CH1N,TIM4_CH1,,I2C1_SCL,CEC,I2C4_SCL,USART1_TX,LPUART1_TX,FDCAN2_TX,OCTOSPIM_P1_NCS,DFSDM1_DATIN5,FMC_SDNE1,DCMI_D5/PSSI_D5,UART5_TX,EVENTOUT/EVENTOUT,,
-PortB,PB7,,TIM17_CH1N,TIM4_CH2,,I2C1_SDA,,I2C4_SDA,USART1_RX,LPUART1_RX,,,DFSDM1_CKIN5,FMC_NL,DCMI_VSYNC/PSSI_RDY,,EVENTOUT/EVENTOUT,,
-PortB,PB8,,TIM16_CH1,TIM4_CH3,DFSDM1_CKIN7,I2C1_SCL,,I2C4_SCL,SDMMC1_CKIN,UART4_RX,FDCAN1_RX,SDMMC2_D4,,SDMMC1_D4,DCMI_D6/PSSI_D6,LTDC_B6,EVENTOUT/EVENTOUT,,
-PortB,PB9,,TIM17_CH1,TIM4_CH4,DFSDM1_DATIN7,I2C1_SDA,I2S2_WS/SPI2_NSS,I2C4_SDA,SDMMC1_CDIR,UART4_TX,FDCAN1_TX,SDMMC2_D5,I2C4_SMBA,SDMMC1_D5,DCMI_D7/PSSI_D7,LTDC_B7,EVENTOUT/EVENTOUT,,
-PortC,PC0,,,,DFSDM1_CKIN0,,,DFSDM1_DATIN4,,SAI2_FS_B,FMC_A25,USB_OTG_HS_ULPI_STP,LTDC_G2,FMC_SDNWE,,LTDC_R5,EVENTOUT/EVENTOUT,ADC1_INP10/ADC2_INP10,
-PortC,PC1,DEBUG_TRACED0,,SAI1_D1,DFSDM1_DATIN0,DFSDM1_CKIN4,I2S2_SDO/SPI2_MOSI,SAI1_SD_A,,,SDMMC2_CK,OCTOSPIM_P1_IO4,,MDIOS_MDC,,LTDC_G5,EVENTOUT/EVENTOUT,ADC1_INN10/ADC1_INP11/ADC2_INN10/ADC2_INP11,
-PortC,PC10,,,,DFSDM1_CKIN5,DFSDM2_CKIN0,,I2S3_CK/SPI3_SCK,USART3_TX,UART4_TX,OCTOSPIM_P1_IO1,LTDC_B1,SWPMI1_RX,SDMMC1_D2,DCMI_D8/PSSI_D8,LTDC_R2,EVENTOUT/EVENTOUT,,
-PortC,PC11,,,,DFSDM1_DATIN5,DFSDM2_DATIN0,,I2S3_SDI/SPI3_MISO,USART3_RX,UART4_RX,OCTOSPIM_P1_NCS,,,SDMMC1_D3,DCMI_D4/PSSI_D4,LTDC_B4,EVENTOUT/EVENTOUT,,
-PortC,PC12,DEBUG_TRACED3,,TIM15_CH1,,DFSDM2_CKOUT,I2S6_CK/SPI6_SCK,I2S3_SDO/SPI3_MOSI,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9/PSSI_D9,LTDC_R6,EVENTOUT/EVENTOUT,,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortC,PC2,PWR_CSTOP,,,DFSDM1_CKIN1,,I2S2_SDI/SPI2_MISO,DFSDM1_CKOUT,,,OCTOSPIM_P1_IO2,USB_OTG_HS_ULPI_DIR,OCTOSPIM_P1_IO5,FMC_SDNE0,,,EVENTOUT/EVENTOUT,ADC1_INN11/ADC1_INP12/ADC2_INN11/ADC2_INP12,
-PortC,PC3,PWR_CSLEEP,,,DFSDM1_DATIN1,,I2S2_SDO/SPI2_MOSI,,,,OCTOSPIM_P1_IO0,USB_OTG_HS_ULPI_NXT,OCTOSPIM_P1_IO6,FMC_SDCKE0,,,EVENTOUT/EVENTOUT,ADC2_INP1,
-PortC,PC4,,,,DFSDM1_CKIN2,,I2S1_MCK,,,,SPDIFRX_IN3,,,FMC_SDNE0,,LTDC_R7,EVENTOUT/EVENTOUT,ADC1_INP4/ADC2_INP4,
-PortC,PC5,,,SAI1_D3,DFSDM1_DATIN2,PSSI_D15,,,,,SPDIFRX_IN4,OCTOSPIM_P1_DQS,,FMC_SDCKE0,COMP1_OUT,LTDC_DE,EVENTOUT/EVENTOUT,ADC1_INN4/ADC1_INP8/ADC2_INN4/ADC2_INP8,
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,DFSDM1_CKIN3,I2S2_MCK,,USART6_TX,SDMMC1_D0DIR,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0/PSSI_D0,LTDC_HSYNC,EVENTOUT/EVENTOUT,,
-PortC,PC7,DEBUG_TRGIO,,TIM3_CH2,TIM8_CH2,DFSDM1_DATIN3,,I2S3_MCK,USART6_RX,SDMMC1_D123DIR,FMC_NE1,SDMMC2_D7,SWPMI1_TX,SDMMC1_D7,DCMI_D1/PSSI_D1,LTDC_G6,EVENTOUT/EVENTOUT,,
-PortC,PC8,DEBUG_TRACED1,,TIM3_CH3,TIM8_CH3,,,,USART6_CK,UART5_DE/UART5_RTS,FMC_NCE/FMC_NE2,FMC_INT,SWPMI1_RX,SDMMC1_D0,DCMI_D2/PSSI_D2,,EVENTOUT/EVENTOUT,,
-PortC,PC9,RCC_MCO_2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,UART5_CTS,OCTOSPIM_P1_IO0,LTDC_G3,SWPMI1_SUSPEND,SDMMC1_D1,DCMI_D3/PSSI_D3,LTDC_B2,EVENTOUT/EVENTOUT,,
-PortD,PD0,,,,DFSDM1_CKIN6,,,,,UART4_RX,FDCAN1_RX,,UART9_CTS,FMC_D2/FMC_DA2,,LTDC_B1,EVENTOUT/EVENTOUT,,
-PortD,PD1,,,,DFSDM1_DATIN6,,,,,UART4_TX,FDCAN1_TX,,,FMC_D3/FMC_DA3,,,EVENTOUT/EVENTOUT,,
-PortD,PD10,,,,DFSDM1_CKOUT,DFSDM2_CKOUT,,,USART3_CK,,,,,FMC_D15/FMC_DA15,,LTDC_B3,EVENTOUT/EVENTOUT,,
-PortD,PD11,,,,LPTIM2_IN2,I2C4_SMBA,,,USART3_CTS/USART3_NSS,,OCTOSPIM_P1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT/EVENTOUT,,
-PortD,PD12,,LPTIM1_IN1,TIM4_CH1,LPTIM2_IN1,I2C4_SCL,,,USART3_DE/USART3_RTS,,OCTOSPIM_P1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,DCMI_D12/PSSI_D12,,EVENTOUT/EVENTOUT,,
-PortD,PD13,,LPTIM1_OUT,TIM4_CH2,,I2C4_SDA,,,,,OCTOSPIM_P1_IO3,SAI2_SCK_A,UART9_DE/UART9_RTS,FMC_A18,DCMI_D13/PSSI_D13,,EVENTOUT/EVENTOUT,,
-PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,UART9_RX,FMC_D0/FMC_DA0,,,EVENTOUT/EVENTOUT,,
-PortD,PD15,,,TIM4_CH4,,,,,,UART8_DE/UART8_RTS,,,UART9_TX,FMC_D1/FMC_DA1,,,EVENTOUT/EVENTOUT,,
-PortD,PD2,DEBUG_TRACED2,,TIM3_ETR,,TIM15_BKIN,,,,UART5_RX,LTDC_B7,,,SDMMC1_CMD,DCMI_D11/PSSI_D11,LTDC_B2,EVENTOUT/EVENTOUT,,
-PortD,PD3,,,,DFSDM1_CKOUT,,I2S2_CK/SPI2_SCK,,USART2_CTS/USART2_NSS,,,,,FMC_CLK,DCMI_D5/PSSI_D5,LTDC_G7,EVENTOUT/EVENTOUT,,
-PortD,PD4,,,,,,,,USART2_DE/USART2_RTS,,,OCTOSPIM_P1_IO4,,FMC_NOE,,,EVENTOUT/EVENTOUT,,
-PortD,PD5,,,,,,,,USART2_TX,,,OCTOSPIM_P1_IO5,,FMC_NWE,,,EVENTOUT/EVENTOUT,,
-PortD,PD6,,,SAI1_D1,DFSDM1_CKIN4,DFSDM1_DATIN1,I2S3_SDO/SPI3_MOSI,SAI1_SD_A,USART2_RX,,,OCTOSPIM_P1_IO6,SDMMC2_CK,FMC_NWAIT,DCMI_D10/PSSI_D10,LTDC_B2,EVENTOUT/EVENTOUT,,
-PortD,PD7,,,,DFSDM1_DATIN4,,I2S1_SDO/SPI1_MOSI,DFSDM1_CKIN1,USART2_CK,,SPDIFRX_IN1,OCTOSPIM_P1_IO7,SDMMC2_CMD,FMC_NE1,,,EVENTOUT/EVENTOUT,,
-PortD,PD8,,,,DFSDM1_CKIN3,,,,USART3_TX,,SPDIFRX_IN2,,,FMC_D13/FMC_DA13,,,EVENTOUT/EVENTOUT,,
-PortD,PD9,,,,DFSDM1_DATIN3,,,,USART3_RX,,,,,FMC_D14/FMC_DA14,,,EVENTOUT/EVENTOUT,,
-PortE,PE0,,LPTIM1_ETR,TIM4_ETR,,LPTIM2_ETR,,,,UART8_RX,,SAI2_MCLK_A,,FMC_NBL0,DCMI_D2/PSSI_D2,LTDC_R0,EVENTOUT/EVENTOUT,,
-PortE,PE1,,LPTIM1_IN2,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3/PSSI_D3,LTDC_R6,EVENTOUT/EVENTOUT,,
-PortE,PE10,,TIM1_CH2N,,DFSDM1_DATIN4,,,,UART7_CTS,,,OCTOSPIM_P1_IO7,,FMC_D7/FMC_DA7,,,EVENTOUT/EVENTOUT,,
-PortE,PE11,,TIM1_CH2,,DFSDM1_CKIN4,,SPI4_NSS,,,,,SAI2_SD_B,OCTOSPIM_P1_NCS,FMC_D8/FMC_DA8,,LTDC_G3,EVENTOUT/EVENTOUT,,
-PortE,PE12,,TIM1_CH3N,,DFSDM1_DATIN5,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9/FMC_DA9,COMP1_OUT,LTDC_B4,EVENTOUT/EVENTOUT,,
-PortE,PE13,,TIM1_CH3,,DFSDM1_CKIN5,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10/FMC_DA10,COMP2_OUT,LTDC_DE,EVENTOUT/EVENTOUT,,
-PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCLK_B,,FMC_D11/FMC_DA11,,LTDC_CLK,EVENTOUT/EVENTOUT,,
-PortE,PE15,,TIM1_BKIN,,,,,,,,,,USART10_CK,FMC_D12/FMC_DA12,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,LTDC_R7,EVENTOUT/EVENTOUT,,
-PortE,PE2,DEBUG_TRACECLK,,SAI1_CK1,,,SPI4_SCK,SAI1_MCLK_A,,,OCTOSPIM_P1_IO2,,USART10_RX,FMC_A23,,,EVENTOUT/EVENTOUT,,
-PortE,PE3,DEBUG_TRACED0,,,,TIM15_BKIN,,SAI1_SD_B,,,,,USART10_TX,FMC_A19,,,EVENTOUT/EVENTOUT,,
-PortE,PE4,DEBUG_TRACED1,,SAI1_D2,DFSDM1_DATIN3,TIM15_CH1N,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4/PSSI_D4,LTDC_B0,EVENTOUT/EVENTOUT,,
-PortE,PE5,DEBUG_TRACED2,,SAI1_CK2,DFSDM1_CKIN3,TIM15_CH1,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6/PSSI_D6,LTDC_G0,EVENTOUT/EVENTOUT,,
-PortE,PE6,DEBUG_TRACED3,TIM1_BKIN2,SAI1_D1,,TIM15_CH2,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCLK_B,TIM1_BKIN2_COMP1/TIM1_BKIN2_COMP2,FMC_A22,DCMI_D7/PSSI_D7,LTDC_G1,EVENTOUT/EVENTOUT,,
-PortE,PE7,,TIM1_ETR,,DFSDM1_DATIN2,,,,UART7_RX,,,OCTOSPIM_P1_IO4,,FMC_D4/FMC_DA4,,,EVENTOUT/EVENTOUT,,
-PortE,PE8,,TIM1_CH1N,,DFSDM1_CKIN2,,,,UART7_TX,,,OCTOSPIM_P1_IO5,,FMC_D5/FMC_DA5,COMP2_OUT,,EVENTOUT/EVENTOUT,,
-PortE,PE9,,TIM1_CH1,,DFSDM1_CKOUT,,,,UART7_DE/UART7_RTS,,,OCTOSPIM_P1_IO6,,FMC_D6/FMC_DA6,,,EVENTOUT/EVENTOUT,,
-PortF,PF0,,,,,I2C2_SDA,,,,,OCTOSPIM_P2_IO0,,,FMC_A0,,,EVENTOUT/EVENTOUT,,
-PortF,PF1,,,,,I2C2_SCL,,,,,OCTOSPIM_P2_IO1,,,FMC_A1,,,EVENTOUT/EVENTOUT,,
-PortF,PF10,,TIM16_BKIN,SAI1_D3,,PSSI_D15,,,,,OCTOSPIM_P1_CLK,,,,DCMI_D11/PSSI_D11,LTDC_DE,EVENTOUT/EVENTOUT,,
-PortF,PF11,,,,,,SPI5_MOSI,,,,OCTOSPIM_P1_NCLK,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12/PSSI_D12,,EVENTOUT/EVENTOUT,ADC1_INP2,
-PortF,PF12,,,,,,,,,,OCTOSPIM_P2_DQS,,,FMC_A6,,,EVENTOUT/EVENTOUT,ADC1_INN2/ADC1_INP6,
-PortF,PF13,,,,DFSDM1_DATIN6,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT/EVENTOUT,ADC2_INP2,
-PortF,PF14,,,,DFSDM1_CKIN6,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT/EVENTOUT,ADC2_INN2/ADC2_INP6,
-PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT/EVENTOUT,,
-PortF,PF2,,,,,I2C2_SMBA,,,,,OCTOSPIM_P2_IO2,,,FMC_A2,,,EVENTOUT/EVENTOUT,,
-PortF,PF3,,,,,,,,,,OCTOSPIM_P2_IO3,,,FMC_A3,,,EVENTOUT/EVENTOUT,,
-PortF,PF4,,,,,,,,,,OCTOSPIM_P2_CLK,,,FMC_A4,,,EVENTOUT/EVENTOUT,,
-PortF,PF5,,,,,,,,,,OCTOSPIM_P2_NCLK,,,FMC_A5,,,EVENTOUT/EVENTOUT,,
-PortF,PF6,,TIM16_CH1,,,,SPI5_NSS,SAI1_SD_B,UART7_RX,,,OCTOSPIM_P1_IO3,,,,,EVENTOUT/EVENTOUT,,
-PortF,PF7,,TIM17_CH1,,,,SPI5_SCK,SAI1_MCLK_B,UART7_TX,,,OCTOSPIM_P1_IO2,,,,,EVENTOUT/EVENTOUT,,
-PortF,PF8,,TIM16_CH1N,,,,SPI5_MISO,SAI1_SCK_B,UART7_DE/UART7_RTS,,TIM13_CH1,OCTOSPIM_P1_IO0,,,,,EVENTOUT/EVENTOUT,,
-PortF,PF9,,TIM17_CH1N,,,,SPI5_MOSI,SAI1_FS_B,UART7_CTS,,TIM14_CH1,OCTOSPIM_P1_IO1,,,,,EVENTOUT/EVENTOUT,,
-PortG,PG0,,,,,,,,,,OCTOSPIM_P2_IO4,,UART9_RX,FMC_A10,,,EVENTOUT/EVENTOUT,,
-PortG,PG1,,,,,,,,,,OCTOSPIM_P2_IO5,,UART9_TX,FMC_A11,,,EVENTOUT/EVENTOUT,,
-PortG,PG10,,,,OCTOSPIM_P2_IO6,,I2S1_WS/SPI1_NSS,,,,LTDC_G3,SAI2_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2/PSSI_D2,LTDC_B2,EVENTOUT/EVENTOUT,,
-PortG,PG11,,LPTIM1_IN2,,,,I2S1_CK/SPI1_SCK,,,SPDIFRX_IN1,OCTOSPIM_P2_IO7,SDMMC2_D2,USART10_RX,,DCMI_D3/PSSI_D3,LTDC_B3,EVENTOUT/EVENTOUT,,
-PortG,PG12,,LPTIM1_IN1,,OCTOSPIM_P2_NCS,,I2S6_SDI/SPI6_MISO,,USART6_DE/USART6_RTS,SPDIFRX_IN2,LTDC_B4,SDMMC2_D3,USART10_TX,FMC_NE4,,LTDC_B1,EVENTOUT/EVENTOUT,,
-PortG,PG13,DEBUG_TRACED0,LPTIM1_OUT,,,,I2S6_CK/SPI6_SCK,,USART6_CTS/USART6_NSS,,,SDMMC2_D6,USART10_CTS/USART10_NSS,FMC_A24,,LTDC_R0,EVENTOUT/EVENTOUT,,
-PortG,PG14,DEBUG_TRACED1,LPTIM1_ETR,,,,I2S6_SDO/SPI6_MOSI,,USART6_TX,,OCTOSPIM_P1_IO7,SDMMC2_D7,USART10_DE/USART10_RTS,FMC_A25,,LTDC_B0,EVENTOUT/EVENTOUT,,
-PortG,PG15,,,,,,,,USART6_CTS/USART6_NSS,,OCTOSPIM_P2_DQS,,USART10_CK,FMC_SDNCAS,DCMI_D13/PSSI_D13,,EVENTOUT/EVENTOUT,,
-PortG,PG2,,,,TIM8_BKIN,,,,,,,,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2,FMC_A12,,,EVENTOUT/EVENTOUT,,
-PortG,PG3,,,,TIM8_BKIN2,,,,,,,,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2,FMC_A13,,,EVENTOUT/EVENTOUT,,
-PortG,PG4,,TIM1_BKIN2,,,,,,,,,,TIM1_BKIN2_COMP1/TIM1_BKIN2_COMP2,FMC_A14/FMC_BA0,,,EVENTOUT/EVENTOUT,,
-PortG,PG5,,TIM1_ETR,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT/EVENTOUT,,
-PortG,PG6,,TIM17_BKIN,,,,,,,,,OCTOSPIM_P1_NCS,,FMC_NE3,DCMI_D12/PSSI_D12,LTDC_R7,EVENTOUT/EVENTOUT,,
-PortG,PG7,,,,,,,SAI1_MCLK_A,USART6_CK,,OCTOSPIM_P2_DQS,,,FMC_INT,DCMI_D13/PSSI_D13,LTDC_CLK,EVENTOUT/EVENTOUT,,
-PortG,PG8,,,,TIM8_ETR,,I2S6_WS/SPI6_NSS,,USART6_DE/USART6_RTS,SPDIFRX_IN3,,,,FMC_SDCLK,,LTDC_G7,EVENTOUT/EVENTOUT,,
-PortG,PG9,,,,,,I2S1_SDI/SPI1_MISO,,USART6_RX,SPDIFRX_IN4,OCTOSPIM_P1_IO6,SAI2_FS_B,SDMMC2_D0,FMC_NCE/FMC_NE2,DCMI_VSYNC/PSSI_RDY,,EVENTOUT/EVENTOUT,,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1/PSSI_D1,LTDC_R4,EVENTOUT/EVENTOUT,,
-PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2/PSSI_D2,LTDC_R5,EVENTOUT/EVENTOUT,,
-PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3/PSSI_D3,LTDC_R6,EVENTOUT/EVENTOUT,,
-PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,FDCAN1_TX,,,FMC_D21,,LTDC_G2,EVENTOUT/EVENTOUT,,
-PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,FDCAN1_RX,,,FMC_D22,DCMI_D4/PSSI_D4,LTDC_G3,EVENTOUT/EVENTOUT,,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11/PSSI_D11,LTDC_G4,EVENTOUT/EVENTOUT,,
-PortH,PH2,,LPTIM1_IN2,,,,,,,,OCTOSPIM_P1_IO4,SAI2_SCK_B,,FMC_SDCKE0,,LTDC_R0,EVENTOUT/EVENTOUT,,
-PortH,PH3,,,,,,,,,,OCTOSPIM_P1_IO5,SAI2_MCLK_B,,FMC_SDNE0,,LTDC_R1,EVENTOUT/EVENTOUT,,
-PortH,PH4,,,,,I2C2_SCL,,,,,LTDC_G5,USB_OTG_HS_ULPI_NXT,,,PSSI_D14,LTDC_G4,EVENTOUT/EVENTOUT,,
-PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT/EVENTOUT,,
-PortH,PH6,,,TIM12_CH1,,I2C2_SMBA,SPI5_SCK,,,,,,,FMC_SDNE1,DCMI_D8/PSSI_D8,,EVENTOUT/EVENTOUT,,
-PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,,FMC_SDCKE1,DCMI_D9/PSSI_D9,,EVENTOUT/EVENTOUT,,
-PortH,PH8,,,TIM5_ETR,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC/PSSI_DE,LTDC_R2,EVENTOUT/EVENTOUT,,
-PortH,PH9,,,TIM12_CH2,,I2C3_SMBA,,,,,,,,FMC_D17,DCMI_D0/PSSI_D0,LTDC_R3,EVENTOUT/EVENTOUT,,
-PortI,PI0,,,TIM5_CH4,,,I2S2_WS/SPI2_NSS,,,,,,,FMC_D24,DCMI_D13/PSSI_D13,LTDC_G5,EVENTOUT/EVENTOUT,,
-PortI,PI1,,,,TIM8_BKIN2,,I2S2_CK/SPI2_SCK,,,,,,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2,FMC_D25,DCMI_D8/PSSI_D8,LTDC_G6,EVENTOUT/EVENTOUT,,
-PortI,PI10,,,,OCTOSPIM_P2_IO1,,,,,,,,,FMC_D31,PSSI_D14,LTDC_HSYNC,EVENTOUT/EVENTOUT,,
-PortI,PI11,,,,OCTOSPIM_P2_IO2,,,,,,LTDC_G6,USB_OTG_HS_ULPI_DIR,,,PSSI_D15,,EVENTOUT/EVENTOUT,,
-PortI,PI12,,,,OCTOSPIM_P2_IO3,,,,,,,,,,,LTDC_HSYNC,EVENTOUT/EVENTOUT,,
-PortI,PI13,,,,OCTOSPIM_P2_CLK,,,,,,,,,,,LTDC_VSYNC,EVENTOUT/EVENTOUT,,
-PortI,PI14,,,,OCTOSPIM_P2_NCLK,,,,,,,,,,,LTDC_CLK,EVENTOUT/EVENTOUT,,
-PortI,PI15,,,,,,,,,,LTDC_G2,,,,,LTDC_R0,EVENTOUT/EVENTOUT,,
-PortI,PI2,,,,TIM8_CH4,,I2S2_SDI/SPI2_MISO,,,,,,,FMC_D26,DCMI_D9/PSSI_D9,LTDC_G7,EVENTOUT/EVENTOUT,,
-PortI,PI3,,,,TIM8_ETR,,I2S2_SDO/SPI2_MOSI,,,,,,,FMC_D27,DCMI_D10/PSSI_D10,,EVENTOUT/EVENTOUT,,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCLK_A,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2,FMC_NBL2,DCMI_D5/PSSI_D5,LTDC_B4,EVENTOUT/EVENTOUT,,
-PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC/PSSI_RDY,LTDC_B5,EVENTOUT/EVENTOUT,,
-PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6/PSSI_D6,LTDC_B6,EVENTOUT/EVENTOUT,,
-PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7/PSSI_D7,LTDC_B7,EVENTOUT/EVENTOUT,,
-PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,,
-PortI,PI9,,,,OCTOSPIM_P2_IO0,,,,,UART4_RX,FDCAN1_RX,,,FMC_D30,,LTDC_VSYNC,EVENTOUT/EVENTOUT,,
-PortJ,PJ0,,,,,,,,,,LTDC_R7,,,,,LTDC_R1,EVENTOUT/EVENTOUT,,
-PortJ,PJ1,,,,OCTOSPIM_P2_IO4,,,,,,,,,,,LTDC_R2,EVENTOUT/EVENTOUT,,
-PortJ,PJ10,,TIM1_CH2N,,TIM8_CH2,,SPI5_MOSI,,,,,,,,,LTDC_G3,EVENTOUT/EVENTOUT,,
-PortJ,PJ11,,TIM1_CH2,,TIM8_CH2N,,SPI5_MISO,,,,,,,,,LTDC_G4,EVENTOUT/EVENTOUT,,
-PortJ,PJ12,DEBUG_TRGOUT,,,,,,,,,LTDC_G3,,,,,LTDC_B0,EVENTOUT/EVENTOUT,,
-PortJ,PJ13,,,,,,,,,,LTDC_B4,,,,,LTDC_B1,EVENTOUT/EVENTOUT,,
-PortJ,PJ14,,,,,,,,,,,,,,,LTDC_B2,EVENTOUT/EVENTOUT,,
-PortJ,PJ15,,,,,,,,,,,,,,,LTDC_B3,EVENTOUT/EVENTOUT,,
-PortJ,PJ2,,,,OCTOSPIM_P2_IO5,,,,,,,,,,,LTDC_R3,EVENTOUT/EVENTOUT,,
-PortJ,PJ3,,,,,,,,,,,,UART9_DE/UART9_RTS,,,LTDC_R4,EVENTOUT/EVENTOUT,,
-PortJ,PJ4,,,,,,,,,,,,UART9_CTS,,,LTDC_R5,EVENTOUT/EVENTOUT,,
-PortJ,PJ5,,,,,,,,,,,,,,,LTDC_R6,EVENTOUT/EVENTOUT,,
-PortJ,PJ6,,,,TIM8_CH2,,,,,,,,,,,LTDC_R7,EVENTOUT/EVENTOUT,,
-PortJ,PJ7,DEBUG_TRGIN,,,TIM8_CH2N,,,,,,,,,,,LTDC_G0,EVENTOUT/EVENTOUT,,
-PortJ,PJ8,,TIM1_CH3N,,TIM8_CH1,,,,,UART8_TX,,,,,,LTDC_G1,EVENTOUT/EVENTOUT,,
-PortJ,PJ9,,TIM1_CH3,,TIM8_CH1N,,,,,UART8_RX,,,,,,LTDC_G2,EVENTOUT/EVENTOUT,,
-PortK,PK0,,TIM1_CH1N,,TIM8_CH3,,SPI5_SCK,,,,,,,,,LTDC_G5,EVENTOUT/EVENTOUT,,
-PortK,PK1,,TIM1_CH1,,TIM8_CH3N,,SPI5_NSS,,,,,,,,,LTDC_G6,EVENTOUT/EVENTOUT,,
-PortK,PK2,,TIM1_BKIN,,TIM8_BKIN,,,,,,,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,,,LTDC_G7,EVENTOUT/EVENTOUT,,
-PortK,PK3,,,,OCTOSPIM_P2_IO6,,,,,,,,,,,LTDC_B4,EVENTOUT/EVENTOUT,,
-PortK,PK4,,,,OCTOSPIM_P2_IO7,,,,,,,,,,,LTDC_B5,EVENTOUT/EVENTOUT,,
-PortK,PK5,,,,OCTOSPIM_P2_NCS,,,,,,,,,,,LTDC_B6,EVENTOUT/EVENTOUT,,
-PortK,PK6,,,,OCTOSPIM_P2_DQS,,,,,,,,,,,LTDC_B7,EVENTOUT/EVENTOUT,,
-PortK,PK7,,,,,,,,,,,,,,,LTDC_DE,EVENTOUT/EVENTOUT,,
+Port ,Pin ,AF0             ,AF1                ,AF2                    ,AF3                                       ,AF4                                                  ,AF5                                               ,AF6                                           ,AF7                                                    ,AF8                                             ,AF9                                                    ,AF10                                                    ,AF11                                                                    ,AF12                             ,AF13                           ,AF14      ,AF15    ,ADC
+     ,    ,SYS             ,LPTIM1/TIM1/2/16/17,PDM_SAI1/TIM3/4/5/12/15,DFSDM1/LPTIM2/3/LPUART1/OCTOSPIM_P1/2/TIM8,CEC/DCMI/PSSI/DFSDM1/2/I2C1/2/3/4/LPTIM2/TIM15/USART1,CEC/SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/SPI6/I2S6,DFSDM1/2/I2C4/OCTOSPIM_P1/SAI1/SPI3/I2S3/UART4,SDMMC1/SPI2/I2S2/SPI3/I2S3/SPI6/I2S6/UART7/USART1/2/3/6,LPUART1/SAI2/SDMMC1/SPDIFRX1/SPI6/I2S6/UART4/5/8,FDCAN1/2/FMC/LCD/OCTOSPIM_P1/2/SDMMC2/SPDIFRX1/TIM13/14,CRS/FMC/LCD/OCTOSPIM_P1/OTG1_FS/OTG1_HS/SAI2/SDMMC2/TIM8,DFSDM1/2/I2C4/LCD/MDIOS/OCTOSPIM_P1/SDMMC2/SWPMI1/TIM1/8/UART7/9/USART10,FMC/LCD/MDIOS/SDMMC1/TIM1/8      ,COMP/DCMI/PSSI/LCD/TIM1        ,LCD/UART5 ,SYS     ,ADC
+PortA,PA0 ,                ,TIM2_CH1/TIM2_ETR  ,TIM5_CH1               ,TIM8_ETR                                  ,TIM15_BKIN                                           ,I2S6_WS/SPI6_NSS                                  ,                                              ,USART2_CTS/USART2_NSS                                  ,UART4_TX                                        ,SDMMC2_CMD                                             ,SAI2_SD_B                                               ,                                                                        ,                                 ,                               ,          ,EVENTOUT,ADC1_INP16
+PortA,PA1 ,                ,TIM2_CH2           ,TIM5_CH2               ,LPTIM3_OUT                                ,TIM15_CH1N                                           ,                                                  ,                                              ,USART2_DE/USART2_RTS                                   ,UART4_RX                                        ,OCTOSPIM_P1_IO3                                        ,SAI2_MCLK_B                                             ,OCTOSPIM_P1_DQS                                                         ,                                 ,                               ,LTDC_R2   ,EVENTOUT,ADC1_INN16/ADC1_INP17
+PortA,PA2 ,                ,TIM2_CH3           ,TIM5_CH3               ,                                          ,TIM15_CH1                                            ,                                                  ,DFSDM2_CKIN1                                  ,USART2_TX                                              ,SAI2_SCK_B                                      ,                                                       ,                                                        ,                                                                        ,MDIOS_MDIO                       ,                               ,LTDC_R1   ,EVENTOUT,ADC1_INP14
+PortA,PA3 ,                ,TIM2_CH4           ,TIM5_CH4               ,OCTOSPIM_P1_CLK                           ,TIM15_CH2                                            ,I2S6_MCK                                          ,                                              ,USART2_RX                                              ,                                                ,LTDC_B2                                                ,USB_OTG_HS_ULPI_D0                                      ,                                                                        ,                                 ,                               ,LTDC_B5   ,EVENTOUT,ADC1_INP15
+PortA,PA4 ,                ,                   ,TIM5_ETR               ,                                          ,                                                     ,I2S1_WS/SPI1_NSS                                  ,I2S3_WS/SPI3_NSS                              ,USART2_CK                                              ,I2S6_WS/SPI6_NSS                                ,                                                       ,                                                        ,                                                                        ,                                 ,DCMI_HSYNC/PSSI_DE             ,LTDC_VSYNC,EVENTOUT,ADC1_INP18
+PortA,PA5 ,PWR_NDSTOP2     ,TIM2_CH1/TIM2_ETR  ,                       ,TIM8_CH1N                                 ,                                                     ,I2S1_CK/SPI1_SCK                                  ,                                              ,                                                       ,I2S6_CK/SPI6_SCK                                ,                                                       ,USB_OTG_HS_ULPI_CK                                      ,                                                                        ,                                 ,PSSI_D14                       ,LTDC_R4   ,EVENTOUT,ADC1_INN18/ADC1_INP19
+PortA,PA6 ,                ,TIM1_BKIN          ,TIM3_CH1               ,TIM8_BKIN                                 ,                                                     ,I2S1_SDI/SPI1_MISO                                ,OCTOSPIM_P1_IO3                               ,                                                       ,I2S6_SDI/SPI6_MISO                              ,TIM13_CH1                                              ,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2                         ,MDIOS_MDC                                                               ,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2  ,DCMI_PIXCLK/PSSI_PDCK          ,LTDC_G2   ,EVENTOUT,ADC1_INP3/ADC2_INP3
+PortA,PA7 ,                ,TIM1_CH1N          ,TIM3_CH2               ,TIM8_CH1N                                 ,DFSDM2_DATIN1                                        ,I2S1_SDO/SPI1_MOSI                                ,                                              ,                                                       ,I2S6_SDO/SPI6_MOSI                              ,TIM14_CH1                                              ,OCTOSPIM_P1_IO2                                         ,                                                                        ,FMC_SDNWE                        ,                               ,LTDC_VSYNC,EVENTOUT,ADC1_INN3/ADC1_INP7/ADC2_INN3/ADC2_INP7
+PortA,PA8 ,RCC_MCO_1       ,TIM1_CH1           ,                       ,TIM8_BKIN2                                ,I2C3_SCL                                             ,                                                  ,                                              ,USART1_CK                                              ,                                                ,                                                       ,USB_OTG_HS_SOF                                          ,UART7_RX                                                                ,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2,LTDC_B3                        ,LTDC_R6   ,EVENTOUT,
+PortA,PA9 ,                ,TIM1_CH2           ,                       ,LPUART1_TX                                ,I2C3_SMBA                                            ,I2S2_CK/SPI2_SCK                                  ,                                              ,USART1_TX                                              ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,DCMI_D0/PSSI_D0                ,LTDC_R5   ,EVENTOUT,
+PortA,PA10,                ,TIM1_CH3           ,                       ,LPUART1_RX                                ,                                                     ,                                                  ,                                              ,USART1_RX                                              ,                                                ,                                                       ,USB_OTG_HS_ID                                           ,MDIOS_MDIO                                                              ,LTDC_B4                          ,DCMI_D1/PSSI_D1                ,LTDC_B1   ,EVENTOUT,
+PortA,PA11,                ,TIM1_CH4           ,                       ,LPUART1_CTS                               ,                                                     ,I2S2_WS/SPI2_NSS                                  ,UART4_RX                                      ,USART1_CTS/USART1_NSS                                  ,                                                ,FDCAN1_RX                                              ,                                                        ,                                                                        ,                                 ,                               ,LTDC_R4   ,EVENTOUT,
+PortA,PA12,                ,TIM1_ETR           ,                       ,LPUART1_DE/LPUART1_RTS                    ,                                                     ,I2S2_CK/SPI2_SCK                                  ,UART4_TX                                      ,USART1_DE/USART1_RTS                                   ,SAI2_FS_B                                       ,FDCAN1_TX                                              ,                                                        ,                                                                        ,                                 ,                               ,LTDC_R5   ,EVENTOUT,
+PortA,PA13,DEBUG_JTMS/SWDIO,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortA,PA14,DEBUG_JTCK/SWCLK,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortA,PA15,DEBUG_JTDI      ,TIM2_CH1/TIM2_ETR  ,                       ,                                          ,CEC                                                  ,I2S1_WS/SPI1_NSS                                  ,I2S3_WS/SPI3_NSS                              ,I2S6_WS/SPI6_NSS                                       ,UART4_DE/UART4_RTS                              ,LTDC_R3                                                ,                                                        ,UART7_TX                                                                ,                                 ,                               ,LTDC_B6   ,EVENTOUT,
+PortB,PB0 ,                ,TIM1_CH2N          ,TIM3_CH3               ,TIM8_CH2N                                 ,DFSDM2_CKOUT                                         ,                                                  ,DFSDM1_CKOUT                                  ,                                                       ,UART4_CTS                                       ,LTDC_R3                                                ,USB_OTG_HS_ULPI_D1                                      ,OCTOSPIM_P1_IO1                                                         ,                                 ,                               ,LTDC_G1   ,EVENTOUT,ADC1_INN5/ADC1_INP9/ADC2_INN5/ADC2_INP9
+PortB,PB1 ,                ,TIM1_CH3N          ,TIM3_CH4               ,TIM8_CH3N                                 ,                                                     ,                                                  ,DFSDM1_DATIN1                                 ,                                                       ,                                                ,LTDC_R6                                                ,USB_OTG_HS_ULPI_D2                                      ,OCTOSPIM_P1_IO0                                                         ,                                 ,                               ,LTDC_G0   ,EVENTOUT,ADC1_INP5/ADC2_INP5
+PortB,PB2 ,RTC_OUT_ALARM   ,                   ,SAI1_D1                ,                                          ,DFSDM1_CKIN1                                         ,                                                  ,SAI1_SD_A                                     ,I2S3_SDO/SPI3_MOSI                                     ,                                                ,OCTOSPIM_P1_CLK                                        ,OCTOSPIM_P1_DQS                                         ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortB,PB3 ,DEBUG_JTDO/SWO  ,TIM2_CH2           ,                       ,                                          ,                                                     ,I2S1_CK/SPI1_SCK                                  ,I2S3_CK/SPI3_SCK                              ,                                                       ,I2S6_CK/SPI6_SCK                                ,SDMMC2_D2                                              ,CRS_SYNC                                                ,UART7_RX                                                                ,                                 ,                               ,          ,EVENTOUT,
+PortB,PB4 ,                ,TIM16_BKIN         ,TIM3_CH1               ,                                          ,                                                     ,I2S1_SDI/SPI1_MISO                                ,I2S3_SDI/SPI3_MISO                            ,I2S2_WS/SPI2_NSS                                       ,I2S6_SDI/SPI6_MISO                              ,SDMMC2_D3                                              ,                                                        ,UART7_TX                                                                ,                                 ,                               ,          ,EVENTOUT,
+PortB,PB5 ,                ,TIM17_BKIN         ,TIM3_CH2               ,                                          ,I2C1_SMBA                                            ,I2S1_SDO/SPI1_MOSI                                ,I2C4_SMBA                                     ,I2S3_SDO/SPI3_MOSI                                     ,I2S6_SDO/SPI6_MOSI                              ,FDCAN2_RX                                              ,USB_OTG_HS_ULPI_D7                                      ,LTDC_B5                                                                 ,FMC_SDCKE1                       ,DCMI_D10/PSSI_D10              ,UART5_RX  ,EVENTOUT,
+PortB,PB6 ,                ,TIM16_CH1N         ,TIM4_CH1               ,                                          ,I2C1_SCL                                             ,CEC                                               ,I2C4_SCL                                      ,USART1_TX                                              ,LPUART1_TX                                      ,FDCAN2_TX                                              ,OCTOSPIM_P1_NCS                                         ,DFSDM1_DATIN5                                                           ,FMC_SDNE1                        ,DCMI_D5/PSSI_D5                ,UART5_TX  ,EVENTOUT,
+PortB,PB7 ,                ,TIM17_CH1N         ,TIM4_CH2               ,                                          ,I2C1_SDA                                             ,                                                  ,I2C4_SDA                                      ,USART1_RX                                              ,LPUART1_RX                                      ,                                                       ,                                                        ,DFSDM1_CKIN5                                                            ,FMC_NL                           ,DCMI_VSYNC/PSSI_RDY            ,          ,EVENTOUT,
+PortB,PB8 ,                ,TIM16_CH1          ,TIM4_CH3               ,DFSDM1_CKIN7                              ,I2C1_SCL                                             ,                                                  ,I2C4_SCL                                      ,SDMMC1_CKIN                                            ,UART4_RX                                        ,FDCAN1_RX                                              ,SDMMC2_D4                                               ,                                                                        ,SDMMC1_D4                        ,DCMI_D6/PSSI_D6                ,LTDC_B6   ,EVENTOUT,
+PortB,PB9 ,                ,TIM17_CH1          ,TIM4_CH4               ,DFSDM1_DATIN7                             ,I2C1_SDA                                             ,I2S2_WS/SPI2_NSS                                  ,I2C4_SDA                                      ,SDMMC1_CDIR                                            ,UART4_TX                                        ,FDCAN1_TX                                              ,SDMMC2_D5                                               ,I2C4_SMBA                                                               ,SDMMC1_D5                        ,DCMI_D7/PSSI_D7                ,LTDC_B7   ,EVENTOUT,
+PortB,PB10,                ,TIM2_CH3           ,                       ,LPTIM2_IN1                                ,I2C2_SCL                                             ,I2S2_CK/SPI2_SCK                                  ,DFSDM1_DATIN7                                 ,USART3_TX                                              ,                                                ,OCTOSPIM_P1_NCS                                        ,USB_OTG_HS_ULPI_D3                                      ,                                                                        ,                                 ,                               ,LTDC_G4   ,EVENTOUT,
+PortB,PB11,                ,TIM2_CH4           ,                       ,LPTIM2_ETR                                ,I2C2_SDA                                             ,                                                  ,DFSDM1_CKIN7                                  ,USART3_RX                                              ,                                                ,                                                       ,USB_OTG_HS_ULPI_D4                                      ,                                                                        ,                                 ,                               ,LTDC_G5   ,EVENTOUT,
+PortB,PB12,                ,TIM1_BKIN          ,                       ,OCTOSPIM_P1_NCLK                          ,I2C2_SMBA                                            ,I2S2_WS/SPI2_NSS                                  ,DFSDM1_DATIN1                                 ,USART3_CK                                              ,                                                ,FDCAN2_RX                                              ,USB_OTG_HS_ULPI_D5                                      ,DFSDM2_DATIN1                                                           ,                                 ,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,UART5_RX  ,EVENTOUT,
+PortB,PB13,                ,TIM1_CH1N          ,                       ,LPTIM2_OUT                                ,DFSDM2_CKIN1                                         ,I2S2_CK/SPI2_SCK                                  ,DFSDM1_CKIN1                                  ,USART3_CTS/USART3_NSS                                  ,                                                ,FDCAN2_TX                                              ,USB_OTG_HS_ULPI_D6                                      ,                                                                        ,SDMMC1_D0                        ,DCMI_D2/PSSI_D2                ,UART5_TX  ,EVENTOUT,
+PortB,PB14,                ,TIM1_CH2N          ,TIM12_CH1              ,TIM8_CH2N                                 ,USART1_TX                                            ,I2S2_SDI/SPI2_MISO                                ,DFSDM1_DATIN2                                 ,USART3_DE/USART3_RTS                                   ,UART4_DE/UART4_RTS                              ,SDMMC2_D0                                              ,                                                        ,                                                                        ,                                 ,                               ,LTDC_CLK  ,EVENTOUT,
+PortB,PB15,RTC_REFIN       ,TIM1_CH3N          ,TIM12_CH2              ,TIM8_CH3N                                 ,USART1_RX                                            ,I2S2_SDO/SPI2_MOSI                                ,DFSDM1_CKIN2                                  ,                                                       ,UART4_CTS                                       ,SDMMC2_D1                                              ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G7   ,EVENTOUT,
+PortC,PC0 ,                ,                   ,                       ,DFSDM1_CKIN0                              ,                                                     ,                                                  ,DFSDM1_DATIN4                                 ,                                                       ,SAI2_FS_B                                       ,FMC_A25                                                ,USB_OTG_HS_ULPI_STP                                     ,LTDC_G2                                                                 ,FMC_SDNWE                        ,                               ,LTDC_R5   ,EVENTOUT,ADC1_INP10/ADC2_INP10
+PortC,PC1 ,DEBUG_TRACED0   ,                   ,SAI1_D1                ,DFSDM1_DATIN0                             ,DFSDM1_CKIN4                                         ,I2S2_SDO/SPI2_MOSI                                ,SAI1_SD_A                                     ,                                                       ,                                                ,SDMMC2_CK                                              ,OCTOSPIM_P1_IO4                                         ,                                                                        ,MDIOS_MDC                        ,                               ,LTDC_G5   ,EVENTOUT,ADC1_INN10/ADC1_INP11/ADC2_INN10/ADC2_INP11
+PortC,PC2 ,PWR_CSTOP       ,                   ,                       ,DFSDM1_CKIN1                              ,                                                     ,I2S2_SDI/SPI2_MISO                                ,DFSDM1_CKOUT                                  ,                                                       ,                                                ,OCTOSPIM_P1_IO2                                        ,USB_OTG_HS_ULPI_DIR                                     ,OCTOSPIM_P1_IO5                                                         ,FMC_SDNE0                        ,                               ,          ,EVENTOUT,ADC1_INN11/ADC1_INP12/ADC2_INN11/ADC2_INP12
+PortC,PC3 ,PWR_CSLEEP      ,                   ,                       ,DFSDM1_DATIN1                             ,                                                     ,I2S2_SDO/SPI2_MOSI                                ,                                              ,                                                       ,                                                ,OCTOSPIM_P1_IO0                                        ,USB_OTG_HS_ULPI_NXT                                     ,OCTOSPIM_P1_IO6                                                         ,FMC_SDCKE0                       ,                               ,          ,EVENTOUT,ADC2_INP1
+PortC,PC4 ,                ,                   ,                       ,DFSDM1_CKIN2                              ,                                                     ,I2S1_MCK                                          ,                                              ,                                                       ,                                                ,SPDIFRX_IN3                                            ,                                                        ,                                                                        ,FMC_SDNE0                        ,                               ,LTDC_R7   ,EVENTOUT,ADC1_INP4/ADC2_INP4
+PortC,PC5 ,                ,                   ,SAI1_D3                ,DFSDM1_DATIN2                             ,PSSI_D15                                             ,                                                  ,                                              ,                                                       ,                                                ,SPDIFRX_IN4                                            ,OCTOSPIM_P1_DQS                                         ,                                                                        ,FMC_SDCKE0                       ,COMP1_OUT                      ,LTDC_DE   ,EVENTOUT,ADC1_INN4/ADC1_INP8/ADC2_INN4/ADC2_INP8
+PortC,PC6 ,                ,                   ,TIM3_CH1               ,TIM8_CH1                                  ,DFSDM1_CKIN3                                         ,I2S2_MCK                                          ,                                              ,USART6_TX                                              ,SDMMC1_D0DIR                                    ,FMC_NWAIT                                              ,SDMMC2_D6                                               ,                                                                        ,SDMMC1_D6                        ,DCMI_D0/PSSI_D0                ,LTDC_HSYNC,EVENTOUT,
+PortC,PC7 ,DEBUG_TRGIO     ,                   ,TIM3_CH2               ,TIM8_CH2                                  ,DFSDM1_DATIN3                                        ,                                                  ,I2S3_MCK                                      ,USART6_RX                                              ,SDMMC1_D123DIR                                  ,FMC_NE1                                                ,SDMMC2_D7                                               ,SWPMI1_TX                                                               ,SDMMC1_D7                        ,DCMI_D1/PSSI_D1                ,LTDC_G6   ,EVENTOUT,
+PortC,PC8 ,DEBUG_TRACED1   ,                   ,TIM3_CH3               ,TIM8_CH3                                  ,                                                     ,                                                  ,                                              ,USART6_CK                                              ,UART5_DE/UART5_RTS                              ,FMC_NCE/FMC_NE2                                        ,FMC_INT                                                 ,SWPMI1_RX                                                               ,SDMMC1_D0                        ,DCMI_D2/PSSI_D2                ,          ,EVENTOUT,
+PortC,PC9 ,RCC_MCO_2       ,                   ,TIM3_CH4               ,TIM8_CH4                                  ,I2C3_SDA                                             ,I2S_CKIN                                          ,                                              ,                                                       ,UART5_CTS                                       ,OCTOSPIM_P1_IO0                                        ,LTDC_G3                                                 ,SWPMI1_SUSPEND                                                          ,SDMMC1_D1                        ,DCMI_D3/PSSI_D3                ,LTDC_B2   ,EVENTOUT,
+PortC,PC10,                ,                   ,                       ,DFSDM1_CKIN5                              ,DFSDM2_CKIN0                                         ,                                                  ,I2S3_CK/SPI3_SCK                              ,USART3_TX                                              ,UART4_TX                                        ,OCTOSPIM_P1_IO1                                        ,LTDC_B1                                                 ,SWPMI1_RX                                                               ,SDMMC1_D2                        ,DCMI_D8/PSSI_D8                ,LTDC_R2   ,EVENTOUT,
+PortC,PC11,                ,                   ,                       ,DFSDM1_DATIN5                             ,DFSDM2_DATIN0                                        ,                                                  ,I2S3_SDI/SPI3_MISO                            ,USART3_RX                                              ,UART4_RX                                        ,OCTOSPIM_P1_NCS                                        ,                                                        ,                                                                        ,SDMMC1_D3                        ,DCMI_D4/PSSI_D4                ,LTDC_B4   ,EVENTOUT,
+PortC,PC12,DEBUG_TRACED3   ,                   ,TIM15_CH1              ,                                          ,DFSDM2_CKOUT                                         ,I2S6_CK/SPI6_SCK                                  ,I2S3_SDO/SPI3_MOSI                            ,USART3_CK                                              ,UART5_TX                                        ,                                                       ,                                                        ,                                                                        ,SDMMC1_CK                        ,DCMI_D9/PSSI_D9                ,LTDC_R6   ,EVENTOUT,
+PortC,PC13,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortC,PC14,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortC,PC15,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortD,PD0 ,                ,                   ,                       ,DFSDM1_CKIN6                              ,                                                     ,                                                  ,                                              ,                                                       ,UART4_RX                                        ,FDCAN1_RX                                              ,                                                        ,UART9_CTS                                                               ,FMC_D2/FMC_DA2                   ,                               ,LTDC_B1   ,EVENTOUT,
+PortD,PD1 ,                ,                   ,                       ,DFSDM1_DATIN6                             ,                                                     ,                                                  ,                                              ,                                                       ,UART4_TX                                        ,FDCAN1_TX                                              ,                                                        ,                                                                        ,FMC_D3/FMC_DA3                   ,                               ,          ,EVENTOUT,
+PortD,PD2 ,DEBUG_TRACED2   ,                   ,TIM3_ETR               ,                                          ,TIM15_BKIN                                           ,                                                  ,                                              ,                                                       ,UART5_RX                                        ,LTDC_B7                                                ,                                                        ,                                                                        ,SDMMC1_CMD                       ,DCMI_D11/PSSI_D11              ,LTDC_B2   ,EVENTOUT,
+PortD,PD3 ,                ,                   ,                       ,DFSDM1_CKOUT                              ,                                                     ,I2S2_CK/SPI2_SCK                                  ,                                              ,USART2_CTS/USART2_NSS                                  ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_CLK                          ,DCMI_D5/PSSI_D5                ,LTDC_G7   ,EVENTOUT,
+PortD,PD4 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,USART2_DE/USART2_RTS                                   ,                                                ,                                                       ,OCTOSPIM_P1_IO4                                         ,                                                                        ,FMC_NOE                          ,                               ,          ,EVENTOUT,
+PortD,PD5 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,USART2_TX                                              ,                                                ,                                                       ,OCTOSPIM_P1_IO5                                         ,                                                                        ,FMC_NWE                          ,                               ,          ,EVENTOUT,
+PortD,PD6 ,                ,                   ,SAI1_D1                ,DFSDM1_CKIN4                              ,DFSDM1_DATIN1                                        ,I2S3_SDO/SPI3_MOSI                                ,SAI1_SD_A                                     ,USART2_RX                                              ,                                                ,                                                       ,OCTOSPIM_P1_IO6                                         ,SDMMC2_CK                                                               ,FMC_NWAIT                        ,DCMI_D10/PSSI_D10              ,LTDC_B2   ,EVENTOUT,
+PortD,PD7 ,                ,                   ,                       ,DFSDM1_DATIN4                             ,                                                     ,I2S1_SDO/SPI1_MOSI                                ,DFSDM1_CKIN1                                  ,USART2_CK                                              ,                                                ,SPDIFRX_IN1                                            ,OCTOSPIM_P1_IO7                                         ,SDMMC2_CMD                                                              ,FMC_NE1                          ,                               ,          ,EVENTOUT,
+PortD,PD8 ,                ,                   ,                       ,DFSDM1_CKIN3                              ,                                                     ,                                                  ,                                              ,USART3_TX                                              ,                                                ,SPDIFRX_IN2                                            ,                                                        ,                                                                        ,FMC_D13/FMC_DA13                 ,                               ,          ,EVENTOUT,
+PortD,PD9 ,                ,                   ,                       ,DFSDM1_DATIN3                             ,                                                     ,                                                  ,                                              ,USART3_RX                                              ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D14/FMC_DA14                 ,                               ,          ,EVENTOUT,
+PortD,PD10,                ,                   ,                       ,DFSDM1_CKOUT                              ,DFSDM2_CKOUT                                         ,                                                  ,                                              ,USART3_CK                                              ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D15/FMC_DA15                 ,                               ,LTDC_B3   ,EVENTOUT,
+PortD,PD11,                ,                   ,                       ,LPTIM2_IN2                                ,I2C4_SMBA                                            ,                                                  ,                                              ,USART3_CTS/USART3_NSS                                  ,                                                ,OCTOSPIM_P1_IO0                                        ,SAI2_SD_A                                               ,                                                                        ,FMC_A16/FMC_CLE                  ,                               ,          ,EVENTOUT,
+PortD,PD12,                ,LPTIM1_IN1         ,TIM4_CH1               ,LPTIM2_IN1                                ,I2C4_SCL                                             ,                                                  ,                                              ,USART3_DE/USART3_RTS                                   ,                                                ,OCTOSPIM_P1_IO1                                        ,SAI2_FS_A                                               ,                                                                        ,FMC_A17/FMC_ALE                  ,DCMI_D12/PSSI_D12              ,          ,EVENTOUT,
+PortD,PD13,                ,LPTIM1_OUT         ,TIM4_CH2               ,                                          ,I2C4_SDA                                             ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P1_IO3                                        ,SAI2_SCK_A                                              ,UART9_DE/UART9_RTS                                                      ,FMC_A18                          ,DCMI_D13/PSSI_D13              ,          ,EVENTOUT,
+PortD,PD14,                ,                   ,TIM4_CH3               ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,UART8_CTS                                       ,                                                       ,                                                        ,UART9_RX                                                                ,FMC_D0/FMC_DA0                   ,                               ,          ,EVENTOUT,
+PortD,PD15,                ,                   ,TIM4_CH4               ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,UART8_DE/UART8_RTS                              ,                                                       ,                                                        ,UART9_TX                                                                ,FMC_D1/FMC_DA1                   ,                               ,          ,EVENTOUT,
+PortE,PE0 ,                ,LPTIM1_ETR         ,TIM4_ETR               ,                                          ,LPTIM2_ETR                                           ,                                                  ,                                              ,                                                       ,UART8_RX                                        ,                                                       ,SAI2_MCLK_A                                             ,                                                                        ,FMC_NBL0                         ,DCMI_D2/PSSI_D2                ,LTDC_R0   ,EVENTOUT,
+PortE,PE1 ,                ,LPTIM1_IN2         ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,UART8_TX                                        ,                                                       ,                                                        ,                                                                        ,FMC_NBL1                         ,DCMI_D3/PSSI_D3                ,LTDC_R6   ,EVENTOUT,
+PortE,PE2 ,DEBUG_TRACECLK  ,                   ,SAI1_CK1               ,                                          ,                                                     ,SPI4_SCK                                          ,SAI1_MCLK_A                                   ,                                                       ,                                                ,OCTOSPIM_P1_IO2                                        ,                                                        ,USART10_RX                                                              ,FMC_A23                          ,                               ,          ,EVENTOUT,
+PortE,PE3 ,DEBUG_TRACED0   ,                   ,                       ,                                          ,TIM15_BKIN                                           ,                                                  ,SAI1_SD_B                                     ,                                                       ,                                                ,                                                       ,                                                        ,USART10_TX                                                              ,FMC_A19                          ,                               ,          ,EVENTOUT,
+PortE,PE4 ,DEBUG_TRACED1   ,                   ,SAI1_D2                ,DFSDM1_DATIN3                             ,TIM15_CH1N                                           ,SPI4_NSS                                          ,SAI1_FS_A                                     ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_A20                          ,DCMI_D4/PSSI_D4                ,LTDC_B0   ,EVENTOUT,
+PortE,PE5 ,DEBUG_TRACED2   ,                   ,SAI1_CK2               ,DFSDM1_CKIN3                              ,TIM15_CH1                                            ,SPI4_MISO                                         ,SAI1_SCK_A                                    ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_A21                          ,DCMI_D6/PSSI_D6                ,LTDC_G0   ,EVENTOUT,
+PortE,PE6 ,DEBUG_TRACED3   ,TIM1_BKIN2         ,SAI1_D1                ,                                          ,TIM15_CH2                                            ,SPI4_MOSI                                         ,SAI1_SD_A                                     ,                                                       ,                                                ,                                                       ,SAI2_MCLK_B                                             ,TIM1_BKIN2_COMP1/TIM1_BKIN2_COMP2                                       ,FMC_A22                          ,DCMI_D7/PSSI_D7                ,LTDC_G1   ,EVENTOUT,
+PortE,PE7 ,                ,TIM1_ETR           ,                       ,DFSDM1_DATIN2                             ,                                                     ,                                                  ,                                              ,UART7_RX                                               ,                                                ,                                                       ,OCTOSPIM_P1_IO4                                         ,                                                                        ,FMC_D4/FMC_DA4                   ,                               ,          ,EVENTOUT,
+PortE,PE8 ,                ,TIM1_CH1N          ,                       ,DFSDM1_CKIN2                              ,                                                     ,                                                  ,                                              ,UART7_TX                                               ,                                                ,                                                       ,OCTOSPIM_P1_IO5                                         ,                                                                        ,FMC_D5/FMC_DA5                   ,COMP2_OUT                      ,          ,EVENTOUT,
+PortE,PE9 ,                ,TIM1_CH1           ,                       ,DFSDM1_CKOUT                              ,                                                     ,                                                  ,                                              ,UART7_DE/UART7_RTS                                     ,                                                ,                                                       ,OCTOSPIM_P1_IO6                                         ,                                                                        ,FMC_D6/FMC_DA6                   ,                               ,          ,EVENTOUT,
+PortE,PE10,                ,TIM1_CH2N          ,                       ,DFSDM1_DATIN4                             ,                                                     ,                                                  ,                                              ,UART7_CTS                                              ,                                                ,                                                       ,OCTOSPIM_P1_IO7                                         ,                                                                        ,FMC_D7/FMC_DA7                   ,                               ,          ,EVENTOUT,
+PortE,PE11,                ,TIM1_CH2           ,                       ,DFSDM1_CKIN4                              ,                                                     ,SPI4_NSS                                          ,                                              ,                                                       ,                                                ,                                                       ,SAI2_SD_B                                               ,OCTOSPIM_P1_NCS                                                         ,FMC_D8/FMC_DA8                   ,                               ,LTDC_G3   ,EVENTOUT,
+PortE,PE12,                ,TIM1_CH3N          ,                       ,DFSDM1_DATIN5                             ,                                                     ,SPI4_SCK                                          ,                                              ,                                                       ,                                                ,                                                       ,SAI2_SCK_B                                              ,                                                                        ,FMC_D9/FMC_DA9                   ,COMP1_OUT                      ,LTDC_B4   ,EVENTOUT,
+PortE,PE13,                ,TIM1_CH3           ,                       ,DFSDM1_CKIN5                              ,                                                     ,SPI4_MISO                                         ,                                              ,                                                       ,                                                ,                                                       ,SAI2_FS_B                                               ,                                                                        ,FMC_D10/FMC_DA10                 ,COMP2_OUT                      ,LTDC_DE   ,EVENTOUT,
+PortE,PE14,                ,TIM1_CH4           ,                       ,                                          ,                                                     ,SPI4_MOSI                                         ,                                              ,                                                       ,                                                ,                                                       ,SAI2_MCLK_B                                             ,                                                                        ,FMC_D11/FMC_DA11                 ,                               ,LTDC_CLK  ,EVENTOUT,
+PortE,PE15,                ,TIM1_BKIN          ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,USART10_CK                                                              ,FMC_D12/FMC_DA12                 ,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,LTDC_R7   ,EVENTOUT,
+PortF,PF0 ,                ,                   ,                       ,                                          ,I2C2_SDA                                             ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_IO0                                        ,                                                        ,                                                                        ,FMC_A0                           ,                               ,          ,EVENTOUT,
+PortF,PF1 ,                ,                   ,                       ,                                          ,I2C2_SCL                                             ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_IO1                                        ,                                                        ,                                                                        ,FMC_A1                           ,                               ,          ,EVENTOUT,
+PortF,PF2 ,                ,                   ,                       ,                                          ,I2C2_SMBA                                            ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_IO2                                        ,                                                        ,                                                                        ,FMC_A2                           ,                               ,          ,EVENTOUT,
+PortF,PF3 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_IO3                                        ,                                                        ,                                                                        ,FMC_A3                           ,                               ,          ,EVENTOUT,
+PortF,PF4 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_CLK                                        ,                                                        ,                                                                        ,FMC_A4                           ,                               ,          ,EVENTOUT,
+PortF,PF5 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_NCLK                                       ,                                                        ,                                                                        ,FMC_A5                           ,                               ,          ,EVENTOUT,
+PortF,PF6 ,                ,TIM16_CH1          ,                       ,                                          ,                                                     ,SPI5_NSS                                          ,SAI1_SD_B                                     ,UART7_RX                                               ,                                                ,                                                       ,OCTOSPIM_P1_IO3                                         ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortF,PF7 ,                ,TIM17_CH1          ,                       ,                                          ,                                                     ,SPI5_SCK                                          ,SAI1_MCLK_B                                   ,UART7_TX                                               ,                                                ,                                                       ,OCTOSPIM_P1_IO2                                         ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortF,PF8 ,                ,TIM16_CH1N         ,                       ,                                          ,                                                     ,SPI5_MISO                                         ,SAI1_SCK_B                                    ,UART7_DE/UART7_RTS                                     ,                                                ,TIM13_CH1                                              ,OCTOSPIM_P1_IO0                                         ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortF,PF9 ,                ,TIM17_CH1N         ,                       ,                                          ,                                                     ,SPI5_MOSI                                         ,SAI1_FS_B                                     ,UART7_CTS                                              ,                                                ,TIM14_CH1                                              ,OCTOSPIM_P1_IO1                                         ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortF,PF10,                ,TIM16_BKIN         ,SAI1_D3                ,                                          ,PSSI_D15                                             ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P1_CLK                                        ,                                                        ,                                                                        ,                                 ,DCMI_D11/PSSI_D11              ,LTDC_DE   ,EVENTOUT,
+PortF,PF11,                ,                   ,                       ,                                          ,                                                     ,SPI5_MOSI                                         ,                                              ,                                                       ,                                                ,OCTOSPIM_P1_NCLK                                       ,SAI2_SD_B                                               ,                                                                        ,FMC_SDNRAS                       ,DCMI_D12/PSSI_D12              ,          ,EVENTOUT,ADC1_INP2
+PortF,PF12,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_DQS                                        ,                                                        ,                                                                        ,FMC_A6                           ,                               ,          ,EVENTOUT,ADC1_INN2/ADC1_INP6
+PortF,PF13,                ,                   ,                       ,DFSDM1_DATIN6                             ,I2C4_SMBA                                            ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_A7                           ,                               ,          ,EVENTOUT,ADC2_INP2
+PortF,PF14,                ,                   ,                       ,DFSDM1_CKIN6                              ,I2C4_SCL                                             ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_A8                           ,                               ,          ,EVENTOUT,ADC2_INN2/ADC2_INP6
+PortF,PF15,                ,                   ,                       ,                                          ,I2C4_SDA                                             ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_A9                           ,                               ,          ,EVENTOUT,
+PortG,PG0 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_IO4                                        ,                                                        ,UART9_RX                                                                ,FMC_A10                          ,                               ,          ,EVENTOUT,
+PortG,PG1 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P2_IO5                                        ,                                                        ,UART9_TX                                                                ,FMC_A11                          ,                               ,          ,EVENTOUT,
+PortG,PG2 ,                ,                   ,                       ,TIM8_BKIN                                 ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2                                         ,FMC_A12                          ,                               ,          ,EVENTOUT,
+PortG,PG3 ,                ,                   ,                       ,TIM8_BKIN2                                ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2                                       ,FMC_A13                          ,                               ,          ,EVENTOUT,
+PortG,PG4 ,                ,TIM1_BKIN2         ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,TIM1_BKIN2_COMP1/TIM1_BKIN2_COMP2                                       ,FMC_A14/FMC_BA0                  ,                               ,          ,EVENTOUT,
+PortG,PG5 ,                ,TIM1_ETR           ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_A15/FMC_BA1                  ,                               ,          ,EVENTOUT,
+PortG,PG6 ,                ,TIM17_BKIN         ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,OCTOSPIM_P1_NCS                                         ,                                                                        ,FMC_NE3                          ,DCMI_D12/PSSI_D12              ,LTDC_R7   ,EVENTOUT,
+PortG,PG7 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,SAI1_MCLK_A                                   ,USART6_CK                                              ,                                                ,OCTOSPIM_P2_DQS                                        ,                                                        ,                                                                        ,FMC_INT                          ,DCMI_D13/PSSI_D13              ,LTDC_CLK  ,EVENTOUT,
+PortG,PG8 ,                ,                   ,                       ,TIM8_ETR                                  ,                                                     ,I2S6_WS/SPI6_NSS                                  ,                                              ,USART6_DE/USART6_RTS                                   ,SPDIFRX_IN3                                     ,                                                       ,                                                        ,                                                                        ,FMC_SDCLK                        ,                               ,LTDC_G7   ,EVENTOUT,
+PortG,PG9 ,                ,                   ,                       ,                                          ,                                                     ,I2S1_SDI/SPI1_MISO                                ,                                              ,USART6_RX                                              ,SPDIFRX_IN4                                     ,OCTOSPIM_P1_IO6                                        ,SAI2_FS_B                                               ,SDMMC2_D0                                                               ,FMC_NCE/FMC_NE2                  ,DCMI_VSYNC/PSSI_RDY            ,          ,EVENTOUT,
+PortG,PG10,                ,                   ,                       ,OCTOSPIM_P2_IO6                           ,                                                     ,I2S1_WS/SPI1_NSS                                  ,                                              ,                                                       ,                                                ,LTDC_G3                                                ,SAI2_SD_B                                               ,SDMMC2_D1                                                               ,FMC_NE3                          ,DCMI_D2/PSSI_D2                ,LTDC_B2   ,EVENTOUT,
+PortG,PG11,                ,LPTIM1_IN2         ,                       ,                                          ,                                                     ,I2S1_CK/SPI1_SCK                                  ,                                              ,                                                       ,SPDIFRX_IN1                                     ,OCTOSPIM_P2_IO7                                        ,SDMMC2_D2                                               ,USART10_RX                                                              ,                                 ,DCMI_D3/PSSI_D3                ,LTDC_B3   ,EVENTOUT,
+PortG,PG12,                ,LPTIM1_IN1         ,                       ,OCTOSPIM_P2_NCS                           ,                                                     ,I2S6_SDI/SPI6_MISO                                ,                                              ,USART6_DE/USART6_RTS                                   ,SPDIFRX_IN2                                     ,LTDC_B4                                                ,SDMMC2_D3                                               ,USART10_TX                                                              ,FMC_NE4                          ,                               ,LTDC_B1   ,EVENTOUT,
+PortG,PG13,DEBUG_TRACED0   ,LPTIM1_OUT         ,                       ,                                          ,                                                     ,I2S6_CK/SPI6_SCK                                  ,                                              ,USART6_CTS/USART6_NSS                                  ,                                                ,                                                       ,SDMMC2_D6                                               ,USART10_CTS/USART10_NSS                                                 ,FMC_A24                          ,                               ,LTDC_R0   ,EVENTOUT,
+PortG,PG14,DEBUG_TRACED1   ,LPTIM1_ETR         ,                       ,                                          ,                                                     ,I2S6_SDO/SPI6_MOSI                                ,                                              ,USART6_TX                                              ,                                                ,OCTOSPIM_P1_IO7                                        ,SDMMC2_D7                                               ,USART10_DE/USART10_RTS                                                  ,FMC_A25                          ,                               ,LTDC_B0   ,EVENTOUT,
+PortG,PG15,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,USART6_CTS/USART6_NSS                                  ,                                                ,OCTOSPIM_P2_DQS                                        ,                                                        ,USART10_CK                                                              ,FMC_SDNCAS                       ,DCMI_D13/PSSI_D13              ,          ,EVENTOUT,
+PortH,PH0 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortH,PH1 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortH,PH2 ,                ,LPTIM1_IN2         ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P1_IO4                                        ,SAI2_SCK_B                                              ,                                                                        ,FMC_SDCKE0                       ,                               ,LTDC_R0   ,EVENTOUT,
+PortH,PH3 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,OCTOSPIM_P1_IO5                                        ,SAI2_MCLK_B                                             ,                                                                        ,FMC_SDNE0                        ,                               ,LTDC_R1   ,EVENTOUT,
+PortH,PH4 ,                ,                   ,                       ,                                          ,I2C2_SCL                                             ,                                                  ,                                              ,                                                       ,                                                ,LTDC_G5                                                ,USB_OTG_HS_ULPI_NXT                                     ,                                                                        ,                                 ,PSSI_D14                       ,LTDC_G4   ,EVENTOUT,
+PortH,PH5 ,                ,                   ,                       ,                                          ,I2C2_SDA                                             ,SPI5_NSS                                          ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_SDNWE                        ,                               ,          ,EVENTOUT,
+PortH,PH6 ,                ,                   ,TIM12_CH1              ,                                          ,I2C2_SMBA                                            ,SPI5_SCK                                          ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_SDNE1                        ,DCMI_D8/PSSI_D8                ,          ,EVENTOUT,
+PortH,PH7 ,                ,                   ,                       ,                                          ,I2C3_SCL                                             ,SPI5_MISO                                         ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_SDCKE1                       ,DCMI_D9/PSSI_D9                ,          ,EVENTOUT,
+PortH,PH8 ,                ,                   ,TIM5_ETR               ,                                          ,I2C3_SDA                                             ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D16                          ,DCMI_HSYNC/PSSI_DE             ,LTDC_R2   ,EVENTOUT,
+PortH,PH9 ,                ,                   ,TIM12_CH2              ,                                          ,I2C3_SMBA                                            ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D17                          ,DCMI_D0/PSSI_D0                ,LTDC_R3   ,EVENTOUT,
+PortH,PH10,                ,                   ,TIM5_CH1               ,                                          ,I2C4_SMBA                                            ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D18                          ,DCMI_D1/PSSI_D1                ,LTDC_R4   ,EVENTOUT,
+PortH,PH11,                ,                   ,TIM5_CH2               ,                                          ,I2C4_SCL                                             ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D19                          ,DCMI_D2/PSSI_D2                ,LTDC_R5   ,EVENTOUT,
+PortH,PH12,                ,                   ,TIM5_CH3               ,                                          ,I2C4_SDA                                             ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D20                          ,DCMI_D3/PSSI_D3                ,LTDC_R6   ,EVENTOUT,
+PortH,PH13,                ,                   ,                       ,TIM8_CH1N                                 ,                                                     ,                                                  ,                                              ,                                                       ,UART4_TX                                        ,FDCAN1_TX                                              ,                                                        ,                                                                        ,FMC_D21                          ,                               ,LTDC_G2   ,EVENTOUT,
+PortH,PH14,                ,                   ,                       ,TIM8_CH2N                                 ,                                                     ,                                                  ,                                              ,                                                       ,UART4_RX                                        ,FDCAN1_RX                                              ,                                                        ,                                                                        ,FMC_D22                          ,DCMI_D4/PSSI_D4                ,LTDC_G3   ,EVENTOUT,
+PortH,PH15,                ,                   ,                       ,TIM8_CH3N                                 ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D23                          ,DCMI_D11/PSSI_D11              ,LTDC_G4   ,EVENTOUT,
+PortI,PI0 ,                ,                   ,TIM5_CH4               ,                                          ,                                                     ,I2S2_WS/SPI2_NSS                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D24                          ,DCMI_D13/PSSI_D13              ,LTDC_G5   ,EVENTOUT,
+PortI,PI1 ,                ,                   ,                       ,TIM8_BKIN2                                ,                                                     ,I2S2_CK/SPI2_SCK                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2                                       ,FMC_D25                          ,DCMI_D8/PSSI_D8                ,LTDC_G6   ,EVENTOUT,
+PortI,PI2 ,                ,                   ,                       ,TIM8_CH4                                  ,                                                     ,I2S2_SDI/SPI2_MISO                                ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D26                          ,DCMI_D9/PSSI_D9                ,LTDC_G7   ,EVENTOUT,
+PortI,PI3 ,                ,                   ,                       ,TIM8_ETR                                  ,                                                     ,I2S2_SDO/SPI2_MOSI                                ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D27                          ,DCMI_D10/PSSI_D10              ,          ,EVENTOUT,
+PortI,PI4 ,                ,                   ,                       ,TIM8_BKIN                                 ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,SAI2_MCLK_A                                             ,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2                                         ,FMC_NBL2                         ,DCMI_D5/PSSI_D5                ,LTDC_B4   ,EVENTOUT,
+PortI,PI5 ,                ,                   ,                       ,TIM8_CH1                                  ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,SAI2_SCK_A                                              ,                                                                        ,FMC_NBL3                         ,DCMI_VSYNC/PSSI_RDY            ,LTDC_B5   ,EVENTOUT,
+PortI,PI6 ,                ,                   ,                       ,TIM8_CH2                                  ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,SAI2_SD_A                                               ,                                                                        ,FMC_D28                          ,DCMI_D6/PSSI_D6                ,LTDC_B6   ,EVENTOUT,
+PortI,PI7 ,                ,                   ,                       ,TIM8_CH3                                  ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,SAI2_FS_A                                               ,                                                                        ,FMC_D29                          ,DCMI_D7/PSSI_D7                ,LTDC_B7   ,EVENTOUT,
+PortI,PI8 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
+PortI,PI9 ,                ,                   ,                       ,OCTOSPIM_P2_IO0                           ,                                                     ,                                                  ,                                              ,                                                       ,UART4_RX                                        ,FDCAN1_RX                                              ,                                                        ,                                                                        ,FMC_D30                          ,                               ,LTDC_VSYNC,EVENTOUT,
+PortI,PI10,                ,                   ,                       ,OCTOSPIM_P2_IO1                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,FMC_D31                          ,PSSI_D14                       ,LTDC_HSYNC,EVENTOUT,
+PortI,PI11,                ,                   ,                       ,OCTOSPIM_P2_IO2                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,LTDC_G6                                                ,USB_OTG_HS_ULPI_DIR                                     ,                                                                        ,                                 ,PSSI_D15                       ,          ,EVENTOUT,
+PortI,PI12,                ,                   ,                       ,OCTOSPIM_P2_IO3                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_HSYNC,EVENTOUT,
+PortI,PI13,                ,                   ,                       ,OCTOSPIM_P2_CLK                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_VSYNC,EVENTOUT,
+PortI,PI14,                ,                   ,                       ,OCTOSPIM_P2_NCLK                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_CLK  ,EVENTOUT,
+PortI,PI15,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,LTDC_G2                                                ,                                                        ,                                                                        ,                                 ,                               ,LTDC_R0   ,EVENTOUT,
+PortJ,PJ0 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,LTDC_R7                                                ,                                                        ,                                                                        ,                                 ,                               ,LTDC_R1   ,EVENTOUT,
+PortJ,PJ1 ,                ,                   ,                       ,OCTOSPIM_P2_IO4                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_R2   ,EVENTOUT,
+PortJ,PJ2 ,                ,                   ,                       ,OCTOSPIM_P2_IO5                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_R3   ,EVENTOUT,
+PortJ,PJ3 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,UART9_DE/UART9_RTS                                                      ,                                 ,                               ,LTDC_R4   ,EVENTOUT,
+PortJ,PJ4 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,UART9_CTS                                                               ,                                 ,                               ,LTDC_R5   ,EVENTOUT,
+PortJ,PJ5 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_R6   ,EVENTOUT,
+PortJ,PJ6 ,                ,                   ,                       ,TIM8_CH2                                  ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_R7   ,EVENTOUT,
+PortJ,PJ7 ,DEBUG_TRGIN     ,                   ,                       ,TIM8_CH2N                                 ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G0   ,EVENTOUT,
+PortJ,PJ8 ,                ,TIM1_CH3N          ,                       ,TIM8_CH1                                  ,                                                     ,                                                  ,                                              ,                                                       ,UART8_TX                                        ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G1   ,EVENTOUT,
+PortJ,PJ9 ,                ,TIM1_CH3           ,                       ,TIM8_CH1N                                 ,                                                     ,                                                  ,                                              ,                                                       ,UART8_RX                                        ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G2   ,EVENTOUT,
+PortJ,PJ10,                ,TIM1_CH2N          ,                       ,TIM8_CH2                                  ,                                                     ,SPI5_MOSI                                         ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G3   ,EVENTOUT,
+PortJ,PJ11,                ,TIM1_CH2           ,                       ,TIM8_CH2N                                 ,                                                     ,SPI5_MISO                                         ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G4   ,EVENTOUT,
+PortJ,PJ12,DEBUG_TRGOUT    ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,LTDC_G3                                                ,                                                        ,                                                                        ,                                 ,                               ,LTDC_B0   ,EVENTOUT,
+PortJ,PJ13,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,LTDC_B4                                                ,                                                        ,                                                                        ,                                 ,                               ,LTDC_B1   ,EVENTOUT,
+PortJ,PJ14,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_B2   ,EVENTOUT,
+PortJ,PJ15,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_B3   ,EVENTOUT,
+PortK,PK0 ,                ,TIM1_CH1N          ,                       ,TIM8_CH3                                  ,                                                     ,SPI5_SCK                                          ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G5   ,EVENTOUT,
+PortK,PK1 ,                ,TIM1_CH1           ,                       ,TIM8_CH3N                                 ,                                                     ,SPI5_NSS                                          ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G6   ,EVENTOUT,
+PortK,PK2 ,                ,TIM1_BKIN          ,                       ,TIM8_BKIN                                 ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2                         ,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2                                         ,                                 ,                               ,LTDC_G7   ,EVENTOUT,
+PortK,PK3 ,                ,                   ,                       ,OCTOSPIM_P2_IO6                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_B4   ,EVENTOUT,
+PortK,PK4 ,                ,                   ,                       ,OCTOSPIM_P2_IO7                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_B5   ,EVENTOUT,
+PortK,PK5 ,                ,                   ,                       ,OCTOSPIM_P2_NCS                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_B6   ,EVENTOUT,
+PortK,PK6 ,                ,                   ,                       ,OCTOSPIM_P2_DQS                           ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_B7   ,EVENTOUT,
+PortK,PK7 ,                ,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,LTDC_DE   ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32l072_af.csv b/ports/stm32/boards/stm32l072_af.csv
index c9155bd444..3de03b0bc4 100644
--- a/ports/stm32/boards/stm32l072_af.csv
+++ b/ports/stm32/boards/stm32l072_af.csv
@@ -1,84 +1,84 @@
-Port,Pin,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,,
-,,SPI1/SPI2/I2S2/USART1/2/LPUART1/USB/LPTIM1/TSC/TIM2/21/22/EVENTOUT/SYS_AF,SPI1/SPI2/I2S2/I2C1/TIM2/21,SPI1/SPI2/I2S2/LPUART1/USART5/USB/LPTIM1/TIM2/3/EVENTOUT/SYS_AF,I2C1/TSC/EVENTOUT,I2C1/USART1/2/LPUART1/TIM3/22/EVENTOUT,SPI2/I2S2/I2C2/USART1/TIM2/21/22,I2C1/2/LPUART1/USART4/UASRT5/TIM21/EVENTOUT,I2C3/LPUART1/COMP1/2/TIM3,,ADC
-PortA,PA0,,,TIM2_CH1,TSC_G1_IO1,USART2_CTS,TIM2_ETR,USART4_TX,COMP1_OUT,,ADC_IN0
-PortA,PA1,EVENTOUT,,TIM2_CH2,TSC_G1_IO2,USART2_RTS/USART2_DE,TIM21_ETR,USART4_RX,,,ADC_IN1
-PortA,PA2,TIM21_CH1,,TIM2_CH3,TSC_G1_IO3,USART2_TX,,LPUART1_TX,COMP2_OUT,,ADC_IN2
-PortA,PA3,TIM21_CH2,,TIM2_CH4,TSC_G1_IO4,USART2_RX,,LPUART1_RX,,,ADC_IN3
-PortA,PA4,SPI1_NSS,,,TSC_G2_IO1,USART2_CK,TIM22_ETR,,,,ADC_IN4
-PortA,PA5,SPI1_SCK,,TIM2_ETR,TSC_G2_IO2,,TIM2_CH1,,,,ADC_IN5
-PortA,PA6,SPI1_MISO,,TIM3_CH1,TSC_G2_IO3,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,,ADC_IN6
-PortA,PA7,SPI1_MOSI,,TIM3_CH2,TSC_G2_IO4,,TIM22_CH2,EVENTOUT,COMP2_OUT,,ADC_IN7
-PortA,PA8,MCO,,USB_CRS_SYNC,EVENTOUT,USART1_CK,,,I2C3_SCL,,
-PortA,PA9,MCO,,,TSC_G4_IO1,USART1_TX,,I2C1_SCL,I2C3_SMBA,,
-PortA,PA10,,,,TSC_G4_IO2,USART1_RX,,I2C1_SDA,,,
-PortA,PA11,SPI1_MISO,,EVENTOUT,TSC_G4_IO3,USART1_CTS,,,COMP1_OUT,,
-PortA,PA12,SPI1_MOSI,,EVENTOUT,TSC_G4_IO4,USART1_RTS/USART1_DE,,,COMP2_OUT,,
-PortA,PA13,SWDIO,,USB_NOE,,,,LPUART1_RX,,,
-PortA,PA14,SWCLK,,,,USART2_TX,,LPUART1_TX,,,
-PortA,PA15,SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,USART4_RTS/USART4_DE,,,
-PortB,PB0,EVENTOUT,,TIM3_CH3,TSC_G3_IO2,,,,,,ADC_IN8
-PortB,PB1,,,TIM3_CH4,TSC_G3_IO3,LPUART1_RTS/LPUART1_DE,,,,,ADC_IN9
-PortB,PB2,,,LPTIM1_OUT,TSC_G3_IO4,,,,I2C3_SMBA,,
-PortB,PB3,SPI1_SCK,,TIM2_CH2,TSC_G5_IO1,EVENTOUT,USART1_RTS/USART1_DE,USART5_TX,,,
-PortB,PB4,SPI1_MISO,,TIM3_CH1,TSC_G5_IO2,TIM22_CH1,USART1_CTS,USART5_RX,I2C3_SDA,,
-PortB,PB5,SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM3_CH2/TIM22_CH2,USART1_CK,USART5_CK/USART5_RTS/USART5_DE,,,
-PortB,PB6,USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,,,,,,
-PortB,PB7,USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,,,USART4_CTS,,,
-PortB,PB8,,,,TSC_SYNC,I2C1_SCL,,,,,
-PortB,PB9,,,EVENTOUT,,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,
-PortB,PB10,,,TIM2_CH3,TSC_SYNC,LPUART1_TX,SPI2_SCK,I2C2_SCL,LPUART1_RX,,
-PortB,PB11,EVENTOUT,,TIM2_CH4,TSC_G6_IO1,LPUART1_RX,,I2C2_SDA,LPUART1_TX,,
-PortB,PB12,SPI2_NSS/I2S2_WS,,LPUART1_RTS/LPUART1_DE,TSC_G6_IO2,I2C2_SMBA,,EVENTOUT,,,
-PortB,PB13,SPI2_SCK/I2S2_CK,,MCO,TSC_G6_IO3,LPUART1_CTS,I2C2_SCL,TIM21_CH1,,,
-PortB,PB14,SPI2_MISO/I2S2_MCK,,RTC_OUT,TSC_G6_IO4,LPUART1_RTS/LPUART1_DE,I2C2_SDA,TIM21_CH2,,,
-PortB,PB15,SPI2_MOSI/I2S2_SD,,RTC_REFIN,,,,,,,
-PortC,PC0,LPTIM1_IN1,,EVENTOUT,TSC_G7_IO1,,,LPUART1_RX,I2C3_SCL,,ADC_IN10
-PortC,PC1,LPTIM1_OUT,,EVENTOUT,TSC_G7_IO2,,,LPUART1_TX,I2C3_SDA,,ADC_IN11
-PortC,PC2,LPTIM1_IN2,,SPI2_MISO/I2S2_MCK,TSC_G7_IO3,,,,,,ADC_IN12
-PortC,PC3,LPTIM1_ETR,,SPI2_MOSI/I2S2_SD,TSC_G7_IO4,,,,,,ADC_IN13
-PortC,PC4,EVENTOUT,,LPUART1_TX,,,,,,,ADC_IN14
-PortC,PC5,LPUART1_RX,,TSC_G3_IO1,,,,,,,ADC_IN15
-PortC,PC6,TIM22_CH1,,TIM3_CH1,TSC_G8_IO1,,,,,,
-PortC,PC7,TIM22_CH2,,TIM3_CH2,TSC_G8_IO2,,,,,,
-PortC,PC8,TIM22_ETR,,TIM3_CH3,TSC_G8_IO3,,,,,,
-PortC,PC9,TIM21_ETR,,USB_NOE/TIM3_CH4,TSC_G8_IO4,,,,I2C3_SDA,,
-PortC,PC10,LPUART1_TX,,,,,,USART4_TX,,,
-PortC,PC11,LPUART1_RX,,,,,,USART4_RX,,,
-PortC,PC12,,,USART5_TX,,,,USART4_CK,,,
-PortC,PC13,,,,,,,,,,
-PortC,PC14,,,,,,,,,,
-PortC,PC15,,,,,,,,,,
-PortD,PD0,TIM21_CH1,SPI2_NSS/I2S2_WS,,,,,,,,
-PortD,PD1,,SPI2_SCK/I2S2_CK,,,,,,,,
-PortD,PD2,LPUART1_RTS/LPUART1_DE,,TIM3_ETR,,,,USART5_RX,,,
-PortD,PD3,USART2_CTS,,SPI2_MISO/I2S2_MCK,,,,,,,
-PortD,PD4,USART2_RTS/USART2_DE,SPI2_MOSI/I2S2_SD,,,,,,,,
-PortD,PD5,USART2_TX,,,,,,,,,
-PortD,PD6,USART2_RX,,,,,,,,,
-PortD,PD7,USART2_CK,TIM21_CH2,,,,,,,,
-PortD,PD8,LPUART1_TX,,,,,,,,,
-PortD,PD9,LPUART1_RX,,,,,,,,,
-PortD,PD10,,,,,,,,,,
-PortD,PD11,LPUART1_CTS,,,,,,,,,
-PortD,PD12,LPUART1_RTS/LPUART1_DE,,,,,,,,,
-PortD,PD13,,,,,,,,,,
-PortD,PD14,,,,,,,,,,
-PortD,PD15,USB_CRS_SYNC,,,,,,,,,
-PortE,PE0,,,EVENTOUT,,,,,,,
-PortE,PE1,,,EVENTOUT,,,,,,,
-PortE,PE2,,,TIM3_ETR,,,,,,,
-PortE,PE3,TIM22_CH1,,TIM3_CH1,,,,,,,
-PortE,PE4,TIM22_CH2,,TIM3_CH2,,,,,,,
-PortE,PE5,TIM21_CH1,,TIM3_CH3,,,,,,,
-PortE,PE6,TIM21_CH2,,TIM3_CH4,,,,,,,
-PortE,PE7,,,,,,,USART5_CK/USART5_RTS/USART5_DE,,,
-PortE,PE8,,,,,,,USART4_TX,,,
-PortE,PE9,TIM2_CH1,,TIM2_ETR,,,,USART4_RX,,,
-PortE,PE10,TIM2_CH2,,,,,,USART5_TX,,,
-PortE,PE11,TIM2_CH3,,,,,,USART5_RX,,,
-PortE,PE12,TIM2_CH4,,SPI1_NSS,,,,,,,
-PortE,PE13,,,SPI1_SCK,,,,,,,
-PortE,PE14,,,SPI1_MISO,,,,,,,
-PortE,PE15,,,SPI1_MOSI,,,,,,,
-PortH,PH0,USB_CRS_SYNC,,,,,,,,,
-PortH,PH1,,,,,,,,,,
+Port ,Pin ,AF0                                                                      ,AF1                        ,AF2                                                            ,AF3              ,AF4                                   ,AF5                             ,AF6                                        ,AF7                      ,,,,,,,,,ADC
+     ,    ,SPI1/SPI2/I2S2/USART1/2/LPUART1/USB/LPTIM1/TSC/TIM2/21/22/EVENTOUT/SYS_AF,SPI1/SPI2/I2S2/I2C1/TIM2/21,SPI1/SPI2/I2S2/LPUART1/USART5/USB/LPTIM1/TIM2/3/EVENTOUT/SYS_AF,I2C1/TSC/EVENTOUT,I2C1/USART1/2/LPUART1/TIM3/22/EVENTOUT,SPI2/I2S2/I2C2/USART1/TIM2/21/22,I2C1/2/LPUART1/USART4/UASRT5/TIM21/EVENTOUT,I2C3/LPUART1/COMP1/2/TIM3,,,,,,,,,ADC
+PortA,PA0 ,                                                                         ,                           ,TIM2_CH1                                                       ,TSC_G1_IO1       ,USART2_CTS                            ,TIM2_ETR                        ,USART4_TX                                  ,COMP1_OUT                ,,,,,,,,,ADC1_IN0
+PortA,PA1 ,EVENTOUT                                                                 ,                           ,TIM2_CH2                                                       ,TSC_G1_IO2       ,USART2_RTS/USART2_DE                  ,TIM21_ETR                       ,USART4_RX                                  ,                         ,,,,,,,,,ADC1_IN1
+PortA,PA2 ,TIM21_CH1                                                                ,                           ,TIM2_CH3                                                       ,TSC_G1_IO3       ,USART2_TX                             ,                                ,LPUART1_TX                                 ,COMP2_OUT                ,,,,,,,,,ADC1_IN2
+PortA,PA3 ,TIM21_CH2                                                                ,                           ,TIM2_CH4                                                       ,TSC_G1_IO4       ,USART2_RX                             ,                                ,LPUART1_RX                                 ,                         ,,,,,,,,,ADC1_IN3
+PortA,PA4 ,SPI1_NSS                                                                 ,                           ,                                                               ,TSC_G2_IO1       ,USART2_CK                             ,TIM22_ETR                       ,                                           ,                         ,,,,,,,,,ADC1_IN4
+PortA,PA5 ,SPI1_SCK                                                                 ,                           ,TIM2_ETR                                                       ,TSC_G2_IO2       ,                                      ,TIM2_CH1                        ,                                           ,                         ,,,,,,,,,ADC1_IN5
+PortA,PA6 ,SPI1_MISO                                                                ,                           ,TIM3_CH1                                                       ,TSC_G2_IO3       ,LPUART1_CTS                           ,TIM22_CH1                       ,EVENTOUT                                   ,COMP1_OUT                ,,,,,,,,,ADC1_IN6
+PortA,PA7 ,SPI1_MOSI                                                                ,                           ,TIM3_CH2                                                       ,TSC_G2_IO4       ,                                      ,TIM22_CH2                       ,EVENTOUT                                   ,COMP2_OUT                ,,,,,,,,,ADC1_IN7
+PortA,PA8 ,MCO                                                                      ,                           ,USB_CRS_SYNC                                                   ,EVENTOUT         ,USART1_CK                             ,                                ,                                           ,I2C3_SCL                 ,,,,,,,,,
+PortA,PA9 ,MCO                                                                      ,                           ,                                                               ,TSC_G4_IO1       ,USART1_TX                             ,                                ,I2C1_SCL                                   ,I2C3_SMBA                ,,,,,,,,,
+PortA,PA10,                                                                         ,                           ,                                                               ,TSC_G4_IO2       ,USART1_RX                             ,                                ,I2C1_SDA                                   ,                         ,,,,,,,,,
+PortA,PA11,SPI1_MISO                                                                ,                           ,EVENTOUT                                                       ,TSC_G4_IO3       ,USART1_CTS                            ,                                ,                                           ,COMP1_OUT                ,,,,,,,,,
+PortA,PA12,SPI1_MOSI                                                                ,                           ,EVENTOUT                                                       ,TSC_G4_IO4       ,USART1_RTS/USART1_DE                  ,                                ,                                           ,COMP2_OUT                ,,,,,,,,,
+PortA,PA13,SWDIO                                                                    ,                           ,USB_NOE                                                        ,                 ,                                      ,                                ,LPUART1_RX                                 ,                         ,,,,,,,,,
+PortA,PA14,SWCLK                                                                    ,                           ,                                                               ,                 ,USART2_TX                             ,                                ,LPUART1_TX                                 ,                         ,,,,,,,,,
+PortA,PA15,SPI1_NSS                                                                 ,                           ,TIM2_ETR                                                       ,EVENTOUT         ,USART2_RX                             ,TIM2_CH1                        ,USART4_RTS/USART4_DE                       ,                         ,,,,,,,,,
+PortB,PB0 ,EVENTOUT                                                                 ,                           ,TIM3_CH3                                                       ,TSC_G3_IO2       ,                                      ,                                ,                                           ,                         ,,,,,,,,,ADC1_IN8
+PortB,PB1 ,                                                                         ,                           ,TIM3_CH4                                                       ,TSC_G3_IO3       ,LPUART1_RTS/LPUART1_DE                ,                                ,                                           ,                         ,,,,,,,,,ADC1_IN9
+PortB,PB2 ,                                                                         ,                           ,LPTIM1_OUT                                                     ,TSC_G3_IO4       ,                                      ,                                ,                                           ,I2C3_SMBA                ,,,,,,,,,
+PortB,PB3 ,SPI1_SCK                                                                 ,                           ,TIM2_CH2                                                       ,TSC_G5_IO1       ,EVENTOUT                              ,USART1_RTS/USART1_DE            ,USART5_TX                                  ,                         ,,,,,,,,,
+PortB,PB4 ,SPI1_MISO                                                                ,                           ,TIM3_CH1                                                       ,TSC_G5_IO2       ,TIM22_CH1                             ,USART1_CTS                      ,USART5_RX                                  ,I2C3_SDA                 ,,,,,,,,,
+PortB,PB5 ,SPI1_MOSI                                                                ,                           ,LPTIM1_IN1                                                     ,I2C1_SMBA        ,TIM3_CH2/TIM22_CH2                    ,USART1_CK                       ,USART5_CK/USART5_RTS/USART5_DE             ,                         ,,,,,,,,,
+PortB,PB6 ,USART1_TX                                                                ,I2C1_SCL                   ,LPTIM1_ETR                                                     ,TSC_G5_IO3       ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortB,PB7 ,USART1_RX                                                                ,I2C1_SDA                   ,LPTIM1_IN2                                                     ,TSC_G5_IO4       ,                                      ,                                ,USART4_CTS                                 ,                         ,,,,,,,,,
+PortB,PB8 ,                                                                         ,                           ,                                                               ,TSC_SYNC         ,I2C1_SCL                              ,                                ,                                           ,                         ,,,,,,,,,
+PortB,PB9 ,                                                                         ,                           ,EVENTOUT                                                       ,                 ,I2C1_SDA                              ,SPI2_NSS/I2S2_WS                ,                                           ,                         ,,,,,,,,,
+PortB,PB10,                                                                         ,                           ,TIM2_CH3                                                       ,TSC_SYNC         ,LPUART1_TX                            ,SPI2_SCK                        ,I2C2_SCL                                   ,LPUART1_RX               ,,,,,,,,,
+PortB,PB11,EVENTOUT                                                                 ,                           ,TIM2_CH4                                                       ,TSC_G6_IO1       ,LPUART1_RX                            ,                                ,I2C2_SDA                                   ,LPUART1_TX               ,,,,,,,,,
+PortB,PB12,SPI2_NSS/I2S2_WS                                                         ,                           ,LPUART1_RTS/LPUART1_DE                                         ,TSC_G6_IO2       ,I2C2_SMBA                             ,                                ,EVENTOUT                                   ,                         ,,,,,,,,,
+PortB,PB13,SPI2_SCK/I2S2_CK                                                         ,                           ,MCO                                                            ,TSC_G6_IO3       ,LPUART1_CTS                           ,I2C2_SCL                        ,TIM21_CH1                                  ,                         ,,,,,,,,,
+PortB,PB14,SPI2_MISO/I2S2_MCK                                                       ,                           ,RTC_OUT                                                        ,TSC_G6_IO4       ,LPUART1_RTS/LPUART1_DE                ,I2C2_SDA                        ,TIM21_CH2                                  ,                         ,,,,,,,,,
+PortB,PB15,SPI2_MOSI/I2S2_SD                                                        ,                           ,RTC_REFIN                                                      ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortC,PC0 ,LPTIM1_IN1                                                               ,                           ,EVENTOUT                                                       ,TSC_G7_IO1       ,                                      ,                                ,LPUART1_RX                                 ,I2C3_SCL                 ,,,,,,,,,ADC1_IN10
+PortC,PC1 ,LPTIM1_OUT                                                               ,                           ,EVENTOUT                                                       ,TSC_G7_IO2       ,                                      ,                                ,LPUART1_TX                                 ,I2C3_SDA                 ,,,,,,,,,ADC1_IN11
+PortC,PC2 ,LPTIM1_IN2                                                               ,                           ,SPI2_MISO/I2S2_MCK                                             ,TSC_G7_IO3       ,                                      ,                                ,                                           ,                         ,,,,,,,,,ADC1_IN12
+PortC,PC3 ,LPTIM1_ETR                                                               ,                           ,SPI2_MOSI/I2S2_SD                                              ,TSC_G7_IO4       ,                                      ,                                ,                                           ,                         ,,,,,,,,,ADC1_IN13
+PortC,PC4 ,EVENTOUT                                                                 ,                           ,LPUART1_TX                                                     ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,ADC1_IN14
+PortC,PC5 ,LPUART1_RX                                                               ,                           ,TSC_G3_IO1                                                     ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,ADC1_IN15
+PortC,PC6 ,TIM22_CH1                                                                ,                           ,TIM3_CH1                                                       ,TSC_G8_IO1       ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortC,PC7 ,TIM22_CH2                                                                ,                           ,TIM3_CH2                                                       ,TSC_G8_IO2       ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortC,PC8 ,TIM22_ETR                                                                ,                           ,TIM3_CH3                                                       ,TSC_G8_IO3       ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortC,PC9 ,TIM21_ETR                                                                ,                           ,USB_NOE/TIM3_CH4                                               ,TSC_G8_IO4       ,                                      ,                                ,                                           ,I2C3_SDA                 ,,,,,,,,,
+PortC,PC10,LPUART1_TX                                                               ,                           ,                                                               ,                 ,                                      ,                                ,USART4_TX                                  ,                         ,,,,,,,,,
+PortC,PC11,LPUART1_RX                                                               ,                           ,                                                               ,                 ,                                      ,                                ,USART4_RX                                  ,                         ,,,,,,,,,
+PortC,PC12,                                                                         ,                           ,USART5_TX                                                      ,                 ,                                      ,                                ,USART4_CK                                  ,                         ,,,,,,,,,
+PortC,PC13,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortC,PC14,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortC,PC15,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD0 ,TIM21_CH1                                                                ,SPI2_NSS/I2S2_WS           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD1 ,                                                                         ,SPI2_SCK/I2S2_CK           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD2 ,LPUART1_RTS/LPUART1_DE                                                   ,                           ,TIM3_ETR                                                       ,                 ,                                      ,                                ,USART5_RX                                  ,                         ,,,,,,,,,
+PortD,PD3 ,USART2_CTS                                                               ,                           ,SPI2_MISO/I2S2_MCK                                             ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD4 ,USART2_RTS/USART2_DE                                                     ,SPI2_MOSI/I2S2_SD          ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD5 ,USART2_TX                                                                ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD6 ,USART2_RX                                                                ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD7 ,USART2_CK                                                                ,TIM21_CH2                  ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD8 ,LPUART1_TX                                                               ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD9 ,LPUART1_RX                                                               ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD10,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD11,LPUART1_CTS                                                              ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD12,LPUART1_RTS/LPUART1_DE                                                   ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD13,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD14,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortD,PD15,USB_CRS_SYNC                                                             ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE0 ,                                                                         ,                           ,EVENTOUT                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE1 ,                                                                         ,                           ,EVENTOUT                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE2 ,                                                                         ,                           ,TIM3_ETR                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE3 ,TIM22_CH1                                                                ,                           ,TIM3_CH1                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE4 ,TIM22_CH2                                                                ,                           ,TIM3_CH2                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE5 ,TIM21_CH1                                                                ,                           ,TIM3_CH3                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE6 ,TIM21_CH2                                                                ,                           ,TIM3_CH4                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE7 ,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,USART5_CK/USART5_RTS/USART5_DE             ,                         ,,,,,,,,,
+PortE,PE8 ,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,USART4_TX                                  ,                         ,,,,,,,,,
+PortE,PE9 ,TIM2_CH1                                                                 ,                           ,TIM2_ETR                                                       ,                 ,                                      ,                                ,USART4_RX                                  ,                         ,,,,,,,,,
+PortE,PE10,TIM2_CH2                                                                 ,                           ,                                                               ,                 ,                                      ,                                ,USART5_TX                                  ,                         ,,,,,,,,,
+PortE,PE11,TIM2_CH3                                                                 ,                           ,                                                               ,                 ,                                      ,                                ,USART5_RX                                  ,                         ,,,,,,,,,
+PortE,PE12,TIM2_CH4                                                                 ,                           ,SPI1_NSS                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE13,                                                                         ,                           ,SPI1_SCK                                                       ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE14,                                                                         ,                           ,SPI1_MISO                                                      ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortE,PE15,                                                                         ,                           ,SPI1_MOSI                                                      ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortH,PH0 ,USB_CRS_SYNC                                                             ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
+PortH,PH1 ,                                                                         ,                           ,                                                               ,                 ,                                      ,                                ,                                           ,                         ,,,,,,,,,
diff --git a/ports/stm32/boards/stm32l152_af.csv b/ports/stm32/boards/stm32l152_af.csv
index a6f8e80c30..c4694713c8 100644
--- a/ports/stm32/boards/stm32l152_af.csv
+++ b/ports/stm32/boards/stm32l152_af.csv
@@ -1,117 +1,117 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS_AF,TIM2,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2,SPI1/SPI2,SPI3,USART1/USART2/USART3,UART4/UART5,,,,,,,,ADC
-PortA,PA0,,TIM2_CH1_ETR,TIM5_CH1,,,,,USART2_CTS,,,,,,,,EVENTOUT,ADC1_IN0
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,,,,,,,,EVENTOUT,ADC1_IN1
-PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,,,,,EVENTOUT,ADC1_IN2
-PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,,,,,,EVENTOUT,ADC1_IN3
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,,,EVENTOUT,ADC1_IN4
-PortA,PA5,,TIM2_CH1_ETR,,,,SPI1_SCK,,,,,,,,,,EVENTOUT,ADC1_IN5
-PortA,PA6,,,TIM3_CH1,TIM10_CH1,,SPI1_MISO,,,,,,,,,,EVENTOUT,ADC1_IN6
-PortA,PA7,,,TIM3_CH2,TIM11_CH1,,SPI1_MOSI,,,,,,,,,,EVENTOUT,ADC1_IN7
-PortA,PA8,MCO,,,,,,,USART1_CK,,,,,,,,EVENTOUT,
-PortA,PA9,,,,,,,,USART1_TX,,,,,,,,EVENTOUT,
-PortA,PA10,,,,,,,,USART1_RX,,,,,,,,EVENTOUT,
-PortA,PA11,,,,,,SPI1_MISO,,USART1_CTS,,,,,,,,EVENTOUT,
-PortA,PA12,,,,,,SPI1_MOSI,,USART1_RTS,,,,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT,
-PortB,PB0,,,TIM3_CH3,,,,,,,,,,,,,EVENTOUT,ADC1_IN8
-PortB,PB1,,,TIM3_CH4,,,,,,,,,,,,,EVENTOUT,ADC1_IN9
-PortB,PB2,BOOT1,,,,,,,,,,,,,,,EVENTOUT,
-PortB,PB3,JTDO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT,
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,,,,,,,,,EVENTOUT,
-PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,,,,,,,EVENTOUT,
-PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,,,,,,EVENTOUT,
-PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,,,,EVENTOUT,
-PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,,,,,,,EVENTOUT,
-PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,,,,,,,,,,,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,,,USART3_TX,,,,,,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,,,,,,EVENTOUT,
-PortB,PB12,,,,TIM10_CH1,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,,,,,,,EVENTOUT,ADC1_IN18
-PortB,PB13,,,,TIM9_CH1,,SPI2_SCK/I2S2_CK,,USART3_CTS,,,,,,,,EVENTOUT,ADC1_IN19
-PortB,PB14,,,,TIM9_CH2,,SPI2_MISO,,USART3_RTS,,,,,,,,EVENTOUT,ADC1_IN20
-PortB,PB15,,,,TIM11_CH1,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,ADC1_IN21
-PortC,PC0,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN10
-PortC,PC1,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN11
-PortC,PC2,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN12
-PortC,PC3,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN13
-PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN14
-PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN15
-PortC,PC6,,,TIM3_CH1,,,I2S2_MCK,,,,,,,,,,EVENTOUT,
-PortC,PC7,,,TIM3_CH2,,,,I2S3_MCK,,,,,,,,,EVENTOUT,
-PortC,PC8,,,TIM3_CH3,,,,,,,,,,,,,EVENTOUT,
-PortC,PC9,,,TIM3_CH4,,,,,,,,,,,,,EVENTOUT,
-PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,,,,EVENTOUT,
-PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,,,,,,,EVENTOUT,
-PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,,,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,TIM9_CH1,,SPI2_NSS/I2S2_WS,,,,,,,,,,EVENTOUT,
-PortD,PD1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT,
-PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,,,,EVENTOUT,
-PortD,PD3,,,,,,SPI2_MISO,,USART2_CTS,,,,,,,,EVENTOUT,
-PortD,PD4,,,,,,SPI2_MOSI/I2S2_SD,,USART2_RTS,,,,,,,,EVENTOUT,
-PortD,PD5,,,,,,,,USART2_TX,,,,,,,,EVENTOUT,
-PortD,PD6,,,,,,,,USART2_RX,,,,,,,,EVENTOUT,
-PortD,PD7,,,,TIM9_CH2,,,,USART2_CK,,,,,,,,EVENTOUT,
-PortD,PD8,,,,,,,,USART3_TX,,,,,,,,EVENTOUT,
-PortD,PD9,,,,,,,,USART3_RX,,,,,,,,EVENTOUT,
-PortD,PD10,,,,,,,,USART3_CK,,,,,,,,EVENTOUT,
-PortD,PD11,,,,,,,,USART3_CTS,,,,,,,,EVENTOUT,
-PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,,,,EVENTOUT,
-PortD,PD13,,,TIM4_CH2,,,,,,,,,,,,,EVENTOUT,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,,,,,EVENTOUT,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,,,,,EVENTOUT,
-PortE,PE0,,,TIM4_ETR,TIM10_CH1,,,,,,,,,,,,EVENTOUT,
-PortE,PE1,,,,TIM11_CH1,,,,,,,,,,,,EVENTOUT,
-PortE,PE2,TRACECK,,TIM3_ETR,,,,,,,,,,,,,EVENTOUT,
-PortE,PE3,TRACED0,,TIM3_CH1,,,,,,,,,,,,,EVENTOUT,
-PortE,PE4,TRACED1,,TIM3_CH2,,,,,,,,,,,,,EVENTOUT,
-PortE,PE5,TRACED2,,,TIM9_CH1,,,,,,,,,,,,EVENTOUT,
-PortE,PE6,TRACED3,,,TIM9_CH2,,,,,,,,,,,,EVENTOUT,
-PortE,PE7,,,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE8,,,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE9,,TIM2_CH1_ETR,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE10,,TIM2_CH2,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE11,,TIM2_CH3,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE12,,TIM2_CH4,,,,SPI1_NSS,,,,,,,,,,EVENTOUT,
-PortE,PE13,,,,,,SPI1_SCK,,,,,,,,,,EVENTOUT,
-PortE,PE14,,,,,,SPI1_MISO,,,,,,,,,,EVENTOUT,
-PortE,PE15,,,,,,SPI1_MOSI,,,,,,,,,,EVENTOUT,
-PortF,PF0,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF1,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF2,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF3,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF4,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF5,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF6,,,TIM5_ETR,,,,,,,,,,,,,EVENTOUT,
-PortF,PF7,,,TIM5_CH2,,,,,,,,,,,,,EVENTOUT,
-PortF,PF8,,,TIM5_CH3,,,,,,,,,,,,,EVENTOUT,
-PortF,PF9,,,TIM5_CH4,,,,,,,,,,,,,EVENTOUT,
-PortF,PF10,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF11,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF12,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF13,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF14,,,,,,,,,,,,,,,,EVENTOUT,
-PortF,PF15,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG0,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG1,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG2,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG3,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG4,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG5,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG6,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG7,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG8,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG9,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG10,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG11,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG12,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG13,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG14,,,,,,,,,,,,,,,,EVENTOUT,
-PortG,PG15,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,,
-PortH,PH1,,,,,,,,,,,,,,,,,
-PortH,PH2,,,,,,,,,,,,,,,,,
+Port ,Pin ,AF0       ,AF1         ,AF2           ,AF3             ,AF4      ,AF5              ,AF6              ,AF7                 ,AF8        ,AF9,AF10,AF11,AF12,AF13,AF14,AF15    ,ADC
+     ,    ,SYS_AF    ,TIM2        ,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2,SPI1/SPI2        ,SPI3             ,USART1/USART2/USART3,UART4/UART5,   ,    ,    ,    ,    ,    ,        ,ADC
+PortA,PA0 ,          ,TIM2_CH1_ETR,TIM5_CH1      ,                ,         ,                 ,                 ,USART2_CTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN0
+PortA,PA1 ,          ,TIM2_CH2    ,TIM5_CH2      ,                ,         ,                 ,                 ,USART2_RTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN1
+PortA,PA2 ,          ,TIM2_CH3    ,TIM5_CH3      ,TIM9_CH1        ,         ,                 ,                 ,USART2_TX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN2
+PortA,PA3 ,          ,TIM2_CH4    ,TIM5_CH4      ,TIM9_CH2        ,         ,                 ,                 ,USART2_RX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN3
+PortA,PA4 ,          ,            ,              ,                ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN4
+PortA,PA5 ,          ,TIM2_CH1_ETR,              ,                ,         ,SPI1_SCK         ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN5
+PortA,PA6 ,          ,            ,TIM3_CH1      ,TIM10_CH1       ,         ,SPI1_MISO        ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN6
+PortA,PA7 ,          ,            ,TIM3_CH2      ,TIM11_CH1       ,         ,SPI1_MOSI        ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN7
+PortA,PA8 ,MCO       ,            ,              ,                ,         ,                 ,                 ,USART1_CK           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortA,PA9 ,          ,            ,              ,                ,         ,                 ,                 ,USART1_TX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortA,PA10,          ,            ,              ,                ,         ,                 ,                 ,USART1_RX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortA,PA11,          ,            ,              ,                ,         ,SPI1_MISO        ,                 ,USART1_CTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortA,PA12,          ,            ,              ,                ,         ,SPI1_MOSI        ,                 ,USART1_RTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortA,PA15,JTDI      ,TIM2_CH1_ETR,              ,                ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB0 ,          ,            ,TIM3_CH3      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN8
+PortB,PB1 ,          ,            ,TIM3_CH4      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN9
+PortB,PB2 ,BOOT1     ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB3 ,JTDO      ,TIM2_CH2    ,              ,                ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB4 ,NJTRST    ,            ,TIM3_CH1      ,                ,         ,SPI1_MISO        ,SPI3_MISO        ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB5 ,          ,            ,TIM3_CH2      ,                ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB6 ,          ,            ,TIM4_CH1      ,                ,I2C1_SCL ,                 ,                 ,USART1_TX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB7 ,          ,            ,TIM4_CH2      ,                ,I2C1_SDA ,                 ,                 ,USART1_RX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB8 ,          ,            ,TIM4_CH3      ,TIM10_CH1       ,I2C1_SCL ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB9 ,          ,            ,TIM4_CH4      ,TIM11_CH1       ,I2C1_SDA ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB10,          ,TIM2_CH3    ,              ,                ,I2C2_SCL ,                 ,                 ,USART3_TX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB11,          ,TIM2_CH4    ,              ,                ,I2C2_SDA ,                 ,                 ,USART3_RX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortB,PB12,          ,            ,              ,TIM10_CH1       ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN18
+PortB,PB13,          ,            ,              ,TIM9_CH1        ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN19
+PortB,PB14,          ,            ,              ,TIM9_CH2        ,         ,SPI2_MISO        ,                 ,USART3_RTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN20
+PortB,PB15,          ,            ,              ,TIM11_CH1       ,         ,SPI2_MOSI/I2S2_SD,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN21
+PortC,PC0 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN10
+PortC,PC1 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN11
+PortC,PC2 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN12
+PortC,PC3 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN13
+PortC,PC4 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN14
+PortC,PC5 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,ADC1_IN15
+PortC,PC6 ,          ,            ,TIM3_CH1      ,                ,         ,I2S2_MCK         ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC7 ,          ,            ,TIM3_CH2      ,                ,         ,                 ,I2S3_MCK         ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC8 ,          ,            ,TIM3_CH3      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC9 ,          ,            ,TIM3_CH4      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC10,          ,            ,              ,                ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX           ,UART4_TX   ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC11,          ,            ,              ,                ,         ,                 ,SPI3_MISO        ,USART3_RX           ,UART4_RX   ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC12,          ,            ,              ,                ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK           ,UART5_TX   ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC13,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC14,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortC,PC15,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD0 ,          ,            ,              ,TIM9_CH1        ,         ,SPI2_NSS/I2S2_WS ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD1 ,          ,            ,              ,                ,         ,SPI2_SCK/I2S2_CK ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD2 ,          ,            ,TIM3_ETR      ,                ,         ,                 ,                 ,                    ,UART5_RX   ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD3 ,          ,            ,              ,                ,         ,SPI2_MISO        ,                 ,USART2_CTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD4 ,          ,            ,              ,                ,         ,SPI2_MOSI/I2S2_SD,                 ,USART2_RTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD5 ,          ,            ,              ,                ,         ,                 ,                 ,USART2_TX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD6 ,          ,            ,              ,                ,         ,                 ,                 ,USART2_RX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD7 ,          ,            ,              ,TIM9_CH2        ,         ,                 ,                 ,USART2_CK           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD8 ,          ,            ,              ,                ,         ,                 ,                 ,USART3_TX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD9 ,          ,            ,              ,                ,         ,                 ,                 ,USART3_RX           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD10,          ,            ,              ,                ,         ,                 ,                 ,USART3_CK           ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD11,          ,            ,              ,                ,         ,                 ,                 ,USART3_CTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD12,          ,            ,TIM4_CH1      ,                ,         ,                 ,                 ,USART3_RTS          ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD13,          ,            ,TIM4_CH2      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD14,          ,            ,TIM4_CH3      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortD,PD15,          ,            ,TIM4_CH4      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE0 ,          ,            ,TIM4_ETR      ,TIM10_CH1       ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE1 ,          ,            ,              ,TIM11_CH1       ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE2 ,TRACECK   ,            ,TIM3_ETR      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0   ,            ,TIM3_CH1      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1   ,            ,TIM3_CH2      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2   ,            ,              ,TIM9_CH1        ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3   ,            ,              ,TIM9_CH2        ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE7 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE8 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE9 ,          ,TIM2_CH1_ETR,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE10,          ,TIM2_CH2    ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE11,          ,TIM2_CH3    ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE12,          ,TIM2_CH4    ,              ,                ,         ,SPI1_NSS         ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE13,          ,            ,              ,                ,         ,SPI1_SCK         ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE14,          ,            ,              ,                ,         ,SPI1_MISO        ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortE,PE15,          ,            ,              ,                ,         ,SPI1_MOSI        ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF0 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF1 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF2 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF3 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF4 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF5 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF6 ,          ,            ,TIM5_ETR      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF7 ,          ,            ,TIM5_CH2      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF8 ,          ,            ,TIM5_CH3      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF9 ,          ,            ,TIM5_CH4      ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF10,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF11,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF12,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF13,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF14,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortF,PF15,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG0 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG1 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG2 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG3 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG4 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG5 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG6 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG7 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG8 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG9 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG10,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG11,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG12,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG13,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG14,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortG,PG15,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,EVENTOUT,
+PortH,PH0 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,        ,
+PortH,PH1 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,        ,
+PortH,PH2 ,          ,            ,              ,                ,         ,                 ,                 ,                    ,           ,   ,    ,    ,    ,    ,    ,        ,
diff --git a/ports/stm32/boards/stm32l432_af.csv b/ports/stm32/boards/stm32l432_af.csv
index debfcd7b35..a7afcd9fdf 100644
--- a/ports/stm32/boards/stm32l432_af.csv
+++ b/ports/stm32/boards/stm32l432_af.csv
@@ -1,28 +1,28 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,,,
-,,SYS_AF,TIM1/TIM2/LPTIM1,TIM1/TIM2,USART2,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3,USART1/USART2/USART3,LPUART1,CAN1/TSC,USB/QUADSPI,,COMP1/COMP2/SWPMI1,SAI1,TIM2/TIM15/TIM16/LPTIM2,EVENTOUT,ADC,COMP,DAC
-PortA,PA0,,TIM2_CH1,,,,,,USART2_CTS,,,,,COMP1_OUT,SAI1_EXTCLK,TIM2_ETR,EVENTOUT,ADC1_IN5,COMP1_INM,
-PortA,PA1,,TIM2_CH2,,,I2C1_SMBA,SPI1_SCK,,USART2_RTS/USART2_DE,,,,,,,TIM15_CH1N,EVENTOUT,ADC1_IN6,COMP1_INP,
-PortA,PA2,,TIM2_CH3,,,,,,USART2_TX,LPUART1_TX,,QUADSPI_BK1_NCS,,COMP2_OUT,,TIM15_CH1,EVENTOUT,ADC1_IN7,COMP2_INM,
-PortA,PA3,,TIM2_CH4,,,,,,USART2_RX,LPUART1_RX,,QUADSPI_CLK,,,SAI1_MCLK_A,TIM15_CH2,EVENTOUT,ADC1_IN8,COMP2_INP,
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS,USART2_CK,,,,,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT,ADC1_IN9,COMP1_INM/COMP2_INM,DAC1_OUT1
-PortA,PA5,,TIM2_CH1,TIM2_ETR,,,SPI1_SCK,,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC1_IN10,COMP1_INM/COMP2_INM,DAC1_OUT2
-PortA,PA6,,TIM1_BKIN,,,,SPI1_MISO,COMP1_OUT,USART3_CTS,,,QUADSPI_BK1_IO3,,TIM1_BKIN_COMP2,,TIM16_CH1,EVENTOUT,ADC1_IN11,,
-PortA,PA7,,TIM1_CH1N,,,I2C3_SCL,SPI1_MOSI,,,,,QUADSPI_BK1_IO2,,COMP2_OUT,,,EVENTOUT,ADC1_IN12,,
-PortA,PA8,MCO,TIM1_CH1,,,,,,USART1_CK,,,,,SWPMI1_IO,SAI1_SCLK_A,LPTIM2_OUT,EVENTOUT,,,
-PortA,PA9,,TIM1_CH2,,,I2C1_SCL,,,USART1_TX,,,,,,SAI1_FS_A,TIM15_BKIN,EVENTOUT,,,
-PortA,PA10,,TIM1_CH3,,,I2C1_SDA,,,USART1_RX,,,USB_CRS_SYNC,,,SAI1_SD_A,,EVENTOUT,,,
-PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,SPI1_MISO,COMP1_OUT,USART1_CTS,,CAN1_RX,USB_DM,,TIM1_BKIN2_COMP1,,,EVENTOUT,,,
-PortA,PA12,,TIM1_ETR,,,,SPI1_MOSI,,USART1_RTS/USART1_DE,,CAN1_TX,USB_DP,,,,,EVENTOUT,,,
-PortA,PA13,JTMS/SWDIO,IR_OUT,,,,,,,,,USB_NOE,,SWPMI1_TX,,,EVENTOUT,,,
-PortA,PA14,JTCK/SWCLK,LPTIM1_OUT,,,I2C1_SMBA,,,,,,,,SWPMI1_RX,SAI1_SD_B,,EVENTOUT,,,
-PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,USART2_RX,,SPI1_NSS,SPI3_NSS,USART3_RTS/USART3_DE,,TSC_G3_IO1,,,SWPMI1_SUSPEND,SAI1_FS_B,,EVENTOUT,,,
-PortB,PB0,,TIM1_CH2N,,,,SPI1_NSS,,USART3_CK,,,QUADSPI_BK1_IO1,,COMP1_OUT,SA1_EXTCLK,,EVENTOUT,ADC1_IN15,,
-PortB,PB1,,TIM1_CH3N,,,,,,USART3_RTS/USART3_DE,LPUART1_RTS/LPUART1_DE,,QUADSPI_BK1_IO0,,,,LPTIM2_IN1,EVENTOUT,ADC1_IN16,COMP1_INM,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK,USART1_RTS/USART1_DE,,,,,,SAI1_SCK_B,,EVENTOUT,,COMP2_INM,
-PortB,PB4,NJTRST,,,,I2C3_SDA,SPI1_MISO,SPI3_MISO,USART1_CTS,,TSC_G2_IO1,,,,SAI1_MCLK_B,,EVENTOUT,,COMP2_INP,
-PortB,PB5,,LPTIM1_IN1,,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI,USART1_CK,,TSC_G2_IO2,,,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT,,,
-PortB,PB6,,LPTIM1_ETR,,,I2C1_SCL,,,USART1_TX,,TSC_G2_IO3,,,,SAI1_FS_B,TIM16_CH1N,EVENTOUT,,COMP2_INP,
-PortB,PB7,,LPTIM1_IN2,,,I2C1_SDA,,,USART1_RX,,TSC_G2_IO4,,,,,,EVENTOUT,,COMP2_INM,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortH,PH3,,,,,,,,,,,,,,,,EVENTOUT,,,
+Port ,Pin ,AF0          ,AF1             ,AF2       ,AF3      ,AF4           ,AF5      ,AF6      ,AF7                 ,AF8                   ,AF9       ,AF10           ,AF11,AF12              ,AF13       ,AF14                   ,AF15    ,ADC
+     ,    ,SYS_AF       ,TIM1/TIM2/LPTIM1,TIM1/TIM2 ,USART2   ,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3     ,USART1/USART2/USART3,LPUART1               ,CAN1/TSC  ,USB/QUADSPI    ,    ,COMP1/COMP2/SWPMI1,SAI1       ,TIM2/TIM15/TIM16/LPTIM2,EVENTOUT,ADC
+PortA,PA0 ,             ,TIM2_CH1        ,          ,         ,              ,         ,         ,USART2_CTS          ,                      ,          ,               ,    ,COMP1_OUT         ,SAI1_EXTCLK,TIM2_ETR               ,EVENTOUT,ADC1_IN5
+PortA,PA1 ,             ,TIM2_CH2        ,          ,         ,I2C1_SMBA     ,SPI1_SCK ,         ,USART2_RTS/USART2_DE,                      ,          ,               ,    ,                  ,           ,TIM15_CH1N             ,EVENTOUT,ADC1_IN6
+PortA,PA2 ,             ,TIM2_CH3        ,          ,         ,              ,         ,         ,USART2_TX           ,LPUART1_TX            ,          ,QUADSPI_BK1_NCS,    ,COMP2_OUT         ,           ,TIM15_CH1              ,EVENTOUT,ADC1_IN7
+PortA,PA3 ,             ,TIM2_CH4        ,          ,         ,              ,         ,         ,USART2_RX           ,LPUART1_RX            ,          ,QUADSPI_CLK    ,    ,                  ,SAI1_MCLK_A,TIM15_CH2              ,EVENTOUT,ADC1_IN8
+PortA,PA4 ,             ,                ,          ,         ,              ,SPI1_NSS ,SPI3_NSS ,USART2_CK           ,                      ,          ,               ,    ,                  ,SAI1_FS_B  ,LPTIM2_OUT             ,EVENTOUT,ADC1_IN9
+PortA,PA5 ,             ,TIM2_CH1        ,TIM2_ETR  ,         ,              ,SPI1_SCK ,         ,                    ,                      ,          ,               ,    ,                  ,           ,LPTIM2_ETR             ,EVENTOUT,ADC1_IN10
+PortA,PA6 ,             ,TIM1_BKIN       ,          ,         ,              ,SPI1_MISO,COMP1_OUT,USART3_CTS          ,                      ,          ,QUADSPI_BK1_IO3,    ,TIM1_BKIN_COMP2   ,           ,TIM16_CH1              ,EVENTOUT,ADC1_IN11
+PortA,PA7 ,             ,TIM1_CH1N       ,          ,         ,I2C3_SCL      ,SPI1_MOSI,         ,                    ,                      ,          ,QUADSPI_BK1_IO2,    ,COMP2_OUT         ,           ,                       ,EVENTOUT,ADC1_IN12
+PortA,PA8 ,MCO          ,TIM1_CH1        ,          ,         ,              ,         ,         ,USART1_CK           ,                      ,          ,               ,    ,SWPMI1_IO         ,SAI1_SCLK_A,LPTIM2_OUT             ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2        ,          ,         ,I2C1_SCL      ,         ,         ,USART1_TX           ,                      ,          ,               ,    ,                  ,SAI1_FS_A  ,TIM15_BKIN             ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3        ,          ,         ,I2C1_SDA      ,         ,         ,USART1_RX           ,                      ,          ,USB_CRS_SYNC   ,    ,                  ,SAI1_SD_A  ,                       ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4        ,TIM1_BKIN2,         ,              ,SPI1_MISO,COMP1_OUT,USART1_CTS          ,                      ,CAN1_RX   ,USB_DM         ,    ,TIM1_BKIN2_COMP1  ,           ,                       ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR        ,          ,         ,              ,SPI1_MOSI,         ,USART1_RTS/USART1_DE,                      ,CAN1_TX   ,USB_DP         ,    ,                  ,           ,                       ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,IR_OUT          ,          ,         ,              ,         ,         ,                    ,                      ,          ,USB_NOE        ,    ,SWPMI1_TX         ,           ,                       ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,LPTIM1_OUT      ,          ,         ,I2C1_SMBA     ,         ,         ,                    ,                      ,          ,               ,    ,SWPMI1_RX         ,SAI1_SD_B  ,                       ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1        ,TIM2_ETR  ,USART2_RX,              ,SPI1_NSS ,SPI3_NSS ,USART3_RTS/USART3_DE,                      ,TSC_G3_IO1,               ,    ,SWPMI1_SUSPEND    ,SAI1_FS_B  ,                       ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N       ,          ,         ,              ,SPI1_NSS ,         ,USART3_CK           ,                      ,          ,QUADSPI_BK1_IO1,    ,COMP1_OUT         ,SA1_EXTCLK ,                       ,EVENTOUT,ADC1_IN15
+PortB,PB1 ,             ,TIM1_CH3N       ,          ,         ,              ,         ,         ,USART3_RTS/USART3_DE,LPUART1_RTS/LPUART1_DE,          ,QUADSPI_BK1_IO0,    ,                  ,           ,LPTIM2_IN1             ,EVENTOUT,ADC1_IN16
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2        ,          ,         ,              ,SPI1_SCK ,SPI3_SCK ,USART1_RTS/USART1_DE,                      ,          ,               ,    ,                  ,SAI1_SCK_B ,                       ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                ,          ,         ,I2C3_SDA      ,SPI1_MISO,SPI3_MISO,USART1_CTS          ,                      ,TSC_G2_IO1,               ,    ,                  ,SAI1_MCLK_B,                       ,EVENTOUT,
+PortB,PB5 ,             ,LPTIM1_IN1      ,          ,         ,I2C1_SMBA     ,SPI1_MOSI,SPI3_MOSI,USART1_CK           ,                      ,TSC_G2_IO2,               ,    ,COMP2_OUT         ,SAI1_SD_B  ,TIM16_BKIN             ,EVENTOUT,
+PortB,PB6 ,             ,LPTIM1_ETR      ,          ,         ,I2C1_SCL      ,         ,         ,USART1_TX           ,                      ,TSC_G2_IO3,               ,    ,                  ,SAI1_FS_B  ,TIM16_CH1N             ,EVENTOUT,
+PortB,PB7 ,             ,LPTIM1_IN2      ,          ,         ,I2C1_SDA      ,         ,         ,USART1_RX           ,                      ,TSC_G2_IO4,               ,    ,                  ,           ,                       ,EVENTOUT,
+PortC,PC14,             ,                ,          ,         ,              ,         ,         ,                    ,                      ,          ,               ,    ,                  ,           ,                       ,EVENTOUT,
+PortC,PC15,             ,                ,          ,         ,              ,         ,         ,                    ,                      ,          ,               ,    ,                  ,           ,                       ,EVENTOUT,
+PortH,PH3 ,             ,                ,          ,         ,              ,         ,         ,                    ,                      ,          ,               ,    ,                  ,           ,                       ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32l452_af.csv b/ports/stm32/boards/stm32l452_af.csv
index 1de5c211d2..641cbd6e0e 100644
--- a/ports/stm32/boards/stm32l452_af.csv
+++ b/ports/stm32/boards/stm32l452_af.csv
@@ -1,85 +1,85 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,,,
-,,SYS_AF,TIM1/TIM2/LPTIM1,I2C4/TIM1/TIM2/TIM3,I2C4/USART2/CAN1/TIM1,I2C1/I2C2/I2C3/I2C4,SPI1/SPI2/I2C4,SPI3/DFSDM/COMP1,USART1/USART2/USART3,UART4/LPUART1/CAN1,CAN1/TSC,CAN1/USB/QUADSPI,,SDMMC1/COMP1/COMP2,SAI1,TIM2/TIM15/TIM16/LPTIM2,EVENTOUT,ADC,COMP,DAC
-PortA,PA0,,TIM2_CH1,,,,,,USART2_CTS,UART4_TX,,,,COMP1_OUT,SAI1_EXTCLK,TIM2_ETR,EVENTOUT,ADC12_IN5,COMP1_INM,
-PortA,PA1,,TIM2_CH2,,,I2C1_SMBA,SPI1_SCK,,USART2_RTS/USART2_DE,UART4_RX,,,,,,TIM15_CH1N,EVENTOUT,ADC12_IN6,COMP1_INP,
-PortA,PA2,,TIM2_CH3,,,,,,USART2_TX,LPUART1_TX,,QUADSPI_BK1_NCS,,COMP2_OUT,,TIM15_CH1,EVENTOUT,ADC12_IN7,COMP2_INM,
-PortA,PA3,,TIM2_CH4,,,,,,USART2_RX,LPUART1_RX,,QUADSPI_CLK,,,SAI1_MCLK_A,TIM15_CH2,EVENTOUT,ADC12_IN8,COMP2_INP,
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS,USART2_CK,,,,,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT,ADC12_IN9,COMP1_INM/COMP2_INM,DAC1_OUT1
-PortA,PA5,,TIM2_CH1,TIM2_ETR,,,SPI1_SCK,DFSDM1_CKOUT,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC12_IN10,COMP1_INM/COMP2_INM,
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,,,SPI1_MISO,COMP1_OUT,USART3_CTS,LPUART1_CTS,,QUADSPI_BK1_IO3,,TIM1_BKIN_COMP2,,TIM16_CH1,EVENTOUT,ADC12_IN11,,
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,,I2C3_SCL,SPI1_MOSI,DFSDM1_DATIN0,,,,QUADSPI_BK1_IO2,,COMP2_OUT,,,EVENTOUT,ADC12_IN12,,
-PortA,PA8,MCO,TIM1_CH1,,,,,DFSDM1_CKIN1,USART1_CK,,,,,,SAI1_SCK_A,LPTIM2_OUT,EVENTOUT,,,
-PortA,PA9,,TIM1_CH2,,,I2C1_SCL,,DFSDM1_DATIN1,USART1_TX,,,,,,SAI1_FS_A,TIM15_BKIN,EVENTOUT,,,
-PortA,PA10,,TIM1_CH3,,,I2C1_SDA,,,USART1_RX,,,USBCRS_SYNC,,,SAI1_SD_A,,EVENTOUT,,,
-PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,SPI1_MISO,COMP1_OUT,USART1_CTS,,CAN1_RX,USBDM,,TIM1_BKIN2_COMP1,,,EVENTOUT,,,
-PortA,PA12,,TIM1_ETR,,,,SPI1_MOSI,,USART1_RTS/USART1_DE,,CAN1_TX,USBDP,,,,,EVENTOUT,,,
-PortA,PA13,JTMS/SWDIO,IR_OUT,,,,,,,,,USBNOE,,,SAI1_SD_B,,EVENTOUT,,,
-PortA,PA14,JTCK/SWCLK,LPTIM1_OUT,,,I2C1_SMBA,I2C4_SMBA,,,,,,,,SAI1_FS_B,,EVENTOUT,,,
-PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,USART2_RX,,SPI1_NSS,SPI3_NSS,USART3_RTS/USART3_DE,UART4_RTS/UART4_DE,TSC_G3_IO1,,,,,,EVENTOUT,,,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,,,SPI1_NSS,DFSDM1_CKIN0,USART3_CK,,,QUADSPI_BK1_IO1,,COMP1_OUT,SAI1_EXTCLK,,EVENTOUT,ADC12_IN15,,
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,,,,DFSDM_DATIN0,USART3_RTS/USART3_DE,LPUART1_RTS/LPUART1_DE,,QUADSPI_BK1_IO0,,,,LPTIM2_IN1,EVENTOUT,ADC12_IN16,COMP1_INN,
-PortB,PB2,RTC_OUT,LPTIM1_OUT,,,I2C3_SMBA,,DFSDM_CKIN0,,,,,,,,,EVENTOUT,,COMP1_INP,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK,USART1_RTS/USART1_DE,,,,,,SAI1_SCK_B,,EVENTOUT,,COMP2_INM,
-PortB,PB4,NJTRST,,TIM3_CH1,,I2C3_SDA,SPI1_MISO,SPI3_MISO,USART1_CTS,,TSC_G2_IO1,,,,SAI1_MCLK_B,,EVENTOUT,,COMP2_INP,
-PortB,PB5,,LPTIM1_IN1,TIM3_CH2,CAN1_RX,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI,USART1_CK,,TSC_G2_IO2,,,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT,,,
-PortB,PB6,,LPTIM1_ETR,,,I2C1_SCL,I2C4_SCL,,USART1_TX,CAN1_TX,TSC_G2_IO3,,,,SAI1_FS_B,TIM16_CH1N,EVENTOUT,,COMP2_INP,
-PortB,PB7,,LPTIM1_IN2,,,I2C1_SDA,I2C4_SDA,,USART1_RX,UART4_CTS,TSC_G2_IO4,,,,,,EVENTOUT,,COMP2_INM,
-PortB,PB8,,,,,I2C1_SCL,,,,,CAN1_RX,,,SDMMC1_D4,SAI1_MCLK_A,TIM16_CH1,EVENTOUT,,,
-PortB,PB9,,IR_OUT,,,I2C1_SDA,SPI2_NSS,,,,CAN1_TX,,,SDMMC1_D5,SAI1_FS_A,,EVENTOUT,,,
-PortB,PB10,,TIM2_CH3,,I2C4_SCL,I2C2_SCL,SPI2_SCK,,USART3_TX,LPUART1_RX,TSC_SYNC,QUADSPI_CLK,,COMP1_OUT,SAI1_SCK_A,,EVENTOUT,,,
-PortB,PB11,,TIM2_CH4,,I2C4_SDA,I2C2_SDA,,,USART3_RX,LPUART1_TX,,QUADSPI_NCS,,COMP2_OUT,,,EVENTOUT,,,
-PortB,PB12,,TIM1_BKIN,,TIM1_BKIN_COMP2,I2C2_SMBA,SPI2_NSS,DFSDM_DATIN1,USART3_CK,LPUART1_RTS/LPUART1_DE,TSC_G1_IO1,CAN1_RX,,,SAI1_FS_A,TIM15_BKIN,EVENTOUT,,,
-PortB,PB13,,TIM1_CH1N,,,I2C2_SCL,SPI2_SCK,DFSDM_CKIN1,USART3_CTS,LPUART1_CTS,TSC_G1_IO2,CAN1_TX,,,SAI1_SCK_A,TIM15_CH1N,EVENTOUT,,,
-PortB,PB14,,TIM1_CH2N,,,I2C2_SDA,SPI2_MISO,DFSDM_DATIN2,USART3_RTS/USART3_DE,,TSC_G1_IO3,,,,SAI1_MCLK_A,TIM15_CH1,EVENTOUT,,,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,,,SPI2_MOSI,DFSDM_CKIN2,,,TSC_G1_IO4,,,,SAI1_SD_A,TIM15_CH2,EVENTOUT,,,
-PortC,PC0,,LPTIM1_IN1,I2C4_SCL,,I2C3_SCL,,,,LPUART1_RX,,,,,,LPTIM2_IN1,EVENTOUT,ADC123_IN1,,
-PortC,PC1,TRACED0,LPTIM1_OUT,I2C4_SDA,,I2C3_SDA,,,,LPUART1_TX,,,,,,,EVENTOUT,ADC123_IN2,,
-PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,DFSDM_CKOUT,,,,,,,,,EVENTOUT,ADC123_IN3,,
-PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI,,,,,,,,SAI1_SD_A,LPTIM2_ETR,EVENTOUT,ADC123_IN4,,
-PortC,PC4,,,,,,,,USART3_TX,,,,,,,,EVENTOUT,ADC12_IN13,COMP1_INM,
-PortC,PC5,,,,,,,,USART3_RX,,,,,,,,EVENTOUT,ADC12_IN14,COMP1_INP,
-PortC,PC6,,,TIM3_CH1,,,,DFSDM_CKIN3,,,TSC_G4_IO1,,,SDMMC1_D6,,,EVENTOUT,,,
-PortC,PC7,,,TIM3_CH2,,,,DFSDM_DATIN3,,,TSC_G4_IO2,,,SDMMC1_D7,,,EVENTOUT,,,
-PortC,PC8,,,TIM3_CH3,,,,,,,TSC_G4_IO3,,,SDMMC1_D0,,,EVENTOUT,,,
-PortC,PC9,,,TIM3_CH4,,,,,,,TSC_G4_IO4,USBNOE,,SDMMC1_D1,,,EVENTOUT,,,
-PortC,PC10,TRACED1,,,,,,SPI3_SCK,USART3_TX,UART4_TX,TSC_G3_IO2,,,SDMMC1_D2,,,EVENTOUT,,,
-PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,TSC_G3_IO3,,,SDMMC1_D3,,,EVENTOUT,,,
-PortC,PC12,TRACED3,,,,,,SPI3_MOSI,USART3_CK,,TSC_G3_IO4,,,SDMMC1_CK,,,EVENTOUT,,,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortD,PD0,,,,,,SPI2_NSS,,,,CAN1_RX,,,,,,EVENTOUT,,,
-PortD,PD1,,,,,,SPI2_SCK,,,,CAN1_TX,,,,,,EVENTOUT,,,
-PortD,PD2,TRACED2,,TIM3_ETR,,,,,USART3_RTS/USART3_DE,,TSC_SYNC,,,SDMMC1_CMD,,,EVENTOUT,,,
-PortD,PD3,,,,,,SPI2_MISO,DFSDM_DATIN0,USART2_CTS,,,QUADSPI_BK2_NCS,,,,,EVENTOUT,,,
-PortD,PD4,,,,,,SPI2_MOSI,DFSDM_CKIN0,USART2_RTS/USART2_DE,,,QUADSPI_BK2_IO0,,,,,EVENTOUT,,,
-PortD,PD5,,,,,,,,USART2_TX,,,QUADSPI_BK2_IO1,,,,,EVENTOUT,,,
-PortD,PD6,,,,,,,DFSDM_DATIN1,USART2_RX,,,QUADSPI_BK2_IO2,,,SAI1_SD_A,,EVENTOUT,,,
-PortD,PD7,,,,,,,DFSDM_CKIN1,USART2_CK,,,QUADSPI_BK2_IO3,,,,,EVENTOUT,,,
-PortD,PD8,,,,,,,,USART3_TX,,,,,,,,EVENTOUT,,,
-PortD,PD9,,,,,,,,USART3_RX,,,,,,,,EVENTOUT,,,
-PortD,PD10,,,,,,,,USART3_CK,,TSC_G6_IO1,,,,,,EVENTOUT,,,
-PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,TSC_G6_IO2,,,,,LPTIM2_ETR,EVENTOUT,,,
-PortD,PD12,,,,,I2C4_SCL,,,USART3_RTS/USART3_DE,,TSC_G6_IO3,,,,,LPTIM2_IN1,EVENTOUT,,,
-PortD,PD13,,,,,I2C4_SDA,,,,,TSC_G6_IO4,,,,,LPTIM2_OUT,EVENTOUT,,,
-PortD,PD14,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortD,PD15,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortE,PE0,,,,,,,,,,,,,,,TIM16_CH1,EVENTOUT,,,
-PortE,PE1,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortE,PE2,TRACECLK,,TIM3_ETR,,,,,,,TSC_G7_IO1,,,,SAI1_MCLK_A,,EVENTOUT,,,
-PortE,PE3,TRACED0,,TIM3_CH1,,,,,,,TSC_G7_IO2,,,,SAI1_SD_B,,EVENTOUT,,,
-PortE,PE4,TRACED1,,TIM3_CH2,,,,DFSDM_DATIN3,,,TSC_G7_IO3,,,,SAI1_FS_A,,EVENTOUT,,,
-PortE,PE5,TRACED2,,TIM3_CH3,,,,DFSDM_CKIN3,,,TSC_G7_IO4,,,,SAI1_SCK_A,,EVENTOUT,,,
-PortE,PE6,TRACED3,,TIM3_CH4,,,,,,,,,,,SAI1_SD_A,,EVENTOUT,,,
-PortE,PE7,,TIM1_ETR,,,,,DFSDM_DATIN2,,,,,,,SAI1_SD_B,,EVENTOUT,,,
-PortE,PE8,,TIM1_CH1N,,,,,DFSDM_CKIN2,,,,,,,SAI1_SCK_B,,EVENTOUT,,,
-PortE,PE9,,TIM1_CH1,,,,,DFSDM_CKOUT,,,,,,,SAI1_FS_B,,EVENTOUT,,,
-PortE,PE10,,TIM1_CH2N,,,,,,,,TSC_G5_IO1,QUADSPI_CLK,,,SAI1_MCLK_B,,EVENTOUT,,,
-PortE,PE11,,TIM1_CH2,,,,,,,,TSC_G5_IO2,QUADSPI_BK1_NCS,,,,,EVENTOUT,,,
-PortE,PE12,,TIM1_CH3N,,,,SPI1_NSS,,,,TSC_G5_IO3,QUADSPI_BK1_IO0,,,,,EVENTOUT,,,
-PortE,PE13,,TIM1_CH3,,,,SPI1_SCK,,,,TSC_G5_IO4,QUADSPI_BK1_IO1,,,,,EVENTOUT,,,
-PortE,PE14,,TIM1_CH4,TIM1_BKIN2,TIM1_BKIN2_COMP2,,SPI1_MISO,,,,,QUADSPI_BK1_IO2,,,,,EVENTOUT,,,
-PortE,PE15,,TIM1_BKIN,,TIM1_BKIN_COMP1,,SPI1_MOSI,,,,,QUADSPI_BK1_IO3,,,,,EVENTOUT,,,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortH,PH3,,,,,,,,,,,,,,,,,,,
+Port ,Pin ,AF0          ,AF1             ,AF2                ,AF3                  ,AF4                ,AF5           ,AF6             ,AF7                 ,AF8                   ,AF9       ,AF10            ,AF11,AF12              ,AF13       ,AF14                   ,AF15    ,ADC
+     ,    ,SYS_AF       ,TIM1/TIM2/LPTIM1,I2C4/TIM1/TIM2/TIM3,I2C4/USART2/CAN1/TIM1,I2C1/I2C2/I2C3/I2C4,SPI1/SPI2/I2C4,SPI3/DFSDM/COMP1,USART1/USART2/USART3,UART4/LPUART1/CAN1    ,CAN1/TSC  ,CAN1/USB/QUADSPI,    ,SDMMC1/COMP1/COMP2,SAI1       ,TIM2/TIM15/TIM16/LPTIM2,EVENTOUT,ADC
+PortA,PA0 ,             ,TIM2_CH1        ,                   ,                     ,                   ,              ,                ,USART2_CTS          ,UART4_TX              ,          ,                ,    ,COMP1_OUT         ,SAI1_EXTCLK,TIM2_ETR               ,EVENTOUT,ADC12_IN5
+PortA,PA1 ,             ,TIM2_CH2        ,                   ,                     ,I2C1_SMBA          ,SPI1_SCK      ,                ,USART2_RTS/USART2_DE,UART4_RX              ,          ,                ,    ,                  ,           ,TIM15_CH1N             ,EVENTOUT,ADC12_IN6
+PortA,PA2 ,             ,TIM2_CH3        ,                   ,                     ,                   ,              ,                ,USART2_TX           ,LPUART1_TX            ,          ,QUADSPI_BK1_NCS ,    ,COMP2_OUT         ,           ,TIM15_CH1              ,EVENTOUT,ADC12_IN7
+PortA,PA3 ,             ,TIM2_CH4        ,                   ,                     ,                   ,              ,                ,USART2_RX           ,LPUART1_RX            ,          ,QUADSPI_CLK     ,    ,                  ,SAI1_MCLK_A,TIM15_CH2              ,EVENTOUT,ADC12_IN8
+PortA,PA4 ,             ,                ,                   ,                     ,                   ,SPI1_NSS      ,SPI3_NSS        ,USART2_CK           ,                      ,          ,                ,    ,                  ,SAI1_FS_B  ,LPTIM2_OUT             ,EVENTOUT,ADC12_IN9
+PortA,PA5 ,             ,TIM2_CH1        ,TIM2_ETR           ,                     ,                   ,SPI1_SCK      ,DFSDM1_CKOUT    ,                    ,                      ,          ,                ,    ,                  ,           ,LPTIM2_ETR             ,EVENTOUT,ADC12_IN10
+PortA,PA6 ,             ,TIM1_BKIN       ,TIM3_CH1           ,                     ,                   ,SPI1_MISO     ,COMP1_OUT       ,USART3_CTS          ,LPUART1_CTS           ,          ,QUADSPI_BK1_IO3 ,    ,TIM1_BKIN_COMP2   ,           ,TIM16_CH1              ,EVENTOUT,ADC12_IN11
+PortA,PA7 ,             ,TIM1_CH1N       ,TIM3_CH2           ,                     ,I2C3_SCL           ,SPI1_MOSI     ,DFSDM1_DATIN0   ,                    ,                      ,          ,QUADSPI_BK1_IO2 ,    ,COMP2_OUT         ,           ,                       ,EVENTOUT,ADC12_IN12
+PortA,PA8 ,MCO          ,TIM1_CH1        ,                   ,                     ,                   ,              ,DFSDM1_CKIN1    ,USART1_CK           ,                      ,          ,                ,    ,                  ,SAI1_SCK_A ,LPTIM2_OUT             ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2        ,                   ,                     ,I2C1_SCL           ,              ,DFSDM1_DATIN1   ,USART1_TX           ,                      ,          ,                ,    ,                  ,SAI1_FS_A  ,TIM15_BKIN             ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3        ,                   ,                     ,I2C1_SDA           ,              ,                ,USART1_RX           ,                      ,          ,USBCRS_SYNC     ,    ,                  ,SAI1_SD_A  ,                       ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4        ,TIM1_BKIN2         ,                     ,                   ,SPI1_MISO     ,COMP1_OUT       ,USART1_CTS          ,                      ,CAN1_RX   ,USBDM           ,    ,TIM1_BKIN2_COMP1  ,           ,                       ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR        ,                   ,                     ,                   ,SPI1_MOSI     ,                ,USART1_RTS/USART1_DE,                      ,CAN1_TX   ,USBDP           ,    ,                  ,           ,                       ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,IR_OUT          ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,USBNOE          ,    ,                  ,SAI1_SD_B  ,                       ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,LPTIM1_OUT      ,                   ,                     ,I2C1_SMBA          ,I2C4_SMBA     ,                ,                    ,                      ,          ,                ,    ,                  ,SAI1_FS_B  ,                       ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1        ,TIM2_ETR           ,USART2_RX            ,                   ,SPI1_NSS      ,SPI3_NSS        ,USART3_RTS/USART3_DE,UART4_RTS/UART4_DE    ,TSC_G3_IO1,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N       ,TIM3_CH3           ,                     ,                   ,SPI1_NSS      ,DFSDM1_CKIN0    ,USART3_CK           ,                      ,          ,QUADSPI_BK1_IO1 ,    ,COMP1_OUT         ,SAI1_EXTCLK,                       ,EVENTOUT,ADC12_IN15
+PortB,PB1 ,             ,TIM1_CH3N       ,TIM3_CH4           ,                     ,                   ,              ,DFSDM_DATIN0    ,USART3_RTS/USART3_DE,LPUART1_RTS/LPUART1_DE,          ,QUADSPI_BK1_IO0 ,    ,                  ,           ,LPTIM2_IN1             ,EVENTOUT,ADC12_IN16
+PortB,PB2 ,RTC_OUT      ,LPTIM1_OUT      ,                   ,                     ,I2C3_SMBA          ,              ,DFSDM_CKIN0     ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2        ,                   ,                     ,                   ,SPI1_SCK      ,SPI3_SCK        ,USART1_RTS/USART1_DE,                      ,          ,                ,    ,                  ,SAI1_SCK_B ,                       ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                ,TIM3_CH1           ,                     ,I2C3_SDA           ,SPI1_MISO     ,SPI3_MISO       ,USART1_CTS          ,                      ,TSC_G2_IO1,                ,    ,                  ,SAI1_MCLK_B,                       ,EVENTOUT,
+PortB,PB5 ,             ,LPTIM1_IN1      ,TIM3_CH2           ,CAN1_RX              ,I2C1_SMBA          ,SPI1_MOSI     ,SPI3_MOSI       ,USART1_CK           ,                      ,TSC_G2_IO2,                ,    ,COMP2_OUT         ,SAI1_SD_B  ,TIM16_BKIN             ,EVENTOUT,
+PortB,PB6 ,             ,LPTIM1_ETR      ,                   ,                     ,I2C1_SCL           ,I2C4_SCL      ,                ,USART1_TX           ,CAN1_TX               ,TSC_G2_IO3,                ,    ,                  ,SAI1_FS_B  ,TIM16_CH1N             ,EVENTOUT,
+PortB,PB7 ,             ,LPTIM1_IN2      ,                   ,                     ,I2C1_SDA           ,I2C4_SDA      ,                ,USART1_RX           ,UART4_CTS             ,TSC_G2_IO4,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortB,PB8 ,             ,                ,                   ,                     ,I2C1_SCL           ,              ,                ,                    ,                      ,CAN1_RX   ,                ,    ,SDMMC1_D4         ,SAI1_MCLK_A,TIM16_CH1              ,EVENTOUT,
+PortB,PB9 ,             ,IR_OUT          ,                   ,                     ,I2C1_SDA           ,SPI2_NSS      ,                ,                    ,                      ,CAN1_TX   ,                ,    ,SDMMC1_D5         ,SAI1_FS_A  ,                       ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3        ,                   ,I2C4_SCL             ,I2C2_SCL           ,SPI2_SCK      ,                ,USART3_TX           ,LPUART1_RX            ,TSC_SYNC  ,QUADSPI_CLK     ,    ,COMP1_OUT         ,SAI1_SCK_A ,                       ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4        ,                   ,I2C4_SDA             ,I2C2_SDA           ,              ,                ,USART3_RX           ,LPUART1_TX            ,          ,QUADSPI_NCS     ,    ,COMP2_OUT         ,           ,                       ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN       ,                   ,TIM1_BKIN_COMP2      ,I2C2_SMBA          ,SPI2_NSS      ,DFSDM_DATIN1    ,USART3_CK           ,LPUART1_RTS/LPUART1_DE,TSC_G1_IO1,CAN1_RX         ,    ,                  ,SAI1_FS_A  ,TIM15_BKIN             ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N       ,                   ,                     ,I2C2_SCL           ,SPI2_SCK      ,DFSDM_CKIN1     ,USART3_CTS          ,LPUART1_CTS           ,TSC_G1_IO2,CAN1_TX         ,    ,                  ,SAI1_SCK_A ,TIM15_CH1N             ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N       ,                   ,                     ,I2C2_SDA           ,SPI2_MISO     ,DFSDM_DATIN2    ,USART3_RTS/USART3_DE,                      ,TSC_G1_IO3,                ,    ,                  ,SAI1_MCLK_A,TIM15_CH1              ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N       ,                   ,                     ,                   ,SPI2_MOSI     ,DFSDM_CKIN2     ,                    ,                      ,TSC_G1_IO4,                ,    ,                  ,SAI1_SD_A  ,TIM15_CH2              ,EVENTOUT,
+PortC,PC0 ,             ,LPTIM1_IN1      ,I2C4_SCL           ,                     ,I2C3_SCL           ,              ,                ,                    ,LPUART1_RX            ,          ,                ,    ,                  ,           ,LPTIM2_IN1             ,EVENTOUT,ADC123_IN1
+PortC,PC1 ,TRACED0      ,LPTIM1_OUT      ,I2C4_SDA           ,                     ,I2C3_SDA           ,              ,                ,                    ,LPUART1_TX            ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,ADC123_IN2
+PortC,PC2 ,             ,LPTIM1_IN2      ,                   ,                     ,                   ,SPI2_MISO     ,DFSDM_CKOUT     ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,ADC123_IN3
+PortC,PC3 ,             ,LPTIM1_ETR      ,                   ,                     ,                   ,SPI2_MOSI     ,                ,                    ,                      ,          ,                ,    ,                  ,SAI1_SD_A  ,LPTIM2_ETR             ,EVENTOUT,ADC123_IN4
+PortC,PC4 ,             ,                ,                   ,                     ,                   ,              ,                ,USART3_TX           ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,ADC12_IN13
+PortC,PC5 ,             ,                ,                   ,                     ,                   ,              ,                ,USART3_RX           ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,ADC12_IN14
+PortC,PC6 ,             ,                ,TIM3_CH1           ,                     ,                   ,              ,DFSDM_CKIN3     ,                    ,                      ,TSC_G4_IO1,                ,    ,SDMMC1_D6         ,           ,                       ,EVENTOUT,
+PortC,PC7 ,             ,                ,TIM3_CH2           ,                     ,                   ,              ,DFSDM_DATIN3    ,                    ,                      ,TSC_G4_IO2,                ,    ,SDMMC1_D7         ,           ,                       ,EVENTOUT,
+PortC,PC8 ,             ,                ,TIM3_CH3           ,                     ,                   ,              ,                ,                    ,                      ,TSC_G4_IO3,                ,    ,SDMMC1_D0         ,           ,                       ,EVENTOUT,
+PortC,PC9 ,             ,                ,TIM3_CH4           ,                     ,                   ,              ,                ,                    ,                      ,TSC_G4_IO4,USBNOE          ,    ,SDMMC1_D1         ,           ,                       ,EVENTOUT,
+PortC,PC10,TRACED1      ,                ,                   ,                     ,                   ,              ,SPI3_SCK        ,USART3_TX           ,UART4_TX              ,TSC_G3_IO2,                ,    ,SDMMC1_D2         ,           ,                       ,EVENTOUT,
+PortC,PC11,             ,                ,                   ,                     ,                   ,              ,SPI3_MISO       ,USART3_RX           ,UART4_RX              ,TSC_G3_IO3,                ,    ,SDMMC1_D3         ,           ,                       ,EVENTOUT,
+PortC,PC12,TRACED3      ,                ,                   ,                     ,                   ,              ,SPI3_MOSI       ,USART3_CK           ,                      ,TSC_G3_IO4,                ,    ,SDMMC1_CK         ,           ,                       ,EVENTOUT,
+PortC,PC13,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortC,PC14,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortC,PC15,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD0 ,             ,                ,                   ,                     ,                   ,SPI2_NSS      ,                ,                    ,                      ,CAN1_RX   ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD1 ,             ,                ,                   ,                     ,                   ,SPI2_SCK      ,                ,                    ,                      ,CAN1_TX   ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                ,TIM3_ETR           ,                     ,                   ,              ,                ,USART3_RTS/USART3_DE,                      ,TSC_SYNC  ,                ,    ,SDMMC1_CMD        ,           ,                       ,EVENTOUT,
+PortD,PD3 ,             ,                ,                   ,                     ,                   ,SPI2_MISO     ,DFSDM_DATIN0    ,USART2_CTS          ,                      ,          ,QUADSPI_BK2_NCS ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD4 ,             ,                ,                   ,                     ,                   ,SPI2_MOSI     ,DFSDM_CKIN0     ,USART2_RTS/USART2_DE,                      ,          ,QUADSPI_BK2_IO0 ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD5 ,             ,                ,                   ,                     ,                   ,              ,                ,USART2_TX           ,                      ,          ,QUADSPI_BK2_IO1 ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD6 ,             ,                ,                   ,                     ,                   ,              ,DFSDM_DATIN1    ,USART2_RX           ,                      ,          ,QUADSPI_BK2_IO2 ,    ,                  ,SAI1_SD_A  ,                       ,EVENTOUT,
+PortD,PD7 ,             ,                ,                   ,                     ,                   ,              ,DFSDM_CKIN1     ,USART2_CK           ,                      ,          ,QUADSPI_BK2_IO3 ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD8 ,             ,                ,                   ,                     ,                   ,              ,                ,USART3_TX           ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD9 ,             ,                ,                   ,                     ,                   ,              ,                ,USART3_RX           ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD10,             ,                ,                   ,                     ,                   ,              ,                ,USART3_CK           ,                      ,TSC_G6_IO1,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD11,             ,                ,                   ,                     ,I2C4_SMBA          ,              ,                ,USART3_CTS          ,                      ,TSC_G6_IO2,                ,    ,                  ,           ,LPTIM2_ETR             ,EVENTOUT,
+PortD,PD12,             ,                ,                   ,                     ,I2C4_SCL           ,              ,                ,USART3_RTS/USART3_DE,                      ,TSC_G6_IO3,                ,    ,                  ,           ,LPTIM2_IN1             ,EVENTOUT,
+PortD,PD13,             ,                ,                   ,                     ,I2C4_SDA           ,              ,                ,                    ,                      ,TSC_G6_IO4,                ,    ,                  ,           ,LPTIM2_OUT             ,EVENTOUT,
+PortD,PD14,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortD,PD15,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortE,PE0 ,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,TIM16_CH1              ,EVENTOUT,
+PortE,PE1 ,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                ,TIM3_ETR           ,                     ,                   ,              ,                ,                    ,                      ,TSC_G7_IO1,                ,    ,                  ,SAI1_MCLK_A,                       ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                ,TIM3_CH1           ,                     ,                   ,              ,                ,                    ,                      ,TSC_G7_IO2,                ,    ,                  ,SAI1_SD_B  ,                       ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                ,TIM3_CH2           ,                     ,                   ,              ,DFSDM_DATIN3    ,                    ,                      ,TSC_G7_IO3,                ,    ,                  ,SAI1_FS_A  ,                       ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                ,TIM3_CH3           ,                     ,                   ,              ,DFSDM_CKIN3     ,                    ,                      ,TSC_G7_IO4,                ,    ,                  ,SAI1_SCK_A ,                       ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                ,TIM3_CH4           ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,SAI1_SD_A  ,                       ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR        ,                   ,                     ,                   ,              ,DFSDM_DATIN2    ,                    ,                      ,          ,                ,    ,                  ,SAI1_SD_B  ,                       ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N       ,                   ,                     ,                   ,              ,DFSDM_CKIN2     ,                    ,                      ,          ,                ,    ,                  ,SAI1_SCK_B ,                       ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1        ,                   ,                     ,                   ,              ,DFSDM_CKOUT     ,                    ,                      ,          ,                ,    ,                  ,SAI1_FS_B  ,                       ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N       ,                   ,                     ,                   ,              ,                ,                    ,                      ,TSC_G5_IO1,QUADSPI_CLK     ,    ,                  ,SAI1_MCLK_B,                       ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2        ,                   ,                     ,                   ,              ,                ,                    ,                      ,TSC_G5_IO2,QUADSPI_BK1_NCS ,    ,                  ,           ,                       ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N       ,                   ,                     ,                   ,SPI1_NSS      ,                ,                    ,                      ,TSC_G5_IO3,QUADSPI_BK1_IO0 ,    ,                  ,           ,                       ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3        ,                   ,                     ,                   ,SPI1_SCK      ,                ,                    ,                      ,TSC_G5_IO4,QUADSPI_BK1_IO1 ,    ,                  ,           ,                       ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4        ,TIM1_BKIN2         ,TIM1_BKIN2_COMP2     ,                   ,SPI1_MISO     ,                ,                    ,                      ,          ,QUADSPI_BK1_IO2 ,    ,                  ,           ,                       ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN       ,                   ,TIM1_BKIN_COMP1      ,                   ,SPI1_MOSI     ,                ,                    ,                      ,          ,QUADSPI_BK1_IO3 ,    ,                  ,           ,                       ,EVENTOUT,
+PortH,PH0 ,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortH,PH1 ,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,EVENTOUT,
+PortH,PH3 ,             ,                ,                   ,                     ,                   ,              ,                ,                    ,                      ,          ,                ,    ,                  ,           ,                       ,        ,
diff --git a/ports/stm32/boards/stm32l476_af.csv b/ports/stm32/boards/stm32l476_af.csv
index df824ed708..bb99d39735 100644
--- a/ports/stm32/boards/stm32l476_af.csv
+++ b/ports/stm32/boards/stm32l476_af.csv
@@ -1,116 +1,116 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,,
-,,SYS_AF,TIM1/TIM2/TIM5/TIM8/LPTIM1,TIM1/TIM2/TIM3/TIM4/TIM5,TIM8,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3/DFSDM,USART1/USART2/USART3,UART4/UART5/LPUART1,CAN1/TSC,OTG_FS/QUADSPI,LCD,SDMMC1/COMP1/COMP2/FMC/SWPMI1,SAI1/SAI2,TIM2/TIM15/TIM16/TIM17/LPTIM2,EVENTOUT,ADC,COMP
-PortA,PA0,,TIM2_CH1,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,,,SAI1_EXTCLK,TIM2_ETR,EVENTOUT,ADC12_IN5,
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS/USART2_DE,UART4_RX,,,LCD_SEG0,,,TIM15_CH1N,EVENTOUT,ADC12_IN6,
-PortA,PA2,,TIM2_CH3,TIM5_CH3,,,,,USART2_TX,,,,LCD_SEG1,,SAI2_EXTCLK,TIM15_CH1,EVENTOUT,ADC12_IN7,
-PortA,PA3,,TIM2_CH4,TIM5_CH4,,,,,USART2_RX,,,,LCD_SEG2,,,TIM15_CH2,EVENTOUT,ADC12_IN8,
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS,USART2_CK,,,,,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT,ADC12_IN9,
-PortA,PA5,,TIM2_CH1,TIM2_ETR,TIM8_CH1N,,SPI1_SCK,,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC12_IN10,
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,USART3_CTS,,,QUADSPI_BK1_IO3,LCD_SEG3,TIM1_BKIN_COMP2,TIM8_BKIN_COMP2,TIM16_CH1,EVENTOUT,ADC12_IN11,
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,,QUADSPI_BK1_IO2,LCD_SEG4,,,TIM17_CH1,EVENTOUT,ADC12_IN12,
-PortA,PA8,MCO,TIM1_CH1,,,,,,USART1_CK,,,OTG_FS_SOF,LCD_COM0,,,LPTIM2_OUT,EVENTOUT,,
-PortA,PA9,,TIM1_CH2,,,,,,USART1_TX,,,,LCD_COM1,,,TIM15_BKIN,EVENTOUT,,
-PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,LCD_COM2,,,TIM17_BKIN,EVENTOUT,,
-PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,TIM1_BKIN2_COMP1,,,EVENTOUT,,
-PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS/USART1_DE,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT,,
-PortA,PA13,JTMS/SWDIO,IR_OUT,,,,,,,,,OTG_FS_NOE,,,,,EVENTOUT,,
-PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,,
-PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,,,SPI1_NSS,SPI3_NSS,,UART4_RTS/UART4_DE,TSC_G3_IO1,,LCD_SEG17,,SAI2_FS_B,,EVENTOUT,,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,USART3_CK,,,QUADSPI_BK1_IO1,LCD_SEG5,COMP1_OUT,,,EVENTOUT,ADC12_IN15,
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM_DATIN0,USART3_RTS/USART3_DE,,,QUADSPI_BK1_IO0,LCD_SEG6,,,LPTIM2_IN1,EVENTOUT,ADC12_IN16,COMP1_INN
-PortB,PB2,RTC_OUT,LPTIM1_OUT,,,I2C3_SMBA,,DFSDM_CKIN0,,,,,,,,,EVENTOUT,,COMP1_INP
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK,USART1_RTS/USART1_DE,,,,LCD_SEG7,,SAI1_SCK_B,,EVENTOUT,,COMP2_INM
-PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,USART1_CTS,UART5_RTS/UART5_DE,TSC_G2_IO1,,LCD_SEG8,,SAI1_MCLK_B,TIM17_BKIN,EVENTOUT,,COMP2_INP
-PortB,PB5,,LPTIM1_IN1,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI,USART1_CK,UART5_CTS,TSC_G2_IO2,,LCD_SEG9,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT,,
-PortB,PB6,,LPTIM1_ETR,TIM4_CH1,TIM8_BKIN2,I2C1_SCL,,DFSDM_DATIN5,USART1_TX,,TSC_G2_IO3,,,TIM8_BKIN2_COMP2,SAI1_FS_B,TIM16_CH1N,EVENTOUT,,COMP2_INP
-PortB,PB7,,LPTIM1_IN2,TIM4_CH2,TIM8_BKIN,I2C1_SDA,,DFSDM_CKIN5,USART1_RX,UART4_CTS,TSC_G2_IO4,,LCD_SEG21,FMC_NL,TIM8_BKIN_COMP1,TIM17_CH1N,EVENTOUT,,COMP2_INM
-PortB,PB8,,,TIM4_CH3,,I2C1_SCL,,DFSDM_DATIN6,,,CAN1_RX,,LCD_SEG16,SDMMC1_D4,SAI1_MCLK_A,TIM16_CH1,EVENTOUT,,
-PortB,PB9,,IR_OUT,TIM4_CH4,,I2C1_SDA,SPI2_NSS,DFSDM_CKIN6,,,CAN1_TX,,LCD_COM3,SDMMC1_D5,SAI1_FS_A,TIM17_CH1,EVENTOUT,,
-PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK,DFSDM_DATIN7,USART3_TX,LPUART1_RX,,QUADSPI_CLK,LCD_SEG10,COMP1_OUT,SAI1_SCK_A,,EVENTOUT,,
-PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,DFSDM_CKIN7,USART3_RX,LPUART1_TX,,QUADSPI_NCS,LCD_SEG11,COMP2_OUT,,,EVENTOUT,,
-PortB,PB12,,TIM1_BKIN,,TIM1_BKIN_COMP2,I2C2_SMBA,SPI2_NSS,DFSDM_DATIN1,USART3_CK,LPUART1_RTS/LPUART1_DE,TSC_G1_IO1,,LCD_SEG12,SWPMI1_IO,SAI2_FS_A,TIM15_BKIN,EVENTOUT,,
-PortB,PB13,,TIM1_CH1N,,,I2C2_SCL,SPI2_SCK,DFSDM_CKIN1,USART3_CTS,LPUART1_CTS,TSC_G1_IO2,,LCD_SEG13,SWPMI1_TX,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,I2C2_SDA,SPI2_MISO,DFSDM_DATIN2,USART3_RTS/USART3_DE,,TSC_G1_IO3,,LCD_SEG14,SWPMI1_RX,SAI2_MCLK_A,TIM15_CH1,EVENTOUT,,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI,DFSDM_CKIN2,,,TSC_G1_IO4,,LCD_SEG15,SWPMI1_SUSPEND,SAI2_SD_A,TIM15_CH2,EVENTOUT,,
-PortC,PC0,,LPTIM1_IN1,,,I2C3_SCL,,DFSDM_DATIN4,,LPUART1_RX,,,LCD_SEG18,,,LPTIM2_IN1,EVENTOUT,ADC123_IN1,
-PortC,PC1,,LPTIM1_OUT,,,I2C3_SDA,,DFSDM_CKIN4,,LPUART1_TX,,,LCD_SEG19,,,,EVENTOUT,ADC123_IN2,
-PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,DFSDM_CKOUT,,,,,LCD_SEG20,,,,EVENTOUT,ADC123_IN3,
-PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI,,,,,,LCD_VLCD,,SAI1_SD_A,LPTIM2_ETR,EVENTOUT,ADC123_IN4,
-PortC,PC4,,,,,,,,USART3_TX,,,,LCD_SEG22,,,,EVENTOUT,ADC12_IN13,COMP1_INM
-PortC,PC5,,,,,,,,USART3_RX,,,,LCD_SEG23,,,,EVENTOUT,ADC12_IN14,COMP1_INP
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,,DFSDM_CKIN3,,,TSC_G4_IO1,,LCD_SEG24,SDMMC1_D6,SAI2_MCLK_A,,EVENTOUT,,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,DFSDM_DATIN3,,,TSC_G4_IO2,,LCD_SEG25,SDMMC1_D7,SAI2_MCLK_B,,EVENTOUT,,
-PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,,TSC_G4_IO3,,LCD_SEG26,SDMMC1_D0,,,EVENTOUT,,
-PortC,PC9,,TIM8_BKIN2,TIM3_CH4,TIM8_CH4,,,,,,TSC_G4_IO4,OTG_FS_NOE,LCD_SEG27,SDMMC1_D1,SAI2_EXTCLK,TIM8_BKIN2_COMP1,EVENTOUT,,
-PortC,PC10,,,,,,,SPI3_SCK,USART3_TX,UART4_TX,TSC_G3_IO2,,LCD_COM4/LCD_SEG28/LCD_SEG40,SDMMC1_D2,SAI2_SCK_B,,EVENTOUT,,
-PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,TSC_G3_IO3,,LCD_COM5/LCD_SEG29/LCD_SEG41,SDMMC1_D3,SAI2_MCLK_B,,EVENTOUT,,
-PortC,PC12,,,,,,,SPI3_MOSI,USART3_CK,UART5_TX,TSC_G3_IO4,,LCD_COM6/LCD_SEG30/LCD_SEG42,SDMMC1_CK,SAI2_SD_B,,EVENTOUT,,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,,
-PortD,PD0,,,,,,SPI2_NSS,DFSDM_DATIN7,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,,
-PortD,PD1,,,,,,SPI2_SCK,DFSDM_CKIN7,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,,
-PortD,PD2,,,TIM3_ETR,,,,,USART3_RTS/USART3_DE,UART5_RX,TSC_SYNC,,LCD_COM7/LCD_SEG31/LCD_SEG43,SDMMC1_CMD,,,EVENTOUT,,
-PortD,PD3,,,,,,SPI2_MISO,DFSDM_DATIN0,USART2_CTS,,,,,FMC_CLK,,,EVENTOUT,,
-PortD,PD4,,,,,,SPI2_MOSI,DFSDM_CKIN0,USART2_RTS/USART2_DE,,,,,FMC_NOE,,,EVENTOUT,,
-PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,,
-PortD,PD6,,,,,,,DFSDM_DATIN1,USART2_RX,,,,,FMC_NWAIT,SAI1_SD_A,,EVENTOUT,,
-PortD,PD7,,,,,,,DFSDM_CKIN1,USART2_CK,,,,,FMC_NE1,,,EVENTOUT,,
-PortD,PD8,,,,,,,,USART3_TX,,,,LCD_SEG28,FMC_D13,,,EVENTOUT,,
-PortD,PD9,,,,,,,,USART3_RX,,,,LCD_SEG29,FMC_D14,SAI2_MCLK_A,,EVENTOUT,,
-PortD,PD10,,,,,,,,USART3_CK,,TSC_G6_IO1,,LCD_SEG30,FMC_D15,SAI2_SCK_A,,EVENTOUT,,
-PortD,PD11,,,,,,,,USART3_CTS,,TSC_G6_IO2,,LCD_SEG31,FMC_A16,SAI2_SD_A,LPTIM2_ETR,EVENTOUT,,
-PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS/USART3_DE,,TSC_G6_IO3,,LCD_SEG32,FMC_A17,SAI2_FS_A,LPTIM2_IN1,EVENTOUT,,
-PortD,PD13,,,TIM4_CH2,,,,,,,TSC_G6_IO4,,LCD_SEG33,FMC_A18,,LPTIM2_OUT,EVENTOUT,,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,LCD_SEG34,FMC_D0,,,EVENTOUT,,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,LCD_SEG35,FMC_D1,,,EVENTOUT,,
-PortE,PE0,,,TIM4_ETR,,,,,,,,,LCD_SEG36,FMC_NBL0,,TIM16_CH1,EVENTOUT,,
-PortE,PE1,,,,,,,,,,,,LCD_SEG37,FMC_NBL1,,TIM17_CH1,EVENTOUT,,
-PortE,PE2,TRACECLK,,TIM3_ETR,,,,,,,TSC_G7_IO1,,LCD_SEG38,FMC_A23,SAI1_MCLK_A,,EVENTOUT,,
-PortE,PE3,TRACED0,,TIM3_CH1,,,,,,,TSC_G7_IO2,,LCD_SEG39,FMC_A19,SAI1_SD_B,,EVENTOUT,,
-PortE,PE4,TRACED1,,TIM3_CH2,,,,DFSDM_DATIN3,,,TSC_G7_IO3,,,FMC_A20,SAI1_FS_A,,EVENTOUT,,
-PortE,PE5,TRACED2,,TIM3_CH3,,,,DFSDM_CKIN3,,,TSC_G7_IO4,,,FMC_A21,SAI1_SCK_A,,EVENTOUT,,
-PortE,PE6,TRACED3,,TIM3_CH4,,,,,,,,,,FMC_A22,SAI1_SD_A,,EVENTOUT,,
-PortE,PE7,,TIM1_ETR,,,,,DFSDM_DATIN2,,,,,,FMC_D4,SAI1_SD_B,,EVENTOUT,,
-PortE,PE8,,TIM1_CH1N,,,,,DFSDM_CKIN2,,,,,,FMC_D5,SAI1_SCK_B,,EVENTOUT,,
-PortE,PE9,,TIM1_CH1,,,,,DFSDM_CKOUT,,,,,,FMC_D6,SAI1_FS_B,,EVENTOUT,,
-PortE,PE10,,TIM1_CH2N,,,,,DFSDM_DATIN4,,,TSC_G5_IO1,QUADSPI_CLK,,FMC_D7,SAI1_MCLK_B,,EVENTOUT,,
-PortE,PE11,,TIM1_CH2,,,,,DFSDM_CKIN4,,,TSC_G5_IO2,QUADSPI_NCS,,FMC_D8,,,EVENTOUT,,
-PortE,PE12,,TIM1_CH3N,,,,SPI1_NSS,DFSDM_DATIN5,,,TSC_G5_IO3,QUADSPI_BK1_IO0,,FMC_D9,,,EVENTOUT,,
-PortE,PE13,,TIM1_CH3,,,,SPI1_SCK,DFSDM_CKIN5,,,TSC_G5_IO4,QUADSPI_BK1_IO1,,FMC_D10,,,EVENTOUT,,
-PortE,PE14,,TIM1_CH4,TIM1_BKIN2,TIM1_BKIN2_COMP2,,SPI1_MISO,,,,,QUADSPI_BK1_IO2,,FMC_D11,,,EVENTOUT,,
-PortE,PE15,,TIM1_BKIN,,TIM1_BKIN_COMP1,,SPI1_MOSI,,,,,QUADSPI_BK1_IO3,,FMC_D12,,,EVENTOUT,,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN6,
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN7,
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN8,
-PortF,PF6,,TIM5_ETR,TIM5_CH1,,,,,,,,,,,SAI1_SD_B,,EVENTOUT,ADC3_IN9,
-PortF,PF7,,,TIM5_CH2,,,,,,,,,,,SAI1_MCLK_B,,EVENTOUT,ADC3_IN10,
-PortF,PF8,,,TIM5_CH3,,,,,,,,,,,SAI1_SCK_B,,EVENTOUT,ADC3_IN11,
-PortF,PF9,,,TIM5_CH4,,,,,,,,,,,SAI1_FS_B,TIM15_CH1,EVENTOUT,ADC3_IN12,
-PortF,PF10,,,,,,,,,,,,,,,TIM15_CH2,EVENTOUT,ADC3_IN13,
-PortF,PF11,,,,,,,,,,,,,,,,EVENTOUT,,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,,
-PortF,PF13,,,,,,,DFSDM_DATIN6,,,,,,FMC_A7,,,EVENTOUT,,
-PortF,PF14,,,,,,,DFSDM_CKIN6,,,TSC_G8_IO1,,,FMC_A8,,,EVENTOUT,,
-PortF,PF15,,,,,,,,,,TSC_G8_IO2,,,FMC_A9,,,EVENTOUT,,
-PortG,PG0,,,,,,,,,,TSC_G8_IO3,,,FMC_A10,,,EVENTOUT,,
-PortG,PG1,,,,,,,,,,TSC_G8_IO4,,,FMC_A11,,,EVENTOUT,,
-PortG,PG2,,,,,,SPI1_SCK,,,,,,,FMC_A12,SAI2_SCK_B,,EVENTOUT,,
-PortG,PG3,,,,,,SPI1_MISO,,,,,,,FMC_A13,SAI2_FS_B,,EVENTOUT,,
-PortG,PG4,,,,,,SPI1_MOSI,,,,,,,FMC_A14,SAI2_MCLK_B,,EVENTOUT,,
-PortG,PG5,,,,,,SPI1_NSS,,,LPUART1_CTS,,,,FMC_A15,SAI2_SD_B,,EVENTOUT,,
-PortG,PG6,,,,,I2C3_SMBA,,,,LPUART1_RTS/LPUART1_DE,,,,,,,EVENTOUT,,
-PortG,PG7,,,,,I2C3_SCL,,,,LPUART1_TX,,,,FMC_INT3,,,EVENTOUT,,
-PortG,PG8,,,,,I2C3_SDA,,,,LPUART1_RX,,,,,,,EVENTOUT,,
-PortG,PG9,,,,,,,SPI3_SCK,USART1_TX,,,,,FMC_NCE3/FMC_NE2,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,,
-PortG,PG10,,LPTIM1_IN1,,,,,SPI3_MISO,USART1_RX,,,,,FMC_NE3,SAI2_FS_A,TIM15_CH1,EVENTOUT,,
-PortG,PG11,,LPTIM1_IN2,,,,,SPI3_MOSI,USART1_CTS,,,,,,SAI2_MCLK_A,TIM15_CH2,EVENTOUT,,
-PortG,PG12,,LPTIM1_ETR,,,,,SPI3_NSS,USART1_RTS/USART1_DE,,,,,FMC_NE4,SAI2_SD_A,,EVENTOUT,,
-PortG,PG13,,,,,I2C1_SDA,,,USART1_CK,,,,,FMC_A24,,,EVENTOUT,,
-PortG,PG14,,,,,I2C1_SCL,,,,,,,,FMC_A25,,,EVENTOUT,,
-PortG,PG15,,LPTIM1_OUT,,,I2C1_SMBA,,,,,,,,,,,EVENTOUT,,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,,
+Port ,Pin ,AF0          ,AF1                       ,AF2                     ,AF3             ,AF4           ,AF5      ,AF6         ,AF7                 ,AF8                   ,AF9       ,AF10           ,AF11                        ,AF12                         ,AF13           ,AF14                         ,AF15    ,ADC
+     ,    ,SYS_AF       ,TIM1/TIM2/TIM5/TIM8/LPTIM1,TIM1/TIM2/TIM3/TIM4/TIM5,TIM8            ,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3/DFSDM  ,USART1/USART2/USART3,UART4/UART5/LPUART1   ,CAN1/TSC  ,OTG_FS/QUADSPI ,LCD                         ,SDMMC1/COMP1/COMP2/FMC/SWPMI1,SAI1/SAI2      ,TIM2/TIM15/TIM16/TIM17/LPTIM2,EVENTOUT,ADC
+PortA,PA0 ,             ,TIM2_CH1                  ,TIM5_CH1                ,TIM8_ETR        ,              ,         ,            ,USART2_CTS          ,UART4_TX              ,          ,               ,                            ,                             ,SAI1_EXTCLK    ,TIM2_ETR                     ,EVENTOUT,ADC12_IN5
+PortA,PA1 ,             ,TIM2_CH2                  ,TIM5_CH2                ,                ,              ,         ,            ,USART2_RTS/USART2_DE,UART4_RX              ,          ,               ,LCD_SEG0                    ,                             ,               ,TIM15_CH1N                   ,EVENTOUT,ADC12_IN6
+PortA,PA2 ,             ,TIM2_CH3                  ,TIM5_CH3                ,                ,              ,         ,            ,USART2_TX           ,                      ,          ,               ,LCD_SEG1                    ,                             ,SAI2_EXTCLK    ,TIM15_CH1                    ,EVENTOUT,ADC12_IN7
+PortA,PA3 ,             ,TIM2_CH4                  ,TIM5_CH4                ,                ,              ,         ,            ,USART2_RX           ,                      ,          ,               ,LCD_SEG2                    ,                             ,               ,TIM15_CH2                    ,EVENTOUT,ADC12_IN8
+PortA,PA4 ,             ,                          ,                        ,                ,              ,SPI1_NSS ,SPI3_NSS    ,USART2_CK           ,                      ,          ,               ,                            ,                             ,SAI1_FS_B      ,LPTIM2_OUT                   ,EVENTOUT,ADC12_IN9
+PortA,PA5 ,             ,TIM2_CH1                  ,TIM2_ETR                ,TIM8_CH1N       ,              ,SPI1_SCK ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,LPTIM2_ETR                   ,EVENTOUT,ADC12_IN10
+PortA,PA6 ,             ,TIM1_BKIN                 ,TIM3_CH1                ,TIM8_BKIN       ,              ,SPI1_MISO,            ,USART3_CTS          ,                      ,          ,QUADSPI_BK1_IO3,LCD_SEG3                    ,TIM1_BKIN_COMP2              ,TIM8_BKIN_COMP2,TIM16_CH1                    ,EVENTOUT,ADC12_IN11
+PortA,PA7 ,             ,TIM1_CH1N                 ,TIM3_CH2                ,TIM8_CH1N       ,              ,SPI1_MOSI,            ,                    ,                      ,          ,QUADSPI_BK1_IO2,LCD_SEG4                    ,                             ,               ,TIM17_CH1                    ,EVENTOUT,ADC12_IN12
+PortA,PA8 ,MCO          ,TIM1_CH1                  ,                        ,                ,              ,         ,            ,USART1_CK           ,                      ,          ,OTG_FS_SOF     ,LCD_COM0                    ,                             ,               ,LPTIM2_OUT                   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2                  ,                        ,                ,              ,         ,            ,USART1_TX           ,                      ,          ,               ,LCD_COM1                    ,                             ,               ,TIM15_BKIN                   ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3                  ,                        ,                ,              ,         ,            ,USART1_RX           ,                      ,          ,OTG_FS_ID      ,LCD_COM2                    ,                             ,               ,TIM17_BKIN                   ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4                  ,TIM1_BKIN2              ,                ,              ,         ,            ,USART1_CTS          ,                      ,CAN1_RX   ,OTG_FS_DM      ,                            ,TIM1_BKIN2_COMP1             ,               ,                             ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR                  ,                        ,                ,              ,         ,            ,USART1_RTS/USART1_DE,                      ,CAN1_TX   ,OTG_FS_DP      ,                            ,                             ,               ,                             ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,IR_OUT                    ,                        ,                ,              ,         ,            ,                    ,                      ,          ,OTG_FS_NOE     ,                            ,                             ,               ,                             ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1                  ,TIM2_ETR                ,                ,              ,SPI1_NSS ,SPI3_NSS    ,                    ,UART4_RTS/UART4_DE    ,TSC_G3_IO1,               ,LCD_SEG17                   ,                             ,SAI2_FS_B      ,                             ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N                 ,TIM3_CH3                ,TIM8_CH2N       ,              ,         ,            ,USART3_CK           ,                      ,          ,QUADSPI_BK1_IO1,LCD_SEG5                    ,COMP1_OUT                    ,               ,                             ,EVENTOUT,ADC12_IN15
+PortB,PB1 ,             ,TIM1_CH3N                 ,TIM3_CH4                ,TIM8_CH3N       ,              ,         ,DFSDM_DATIN0,USART3_RTS/USART3_DE,                      ,          ,QUADSPI_BK1_IO0,LCD_SEG6                    ,                             ,               ,LPTIM2_IN1                   ,EVENTOUT,ADC12_IN16
+PortB,PB2 ,RTC_OUT      ,LPTIM1_OUT                ,                        ,                ,I2C3_SMBA     ,         ,DFSDM_CKIN0 ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2                  ,                        ,                ,              ,SPI1_SCK ,SPI3_SCK    ,USART1_RTS/USART1_DE,                      ,          ,               ,LCD_SEG7                    ,                             ,SAI1_SCK_B     ,                             ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                          ,TIM3_CH1                ,                ,              ,SPI1_MISO,SPI3_MISO   ,USART1_CTS          ,UART5_RTS/UART5_DE    ,TSC_G2_IO1,               ,LCD_SEG8                    ,                             ,SAI1_MCLK_B    ,TIM17_BKIN                   ,EVENTOUT,
+PortB,PB5 ,             ,LPTIM1_IN1                ,TIM3_CH2                ,                ,I2C1_SMBA     ,SPI1_MOSI,SPI3_MOSI   ,USART1_CK           ,UART5_CTS             ,TSC_G2_IO2,               ,LCD_SEG9                    ,COMP2_OUT                    ,SAI1_SD_B      ,TIM16_BKIN                   ,EVENTOUT,
+PortB,PB6 ,             ,LPTIM1_ETR                ,TIM4_CH1                ,TIM8_BKIN2      ,I2C1_SCL      ,         ,DFSDM_DATIN5,USART1_TX           ,                      ,TSC_G2_IO3,               ,                            ,TIM8_BKIN2_COMP2             ,SAI1_FS_B      ,TIM16_CH1N                   ,EVENTOUT,
+PortB,PB7 ,             ,LPTIM1_IN2                ,TIM4_CH2                ,TIM8_BKIN       ,I2C1_SDA      ,         ,DFSDM_CKIN5 ,USART1_RX           ,UART4_CTS             ,TSC_G2_IO4,               ,LCD_SEG21                   ,FMC_NL                       ,TIM8_BKIN_COMP1,TIM17_CH1N                   ,EVENTOUT,
+PortB,PB8 ,             ,                          ,TIM4_CH3                ,                ,I2C1_SCL      ,         ,DFSDM_DATIN6,                    ,                      ,CAN1_RX   ,               ,LCD_SEG16                   ,SDMMC1_D4                    ,SAI1_MCLK_A    ,TIM16_CH1                    ,EVENTOUT,
+PortB,PB9 ,             ,IR_OUT                    ,TIM4_CH4                ,                ,I2C1_SDA      ,SPI2_NSS ,DFSDM_CKIN6 ,                    ,                      ,CAN1_TX   ,               ,LCD_COM3                    ,SDMMC1_D5                    ,SAI1_FS_A      ,TIM17_CH1                    ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3                  ,                        ,                ,I2C2_SCL      ,SPI2_SCK ,DFSDM_DATIN7,USART3_TX           ,LPUART1_RX            ,          ,QUADSPI_CLK    ,LCD_SEG10                   ,COMP1_OUT                    ,SAI1_SCK_A     ,                             ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4                  ,                        ,                ,I2C2_SDA      ,         ,DFSDM_CKIN7 ,USART3_RX           ,LPUART1_TX            ,          ,QUADSPI_NCS    ,LCD_SEG11                   ,COMP2_OUT                    ,               ,                             ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN                 ,                        ,TIM1_BKIN_COMP2 ,I2C2_SMBA     ,SPI2_NSS ,DFSDM_DATIN1,USART3_CK           ,LPUART1_RTS/LPUART1_DE,TSC_G1_IO1,               ,LCD_SEG12                   ,SWPMI1_IO                    ,SAI2_FS_A      ,TIM15_BKIN                   ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N                 ,                        ,                ,I2C2_SCL      ,SPI2_SCK ,DFSDM_CKIN1 ,USART3_CTS          ,LPUART1_CTS           ,TSC_G1_IO2,               ,LCD_SEG13                   ,SWPMI1_TX                    ,SAI2_SCK_A     ,TIM15_CH1N                   ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N                 ,                        ,TIM8_CH2N       ,I2C2_SDA      ,SPI2_MISO,DFSDM_DATIN2,USART3_RTS/USART3_DE,                      ,TSC_G1_IO3,               ,LCD_SEG14                   ,SWPMI1_RX                    ,SAI2_MCLK_A    ,TIM15_CH1                    ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N                 ,                        ,TIM8_CH3N       ,              ,SPI2_MOSI,DFSDM_CKIN2 ,                    ,                      ,TSC_G1_IO4,               ,LCD_SEG15                   ,SWPMI1_SUSPEND               ,SAI2_SD_A      ,TIM15_CH2                    ,EVENTOUT,
+PortC,PC0 ,             ,LPTIM1_IN1                ,                        ,                ,I2C3_SCL      ,         ,DFSDM_DATIN4,                    ,LPUART1_RX            ,          ,               ,LCD_SEG18                   ,                             ,               ,LPTIM2_IN1                   ,EVENTOUT,ADC123_IN1
+PortC,PC1 ,             ,LPTIM1_OUT                ,                        ,                ,I2C3_SDA      ,         ,DFSDM_CKIN4 ,                    ,LPUART1_TX            ,          ,               ,LCD_SEG19                   ,                             ,               ,                             ,EVENTOUT,ADC123_IN2
+PortC,PC2 ,             ,LPTIM1_IN2                ,                        ,                ,              ,SPI2_MISO,DFSDM_CKOUT ,                    ,                      ,          ,               ,LCD_SEG20                   ,                             ,               ,                             ,EVENTOUT,ADC123_IN3
+PortC,PC3 ,             ,LPTIM1_ETR                ,                        ,                ,              ,SPI2_MOSI,            ,                    ,                      ,          ,               ,LCD_VLCD                    ,                             ,SAI1_SD_A      ,LPTIM2_ETR                   ,EVENTOUT,ADC123_IN4
+PortC,PC4 ,             ,                          ,                        ,                ,              ,         ,            ,USART3_TX           ,                      ,          ,               ,LCD_SEG22                   ,                             ,               ,                             ,EVENTOUT,ADC12_IN13
+PortC,PC5 ,             ,                          ,                        ,                ,              ,         ,            ,USART3_RX           ,                      ,          ,               ,LCD_SEG23                   ,                             ,               ,                             ,EVENTOUT,ADC12_IN14
+PortC,PC6 ,             ,                          ,TIM3_CH1                ,TIM8_CH1        ,              ,         ,DFSDM_CKIN3 ,                    ,                      ,TSC_G4_IO1,               ,LCD_SEG24                   ,SDMMC1_D6                    ,SAI2_MCLK_A    ,                             ,EVENTOUT,
+PortC,PC7 ,             ,                          ,TIM3_CH2                ,TIM8_CH2        ,              ,         ,DFSDM_DATIN3,                    ,                      ,TSC_G4_IO2,               ,LCD_SEG25                   ,SDMMC1_D7                    ,SAI2_MCLK_B    ,                             ,EVENTOUT,
+PortC,PC8 ,             ,                          ,TIM3_CH3                ,TIM8_CH3        ,              ,         ,            ,                    ,                      ,TSC_G4_IO3,               ,LCD_SEG26                   ,SDMMC1_D0                    ,               ,                             ,EVENTOUT,
+PortC,PC9 ,             ,TIM8_BKIN2                ,TIM3_CH4                ,TIM8_CH4        ,              ,         ,            ,                    ,                      ,TSC_G4_IO4,OTG_FS_NOE     ,LCD_SEG27                   ,SDMMC1_D1                    ,SAI2_EXTCLK    ,TIM8_BKIN2_COMP1             ,EVENTOUT,
+PortC,PC10,             ,                          ,                        ,                ,              ,         ,SPI3_SCK    ,USART3_TX           ,UART4_TX              ,TSC_G3_IO2,               ,LCD_COM4/LCD_SEG28/LCD_SEG40,SDMMC1_D2                    ,SAI2_SCK_B     ,                             ,EVENTOUT,
+PortC,PC11,             ,                          ,                        ,                ,              ,         ,SPI3_MISO   ,USART3_RX           ,UART4_RX              ,TSC_G3_IO3,               ,LCD_COM5/LCD_SEG29/LCD_SEG41,SDMMC1_D3                    ,SAI2_MCLK_B    ,                             ,EVENTOUT,
+PortC,PC12,             ,                          ,                        ,                ,              ,         ,SPI3_MOSI   ,USART3_CK           ,UART5_TX              ,TSC_G3_IO4,               ,LCD_COM6/LCD_SEG30/LCD_SEG42,SDMMC1_CK                    ,SAI2_SD_B      ,                             ,EVENTOUT,
+PortC,PC13,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortC,PC14,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortC,PC15,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortD,PD0 ,             ,                          ,                        ,                ,              ,SPI2_NSS ,DFSDM_DATIN7,                    ,                      ,CAN1_RX   ,               ,                            ,FMC_D2                       ,               ,                             ,EVENTOUT,
+PortD,PD1 ,             ,                          ,                        ,                ,              ,SPI2_SCK ,DFSDM_CKIN7 ,                    ,                      ,CAN1_TX   ,               ,                            ,FMC_D3                       ,               ,                             ,EVENTOUT,
+PortD,PD2 ,             ,                          ,TIM3_ETR                ,                ,              ,         ,            ,USART3_RTS/USART3_DE,UART5_RX              ,TSC_SYNC  ,               ,LCD_COM7/LCD_SEG31/LCD_SEG43,SDMMC1_CMD                   ,               ,                             ,EVENTOUT,
+PortD,PD3 ,             ,                          ,                        ,                ,              ,SPI2_MISO,DFSDM_DATIN0,USART2_CTS          ,                      ,          ,               ,                            ,FMC_CLK                      ,               ,                             ,EVENTOUT,
+PortD,PD4 ,             ,                          ,                        ,                ,              ,SPI2_MOSI,DFSDM_CKIN0 ,USART2_RTS/USART2_DE,                      ,          ,               ,                            ,FMC_NOE                      ,               ,                             ,EVENTOUT,
+PortD,PD5 ,             ,                          ,                        ,                ,              ,         ,            ,USART2_TX           ,                      ,          ,               ,                            ,FMC_NWE                      ,               ,                             ,EVENTOUT,
+PortD,PD6 ,             ,                          ,                        ,                ,              ,         ,DFSDM_DATIN1,USART2_RX           ,                      ,          ,               ,                            ,FMC_NWAIT                    ,SAI1_SD_A      ,                             ,EVENTOUT,
+PortD,PD7 ,             ,                          ,                        ,                ,              ,         ,DFSDM_CKIN1 ,USART2_CK           ,                      ,          ,               ,                            ,FMC_NE1                      ,               ,                             ,EVENTOUT,
+PortD,PD8 ,             ,                          ,                        ,                ,              ,         ,            ,USART3_TX           ,                      ,          ,               ,LCD_SEG28                   ,FMC_D13                      ,               ,                             ,EVENTOUT,
+PortD,PD9 ,             ,                          ,                        ,                ,              ,         ,            ,USART3_RX           ,                      ,          ,               ,LCD_SEG29                   ,FMC_D14                      ,SAI2_MCLK_A    ,                             ,EVENTOUT,
+PortD,PD10,             ,                          ,                        ,                ,              ,         ,            ,USART3_CK           ,                      ,TSC_G6_IO1,               ,LCD_SEG30                   ,FMC_D15                      ,SAI2_SCK_A     ,                             ,EVENTOUT,
+PortD,PD11,             ,                          ,                        ,                ,              ,         ,            ,USART3_CTS          ,                      ,TSC_G6_IO2,               ,LCD_SEG31                   ,FMC_A16                      ,SAI2_SD_A      ,LPTIM2_ETR                   ,EVENTOUT,
+PortD,PD12,             ,                          ,TIM4_CH1                ,                ,              ,         ,            ,USART3_RTS/USART3_DE,                      ,TSC_G6_IO3,               ,LCD_SEG32                   ,FMC_A17                      ,SAI2_FS_A      ,LPTIM2_IN1                   ,EVENTOUT,
+PortD,PD13,             ,                          ,TIM4_CH2                ,                ,              ,         ,            ,                    ,                      ,TSC_G6_IO4,               ,LCD_SEG33                   ,FMC_A18                      ,               ,LPTIM2_OUT                   ,EVENTOUT,
+PortD,PD14,             ,                          ,TIM4_CH3                ,                ,              ,         ,            ,                    ,                      ,          ,               ,LCD_SEG34                   ,FMC_D0                       ,               ,                             ,EVENTOUT,
+PortD,PD15,             ,                          ,TIM4_CH4                ,                ,              ,         ,            ,                    ,                      ,          ,               ,LCD_SEG35                   ,FMC_D1                       ,               ,                             ,EVENTOUT,
+PortE,PE0 ,             ,                          ,TIM4_ETR                ,                ,              ,         ,            ,                    ,                      ,          ,               ,LCD_SEG36                   ,FMC_NBL0                     ,               ,TIM16_CH1                    ,EVENTOUT,
+PortE,PE1 ,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,LCD_SEG37                   ,FMC_NBL1                     ,               ,TIM17_CH1                    ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                          ,TIM3_ETR                ,                ,              ,         ,            ,                    ,                      ,TSC_G7_IO1,               ,LCD_SEG38                   ,FMC_A23                      ,SAI1_MCLK_A    ,                             ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                          ,TIM3_CH1                ,                ,              ,         ,            ,                    ,                      ,TSC_G7_IO2,               ,LCD_SEG39                   ,FMC_A19                      ,SAI1_SD_B      ,                             ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                          ,TIM3_CH2                ,                ,              ,         ,DFSDM_DATIN3,                    ,                      ,TSC_G7_IO3,               ,                            ,FMC_A20                      ,SAI1_FS_A      ,                             ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                          ,TIM3_CH3                ,                ,              ,         ,DFSDM_CKIN3 ,                    ,                      ,TSC_G7_IO4,               ,                            ,FMC_A21                      ,SAI1_SCK_A     ,                             ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                          ,TIM3_CH4                ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A22                      ,SAI1_SD_A      ,                             ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR                  ,                        ,                ,              ,         ,DFSDM_DATIN2,                    ,                      ,          ,               ,                            ,FMC_D4                       ,SAI1_SD_B      ,                             ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N                 ,                        ,                ,              ,         ,DFSDM_CKIN2 ,                    ,                      ,          ,               ,                            ,FMC_D5                       ,SAI1_SCK_B     ,                             ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1                  ,                        ,                ,              ,         ,DFSDM_CKOUT ,                    ,                      ,          ,               ,                            ,FMC_D6                       ,SAI1_FS_B      ,                             ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N                 ,                        ,                ,              ,         ,DFSDM_DATIN4,                    ,                      ,TSC_G5_IO1,QUADSPI_CLK    ,                            ,FMC_D7                       ,SAI1_MCLK_B    ,                             ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2                  ,                        ,                ,              ,         ,DFSDM_CKIN4 ,                    ,                      ,TSC_G5_IO2,QUADSPI_NCS    ,                            ,FMC_D8                       ,               ,                             ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N                 ,                        ,                ,              ,SPI1_NSS ,DFSDM_DATIN5,                    ,                      ,TSC_G5_IO3,QUADSPI_BK1_IO0,                            ,FMC_D9                       ,               ,                             ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3                  ,                        ,                ,              ,SPI1_SCK ,DFSDM_CKIN5 ,                    ,                      ,TSC_G5_IO4,QUADSPI_BK1_IO1,                            ,FMC_D10                      ,               ,                             ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4                  ,TIM1_BKIN2              ,TIM1_BKIN2_COMP2,              ,SPI1_MISO,            ,                    ,                      ,          ,QUADSPI_BK1_IO2,                            ,FMC_D11                      ,               ,                             ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN                 ,                        ,TIM1_BKIN_COMP1 ,              ,SPI1_MOSI,            ,                    ,                      ,          ,QUADSPI_BK1_IO3,                            ,FMC_D12                      ,               ,                             ,EVENTOUT,
+PortF,PF0 ,             ,                          ,                        ,                ,I2C2_SDA      ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A0                       ,               ,                             ,EVENTOUT,
+PortF,PF1 ,             ,                          ,                        ,                ,I2C2_SCL      ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A1                       ,               ,                             ,EVENTOUT,
+PortF,PF2 ,             ,                          ,                        ,                ,I2C2_SMBA     ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A2                       ,               ,                             ,EVENTOUT,
+PortF,PF3 ,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A3                       ,               ,                             ,EVENTOUT,ADC3_IN6
+PortF,PF4 ,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A4                       ,               ,                             ,EVENTOUT,ADC3_IN7
+PortF,PF5 ,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A5                       ,               ,                             ,EVENTOUT,ADC3_IN8
+PortF,PF6 ,             ,TIM5_ETR                  ,TIM5_CH1                ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,SAI1_SD_B      ,                             ,EVENTOUT,ADC3_IN9
+PortF,PF7 ,             ,                          ,TIM5_CH2                ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,SAI1_MCLK_B    ,                             ,EVENTOUT,ADC3_IN10
+PortF,PF8 ,             ,                          ,TIM5_CH3                ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,SAI1_SCK_B     ,                             ,EVENTOUT,ADC3_IN11
+PortF,PF9 ,             ,                          ,TIM5_CH4                ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,SAI1_FS_B      ,TIM15_CH1                    ,EVENTOUT,ADC3_IN12
+PortF,PF10,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,TIM15_CH2                    ,EVENTOUT,ADC3_IN13
+PortF,PF11,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortF,PF12,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A6                       ,               ,                             ,EVENTOUT,
+PortF,PF13,             ,                          ,                        ,                ,              ,         ,DFSDM_DATIN6,                    ,                      ,          ,               ,                            ,FMC_A7                       ,               ,                             ,EVENTOUT,
+PortF,PF14,             ,                          ,                        ,                ,              ,         ,DFSDM_CKIN6 ,                    ,                      ,TSC_G8_IO1,               ,                            ,FMC_A8                       ,               ,                             ,EVENTOUT,
+PortF,PF15,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,TSC_G8_IO2,               ,                            ,FMC_A9                       ,               ,                             ,EVENTOUT,
+PortG,PG0 ,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,TSC_G8_IO3,               ,                            ,FMC_A10                      ,               ,                             ,EVENTOUT,
+PortG,PG1 ,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,TSC_G8_IO4,               ,                            ,FMC_A11                      ,               ,                             ,EVENTOUT,
+PortG,PG2 ,             ,                          ,                        ,                ,              ,SPI1_SCK ,            ,                    ,                      ,          ,               ,                            ,FMC_A12                      ,SAI2_SCK_B     ,                             ,EVENTOUT,
+PortG,PG3 ,             ,                          ,                        ,                ,              ,SPI1_MISO,            ,                    ,                      ,          ,               ,                            ,FMC_A13                      ,SAI2_FS_B      ,                             ,EVENTOUT,
+PortG,PG4 ,             ,                          ,                        ,                ,              ,SPI1_MOSI,            ,                    ,                      ,          ,               ,                            ,FMC_A14                      ,SAI2_MCLK_B    ,                             ,EVENTOUT,
+PortG,PG5 ,             ,                          ,                        ,                ,              ,SPI1_NSS ,            ,                    ,LPUART1_CTS           ,          ,               ,                            ,FMC_A15                      ,SAI2_SD_B      ,                             ,EVENTOUT,
+PortG,PG6 ,             ,                          ,                        ,                ,I2C3_SMBA     ,         ,            ,                    ,LPUART1_RTS/LPUART1_DE,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortG,PG7 ,             ,                          ,                        ,                ,I2C3_SCL      ,         ,            ,                    ,LPUART1_TX            ,          ,               ,                            ,FMC_INT3                     ,               ,                             ,EVENTOUT,
+PortG,PG8 ,             ,                          ,                        ,                ,I2C3_SDA      ,         ,            ,                    ,LPUART1_RX            ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortG,PG9 ,             ,                          ,                        ,                ,              ,         ,SPI3_SCK    ,USART1_TX           ,                      ,          ,               ,                            ,FMC_NCE3/FMC_NE2             ,SAI2_SCK_A     ,TIM15_CH1N                   ,EVENTOUT,
+PortG,PG10,             ,LPTIM1_IN1                ,                        ,                ,              ,         ,SPI3_MISO   ,USART1_RX           ,                      ,          ,               ,                            ,FMC_NE3                      ,SAI2_FS_A      ,TIM15_CH1                    ,EVENTOUT,
+PortG,PG11,             ,LPTIM1_IN2                ,                        ,                ,              ,         ,SPI3_MOSI   ,USART1_CTS          ,                      ,          ,               ,                            ,                             ,SAI2_MCLK_A    ,TIM15_CH2                    ,EVENTOUT,
+PortG,PG12,             ,LPTIM1_ETR                ,                        ,                ,              ,         ,SPI3_NSS    ,USART1_RTS/USART1_DE,                      ,          ,               ,                            ,FMC_NE4                      ,SAI2_SD_A      ,                             ,EVENTOUT,
+PortG,PG13,             ,                          ,                        ,                ,I2C1_SDA      ,         ,            ,USART1_CK           ,                      ,          ,               ,                            ,FMC_A24                      ,               ,                             ,EVENTOUT,
+PortG,PG14,             ,                          ,                        ,                ,I2C1_SCL      ,         ,            ,                    ,                      ,          ,               ,                            ,FMC_A25                      ,               ,                             ,EVENTOUT,
+PortG,PG15,             ,LPTIM1_OUT                ,                        ,                ,I2C1_SMBA     ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH0 ,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH1 ,             ,                          ,                        ,                ,              ,         ,            ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32l496_af.csv b/ports/stm32/boards/stm32l496_af.csv
index 311770a055..a0d77f1e10 100644
--- a/ports/stm32/boards/stm32l496_af.csv
+++ b/ports/stm32/boards/stm32l496_af.csv
@@ -1,142 +1,142 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,,,
-,,SYS_AF,TIM1/TIM2/TIM5/TIM8/LPTIM1,TIM1/TIM2/TIM3/TIM4/TIM5,TIM8,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3/DFSDM,USART1/USART2/USART3,UART4/UART5/LPUART1,CAN1/TSC,OTG_FS/QUADSPI,LCD,SDMMC1/COMP1/COMP2/FMC/SWPMI1,SAI1/SAI2,TIM2/TIM15/TIM16/TIM17/LPTIM2,EVENTOUT,ADC,COMP,DAC
-PortA,PA0,,TIM2_CH1,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,,,SAI1_EXTCLK,TIM2_ETR,EVENTOUT,ADC12_IN5,,
-PortA,PA1,,TIM2_CH2,TIM5_CH2,,I2C1_SMBA,SPI1_SCK,,USART2_RTS/USART2_DE,UART4_RX,,,LCD_SEG0,,,TIM15_CH1N,EVENTOUT,ADC12_IN6,,
-PortA,PA2,,TIM2_CH3,TIM5_CH3,,,,,USART2_TX,LPUART1_TX,,QUADSPI_BK1_NCS,LCD_SEG1,,SAI2_EXTCLK,TIM15_CH1,EVENTOUT,ADC12_IN7,,
-PortA,PA3,,TIM2_CH4,TIM5_CH4,,,,,USART2_RX,LPUART1_RX,,QUADSPI_CLK,LCD_SEG2,,SAI1_MCLK_A,TIM15_CH2,EVENTOUT,ADC12_IN8,,
-PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS,USART2_CK,,,DCMI_HSYNC,,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT,ADC12_IN9,,DAC1_OUT1
-PortA,PA5,,TIM2_CH1,TIM2_ETR,TIM8_CH1N,,SPI1_SCK,,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC12_IN10,,DAC1_OUT2
-PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,DCMI_PIXCLK,SPI1_MISO,,USART3_CTS,LPUART1_CTS,,QUADSPI_BK1_IO3,LCD_SEG3,TIM1_BKIN_COMP2,TIM8_BKIN_COMP2,TIM16_CH1,EVENTOUT,ADC12_IN11,,
-PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,I2C3_SCL,SPI1_MOSI,,,,,QUADSPI_BK1_IO2,LCD_SEG4,,,TIM17_CH1,EVENTOUT,ADC12_IN12,,
-PortA,PA8,MCO,TIM1_CH1,,,,,,USART1_CK,,,OTG_FS_SOF,LCD_COM0,SWPMI1_IO,SAI1_SCK_A,LPTIM2_OUT,EVENTOUT,,,
-PortA,PA9,,TIM1_CH2,,SPI2_SCK,I2C1_SCL,DCMI_D0,,USART1_TX,,,,LCD_COM1,,SAI1_FS_A,TIM15_BKIN,EVENTOUT,,,
-PortA,PA10,,TIM1_CH3,,,I2C1_SDA,DCMI_D1,,USART1_RX,,,OTG_FS_ID,LCD_COM2,,SAI1_SD_A,TIM17_BKIN,EVENTOUT,,,
-PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,SPI1_MISO,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,TIM1_BKIN2_COMP1,,,EVENTOUT,,,
-PortA,PA12,,TIM1_ETR,,,,SPI1_MOSI,,USART1_RTS/USART1_DE,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT,,,
-PortA,PA13,JTMS/SWDIO,IR_OUT,,,,,,,,,OTG_FS_NOE,,SWPMI1_TX,SAI1_SD_B,,EVENTOUT,,,
-PortA,PA14,JTCK/SWCLK,LPTIM1_OUT,,,I2C1_SMBA,I2C4_SMBA,,,,,OTG_FS_SOF,,SWPMI1_RX,SAI1_FS_B,,EVENTOUT,,,
-PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,USART2_RX,,SPI1_NSS,SPI3_NSS,USART3_RTS/USART3_DE,UART4_RTS/UART4_DE,TSC_G3_IO1,,LCD_SEG17,SWPMI1_SUSPEND,SAI2_FS_B,,EVENTOUT,,,
-PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,SPI1_NSS,,USART3_CK,,,QUADSPI_BK1_IO1,LCD_SEG5,COMP1_OUT,SAI1_EXTCLK,,EVENTOUT,ADC12_IN15,,
-PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM1_DATIN0,USART3_RTS/USART3_DE,LPUART1_RTS/LPUART1_DE,,QUADSPI_BK1_IO0,LCD_SEG6,,,LPTIM2_IN1,EVENTOUT,ADC12_IN16,COMP1_INM,
-PortB,PB2,RTC_OUT,LPTIM1_OUT,,,I2C3_SMBA,,DFSDM1_CKIN0,,,,,LCD_VLCD,,,,EVENTOUT,,COMP1_INP,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK,USART1_RTS/USART1_DE,,,OTG_FS_CRS_SYNC,LCD_SEG7,,SAI1_SCK_B,,EVENTOUT,,COMP2_INM,
-PortB,PB4,NJTRST,,TIM3_CH1,,I2C3_SDA,SPI1_MISO,SPI3_MISO,USART1_CTS,UART5_RTS/UART5_DE,TSC_G2_IO1,DCMI_D12,LCD_SEG8,,SAI1_MCLK_B,TIM17_BKIN,EVENTOUT,,COMP2_INP,
-PortB,PB5,,LPTIM1_IN1,TIM3_CH2,CAN2_RX,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI,USART1_CK,UART5_CTS,TSC_G2_IO2,DCMI_D10,LCD_SEG9,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT,,,
-PortB,PB6,,LPTIM1_ETR,TIM4_CH1,TIM8_BKIN2,I2C1_SCL,I2C4_SCL,DFSDM1_DATIN5,USART1_TX,CAN2_TX,TSC_G2_IO3,DCMI_D5,,TIM8_BKIN2_COMP2,SAI1_FS_B,TIM16_CH1N,EVENTOUT,,COMP2_INP,
-PortB,PB7,,LPTIM1_IN2,TIM4_CH2,TIM8_BKIN,I2C1_SDA,I2C4_SDA,DFSDM1_CKIN5,USART1_RX,UART4_CTS,TSC_G2_IO4,DCMI_VSYNC,LCD_SEG21,FMC_NL,TIM8_BKIN_COMP1,TIM17_CH1N,EVENTOUT,,COMP2_INM,
-PortB,PB8,,,TIM4_CH3,,I2C1_SCL,,DFSDM1_DATIN6,,,CAN1_RX,DCMI_D6,LCD_SEG16,SDMMC1_D4,SAI1_MCLK_A,TIM16_CH1,EVENTOUT,,,
-PortB,PB9,,IR_OUT,TIM4_CH4,,I2C1_SDA,SPI2_NSS,DFSDM1_CKIN6,,,CAN1_TX,DCMI_D7,LCD_COM3,SDMMC1_D5,SAI1_FS_A,TIM17_CH1,EVENTOUT,,,
-PortB,PB10,,TIM2_CH3,,I2C4_SCL,I2C2_SCL,SPI2_SCK,DFSDM1_DATIN7,USART3_TX,LPUART1_RX,TSC_SYNC,QUADSPI_CLK,LCD_SEG10,COMP1_OUT,SAI1_SCK_A,,EVENTOUT,,,
-PortB,PB11,,TIM2_CH4,,I2C4_SDA,I2C2_SDA,,DFSDM1_CKIN7,USART3_RX,LPUART1_TX,,QUADSPI_BK1_NCS,LCD_SEG11,COMP2_OUT,,,EVENTOUT,,,
-PortB,PB12,,TIM1_BKIN,,TIM1_BKIN_COMP2,I2C2_SMBA,SPI2_NSS,DFSDM1_DATIN1,USART3_CK,LPUART1_RTS/LPUART1_DE,TSC_G1_IO1,CAN2_RX,LCD_SEG12,SWPMI1_IO,SAI2_FS_A,TIM15_BKIN,EVENTOUT,,,
-PortB,PB13,,TIM1_CH1N,,,I2C2_SCL,SPI2_SCK,DFSDM1_CKIN1,USART3_CTS,LPUART1_CTS,TSC_G1_IO2,CAN2_TX,LCD_SEG13,SWPMI1_TX,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,,,
-PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,I2C2_SDA,SPI2_MISO,DFSDM1_DATIN2,USART3_RTS/USART3_DE,,TSC_G1_IO3,,LCD_SEG14,SWPMI1_RX,SAI2_MCLK_A,TIM15_CH1,EVENTOUT,,,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI,DFSDM1_CKIN2,,,TSC_G1_IO4,,LCD_SEG15,SWPMI1_SUSPEND,SAI2_SD_A,TIM15_CH2,EVENTOUT,,,
-PortC,PC0,,LPTIM1_IN1,I2C4_SCL,,I2C3_SCL,,DFSDM1_DATIN4,,LPUART1_RX,,,LCD_SEG18,,,LPTIM2_IN1,EVENTOUT,ADC123_IN1,,
-PortC,PC1,TRACED0,LPTIM1_OUT,I2C4_SDA,SPI2_MOSI,I2C3_SDA,,DFSDM1_CKIN4,,LPUART1_TX,,QUADSPI_BK2_IO0,LCD_SEG19,,SAI1_SD_A,,EVENTOUT,ADC123_IN2,,
-PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,DFSDM1_CKOUT,,,,QUADSPI_BK2_IO1,LCD_SEG20,,,,EVENTOUT,ADC123_IN3,,
-PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI,,,,,QUADSPI_BK2_IO2,LCD_VLCD,,SAI1_SD_A,LPTIM2_ETR,EVENTOUT,ADC123_IN4,,
-PortC,PC4,,,,,,,,USART3_TX,,,QUADSPI_BK2_IO3,LCD_SEG22,,,,EVENTOUT,ADC12_IN13,COMP1_INM,
-PortC,PC5,,,,,,,,USART3_RX,,,,LCD_SEG23,,,,EVENTOUT,ADC12_IN14,COMP1_INP,
-PortC,PC6,,,TIM3_CH1,TIM8_CH1,,,DFSDM1_CKIN3,,,TSC_G4_IO1,DCMI_D0,LCD_SEG24,SDMMC1_D6,SAI2_MCLK_A,,EVENTOUT,,,
-PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,DFSDM1_DATIN3,,,TSC_G4_IO2,DCMI_D1,LCD_SEG25,SDMMC1_D7,SAI2_MCLK_B,,EVENTOUT,,,
-PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,,TSC_G4_IO3,DCMI_D2,LCD_SEG26,SDMMC1_D0,,,EVENTOUT,,,
-PortC,PC9,,TIM8_BKIN2,TIM3_CH4,TIM8_CH4,DCMI_D3,,I2C3_SDA,,,TSC_G4_IO4,OTG_FS_NOE,LCD_SEG27,SDMMC1_D1,SAI2_EXTCLK,TIM8_BKIN2_COMP1,EVENTOUT,,,
-PortC,PC10,TRACED1,,,,,,SPI3_SCK,USART3_TX,UART4_TX,TSC_G3_IO2,DCMI_D8,LCD_COM4/LCD_SEG28/LCD_SEG40,SDMMC1_D2,SAI2_SCK_B,,EVENTOUT,,,
-PortC,PC11,,,,,,QUADSPI_BK2_NCS,SPI3_MISO,USART3_RX,UART4_RX,TSC_G3_IO3,DCMI_D4,LCD_COM5/LCD_SEG29/LCD_SEG41,SDMMC1_D3,SAI2_MCLK_B,,EVENTOUT,,,
-PortC,PC12,TRACED3,,,,,,SPI3_MOSI,USART3_CK,UART5_TX,TSC_G3_IO4,DCMI_D9,LCD_COM6/LCD_SEG30/LCD_SEG42,SDMMC1_CK,SAI2_SD_B,,EVENTOUT,,,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortD,PD0,,,,,,SPI2_NSS,DFSDM1_DATIN7,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,,,
-PortD,PD1,,,,,,SPI2_SCK,DFSDM1_CKIN7,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,,,
-PortD,PD2,TRACED2,,TIM3_ETR,,,,,USART3_RTS/USART3_DE,UART5_RX,TSC_SYNC,DCMI_D11,LCD_COM7/LCD_SEG31/LCD_SEG43,SDMMC1_CMD,,,EVENTOUT,,,
-PortD,PD3,,,,SPI2_SCK,DCMI_D5,SPI2_MISO,DFSDM1_DATIN0,USART2_CTS,,,QUADSPI_BK2_NCS,,FMC_CLK,,,EVENTOUT,,,
-PortD,PD4,,,,,,SPI2_MOSI,DFSDM1_CKIN0,USART2_RTS/USART2_DE,,,QUADSPI_BK2_IO0,,FMC_NOE,,,EVENTOUT,,,
-PortD,PD5,,,,,,,,USART2_TX,,,QUADSPI_BK2_IO1,,FMC_NWE,,,EVENTOUT,,,
-PortD,PD6,,,,,DCMI_D10,QUADSPI_BK2_IO1,DFSDM1_DATIN1,USART2_RX,,,QUADSPI_BK2_IO2,,FMC_NWAIT,SAI1_SD_A,,EVENTOUT,,,
-PortD,PD7,,,,,,,DFSDM1_CKIN1,USART2_CK,,,QUADSPI_BK2_IO3,,FMC_NE1,,,EVENTOUT,,,
-PortD,PD8,,,,,,,,USART3_TX,,,DCMI_HSYNC,LCD_SEG28,FMC_D13,,,EVENTOUT,,,
-PortD,PD9,,,,,,,,USART3_RX,,,DCMI_PIXCLK,LCD_SEG29,FMC_D14,SAI2_MCLK_A,,EVENTOUT,,,
-PortD,PD10,,,,,,,,USART3_CK,,TSC_G6_IO1,,LCD_SEG30,FMC_D15,SAI2_SCK_A,,EVENTOUT,,,
-PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,TSC_G6_IO2,,LCD_SEG31,FMC_A16,SAI2_SD_A,LPTIM2_ETR,EVENTOUT,,,
-PortD,PD12,,,TIM4_CH1,,I2C4_SCL,,,USART3_RTS/USART3_DE,,TSC_G6_IO3,,LCD_SEG32,FMC_A17,SAI2_FS_A,LPTIM2_IN1,EVENTOUT,,,
-PortD,PD13,,,TIM4_CH2,,I2C4_SDA,,,,,TSC_G6_IO4,,LCD_SEG33,FMC_A18,,LPTIM2_OUT,EVENTOUT,,,
-PortD,PD14,,,TIM4_CH3,,,,,,,,,LCD_SEG34,FMC_D0,,,EVENTOUT,,,
-PortD,PD15,,,TIM4_CH4,,,,,,,,,LCD_SEG35,FMC_D1,,,EVENTOUT,,,
-PortE,PE0,,,TIM4_ETR,,,,,,,,DCMI_D2,LCD_SEG36,FMC_NBL0,,TIM16_CH1,EVENTOUT,,,
-PortE,PE1,,,,,,,,,,,DCMI_D3,LCD_SEG37,FMC_NBL1,,TIM17_CH1,EVENTOUT,,,
-PortE,PE2,TRACECLK,,TIM3_ETR,,,,,,,TSC_G7_IO1,,LCD_SEG38,FMC_A23,SAI1_MCLK_A,,EVENTOUT,,,
-PortE,PE3,TRACED0,,TIM3_CH1,,,,,,,TSC_G7_IO2,,LCD_SEG39,FMC_A19,SAI1_SD_B,,EVENTOUT,,,
-PortE,PE4,TRACED1,,TIM3_CH2,,,,DFSDM1_DATIN3,,,TSC_G7_IO3,DCMI_D4,,FMC_A20,SAI1_FS_A,,EVENTOUT,,,
-PortE,PE5,TRACED2,,TIM3_CH3,,,,DFSDM1_CKIN3,,,TSC_G7_IO4,DCMI_D6,,FMC_A21,SAI1_SCK_A,,EVENTOUT,,,
-PortE,PE6,TRACED3,,TIM3_CH4,,,,,,,,DCMI_D7,,FMC_A22,SAI1_SD_A,,EVENTOUT,,,
-PortE,PE7,,TIM1_ETR,,,,,DFSDM1_DATIN2,,,,,,FMC_D4,SAI1_SD_B,,EVENTOUT,,,
-PortE,PE8,,TIM1_CH1N,,,,,DFSDM1_CKIN2,,,,,,FMC_D5,SAI1_SCK_B,,EVENTOUT,,,
-PortE,PE9,,TIM1_CH1,,,,,DFSDM1_CKOUT,,,,,,FMC_D6,SAI1_FS_B,,EVENTOUT,,,
-PortE,PE10,,TIM1_CH2N,,,,,DFSDM1_DATIN4,,,TSC_G5_IO1,QUADSPI_CLK,,FMC_D7,SAI1_MCLK_B,,EVENTOUT,,,
-PortE,PE11,,TIM1_CH2,,,,,DFSDM1_CKIN4,,,TSC_G5_IO2,QUADSPI_BK1_NCS,,FMC_D8,,,EVENTOUT,,,
-PortE,PE12,,TIM1_CH3N,,,,SPI1_NSS,DFSDM1_DATIN5,,,TSC_G5_IO3,QUADSPI_BK1_IO0,,FMC_D9,,,EVENTOUT,,,
-PortE,PE13,,TIM1_CH3,,,,SPI1_SCK,DFSDM1_CKIN5,,,TSC_G5_IO4,QUADSPI_BK1_IO1,,FMC_D10,,,EVENTOUT,,,
-PortE,PE14,,TIM1_CH4,TIM1_BKIN2,TIM1_BKIN2_COMP2,,SPI1_MISO,,,,,QUADSPI_BK1_IO2,,FMC_D11,,,EVENTOUT,,,
-PortE,PE15,,TIM1_BKIN,,TIM1_BKIN_COMP1,,SPI1_MOSI,,,,,QUADSPI_BK1_IO3,,FMC_D12,,,EVENTOUT,,,
-PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,,,
-PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,,,
-PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,,,
-PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN6,,
-PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN7,,
-PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN8,,
-PortF,PF6,,TIM5_ETR,TIM5_CH1,,,,,,,,QUADSPI_BK1_IO3,,,SAI1_SD_B,,EVENTOUT,ADC3_IN9,,
-PortF,PF7,,,TIM5_CH2,,,,,,,,QUADSPI_BK1_IO2,,,SAI1_MCLK_B,,EVENTOUT,ADC3_IN10,,
-PortF,PF8,,,TIM5_CH3,,,,,,,,QUADSPI_BK1_IO0,,,SAI1_SCK_B,,EVENTOUT,ADC3_IN11,,
-PortF,PF9,,,TIM5_CH4,,,,,,,,QUADSPI_BK1_IO1,,,SAI1_FS_B,TIM15_CH1,EVENTOUT,ADC3_IN12,,
-PortF,PF10,,,,QUADSPI_CLK,,,,,,,DCMI_D11,,,,TIM15_CH2,EVENTOUT,ADC3_IN13,,
-PortF,PF11,,,,,,,,,,,DCMI_D12,,,,,EVENTOUT,,,
-PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,,,
-PortF,PF13,,,,,I2C4_SMBA,,DFSDM1_DATIN6,,,,,,FMC_A7,,,EVENTOUT,,,
-PortF,PF14,,,,,I2C4_SCL,,DFSDM1_CKIN6,,,TSC_G8_IO1,,,FMC_A8,,,EVENTOUT,,,
-PortF,PF15,,,,,I2C4_SDA,,,,,TSC_G8_IO2,,,FMC_A9,,,EVENTOUT,,,
-PortG,PG0,,,,,,,,,,TSC_G8_IO3,,,FMC_A10,,,EVENTOUT,,,
-PortG,PG1,,,,,,,,,,TSC_G8_IO4,,,FMC_A11,,,EVENTOUT,,,
-PortG,PG2,,,,,,SPI1_SCK,,,,,,,FMC_A12,SAI2_SCK_B,,EVENTOUT,,,
-PortG,PG3,,,,,,SPI1_MISO,,,,,,,FMC_A13,SAI2_FS_B,,EVENTOUT,,,
-PortG,PG4,,,,,,SPI1_MOSI,,,,,,,FMC_A14,SAI2_MCLK_B,,EVENTOUT,,,
-PortG,PG5,,,,,,SPI1_NSS,,,LPUART1_CTS,,,,FMC_A15,SAI2_SD_B,,EVENTOUT,,,
-PortG,PG6,,,,,I2C3_SMBA,,,,LPUART1_RTS/LPUART1_DE,,,,,,,EVENTOUT,,,
-PortG,PG7,,,,,I2C3_SCL,,,,LPUART1_TX,,,,FMC_INT,SAI1_MCLK_A,,EVENTOUT,,,
-PortG,PG8,,,,,I2C3_SDA,,,,LPUART1_RX,,,,,,,EVENTOUT,,,
-PortG,PG9,,,,,,,SPI3_SCK,USART1_TX,,,,,FMC_NCE/FMC_NE2,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,,,
-PortG,PG10,,LPTIM1_IN1,,,,,SPI3_MISO,USART1_RX,,,,,FMC_NE3,SAI2_FS_A,TIM15_CH1,EVENTOUT,,,
-PortG,PG11,,LPTIM1_IN2,,,,,SPI3_MOSI,USART1_CTS,,,,,,SAI2_MCLK_A,TIM15_CH2,EVENTOUT,,,
-PortG,PG12,,LPTIM1_ETR,,,,,SPI3_NSS,USART1_RTS/USART1_DE,,,,,FMC_NE4,SAI2_SD_A,,EVENTOUT,,,
-PortG,PG13,,,,,I2C1_SDA,,,USART1_CK,,,,,FMC_A24,,,EVENTOUT,,,
-PortG,PG14,,,,,I2C1_SCL,,,,,,,,FMC_A25,,,EVENTOUT,,,
-PortG,PG15,,LPTIM1_OUT,,,I2C1_SMBA,,,,,,DCMI_D13,,,,,EVENTOUT,,,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortH,PH2,,,,QUADSPI_BK2_IO0,,,,,,,,,,,,EVENTOUT,,,
-PortH,PH3,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortH,PH4,,,,,I2C2_SCL,,,,,,,,,,,EVENTOUT,,,
-PortH,PH5,,,,,I2C2_SDA,,,,,,DCMI_PIXCLK,,,,,EVENTOUT,,,
-PortH,PH6,,,,,I2C2_SMBA,,,,,,DCMI_D8,,,,,EVENTOUT,,,
-PortH,PH7,,,,,I2C3_SCL,,,,,,DCMI_D9,,,,,EVENTOUT,,,
-PortH,PH8,,,,,I2C3_SDA,,,,,,DCMI_HSYNC,,,,,EVENTOUT,,,
-PortH,PH9,,,,,I2C3_SMBA,,,,,,DCMI_D0,,,,,EVENTOUT,,,
-PortH,PH10,,,TIM5_CH1,,,,,,,,DCMI_D1,,,,,EVENTOUT,,,
-PortH,PH11,,,TIM5_CH2,,,,,,,,DCMI_D2,,,,,EVENTOUT,,,
-PortH,PH12,,,TIM5_CH3,,,,,,,,DCMI_D3,,,,,EVENTOUT,,,
-PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,,,,EVENTOUT,,,
-PortH,PH14,,,,TIM8_CH2N,,,,,,,DCMI_D4,,,,,EVENTOUT,,,
-PortH,PH15,,,,TIM8_CH3N,,,,,,,DCMI_D11,,,,,EVENTOUT,,,
-PortI,PI0,,,TIM5_CH4,,,SPI2_NSS,,,,,DCMI_D13,,,,,EVENTOUT,,,
-PortI,PI1,,,,,,SPI2_SCK,,,,,DCMI_D8,,,,,EVENTOUT,,,
-PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,DCMI_D9,,,,,EVENTOUT,,,
-PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI,,,,,DCMI_D10,,,,,EVENTOUT,,,
-PortI,PI4,,,,TIM8_BKIN,,,,,,,DCMI_D5,,,,,EVENTOUT,,,
-PortI,PI5,,,,TIM8_CH1,,,,,,,DCMI_VSYNC,,,,,EVENTOUT,,,
-PortI,PI6,,,,TIM8_CH2,,,,,,,DCMI_D6,,,,,EVENTOUT,,,
-PortI,PI7,,,,TIM8_CH3,,,,,,,DCMI_D7,,,,,EVENTOUT,,,
-PortI,PI8,,,,,,,,,,,DCMI_D12,,,,,EVENTOUT,,,
-PortI,PI9,,,,,,,,,,CAN1_RX,,,,,,EVENTOUT,,,
-PortI,PI10,,,,,,,,,,,,,,,,EVENTOUT,,,
-PortI,PI11,,,,,,,,,,,,,,,,EVENTOUT,,,
+Port ,Pin ,AF0          ,AF1                       ,AF2                     ,AF3             ,AF4           ,AF5            ,AF6          ,AF7                 ,AF8                   ,AF9       ,AF10           ,AF11                        ,AF12                         ,AF13           ,AF14                         ,AF15    ,ADC
+     ,    ,SYS_AF       ,TIM1/TIM2/TIM5/TIM8/LPTIM1,TIM1/TIM2/TIM3/TIM4/TIM5,TIM8            ,I2C1/I2C2/I2C3,SPI1/SPI2      ,SPI3/DFSDM   ,USART1/USART2/USART3,UART4/UART5/LPUART1   ,CAN1/TSC  ,OTG_FS/QUADSPI ,LCD                         ,SDMMC1/COMP1/COMP2/FMC/SWPMI1,SAI1/SAI2      ,TIM2/TIM15/TIM16/TIM17/LPTIM2,EVENTOUT,ADC
+PortA,PA0 ,             ,TIM2_CH1                  ,TIM5_CH1                ,TIM8_ETR        ,              ,               ,             ,USART2_CTS          ,UART4_TX              ,          ,               ,                            ,                             ,SAI1_EXTCLK    ,TIM2_ETR                     ,EVENTOUT,ADC12_IN5
+PortA,PA1 ,             ,TIM2_CH2                  ,TIM5_CH2                ,                ,I2C1_SMBA     ,SPI1_SCK       ,             ,USART2_RTS/USART2_DE,UART4_RX              ,          ,               ,LCD_SEG0                    ,                             ,               ,TIM15_CH1N                   ,EVENTOUT,ADC12_IN6
+PortA,PA2 ,             ,TIM2_CH3                  ,TIM5_CH3                ,                ,              ,               ,             ,USART2_TX           ,LPUART1_TX            ,          ,QUADSPI_BK1_NCS,LCD_SEG1                    ,                             ,SAI2_EXTCLK    ,TIM15_CH1                    ,EVENTOUT,ADC12_IN7
+PortA,PA3 ,             ,TIM2_CH4                  ,TIM5_CH4                ,                ,              ,               ,             ,USART2_RX           ,LPUART1_RX            ,          ,QUADSPI_CLK    ,LCD_SEG2                    ,                             ,SAI1_MCLK_A    ,TIM15_CH2                    ,EVENTOUT,ADC12_IN8
+PortA,PA4 ,             ,                          ,                        ,                ,              ,SPI1_NSS       ,SPI3_NSS     ,USART2_CK           ,                      ,          ,DCMI_HSYNC     ,                            ,                             ,SAI1_FS_B      ,LPTIM2_OUT                   ,EVENTOUT,ADC12_IN9
+PortA,PA5 ,             ,TIM2_CH1                  ,TIM2_ETR                ,TIM8_CH1N       ,              ,SPI1_SCK       ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,LPTIM2_ETR                   ,EVENTOUT,ADC12_IN10
+PortA,PA6 ,             ,TIM1_BKIN                 ,TIM3_CH1                ,TIM8_BKIN       ,DCMI_PIXCLK   ,SPI1_MISO      ,             ,USART3_CTS          ,LPUART1_CTS           ,          ,QUADSPI_BK1_IO3,LCD_SEG3                    ,TIM1_BKIN_COMP2              ,TIM8_BKIN_COMP2,TIM16_CH1                    ,EVENTOUT,ADC12_IN11
+PortA,PA7 ,             ,TIM1_CH1N                 ,TIM3_CH2                ,TIM8_CH1N       ,I2C3_SCL      ,SPI1_MOSI      ,             ,                    ,                      ,          ,QUADSPI_BK1_IO2,LCD_SEG4                    ,                             ,               ,TIM17_CH1                    ,EVENTOUT,ADC12_IN12
+PortA,PA8 ,MCO          ,TIM1_CH1                  ,                        ,                ,              ,               ,             ,USART1_CK           ,                      ,          ,OTG_FS_SOF     ,LCD_COM0                    ,SWPMI1_IO                    ,SAI1_SCK_A     ,LPTIM2_OUT                   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2                  ,                        ,SPI2_SCK        ,I2C1_SCL      ,DCMI_D0        ,             ,USART1_TX           ,                      ,          ,               ,LCD_COM1                    ,                             ,SAI1_FS_A      ,TIM15_BKIN                   ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3                  ,                        ,                ,I2C1_SDA      ,DCMI_D1        ,             ,USART1_RX           ,                      ,          ,OTG_FS_ID      ,LCD_COM2                    ,                             ,SAI1_SD_A      ,TIM17_BKIN                   ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4                  ,TIM1_BKIN2              ,                ,              ,SPI1_MISO      ,             ,USART1_CTS          ,                      ,CAN1_RX   ,OTG_FS_DM      ,                            ,TIM1_BKIN2_COMP1             ,               ,                             ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR                  ,                        ,                ,              ,SPI1_MOSI      ,             ,USART1_RTS/USART1_DE,                      ,CAN1_TX   ,OTG_FS_DP      ,                            ,                             ,               ,                             ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,IR_OUT                    ,                        ,                ,              ,               ,             ,                    ,                      ,          ,OTG_FS_NOE     ,                            ,SWPMI1_TX                    ,SAI1_SD_B      ,                             ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,LPTIM1_OUT                ,                        ,                ,I2C1_SMBA     ,I2C4_SMBA      ,             ,                    ,                      ,          ,OTG_FS_SOF     ,                            ,SWPMI1_RX                    ,SAI1_FS_B      ,                             ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1                  ,TIM2_ETR                ,USART2_RX       ,              ,SPI1_NSS       ,SPI3_NSS     ,USART3_RTS/USART3_DE,UART4_RTS/UART4_DE    ,TSC_G3_IO1,               ,LCD_SEG17                   ,SWPMI1_SUSPEND               ,SAI2_FS_B      ,                             ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N                 ,TIM3_CH3                ,TIM8_CH2N       ,              ,SPI1_NSS       ,             ,USART3_CK           ,                      ,          ,QUADSPI_BK1_IO1,LCD_SEG5                    ,COMP1_OUT                    ,SAI1_EXTCLK    ,                             ,EVENTOUT,ADC12_IN15
+PortB,PB1 ,             ,TIM1_CH3N                 ,TIM3_CH4                ,TIM8_CH3N       ,              ,               ,DFSDM1_DATIN0,USART3_RTS/USART3_DE,LPUART1_RTS/LPUART1_DE,          ,QUADSPI_BK1_IO0,LCD_SEG6                    ,                             ,               ,LPTIM2_IN1                   ,EVENTOUT,ADC12_IN16
+PortB,PB2 ,RTC_OUT      ,LPTIM1_OUT                ,                        ,                ,I2C3_SMBA     ,               ,DFSDM1_CKIN0 ,                    ,                      ,          ,               ,LCD_VLCD                    ,                             ,               ,                             ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2                  ,                        ,                ,              ,SPI1_SCK       ,SPI3_SCK     ,USART1_RTS/USART1_DE,                      ,          ,OTG_FS_CRS_SYNC,LCD_SEG7                    ,                             ,SAI1_SCK_B     ,                             ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                          ,TIM3_CH1                ,                ,I2C3_SDA      ,SPI1_MISO      ,SPI3_MISO    ,USART1_CTS          ,UART5_RTS/UART5_DE    ,TSC_G2_IO1,DCMI_D12       ,LCD_SEG8                    ,                             ,SAI1_MCLK_B    ,TIM17_BKIN                   ,EVENTOUT,
+PortB,PB5 ,             ,LPTIM1_IN1                ,TIM3_CH2                ,CAN2_RX         ,I2C1_SMBA     ,SPI1_MOSI      ,SPI3_MOSI    ,USART1_CK           ,UART5_CTS             ,TSC_G2_IO2,DCMI_D10       ,LCD_SEG9                    ,COMP2_OUT                    ,SAI1_SD_B      ,TIM16_BKIN                   ,EVENTOUT,
+PortB,PB6 ,             ,LPTIM1_ETR                ,TIM4_CH1                ,TIM8_BKIN2      ,I2C1_SCL      ,I2C4_SCL       ,DFSDM1_DATIN5,USART1_TX           ,CAN2_TX               ,TSC_G2_IO3,DCMI_D5        ,                            ,TIM8_BKIN2_COMP2             ,SAI1_FS_B      ,TIM16_CH1N                   ,EVENTOUT,
+PortB,PB7 ,             ,LPTIM1_IN2                ,TIM4_CH2                ,TIM8_BKIN       ,I2C1_SDA      ,I2C4_SDA       ,DFSDM1_CKIN5 ,USART1_RX           ,UART4_CTS             ,TSC_G2_IO4,DCMI_VSYNC     ,LCD_SEG21                   ,FMC_NL                       ,TIM8_BKIN_COMP1,TIM17_CH1N                   ,EVENTOUT,
+PortB,PB8 ,             ,                          ,TIM4_CH3                ,                ,I2C1_SCL      ,               ,DFSDM1_DATIN6,                    ,                      ,CAN1_RX   ,DCMI_D6        ,LCD_SEG16                   ,SDMMC1_D4                    ,SAI1_MCLK_A    ,TIM16_CH1                    ,EVENTOUT,
+PortB,PB9 ,             ,IR_OUT                    ,TIM4_CH4                ,                ,I2C1_SDA      ,SPI2_NSS       ,DFSDM1_CKIN6 ,                    ,                      ,CAN1_TX   ,DCMI_D7        ,LCD_COM3                    ,SDMMC1_D5                    ,SAI1_FS_A      ,TIM17_CH1                    ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3                  ,                        ,I2C4_SCL        ,I2C2_SCL      ,SPI2_SCK       ,DFSDM1_DATIN7,USART3_TX           ,LPUART1_RX            ,TSC_SYNC  ,QUADSPI_CLK    ,LCD_SEG10                   ,COMP1_OUT                    ,SAI1_SCK_A     ,                             ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4                  ,                        ,I2C4_SDA        ,I2C2_SDA      ,               ,DFSDM1_CKIN7 ,USART3_RX           ,LPUART1_TX            ,          ,QUADSPI_BK1_NCS,LCD_SEG11                   ,COMP2_OUT                    ,               ,                             ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN                 ,                        ,TIM1_BKIN_COMP2 ,I2C2_SMBA     ,SPI2_NSS       ,DFSDM1_DATIN1,USART3_CK           ,LPUART1_RTS/LPUART1_DE,TSC_G1_IO1,CAN2_RX        ,LCD_SEG12                   ,SWPMI1_IO                    ,SAI2_FS_A      ,TIM15_BKIN                   ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N                 ,                        ,                ,I2C2_SCL      ,SPI2_SCK       ,DFSDM1_CKIN1 ,USART3_CTS          ,LPUART1_CTS           ,TSC_G1_IO2,CAN2_TX        ,LCD_SEG13                   ,SWPMI1_TX                    ,SAI2_SCK_A     ,TIM15_CH1N                   ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N                 ,                        ,TIM8_CH2N       ,I2C2_SDA      ,SPI2_MISO      ,DFSDM1_DATIN2,USART3_RTS/USART3_DE,                      ,TSC_G1_IO3,               ,LCD_SEG14                   ,SWPMI1_RX                    ,SAI2_MCLK_A    ,TIM15_CH1                    ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N                 ,                        ,TIM8_CH3N       ,              ,SPI2_MOSI      ,DFSDM1_CKIN2 ,                    ,                      ,TSC_G1_IO4,               ,LCD_SEG15                   ,SWPMI1_SUSPEND               ,SAI2_SD_A      ,TIM15_CH2                    ,EVENTOUT,
+PortC,PC0 ,             ,LPTIM1_IN1                ,I2C4_SCL                ,                ,I2C3_SCL      ,               ,DFSDM1_DATIN4,                    ,LPUART1_RX            ,          ,               ,LCD_SEG18                   ,                             ,               ,LPTIM2_IN1                   ,EVENTOUT,ADC123_IN1
+PortC,PC1 ,TRACED0      ,LPTIM1_OUT                ,I2C4_SDA                ,SPI2_MOSI       ,I2C3_SDA      ,               ,DFSDM1_CKIN4 ,                    ,LPUART1_TX            ,          ,QUADSPI_BK2_IO0,LCD_SEG19                   ,                             ,SAI1_SD_A      ,                             ,EVENTOUT,ADC123_IN2
+PortC,PC2 ,             ,LPTIM1_IN2                ,                        ,                ,              ,SPI2_MISO      ,DFSDM1_CKOUT ,                    ,                      ,          ,QUADSPI_BK2_IO1,LCD_SEG20                   ,                             ,               ,                             ,EVENTOUT,ADC123_IN3
+PortC,PC3 ,             ,LPTIM1_ETR                ,                        ,                ,              ,SPI2_MOSI      ,             ,                    ,                      ,          ,QUADSPI_BK2_IO2,LCD_VLCD                    ,                             ,SAI1_SD_A      ,LPTIM2_ETR                   ,EVENTOUT,ADC123_IN4
+PortC,PC4 ,             ,                          ,                        ,                ,              ,               ,             ,USART3_TX           ,                      ,          ,QUADSPI_BK2_IO3,LCD_SEG22                   ,                             ,               ,                             ,EVENTOUT,ADC12_IN13
+PortC,PC5 ,             ,                          ,                        ,                ,              ,               ,             ,USART3_RX           ,                      ,          ,               ,LCD_SEG23                   ,                             ,               ,                             ,EVENTOUT,ADC12_IN14
+PortC,PC6 ,             ,                          ,TIM3_CH1                ,TIM8_CH1        ,              ,               ,DFSDM1_CKIN3 ,                    ,                      ,TSC_G4_IO1,DCMI_D0        ,LCD_SEG24                   ,SDMMC1_D6                    ,SAI2_MCLK_A    ,                             ,EVENTOUT,
+PortC,PC7 ,             ,                          ,TIM3_CH2                ,TIM8_CH2        ,              ,               ,DFSDM1_DATIN3,                    ,                      ,TSC_G4_IO2,DCMI_D1        ,LCD_SEG25                   ,SDMMC1_D7                    ,SAI2_MCLK_B    ,                             ,EVENTOUT,
+PortC,PC8 ,             ,                          ,TIM3_CH3                ,TIM8_CH3        ,              ,               ,             ,                    ,                      ,TSC_G4_IO3,DCMI_D2        ,LCD_SEG26                   ,SDMMC1_D0                    ,               ,                             ,EVENTOUT,
+PortC,PC9 ,             ,TIM8_BKIN2                ,TIM3_CH4                ,TIM8_CH4        ,DCMI_D3       ,               ,I2C3_SDA     ,                    ,                      ,TSC_G4_IO4,OTG_FS_NOE     ,LCD_SEG27                   ,SDMMC1_D1                    ,SAI2_EXTCLK    ,TIM8_BKIN2_COMP1             ,EVENTOUT,
+PortC,PC10,TRACED1      ,                          ,                        ,                ,              ,               ,SPI3_SCK     ,USART3_TX           ,UART4_TX              ,TSC_G3_IO2,DCMI_D8        ,LCD_COM4/LCD_SEG28/LCD_SEG40,SDMMC1_D2                    ,SAI2_SCK_B     ,                             ,EVENTOUT,
+PortC,PC11,             ,                          ,                        ,                ,              ,QUADSPI_BK2_NCS,SPI3_MISO    ,USART3_RX           ,UART4_RX              ,TSC_G3_IO3,DCMI_D4        ,LCD_COM5/LCD_SEG29/LCD_SEG41,SDMMC1_D3                    ,SAI2_MCLK_B    ,                             ,EVENTOUT,
+PortC,PC12,TRACED3      ,                          ,                        ,                ,              ,               ,SPI3_MOSI    ,USART3_CK           ,UART5_TX              ,TSC_G3_IO4,DCMI_D9        ,LCD_COM6/LCD_SEG30/LCD_SEG42,SDMMC1_CK                    ,SAI2_SD_B      ,                             ,EVENTOUT,
+PortC,PC13,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortC,PC14,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortC,PC15,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortD,PD0 ,             ,                          ,                        ,                ,              ,SPI2_NSS       ,DFSDM1_DATIN7,                    ,                      ,CAN1_RX   ,               ,                            ,FMC_D2                       ,               ,                             ,EVENTOUT,
+PortD,PD1 ,             ,                          ,                        ,                ,              ,SPI2_SCK       ,DFSDM1_CKIN7 ,                    ,                      ,CAN1_TX   ,               ,                            ,FMC_D3                       ,               ,                             ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                          ,TIM3_ETR                ,                ,              ,               ,             ,USART3_RTS/USART3_DE,UART5_RX              ,TSC_SYNC  ,DCMI_D11       ,LCD_COM7/LCD_SEG31/LCD_SEG43,SDMMC1_CMD                   ,               ,                             ,EVENTOUT,
+PortD,PD3 ,             ,                          ,                        ,SPI2_SCK        ,DCMI_D5       ,SPI2_MISO      ,DFSDM1_DATIN0,USART2_CTS          ,                      ,          ,QUADSPI_BK2_NCS,                            ,FMC_CLK                      ,               ,                             ,EVENTOUT,
+PortD,PD4 ,             ,                          ,                        ,                ,              ,SPI2_MOSI      ,DFSDM1_CKIN0 ,USART2_RTS/USART2_DE,                      ,          ,QUADSPI_BK2_IO0,                            ,FMC_NOE                      ,               ,                             ,EVENTOUT,
+PortD,PD5 ,             ,                          ,                        ,                ,              ,               ,             ,USART2_TX           ,                      ,          ,QUADSPI_BK2_IO1,                            ,FMC_NWE                      ,               ,                             ,EVENTOUT,
+PortD,PD6 ,             ,                          ,                        ,                ,DCMI_D10      ,QUADSPI_BK2_IO1,DFSDM1_DATIN1,USART2_RX           ,                      ,          ,QUADSPI_BK2_IO2,                            ,FMC_NWAIT                    ,SAI1_SD_A      ,                             ,EVENTOUT,
+PortD,PD7 ,             ,                          ,                        ,                ,              ,               ,DFSDM1_CKIN1 ,USART2_CK           ,                      ,          ,QUADSPI_BK2_IO3,                            ,FMC_NE1                      ,               ,                             ,EVENTOUT,
+PortD,PD8 ,             ,                          ,                        ,                ,              ,               ,             ,USART3_TX           ,                      ,          ,DCMI_HSYNC     ,LCD_SEG28                   ,FMC_D13                      ,               ,                             ,EVENTOUT,
+PortD,PD9 ,             ,                          ,                        ,                ,              ,               ,             ,USART3_RX           ,                      ,          ,DCMI_PIXCLK    ,LCD_SEG29                   ,FMC_D14                      ,SAI2_MCLK_A    ,                             ,EVENTOUT,
+PortD,PD10,             ,                          ,                        ,                ,              ,               ,             ,USART3_CK           ,                      ,TSC_G6_IO1,               ,LCD_SEG30                   ,FMC_D15                      ,SAI2_SCK_A     ,                             ,EVENTOUT,
+PortD,PD11,             ,                          ,                        ,                ,I2C4_SMBA     ,               ,             ,USART3_CTS          ,                      ,TSC_G6_IO2,               ,LCD_SEG31                   ,FMC_A16                      ,SAI2_SD_A      ,LPTIM2_ETR                   ,EVENTOUT,
+PortD,PD12,             ,                          ,TIM4_CH1                ,                ,I2C4_SCL      ,               ,             ,USART3_RTS/USART3_DE,                      ,TSC_G6_IO3,               ,LCD_SEG32                   ,FMC_A17                      ,SAI2_FS_A      ,LPTIM2_IN1                   ,EVENTOUT,
+PortD,PD13,             ,                          ,TIM4_CH2                ,                ,I2C4_SDA      ,               ,             ,                    ,                      ,TSC_G6_IO4,               ,LCD_SEG33                   ,FMC_A18                      ,               ,LPTIM2_OUT                   ,EVENTOUT,
+PortD,PD14,             ,                          ,TIM4_CH3                ,                ,              ,               ,             ,                    ,                      ,          ,               ,LCD_SEG34                   ,FMC_D0                       ,               ,                             ,EVENTOUT,
+PortD,PD15,             ,                          ,TIM4_CH4                ,                ,              ,               ,             ,                    ,                      ,          ,               ,LCD_SEG35                   ,FMC_D1                       ,               ,                             ,EVENTOUT,
+PortE,PE0 ,             ,                          ,TIM4_ETR                ,                ,              ,               ,             ,                    ,                      ,          ,DCMI_D2        ,LCD_SEG36                   ,FMC_NBL0                     ,               ,TIM16_CH1                    ,EVENTOUT,
+PortE,PE1 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,DCMI_D3        ,LCD_SEG37                   ,FMC_NBL1                     ,               ,TIM17_CH1                    ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                          ,TIM3_ETR                ,                ,              ,               ,             ,                    ,                      ,TSC_G7_IO1,               ,LCD_SEG38                   ,FMC_A23                      ,SAI1_MCLK_A    ,                             ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                          ,TIM3_CH1                ,                ,              ,               ,             ,                    ,                      ,TSC_G7_IO2,               ,LCD_SEG39                   ,FMC_A19                      ,SAI1_SD_B      ,                             ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                          ,TIM3_CH2                ,                ,              ,               ,DFSDM1_DATIN3,                    ,                      ,TSC_G7_IO3,DCMI_D4        ,                            ,FMC_A20                      ,SAI1_FS_A      ,                             ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                          ,TIM3_CH3                ,                ,              ,               ,DFSDM1_CKIN3 ,                    ,                      ,TSC_G7_IO4,DCMI_D6        ,                            ,FMC_A21                      ,SAI1_SCK_A     ,                             ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                          ,TIM3_CH4                ,                ,              ,               ,             ,                    ,                      ,          ,DCMI_D7        ,                            ,FMC_A22                      ,SAI1_SD_A      ,                             ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR                  ,                        ,                ,              ,               ,DFSDM1_DATIN2,                    ,                      ,          ,               ,                            ,FMC_D4                       ,SAI1_SD_B      ,                             ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N                 ,                        ,                ,              ,               ,DFSDM1_CKIN2 ,                    ,                      ,          ,               ,                            ,FMC_D5                       ,SAI1_SCK_B     ,                             ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1                  ,                        ,                ,              ,               ,DFSDM1_CKOUT ,                    ,                      ,          ,               ,                            ,FMC_D6                       ,SAI1_FS_B      ,                             ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N                 ,                        ,                ,              ,               ,DFSDM1_DATIN4,                    ,                      ,TSC_G5_IO1,QUADSPI_CLK    ,                            ,FMC_D7                       ,SAI1_MCLK_B    ,                             ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2                  ,                        ,                ,              ,               ,DFSDM1_CKIN4 ,                    ,                      ,TSC_G5_IO2,QUADSPI_BK1_NCS,                            ,FMC_D8                       ,               ,                             ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N                 ,                        ,                ,              ,SPI1_NSS       ,DFSDM1_DATIN5,                    ,                      ,TSC_G5_IO3,QUADSPI_BK1_IO0,                            ,FMC_D9                       ,               ,                             ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3                  ,                        ,                ,              ,SPI1_SCK       ,DFSDM1_CKIN5 ,                    ,                      ,TSC_G5_IO4,QUADSPI_BK1_IO1,                            ,FMC_D10                      ,               ,                             ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4                  ,TIM1_BKIN2              ,TIM1_BKIN2_COMP2,              ,SPI1_MISO      ,             ,                    ,                      ,          ,QUADSPI_BK1_IO2,                            ,FMC_D11                      ,               ,                             ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN                 ,                        ,TIM1_BKIN_COMP1 ,              ,SPI1_MOSI      ,             ,                    ,                      ,          ,QUADSPI_BK1_IO3,                            ,FMC_D12                      ,               ,                             ,EVENTOUT,
+PortF,PF0 ,             ,                          ,                        ,                ,I2C2_SDA      ,               ,             ,                    ,                      ,          ,               ,                            ,FMC_A0                       ,               ,                             ,EVENTOUT,
+PortF,PF1 ,             ,                          ,                        ,                ,I2C2_SCL      ,               ,             ,                    ,                      ,          ,               ,                            ,FMC_A1                       ,               ,                             ,EVENTOUT,
+PortF,PF2 ,             ,                          ,                        ,                ,I2C2_SMBA     ,               ,             ,                    ,                      ,          ,               ,                            ,FMC_A2                       ,               ,                             ,EVENTOUT,
+PortF,PF3 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,FMC_A3                       ,               ,                             ,EVENTOUT,ADC3_IN6
+PortF,PF4 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,FMC_A4                       ,               ,                             ,EVENTOUT,ADC3_IN7
+PortF,PF5 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,FMC_A5                       ,               ,                             ,EVENTOUT,ADC3_IN8
+PortF,PF6 ,             ,TIM5_ETR                  ,TIM5_CH1                ,                ,              ,               ,             ,                    ,                      ,          ,QUADSPI_BK1_IO3,                            ,                             ,SAI1_SD_B      ,                             ,EVENTOUT,ADC3_IN9
+PortF,PF7 ,             ,                          ,TIM5_CH2                ,                ,              ,               ,             ,                    ,                      ,          ,QUADSPI_BK1_IO2,                            ,                             ,SAI1_MCLK_B    ,                             ,EVENTOUT,ADC3_IN10
+PortF,PF8 ,             ,                          ,TIM5_CH3                ,                ,              ,               ,             ,                    ,                      ,          ,QUADSPI_BK1_IO0,                            ,                             ,SAI1_SCK_B     ,                             ,EVENTOUT,ADC3_IN11
+PortF,PF9 ,             ,                          ,TIM5_CH4                ,                ,              ,               ,             ,                    ,                      ,          ,QUADSPI_BK1_IO1,                            ,                             ,SAI1_FS_B      ,TIM15_CH1                    ,EVENTOUT,ADC3_IN12
+PortF,PF10,             ,                          ,                        ,QUADSPI_CLK     ,              ,               ,             ,                    ,                      ,          ,DCMI_D11       ,                            ,                             ,               ,TIM15_CH2                    ,EVENTOUT,ADC3_IN13
+PortF,PF11,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,DCMI_D12       ,                            ,                             ,               ,                             ,EVENTOUT,
+PortF,PF12,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,FMC_A6                       ,               ,                             ,EVENTOUT,
+PortF,PF13,             ,                          ,                        ,                ,I2C4_SMBA     ,               ,DFSDM1_DATIN6,                    ,                      ,          ,               ,                            ,FMC_A7                       ,               ,                             ,EVENTOUT,
+PortF,PF14,             ,                          ,                        ,                ,I2C4_SCL      ,               ,DFSDM1_CKIN6 ,                    ,                      ,TSC_G8_IO1,               ,                            ,FMC_A8                       ,               ,                             ,EVENTOUT,
+PortF,PF15,             ,                          ,                        ,                ,I2C4_SDA      ,               ,             ,                    ,                      ,TSC_G8_IO2,               ,                            ,FMC_A9                       ,               ,                             ,EVENTOUT,
+PortG,PG0 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,TSC_G8_IO3,               ,                            ,FMC_A10                      ,               ,                             ,EVENTOUT,
+PortG,PG1 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,TSC_G8_IO4,               ,                            ,FMC_A11                      ,               ,                             ,EVENTOUT,
+PortG,PG2 ,             ,                          ,                        ,                ,              ,SPI1_SCK       ,             ,                    ,                      ,          ,               ,                            ,FMC_A12                      ,SAI2_SCK_B     ,                             ,EVENTOUT,
+PortG,PG3 ,             ,                          ,                        ,                ,              ,SPI1_MISO      ,             ,                    ,                      ,          ,               ,                            ,FMC_A13                      ,SAI2_FS_B      ,                             ,EVENTOUT,
+PortG,PG4 ,             ,                          ,                        ,                ,              ,SPI1_MOSI      ,             ,                    ,                      ,          ,               ,                            ,FMC_A14                      ,SAI2_MCLK_B    ,                             ,EVENTOUT,
+PortG,PG5 ,             ,                          ,                        ,                ,              ,SPI1_NSS       ,             ,                    ,LPUART1_CTS           ,          ,               ,                            ,FMC_A15                      ,SAI2_SD_B      ,                             ,EVENTOUT,
+PortG,PG6 ,             ,                          ,                        ,                ,I2C3_SMBA     ,               ,             ,                    ,LPUART1_RTS/LPUART1_DE,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortG,PG7 ,             ,                          ,                        ,                ,I2C3_SCL      ,               ,             ,                    ,LPUART1_TX            ,          ,               ,                            ,FMC_INT                      ,SAI1_MCLK_A    ,                             ,EVENTOUT,
+PortG,PG8 ,             ,                          ,                        ,                ,I2C3_SDA      ,               ,             ,                    ,LPUART1_RX            ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortG,PG9 ,             ,                          ,                        ,                ,              ,               ,SPI3_SCK     ,USART1_TX           ,                      ,          ,               ,                            ,FMC_NCE/FMC_NE2              ,SAI2_SCK_A     ,TIM15_CH1N                   ,EVENTOUT,
+PortG,PG10,             ,LPTIM1_IN1                ,                        ,                ,              ,               ,SPI3_MISO    ,USART1_RX           ,                      ,          ,               ,                            ,FMC_NE3                      ,SAI2_FS_A      ,TIM15_CH1                    ,EVENTOUT,
+PortG,PG11,             ,LPTIM1_IN2                ,                        ,                ,              ,               ,SPI3_MOSI    ,USART1_CTS          ,                      ,          ,               ,                            ,                             ,SAI2_MCLK_A    ,TIM15_CH2                    ,EVENTOUT,
+PortG,PG12,             ,LPTIM1_ETR                ,                        ,                ,              ,               ,SPI3_NSS     ,USART1_RTS/USART1_DE,                      ,          ,               ,                            ,FMC_NE4                      ,SAI2_SD_A      ,                             ,EVENTOUT,
+PortG,PG13,             ,                          ,                        ,                ,I2C1_SDA      ,               ,             ,USART1_CK           ,                      ,          ,               ,                            ,FMC_A24                      ,               ,                             ,EVENTOUT,
+PortG,PG14,             ,                          ,                        ,                ,I2C1_SCL      ,               ,             ,                    ,                      ,          ,               ,                            ,FMC_A25                      ,               ,                             ,EVENTOUT,
+PortG,PG15,             ,LPTIM1_OUT                ,                        ,                ,I2C1_SMBA     ,               ,             ,                    ,                      ,          ,DCMI_D13       ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH0 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH1 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH2 ,             ,                          ,                        ,QUADSPI_BK2_IO0 ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH3 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH4 ,             ,                          ,                        ,                ,I2C2_SCL      ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH5 ,             ,                          ,                        ,                ,I2C2_SDA      ,               ,             ,                    ,                      ,          ,DCMI_PIXCLK    ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH6 ,             ,                          ,                        ,                ,I2C2_SMBA     ,               ,             ,                    ,                      ,          ,DCMI_D8        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH7 ,             ,                          ,                        ,                ,I2C3_SCL      ,               ,             ,                    ,                      ,          ,DCMI_D9        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH8 ,             ,                          ,                        ,                ,I2C3_SDA      ,               ,             ,                    ,                      ,          ,DCMI_HSYNC     ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH9 ,             ,                          ,                        ,                ,I2C3_SMBA     ,               ,             ,                    ,                      ,          ,DCMI_D0        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH10,             ,                          ,TIM5_CH1                ,                ,              ,               ,             ,                    ,                      ,          ,DCMI_D1        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH11,             ,                          ,TIM5_CH2                ,                ,              ,               ,             ,                    ,                      ,          ,DCMI_D2        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH12,             ,                          ,TIM5_CH3                ,                ,              ,               ,             ,                    ,                      ,          ,DCMI_D3        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH13,             ,                          ,                        ,TIM8_CH1N       ,              ,               ,             ,                    ,                      ,CAN1_TX   ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH14,             ,                          ,                        ,TIM8_CH2N       ,              ,               ,             ,                    ,                      ,          ,DCMI_D4        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortH,PH15,             ,                          ,                        ,TIM8_CH3N       ,              ,               ,             ,                    ,                      ,          ,DCMI_D11       ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI0 ,             ,                          ,TIM5_CH4                ,                ,              ,SPI2_NSS       ,             ,                    ,                      ,          ,DCMI_D13       ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI1 ,             ,                          ,                        ,                ,              ,SPI2_SCK       ,             ,                    ,                      ,          ,DCMI_D8        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI2 ,             ,                          ,                        ,TIM8_CH4        ,              ,SPI2_MISO      ,             ,                    ,                      ,          ,DCMI_D9        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI3 ,             ,                          ,                        ,TIM8_ETR        ,              ,SPI2_MOSI      ,             ,                    ,                      ,          ,DCMI_D10       ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI4 ,             ,                          ,                        ,TIM8_BKIN       ,              ,               ,             ,                    ,                      ,          ,DCMI_D5        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI5 ,             ,                          ,                        ,TIM8_CH1        ,              ,               ,             ,                    ,                      ,          ,DCMI_VSYNC     ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI6 ,             ,                          ,                        ,TIM8_CH2        ,              ,               ,             ,                    ,                      ,          ,DCMI_D6        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI7 ,             ,                          ,                        ,TIM8_CH3        ,              ,               ,             ,                    ,                      ,          ,DCMI_D7        ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI8 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,DCMI_D12       ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI9 ,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,CAN1_RX   ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI10,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
+PortI,PI11,             ,                          ,                        ,                ,              ,               ,             ,                    ,                      ,          ,               ,                            ,                             ,               ,                             ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32wb55_af.csv b/ports/stm32/boards/stm32wb55_af.csv
index d6e1c3f773..3d319b03cf 100644
--- a/ports/stm32/boards/stm32wb55_af.csv
+++ b/ports/stm32/boards/stm32wb55_af.csv
@@ -1,74 +1,74 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS_AF,TIM1/TIM2/LPTIM1,TIM1/TIM2,SPI2/SAI1/TIM1,I2C1/I2C3,SPI1/SPI2,RF,USART1,LPUART1,TSC,USB/QUADSPI,LCD,COMP1/COMP2/TIM1,SAI1,TIM2/TIM16/TIM17/LPTIM2,EVENTOUT,ADC
-PortA,PA0,,TIM2_CH1,,,,,,,,,,,COMP1_OUT,SAI1_EXTCLK,TIM2_ETR,EVENTOUT,ADC1_IN5
-PortA,PA1,,TIM2_CH2,,,I2C1_SMBA,SPI1_SCK,,,,,,LCD_SEG0,,,,EVENTOUT,ADC1_IN6
-PortA,PA2,LSCO,TIM2_CH3,,,,,,,LPUART1_TX,,QUADSPI_BK1_NCS,LCD_SEG1,COMP2_OUT,,,EVENTOUT,ADC1_IN7
-PortA,PA3,,TIM2_CH4,,SAI1_PDM_CK1,,,,,LPUART1_RX,,QUADSPI_CLK,LCD_SEG2,,SAI1_MCLK_A,,EVENTOUT,ADC1_IN8
-PortA,PA4,,,,,,SPI1_NSS,,,,,,LCD_SEG5,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT,ADC1_IN9
-PortA,PA5,,TIM2_CH1,TIM2_ETR,,,SPI1_SCK,,,,,,,,SAI1_SD_B,LPTIM2_ETR,EVENTOUT,ADC1_IN10
-PortA,PA6,,TIM1_BKIN,,,,SPI1_MISO,,,LPUART1_CTS,,QUADSPI_BK1_IO3,LCD_SEG3,TIM1_BKIN,,TIM16_CH1,EVENTOUT,ADC1_IN11
-PortA,PA7,,TIM1_CH1N,,,I2C3_SCL,SPI1_MOSI,,,,,QUADSPI_BK1_IO2,LCD_SEG4,COMP2_OUT,,TIM17_CH1,EVENTOUT,ADC1_IN12
-PortA,PA8,MCO,TIM1_CH1,,SAI1_PDM_CK2,,,,USART1_CK,,,,LCD_COM0,,SAI1_SCK_A,LPTIM2_OUT,EVENTOUT,ADC1_IN15
-PortA,PA9,,TIM1_CH2,,SAI1_PDM_DI2,I2C1_SCL,SPI2_SCK,,USART1_TX,,,,LCD_COM1,,SAI1_FS_A,,EVENTOUT,ADC1_IN16
-PortA,PA10,,TIM1_CH3,,SAI1_PDM_DI1,I2C1_SDA,,,USART1_RX,,,USB_CRS_SYNC,LCD_COM2,,SAI1_SD_A,TIM17_BKIN,EVENTOUT,
-PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,SPI1_MISO,,USART1_CTS,,,USB_DM,,TIM1_BKIN2,,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,,,SPI1_MOSI,,USART1_RTS/USART1_DE,LPUART1_RX,,USB_DP,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,,,,,IR_OUT,,USB_NOE,,,SAI1_SD_B,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,LPTIM1_OUT,,,I2C1_SMBA,,,,,,,LCD_SEG5,,SAI1_FS_B,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,,,SPI1_NSS,,,,TSC_G3_IO1,,LCD_SEG17,,,,EVENTOUT,
-PortB,PB0,,,,,,,EXT_PA_TX,,,,,,COMP1_OUT,,,EVENTOUT,
-PortB,PB1,,,,,,,,,LPUART1_RTS/LPUART1_DE,,,,,,LPTIM2_IN1,EVENTOUT,
-PortB,PB2,RTC_OUT,LPTIM1_OUT,,,I2C3_SMBA,SPI1_NSS,,,,,,LCD_VLCD,,SAI1_EXTCLK,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,,USART1_RTS/USART1_DE,,,,LCD_SEG7,,SAI1_SCK_B,,EVENTOUT,
-PortB,PB4,NJTRST,,,,I2C3_SDA,SPI1_MISO,,USART1_CTS,,TSC_G2_IO1,,LCD_SEG8,,SAI1_MCLK_B,TIM17_BKIN,EVENTOUT,
-PortB,PB5,,LPTIM1_IN1,,,I2C1_SMBA,SPI1_MOSI,,USART1_CK,LPUART1_TX,TSC_G2_IO2,,LCD_SEG9,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT,
-PortB,PB6,MCO,LPTIM1_ETR,,,I2C1_SCL,,,USART1_TX,,TSC_G2_IO3,,LCD_SEG6,,SAI1_FS_B,TIM16_CH1N,EVENTOUT,
-PortB,PB7,,LPTIM1_IN2,,TIM1_BKIN,I2C1_SDA,,,USART1_RX,,TSC_G2_IO4,,LCD_SEG21,,,TIM17_CH1N,EVENTOUT,
-PortB,PB8,,TIM1_CH2N,,SAI1_PDM_CK1,I2C1_SCL,,,,,,QUADSPI_BK1_IO1,LCD_SEG16,,SAI1_MCLK_A,TIM16_CH1,EVENTOUT,
-PortB,PB9,,TIM1_CH3N,,SAI1_PDM_DI2,I2C1_SDA,SPI2_NSS,,,IR_OUT,TSC_G7_IO4,QUADSPI_BK1_IO0,LCD_COM3,,SAI1_FS_A,TIM17_CH1,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C3_SCL,SPI2_SCK,,,LPUART1_RX,TSC_SYNC,QUADSPI_CLK,LCD_SEG10,COMP1_OUT,SAI1_SCK_A,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C3_SDA,,,,LPUART1_TX,,QUADSPI_BK1_NCS,LCD_SEG11,COMP2_OUT,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,TIM1_BKIN,I2C3_SMBA,SPI2_NSS,,,LPUART1_RTS,TSC_G1_IO1,,LCD_SEG12,,SAI1_FS_A,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,I2C3_SCL,SPI2_SCK,,,LPUART1_CTS,TSC_G1_IO2,,LCD_SEG13,,SAI1_SCK_A,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,,I2C3_SDA,SPI2_MISO,,,,TSC_G1_IO3,,LCD_SEG14,,SAI1_MCLK_A,,EVENTOUT,
-PortB,PB15,RTC_REFIN,TIM1_CH3N,,,,SPI2_MOSI,,,,TSC_G1_IO4,,LCD_SEG15,,SAI1_SD_A,,EVENTOUT,
-PortC,PC0,,LPTIM1_IN1,,,I2C3_SCL,,,,LPUART1_RX,,,LCD_SEG18,,,LPTIM2_IN1,EVENTOUT,ADC1_IN1
-PortC,PC1,,LPTIM1_OUT,,SPI2_MOSI,I2C3_SDA,,,,LPUART1_TX,,,LCD_SEG19,,,,EVENTOUT,ADC1_IN2
-PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,,,,,,LCD_SEG20,,,,EVENTOUT,ADC1_IN3
-PortC,PC3,,LPTIM1_ETR,,SAI1_PDM_DI1,,SPI2_MOSI,,,,,,LCD_VLCD,,SAI1_SD_A,LPTIM2_ETR,EVENTOUT,ADC1_IN4
-PortC,PC4,,,,,,,,,,,,LCD_SEG22,,,,EVENTOUT,ADC1_IN13
-PortC,PC5,,,,SAI1_PDM_DI3,,,,,,,,LCD_SEG23,,,,EVENTOUT,ADC1_IN14
-PortC,PC6,,,,,,,,,,TSC_G4_IO1,,LCD_SEG24,,,,EVENTOUT,
-PortC,PC7,,,,,,,,,,TSC_G4_IO2,,LCD_SEG25,,,,EVENTOUT,
-PortC,PC8,,,,,,,,,,TSC_G4_IO3,,LCD_SEG26,,,,EVENTOUT,
-PortC,PC9,,,,TIM1_BKIN,,,,,,TSC_G4_IO4,USB_NOE,LCD_SEG27,,SAI1_SCK_B,,EVENTOUT,
-PortC,PC10,TRACED1,,,,,,,,,TSC_G3_IO2,,LCD_COM4LCD_SEG28LCD_SEG40,,,,EVENTOUT,
-PortC,PC11,,,,,,,,,,TSC_G3_IO3,,LCD_COM5LCD_SEG29LCD_SEG41,,,,EVENTOUT,
-PortC,PC12,TRACED3,,,,,,,,,TSC_G3_IO4,,LCD_COM6LCD_SEG30LCD_SEG42,,,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortD,PD0,,,,,,SPI2_NSS,,,,,,,,,,EVENTOUT,
-PortD,PD1,,,,,,SPI2_SCK,,,,,,,,,,EVENTOUT,
-PortD,PD2,TRACED2,,,,,,,,,TSC_SYNC,,LCD_COM7LCD_SEG31LCD_SEG43,,,,EVENTOUT,
-PortD,PD3,,,,SPI2_SCK,,SPI2_MISO,,,,,QUADSPI_BK1_NCS,,,,,EVENTOUT,
-PortD,PD4,,,,,,SPI2_MOSI,,,,TSC_G5_IO1,QUADSPI_BK1_IO0,,,,,EVENTOUT,
-PortD,PD5,,,,,,,,,,TSC_G5_IO2,QUADSPI_BK1_IO1,,,SAI1_MCLK_B,,EVENTOUT,
-PortD,PD6,,,,SAI1_PDM_DI1,,,,,,TSC_G5_IO3,QUADSPI_BK1_IO2,,,SAI1_SD_A,,EVENTOUT,
-PortD,PD7,,,,,,,,,,TSC_G5_IO4,QUADSPI_BK1_IO3,LCD_SEG39,,,,EVENTOUT,
-PortD,PD8,,,TIM1_BKIN2,,,,,,,,,LCD_SEG28,,,,EVENTOUT,
-PortD,PD9,TRACED0,,,,,,,,,,,LCD_SEG29,,,,EVENTOUT,
-PortD,PD10,TRIG_INOUT,,,,,,,,,TSC_G6_IO1,,LCD_SEG30,,,,EVENTOUT,
-PortD,PD11,,,,,,,,,,TSC_G6_IO2,,LCD_SEG31,,,LPTIM2_ETR,EVENTOUT,
-PortD,PD12,,,,,,,,,,TSC_G6_IO3,,LCD_SEG32,,,LPTIM2_IN1,EVENTOUT,
-PortD,PD13,,,,,,,,,,TSC_G6_IO4,,LCD_SEG33,,,LPTIM2_OUT,EVENTOUT,
-PortD,PD14,,TIM1_CH1,,,,,,,,,,LCD_SEG34,,,,EVENTOUT,
-PortD,PD15,,TIM1_CH2,,,,,,,,,,LCD_SEG35,,,,EVENTOUT,
-PortE,PE0,,TIM1_ETR,,,,,,,,TSC_G7_IO3,,LCD_SEG36,,,TIM16_CH1,EVENTOUT,
-PortE,PE1,,,,,,,,,,TSC_G7_IO2,,LCD_SEG37,,,TIM17_CH1,EVENTOUT,
-PortE,PE2,TRACECK,,,SAI1_PDM_CK1,,,,,,TSC_G7_IO1,,LCD_SEG38,,SAI1_MCLK_A,,EVENTOUT,
-PortE,PE3,,,,,,,,,,,,,,,,EVENTOUT,
-PortE,PE4,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH3,LSCO,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1             ,AF2       ,AF3           ,AF4      ,AF5      ,AF6      ,AF7                 ,AF8                   ,AF9       ,AF10           ,AF11                      ,AF12            ,AF13       ,AF14                   ,AF15    ,ADC
+     ,    ,SYS_AF       ,TIM1/TIM2/LPTIM1,TIM1/TIM2 ,SPI2/SAI1/TIM1,I2C1/I2C3,SPI1/SPI2,RF       ,USART1              ,LPUART1               ,TSC       ,USB/QUADSPI    ,LCD                       ,COMP1/COMP2/TIM1,SAI1       ,TIM2/TIM16/TIM17/LPTIM2,EVENTOUT,ADC
+PortA,PA0 ,             ,TIM2_CH1        ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,COMP1_OUT       ,SAI1_EXTCLK,TIM2_ETR               ,EVENTOUT,ADC1_IN5
+PortA,PA1 ,             ,TIM2_CH2        ,          ,              ,I2C1_SMBA,SPI1_SCK ,         ,                    ,                      ,          ,               ,LCD_SEG0                  ,                ,           ,                       ,EVENTOUT,ADC1_IN6
+PortA,PA2 ,LSCO         ,TIM2_CH3        ,          ,              ,         ,         ,         ,                    ,LPUART1_TX            ,          ,QUADSPI_BK1_NCS,LCD_SEG1                  ,COMP2_OUT       ,           ,                       ,EVENTOUT,ADC1_IN7
+PortA,PA3 ,             ,TIM2_CH4        ,          ,SAI1_PDM_CK1  ,         ,         ,         ,                    ,LPUART1_RX            ,          ,QUADSPI_CLK    ,LCD_SEG2                  ,                ,SAI1_MCLK_A,                       ,EVENTOUT,ADC1_IN8
+PortA,PA4 ,             ,                ,          ,              ,         ,SPI1_NSS ,         ,                    ,                      ,          ,               ,LCD_SEG5                  ,                ,SAI1_FS_B  ,LPTIM2_OUT             ,EVENTOUT,ADC1_IN9
+PortA,PA5 ,             ,TIM2_CH1        ,TIM2_ETR  ,              ,         ,SPI1_SCK ,         ,                    ,                      ,          ,               ,                          ,                ,SAI1_SD_B  ,LPTIM2_ETR             ,EVENTOUT,ADC1_IN10
+PortA,PA6 ,             ,TIM1_BKIN       ,          ,              ,         ,SPI1_MISO,         ,                    ,LPUART1_CTS           ,          ,QUADSPI_BK1_IO3,LCD_SEG3                  ,TIM1_BKIN       ,           ,TIM16_CH1              ,EVENTOUT,ADC1_IN11
+PortA,PA7 ,             ,TIM1_CH1N       ,          ,              ,I2C3_SCL ,SPI1_MOSI,         ,                    ,                      ,          ,QUADSPI_BK1_IO2,LCD_SEG4                  ,COMP2_OUT       ,           ,TIM17_CH1              ,EVENTOUT,ADC1_IN12
+PortA,PA8 ,MCO          ,TIM1_CH1        ,          ,SAI1_PDM_CK2  ,         ,         ,         ,USART1_CK           ,                      ,          ,               ,LCD_COM0                  ,                ,SAI1_SCK_A ,LPTIM2_OUT             ,EVENTOUT,ADC1_IN15
+PortA,PA9 ,             ,TIM1_CH2        ,          ,SAI1_PDM_DI2  ,I2C1_SCL ,SPI2_SCK ,         ,USART1_TX           ,                      ,          ,               ,LCD_COM1                  ,                ,SAI1_FS_A  ,                       ,EVENTOUT,ADC1_IN16
+PortA,PA10,             ,TIM1_CH3        ,          ,SAI1_PDM_DI1  ,I2C1_SDA ,         ,         ,USART1_RX           ,                      ,          ,USB_CRS_SYNC   ,LCD_COM2                  ,                ,SAI1_SD_A  ,TIM17_BKIN             ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4        ,TIM1_BKIN2,              ,         ,SPI1_MISO,         ,USART1_CTS          ,                      ,          ,USB_DM         ,                          ,TIM1_BKIN2      ,           ,                       ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR        ,          ,              ,         ,SPI1_MOSI,         ,USART1_RTS/USART1_DE,LPUART1_RX            ,          ,USB_DP         ,                          ,                ,           ,                       ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                ,          ,              ,         ,         ,         ,                    ,IR_OUT                ,          ,USB_NOE        ,                          ,                ,SAI1_SD_B  ,                       ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,LPTIM1_OUT      ,          ,              ,I2C1_SMBA,         ,         ,                    ,                      ,          ,               ,LCD_SEG5                  ,                ,SAI1_FS_B  ,                       ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1        ,TIM2_ETR  ,              ,         ,SPI1_NSS ,         ,                    ,                      ,TSC_G3_IO1,               ,LCD_SEG17                 ,                ,           ,                       ,EVENTOUT,
+PortB,PB0 ,             ,                ,          ,              ,         ,         ,EXT_PA_TX,                    ,                      ,          ,               ,                          ,COMP1_OUT       ,           ,                       ,EVENTOUT,
+PortB,PB1 ,             ,                ,          ,              ,         ,         ,         ,                    ,LPUART1_RTS/LPUART1_DE,          ,               ,                          ,                ,           ,LPTIM2_IN1             ,EVENTOUT,
+PortB,PB2 ,RTC_OUT      ,LPTIM1_OUT      ,          ,              ,I2C3_SMBA,SPI1_NSS ,         ,                    ,                      ,          ,               ,LCD_VLCD                  ,                ,SAI1_EXTCLK,                       ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2        ,          ,              ,         ,SPI1_SCK ,         ,USART1_RTS/USART1_DE,                      ,          ,               ,LCD_SEG7                  ,                ,SAI1_SCK_B ,                       ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                ,          ,              ,I2C3_SDA ,SPI1_MISO,         ,USART1_CTS          ,                      ,TSC_G2_IO1,               ,LCD_SEG8                  ,                ,SAI1_MCLK_B,TIM17_BKIN             ,EVENTOUT,
+PortB,PB5 ,             ,LPTIM1_IN1      ,          ,              ,I2C1_SMBA,SPI1_MOSI,         ,USART1_CK           ,LPUART1_TX            ,TSC_G2_IO2,               ,LCD_SEG9                  ,COMP2_OUT       ,SAI1_SD_B  ,TIM16_BKIN             ,EVENTOUT,
+PortB,PB6 ,MCO          ,LPTIM1_ETR      ,          ,              ,I2C1_SCL ,         ,         ,USART1_TX           ,                      ,TSC_G2_IO3,               ,LCD_SEG6                  ,                ,SAI1_FS_B  ,TIM16_CH1N             ,EVENTOUT,
+PortB,PB7 ,             ,LPTIM1_IN2      ,          ,TIM1_BKIN     ,I2C1_SDA ,         ,         ,USART1_RX           ,                      ,TSC_G2_IO4,               ,LCD_SEG21                 ,                ,           ,TIM17_CH1N             ,EVENTOUT,
+PortB,PB8 ,             ,TIM1_CH2N       ,          ,SAI1_PDM_CK1  ,I2C1_SCL ,         ,         ,                    ,                      ,          ,QUADSPI_BK1_IO1,LCD_SEG16                 ,                ,SAI1_MCLK_A,TIM16_CH1              ,EVENTOUT,
+PortB,PB9 ,             ,TIM1_CH3N       ,          ,SAI1_PDM_DI2  ,I2C1_SDA ,SPI2_NSS ,         ,                    ,IR_OUT                ,TSC_G7_IO4,QUADSPI_BK1_IO0,LCD_COM3                  ,                ,SAI1_FS_A  ,TIM17_CH1              ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3        ,          ,              ,I2C3_SCL ,SPI2_SCK ,         ,                    ,LPUART1_RX            ,TSC_SYNC  ,QUADSPI_CLK    ,LCD_SEG10                 ,COMP1_OUT       ,SAI1_SCK_A ,                       ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4        ,          ,              ,I2C3_SDA ,         ,         ,                    ,LPUART1_TX            ,          ,QUADSPI_BK1_NCS,LCD_SEG11                 ,COMP2_OUT       ,           ,                       ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN       ,          ,TIM1_BKIN     ,I2C3_SMBA,SPI2_NSS ,         ,                    ,LPUART1_RTS           ,TSC_G1_IO1,               ,LCD_SEG12                 ,                ,SAI1_FS_A  ,                       ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N       ,          ,              ,I2C3_SCL ,SPI2_SCK ,         ,                    ,LPUART1_CTS           ,TSC_G1_IO2,               ,LCD_SEG13                 ,                ,SAI1_SCK_A ,                       ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N       ,          ,              ,I2C3_SDA ,SPI2_MISO,         ,                    ,                      ,TSC_G1_IO3,               ,LCD_SEG14                 ,                ,SAI1_MCLK_A,                       ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N       ,          ,              ,         ,SPI2_MOSI,         ,                    ,                      ,TSC_G1_IO4,               ,LCD_SEG15                 ,                ,SAI1_SD_A  ,                       ,EVENTOUT,
+PortC,PC0 ,             ,LPTIM1_IN1      ,          ,              ,I2C3_SCL ,         ,         ,                    ,LPUART1_RX            ,          ,               ,LCD_SEG18                 ,                ,           ,LPTIM2_IN1             ,EVENTOUT,ADC1_IN1
+PortC,PC1 ,             ,LPTIM1_OUT      ,          ,SPI2_MOSI     ,I2C3_SDA ,         ,         ,                    ,LPUART1_TX            ,          ,               ,LCD_SEG19                 ,                ,           ,                       ,EVENTOUT,ADC1_IN2
+PortC,PC2 ,             ,LPTIM1_IN2      ,          ,              ,         ,SPI2_MISO,         ,                    ,                      ,          ,               ,LCD_SEG20                 ,                ,           ,                       ,EVENTOUT,ADC1_IN3
+PortC,PC3 ,             ,LPTIM1_ETR      ,          ,SAI1_PDM_DI1  ,         ,SPI2_MOSI,         ,                    ,                      ,          ,               ,LCD_VLCD                  ,                ,SAI1_SD_A  ,LPTIM2_ETR             ,EVENTOUT,ADC1_IN4
+PortC,PC4 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,LCD_SEG22                 ,                ,           ,                       ,EVENTOUT,ADC1_IN13
+PortC,PC5 ,             ,                ,          ,SAI1_PDM_DI3  ,         ,         ,         ,                    ,                      ,          ,               ,LCD_SEG23                 ,                ,           ,                       ,EVENTOUT,ADC1_IN14
+PortC,PC6 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G4_IO1,               ,LCD_SEG24                 ,                ,           ,                       ,EVENTOUT,
+PortC,PC7 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G4_IO2,               ,LCD_SEG25                 ,                ,           ,                       ,EVENTOUT,
+PortC,PC8 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G4_IO3,               ,LCD_SEG26                 ,                ,           ,                       ,EVENTOUT,
+PortC,PC9 ,             ,                ,          ,TIM1_BKIN     ,         ,         ,         ,                    ,                      ,TSC_G4_IO4,USB_NOE        ,LCD_SEG27                 ,                ,SAI1_SCK_B ,                       ,EVENTOUT,
+PortC,PC10,TRACED1      ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G3_IO2,               ,LCD_COM4LCD_SEG28LCD_SEG40,                ,           ,                       ,EVENTOUT,
+PortC,PC11,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G3_IO3,               ,LCD_COM5LCD_SEG29LCD_SEG41,                ,           ,                       ,EVENTOUT,
+PortC,PC12,TRACED3      ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G3_IO4,               ,LCD_COM6LCD_SEG30LCD_SEG42,                ,           ,                       ,EVENTOUT,
+PortC,PC13,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortC,PC14,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortC,PC15,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortD,PD0 ,             ,                ,          ,              ,         ,SPI2_NSS ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortD,PD1 ,             ,                ,          ,              ,         ,SPI2_SCK ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortD,PD2 ,TRACED2      ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_SYNC  ,               ,LCD_COM7LCD_SEG31LCD_SEG43,                ,           ,                       ,EVENTOUT,
+PortD,PD3 ,             ,                ,          ,SPI2_SCK      ,         ,SPI2_MISO,         ,                    ,                      ,          ,QUADSPI_BK1_NCS,                          ,                ,           ,                       ,EVENTOUT,
+PortD,PD4 ,             ,                ,          ,              ,         ,SPI2_MOSI,         ,                    ,                      ,TSC_G5_IO1,QUADSPI_BK1_IO0,                          ,                ,           ,                       ,EVENTOUT,
+PortD,PD5 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G5_IO2,QUADSPI_BK1_IO1,                          ,                ,SAI1_MCLK_B,                       ,EVENTOUT,
+PortD,PD6 ,             ,                ,          ,SAI1_PDM_DI1  ,         ,         ,         ,                    ,                      ,TSC_G5_IO3,QUADSPI_BK1_IO2,                          ,                ,SAI1_SD_A  ,                       ,EVENTOUT,
+PortD,PD7 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G5_IO4,QUADSPI_BK1_IO3,LCD_SEG39                 ,                ,           ,                       ,EVENTOUT,
+PortD,PD8 ,             ,                ,TIM1_BKIN2,              ,         ,         ,         ,                    ,                      ,          ,               ,LCD_SEG28                 ,                ,           ,                       ,EVENTOUT,
+PortD,PD9 ,TRACED0      ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,LCD_SEG29                 ,                ,           ,                       ,EVENTOUT,
+PortD,PD10,TRIG_INOUT   ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G6_IO1,               ,LCD_SEG30                 ,                ,           ,                       ,EVENTOUT,
+PortD,PD11,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G6_IO2,               ,LCD_SEG31                 ,                ,           ,LPTIM2_ETR             ,EVENTOUT,
+PortD,PD12,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G6_IO3,               ,LCD_SEG32                 ,                ,           ,LPTIM2_IN1             ,EVENTOUT,
+PortD,PD13,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G6_IO4,               ,LCD_SEG33                 ,                ,           ,LPTIM2_OUT             ,EVENTOUT,
+PortD,PD14,             ,TIM1_CH1        ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,LCD_SEG34                 ,                ,           ,                       ,EVENTOUT,
+PortD,PD15,             ,TIM1_CH2        ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,LCD_SEG35                 ,                ,           ,                       ,EVENTOUT,
+PortE,PE0 ,             ,TIM1_ETR        ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G7_IO3,               ,LCD_SEG36                 ,                ,           ,TIM16_CH1              ,EVENTOUT,
+PortE,PE1 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,TSC_G7_IO2,               ,LCD_SEG37                 ,                ,           ,TIM17_CH1              ,EVENTOUT,
+PortE,PE2 ,TRACECK      ,                ,          ,SAI1_PDM_CK1  ,         ,         ,         ,                    ,                      ,TSC_G7_IO1,               ,LCD_SEG38                 ,                ,SAI1_MCLK_A,                       ,EVENTOUT,
+PortE,PE3 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortE,PE4 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortH,PH0 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortH,PH1 ,             ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
+PortH,PH3 ,LSCO         ,                ,          ,              ,         ,         ,         ,                    ,                      ,          ,               ,                          ,                ,           ,                       ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32wl55_af.csv b/ports/stm32/boards/stm32wl55_af.csv
index 219b8b08b7..c5ef81a4ac 100644
--- a/ports/stm32/boards/stm32wl55_af.csv
+++ b/ports/stm32/boards/stm32wl55_af.csv
@@ -1,45 +1,45 @@
-Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
-,,SYS_AF,TIM1/TIM2/LPTIM1,TIM1/TIM2,SPI2S2/TIM1/LPTIM3,I2C1/I2C2/I2C3,SPI1/SPI2S2,RF,USART1/USART2,LPUART1,,,,COMP1/COMP2/TIM1,DEBUG,TIM2/TIM16/TIM17/LPTIM2,EVENOUT,ADC
-PortA,PA0,,TIM2_CH1,,,I2C3_SMBA,I2S_CKIN,,USART2_CTS,,,,,COMP1_OUT,DEBUG_PWR_REGLP1S,TIM2_ETR,EVENTOUT,ADC123_IN0
-PortA,PA1,,TIM2_CH2,,LPTIM3_OUT,I2C1_SMBA,SPI1_SCK,,USART2_RTS,LPUART1_RTS,,,,,DEBUG_PWR_REGLP2S,,EVENTOUT,ADC123_IN1
-PortA,PA2,LSCO,TIM2_CH3,,,,,,USART2_TX,LPUART1_TX,,,,COMP2_OUT,DEBUG_PWR_LDORDY,,EVENTOUT,ADC123_IN2
-PortA,PA3,,TIM2_CH4,,,,I2S2_MCK,,USART2_RX,LPUART1_RX,,,,,,,EVENTOUT,ADC123_IN3
-PortA,PA4,RTC_OUT2,LPTIM1_OUT,,,,SPI1_NSS,,USART2_CK,,,,,,DEBUG_SUBGHZSPI_NSSOUT,LPTIM2_OUT,EVENTOUT,ADC12_IN4
-PortA,PA5,,TIM2_CH1,TIM2_ETR,SPI2_MISO,,SPI1_SCK,,,,,,,,DEBUG_SUBGHZSPI_SCKOUT,LPTIM2_ETR,EVENTOUT,ADC12_IN5
-PortA,PA6,,TIM1_BKIN,,,I2C2_SMBA,SPI1_MISO,,,LPUART1_CTS,,,,TIM1_BKIN,DEBUG_SUBGHZSPI_MISOOUT,TIM16_CH1,EVENTOUT,ADC12_IN6
-PortA,PA7,,TIM1_CH1N,,,I2C3_SCL,SPI1_MOSI,,,,,,,COMP2_OUT,DEBUG_SUBGHZSPI_MOSIOUT,TIM17_CH1,EVENTOUT,ADC12_IN7
-PortA,PA8,MCO,TIM1_CH1,,,,SPI2_SCK/I2S2_CK,,USART1_CK,,,,,,,LPTIM2_OUT,EVENTOUT,
-PortA,PA9,,TIM1_CH2,,SPI2_NSS/I2S2_WS,I2C1_SCL,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,,,EVENTOUT,
-PortA,PA10,RTC_REFIN,TIM1_CH3,,,I2C1_SDA,SPI2_MOSI/I2S2_SD,,USART1_RX,,,,,,DEBUG_RF_HSE32RDY,TIM17_BKIN,EVENTOUT,
-PortA,PA11,,TIM1_CH4,TIM1_BKIN2,LPTIM3_ETR,I2C2_SDA,SPI1_MISO,,USART1_CTS,,,,,TIM1_BKIN2,DEBUG_RF_NRESET,,EVENTOUT,
-PortA,PA12,,TIM1_ETR,,LPTIM3_IN1,I2C2_SCL,SPI1_MOSI,RF_BUSY,USART1_RTS,,,,,,,,EVENTOUT,
-PortA,PA13,JTMS/SWDIO,,,,I2C2_SMBA,,,,IR_OUT,,,,,,,EVENTOUT,
-PortA,PA14,JTCK/SWCLK,LPTIM1_OUT,,,I2C1_SMBA,,,,,,,,,,,EVENTOUT,
-PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,,I2C2_SDA,SPI1_NSS,,,,,,,,,,EVENTOUT,
-PortB,PB0,,,,,,,,,,,,,COMP1_OUT,,,EVENTOUT,ADC12_IN8
-PortB,PB1,,,,,,,,,LPUART1_RTS_DE,,,,,,LPTIM2_IN1,EVENTOUT,ADC12_IN9
-PortB,PB2,,LPTIM1_OUT,,,I2C3_SMBA,SPI1_NSS,,,,,,,,DEBUG_RF_SMPSRDY,,EVENTOUT,
-PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,RF_IRQ0,USART1_RTS,,,,,,DEBUG_RF_DTB1,,EVENTOUT,
-PortB,PB4,NJTRST,,,,I2C3_SDA,SPI1_MISO,,USART1_CTS,,,,,,DEBUG_RF_LDORDY,TIM17_BKIN,EVENTOUT,
-PortB,PB5,,LPTIM1_IN1,,,I2C1_SMBA,SPI1_MOSI,RF_IRQ1,USART1_CK,,,,,COMP2_OUT,,TIM16_BKIN,EVENTOUT,
-PortB,PB6,,LPTIM1_ETR,,,I2C1_SCL,,,USART1_TX,,,,,,,TIM16_CH1N,EVENTOUT,
-PortB,PB7,,LPTIM1_IN2,,TIM1_BKIN,I2C1_SDA,,,USART1_RX,,,,,,,TIM17_CH1N,EVENTOUT,
-PortB,PB8,,TIM1_CH2N,,,I2C1_SCL,,RF_IRQ2,,,,,,,,TIM16_CH1,EVENTOUT,
-PortB,PB9,,TIM1_CH3N,,,I2C1_SDA,SPI2_NSS/I2S2_WS,,,IR_OUT,,,,,,TIM17_CH1,EVENTOUT,
-PortB,PB10,,TIM2_CH3,,,I2C3_SCL,SPI2_SCK/I2S2_CK,,,LPUART1_RX,,,,COMP1_OUT,,,EVENTOUT,
-PortB,PB11,,TIM2_CH4,,,I2C3_SDA,,,,LPUART1_TX,,,,COMP2_OUT,,,EVENTOUT,
-PortB,PB12,,TIM1_BKIN,,TIM1_BKIN,I2C3_SMBA,SPI2_NSS/I2S2_WS,,,LPUART1_RTS,,,,,,,EVENTOUT,
-PortB,PB13,,TIM1_CH1N,,,I2C3_SCL,SPI2_SCK/I2S2_CK,,,LPUART1_CTS,,,,,,,EVENTOUT,
-PortB,PB14,,TIM1_CH2N,,I2S2_MCK,I2C3_SDA,SPI2_MISO,,,,,,,,,,EVENTOUT,
-PortB,PB15,,TIM1_CH3N,,,I2C2_SCL,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,
-PortC,PC0,,LPTIM1_IN1,,,I2C3_SCL,,,,LPUART1_RX,,,,,,LPTIM2_IN1,EVENTOUT,ADC123_IN10
-PortC,PC1,,LPTIM1_OUT,,SPI2_MOSI/I2S2_SD,I2C3_SDA,,,,LPUART1_TX,,,,,,,EVENTOUT,ADC123_IN11
-PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,,,,,,,,,,EVENTOUT,ADC123_IN12
-PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC123_IN13
-PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC12_IN14
-PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC12_IN15
-PortC,PC6,,,,,,I2S2_MCK,,,,,,,,,,EVENTOUT,
-PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
-PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
-PortH,PH3,,,,,,,,,,,,,,,,EVENTOUT,
+Port ,Pin ,AF0          ,AF1             ,AF2       ,AF3               ,AF4           ,AF5              ,AF6    ,AF7          ,AF8           ,AF9,AF10,AF11,AF12            ,AF13                   ,AF14                   ,AF15    ,ADC
+     ,    ,SYS_AF       ,TIM1/TIM2/LPTIM1,TIM1/TIM2 ,SPI2S2/TIM1/LPTIM3,I2C1/I2C2/I2C3,SPI1/SPI2S2      ,RF     ,USART1/USART2,LPUART1       ,   ,    ,    ,COMP1/COMP2/TIM1,DEBUG                  ,TIM2/TIM16/TIM17/LPTIM2,EVENOUT ,ADC
+PortA,PA0 ,             ,TIM2_CH1        ,          ,                  ,I2C3_SMBA     ,I2S_CKIN         ,       ,USART2_CTS   ,              ,   ,    ,    ,COMP1_OUT       ,DEBUG_PWR_REGLP1S      ,TIM2_ETR               ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2        ,          ,LPTIM3_OUT        ,I2C1_SMBA     ,SPI1_SCK         ,       ,USART2_RTS   ,LPUART1_RTS   ,   ,    ,    ,                ,DEBUG_PWR_REGLP2S      ,                       ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,LSCO         ,TIM2_CH3        ,          ,                  ,              ,                 ,       ,USART2_TX    ,LPUART1_TX    ,   ,    ,    ,COMP2_OUT       ,DEBUG_PWR_LDORDY       ,                       ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4        ,          ,                  ,              ,I2S2_MCK         ,       ,USART2_RX    ,LPUART1_RX    ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,RTC_OUT2     ,LPTIM1_OUT      ,          ,                  ,              ,SPI1_NSS         ,       ,USART2_CK    ,              ,   ,    ,    ,                ,DEBUG_SUBGHZSPI_NSSOUT ,LPTIM2_OUT             ,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1        ,TIM2_ETR  ,SPI2_MISO         ,              ,SPI1_SCK         ,       ,             ,              ,   ,    ,    ,                ,DEBUG_SUBGHZSPI_SCKOUT ,LPTIM2_ETR             ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN       ,          ,                  ,I2C2_SMBA     ,SPI1_MISO        ,       ,             ,LPUART1_CTS   ,   ,    ,    ,TIM1_BKIN       ,DEBUG_SUBGHZSPI_MISOOUT,TIM16_CH1              ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N       ,          ,                  ,I2C3_SCL      ,SPI1_MOSI        ,       ,             ,              ,   ,    ,    ,COMP2_OUT       ,DEBUG_SUBGHZSPI_MOSIOUT,TIM17_CH1              ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO          ,TIM1_CH1        ,          ,                  ,              ,SPI2_SCK/I2S2_CK ,       ,USART1_CK    ,              ,   ,    ,    ,                ,                       ,LPTIM2_OUT             ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2        ,          ,SPI2_NSS/I2S2_WS  ,I2C1_SCL      ,SPI2_SCK/I2S2_CK ,       ,USART1_TX    ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortA,PA10,RTC_REFIN    ,TIM1_CH3        ,          ,                  ,I2C1_SDA      ,SPI2_MOSI/I2S2_SD,       ,USART1_RX    ,              ,   ,    ,    ,                ,DEBUG_RF_HSE32RDY      ,TIM17_BKIN             ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4        ,TIM1_BKIN2,LPTIM3_ETR        ,I2C2_SDA      ,SPI1_MISO        ,       ,USART1_CTS   ,              ,   ,    ,    ,TIM1_BKIN2      ,DEBUG_RF_NRESET        ,                       ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR        ,          ,LPTIM3_IN1        ,I2C2_SCL      ,SPI1_MOSI        ,RF_BUSY,USART1_RTS   ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                ,          ,                  ,I2C2_SMBA     ,                 ,       ,             ,IR_OUT        ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,LPTIM1_OUT      ,          ,                  ,I2C1_SMBA     ,                 ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1        ,TIM2_ETR  ,                  ,I2C2_SDA      ,SPI1_NSS         ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortB,PB0 ,             ,                ,          ,                  ,              ,                 ,       ,             ,              ,   ,    ,    ,COMP1_OUT       ,                       ,                       ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,                ,          ,                  ,              ,                 ,       ,             ,LPUART1_RTS_DE,   ,    ,    ,                ,                       ,LPTIM2_IN1             ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,LPTIM1_OUT      ,          ,                  ,I2C3_SMBA     ,SPI1_NSS         ,       ,             ,              ,   ,    ,    ,                ,DEBUG_RF_SMPSRDY       ,                       ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2        ,          ,                  ,              ,SPI1_SCK         ,RF_IRQ0,USART1_RTS   ,              ,   ,    ,    ,                ,DEBUG_RF_DTB1          ,                       ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                ,          ,                  ,I2C3_SDA      ,SPI1_MISO        ,       ,USART1_CTS   ,              ,   ,    ,    ,                ,DEBUG_RF_LDORDY        ,TIM17_BKIN             ,EVENTOUT,
+PortB,PB5 ,             ,LPTIM1_IN1      ,          ,                  ,I2C1_SMBA     ,SPI1_MOSI        ,RF_IRQ1,USART1_CK    ,              ,   ,    ,    ,COMP2_OUT       ,                       ,TIM16_BKIN             ,EVENTOUT,
+PortB,PB6 ,             ,LPTIM1_ETR      ,          ,                  ,I2C1_SCL      ,                 ,       ,USART1_TX    ,              ,   ,    ,    ,                ,                       ,TIM16_CH1N             ,EVENTOUT,
+PortB,PB7 ,             ,LPTIM1_IN2      ,          ,TIM1_BKIN         ,I2C1_SDA      ,                 ,       ,USART1_RX    ,              ,   ,    ,    ,                ,                       ,TIM17_CH1N             ,EVENTOUT,
+PortB,PB8 ,             ,TIM1_CH2N       ,          ,                  ,I2C1_SCL      ,                 ,RF_IRQ2,             ,              ,   ,    ,    ,                ,                       ,TIM16_CH1              ,EVENTOUT,
+PortB,PB9 ,             ,TIM1_CH3N       ,          ,                  ,I2C1_SDA      ,SPI2_NSS/I2S2_WS ,       ,             ,IR_OUT        ,   ,    ,    ,                ,                       ,TIM17_CH1              ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3        ,          ,                  ,I2C3_SCL      ,SPI2_SCK/I2S2_CK ,       ,             ,LPUART1_RX    ,   ,    ,    ,COMP1_OUT       ,                       ,                       ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4        ,          ,                  ,I2C3_SDA      ,                 ,       ,             ,LPUART1_TX    ,   ,    ,    ,COMP2_OUT       ,                       ,                       ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN       ,          ,TIM1_BKIN         ,I2C3_SMBA     ,SPI2_NSS/I2S2_WS ,       ,             ,LPUART1_RTS   ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N       ,          ,                  ,I2C3_SCL      ,SPI2_SCK/I2S2_CK ,       ,             ,LPUART1_CTS   ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N       ,          ,I2S2_MCK          ,I2C3_SDA      ,SPI2_MISO        ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortB,PB15,             ,TIM1_CH3N       ,          ,                  ,I2C2_SCL      ,SPI2_MOSI/I2S2_SD,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortC,PC0 ,             ,LPTIM1_IN1      ,          ,                  ,I2C3_SCL      ,                 ,       ,             ,LPUART1_RX    ,   ,    ,    ,                ,                       ,LPTIM2_IN1             ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,             ,LPTIM1_OUT      ,          ,SPI2_MOSI/I2S2_SD ,I2C3_SDA      ,                 ,       ,             ,LPUART1_TX    ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,LPTIM1_IN2      ,          ,                  ,              ,SPI2_MISO        ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,LPTIM1_ETR      ,          ,                  ,              ,SPI2_MOSI/I2S2_SD,       ,             ,              ,   ,    ,    ,                ,                       ,LPTIM2_ETR             ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                ,          ,                  ,              ,                 ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                ,          ,                  ,              ,                 ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                ,          ,                  ,              ,I2S2_MCK         ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortC,PC13,             ,                ,          ,                  ,              ,                 ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortC,PC14,             ,                ,          ,                  ,              ,                 ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortC,PC15,             ,                ,          ,                  ,              ,                 ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,
+PortH,PH3 ,             ,                ,          ,                  ,              ,                 ,       ,             ,              ,   ,    ,    ,                ,                       ,                       ,EVENTOUT,

From b4236c7368a8f43a399b48a758f8c36063066d9b Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 9 Aug 2023 02:14:13 +1000
Subject: [PATCH 104/310] stm32: Rename pin_obj_t to machine_pin_obj_t.

This is now consistent with other ports.

Also renamed `pin_{board/cpu}_pins_locals_dict` to
`machine_pin_{board/cpu}_pins_locals_dict`.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/adc.c               | 10 ++++-----
 ports/stm32/boards/make-pins.py | 14 +++++++-----
 ports/stm32/can.c               |  2 +-
 ports/stm32/dac.c               |  2 +-
 ports/stm32/extint.c            |  8 +++----
 ports/stm32/extint.h            |  4 ++--
 ports/stm32/fdcan.c             |  2 +-
 ports/stm32/lcd.c               |  8 +++----
 ports/stm32/led.c               | 14 ++++++------
 ports/stm32/machine_adc.c       |  2 +-
 ports/stm32/mphalport.h         |  4 ++--
 ports/stm32/pin.c               | 40 ++++++++++++++++-----------------
 ports/stm32/pin.h               | 38 +++++++++----------------------
 ports/stm32/pin_defs_stm32.c    |  6 ++---
 ports/stm32/pin_defs_stm32.h    |  2 ++
 ports/stm32/pin_named_pins.c    | 12 +++++-----
 ports/stm32/pyb_i2c.c           |  4 ++--
 ports/stm32/servo.c             |  2 +-
 ports/stm32/spi.c               |  2 +-
 ports/stm32/timer.c             |  2 +-
 ports/stm32/uart.c              |  2 +-
 21 files changed, 84 insertions(+), 96 deletions(-)

diff --git a/ports/stm32/adc.c b/ports/stm32/adc.c
index 6bd0f4ce25..ddb8a35703 100644
--- a/ports/stm32/adc.c
+++ b/ports/stm32/adc.c
@@ -527,7 +527,7 @@ STATIC mp_obj_t adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_
     // STM32H5 has two ADC instances where some pins are only available on ADC1 or ADC2 (but not both).
     // Assume we're using a channel of ADC1. Can be overridden for ADC2 later in this function.
     ADC_TypeDef *adc = ADC1;
-    const pin_obj_t *const *pin_adc_table = pin_adc1;
+    const machine_pin_obj_t *const *pin_adc_table = pin_adc1;
     uint32_t num_adc_pins = MP_ARRAY_SIZE(pin_adc1);
     #endif
     uint32_t channel;
@@ -535,7 +535,7 @@ STATIC mp_obj_t adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_
     if (mp_obj_is_int(pin_obj)) {
         channel = adc_get_internal_channel(mp_obj_get_int(pin_obj));
     } else {
-        const pin_obj_t *pin = pin_find(pin_obj);
+        const machine_pin_obj_t *pin = pin_find(pin_obj);
         if ((pin->adc_num & PIN_ADC_MASK) == 0) {
             // No ADC function on the given pin.
             mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Pin(%q) doesn't have ADC capabilities"), pin->name);
@@ -557,14 +557,14 @@ STATIC mp_obj_t adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_
     // If this channel corresponds to a pin then configure the pin in ADC mode.
     #if defined(STM32H5)
     if (channel < num_adc_pins) {
-        const pin_obj_t *pin = pin_adc_table[channel];
+        const machine_pin_obj_t *pin = pin_adc_table[channel];
         if (pin != NULL) {
             mp_hal_pin_config(pin, MP_HAL_PIN_MODE_ADC, MP_HAL_PIN_PULL_NONE, 0);
         }
     }
     #else
     if (channel < MP_ARRAY_SIZE(pin_adc_table)) {
-        const pin_obj_t *pin = pin_adc_table[channel];
+        const machine_pin_obj_t *pin = pin_adc_table[channel];
         if (pin != NULL) {
             mp_hal_pin_config(pin, MP_HAL_PIN_MODE_ADC, MP_HAL_PIN_PULL_NONE, 0);
         }
@@ -862,7 +862,7 @@ void adc_init_all(pyb_adc_all_obj_t *adc_all, uint32_t resolution, uint32_t en_m
         // only initialise those channels that are selected with the en_mask
         if (en_mask & (1 << channel)) {
             // If this channel corresponds to a pin then configure the pin in ADC mode.
-            const pin_obj_t *pin = pin_adcall_table[channel];
+            const machine_pin_obj_t *pin = pin_adcall_table[channel];
             if (pin) {
                 mp_hal_pin_config(pin, MP_HAL_PIN_MODE_ADC, MP_HAL_PIN_PULL_NONE, 0);
             }
diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py
index 92e8d76734..303f2df264 100755
--- a/ports/stm32/boards/make-pins.py
+++ b/ports/stm32/boards/make-pins.py
@@ -281,7 +281,7 @@ class Pin(object):
         print("};", file=out_source)
         print("", file=out_source)
         print(
-            "const pin_obj_t pin_{:s}_obj = PIN({:s}, {:d}, {:s}, {:s}, {:d});".format(
+            "const machine_pin_obj_t pin_{:s}_obj = PIN({:s}, {:d}, {:s}, {:s}, {:d});".format(
                 self.cpu_pin_name(),
                 self.port_letter(),
                 self.pin,
@@ -295,7 +295,7 @@ class Pin(object):
 
     def print_header(self, out_header):
         n = self.cpu_pin_name()
-        print("extern const pin_obj_t pin_{:s}_obj;".format(n), file=out_header)
+        print("extern const machine_pin_obj_t pin_{:s}_obj;".format(n), file=out_header)
         print("#define pin_{:s} (&pin_{:s}_obj)".format(n, n), file=out_header)
         if self.alt_fn_count > 0:
             print("extern const pin_af_obj_t pin_{:s}_af[];".format(n), file=out_header)
@@ -381,7 +381,9 @@ class Pins(object):
 
     def print_named(self, label, named_pins, out_source):
         print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
+            "STATIC const mp_rom_map_elem_t machine_pin_{:s}_pins_locals_dict_table[] = {{".format(
+                label
+            ),
             file=out_source,
         )
         for named_pin in named_pins:
@@ -395,7 +397,7 @@ class Pins(object):
                 )
         print("};", file=out_source)
         print(
-            "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
+            "MP_DEFINE_CONST_DICT(machine_pin_{:s}_pins_locals_dict, machine_pin_{:s}_pins_locals_dict_table);".format(
                 label, label
             ),
             file=out_source,
@@ -428,7 +430,7 @@ class Pins(object):
         self.adc_table_size[adc_num] = table_size
         print("", file=out_source)
         print(
-            "const pin_obj_t * const pin_adc{:d}[{:d}] = {{".format(adc_num, table_size),
+            "const machine_pin_obj_t * const pin_adc{:d}[{:d}] = {{".format(adc_num, table_size),
             file=out_source,
         )
         for channel in range(table_size):
@@ -447,7 +449,7 @@ class Pins(object):
                     pin.print_header(out_header)
             for adc_num, table_size in self.adc_table_size.items():
                 print(
-                    "extern const pin_obj_t * const pin_adc{:d}[{:d}];".format(
+                    "extern const machine_pin_obj_t * const pin_adc{:d}[{:d}];".format(
                         adc_num, table_size
                     ),
                     file=out_header,
diff --git a/ports/stm32/can.c b/ports/stm32/can.c
index bcc6983594..9248e216c9 100644
--- a/ports/stm32/can.c
+++ b/ports/stm32/can.c
@@ -65,7 +65,7 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
 
     CAN_TypeDef *CANx = NULL;
     uint32_t sce_irq = 0;
-    const pin_obj_t *pins[2];
+    const machine_pin_obj_t *pins[2];
 
     switch (can_obj->can_id) {
         #if defined(MICROPY_HW_CAN1_TX)
diff --git a/ports/stm32/dac.c b/ports/stm32/dac.c
index 142b7ea387..252af369c0 100644
--- a/ports/stm32/dac.c
+++ b/ports/stm32/dac.c
@@ -324,7 +324,7 @@ STATIC mp_obj_t pyb_dac_make_new(const mp_obj_type_t *type, size_t n_args, size_
     if (mp_obj_is_int(args[0])) {
         dac_id = mp_obj_get_int(args[0]);
     } else {
-        const pin_obj_t *pin = pin_find(args[0]);
+        const machine_pin_obj_t *pin = pin_find(args[0]);
         if (pin == pin_A4) {
             dac_id = 1;
         } else if (pin == pin_A5) {
diff --git a/ports/stm32/extint.c b/ports/stm32/extint.c
index 7698569149..f6db1e6328 100644
--- a/ports/stm32/extint.c
+++ b/ports/stm32/extint.c
@@ -244,7 +244,7 @@ STATIC const uint8_t nvic_irq_channel[EXTI_NUM_VECTORS] = {
 // Set override_callback_obj to true if you want to unconditionally set the
 // callback function.
 uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t callback_obj, bool override_callback_obj) {
-    const pin_obj_t *pin = NULL;
+    const machine_pin_obj_t *pin = NULL;
     uint v_line;
 
     if (mp_obj_is_int(pin_obj)) {
@@ -318,7 +318,7 @@ uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t ca
 }
 
 // This function is intended to be used by the Pin.irq() method
-void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj) {
+void extint_register_pin(const machine_pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj) {
     uint32_t line = pin->pin;
 
     // Check if the ExtInt line is already in use by another Pin/ExtInt
@@ -327,7 +327,7 @@ void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_
         if (mp_obj_is_small_int(pyb_extint_callback_arg[line])) {
             mp_raise_msg_varg(&mp_type_OSError, MP_ERROR_TEXT("ExtInt vector %d is already in use"), line);
         } else {
-            const pin_obj_t *other_pin = MP_OBJ_TO_PTR(pyb_extint_callback_arg[line]);
+            const machine_pin_obj_t *other_pin = MP_OBJ_TO_PTR(pyb_extint_callback_arg[line]);
             mp_raise_msg_varg(&mp_type_OSError,
                 MP_ERROR_TEXT("IRQ resource already taken by Pin('%q')"), other_pin->name);
         }
@@ -370,7 +370,7 @@ void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_
     }
 }
 
-void extint_set(const pin_obj_t *pin, uint32_t mode) {
+void extint_set(const machine_pin_obj_t *pin, uint32_t mode) {
     uint32_t line = pin->pin;
 
     mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[line];
diff --git a/ports/stm32/extint.h b/ports/stm32/extint.h
index 919e4bb2e8..d5abb04d65 100644
--- a/ports/stm32/extint.h
+++ b/ports/stm32/extint.h
@@ -70,8 +70,8 @@
 void extint_init0(void);
 
 uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t callback_obj, bool override_callback_obj);
-void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj);
-void extint_set(const pin_obj_t *pin, uint32_t mode);
+void extint_register_pin(const machine_pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj);
+void extint_set(const machine_pin_obj_t *pin, uint32_t mode);
 
 void extint_enable(uint line);
 void extint_disable(uint line);
diff --git a/ports/stm32/fdcan.c b/ports/stm32/fdcan.c
index bcf3e8d6a3..640244a3b9 100644
--- a/ports/stm32/fdcan.c
+++ b/ports/stm32/fdcan.c
@@ -137,7 +137,7 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
     #endif
 
     FDCAN_GlobalTypeDef *CANx = NULL;
-    const pin_obj_t *pins[2];
+    const machine_pin_obj_t *pins[2];
 
     switch (can_obj->can_id) {
         #if defined(MICROPY_HW_CAN1_TX)
diff --git a/ports/stm32/lcd.c b/ports/stm32/lcd.c
index e5d7f30efb..a78718872b 100644
--- a/ports/stm32/lcd.c
+++ b/ports/stm32/lcd.c
@@ -89,10 +89,10 @@ typedef struct _pyb_lcd_obj_t {
 
     // hardware control for the LCD
     const spi_t *spi;
-    const pin_obj_t *pin_cs1;
-    const pin_obj_t *pin_rst;
-    const pin_obj_t *pin_a0;
-    const pin_obj_t *pin_bl;
+    const machine_pin_obj_t *pin_cs1;
+    const machine_pin_obj_t *pin_rst;
+    const machine_pin_obj_t *pin_a0;
+    const machine_pin_obj_t *pin_bl;
 
     // character buffer for stdout-like output
     char char_buffer[LCD_CHAR_BUF_W * LCD_CHAR_BUF_H];
diff --git a/ports/stm32/led.c b/ports/stm32/led.c
index e70c22532c..39b1f7e388 100644
--- a/ports/stm32/led.c
+++ b/ports/stm32/led.c
@@ -47,7 +47,7 @@
 typedef struct _pyb_led_obj_t {
     mp_obj_base_t base;
     mp_uint_t led_id;
-    const pin_obj_t *led_pin;
+    const machine_pin_obj_t *led_pin;
 } pyb_led_obj_t;
 
 STATIC const pyb_led_obj_t pyb_led_obj[] = {
@@ -73,7 +73,7 @@ STATIC const pyb_led_obj_t pyb_led_obj[] = {
 void led_init(void) {
     /* Turn off LEDs and initialize */
     for (int led = 0; led < NUM_LEDS; led++) {
-        const pin_obj_t *led_pin = pyb_led_obj[led].led_pin;
+        const machine_pin_obj_t *led_pin = pyb_led_obj[led].led_pin;
         mp_hal_gpio_clock_enable(led_pin->gpio);
         MICROPY_HW_LED_OFF(led_pin);
         mp_hal_pin_output(led_pin);
@@ -143,7 +143,7 @@ static inline bool led_pwm_is_enabled(int led) {
 // this function has a large stack so it should not be inlined
 STATIC void led_pwm_init(int led) __attribute__((noinline));
 STATIC void led_pwm_init(int led) {
-    const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
+    const machine_pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
     const led_pwm_config_t *pwm_cfg = &led_pwm_config[led - 1];
 
     // GPIO configuration
@@ -192,7 +192,7 @@ STATIC void led_pwm_init(int led) {
 
 STATIC void led_pwm_deinit(int led) {
     // make the LED's pin a standard GPIO output pin
-    const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
+    const machine_pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
     GPIO_TypeDef *g = led_pin->gpio;
     uint32_t pin = led_pin->pin;
     static const int mode = 1; // output
@@ -211,7 +211,7 @@ void led_state(pyb_led_t led, int state) {
         return;
     }
 
-    const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
+    const machine_pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
     if (state == 0) {
         // turn LED off
         MICROPY_HW_LED_OFF(led_pin);
@@ -241,7 +241,7 @@ void led_toggle(pyb_led_t led) {
     #endif
 
     // toggle the output data register to toggle the LED state
-    const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
+    const machine_pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
     led_pin->gpio->ODR ^= led_pin->pin_mask;
 }
 
@@ -261,7 +261,7 @@ int led_get_intensity(pyb_led_t led) {
     }
     #endif
 
-    const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
+    const machine_pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin;
     GPIO_TypeDef *gpio = led_pin->gpio;
 
     if (gpio->ODR & led_pin->pin_mask) {
diff --git a/ports/stm32/machine_adc.c b/ports/stm32/machine_adc.c
index 4b644e6c97..91094427b8 100644
--- a/ports/stm32/machine_adc.c
+++ b/ports/stm32/machine_adc.c
@@ -571,7 +571,7 @@ STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args
             sample_time = ADC_SAMPLETIME_DEFAULT_INT;
         }
     } else {
-        const pin_obj_t *pin = pin_find(source);
+        const machine_pin_obj_t *pin = pin_find(source);
         if (pin->adc_num & PIN_ADC1) {
             #if defined(STM32WL)
             adc = ADC;
diff --git a/ports/stm32/mphalport.h b/ports/stm32/mphalport.h
index 2757d39841..410aa5a8de 100644
--- a/ports/stm32/mphalport.h
+++ b/ports/stm32/mphalport.h
@@ -90,7 +90,7 @@ static inline mp_uint_t mp_hal_ticks_cpu(void) {
 #define MP_HAL_PIN_SPEED_HIGH           (GPIO_SPEED_FREQ_HIGH)
 #define MP_HAL_PIN_SPEED_VERY_HIGH      (GPIO_SPEED_FREQ_VERY_HIGH)
 
-#define mp_hal_pin_obj_t const pin_obj_t *
+#define mp_hal_pin_obj_t const machine_pin_obj_t *
 #define mp_hal_get_pin_obj(o)   pin_find(o)
 #define mp_hal_pin_name(p)      ((p)->name)
 #define mp_hal_pin_input(p)     mp_hal_pin_config((p), MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_NONE, 0)
@@ -114,7 +114,7 @@ void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio);
 void mp_hal_pin_config(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint32_t alt);
 bool mp_hal_pin_config_alt(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint8_t fn, uint8_t unit);
 void mp_hal_pin_config_speed(mp_hal_pin_obj_t pin_obj, uint32_t speed);
-void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj);
+void extint_register_pin(const machine_pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj);
 
 mp_obj_base_t *mp_hal_get_spi_obj(mp_obj_t spi_in);
 
diff --git a/ports/stm32/pin.c b/ports/stm32/pin.c
index f2db0e20e8..599d61de41 100644
--- a/ports/stm32/pin.c
+++ b/ports/stm32/pin.c
@@ -97,10 +97,10 @@ void pin_init0(void) {
 }
 
 // C API used to convert a user-supplied pin name into an ordinal pin number.
-const pin_obj_t *pin_find(mp_obj_t user_obj) {
+const machine_pin_obj_t *pin_find(mp_obj_t user_obj) {
     const mp_print_t *print = &mp_plat_print;
 
-    const pin_obj_t *pin_obj;
+    const machine_pin_obj_t *pin_obj;
 
     // If a pin was provided, then use it
     if (mp_obj_is_type(user_obj, &pin_type)) {
@@ -149,7 +149,7 @@ const pin_obj_t *pin_find(mp_obj_t user_obj) {
     }
 
     // See if the pin name matches a board pin
-    pin_obj = pin_find_named_pin(&pin_board_pins_locals_dict, user_obj);
+    pin_obj = pin_find_named_pin(&machine_pin_board_pins_locals_dict, user_obj);
     if (pin_obj) {
         if (pin_class_debug) {
             mp_printf(print, "Pin.board maps ");
@@ -162,7 +162,7 @@ const pin_obj_t *pin_find(mp_obj_t user_obj) {
     }
 
     // See if the pin name matches a cpu pin
-    pin_obj = pin_find_named_pin(&pin_cpu_pins_locals_dict, user_obj);
+    pin_obj = pin_find_named_pin(&machine_pin_cpu_pins_locals_dict, user_obj);
     if (pin_obj) {
         if (pin_class_debug) {
             mp_printf(print, "Pin.cpu maps ");
@@ -180,7 +180,7 @@ const pin_obj_t *pin_find(mp_obj_t user_obj) {
 /// \method __str__()
 /// Return a string describing the pin object.
 STATIC void pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
     // pin name
     mp_printf(print, "Pin(Pin.cpu.%q, mode=Pin.", self->name);
@@ -238,7 +238,7 @@ STATIC void pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t
     }
 }
 
-STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *pin, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args);
+STATIC mp_obj_t pin_obj_init_helper(const machine_pin_obj_t *pin, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args);
 
 /// \classmethod \constructor(id, ...)
 /// Create a new Pin object associated with the id.  If additional arguments are given,
@@ -247,7 +247,7 @@ mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw,
     mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
 
     // Run an argument through the mapper and return the result.
-    const pin_obj_t *pin = pin_find(args[0]);
+    const machine_pin_obj_t *pin = pin_find(args[0]);
 
     if (n_args > 1 || n_kw > 0) {
         // pin mode given, so configure this GPIO
@@ -265,7 +265,7 @@ mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw,
 // fast method for getting/setting pin value
 STATIC mp_obj_t pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 0, 1, false);
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     if (n_args == 0) {
         // get pin
         return MP_OBJ_NEW_SMALL_INT(mp_hal_pin_read(self));
@@ -303,7 +303,7 @@ STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_map_dict_obj, MP_ROM_PTR(&pin_map_dic
 /// \classmethod af_list()
 /// Returns an array of alternate functions available for this pin.
 STATIC mp_obj_t pin_af_list(mp_obj_t self_in) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_obj_t result = mp_obj_new_list(0, NULL);
 
     const pin_af_obj_t *af = self->af;
@@ -327,7 +327,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_debug_fun_obj, 1, 2, pin_debug);
 STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_debug_obj, MP_ROM_PTR(&pin_debug_fun_obj));
 
 // init(mode, pull=None, alt=-1, *, value, alt)
-STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC mp_obj_t pin_obj_init_helper(const machine_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT },
         { MP_QSTR_pull, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE}},
@@ -402,14 +402,14 @@ STATIC mp_obj_t pin_value(size_t n_args, const mp_obj_t *args) {
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_value_obj, 1, 2, pin_value);
 
 STATIC mp_obj_t pin_off(mp_obj_t self_in) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_hal_pin_low(self);
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_off_obj, pin_off);
 
 STATIC mp_obj_t pin_on(mp_obj_t self_in) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_hal_pin_high(self);
     return mp_const_none;
 }
@@ -423,7 +423,7 @@ STATIC mp_obj_t pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ar
         { MP_QSTR_trigger, MP_ARG_INT, {.u_int = GPIO_MODE_IT_RISING | GPIO_MODE_IT_FALLING} },
         { MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} },
     };
-    pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
     mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
     mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
@@ -441,7 +441,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pin_irq_obj, 1, pin_irq);
 /// \method name()
 /// Get the pin name.
 STATIC mp_obj_t pin_name(mp_obj_t self_in) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     return MP_OBJ_NEW_QSTR(self->name);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_name_obj, pin_name);
@@ -449,11 +449,11 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_name_obj, pin_name);
 /// \method names()
 /// Returns the cpu and board names for this pin.
 STATIC mp_obj_t pin_names(mp_obj_t self_in) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_obj_t result = mp_obj_new_list(0, NULL);
     mp_obj_list_append(result, MP_OBJ_NEW_QSTR(self->name));
 
-    const mp_map_t *map = &pin_board_pins_locals_dict.map;
+    const mp_map_t *map = &machine_pin_board_pins_locals_dict.map;
     mp_map_elem_t *elem = map->table;
 
     for (mp_uint_t i = 0; i < map->used; i++, elem++) {
@@ -468,7 +468,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_names_obj, pin_names);
 /// \method port()
 /// Get the pin port.
 STATIC mp_obj_t pin_port(mp_obj_t self_in) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     return MP_OBJ_NEW_SMALL_INT(self->port);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_port_obj, pin_port);
@@ -476,7 +476,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_port_obj, pin_port);
 /// \method pin()
 /// Get the pin number.
 STATIC mp_obj_t pin_pin(mp_obj_t self_in) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     return MP_OBJ_NEW_SMALL_INT(self->pin);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_pin_obj, pin_pin);
@@ -484,7 +484,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_pin_obj, pin_pin);
 /// \method gpio()
 /// Returns the base address of the GPIO block associated with this pin.
 STATIC mp_obj_t pin_gpio(mp_obj_t self_in) {
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
     return MP_OBJ_NEW_SMALL_INT((intptr_t)self->gpio);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_gpio_obj, pin_gpio);
@@ -572,7 +572,7 @@ STATIC MP_DEFINE_CONST_DICT(pin_locals_dict, pin_locals_dict_table);
 
 STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
     (void)errcode;
-    pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
     switch (request) {
         case MP_PIN_READ: {
diff --git a/ports/stm32/pin.h b/ports/stm32/pin.h
index 2397a9d48e..d16c176380 100644
--- a/ports/stm32/pin.h
+++ b/ports/stm32/pin.h
@@ -53,7 +53,7 @@ typedef struct {
     uint32_t pin_mask;
     pin_gpio_t *gpio;
     const pin_af_obj_t *af;
-} pin_obj_t;
+} machine_pin_obj_t;
 
 extern const mp_obj_type_t pin_type;
 extern const mp_obj_type_t pin_af_type;
@@ -61,38 +61,22 @@ extern const mp_obj_type_t pin_af_type;
 // Include all of the individual pin objects
 #include "genhdr/pins.h"
 
-typedef struct {
-    const char *name;
-    const pin_obj_t *pin;
-} pin_named_pin_t;
-
-extern const pin_named_pin_t pin_board_pins[];
-extern const pin_named_pin_t pin_cpu_pins[];
-
-// extern pin_map_obj_t pin_map_obj;
-
-typedef struct {
-    mp_obj_base_t base;
-    qstr name;
-    const pin_named_pin_t *named_pins;
-} pin_named_pins_obj_t;
-
 extern const mp_obj_type_t pin_board_pins_obj_type;
 extern const mp_obj_type_t pin_cpu_pins_obj_type;
 
-extern const mp_obj_dict_t pin_cpu_pins_locals_dict;
-extern const mp_obj_dict_t pin_board_pins_locals_dict;
+extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;
+extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;
 
 MP_DECLARE_CONST_FUN_OBJ_KW(pin_init_obj);
 
 void pin_init0(void);
-uint32_t pin_get_mode(const pin_obj_t *pin);
-uint32_t pin_get_pull(const pin_obj_t *pin);
-uint32_t pin_get_af(const pin_obj_t *pin);
-const pin_obj_t *pin_find(mp_obj_t user_obj);
-const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name);
-const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit);
-const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx);
-const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name);
+uint32_t pin_get_mode(const machine_pin_obj_t *pin);
+uint32_t pin_get_pull(const machine_pin_obj_t *pin);
+uint32_t pin_get_af(const machine_pin_obj_t *pin);
+const machine_pin_obj_t *pin_find(mp_obj_t user_obj);
+const machine_pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name);
+const pin_af_obj_t *pin_find_af(const machine_pin_obj_t *pin, uint8_t fn, uint8_t unit);
+const pin_af_obj_t *pin_find_af_by_index(const machine_pin_obj_t *pin, mp_uint_t af_idx);
+const pin_af_obj_t *pin_find_af_by_name(const machine_pin_obj_t *pin, const char *name);
 
 #endif // MICROPY_INCLUDED_STM32_PIN_H
diff --git a/ports/stm32/pin_defs_stm32.c b/ports/stm32/pin_defs_stm32.c
index 070005d217..8a946fdd3c 100644
--- a/ports/stm32/pin_defs_stm32.c
+++ b/ports/stm32/pin_defs_stm32.c
@@ -5,7 +5,7 @@
 // GPIO_MODE_INPUT, GPIO_MODE_OUTPUT_PP, GPIO_MODE_OUTPUT_OD,
 // GPIO_MODE_AF_PP, GPIO_MODE_AF_OD, or GPIO_MODE_ANALOG.
 
-uint32_t pin_get_mode(const pin_obj_t *pin) {
+uint32_t pin_get_mode(const machine_pin_obj_t *pin) {
     GPIO_TypeDef *gpio = pin->gpio;
     uint32_t mode = (gpio->MODER >> (pin->pin * 2)) & 3;
     if (mode == GPIO_MODE_OUTPUT_PP || mode == GPIO_MODE_AF_PP) {
@@ -19,12 +19,12 @@ uint32_t pin_get_mode(const pin_obj_t *pin) {
 // Returns the pin pullup/pulldown. The value returned by this macro should
 // be one of GPIO_NOPULL, GPIO_PULLUP, or GPIO_PULLDOWN.
 
-uint32_t pin_get_pull(const pin_obj_t *pin) {
+uint32_t pin_get_pull(const machine_pin_obj_t *pin) {
     return (pin->gpio->PUPDR >> (pin->pin * 2)) & 3;
 }
 
 // Returns the af (alternate function) index currently set for a pin.
 
-uint32_t pin_get_af(const pin_obj_t *pin) {
+uint32_t pin_get_af(const machine_pin_obj_t *pin) {
     return (pin->gpio->AFR[pin->pin >> 3] >> ((pin->pin & 7) * 4)) & 0xf;
 }
diff --git a/ports/stm32/pin_defs_stm32.h b/ports/stm32/pin_defs_stm32.h
index 1f950c1179..6c67b64924 100644
--- a/ports/stm32/pin_defs_stm32.h
+++ b/ports/stm32/pin_defs_stm32.h
@@ -133,6 +133,8 @@ enum {
     PIN_ADC1  = (1 << 0),
     PIN_ADC2  = (1 << 1),
     PIN_ADC3  = (1 << 2),
+    PIN_ADC4  = (1 << 3),
+    PIN_ADC5  = (1 << 4),
 };
 
 typedef GPIO_TypeDef pin_gpio_t;
diff --git a/ports/stm32/pin_named_pins.c b/ports/stm32/pin_named_pins.c
index 8eeb4ed32b..7a27158a6d 100644
--- a/ports/stm32/pin_named_pins.c
+++ b/ports/stm32/pin_named_pins.c
@@ -35,17 +35,17 @@ MP_DEFINE_CONST_OBJ_TYPE(
     pin_cpu_pins_obj_type,
     MP_QSTR_cpu,
     MP_TYPE_FLAG_NONE,
-    locals_dict, &pin_cpu_pins_locals_dict
+    locals_dict, &machine_pin_cpu_pins_locals_dict
     );
 
 MP_DEFINE_CONST_OBJ_TYPE(
     pin_board_pins_obj_type,
     MP_QSTR_board,
     MP_TYPE_FLAG_NONE,
-    locals_dict, &pin_board_pins_locals_dict
+    locals_dict, &machine_pin_board_pins_locals_dict
     );
 
-const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) {
+const machine_pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) {
     const mp_map_t *named_map = &named_pins->map;
     mp_map_elem_t *named_elem = mp_map_lookup((mp_map_t *)named_map, name, MP_MAP_LOOKUP);
     if (named_elem != NULL && named_elem->value != MP_OBJ_NULL) {
@@ -54,7 +54,7 @@ const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t na
     return NULL;
 }
 
-const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit) {
+const pin_af_obj_t *pin_find_af(const machine_pin_obj_t *pin, uint8_t fn, uint8_t unit) {
     const pin_af_obj_t *af = pin->af;
     for (mp_uint_t i = 0; i < pin->num_af; i++, af++) {
         if (af->fn == fn && af->unit == unit) {
@@ -64,7 +64,7 @@ const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit)
     return NULL;
 }
 
-const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx) {
+const pin_af_obj_t *pin_find_af_by_index(const machine_pin_obj_t *pin, mp_uint_t af_idx) {
     const pin_af_obj_t *af = pin->af;
     for (mp_uint_t i = 0; i < pin->num_af; i++, af++) {
         if (af->idx == af_idx) {
@@ -75,7 +75,7 @@ const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx)
 }
 
 /* unused
-const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name) {
+const pin_af_obj_t *pin_find_af_by_name(const machine_pin_obj_t *pin, const char *name) {
     const pin_af_obj_t *af = pin->af;
     for (mp_uint_t i = 0; i < pin->num_af; i++, af++) {
         if (strcmp(name, qstr_str(af->name)) == 0) {
diff --git a/ports/stm32/pyb_i2c.c b/ports/stm32/pyb_i2c.c
index 915eabe0b2..fa38ef372d 100644
--- a/ports/stm32/pyb_i2c.c
+++ b/ports/stm32/pyb_i2c.c
@@ -290,8 +290,8 @@ void i2c_init0(void) {
 
 int pyb_i2c_init(I2C_HandleTypeDef *i2c) {
     int i2c_unit;
-    const pin_obj_t *scl_pin;
-    const pin_obj_t *sda_pin;
+    const machine_pin_obj_t *scl_pin;
+    const machine_pin_obj_t *sda_pin;
 
     if (0) {
     #if defined(MICROPY_HW_I2C1_SCL)
diff --git a/ports/stm32/servo.c b/ports/stm32/servo.c
index e0aa2d6b69..07cc4eab88 100644
--- a/ports/stm32/servo.c
+++ b/ports/stm32/servo.c
@@ -48,7 +48,7 @@
 
 typedef struct _pyb_servo_obj_t {
     mp_obj_base_t base;
-    const pin_obj_t *pin;
+    const machine_pin_obj_t *pin;
     uint8_t pulse_min;          // units of 10us
     uint8_t pulse_max;          // units of 10us
     uint8_t pulse_centre;       // units of 10us
diff --git a/ports/stm32/spi.c b/ports/stm32/spi.c
index 7b89b48b53..47714a2872 100644
--- a/ports/stm32/spi.c
+++ b/ports/stm32/spi.c
@@ -341,7 +341,7 @@ void spi_set_params(const spi_t *spi_obj, uint32_t prescale, int32_t baudrate,
 int spi_init(const spi_t *self, bool enable_nss_pin) {
     SPI_HandleTypeDef *spi = self->spi;
     uint32_t irqn = 0;
-    const pin_obj_t *pins[4] = { NULL, NULL, NULL, NULL };
+    const machine_pin_obj_t *pins[4] = { NULL, NULL, NULL, NULL };
 
     if (0) {
     #if defined(MICROPY_HW_SPI1_SCK)
diff --git a/ports/stm32/timer.c b/ports/stm32/timer.c
index c15b84fe54..41e5c6157d 100644
--- a/ports/stm32/timer.c
+++ b/ports/stm32/timer.c
@@ -1199,7 +1199,7 @@ STATIC mp_obj_t pyb_timer_channel(size_t n_args, const mp_obj_t *pos_args, mp_ma
         if (!mp_obj_is_type(pin_obj, &pin_type)) {
             mp_raise_ValueError(MP_ERROR_TEXT("pin argument needs to be be a Pin type"));
         }
-        const pin_obj_t *pin = MP_OBJ_TO_PTR(pin_obj);
+        const machine_pin_obj_t *pin = MP_OBJ_TO_PTR(pin_obj);
         const pin_af_obj_t *af = pin_find_af(pin, AF_FN_TIM, self->tim_id);
         if (af == NULL) {
             mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Pin(%q) doesn't have an alt for Timer(%d)"), pin->name, self->tim_id);
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
index 0d648a6fc1..83e9e0fdd8 100644
--- a/ports/stm32/uart.c
+++ b/ports/stm32/uart.c
@@ -250,7 +250,7 @@ bool uart_init(machine_uart_obj_t *uart_obj,
     uint8_t uart_fn = AF_FN_UART;
     int uart_unit;
 
-    const pin_obj_t *pins[4] = {0};
+    const machine_pin_obj_t *pins[4] = {0};
 
     switch (uart_obj->uart_id) {
         #if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX)

From 724ebb9916d2e29595fc2098e6ae1e7c4f1e3f52 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 9 Aug 2023 02:14:13 +1000
Subject: [PATCH 105/310] stm32/boards/make-pins.py: Update to use
 tools/boardgen.py.

Requires additions to tools/boardgen.py for stm32 pin generation.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/boards/make-pins.py | 798 ++++++++++++--------------------
 tools/boardgen.py               |  78 +++-
 2 files changed, 368 insertions(+), 508 deletions(-)

diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py
index 303f2df264..10472a093f 100755
--- a/ports/stm32/boards/make-pins.py
+++ b/ports/stm32/boards/make-pins.py
@@ -1,59 +1,17 @@
 #!/usr/bin/env python
 
-"""
-Generates pin source files based on an MCU alternate-function definition (eg
-stm32f405_af.csv) and a board-specific pin definition file, pins.csv.
 
-The pins.csv file can contain empty lines, comments (a line beginning with "#")
-or pin definition lines.  Pin definition lines must be of the form:
-
-    board,cpu
-
-Where "board" is the user-facing name of the pin as specified by the particular
-board layout and markings, and "cpu" is the corresponding name of the CPU/MCU
-pin.
-
-The "board" entry may be absent if the CPU pin has no additional name, and both
-entries may start with "-" to hide them from the corresponding Python dict of
-pins, and hence hide them from the user (but they are still accessible in C).
-
-For example, take the following pins.csv file:
-
-    X1,PA0
-    -X2,PA1
-    X3,-PA2
-    -X4,-PA3
-    ,PA4
-    ,-PA5
-
-The first row here configures:
-- The CPU pin PA0 is labelled X1.
-- The Python user can access both by the names Pin("X1") and Pin("A0").
-- The Python user can access both by the members Pin.board.X1 and Pin.cpu.A0.
-- In C code they are available as pyb_pin_X1 and pin_A0.
-
-Prefixing the names with "-" hides them from the user.  The following table
-summarises the various possibilities:
-
-    pins.csv entry | board name | cpu name | C board name | C cpu name
-    ---------------+------------+----------+--------------+-----------
-    X1,PA0           "X1"         "A0"       pyb_pin_X1     pin_A0
-    -X2,PA1          -            "A1"       pyb_pin_X2     pin_A1
-    X3,-PA2          "X3"         -          pyb_pin_X3     pin_A2
-    -X4,-PA3         -            -          pyb_pin_X4     pin_A3
-    ,PA4             -            "A4"       -              pin_A4
-    ,-PA5            -            -          -              pin_A5
-
-"""
-
-from __future__ import print_function
-
-import argparse
+from collections import defaultdict, namedtuple
+import os
+import re
 import sys
-import csv
+
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
+import boardgen
+
 
 # Must have matching entries in AF_FN_* enum in ../pin_defs_stm32.h
-SUPPORTED_FN = {
+SUPPORTED_AF = {
     "TIM": ["CH1", "CH2", "CH3", "CH4", "CH1N", "CH2N", "CH3N", "CH1_ETR", "ETR", "BKIN"],
     "I2C": ["SDA", "SCL"],
     "I2S": ["CK", "MCK", "SD", "WS", "EXTSD"],
@@ -65,6 +23,8 @@ SUPPORTED_FN = {
     "CAN": ["TX", "RX"],
 }
 
+# Only make these AFs available if we actually enable those peripherals (by
+# assigning default pins in mpconfigboard.h).
 CONDITIONAL_VAR = {
     "I2C": "MICROPY_HW_I2C{num}_SCL",
     "I2S": "MICROPY_HW_I2S{num}",
@@ -76,487 +36,337 @@ CONDITIONAL_VAR = {
     "CAN": "MICROPY_HW_CAN{num}_TX",
 }
 
-
-def parse_port_pin(name_str):
-    """Parses a string and returns a (port-num, pin-num) tuple."""
-    if len(name_str) < 3:
-        raise ValueError("Expecting pin name to be at least 3 characters.")
-    if name_str[0] != "P":
-        raise ValueError("Expecting pin name to start with P")
-    if name_str[1] < "A" or name_str[1] > "K":
-        raise ValueError("Expecting pin port to be between A and K")
-    port = ord(name_str[1]) - ord("A")
-    pin_str = name_str[2:]
-    if not pin_str.isdigit():
-        raise ValueError("Expecting numeric pin number.")
-    return (port, int(pin_str))
+# Contains the result of parsing an cell from af.csv.
+PinAf = namedtuple(
+    "PinAf",
+    [
+        "af_idx",  # int, 0-15
+        "af_fn",  # e.g. "I2C"
+        "af_unit",  # int, e.g. 1 (for I2C1) or None (for OTG_HS_ULPI_CK)
+        "af_pin",  # e.g. "SDA"
+        "af_supported",  # bool, see table above
+        "af_name",  # e.g. "I2C1_SDA"
+    ],
+)
 
 
-def split_name_num(name_num):
-    num = None
-    for num_idx in range(len(name_num) - 1, -1, -1):
-        if not name_num[num_idx].isdigit():
-            name = name_num[0 : num_idx + 1]
-            num_str = name_num[num_idx + 1 :]
-            if len(num_str) > 0:
-                num = int(num_str)
-            break
-    return name, num
+class Stm32Pin(boardgen.Pin):
+    def __init__(self, cpu_pin_name):
+        super().__init__(cpu_pin_name)
 
+        # P<port><num> (already verified by validate_cpu_pin_name).
+        self._port = cpu_pin_name[1]
+        self._pin = int(cpu_pin_name[2:])
 
-def conditional_var(name_num):
-    # Try the specific instance first. For example, if name_num is UART4_RX
-    # then try UART4 first, and then try UART second.
-    name, num = split_name_num(name_num)
-    var = []
-    if name in CONDITIONAL_VAR:
-        var.append(CONDITIONAL_VAR[name].format(num=num))
-    if name_num in CONDITIONAL_VAR:
-        var.append(CONDITIONAL_VAR[name_num])
-    return var
+        # List of PinAf instances.
+        self._afs = []
 
+        # The channel that this pin uses on each of the listed units.
+        self._adc_channel = 0
+        # e.g. ADC123 -> [1,2,3]
+        self._adc_units = []
 
-def print_conditional_if(cond_var, file):
-    if cond_var:
-        cond_str = []
-        for var in cond_var:
-            if var.find("ENABLE") >= 0:
-                cond_str.append("(defined({0}) && {0})".format(var))
+    # Called for each AF defined in the csv file for this pin. e.g. "SPI2_NSS/I2S2_WS"
+    def add_af(self, af_idx, af_name, af):
+        if af_idx > 16:
+            # The AF csv files should not have more than 16 AFs + 1 ADC list.
+            return
+
+        # AF 16 is the ADC, which is special cased below.
+        if af_idx == 16:
+            if af_name != "ADC":
+                raise boardgen.PinGeneratorError(
+                    "Invalid AF column name '{:s}' for ADC column with index {:d}.".format(
+                        af_name, af_idx
+                    )
+                )
+            return self.add_adc(af)
+
+        if af_name != "AF{:d}".format(af_idx):
+            raise boardgen.PinGeneratorError(
+                "Invalid AF column name '{:s}' for AF index {:d}.".format(af_name, af_idx)
+            )
+
+        # If there is a slash, then the slash separates multiple aliases for
+        # the same alternate function.
+        for af_name in af.split("/"):
+            if not af_name.strip():
+                continue
+            # This matches <fn><unit>_<pin>, with consideration for:
+            #  - fn may contain a digit (e.g. I2C)
+            #  - there may be an "ext" after the unit
+            m = re.match("([A-Z0-9]+[A-Z])(([0-9]+)(ext)?)?(_(.*))?", af_name)
+            if not m:
+                raise boardgen.PinGeneratorError(
+                    "Invalid af '{:s}' for pin '{:s}'".format(af_name, self.name())
+                )
             else:
-                cond_str.append("defined({0})".format(var))
-        print("#if " + " || ".join(cond_str), file=file)
+                af_fn = m.group(1)
+                af_unit = int(m.group(3)) if m.group(3) is not None else None
+                af_ext = m.group(4) == "ext"
+                af_pin = m.group(6)
 
+                # Special case. We change I2S2ext_SD into I2S2_EXTSD so that it parses
+                # the same way the other peripherals do.
+                if af_ext:
+                    af_pin = "EXT" + af_pin
 
-def print_conditional_endif(cond_var, file):
-    if cond_var:
-        print("#endif", file=file)
+                af_supported = af_fn in SUPPORTED_AF and af_pin in SUPPORTED_AF[af_fn]
 
+                self._afs.append(PinAf(af_idx, af_fn, af_unit, af_pin, af_supported, af_name))
 
-class AlternateFunction(object):
-    """Holds the information associated with a pins alternate function."""
-
-    def __init__(self, idx, af_str):
-        self.idx = idx
-        # Special case. We change I2S2ext_SD into I2S2_EXTSD so that it parses
-        # the same way the other peripherals do.
-        af_str = af_str.replace("ext_", "_EXT")
-
-        self.af_str = af_str
-
-        self.func = ""
-        self.fn_num = None
-        self.pin_type = ""
-        self.supported = False
-
-        af_words = af_str.split("_", 1)
-        self.func, self.fn_num = split_name_num(af_words[0])
-        if len(af_words) > 1:
-            self.pin_type = af_words[1]
-        if self.func in SUPPORTED_FN:
-            pin_types = SUPPORTED_FN[self.func]
-            if self.pin_type in pin_types:
-                self.supported = True
-
-    def is_supported(self):
-        return self.supported
-
-    def ptr(self):
-        """Returns the numbered function (i.e. USART6) for this AF."""
-        if self.fn_num is None:
-            return self.func
-        return "{:s}{:d}".format(self.func, self.fn_num)
-
-    def mux_name(self):
-        return "AF{:d}_{:s}".format(self.idx, self.ptr())
-
-    def print(self, out_source):
-        """Prints the C representation of this AF."""
-        cond_var = None
-        if self.supported:
-            cond_var = conditional_var("{}{}".format(self.func, self.fn_num))
-            print_conditional_if(cond_var, file=out_source)
-            print("  AF", end="", file=out_source)
-        else:
-            print("  //", end="", file=out_source)
-        fn_num = self.fn_num
-        if fn_num is None:
-            fn_num = 0
-        print(
-            "({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}".format(
-                self.idx, self.func, fn_num, self.pin_type, self.ptr(), self.af_str
-            ),
-            file=out_source,
-        )
-        print_conditional_endif(cond_var, file=out_source)
-
-
-class Pin(object):
-    """Holds the information associated with a pin."""
-
-    def __init__(self, port, pin):
-        self.port = port
-        self.pin = pin
-        self.alt_fn = []
-        self.alt_fn_count = 0
-        self.adc_num = 0
-        self.adc_channel = 0
-        self.board_pin = False
-
-    def port_letter(self):
-        return chr(self.port + ord("A"))
-
-    def cpu_pin_name(self):
-        return "{:s}{:d}".format(self.port_letter(), self.pin)
-
-    def is_board_pin(self):
-        return self.board_pin
-
-    def set_is_board_pin(self):
-        self.board_pin = True
-
-    def parse_adc(self, adc_str):
-        if adc_str[:3] != "ADC":
+    # ADCs are slash separated "ADC<list of units>_<mode><channel>", where unit=1,2,3,4,5 and mode=IN,INN,INP
+    def add_adc(self, adc):
+        if not adc.strip():
             return
-        adc, channel = None, None
 
-        if adc_str.find("_INP") != -1:
-            # STM32H7xx, entries have the form: ADCxx_IN[PN]yy/...
-            sep = "_INP"
-        else:
-            # all other MCUs, entries have the form: ADCxx_INyy
-            sep = "_IN"
+        # TODO: This needs to be improved to support the case where a pin can
+        # be the P for one channel, and the N for a different channel.
+        # e.g. "ADC123_INP12/ADC123_INN11".
+        for adc_name in adc.split("/"):
+            m = re.match("ADC([1-5]+)_(IN[NP]?)([0-9]+)$", adc_name)
+            if not m:
+                raise boardgen.PinGeneratorError(
+                    "Invalid adc '{:s}' for pin '{:s}'".format(adc_name, self.name())
+                )
+            adc_units = [int(x) for x in m.group(1)]
+            _adc_mode = m.group(2)
+            adc_channel = int(m.group(3))
 
-        # Pick the entry with the most ADC peripherals
-        for ss in adc_str.split("/"):
-            if ss.find(sep) != -1:
-                a, c = ss.split("_")
-                if adc is None or len(a) > len(adc):
-                    adc, channel = a, c
-        if adc is None:
-            return
-        channel = channel[len(sep) - 1 :]
-
-        for idx in range(3, len(adc)):
-            adc_num = int(adc[idx])  # 1, 2, or 3
-            self.adc_num |= 1 << (adc_num - 1)
-        self.adc_channel = int(channel)
-
-    def parse_af(self, af_idx, af_strs_in):
-        if len(af_strs_in) == 0:
-            return
-        # If there is a slash, then the slash separates 2 aliases for the
-        # same alternate function.
-        af_strs = af_strs_in.split("/")
-        for af_str in af_strs:
-            alt_fn = AlternateFunction(af_idx, af_str)
-            self.alt_fn.append(alt_fn)
-            if alt_fn.is_supported():
-                self.alt_fn_count += 1
-
-    def alt_fn_name(self, null_if_0=False):
-        if null_if_0 and self.alt_fn_count == 0:
-            return "NULL"
-        return "pin_{:s}_af".format(self.cpu_pin_name())
-
-    def adc_num_str(self):
-        str = ""
-        for adc_num in range(1, 4):
-            if self.adc_num & (1 << (adc_num - 1)):
-                if len(str) > 0:
-                    str += " | "
-                str += "PIN_ADC"
-                str += chr(ord("0") + adc_num)
-        if len(str) == 0:
-            str = "0"
-        return str
-
-    def print(self, out_source):
-        if self.alt_fn_count == 0:
-            print("// ", end="", file=out_source)
-        print("const pin_af_obj_t {:s}[] = {{".format(self.alt_fn_name()), file=out_source)
-        for alt_fn in self.alt_fn:
-            alt_fn.print(out_source)
-        if self.alt_fn_count == 0:
-            print("// ", end="", file=out_source)
-        print("};", file=out_source)
-        print("", file=out_source)
-        print(
-            "const machine_pin_obj_t pin_{:s}_obj = PIN({:s}, {:d}, {:s}, {:s}, {:d});".format(
-                self.cpu_pin_name(),
-                self.port_letter(),
-                self.pin,
-                self.alt_fn_name(null_if_0=True),
-                self.adc_num_str(),
-                self.adc_channel,
-            ),
-            file=out_source,
-        )
-        print("", file=out_source)
-
-    def print_header(self, out_header):
-        n = self.cpu_pin_name()
-        print("extern const machine_pin_obj_t pin_{:s}_obj;".format(n), file=out_header)
-        print("#define pin_{:s} (&pin_{:s}_obj)".format(n, n), file=out_header)
-        if self.alt_fn_count > 0:
-            print("extern const pin_af_obj_t pin_{:s}_af[];".format(n), file=out_header)
-
-
-class NamedPin(object):
-    def __init__(self, name, pin):
-        if name.startswith("-"):
-            self._is_hidden = True
-            self._name = name[1:]
-        else:
-            self._is_hidden = False
-            self._name = name
-        self._pin = pin
-
-    def set_hidden(self, value):
-        self._is_hidden = value
-
-    def is_hidden(self):
-        return self._is_hidden
-
-    def pin(self):
-        return self._pin
+            # Pick the entry with the most ADC units, e.g. "ADC1_INP16/ADC12_INN1/ADC12_INP0" --> "ADC12_INN1".
+            if len(adc_units) > len(self._adc_units):
+                self._adc_units = adc_units
+                self._adc_channel = adc_channel
 
+    # STM32-specific behavior, strip the "P" from the start of the name when emitting this pin.
+    # e.g. the #define is pin_A11 not pin_PA11. Fortunately we don't have to special case this
+    # as there are no places where emit the full "PA11" name.
     def name(self):
-        return self._name
+        return self._cpu_pin_name[1:]
 
-
-class Pins(object):
-    def __init__(self):
-        self.cpu_pins = []  # list of NamedPin objects
-        self.board_pins = []  # list of NamedPin objects
-        self.adc_table_size = {}  # maps ADC number X to size of pin_adcX table
-
-    def find_pin(self, port_num, pin_num):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.port == port_num and pin.pin == pin_num:
-                return named_pin
-
-    def parse_af_file(self, filename, pinname_col, af_col):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                try:
-                    (port_num, pin_num) = parse_port_pin(row[pinname_col])
-                except:
-                    continue
-                pin = Pin(port_num, pin_num)
-                for af_idx in range(af_col, len(row)):
-                    if af_idx < af_col + 16:
-                        pin.parse_af(af_idx - af_col, row[af_idx])
-                    elif af_idx == af_col + 16:
-                        pin.parse_adc(row[af_idx])
-                self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin))
-
-    def parse_board_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                if len(row) == 0 or row[0].startswith("#"):
-                    # Skip empty lines, and lines starting with "#"
-                    continue
-                if len(row) != 2:
-                    raise ValueError("Expecting two entries in a row")
-
-                cpu_pin_name = row[1]
-                cpu_pin_hidden = False
-                if cpu_pin_name.startswith("-"):
-                    cpu_pin_name = cpu_pin_name[1:]
-                    cpu_pin_hidden = True
-                try:
-                    (port_num, pin_num) = parse_port_pin(cpu_pin_name)
-                except:
-                    continue
-                named_pin = self.find_pin(port_num, pin_num)
-                if named_pin:
-                    named_pin.set_hidden(cpu_pin_hidden)
-                    pin = named_pin.pin()
-                    pin.set_is_board_pin()
-                    if row[0]:  # Only add board pins that have a name
-                        self.board_pins.append(NamedPin(row[0], pin))
-
-    def print_named(self, label, named_pins, out_source):
-        print(
-            "STATIC const mp_rom_map_elem_t machine_pin_{:s}_pins_locals_dict_table[] = {{".format(
-                label
-            ),
-            file=out_source,
+    # Use the PIN() macro defined in stm32f4xx_prefix.c for defining the pin
+    # objects.
+    def definition(self):
+        # Generate bitfield of supported ADC units where lsb is unit 1 (e.g. [1,3] --> 0b101).
+        adc_units_bitfield = (
+            " | ".join("PIN_ADC{}".format(unit) for unit in self._adc_units) or "0"
         )
-        for named_pin in named_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin() and not named_pin.is_hidden():
+
+        # PIN(p_port, p_pin, p_af, p_adc_num, p_adc_channel)
+        return "PIN({:s}, {:d}, pin_{:s}_af, {:s}, {:d})".format(
+            self._port, self._pin, self.name(), adc_units_bitfield, self._adc_channel
+        )
+
+    # This will be called at the start of the output (after the prefix). Use
+    # it to emit the af objects (via the AF() macro).
+    def print_source(self, out_source):
+        print(file=out_source)
+        print("const pin_af_obj_t pin_{:s}_af[] = {{".format(self.name()), file=out_source)
+        for af in self._afs:
+            if af.af_fn in CONDITIONAL_VAR:
                 print(
-                    "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}_obj) }},".format(
-                        named_pin.name(), pin.cpu_pin_name()
+                    "    #if defined({:s})".format(
+                        CONDITIONAL_VAR[af.af_fn].format(num=af.af_unit)
                     ),
                     file=out_source,
                 )
-        print("};", file=out_source)
-        print(
-            "MP_DEFINE_CONST_DICT(machine_pin_{:s}_pins_locals_dict, machine_pin_{:s}_pins_locals_dict_table);".format(
-                label, label
-            ),
-            file=out_source,
-        )
-
-    def print(self, out_source):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin():
-                pin.print(out_source)
-        self.print_named("cpu", self.cpu_pins, out_source)
-        print("", file=out_source)
-        self.print_named("board", self.board_pins, out_source)
-
-    def print_adc(self, adc_num, out_source):
-        adc_pins = {}
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if (
-                pin.is_board_pin()
-                and not named_pin.is_hidden()
-                and (pin.adc_num & (1 << (adc_num - 1)))
-            ):
-                adc_pins[pin.adc_channel] = pin
-        if adc_pins:
-            table_size = max(adc_pins) + 1
-        else:
-            # If ADCx pins are hidden, print an empty table to prevent linker errors.
-            table_size = 0
-        self.adc_table_size[adc_num] = table_size
-        print("", file=out_source)
-        print(
-            "const machine_pin_obj_t * const pin_adc{:d}[{:d}] = {{".format(adc_num, table_size),
-            file=out_source,
-        )
-        for channel in range(table_size):
-            if channel in adc_pins:
-                obj = "&pin_{:s}_obj".format(adc_pins[channel].cpu_pin_name())
+            if af.af_supported:
+                print("    ", end="", file=out_source)
             else:
-                obj = "NULL"
-            print("  [{:d}] = {},".format(channel, obj), file=out_source)
+                print("    // ", end="", file=out_source)
+            # AF(af_idx, af_fn, af_unit, af_type, af_ptr)
+            print(
+                "AF({:d}, {:s}, {:d}, {:s}, {:s}{:s}),  // {:s}".format(
+                    af.af_idx,
+                    af.af_fn,
+                    af.af_unit or 0,
+                    af.af_pin or "NONE",
+                    af.af_fn,
+                    "" if af.af_unit is None else str(af.af_unit),
+                    af.af_name,
+                ),
+                file=out_source,
+            )
+            if af.af_fn in CONDITIONAL_VAR:
+                print("    #endif", file=out_source)
         print("};", file=out_source)
 
-    def print_header(self, out_header, obj_decls):
-        if obj_decls:
-            for named_pin in self.cpu_pins:
-                pin = named_pin.pin()
-                if pin.is_board_pin():
-                    pin.print_header(out_header)
-            for adc_num, table_size in self.adc_table_size.items():
-                print(
-                    "extern const machine_pin_obj_t * const pin_adc{:d}[{:d}];".format(
-                        adc_num, table_size
-                    ),
-                    file=out_header,
-                )
-        # provide #define's mapping board to cpu name
-        for named_pin in self.board_pins:
+    # STM32 cpu names must be "P<port><num>".
+    @staticmethod
+    def validate_cpu_pin_name(cpu_pin_name):
+        boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
+
+        if not re.match("P[A-K][0-9]+$", cpu_pin_name):
+            raise boardgen.PinGeneratorError("Invalid cpu pin name '{}'".format(cpu_pin_name))
+
+
+class Stm32PinGenerator(boardgen.PinGenerator):
+    def __init__(self):
+        # Use custom pin type above, and also enable the --af-csv argument so
+        # that add_af gets called on each pin.
+        super().__init__(
+            pin_type=Stm32Pin,
+            enable_af=True,
+        )
+
+    # STM32-specific behavior, we use pin_A0 for the cpu names, but
+    # pyb_pin_X11 for the board names.
+    def board_name_define_prefix(self):
+        return "pyb_"
+
+    # Override the default implementation just to change the default arguments
+    # (extra header row, skip first column).
+    def parse_af_csv(self, filename):
+        return super().parse_af_csv(filename, header_rows=2, pin_col=1, af_col=2)
+
+    # Find which ADCs are used on this chip and on how many pins and the
+    # maximum channel number for each.
+    def count_adc_pins(self):
+        adc_units = defaultdict(lambda: (0, 0))
+        for pin in self._pins:  # All pins
+            for unit in pin._adc_units:
+                num, max_channel = adc_units[unit]
+                if pin._available:
+                    adc_units[unit] = num + 1, max(max_channel, pin._adc_channel)
+        return adc_units.items()
+
+    # Print table of pins for each ADC (indexed by channel).
+    def print_adcs(self, out_source):
+        for adc_unit, (num_pins, max_channel) in self.count_adc_pins():
+            print(file=out_source)
             print(
-                "#define pyb_pin_{:s} pin_{:s}".format(
-                    named_pin.name(), named_pin.pin().cpu_pin_name()
+                "const machine_pin_obj_t * const pin_adc{:d}[{:d}] = {{".format(
+                    adc_unit, max_channel + 1
                 ),
-                file=out_header,
+                file=out_source,
+            )
+            # Don't include pins that weren't in pins.csv.
+            for pin in self.available_pins():
+                if adc_unit in pin._adc_units:
+                    print(
+                        "    [{:d}] = {:s},".format(pin._adc_channel, self._cpu_pin_pointer(pin)),
+                        file=out_source,
+                    )
+            print("};", file=out_source)
+
+    # Print externs for the adc pin tables.
+    def print_adc_externs(self, out_source):
+        print(file=out_source)
+        for adc_unit, (num_pins, max_channel) in self.count_adc_pins():
+            print(
+                "extern const machine_pin_obj_t * const pin_adc{:d}[{:d}];".format(
+                    adc_unit, max_channel + 1
+                ),
+                file=out_source,
             )
 
-    def print_af_hdr(self, out_af_const):
-        af_hdr_set = set([])
-        mux_name_width = 0
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin():
-                for af in pin.alt_fn:
-                    if af.is_supported():
-                        mux_name = af.mux_name()
-                        af_hdr_set |= set([mux_name])
-                        if len(mux_name) > mux_name_width:
-                            mux_name_width = len(mux_name)
-        for mux_name in sorted(af_hdr_set):
-            af_words = mux_name.split("_")  # ex mux_name: AF9_I2C2
-            cond_var = conditional_var(af_words[1])
-            print_conditional_if(cond_var, file=out_af_const)
-            key = "MP_ROM_QSTR(MP_QSTR_{}),".format(mux_name)
-            val = "MP_ROM_INT(GPIO_{})".format(mux_name)
-            print("    { %-*s %s }," % (mux_name_width + 26, key, val), file=out_af_const)
-            print_conditional_endif(cond_var, file=out_af_const)
+    # Append ADC definitions to the end of the source output.
+    def print_source(self, out_source):
+        super().print_source(out_source)
+        self.print_adcs(out_source)
 
-    def print_af_defs(self, out_af_defs, cmp_strings):
-        STATIC_AF_TOKENS = {}
-        for named_pin in self.cpu_pins:
-            for af in named_pin.pin().alt_fn:
-                func = "%s%d" % (af.func, af.fn_num) if af.fn_num else af.func
-                pin_type = (af.pin_type or "NULL").split("(")[0]
-                tok = "#define STATIC_AF_%s_%s(pin_obj) ( \\" % (func, pin_type)
-                if tok not in STATIC_AF_TOKENS:
-                    STATIC_AF_TOKENS[tok] = []
-                if cmp_strings:
-                    pin_name = named_pin.pin().cpu_pin_name()
-                    cmp_str = (
-                        '    ((strcmp( #pin_obj , "(&pin_%s_obj)") '
-                        ' & strcmp( #pin_obj , "((&pin_%s_obj))")) == 0) ? (%d) : \\'
-                        % (pin_name, pin_name, af.idx)
+    # Append ADC externs to the end of the header output, and don't include
+    # externs in mboot mode.
+    def print_header(self, out_header):
+        if self.args.mboot_mode:
+            self.print_defines(out_header, cpu=False)
+        else:
+            super().print_header(out_header)
+            self.print_adc_externs(out_header)
+
+    # This is a set of map entries `MP_QSTR_AF<num>_<fn>` -> `GPIO_AF<num>_<fn>`
+    # that become part of the locals dict of machine.Pin.
+    def print_af_const(self, out_af_const):
+        # Extract all unique "AF<num>_<fn>" values.
+        names = set()
+        for pin in self.available_pins():
+            for af in pin._afs:
+                if not af.af_supported:
+                    continue
+                key = (
+                    "AF{:d}_{:s}{:d}".format(af.af_idx, af.af_fn, af.af_unit),
+                    af.af_fn,
+                    af.af_unit,
+                )
+                names.add(key)
+
+        # Generate the table.
+        for key in sorted(names):
+            name, af_fn, af_unit = key
+            if af_fn in CONDITIONAL_VAR:
+                print(
+                    "    #if defined({:s})".format(CONDITIONAL_VAR[af_fn].format(num=af_unit)),
+                    file=out_af_const,
+                )
+            print(
+                "    {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_INT(GPIO_{:s}) }},".format(name, name),
+                file=out_af_const,
+            )
+            if af_fn in CONDITIONAL_VAR:
+                print("    #endif", file=out_af_const)
+
+    # Output macros to compile-time match a pin object to its AF. See
+    # mp_hal_pin_config_alt_static and mp_hal_pin_config_alt_static_speed in
+    # pin_static_af.h.
+    def print_af_defs(self, out_af_defs):
+        # Get the set of unique "<fn><unit>_<pinfn>" (e.g. I2C1_SDA) and which
+        # pins can be used for each.
+        af_defs = defaultdict(list)
+        for pin in self._pins:
+            for af in pin._afs:
+                key = af.af_fn, af.af_unit, af.af_pin
+                af_defs[key].append((pin, af.af_idx))
+
+        # Emit a macro for each that will match a pin object to the
+        # corresponding af index for that pin doing that function.
+        for key, pins in af_defs.items():
+            af_fn, af_unit, af_pin = key
+            print(file=out_af_defs)
+            print(
+                "#define STATIC_AF_{:s}{:s}_{:s}(pin_obj) ( \\".format(
+                    af_fn, "" if af_unit is None else str(af_unit), af_pin or "NULL"
+                ),
+                file=out_af_defs,
+            )
+            for pin, af_idx in pins:
+                if self.args.mboot_mode:
+                    print(
+                        "    ((pin_obj) == (pin_{:s})) ? ({:d}) : \\".format(pin.name(), af_idx),
+                        file=out_af_defs,
                     )
                 else:
-                    cmp_str = "    ((pin_obj) == (pin_%s)) ? (%d) : \\" % (
-                        named_pin.pin().cpu_pin_name(),
-                        af.idx,
+                    # Match either "(pin_A11_obj)" (if using pin_A11 or
+                    # pyb_pin_X11) or "((pin_A11_obj))" (if going via another
+                    # macro e.g. MICROPY_HW_QSPIFLASH_CS).
+                    # TODO: Why do we need do do string matching? (i.e. why can't the mboot behavior be used always?).
+                    print(
+                        '    ((strcmp( #pin_obj , "(&pin_{:s}_obj)") & strcmp( #pin_obj , "((&pin_{:s}_obj))")) == 0) ? ({:d}) : \\'.format(
+                            pin.name(), pin.name(), af_idx
+                        ),
+                        file=out_af_defs,
                     )
-                STATIC_AF_TOKENS[tok].append(cmp_str)
+            print("    (0xffffffffffffffffULL))", file=out_af_defs)
 
-        for tok, pins in STATIC_AF_TOKENS.items():
-            print(tok, file=out_af_defs)
-            print("\n".join(sorted(pins)), file=out_af_defs)
-            print("    (0xffffffffffffffffULL))\n", file=out_af_defs)
+    # Additional stm32-specific outputs that will be written in
+    # generate_extra_files().
+    def extra_args(self, parser):
+        parser.add_argument("--output-af-const")
+        parser.add_argument("--output-af-defs")
 
+        # In mboot mode the af-defs use object rather than string comparison,
+        # and we don't include externs in the header file.
+        parser.add_argument("--mboot-mode", action="store_true")
 
-def main():
-    parser = argparse.ArgumentParser(description="Generate board specific pin file")
-    parser.add_argument("--board-csv")
-    parser.add_argument("--af-csv")
-    parser.add_argument("--prefix")
-    parser.add_argument("--output-source")
-    parser.add_argument("--output-header")
-    parser.add_argument("--output-af-const")
-    parser.add_argument("--output-af-defs")
-    parser.add_argument("--mboot-mode", action="store_true")
-    args = parser.parse_args()
+    # Called in main() after everything else is done to write additional files.
+    def generate_extra_files(self):
+        if self.args.output_af_const:
+            with open(self.args.output_af_const, "w") as out_af_const:
+                self.print_af_const(out_af_const)
 
-    pins = Pins()
-
-    with open(args.output_source, "w") as out_source:
-        print("// This file was automatically generated by make-pins.py", file=out_source)
-        print("//", file=out_source)
-        if args.af_csv:
-            print("// --af {:s}".format(args.af_csv), file=out_source)
-            pins.parse_af_file(args.af_csv, 1, 2)
-
-        if args.board_csv:
-            print("// --board {:s}".format(args.board_csv), file=out_source)
-            pins.parse_board_file(args.board_csv)
-
-        if args.prefix:
-            print("// --prefix {:s}".format(args.prefix), file=out_source)
-            print("", file=out_source)
-            with open(args.prefix, "r") as prefix_file:
-                print(prefix_file.read(), file=out_source)
-
-        pins.print(out_source)
-        for i in range(1, 4):
-            pins.print_adc(i, out_source)
-
-    with open(args.output_header, "w") as out_header:
-        pins.print_header(out_header, not args.mboot_mode)
-
-    with open(args.output_af_const, "w") as out_af_const:
-        pins.print_af_hdr(out_af_const)
-
-    with open(args.output_af_defs, "w") as out_af_defs:
-        pins.print_af_defs(out_af_defs, not args.mboot_mode)
+        if self.args.output_af_defs:
+            with open(self.args.output_af_defs, "w") as out_af_defs:
+                self.print_af_defs(out_af_defs)
 
 
 if __name__ == "__main__":
-    main()
+    Stm32PinGenerator().main()
diff --git a/tools/boardgen.py b/tools/boardgen.py
index bef8e74727..caa9fe851c 100644
--- a/tools/boardgen.py
+++ b/tools/boardgen.py
@@ -344,8 +344,13 @@ class PinGenerator:
     def _cpu_pin_pointer(self, pin):
         return "&pin_{:s}_obj".format(pin.name())
 
+    # Allow a port to prefix the board pin macro names with something.
+    # e.g. STM32 does pyb_pin_NAME whereas other ports using pin_NAME.
+    def board_name_define_prefix(self):
+        return ""
+
     # Print the pin_CPUNAME and pin_BOARDNAME macros.
-    def print_defines(self, out_header):
+    def print_defines(self, out_header, cpu=True, board=True):
         # Provide #defines for each cpu pin.
         for pin in self.available_pins():
             print(file=out_header)
@@ -354,29 +359,70 @@ class PinGenerator:
                 print("#if {}".format(m), file=out_header)
 
             # #define pin_CPUNAME (...)
-            print(
-                "#define pin_{:s} ({:s})".format(pin.name(), self._cpu_pin_pointer(pin)),
-                file=out_header,
-            )
-
-            # #define pin_BOARDNAME (pin_CPUNAME)
-            for board_pin_name, _board_hidden in pin._board_pin_names:
-                # Note: Hidden board pins are still available to C via the macro.
+            if cpu:
                 print(
-                    "#define pin_{:s} (pin_{:s})".format(
-                        board_pin_name,
-                        pin.name(),
-                    ),
+                    "#define pin_{:s} ({:s})".format(pin.name(), self._cpu_pin_pointer(pin)),
                     file=out_header,
                 )
 
+            # #define pin_BOARDNAME (pin_CPUNAME)
+            if board:
+                for board_pin_name, _board_hidden in pin._board_pin_names:
+                    # Note: Hidden board pins are still available to C via the macro.
+                    # Note: The RHS isn't wrapped in (), which is necessary to make the
+                    # STATIC_AF_ macro work on STM32.
+                    print(
+                        "#define {:s}pin_{:s} pin_{:s}".format(
+                            self.board_name_define_prefix(),
+                            board_pin_name,
+                            pin.name(),
+                        ),
+                        file=out_header,
+                    )
+
+            if m:
+                print("#endif", file=out_header)
+
+    def print_pin_objects(self, out_source):
+        print(file=out_source)
+        for pin in self.available_pins():
+            m = pin.enable_macro()
+            if m:
+                print("#if {}".format(m), file=out_source)
+            print(
+                "{:s}machine_pin_obj_t pin_{:s}_obj = {:s};".format(
+                    "const " if pin.is_const() else "",
+                    pin.name(),
+                    pin.definition(),
+                ),
+                file=out_source,
+            )
+            if m:
+                print("#endif", file=out_source)
+
+    def print_pin_object_externs(self, out_header):
+        print(file=out_header)
+        for pin in self.available_pins():
+            m = pin.enable_macro()
+            if m:
+                print("#if {}".format(m), file=out_header)
+            print(
+                "extern {:s}machine_pin_obj_t pin_{:s}_obj;".format(
+                    "const " if pin.is_const() else "",
+                    pin.name(),
+                ),
+                file=out_header,
+            )
             if m:
                 print("#endif", file=out_header)
 
     def print_source(self, out_source):
-        raise NotImplementedError
+        self.print_pin_objects(out_source)
+        self.print_cpu_locals_dict(out_source)
+        self.print_board_locals_dict(out_source)
 
     def print_header(self, out_header):
+        self.print_pin_object_externs(out_header)
         self.print_defines(out_header)
 
     # A port can override this if it has extra input files (e.g. af.csv) to load.
@@ -498,6 +544,10 @@ class NumericPinGenerator(PinGenerator):
         self.print_cpu_table(out_source)
         self.print_board_locals_dict(out_source)
 
+    # Replace PinGenerator's implementation to only print the defines.
+    def print_header(self, out_header):
+        self.print_defines(out_header)
+
     def _cpu_pin_pointer(self, pin):
         n = pin.index_name()
         if n is not None:

From ff6c2adfd74b6b2382414bfd6a931ffce4da92bd Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 2 Nov 2023 15:16:28 +1100
Subject: [PATCH 106/310] stm32/boards/make-pins.py: Add initial support for H7
 dual-pad pins.

This fixes the H7 af.csv files to include the dual-pad information, by
listing the ADCs supported on the _C pad with a C_ADC prefix.

Minimal change to make-pins.py to ignore these entries. This will be
implemented later to emit constants (similar to ADC.CORE_TEMP) to access
these channels.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/boards/make-pins.py     |  5 +++++
 ports/stm32/boards/stm32h723_af.csv |  4 ++--
 ports/stm32/boards/stm32h743_af.csv |  8 ++++----
 ports/stm32/boards/stm32h7b3_af.csv | 24 ++++++++++++------------
 4 files changed, 23 insertions(+), 18 deletions(-)

diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py
index 10472a093f..31e7bdb0e2 100755
--- a/ports/stm32/boards/make-pins.py
+++ b/ports/stm32/boards/make-pins.py
@@ -124,6 +124,11 @@ class Stm32Pin(boardgen.Pin):
         # be the P for one channel, and the N for a different channel.
         # e.g. "ADC123_INP12/ADC123_INN11".
         for adc_name in adc.split("/"):
+            if adc_name.startswith("C_"):
+                # Currently unsupported, H7 dual-pad. The C_ADC entries should
+                # only be available directly from machine.ADC (not via the pin
+                # object).
+                continue
             m = re.match("ADC([1-5]+)_(IN[NP]?)([0-9]+)$", adc_name)
             if not m:
                 raise boardgen.PinGeneratorError(
diff --git a/ports/stm32/boards/stm32h723_af.csv b/ports/stm32/boards/stm32h723_af.csv
index aa87379786..71873e670b 100644
--- a/ports/stm32/boards/stm32h723_af.csv
+++ b/ports/stm32/boards/stm32h723_af.csv
@@ -34,8 +34,8 @@ PortB,PB14,             ,TIM1_CH2N                           ,TIM12_CH1
 PortB,PB15,RTC_REFIN    ,TIM1_CH3N                           ,TIM12_CH2                     ,TIM8_CH3N                                         ,USART1_RX                                                           ,SPI2_MOSI/I2S2_SDO                               ,DFSDM1_CKIN2                                  ,                                                  ,UART4_CTS                                  ,SDMMC2_D1                                                   ,                                                        ,                                                                              ,FMC_D11/FMC_AD11                           ,                              ,LCD_G7         ,EVENTOUT,
 PortC,PC0 ,             ,FMC_D12/FMC_AD12                    ,                              ,DFSDM1_CKIN0                                      ,                                                                    ,                                                 ,DFSDM1_DATIN4                                 ,                                                  ,SAI4_FS_B                                  ,FMC_A25                                                     ,OTG_HS_ULPI_STP                                         ,LCD_G2                                                                        ,FMC_SDNWE                                  ,                              ,LCD_R5         ,EVENTOUT,ADC123_INP10
 PortC,PC1 ,TRACED0      ,SAI4_D1                             ,SAI1_D1                       ,DFSDM1_DATIN0                                     ,DFSDM1_CKIN4                                                        ,SPI2_MOSI/I2S2_SDO                               ,SAI1_SD_A                                     ,                                                  ,SAI4_SD_A                                  ,SDMMC2_CK                                                   ,OCTOSPIM_P1_IO4                                         ,ETH_MDC                                                                       ,MDIOS_MDC                                  ,                              ,LCD_G5         ,EVENTOUT,ADC123_INP11/ADC123_INN10
-PortC,PC2 ,PWR_DEEPSLEEP,                                    ,                              ,DFSDM1_CKIN1                                      ,OCTOSPIM_P1_IO5                                                     ,SPI2_MISO/I2S2_SDI                               ,DFSDM1_CKOUT                                  ,                                                  ,                                           ,OCTOSPIM_P1_IO2                                             ,OTG_HS_ULPI_DIR                                         ,ETH_MII_TXD2                                                                  ,FMC_SDNE0                                  ,                              ,               ,EVENTOUT,ADC123_INP12/ADC123_INN11
-PortC,PC3 ,PWR_SLEEP    ,                                    ,                              ,DFSDM1_DATIN1                                     ,OCTOSPIM_P1_IO6                                                     ,SPI2_MOSI/I2S2_SDO                               ,                                              ,                                                  ,                                           ,OCTOSPIM_P1_IO0                                             ,OTG_HS_ULPI_NXT                                         ,ETH_MII_TX_CLK                                                                ,FMC_SDCKE0                                 ,                              ,               ,EVENTOUT,ADC123_INP13/ADC123_INN12
+PortC,PC2 ,PWR_DEEPSLEEP,                                    ,                              ,DFSDM1_CKIN1                                      ,OCTOSPIM_P1_IO5                                                     ,SPI2_MISO/I2S2_SDI                               ,DFSDM1_CKOUT                                  ,                                                  ,                                           ,OCTOSPIM_P1_IO2                                             ,OTG_HS_ULPI_DIR                                         ,ETH_MII_TXD2                                                                  ,FMC_SDNE0                                  ,                              ,               ,EVENTOUT,ADC123_INP12/ADC123_INN11/C_ADC3_INN1/C_ADC3_INP0
+PortC,PC3 ,PWR_SLEEP    ,                                    ,                              ,DFSDM1_DATIN1                                     ,OCTOSPIM_P1_IO6                                                     ,SPI2_MOSI/I2S2_SDO                               ,                                              ,                                                  ,                                           ,OCTOSPIM_P1_IO0                                             ,OTG_HS_ULPI_NXT                                         ,ETH_MII_TX_CLK                                                                ,FMC_SDCKE0                                 ,                              ,               ,EVENTOUT,ADC12_INP13/ADC12_INN12/C_ADC3_INP1
 PortC,PC4 ,PWR_DEEPSLEEP,FMC_A22                             ,                              ,DFSDM1_CKIN2                                      ,                                                                    ,I2S1_MCK                                         ,                                              ,                                                  ,                                           ,SPDIFRX1_IN3                                                ,SDMMC2_CKIN                                             ,ETH_MII_RXD0/ETH_RMII_RXD0                                                    ,FMC_SDNE0                                  ,                              ,LCD_R7         ,EVENTOUT,ADC12_INP4
 PortC,PC5 ,PWR_SLEEP    ,SAI4_D3                             ,SAI1_D3                       ,DFSDM1_DATIN2                                     ,PSSI_D15                                                            ,                                                 ,                                              ,                                                  ,                                           ,SPDIFRX1_IN4                                                ,OCTOSPIM_P1_DQS                                         ,ETH_MII_RXD1/ETH_RMII_RXD1                                                    ,FMC_SDCKE0                                 ,COMP1_OUT                     ,LCD_DE         ,EVENTOUT,ADC12_INP8/ADC12_INN4
 PortC,PC6 ,             ,                                    ,TIM3_CH1                      ,TIM8_CH1                                          ,DFSDM1_CKIN3                                                        ,I2S2_MCK                                         ,                                              ,USART6_TX                                         ,SDMMC1_D0DIR                               ,FMC_NWAIT                                                   ,SDMMC2_D6                                               ,                                                                              ,SDMMC1_D6                                  ,DCMI_D0/PSSI_D0               ,LCD_HSYNC      ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32h743_af.csv b/ports/stm32/boards/stm32h743_af.csv
index 2287209c49..4a291265c4 100644
--- a/ports/stm32/boards/stm32h743_af.csv
+++ b/ports/stm32/boards/stm32h743_af.csv
@@ -1,7 +1,7 @@
 Port ,Pin ,AF0          ,AF1                       ,AF2                    ,AF3                                  ,AF4                                     ,AF5               ,AF6                           ,AF7                               ,AF8                                        ,AF9                                                  ,AF10                                          ,AF11                                           ,AF12                               ,AF13              ,AF14     ,AF15    ,ADC
      ,    ,SYS          ,TIM1/2/16/17/LPTIM1/HRTIM1,SAI1/TIM3/4/5/12/HRTIM1,LPUART/TIM8/LPTIM2/3/4/5/HRTIM1/DFSDM,I2C1/2/3/4/USART1/TIM15/LPTIM2/DFSDM/CEC,SPI1/2/3/4/5/6/CEC,SPI2/3/SAI1/3/I2C4/UART4/DFSDM,SPI2/3/6/USART1/2/3/6/UART7/SDMMC1,SPI6/SAI2/4/UART4/5/8/LPUART/SDMMC1/SPDIFRX,SAI4/FDCAN1/2/TIM13/14/QUADSPI/FMC/SDMMC2/LCD/SPDIFRX,SAI2/4/TIM8/QUADSPI/SDMMC2/OTG1_HS/OTG2_FS/LCD,I2C4/UART7/SWPMI1/TIM1/8/DFSDM/SDMMC2/MDIOS/ETH,TIM1/8/FMC/SDMMC1/MDIOS/OTG1_FS/LCD,TIM1/DCMI/LCD/COMP,UART5/LCD,SYS     ,ADC
-PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR         ,TIM5_CH1               ,TIM8_ETR                             ,TIM15_BKIN                              ,                  ,                              ,USART2_CTS/USART2_NSS             ,UART4_TX                                   ,SDMMC2_CMD                                           ,SAI2_SD_B                                     ,ETH_MII_CRS                                    ,                                   ,                  ,         ,EVENTOUT,ADC1_INP16/ADC12_INN1/ADC12_INP0
-PortA,PA1 ,             ,TIM2_CH2                  ,TIM5_CH2               ,LPTIM3_OUT                           ,TIM15_CH1N                              ,                  ,                              ,USART2_RTS                        ,UART4_RX                                   ,QUADSPI_BK1_IO3                                      ,SAI2_MCK_B                                    ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK                ,                                   ,                  ,LCD_R2   ,EVENTOUT,ADC1_INN16/ADC1_INP17/ADC12_INP1
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR         ,TIM5_CH1               ,TIM8_ETR                             ,TIM15_BKIN                              ,                  ,                              ,USART2_CTS/USART2_NSS             ,UART4_TX                                   ,SDMMC2_CMD                                           ,SAI2_SD_B                                     ,ETH_MII_CRS                                    ,                                   ,                  ,         ,EVENTOUT,ADC1_INP16/C_ADC12_INN1/C_ADC12_INP0
+PortA,PA1 ,             ,TIM2_CH2                  ,TIM5_CH2               ,LPTIM3_OUT                           ,TIM15_CH1N                              ,                  ,                              ,USART2_RTS                        ,UART4_RX                                   ,QUADSPI_BK1_IO3                                      ,SAI2_MCK_B                                    ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK                ,                                   ,                  ,LCD_R2   ,EVENTOUT,ADC1_INN16/ADC1_INP17/C_ADC12_INP1
 PortA,PA2 ,             ,TIM2_CH3                  ,TIM5_CH3               ,LPTIM4_OUT                           ,TIM15_CH1                               ,                  ,                              ,USART2_TX                         ,SAI2_SCK_B                                 ,                                                     ,                                              ,ETH_MDIO                                       ,MDIOS_MDIO                         ,                  ,LCD_R1   ,EVENTOUT,ADC12_INP14
 PortA,PA3 ,             ,TIM2_CH4                  ,TIM5_CH4               ,LPTIM5_OUT                           ,TIM15_CH2                               ,                  ,                              ,USART2_RX                         ,                                           ,LCD_B2                                               ,OTG_HS_ULPI_D0                                ,ETH_MII_COL                                    ,                                   ,                  ,LCD_B5   ,EVENTOUT,ADC12_INP15
 PortA,PA4 ,             ,                          ,TIM5_ETR               ,                                     ,                                        ,SPI1_NSS/I2S1_WS  ,SPI3_NSS/I2S3_WS              ,USART2_CK                         ,SPI6_NSS                                   ,                                                     ,                                              ,                                               ,OTG_HS_SOF                         ,DCMI_HSYNC        ,LCD_VSYNC,EVENTOUT,ADC12_INP18
@@ -34,8 +34,8 @@ PortB,PB14,             ,TIM1_CH2N                 ,TIM12_CH1              ,TIM8
 PortB,PB15,RTC_REFIN    ,TIM1_CH3N                 ,TIM12_CH2              ,TIM8_CH3N                            ,USART1_RX                               ,SPI2_MOSI/I2S2_SDO,DFSDM_CKIN2                   ,                                  ,UART4_CTS                                  ,SDMMC2_D1                                            ,                                              ,                                               ,OTG_HS_DP                          ,                  ,         ,EVENTOUT,
 PortC,PC0 ,             ,                          ,                       ,DFSDM_CKIN0                          ,                                        ,                  ,DFSDM_DATIN4                  ,                                  ,SAI2_FS_B                                  ,                                                     ,OTG_HS_ULPI_STP                               ,                                               ,FMC_SDNWE                          ,                  ,LCD_R5   ,EVENTOUT,ADC123_INP10
 PortC,PC1 ,TRACED0      ,                          ,SAI1_D1                ,DFSDM_DATIN0                         ,DFSDM_CKIN4                             ,SPI2_MOSI/I2S2_SDO,SAI1_SD_A                     ,                                  ,SAI4_SD_A                                  ,SDMMC2_CK                                            ,SAI4_D1                                       ,ETH_MDC                                        ,MDIOS_MDC                          ,                  ,         ,EVENTOUT,ADC123_INN10/ADC123_INP11
-PortC,PC2 ,             ,                          ,                       ,DFSDM_CKIN1                          ,                                        ,SPI2_MISO/I2S2_SDI,DFSDM_CKOUT                   ,                                  ,                                           ,                                                     ,OTG_HS_ULPI_DIR                               ,ETH_MII_TXD2                                   ,FMC_SDNE0                          ,                  ,         ,EVENTOUT,ADC123_INN11/ADC123_INP12/ADC3_INN1/ADC3_INP0
-PortC,PC3 ,             ,                          ,                       ,DFSDM_DATIN1                         ,                                        ,SPI2_MOSI/I2S2_SDO,                              ,                                  ,                                           ,                                                     ,OTG_HS_ULPI_NXT                               ,ETH_MII_TX_CLK                                 ,FMC_SDCKE0                         ,                  ,         ,EVENTOUT,ADC12_INN12/ADC12_INP13/ADC3_INP1
+PortC,PC2 ,             ,                          ,                       ,DFSDM_CKIN1                          ,                                        ,SPI2_MISO/I2S2_SDI,DFSDM_CKOUT                   ,                                  ,                                           ,                                                     ,OTG_HS_ULPI_DIR                               ,ETH_MII_TXD2                                   ,FMC_SDNE0                          ,                  ,         ,EVENTOUT,ADC123_INN11/ADC123_INP12/C_ADC3_INN1/C_ADC3_INP0
+PortC,PC3 ,             ,                          ,                       ,DFSDM_DATIN1                         ,                                        ,SPI2_MOSI/I2S2_SDO,                              ,                                  ,                                           ,                                                     ,OTG_HS_ULPI_NXT                               ,ETH_MII_TX_CLK                                 ,FMC_SDCKE0                         ,                  ,         ,EVENTOUT,ADC12_INN12/ADC12_INP13/C_ADC3_INP1
 PortC,PC4 ,             ,                          ,                       ,DFSDM_CKIN2                          ,                                        ,I2S1_MCK          ,                              ,                                  ,                                           ,SPDIFRX_IN2                                          ,                                              ,ETH_MII_RXD0/ETH_RMII_RXD0                     ,FMC_SDNE0                          ,                  ,         ,EVENTOUT,ADC12_INP4
 PortC,PC5 ,             ,                          ,SAI1_D3                ,DFSDM_DATIN2                         ,                                        ,                  ,                              ,                                  ,                                           ,SPDIFRX_IN3                                          ,SAI4_D3                                       ,ETH_MII_RXD1/ETH_RMII_RXD1                     ,FMC_SDCKE0                         ,COMP_1_OUT        ,         ,EVENTOUT,ADC12_INN4/ADC12_INP8
 PortC,PC6 ,             ,HRTIM_CHA1                ,TIM3_CH1               ,TIM8_CH1                             ,DFSDM_CKIN3                             ,I2S2_MCK          ,                              ,USART6_TX                         ,SDMMC1_D0DIR                               ,FMC_NWAIT                                            ,SDMMC2_D6                                     ,                                               ,SDMMC1_D6                          ,DCMI_D0           ,LCD_HSYNC,EVENTOUT,
diff --git a/ports/stm32/boards/stm32h7b3_af.csv b/ports/stm32/boards/stm32h7b3_af.csv
index 0846689a07..1acef21f37 100644
--- a/ports/stm32/boards/stm32h7b3_af.csv
+++ b/ports/stm32/boards/stm32h7b3_af.csv
@@ -1,13 +1,13 @@
 Port ,Pin ,AF0             ,AF1                ,AF2                    ,AF3                                       ,AF4                                                  ,AF5                                               ,AF6                                           ,AF7                                                    ,AF8                                             ,AF9                                                    ,AF10                                                    ,AF11                                                                    ,AF12                             ,AF13                           ,AF14      ,AF15    ,ADC
      ,    ,SYS             ,LPTIM1/TIM1/2/16/17,PDM_SAI1/TIM3/4/5/12/15,DFSDM1/LPTIM2/3/LPUART1/OCTOSPIM_P1/2/TIM8,CEC/DCMI/PSSI/DFSDM1/2/I2C1/2/3/4/LPTIM2/TIM15/USART1,CEC/SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/SPI6/I2S6,DFSDM1/2/I2C4/OCTOSPIM_P1/SAI1/SPI3/I2S3/UART4,SDMMC1/SPI2/I2S2/SPI3/I2S3/SPI6/I2S6/UART7/USART1/2/3/6,LPUART1/SAI2/SDMMC1/SPDIFRX1/SPI6/I2S6/UART4/5/8,FDCAN1/2/FMC/LCD/OCTOSPIM_P1/2/SDMMC2/SPDIFRX1/TIM13/14,CRS/FMC/LCD/OCTOSPIM_P1/OTG1_FS/OTG1_HS/SAI2/SDMMC2/TIM8,DFSDM1/2/I2C4/LCD/MDIOS/OCTOSPIM_P1/SDMMC2/SWPMI1/TIM1/8/UART7/9/USART10,FMC/LCD/MDIOS/SDMMC1/TIM1/8      ,COMP/DCMI/PSSI/LCD/TIM1        ,LCD/UART5 ,SYS     ,ADC
-PortA,PA0 ,                ,TIM2_CH1/TIM2_ETR  ,TIM5_CH1               ,TIM8_ETR                                  ,TIM15_BKIN                                           ,I2S6_WS/SPI6_NSS                                  ,                                              ,USART2_CTS/USART2_NSS                                  ,UART4_TX                                        ,SDMMC2_CMD                                             ,SAI2_SD_B                                               ,                                                                        ,                                 ,                               ,          ,EVENTOUT,ADC1_INP16
-PortA,PA1 ,                ,TIM2_CH2           ,TIM5_CH2               ,LPTIM3_OUT                                ,TIM15_CH1N                                           ,                                                  ,                                              ,USART2_DE/USART2_RTS                                   ,UART4_RX                                        ,OCTOSPIM_P1_IO3                                        ,SAI2_MCLK_B                                             ,OCTOSPIM_P1_DQS                                                         ,                                 ,                               ,LTDC_R2   ,EVENTOUT,ADC1_INN16/ADC1_INP17
+PortA,PA0 ,                ,TIM2_CH1/TIM2_ETR  ,TIM5_CH1               ,TIM8_ETR                                  ,TIM15_BKIN                                           ,I2S6_WS/SPI6_NSS                                  ,                                              ,USART2_CTS/USART2_NSS                                  ,UART4_TX                                        ,SDMMC2_CMD                                             ,SAI2_SD_B                                               ,                                                                        ,                                 ,                               ,          ,EVENTOUT,ADC1_INP16/C_ADC1_INP0/C_ADC1_INN1
+PortA,PA1 ,                ,TIM2_CH2           ,TIM5_CH2               ,LPTIM3_OUT                                ,TIM15_CH1N                                           ,                                                  ,                                              ,USART2_DE/USART2_RTS                                   ,UART4_RX                                        ,OCTOSPIM_P1_IO3                                        ,SAI2_MCLK_B                                             ,OCTOSPIM_P1_DQS                                                         ,                                 ,                               ,LTDC_R2   ,EVENTOUT,ADC1_INN16/ADC1_INP17/C_ADC1_INP1
 PortA,PA2 ,                ,TIM2_CH3           ,TIM5_CH3               ,                                          ,TIM15_CH1                                            ,                                                  ,DFSDM2_CKIN1                                  ,USART2_TX                                              ,SAI2_SCK_B                                      ,                                                       ,                                                        ,                                                                        ,MDIOS_MDIO                       ,                               ,LTDC_R1   ,EVENTOUT,ADC1_INP14
 PortA,PA3 ,                ,TIM2_CH4           ,TIM5_CH4               ,OCTOSPIM_P1_CLK                           ,TIM15_CH2                                            ,I2S6_MCK                                          ,                                              ,USART2_RX                                              ,                                                ,LTDC_B2                                                ,USB_OTG_HS_ULPI_D0                                      ,                                                                        ,                                 ,                               ,LTDC_B5   ,EVENTOUT,ADC1_INP15
 PortA,PA4 ,                ,                   ,TIM5_ETR               ,                                          ,                                                     ,I2S1_WS/SPI1_NSS                                  ,I2S3_WS/SPI3_NSS                              ,USART2_CK                                              ,I2S6_WS/SPI6_NSS                                ,                                                       ,                                                        ,                                                                        ,                                 ,DCMI_HSYNC/PSSI_DE             ,LTDC_VSYNC,EVENTOUT,ADC1_INP18
 PortA,PA5 ,PWR_NDSTOP2     ,TIM2_CH1/TIM2_ETR  ,                       ,TIM8_CH1N                                 ,                                                     ,I2S1_CK/SPI1_SCK                                  ,                                              ,                                                       ,I2S6_CK/SPI6_SCK                                ,                                                       ,USB_OTG_HS_ULPI_CK                                      ,                                                                        ,                                 ,PSSI_D14                       ,LTDC_R4   ,EVENTOUT,ADC1_INN18/ADC1_INP19
-PortA,PA6 ,                ,TIM1_BKIN          ,TIM3_CH1               ,TIM8_BKIN                                 ,                                                     ,I2S1_SDI/SPI1_MISO                                ,OCTOSPIM_P1_IO3                               ,                                                       ,I2S6_SDI/SPI6_MISO                              ,TIM13_CH1                                              ,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2                         ,MDIOS_MDC                                                               ,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2  ,DCMI_PIXCLK/PSSI_PDCK          ,LTDC_G2   ,EVENTOUT,ADC1_INP3/ADC2_INP3
-PortA,PA7 ,                ,TIM1_CH1N          ,TIM3_CH2               ,TIM8_CH1N                                 ,DFSDM2_DATIN1                                        ,I2S1_SDO/SPI1_MOSI                                ,                                              ,                                                       ,I2S6_SDO/SPI6_MOSI                              ,TIM14_CH1                                              ,OCTOSPIM_P1_IO2                                         ,                                                                        ,FMC_SDNWE                        ,                               ,LTDC_VSYNC,EVENTOUT,ADC1_INN3/ADC1_INP7/ADC2_INN3/ADC2_INP7
+PortA,PA6 ,                ,TIM1_BKIN          ,TIM3_CH1               ,TIM8_BKIN                                 ,                                                     ,I2S1_SDI/SPI1_MISO                                ,OCTOSPIM_P1_IO3                               ,                                                       ,I2S6_SDI/SPI6_MISO                              ,TIM13_CH1                                              ,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2                         ,MDIOS_MDC                                                               ,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2  ,DCMI_PIXCLK/PSSI_PDCK          ,LTDC_G2   ,EVENTOUT,ADC12_INP3
+PortA,PA7 ,                ,TIM1_CH1N          ,TIM3_CH2               ,TIM8_CH1N                                 ,DFSDM2_DATIN1                                        ,I2S1_SDO/SPI1_MOSI                                ,                                              ,                                                       ,I2S6_SDO/SPI6_MOSI                              ,TIM14_CH1                                              ,OCTOSPIM_P1_IO2                                         ,                                                                        ,FMC_SDNWE                        ,                               ,LTDC_VSYNC,EVENTOUT,ADC12_INN3/ADC12_INP7
 PortA,PA8 ,RCC_MCO_1       ,TIM1_CH1           ,                       ,TIM8_BKIN2                                ,I2C3_SCL                                             ,                                                  ,                                              ,USART1_CK                                              ,                                                ,                                                       ,USB_OTG_HS_SOF                                          ,UART7_RX                                                                ,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2,LTDC_B3                        ,LTDC_R6   ,EVENTOUT,
 PortA,PA9 ,                ,TIM1_CH2           ,                       ,LPUART1_TX                                ,I2C3_SMBA                                            ,I2S2_CK/SPI2_SCK                                  ,                                              ,USART1_TX                                              ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,DCMI_D0/PSSI_D0                ,LTDC_R5   ,EVENTOUT,
 PortA,PA10,                ,TIM1_CH3           ,                       ,LPUART1_RX                                ,                                                     ,                                                  ,                                              ,USART1_RX                                              ,                                                ,                                                       ,USB_OTG_HS_ID                                           ,MDIOS_MDIO                                                              ,LTDC_B4                          ,DCMI_D1/PSSI_D1                ,LTDC_B1   ,EVENTOUT,
@@ -16,8 +16,8 @@ PortA,PA12,                ,TIM1_ETR           ,                       ,LPUART1_
 PortA,PA13,DEBUG_JTMS/SWDIO,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
 PortA,PA14,DEBUG_JTCK/SWCLK,                   ,                       ,                                          ,                                                     ,                                                  ,                                              ,                                                       ,                                                ,                                                       ,                                                        ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
 PortA,PA15,DEBUG_JTDI      ,TIM2_CH1/TIM2_ETR  ,                       ,                                          ,CEC                                                  ,I2S1_WS/SPI1_NSS                                  ,I2S3_WS/SPI3_NSS                              ,I2S6_WS/SPI6_NSS                                       ,UART4_DE/UART4_RTS                              ,LTDC_R3                                                ,                                                        ,UART7_TX                                                                ,                                 ,                               ,LTDC_B6   ,EVENTOUT,
-PortB,PB0 ,                ,TIM1_CH2N          ,TIM3_CH3               ,TIM8_CH2N                                 ,DFSDM2_CKOUT                                         ,                                                  ,DFSDM1_CKOUT                                  ,                                                       ,UART4_CTS                                       ,LTDC_R3                                                ,USB_OTG_HS_ULPI_D1                                      ,OCTOSPIM_P1_IO1                                                         ,                                 ,                               ,LTDC_G1   ,EVENTOUT,ADC1_INN5/ADC1_INP9/ADC2_INN5/ADC2_INP9
-PortB,PB1 ,                ,TIM1_CH3N          ,TIM3_CH4               ,TIM8_CH3N                                 ,                                                     ,                                                  ,DFSDM1_DATIN1                                 ,                                                       ,                                                ,LTDC_R6                                                ,USB_OTG_HS_ULPI_D2                                      ,OCTOSPIM_P1_IO0                                                         ,                                 ,                               ,LTDC_G0   ,EVENTOUT,ADC1_INP5/ADC2_INP5
+PortB,PB0 ,                ,TIM1_CH2N          ,TIM3_CH3               ,TIM8_CH2N                                 ,DFSDM2_CKOUT                                         ,                                                  ,DFSDM1_CKOUT                                  ,                                                       ,UART4_CTS                                       ,LTDC_R3                                                ,USB_OTG_HS_ULPI_D1                                      ,OCTOSPIM_P1_IO1                                                         ,                                 ,                               ,LTDC_G1   ,EVENTOUT,ADC12_INN5/ADC12_INP9
+PortB,PB1 ,                ,TIM1_CH3N          ,TIM3_CH4               ,TIM8_CH3N                                 ,                                                     ,                                                  ,DFSDM1_DATIN1                                 ,                                                       ,                                                ,LTDC_R6                                                ,USB_OTG_HS_ULPI_D2                                      ,OCTOSPIM_P1_IO0                                                         ,                                 ,                               ,LTDC_G0   ,EVENTOUT,ADC12_INP5
 PortB,PB2 ,RTC_OUT_ALARM   ,                   ,SAI1_D1                ,                                          ,DFSDM1_CKIN1                                         ,                                                  ,SAI1_SD_A                                     ,I2S3_SDO/SPI3_MOSI                                     ,                                                ,OCTOSPIM_P1_CLK                                        ,OCTOSPIM_P1_DQS                                         ,                                                                        ,                                 ,                               ,          ,EVENTOUT,
 PortB,PB3 ,DEBUG_JTDO/SWO  ,TIM2_CH2           ,                       ,                                          ,                                                     ,I2S1_CK/SPI1_SCK                                  ,I2S3_CK/SPI3_SCK                              ,                                                       ,I2S6_CK/SPI6_SCK                                ,SDMMC2_D2                                              ,CRS_SYNC                                                ,UART7_RX                                                                ,                                 ,                               ,          ,EVENTOUT,
 PortB,PB4 ,                ,TIM16_BKIN         ,TIM3_CH1               ,                                          ,                                                     ,I2S1_SDI/SPI1_MISO                                ,I2S3_SDI/SPI3_MISO                            ,I2S2_WS/SPI2_NSS                                       ,I2S6_SDI/SPI6_MISO                              ,SDMMC2_D3                                              ,                                                        ,UART7_TX                                                                ,                                 ,                               ,          ,EVENTOUT,
@@ -32,12 +32,12 @@ PortB,PB12,                ,TIM1_BKIN          ,                       ,OCTOSPIM
 PortB,PB13,                ,TIM1_CH1N          ,                       ,LPTIM2_OUT                                ,DFSDM2_CKIN1                                         ,I2S2_CK/SPI2_SCK                                  ,DFSDM1_CKIN1                                  ,USART3_CTS/USART3_NSS                                  ,                                                ,FDCAN2_TX                                              ,USB_OTG_HS_ULPI_D6                                      ,                                                                        ,SDMMC1_D0                        ,DCMI_D2/PSSI_D2                ,UART5_TX  ,EVENTOUT,
 PortB,PB14,                ,TIM1_CH2N          ,TIM12_CH1              ,TIM8_CH2N                                 ,USART1_TX                                            ,I2S2_SDI/SPI2_MISO                                ,DFSDM1_DATIN2                                 ,USART3_DE/USART3_RTS                                   ,UART4_DE/UART4_RTS                              ,SDMMC2_D0                                              ,                                                        ,                                                                        ,                                 ,                               ,LTDC_CLK  ,EVENTOUT,
 PortB,PB15,RTC_REFIN       ,TIM1_CH3N          ,TIM12_CH2              ,TIM8_CH3N                                 ,USART1_RX                                            ,I2S2_SDO/SPI2_MOSI                                ,DFSDM1_CKIN2                                  ,                                                       ,UART4_CTS                                       ,SDMMC2_D1                                              ,                                                        ,                                                                        ,                                 ,                               ,LTDC_G7   ,EVENTOUT,
-PortC,PC0 ,                ,                   ,                       ,DFSDM1_CKIN0                              ,                                                     ,                                                  ,DFSDM1_DATIN4                                 ,                                                       ,SAI2_FS_B                                       ,FMC_A25                                                ,USB_OTG_HS_ULPI_STP                                     ,LTDC_G2                                                                 ,FMC_SDNWE                        ,                               ,LTDC_R5   ,EVENTOUT,ADC1_INP10/ADC2_INP10
-PortC,PC1 ,DEBUG_TRACED0   ,                   ,SAI1_D1                ,DFSDM1_DATIN0                             ,DFSDM1_CKIN4                                         ,I2S2_SDO/SPI2_MOSI                                ,SAI1_SD_A                                     ,                                                       ,                                                ,SDMMC2_CK                                              ,OCTOSPIM_P1_IO4                                         ,                                                                        ,MDIOS_MDC                        ,                               ,LTDC_G5   ,EVENTOUT,ADC1_INN10/ADC1_INP11/ADC2_INN10/ADC2_INP11
-PortC,PC2 ,PWR_CSTOP       ,                   ,                       ,DFSDM1_CKIN1                              ,                                                     ,I2S2_SDI/SPI2_MISO                                ,DFSDM1_CKOUT                                  ,                                                       ,                                                ,OCTOSPIM_P1_IO2                                        ,USB_OTG_HS_ULPI_DIR                                     ,OCTOSPIM_P1_IO5                                                         ,FMC_SDNE0                        ,                               ,          ,EVENTOUT,ADC1_INN11/ADC1_INP12/ADC2_INN11/ADC2_INP12
-PortC,PC3 ,PWR_CSLEEP      ,                   ,                       ,DFSDM1_DATIN1                             ,                                                     ,I2S2_SDO/SPI2_MOSI                                ,                                              ,                                                       ,                                                ,OCTOSPIM_P1_IO0                                        ,USB_OTG_HS_ULPI_NXT                                     ,OCTOSPIM_P1_IO6                                                         ,FMC_SDCKE0                       ,                               ,          ,EVENTOUT,ADC2_INP1
-PortC,PC4 ,                ,                   ,                       ,DFSDM1_CKIN2                              ,                                                     ,I2S1_MCK                                          ,                                              ,                                                       ,                                                ,SPDIFRX_IN3                                            ,                                                        ,                                                                        ,FMC_SDNE0                        ,                               ,LTDC_R7   ,EVENTOUT,ADC1_INP4/ADC2_INP4
-PortC,PC5 ,                ,                   ,SAI1_D3                ,DFSDM1_DATIN2                             ,PSSI_D15                                             ,                                                  ,                                              ,                                                       ,                                                ,SPDIFRX_IN4                                            ,OCTOSPIM_P1_DQS                                         ,                                                                        ,FMC_SDCKE0                       ,COMP1_OUT                      ,LTDC_DE   ,EVENTOUT,ADC1_INN4/ADC1_INP8/ADC2_INN4/ADC2_INP8
+PortC,PC0 ,                ,                   ,                       ,DFSDM1_CKIN0                              ,                                                     ,                                                  ,DFSDM1_DATIN4                                 ,                                                       ,SAI2_FS_B                                       ,FMC_A25                                                ,USB_OTG_HS_ULPI_STP                                     ,LTDC_G2                                                                 ,FMC_SDNWE                        ,                               ,LTDC_R5   ,EVENTOUT,ADC12_INP10
+PortC,PC1 ,DEBUG_TRACED0   ,                   ,SAI1_D1                ,DFSDM1_DATIN0                             ,DFSDM1_CKIN4                                         ,I2S2_SDO/SPI2_MOSI                                ,SAI1_SD_A                                     ,                                                       ,                                                ,SDMMC2_CK                                              ,OCTOSPIM_P1_IO4                                         ,                                                                        ,MDIOS_MDC                        ,                               ,LTDC_G5   ,EVENTOUT,ADC12_INN10/ADC12_INP11
+PortC,PC2 ,PWR_CSTOP       ,                   ,                       ,DFSDM1_CKIN1                              ,                                                     ,I2S2_SDI/SPI2_MISO                                ,DFSDM1_CKOUT                                  ,                                                       ,                                                ,OCTOSPIM_P1_IO2                                        ,USB_OTG_HS_ULPI_DIR                                     ,OCTOSPIM_P1_IO5                                                         ,FMC_SDNE0                        ,                               ,          ,EVENTOUT,ADC12_INN11/ADC12_INP12/C_ADC2_INP0/C_ADC2_INN1
+PortC,PC3 ,PWR_CSLEEP      ,                   ,                       ,DFSDM1_DATIN1                             ,                                                     ,I2S2_SDO/SPI2_MOSI                                ,                                              ,                                                       ,                                                ,OCTOSPIM_P1_IO0                                        ,USB_OTG_HS_ULPI_NXT                                     ,OCTOSPIM_P1_IO6                                                         ,FMC_SDCKE0                       ,                               ,          ,EVENTOUT,ADC12_INP13,ADC12_INN12/C_ADC2_INP1
+PortC,PC4 ,                ,                   ,                       ,DFSDM1_CKIN2                              ,                                                     ,I2S1_MCK                                          ,                                              ,                                                       ,                                                ,SPDIFRX_IN3                                            ,                                                        ,                                                                        ,FMC_SDNE0                        ,                               ,LTDC_R7   ,EVENTOUT,ADC12_INP4
+PortC,PC5 ,                ,                   ,SAI1_D3                ,DFSDM1_DATIN2                             ,PSSI_D15                                             ,                                                  ,                                              ,                                                       ,                                                ,SPDIFRX_IN4                                            ,OCTOSPIM_P1_DQS                                         ,                                                                        ,FMC_SDCKE0                       ,COMP1_OUT                      ,LTDC_DE   ,EVENTOUT,ADC12_INN4/ADC12_INP8
 PortC,PC6 ,                ,                   ,TIM3_CH1               ,TIM8_CH1                                  ,DFSDM1_CKIN3                                         ,I2S2_MCK                                          ,                                              ,USART6_TX                                              ,SDMMC1_D0DIR                                    ,FMC_NWAIT                                              ,SDMMC2_D6                                               ,                                                                        ,SDMMC1_D6                        ,DCMI_D0/PSSI_D0                ,LTDC_HSYNC,EVENTOUT,
 PortC,PC7 ,DEBUG_TRGIO     ,                   ,TIM3_CH2               ,TIM8_CH2                                  ,DFSDM1_DATIN3                                        ,                                                  ,I2S3_MCK                                      ,USART6_RX                                              ,SDMMC1_D123DIR                                  ,FMC_NE1                                                ,SDMMC2_D7                                               ,SWPMI1_TX                                                               ,SDMMC1_D7                        ,DCMI_D1/PSSI_D1                ,LTDC_G6   ,EVENTOUT,
 PortC,PC8 ,DEBUG_TRACED1   ,                   ,TIM3_CH3               ,TIM8_CH3                                  ,                                                     ,                                                  ,                                              ,USART6_CK                                              ,UART5_DE/UART5_RTS                              ,FMC_NCE/FMC_NE2                                        ,FMC_INT                                                 ,SWPMI1_RX                                                               ,SDMMC1_D0                        ,DCMI_D2/PSSI_D2                ,          ,EVENTOUT,

From 4d568a5bd73530830dab104d53292120f0e31d3d Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Mon, 14 Aug 2023 11:17:18 +1000
Subject: [PATCH 107/310] samd/boards/make-pins.py: Update to use
 tools/boardgen.py.

This replaces the previous make-pin-table.py with an implementation based
on boardgen.py.

- MICROPY_PY_MACHINE_PIN_BOARD_CPU macro is removed. This isn't optional
  on other ports, so no need for it to be optional on SAMD.
- pin_af_table is removed, and lookups just search the cpu dict instead
  (this saves N*wordsize bytes of firmware size to have this extra table).
- pins.csv is now BOARD,CPU to match other ports.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/samd/Makefile                           |  23 +-
 .../ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv      |  75 +++----
 .../ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv      |  77 ++++---
 .../ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv    |  71 +++----
 .../ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv    |  77 ++++---
 .../boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv | 103 +++++----
 .../samd/boards/ADAFRUIT_TRINKET_M0/pins.csv  |  29 ++-
 ports/samd/boards/MINISAM_M4/pins.csv         |  73 +++----
 .../samd/boards/SAMD21_XPLAINED_PRO/pins.csv  |  97 ++++-----
 ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv | 139 ++++++------
 ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv  |  41 ++--
 .../SPARKFUN_SAMD51_THING_PLUS/pins.csv       |  71 +++----
 ports/samd/boards/make-pin-table.py           | 201 ------------------
 ports/samd/boards/make-pins.py                |  95 +++++++++
 ports/samd/boards/pins_prefix.c               |  21 ++
 ports/samd/machine_adc.c                      |   4 +-
 ports/samd/machine_dac.c                      |   2 +-
 ports/samd/machine_pin.c                      |  19 +-
 ports/samd/machine_pwm.c                      |   4 +-
 ports/samd/machine_uart.c                     |   6 +-
 ports/samd/mcu/samd21/mpconfigmcu.h           |   4 -
 ports/samd/mcu/samd21/pin-af-table.csv        | 107 +++++-----
 ports/samd/mcu/samd51/mpconfigmcu.h           |   4 -
 ports/samd/mcu/samd51/pin-af-table.csv        | 201 +++++++++---------
 ports/samd/pin_af.c                           |  59 ++---
 ports/samd/pin_af.h                           |   5 +-
 26 files changed, 711 insertions(+), 897 deletions(-)
 delete mode 100644 ports/samd/boards/make-pin-table.py
 create mode 100644 ports/samd/boards/make-pins.py
 create mode 100644 ports/samd/boards/pins_prefix.c

diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index 7d27367b6b..291a894ab7 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -56,10 +56,12 @@ INC += -I$(TOP)/lib/asf4/$(MCU_SERIES_LOWER)/include
 INC += -I$(TOP)/lib/asf4/$(MCU_SERIES_LOWER)/include/pio
 INC += -I$(TOP)/lib/tinyusb/src
 
-MAKE_PIN_AF = boards/make-pin-table.py
-PIN_AF_TABLE_CSV = mcu/$(MCU_SERIES_LOWER)/pin-af-table.csv
+MAKE_PINS = boards/make-pins.py
 BOARD_PINS = $(BOARD_DIR)/pins.csv
-GEN_PIN_AF = pin_af_table.c
+PREFIX_FILE = boards/pins_prefix.c
+AF_FILE = mcu/$(MCU_SERIES_LOWER)/pin-af-table.csv
+GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
+GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
 
 CFLAGS += $(INC) -Wall -Werror -std=c99 -nostdlib -mthumb $(CFLAGS_MCU) -fsingle-precision-constant -Wdouble-promotion
 CFLAGS += -DMCU_$(MCU_SERIES) -D__$(CMSIS_MCU)__
@@ -179,7 +181,7 @@ DRIVERS_SRC_C += \
 	drivers/bus/softspi.c \
 
 # List of sources for qstr extraction
-SRC_QSTR += $(SRC_C) $(SHARED_SRC_C) $(SRC_CXX)
+SRC_QSTR += $(SRC_C) $(SHARED_SRC_C) $(SRC_CXX) $(GEN_PINS_SRC)
 
 OBJ += $(PY_O)
 OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
@@ -190,6 +192,7 @@ OBJ += $(addprefix $(BUILD)/, $(ASF4_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(TINYUSB_SRC_C:.c=.o))
+OBJ += $(GEN_PINS_SRC:.c=.o)
 
 all: $(BUILD)/firmware.uf2
 
@@ -203,10 +206,14 @@ $(BUILD)/firmware.bin: $(BUILD)/firmware.elf
 $(BUILD)/firmware.uf2: $(BUILD)/firmware.bin
 	$(Q)$(PYTHON) $(UF2CONV) -b $(TEXT0) -c -o $@ $<
 
-pin_af.c: $(BUILD)/$(GEN_PIN_AF) | $(HEADER_BUILD)
+# pin_af.c: $(BUILD)/$(GEN_PIN_AF) | $(HEADER_BUILD)
 
-$(BUILD)/$(GEN_PIN_AF): $(PIN_AF_TABLE_CSV) $(BOARD_PINS) | $(HEADER_BUILD)
-	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PIN_AF) --csv $(PIN_AF_TABLE_CSV) --board $(BOARD_PINS) --table $(BUILD)/$(GEN_PIN_AF) --mcu $(MCU_SERIES)
+# Use a pattern rule here so that make will only call make-pins.py once to make
+# both pins_$(BOARD).c and pins.h
+$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
+	$(ECHO) "GEN $@"
+	$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv $(AF_FILE) --prefix $(PREFIX_FILE) \
+	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR) \
+	    --mcu $(MCU_SERIES)
 
 include $(TOP)/py/mkrules.mk
diff --git a/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv
index 6536277062..8993419a26 100644
--- a/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv
@@ -1,43 +1,38 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines starting with # are ignored
+LED_TX,PA27
+LED_RX,PB03
 
-PIN_PA27,LED_TX
-PIN_PB03,LED_RX
+D0,PA11
+D1,PA10
+FLASH_MOSI,PA08
+FLASH_MISO,PA14
+FLASH_SCK,PA09
+D5,PA15
+D6,PA20
+D7,PA21
+D8,PA06
+D9,PA07
+D10,PA18
+D11,PA16
+D12,PA19
+D13,PA17
+A0,PA02
+A1,PB08
+A2,PB09
+A3,PA04
+A4,PA05
+A5,PB02
+TX,PB22
+RX,PB23
+SCL,PA23
+SDA,PA22
+MOSI,PB10
+MISO,PA12
+SCK,PB11
+NEOPIXEL,PA06
+FLASH_CS,PA13
 
-PIN_PA11,D0
-PIN_PA10,D1
-PIN_PA08,FLASH_MOSI
-PIN_PA14,FLASH_MISO
-PIN_PA09,FLASH_SCK
-PIN_PA15,D5
-PIN_PA20,D6
-PIN_PA21,D7
-PIN_PA06,D8
-PIN_PA07,D9
-PIN_PA18,D10
-PIN_PA16,D11
-PIN_PA19,D12
-PIN_PA17,D13
-PIN_PA02,A0
-PIN_PB08,A1
-PIN_PB09,A2
-PIN_PA04,A3
-PIN_PA05,A4
-PIN_PB02,A5
-PIN_PB22,TX
-PIN_PB23,RX
-PIN_PA23,SCL
-PIN_PA22,SDA
-PIN_PB10,MOSI
-PIN_PA12,MISO
-PIN_PB11,SCK
-PIN_PA06,NEOPIXEL
-PIN_PA13,FLASH_CS
+USB_DM,PA24
+USB_DP,PA25
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv
index df3373f246..ec7a8bc163 100644
--- a/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv
@@ -1,44 +1,39 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+D0,PB17
+D1,PB16
+D4,PA14
+D5,PA16
+D6,PA18
+D8,PB03
+D9,PA19
+D10,PA20
+D11,PA21
+D12,PA22
+D13,PA23
+A0,PA02
+A1,PA05
+A2,PB08
+A3,PB09
+A4,PA04
+A5,PB06
+SCL,PA13
+SDA,PA12
+MOSI,PB23
+MISO,PB22
+SCK,PA17
+VDIV,PB01
+AREF,PA03
+NEOPIXEL,PB03
 
-PIN_PB17,D0
-PIN_PB16,D1
-PIN_PA14,D4
-PIN_PA16,D5
-PIN_PA18,D6
-PIN_PB03,D8
-PIN_PA19,D9
-PIN_PA20,D10
-PIN_PA21,D11
-PIN_PA22,D12
-PIN_PA23,D13
-PIN_PA02,A0
-PIN_PA05,A1
-PIN_PB08,A2
-PIN_PB09,A3
-PIN_PA04,A4
-PIN_PB06,A5
-PIN_PA13,SCL
-PIN_PA12,SDA
-PIN_PB23,MOSI
-PIN_PB22,MISO
-PIN_PA17,SCK
-PIN_PB01,VDIV
-PIN_PA03,AREF
-PIN_PB03,NEOPIXEL
+QSPI_CS,PB11
+QSPI_SCK,PB10
+QSPI_D0,PA08
+QSPI_D1,PA09
+QSPI_D2,PA10
+QSPI_D3,PA11
 
-PIN_PB11,QSPI_CS
-PIN_PB10,QSPI_SCK
-PIN_PA08,QSPI_D0
-PIN_PA09,QSPI_D1
-PIN_PA10,QSPI_D2
-PIN_PA11,QSPI_D3
+USB_DM,PA24
+USB_DP,PA25
+USB_SOF,PA23
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-PIN_PA26,USB_SOF
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv
index 04b1a717bd..845cefb8a9 100644
--- a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv
@@ -1,40 +1,35 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+D0,PA11
+D1,PA10
+D2,PA14
+D3,PA09
+D4,PA08
+D5,PA15
+D7,PA21
+D9,PA07
+D10,PA18
+D11,PA16
+D12,PA19
+D13,PA17
+A0,PA02
+A1,PB08
+A2,PB09
+A3,PA04
+A4,PA05
+A5,PB02
+SDA,PA22
+SCL,PA23
+MOSI,PB10
+MISO,PA12
+SCK,PB11
+DOTSTAR_CLK,PA00
+DOTSTAR_DATA,PA01
+FLASH_MOSI,PB22
+FLASH_MISO,PB03
+FLASH_SCK,PB23
+FLASH_CS,PA27
 
-PIN_PA11,D0
-PIN_PA10,D1
-PIN_PA14,D2
-PIN_PA09,D3
-PIN_PA08,D4
-PIN_PA15,D5
-PIN_PA21,D7
-PIN_PA07,D9
-PIN_PA18,D10
-PIN_PA16,D11
-PIN_PA19,D12
-PIN_PA17,D13
-PIN_PA02,A0
-PIN_PB08,A1
-PIN_PB09,A2
-PIN_PA04,A3
-PIN_PA05,A4
-PIN_PB02,A5
-PIN_PA22,SDA
-PIN_PA23,SCL
-PIN_PB10,MOSI
-PIN_PA12,MISO
-PIN_PB11,SCK
-PIN_PA00,DOTSTAR_CLK
-PIN_PA01,DOTSTAR_DATA
-PIN_PB22,FLASH_MOSI
-PIN_PB03,FLASH_MISO
-PIN_PB23,FLASH_SCK
-PIN_PA27,FLASH_CS
+USB_DM,PA24
+USB_DP,PA25
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv
index b63a1f4b13..c82beccfa2 100644
--- a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv
@@ -1,44 +1,39 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+D0,PA16
+D1,PA17
+D2,PA07
+D3,PB22
+D4,PA14
+D5,PA15
+D7,PA18
+D9,PA19
+D10,PA20
+D11,PA21
+D12,PA23
+D13,PA22
+A0,PA02
+A1,PA05
+A2,PB08
+A3,PB09
+A4,PA04
+A5,PA06
+SDA,PA12
+SCL,PA13
+MOSI,PA00
+MISO,PB23
+SCK,PA01
+DOTSTAR_CLK,PB02
+DOTSTAR_DATA,PB03
 
-PIN_PA16,D0
-PIN_PA17,D1
-PIN_PA07,D2
-PIN_PB22,D3
-PIN_PA14,D4
-PIN_PA15,D5
-PIN_PA18,D7
-PIN_PA19,D9
-PIN_PA20,D10
-PIN_PA21,D11
-PIN_PA23,D12
-PIN_PA22,D13
-PIN_PA02,A0
-PIN_PA05,A1
-PIN_PB08,A2
-PIN_PB09,A3
-PIN_PA04,A4
-PIN_PA06,A5
-PIN_PA12,SDA
-PIN_PA13,SCL
-PIN_PA00,MOSI
-PIN_PB23,MISO
-PIN_PA01,SCK
-PIN_PB02,DOTSTAR_CLK
-PIN_PB03,DOTSTAR_DATA
+QSPI_CS,PB11
+QSPI_SCK,PB10
+QSPI_D0,PA08
+QSPI_D1,PA09
+QSPI_D2,PA10
+QSPI_D3,PA11
 
-PIN_PB11,QSPI_CS
-PIN_PB10,QSPI_SCK
-PIN_PA08,QSPI_D0
-PIN_PA09,QSPI_D1
-PIN_PA10,QSPI_D2
-PIN_PA11,QSPI_D3
+USB_DM,PA24
+USB_DP,PA25
+USB_SOF,PA23
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-PIN_PA26,USB_SOF
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv
index 0bda767600..cee4bf02b7 100644
--- a/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv
@@ -1,66 +1,61 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+A0,PA02
+A1,PA05
+A2,PA06
+A3,PB00
+A4,PB08
+A5,PB09
+AREF,PA03
 
-PIN_PA02,A0
-PIN_PA05,A1
-PIN_PA06,A2
-PIN_PB00,A3
-PIN_PB08,A4
-PIN_PB09,A5
-PIN_PA03,AREF
+D0,PA23
+D1,PA22
+D2,PB17
+D3,PB16
+D4,PB13
+D5,PB14
+D6,PB15
+D7,PB12
+D8,PA21
+D9,PA20
+D10,PA18
+D11,PA19
+D12,PA17
+D13,PA16
 
-PIN_PA23,D0
-PIN_PA22,D1
-PIN_PB17,D2
-PIN_PB16,D3
-PIN_PB13,D4
-PIN_PB14,D5
-PIN_PB15,D6
-PIN_PB12,D7
-PIN_PA21,D8
-PIN_PA20,D9
-PIN_PA18,D10
-PIN_PA19,D11
-PIN_PA17,D12
-PIN_PA16,D13
+SDA,PB02
+SCL,PB03
 
-PIN_PB02,SDA
-PIN_PB03,SCL
+SCK,PA13
+MOSI,PA12
+MISO,PA14
 
-PIN_PA13,SCK
-PIN_PA12,MOSI
-PIN_PA14,MISO
-
-PIN_PB22,NEOPIXEL
-PIN_PB06,RXLED
-PIN_PB07,TXLED
+NEOPIXEL,PB22
+RXLED,PB06
+TXLED,PB07
 
 # Airlift
-PIN_PB05,ESP_RESET
-PIN_PB04,ESP_BUSY
-PIN_PA15,ESP_CS
-PIN_PB01,ESP_GPIO0
-PIN_PA07,ESP_RX
-PIN_PA04,ESP_TX
-PIN_PB23,ESP_RTS
+ESP_RESET,PB05
+ESP_BUSY,PB04
+ESP_CS,PA15
+ESP_GPIO0,PB01
+ESP_RX,PA07
+ESP_TX,PA04
+ESP_RTS,PB23
 
 # QSPI flash
-PIN_PA08,FLASH_MOSI
-PIN_PA09,FLASH_MISO
-PIN_PA10,FLASH_WP
-PIN_PA11,FLASH_HOLD
-PIN_PB10,FLASH_SCK
-PIN_PB11,FLASH_CS
+FLASH_MOSI,PA08
+FLASH_MISO,PA09
+FLASH_WP,PA10
+FLASH_HOLD,PA11
+FLASH_SCK,PB10
+FLASH_CS,PB11
 
 # USB
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-PIN_PA26,USB_SOF
-PIN_PA17,USB_HOSTEN
+USB_DM,PA24
+USB_DP,PA25
+USB_SOF,PA23
+#USB_HOSTEN,PA17
 
 # JLink
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
-PIN_PB30,SWO
+SWCLK,PA30
+SWDIO,PA31
+SWO,PB30
diff --git a/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv b/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv
index b5f1c9801b..47306f8de1 100644
--- a/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv
@@ -1,20 +1,15 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+D0,PA08
+D1,PA02
+D2,PA09
+D3,PA07
+D4,PA06
+DOTSTAR_DATA,PA00
+DOTSTAR_CLK,PA01
 
-PIN_PA08,D0
-PIN_PA02,D1
-PIN_PA09,D2
-PIN_PA07,D3
-PIN_PA06,D4
-PIN_PA00,DOTSTAR_DATA
-PIN_PA01,DOTSTAR_CLK
+LED,PA10
 
-PIN_PA10,LED
+USB_DM,PA24
+USB_DP,PA25
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/MINISAM_M4/pins.csv b/ports/samd/boards/MINISAM_M4/pins.csv
index 3ea5f85cba..3c1ab4c603 100644
--- a/ports/samd/boards/MINISAM_M4/pins.csv
+++ b/ports/samd/boards/MINISAM_M4/pins.csv
@@ -1,43 +1,38 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+A0,PA02
+A1,PB08
+A2,PB09
+A3,PA04
+A4,PA05
+A5,PA06
+A6,PA07
+RX,PA16
+TX,PA17
+D3,PA19
+D4,PA20
+D5,PA21
+LED,PA15
+BUTTON,PA00
+AREF,PA03
+SDA,PA12
+SCL,PA13
+MOSI,PB22
+MISO,PB23
+SCK,PA01
+DOTSTAR_DATA,PB03
+DOTSTAR_CLK,PB02
 
-PIN_PA02,A0
-PIN_PB08,A1
-PIN_PB09,A2
-PIN_PA04,A3
-PIN_PA05,A4
-PIN_PA06,A5
-PIN_PA07,A6
-PIN_PA16,RX
-PIN_PA17,TX
-PIN_PA19,D3
-PIN_PA20,D4
-PIN_PA21,D5
-PIN_PA15,LED
-PIN_PA00,BUTTON
-PIN_PA03,AREF
-PIN_PA12,SDA
-PIN_PA13,SCL
-PIN_PB22,MOSI
-PIN_PB23,MISO
-PIN_PA01,SCK
-PIN_PB03,DOTSTAR_DATA
-PIN_PB02,DOTSTAR_CLK
+QSPI_CS,PB11
+QSPI_SCK,PB10
+QSPI_D0,PA08
+QSPI_D1,PA09
+QSPI_D2,PA10
+QSPI_D3,PA11
 
-PIN_PB11,QSPI_CS
-PIN_PB10,QSPI_SCK
-PIN_PA08,QSPI_D0
-PIN_PA09,QSPI_D1
-PIN_PA10,QSPI_D2
-PIN_PA11,QSPI_D3
+LED,PA15
 
-PIN_PA15,LED
+USB_DM,PA24
+USB_DP,PA25
+USB_SOF,PA23
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-PIN_PA26,USB_SOF
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv b/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv
index 5990c373bf..69d0c136d0 100644
--- a/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv
+++ b/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv
@@ -1,60 +1,55 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
-
 # EXT1
-PIN_PB00,EXT1_PIN3
-PIN_PB01,EXT1_PIN4
-PIN_PB06,EXT1_PIN5
-PIN_PB07,EXT1_PIN6
-PIN_PB02,EXT1_PIN7
-PIN_PB03,EXT1_PIN8
-PIN_PB04,EXT1_PIN9
-PIN_PB05,EXT1_PIN10
-PIN_PA08,EXT1_PIN11
-PIN_PA09,EXT1_PIN12
-PIN_PB09,EXT1_PIN13
-PIN_PB08,EXT1_PIN14
-PIN_PA05,EXT1_PIN15
-PIN_PA06,EXT1_PIN16
-PIN_PA04,EXT1_PIN17
-PIN_PA07,EXT1_PIN18
+EXT1_PIN3,PB00
+EXT1_PIN4,PB01
+EXT1_PIN5,PB06
+EXT1_PIN6,PB07
+EXT1_PIN7,PB02
+EXT1_PIN8,PB03
+EXT1_PIN9,PB04
+EXT1_PIN10,PB05
+EXT1_PIN11,PA08
+EXT1_PIN12,PA09
+EXT1_PIN13,PB09
+EXT1_PIN14,PB08
+EXT1_PIN15,PA05
+EXT1_PIN16,PA06
+EXT1_PIN17,PA04
+EXT1_PIN18,PA07
 
 # EXT2
-PIN_PA10,EXT2_PIN3
-PIN_PA11,EXT2_PIN4
-PIN_PA20,EXT2_PIN5
-PIN_PA21,EXT2_PIN6
-PIN_PB12,EXT2_PIN7
-PIN_PB13,EXT2_PIN8
-PIN_PB14,EXT2_PIN9
-PIN_PB15,EXT2_PIN10
-PIN_PB11,EXT2_PIN13
-PIN_PB10,EXT2_PIN14
-PIN_PA17,EXT2_PIN15
-PIN_PA18,EXT2_PIN16
-PIN_PA16,EXT2_PIN17
-PIN_PA19,EXT2_PIN18
+EXT2_PIN3,PA10
+EXT2_PIN4,PA11
+EXT2_PIN5,PA20
+EXT2_PIN6,PA21
+EXT2_PIN7,PB12
+EXT2_PIN8,PB13
+EXT2_PIN9,PB14
+EXT2_PIN10,PB15
+EXT2_PIN13,PB11
+EXT2_PIN14,PB10
+EXT2_PIN15,PA17
+EXT2_PIN16,PA18
+EXT2_PIN17,PA16
+EXT2_PIN18,PA19
 
 # EXT3
-PIN_PA02,EXT3_PIN3
-PIN_PA03,EXT3_PIN4
-PIN_PA15,EXT3_PIN6
-PIN_PA12,EXT3_PIN7
-PIN_PA13,EXT3_PIN8
-PIN_PA28,EXT3_PIN9
-PIN_PA27,EXT3_PIN10
-PIN_PB17,EXT3_PIN15
-PIN_PB22,EXT3_PIN16
-PIN_PB16,EXT3_PIN17
-PIN_PB23,EXT3_PIN18
+EXT3_PIN3,PA02
+EXT3_PIN4,PA03
+EXT3_PIN6,PA15
+EXT3_PIN7,PA12
+EXT3_PIN8,PA13
+EXT3_PIN9,PA28
+EXT3_PIN10,PA27
+EXT3_PIN15,PB17
+EXT3_PIN16,PB22
+EXT3_PIN17,PB16
+EXT3_PIN18,PB23
 
-PIN_PB30,LED
+LED,PB30
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
+USB_DM,PA24
+USB_DP,PA25
 
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
 
diff --git a/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv b/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv
index c32108b9f7..f263253cba 100644
--- a/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv
+++ b/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv
@@ -1,76 +1,71 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+A0_D0,PB08
+A1_D1,PB09
+A2_D2,PA07
+A3_D3,PB04
+A4_D4,PB05
+A5_D5,PB06
+A6_D6,PA04
+A7_D7,PB07
+A8_D8,PA06
+SWITCH_X,PD08
+SWITCH_Y,PD09
+SWITCH_Z,PD10
+SWITCH_B,PD12
+SWITCH_U,PD20
+BUTTON_1,PC26
+BUTTON_2,PC27
+BUTTON_3,PC28
+ENABLE_5V,PC14
+ENABLE_3V3,PC15
+TX,PB26
+RX,PB27
+SDA0,PA13
+SCL0,PA12
+SDA1,PA17
+SCL1,PA16
+MOSI,PB02
+MISO,PB00
+SCK,PB03
+CS,PB01
+GPCLK0,PB15
+GPCLK1,PB12
+GPCLK2,PB13
+SD_MOSI,PC16
+SD_MISO,PC18
+SD_SCK,PC17
+SD_CS,PC19
+SD_DET,PD21
+I2S_LRCLK,PA20
+I2S_SDIN,PA21
+I2S_SDOUT,PA22
+I2C_BCLK,PB16
+LCD_MISO,PB18
+LCD_MOSI,PB19
+LCD_SCK,PB20
+LCD_CS,PB21
+LCD_BACKLIGHT,PC05
+LCD_D_C,PC06
+LCD_RESET,PC07
+LCD_XL,PC10
+LCD_YU,PC11
+LCD_XR,PC12
+LCD_YD,PC13
+MIC,PC30
+BUZZER,PD11
 
-PIN_PB08,A0_D0
-PIN_PB09,A1_D1
-PIN_PA07,A2_D2
-PIN_PB04,A3_D3
-PIN_PB05,A4_D4
-PIN_PB06,A5_D5
-PIN_PA04,A6_D6
-PIN_PB07,A7_D7
-PIN_PA06,A8_D8
-PIN_PD08,SWITCH_X
-PIN_PD09,SWITCH_Y
-PIN_PD10,SWITCH_Z
-PIN_PD12,SWITCH_B
-PIN_PD20,SWITCH_U
-PIN_PC26,BUTTON_1
-PIN_PC27,BUTTON_2
-PIN_PC28,BUTTON_3
-PIN_PC14,ENABLE_5V
-PIN_PC15,ENABLE_3V3
-PIN_PB26,TX
-PIN_PB27,RX
-PIN_PA13,SDA0
-PIN_PA12,SCL0
-PIN_PA17,SDA1
-PIN_PA16,SCL1
-PIN_PB02,MOSI
-PIN_PB00,MISO
-PIN_PB03,SCK
-PIN_PB01,CS
-PIN_PB15,GPCLK0
-PIN_PB12,GPCLK1
-PIN_PB13,GPCLK2
-PIN_PC16,SD_MOSI
-PIN_PC18,SD_MISO
-PIN_PC17,SD_SCK
-PIN_PC19,SD_CS
-PIN_PD21,SD_DET
-PIN_PA20,I2S_LRCLK
-PIN_PA21,I2S_SDIN
-PIN_PA22,I2S_SDOUT
-PIN_PB16,I2C_BCLK
-PIN_PB18,LCD_MISO
-PIN_PB19,LCD_MOSI
-PIN_PB20,LCD_SCK
-PIN_PB21,LCD_CS
-PIN_PC05,LCD_BACKLIGHT
-PIN_PC06,LCD_D_C
-PIN_PC07,LCD_RESET
-PIN_PC10,LCD_XL
-PIN_PC11,LCD_YU
-PIN_PC12,LCD_XR
-PIN_PC13,LCD_YD
-PIN_PC30,MIC
-PIN_PD11,BUZZER
+QSPI_CS,PB11
+QSPI_SCK,PB10
+QSPI_D0,PA08
+QSPI_D1,PA09
+QSPI_D2,PA10
+QSPI_D3,PA11
 
-PIN_PB11,QSPI_CS
-PIN_PB10,QSPI_SCK
-PIN_PA08,QSPI_D0
-PIN_PA09,QSPI_D1
-PIN_PA10,QSPI_D2
-PIN_PA11,QSPI_D3
+LED_BLUE,PA15
+LED_LCD,PC05
 
-PIN_PA15,LED_BLUE
-PIN_PC05,LED_LCD
+USB_DM,PA24
+USB_DP,PA25
+USB_SOF,PA23
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-PIN_PA26,USB_SOF
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv b/ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv
index 2f1c180e8a..969c60028b 100644
--- a/ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv
+++ b/ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv
@@ -1,26 +1,21 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+A0_D0,PA02
+A1_D1,PA04
+A2_D2,PA10
+A3_D3,PA11
+A4_D4,PA08
+A5_D5,PA09
+A6_D6,PB08
+A7_D7,PB09
+A8_D8,PA07
+A9_D9,PA05
+A10_D10,PA06
 
-PIN_PA02,A0_D0
-PIN_PA04,A1_D1
-PIN_PA10,A2_D2
-PIN_PA11,A3_D3
-PIN_PA08,A4_D4
-PIN_PA09,A5_D5
-PIN_PB08,A6_D6
-PIN_PB09,A7_D7
-PIN_PA07,A8_D8
-PIN_PA05,A9_D9
-PIN_PA06,A10_D10
+USER_LED,PA17
+RX_LED,PA18
+TX_LED,PA19
 
-PIN_PA17,USER_LED
-PIN_PA18,RX_LED
-PIN_PA19,TX_LED
+USB_DM,PA24
+USB_DP,PA25
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv
index d807b505a7..0ae269724d 100644
--- a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv
+++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv
@@ -1,41 +1,36 @@
-# Pin rows contain Pin number and pin name.
-# Pin rows start with PIN_
-# If the pin name is omitted, the pin number is added as name.
-# Empty lines and lines not starting with PIN_ are ignored
+D0,PA13
+D1,PA12
+D4,PA06
+D5,PA15
+D6,PA20
+D7,PA21
+D9,PA07
+D10,PA18
+D11,PA16
+D12,PA19
+D13,PA17
+A0,PA02
+A1,PB08
+A2,PB09
+A3,PA04
+A4,PA05
+A5,PB02
+SDA,PA22
+SCL,PA23
+MOSI,PB12
+MISO,PB11
+SCK,PB13
+FLASH_MOSI,PA08
+FLASH_SCK,PA09
+FLASH_CS,PA10
+FLASH_MISO,PA11
 
-PIN_PA13,D0
-PIN_PA12,D1
-PIN_PA06,D4
-PIN_PA15,D5
-PIN_PA20,D6
-PIN_PA21,D7
-PIN_PA07,D9
-PIN_PA18,D10
-PIN_PA16,D11
-PIN_PA19,D12
-PIN_PA17,D13
-PIN_PA02,A0
-PIN_PB08,A1
-PIN_PB09,A2
-PIN_PA04,A3
-PIN_PA05,A4
-PIN_PB02,A5
-PIN_PA22,SDA
-PIN_PA23,SCL
-PIN_PB12,MOSI
-PIN_PB11,MISO
-PIN_PB13,SCK
-PIN_PA08,FLASH_MOSI
-PIN_PA09,FLASH_SCK
-PIN_PA10,FLASH_CS
-PIN_PA11,FLASH_MISO
+RXLED,PB03
+TXLED,PA27
 
-PIN_PB03,RXLED
-PIN_PA27,TXLED
+USB_DM,PA24
+USB_DP,PA25
+USB_SOF,PA23
 
-PIN_PA24,USB_DM
-PIN_PA25,USB_DP
-PIN_PA26,USB_SOF
-
-PIN_PA30,SWCLK
-PIN_PA31,SWDIO
+SWCLK,PA30
+SWDIO,PA31
diff --git a/ports/samd/boards/make-pin-table.py b/ports/samd/boards/make-pin-table.py
deleted file mode 100644
index a187f2a711..0000000000
--- a/ports/samd/boards/make-pin-table.py
+++ /dev/null
@@ -1,201 +0,0 @@
-#!/usr/bin/env python
-"""Generates the pin_cap table file for the SAMD port."""
-
-from __future__ import print_function
-
-import argparse
-import sys
-import csv
-
-table_header = """// This file was automatically generated by make-pin-cap.py
-//
-
-// The Pin objects which are available on a board
-
-"""
-
-
-class Pins:
-    def __init__(self):
-        self.board_pins = []  # list of pin objects
-        self.pin_names = {}
-
-    def parse_csv_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                # Pin numbers must start with "PA", "PB", "PC" or "PD"
-                if len(row) > 0 and row[0].strip().upper()[:2] in ("PA", "PB", "PC", "PD"):
-                    self.board_pins.append(row)
-
-    def parse_pin_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile, skipinitialspace=True)
-            for row in rows:
-                # Pin numbers must start with "PIN_"
-                # LED numbers must start with "LED_"
-                if len(row) > 0:
-                    # for compatibility, map LED_ to PIN_
-                    if row[0].startswith("LED_"):
-                        row[0] = "PIN_" + row[0][4:]
-                    if row[0].startswith("PIN_"):
-                        if len(row) == 1:
-                            self.pin_names[row[0]] = (row[0][4:], "{&machine_pin_type}")
-                        else:
-                            self.pin_names[row[0]] = (row[1], "{&machine_pin_type}")
-
-    def print_table(self, table_filename, mcu_name):
-        with open(table_filename, "wt") as table_file:
-            table_file.write(table_header)
-
-            # Create the Pin objects
-
-            if mcu_name == "SAMD21":
-                for row in self.board_pins:
-                    pin = "PIN_" + row[0].upper()
-                    table_file.write("#ifdef " + pin + "\n")
-                    table_file.write("static const machine_pin_obj_t %s_obj = " % pin)
-                    eic = row[1] if row[1] else "0xff"
-                    adc = row[2] if row[2] else "0xff"
-                    if pin in self.pin_names:
-                        name = "MP_QSTR_%s" % self.pin_names[pin][0]
-                        type = self.pin_names[pin][1]
-                    else:
-                        name = "MP_QSTR_"
-                        type = "{&machine_pin_type}"
-                    table_file.write("{%s, %s, %s, %s, %s" % (type, pin, name, eic, adc))
-                    for cell in row[3:]:
-                        if cell:
-                            table_file.write(
-                                ", 0x%s" % cell if len(cell) == 2 else ", 0x0%s" % cell
-                            )
-                        else:
-                            table_file.write(", 0xff")
-                    table_file.write("};\n")
-                    table_file.write("#endif\n")
-            else:
-                for row in self.board_pins:
-                    pin = "PIN_" + row[0].upper()
-                    table_file.write("#ifdef " + pin + "\n")
-                    table_file.write("const machine_pin_obj_t %s_obj = " % pin)
-                    eic = row[1] if row[1] else "0xff"
-                    adc0 = row[2] if row[2] else "0xff"
-                    adc1 = row[3] if row[3] else "0xff"
-                    if pin in self.pin_names:
-                        name = "MP_QSTR_%s" % self.pin_names[pin][0]
-                        type = self.pin_names[pin][1]
-                    else:
-                        name = "MP_QSTR_"
-                        type = "{&machine_pin_type}"
-                    table_file.write(
-                        "{%s, %s, %s, %s, %s, %s" % (type, pin, name, eic, adc0, adc1)
-                    )
-                    for cell in row[4:]:
-                        if cell:
-                            table_file.write(
-                                ", 0x%s" % cell if len(cell) == 2 else ", 0x0%s" % cell
-                            )
-                        else:
-                            table_file.write(", 0xff")
-                    table_file.write("};\n")
-                    table_file.write("#endif\n")
-
-            # Create the Pin table
-
-            table_file.write("\n// The table of references to the pin objects.\n\n")
-            table_file.write("static const machine_pin_obj_t *pin_af_table[] = {\n")
-            for row in self.board_pins:
-                pin = "PIN_" + row[0].upper()
-                table_file.write("    #ifdef " + pin + "\n")
-                table_file.write("    &%s_obj,\n" % pin)
-                table_file.write("    #endif\n")
-            table_file.write("};\n")
-
-            # Create the CPU pins dictionary table
-
-            table_file.write("\n#if MICROPY_PY_MACHINE_PIN_BOARD_CPU\n")
-            table_file.write("\n// The cpu pins dictionary\n\n")
-            table_file.write(
-                "STATIC const mp_rom_map_elem_t pin_cpu_pins_locals_dict_table[] = {\n"
-            )
-            for row in self.board_pins:
-                pin = "PIN_" + row[0].upper()
-                table_file.write("    #ifdef " + pin + "\n")
-                table_file.write(
-                    "    { MP_ROM_QSTR(MP_QSTR_%s), MP_ROM_PTR(&%s_obj) },\n"
-                    % (row[0].upper(), pin)
-                )
-                table_file.write("    #endif\n")
-            table_file.write("};\n")
-            table_file.write(
-                "MP_DEFINE_CONST_DICT(machine_pin_cpu_pins_locals_dict, pin_cpu_pins_locals_dict_table);\n"
-            )
-
-            # Create the board pins dictionary table
-
-            table_file.write("\n// The board pins dictionary\n\n")
-            table_file.write(
-                "STATIC const mp_rom_map_elem_t pin_board_pins_locals_dict_table[] = {\n"
-            )
-            for row in self.board_pins:
-                pin = "PIN_" + row[0].upper()
-                if pin in self.pin_names:
-                    table_file.write("    #ifdef " + pin + "\n")
-                    table_file.write(
-                        "    { MP_ROM_QSTR(MP_QSTR_%s), MP_ROM_PTR(&%s_obj) },\n"
-                        % (self.pin_names[pin][0], pin)
-                    )
-                    table_file.write("    #endif\n")
-            table_file.write("};\n")
-            table_file.write(
-                "MP_DEFINE_CONST_DICT(machine_pin_board_pins_locals_dict, pin_board_pins_locals_dict_table);\n"
-            )
-            table_file.write("#endif\n")
-
-
-def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pin-af.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate MCU-specific pin cap table file",
-    )
-    parser.add_argument(
-        "-c",
-        "--csv",
-        dest="csv_filename",
-        help="Specifies the pin-af-table.csv filename",
-    )
-    parser.add_argument(
-        "-b",
-        "--board",
-        dest="pin_filename",
-        help="Specifies the pins.csv filename",
-    )
-    parser.add_argument(
-        "-t",
-        "--table",
-        dest="table_filename",
-        help="Specifies the name of the generated pin cap table file",
-    )
-    parser.add_argument(
-        "-m",
-        "--mcu",
-        dest="mcu_name",
-        help="Specifies type of the MCU (SAMD21 or SAMD51)",
-    )
-    args = parser.parse_args(sys.argv[1:])
-
-    pins = Pins()
-
-    if args.csv_filename:
-        pins.parse_csv_file(args.csv_filename)
-
-    if args.pin_filename:
-        pins.parse_pin_file(args.pin_filename)
-
-    if args.table_filename:
-        pins.print_table(args.table_filename, args.mcu_name)
-
-
-if __name__ == "__main__":
-    main()
diff --git a/ports/samd/boards/make-pins.py b/ports/samd/boards/make-pins.py
new file mode 100644
index 0000000000..302eeae624
--- /dev/null
+++ b/ports/samd/boards/make-pins.py
@@ -0,0 +1,95 @@
+#!/usr/bin/env python
+
+
+from collections import defaultdict, namedtuple
+import os
+import re
+import sys
+
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
+import boardgen
+
+
+# These are the columns of the af.csv as well as the arguments to the PIN()
+# macro in samd_prefix.c.
+AFS = {
+    "SAMD21": ["eic", "adc0", "sercom1", "sercom2", "tcc1", "tcc2"],
+    "SAMD51": ["eic", "adc0", "adc1", "sercom1", "sercom2", "tc", "tcc1", "tcc2"],
+}
+
+
+class SamdPin(boardgen.Pin):
+    def __init__(self, cpu_pin_name):
+        super().__init__(cpu_pin_name)
+
+        # P<port><num> (already verified by validate_cpu_pin_name).
+        self._port = cpu_pin_name[1]
+        self._pin = int(cpu_pin_name[2:])
+
+        # List of uint8 values from the af.csv. Default to 0xff if not
+        # present.
+        self._afs = defaultdict(lambda: 0xFF)
+
+    # Called for each AF defined in the csv file for this pin.
+    def add_af(self, af_idx, af_name, af):
+        # samd-specific: Any pin in the af.csv is implicitly part of the board
+        # pins.csv and will therefore be in the Pin.cpu dict. This is
+        # equivalent to adding `,Pxy` to the board.csv for every pin in the
+        # af.csv.
+        self._available = True
+
+        name = AFS[self._generator.args.mcu][af_idx]
+        assert name == af_name.lower()
+        if name == "eic" or name.startswith("adc"):
+            # eic and adc columns are decimal.
+            v = int(af)
+        else:
+            # hex, high nibble is device number, low nibble is pad number.
+            v = int(af, 16)
+        self._afs[AFS[self._generator.args.mcu][af_idx]] = v
+
+    # Use the PIN() macro defined in samd_prefix.c for defining the pin
+    # objects.
+    def definition(self):
+        # SAMD21: PIN(p_name, p_eic, p_adc0, p_sercom1, p_sercom2, p_tcc1, p_tcc2)
+        # SAMD51: PIN(p_name, p_eic, p_adc0, p_adc1, p_sercom1, p_sercom2, p_tc, p_tcc1, p_tcc2)
+        return "PIN({:s}, {})".format(
+            self.name(),
+            ", ".join("0x{:02x}".format(self._afs[x]) for x in AFS[self._generator.args.mcu]),
+        )
+
+    # Wrap all definitions to ensure that the ASF defines this pin for this
+    # particular MCU.
+    def enable_macro(self):
+        return "defined(PIN_{})".format(self.name())
+
+    # SAMD cpu names must be "P<port><num>", with zero-prefixed two-digit <num>.
+    @staticmethod
+    def validate_cpu_pin_name(cpu_pin_name):
+        boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
+
+        if not re.match("P[A-D][0-9][0-9]$", cpu_pin_name):
+            raise boardgen.PinGeneratorError("Invalid cpu pin name '{}'".format(cpu_pin_name))
+
+
+class SamdPinGenerator(boardgen.PinGenerator):
+    def __init__(self):
+        # Use custom pin type above, and also enable the --af-csv argument so
+        # that add_af gets called on each pin.
+        super().__init__(
+            pin_type=SamdPin,
+            enable_af=True,
+        )
+
+    # Override the default implementation just to change the default arguments
+    # (extra header row, skip first column).
+    def parse_af_csv(self, filename):
+        return super().parse_af_csv(filename, header_rows=1, pin_col=0, af_col=1)
+
+    # We need to know the mcu to emit the correct AF list.
+    def extra_args(self, parser):
+        parser.add_argument("--mcu")
+
+
+if __name__ == "__main__":
+    SamdPinGenerator().main()
diff --git a/ports/samd/boards/pins_prefix.c b/ports/samd/boards/pins_prefix.c
new file mode 100644
index 0000000000..4f0095d332
--- /dev/null
+++ b/ports/samd/boards/pins_prefix.c
@@ -0,0 +1,21 @@
+// pins_prefix.c becomes the initial portion of the generated pins file.
+
+#include <stdio.h>
+
+#include "py/obj.h"
+#include "py/mphal.h"
+#include "extmod/modmachine.h"
+#include "pin_af.h"
+#include "genhdr/pins.h"
+
+#if defined(MCU_SAMD21)
+
+#define PIN(p_name, p_eic, p_adc0, p_sercom1, p_sercom2, p_tcc1, p_tcc2) \
+    {{&machine_pin_type}, PIN_##p_name, MP_QSTR_##p_name, p_eic, p_adc0, p_sercom1, p_sercom2, p_tcc1, p_tcc2 }
+
+#elif defined(MCU_SAMD51)
+
+#define PIN(p_name, p_eic, p_adc0, p_adc1, p_sercom1, p_sercom2, p_tc, p_tcc1, p_tcc2) \
+    {{&machine_pin_type}, PIN_##p_name, MP_QSTR_##p_name, p_eic, p_adc0, p_adc1, p_sercom1, p_sercom2, p_tc, p_tcc1, p_tcc2 }
+
+#endif
diff --git a/ports/samd/machine_adc.c b/ports/samd/machine_adc.c
index 981318d33f..2e4d4ed842 100644
--- a/ports/samd/machine_adc.c
+++ b/ports/samd/machine_adc.c
@@ -89,8 +89,8 @@ STATIC void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_p
     (void)kind;
     machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
 
-    mp_printf(print, "ADC(%s, device=%u, channel=%u, bits=%u, average=%u, vref=%d)",
-        pin_name(self->id), self->adc_config.device,
+    mp_printf(print, "ADC(%q, device=%u, channel=%u, bits=%u, average=%u, vref=%d)",
+        pin_find_by_id(self->id)->name, self->adc_config.device,
         self->adc_config.channel, self->bits, 1 << self->avg, self->vref);
 }
 
diff --git a/ports/samd/machine_dac.c b/ports/samd/machine_dac.c
index 195c06e4f4..5c9d77624d 100644
--- a/ports/samd/machine_dac.c
+++ b/ports/samd/machine_dac.c
@@ -152,7 +152,7 @@ STATIC mp_obj_t dac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_
 
 STATIC void dac_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     dac_obj_t *self = self_in;
-    mp_printf(print, "DAC(%u, Pin=%s, vref=%d)", self->id, pin_name(self->gpio_id), self->vref);
+    mp_printf(print, "DAC(%u, Pin=%q, vref=%d)", self->id, pin_find_by_id(self->gpio_id)->name, self->vref);
 }
 
 STATIC mp_obj_t dac_write(mp_obj_t self_in, mp_obj_t value_in) {
diff --git a/ports/samd/machine_pin.c b/ports/samd/machine_pin.c
index f8e1b96280..30b254722b 100644
--- a/ports/samd/machine_pin.c
+++ b/ports/samd/machine_pin.c
@@ -54,8 +54,7 @@ typedef struct _machine_pin_irq_obj_t {
     uint8_t pin_id;
 } machine_pin_irq_obj_t;
 
-#if MICROPY_PY_MACHINE_PIN_BOARD_CPU
-// Pin mapping dictionaries
+// Pin mapping dictionaries generated by make-pins.py.
 MP_DEFINE_CONST_OBJ_TYPE(
     machine_pin_cpu_pins_obj_type,
     MP_QSTR_cpu,
@@ -69,7 +68,6 @@ MP_DEFINE_CONST_OBJ_TYPE(
     MP_TYPE_FLAG_NONE,
     locals_dict, &machine_pin_board_pins_locals_dict
     );
-#endif // MICROPY_PY_MACHINE_PIN_BOARD_CPU
 
 STATIC const mp_irq_methods_t machine_pin_irq_methods;
 
@@ -90,11 +88,10 @@ STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
         mode_str = (mp_hal_get_pin_direction(self->pin_id) == GPIO_DIRECTION_OUT) ? "OUT" : "IN";
     }
 
-    mp_printf(print, "Pin(\"%s\", mode=%s, pull=%s, GPIO=P%c%02u)",
-        pin_name(self->pin_id),
+    mp_printf(print, "Pin(Pin.cpu.%q, mode=%s, pull=%s)",
+        self->name,
         mode_str,
-        pull_str[mp_hal_get_pull_mode(self->pin_id)],
-        "ABCD"[self->pin_id / 32], self->pin_id % 32);
+        pull_str[mp_hal_get_pull_mode(self->pin_id)]);
 }
 
 STATIC void pin_validate_drive(bool strength) {
@@ -292,7 +289,7 @@ STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_
     mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     // Get the IRQ object.
-    uint8_t eic_id = get_pin_obj_ptr(self->pin_id)->eic;
+    uint8_t eic_id = self->eic;
     machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]);
     if (irq != NULL && irq->pin_id != self->pin_id) {
         mp_raise_ValueError(MP_ERROR_TEXT("IRQ already used"));
@@ -428,11 +425,9 @@ STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_drive), MP_ROM_PTR(&machine_pin_drive_obj) },
     { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_pin_irq_obj) },
 
-    #if MICROPY_PY_MACHINE_PIN_BOARD_CPU
     // class attributes
-    { MP_ROM_QSTR(MP_QSTR_board),   MP_ROM_PTR(&machine_pin_board_pins_obj_type) },
-    { MP_ROM_QSTR(MP_QSTR_cpu),     MP_ROM_PTR(&machine_pin_cpu_pins_obj_type) },
-    #endif // MICROPY_PY_MACHINE_PIN_BOARD_CPU
+    { MP_ROM_QSTR(MP_QSTR_board), MP_ROM_PTR(&machine_pin_board_pins_obj_type) },
+    { MP_ROM_QSTR(MP_QSTR_cpu), MP_ROM_PTR(&machine_pin_cpu_pins_obj_type) },
 
     // class constants
     { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_MODE_IN) },
diff --git a/ports/samd/machine_pwm.c b/ports/samd/machine_pwm.c
index 196a9b1435..6fc8145372 100644
--- a/ports/samd/machine_pwm.c
+++ b/ports/samd/machine_pwm.c
@@ -114,8 +114,8 @@ STATIC void mp_machine_pwm_stop(machine_pwm_obj_t *self);
 
 STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "PWM(%s, device=%u, channel=%u, output=%u)",
-        pin_name(self->pin_id), self->device, self->channel, self->output);
+    mp_printf(print, "PWM(%q, device=%u, channel=%u, output=%u)",
+        pin_find_by_id(self->pin_id)->name, self->device, self->channel, self->output);
 }
 
 // called by the constructor and init()
diff --git a/ports/samd/machine_uart.c b/ports/samd/machine_uart.c
index c081b8814b..ada193020b 100644
--- a/ports/samd/machine_uart.c
+++ b/ports/samd/machine_uart.c
@@ -120,7 +120,7 @@ STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_
         ", txbuf=%d"
         #endif
         #if MICROPY_HW_UART_RTSCTS
-        ", rts=%s, cts=%s"
+        ", rts=%q, cts=%q"
         #endif
         ")",
         self->id, self->baudrate, self->bits, _parity_name[self->parity],
@@ -129,8 +129,8 @@ STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_
         , self->write_buffer.size - 1
         #endif
         #if MICROPY_HW_UART_RTSCTS
-        , self->rts != 0xff ? pin_name(self->rts) : "None"
-        , self->cts != 0xff ? pin_name(self->cts) : "None"
+        , self->rts != 0xff ? pin_find_by_id(self->rts)->name : MP_QSTR_None
+        , self->cts != 0xff ? pin_find_by_id(self->cts)->name : MP_QSTR_None
         #endif
         );
 }
diff --git a/ports/samd/mcu/samd21/mpconfigmcu.h b/ports/samd/mcu/samd21/mpconfigmcu.h
index f70981acd5..1a3d958729 100644
--- a/ports/samd/mcu/samd21/mpconfigmcu.h
+++ b/ports/samd/mcu/samd21/mpconfigmcu.h
@@ -37,10 +37,6 @@ unsigned long trng_random_u32(int delay);
 
 #define MICROPY_PY_OS_URANDOM           (1)
 
-#ifndef MICROPY_PY_MACHINE_PIN_BOARD_CPU
-#define MICROPY_PY_MACHINE_PIN_BOARD_CPU (1)
-#endif
-
 #define CPU_FREQ                        (48000000)
 #define DFLL48M_FREQ                    (48000000)
 #define MAX_CPU_FREQ                    (54000000)
diff --git a/ports/samd/mcu/samd21/pin-af-table.csv b/ports/samd/mcu/samd21/pin-af-table.csv
index b74db0c8ef..37bb592597 100644
--- a/ports/samd/mcu/samd21/pin-af-table.csv
+++ b/ports/samd/mcu/samd21/pin-af-table.csv
@@ -9,57 +9,56 @@
 # The first column is the pin id, not the number of the board pin.
 # Rows not starting with pa, pb, pc or pd are ignored.
 # When editing the table with a spread sheet, take care to import the data as text.
-#
-# Pin,EIC,ADC,SERCOM1,SERCOM2,TC,TCC
-pa00,0,,,10,20,
-pa01,1,,,11,21,
-pa02,2,0,,,,
-pa03,3,1,,,,
-pb04,4,12,,,,
-pb05,5,13,,,,
-pb06,6,14,,,,
-pb07,7,15,,,,
-pb08,8,2,,40,40,
-pb09,9,3,,41,41,
-pa04,4,4,,00,00,
-pa05,5,5,,01,01,
-pa06,6,6,,02,10,
-pa07,7,7,,03,11,
-pa08,,16,00,20,00,12
-pa09,9,17,01,21,01,13
-pa10,10,18,02,22,10,02
-pa11,11,19,03,23,11,03
-pb10,10,,,42,50,04
-pb11,11,,,43,51,05
-pb12,12,,40,,40,06
-pb13,13,,41,,41,07
-pb14,14,,42,,50,
-pb15,15,,43,,51,
-pa12,12,,20,40,20,06
-pa13,13,,21,41,20,07
-pa14,14,,22,42,30,04
-pa15,15,,23,43,31,05
-pa16,0,,10,30,20,06
-pa17,1,,11,31,21,07
-pa18,2,,12,32,30,02
-pa19,3,,13,33,31,03
-pb16,9,,50,,60,04
-pb17,1,,51,,61,05
-pa20,4,,52,32,70,04
-pa21,5,,53,33,71,07
-pa22,6,,30,50,40,04
-pa23,7,,31,51,41,05
-pa24,12,,32,52,50,12
-pa25,13,,33,53,51,13
-pb22,6,,,52,70,
-pb23,7,,,53,71,
-pa27,15,,,,,
-pa28,8,,,,,
-pa30,10,,,12,10,
-pa31,11,,,13,11,
-pb30,14,,,50,00,12
-pb31,15,,,51,01,13
-pb00,0,8,,52,70,
-pb01,1,9,,53,71,
-pb02,2,10,,50,60,
-pb03,3,11,,51,61,
+Pin,EIC,ADC0,SERCOM1,SERCOM2,TCC1,TCC2
+PA00,0,,,10,20,
+PA01,1,,,11,21,
+PA02,2,0,,,,
+PA03,3,1,,,,
+PB04,4,12,,,,
+PB05,5,13,,,,
+PB06,6,14,,,,
+PB07,7,15,,,,
+PB08,8,2,,40,40,
+PB09,9,3,,41,41,
+PA04,4,4,,00,00,
+PA05,5,5,,01,01,
+PA06,6,6,,02,10,
+PA07,7,7,,03,11,
+PA08,,16,00,20,00,12
+PA09,9,17,01,21,01,13
+PA10,10,18,02,22,10,02
+PA11,11,19,03,23,11,03
+PB10,10,,,42,50,04
+PB11,11,,,43,51,05
+PB12,12,,40,,40,06
+PB13,13,,41,,41,07
+PB14,14,,42,,50,
+PB15,15,,43,,51,
+PA12,12,,20,40,20,06
+PA13,13,,21,41,20,07
+PA14,14,,22,42,30,04
+PA15,15,,23,43,31,05
+PA16,0,,10,30,20,06
+PA17,1,,11,31,21,07
+PA18,2,,12,32,30,02
+PA19,3,,13,33,31,03
+PB16,9,,50,,60,04
+PB17,1,,51,,61,05
+PA20,4,,52,32,70,04
+PA21,5,,53,33,71,07
+PA22,6,,30,50,40,04
+PA23,7,,31,51,41,05
+PA24,12,,32,52,50,12
+PA25,13,,33,53,51,13
+PB22,6,,,52,70,
+PB23,7,,,53,71,
+PA27,15,,,,,
+PA28,8,,,,,
+PA30,10,,,12,10,
+PA31,11,,,13,11,
+PB30,14,,,50,00,12
+PB31,15,,,51,01,13
+PB00,0,8,,52,70,
+PB01,1,9,,53,71,
+PB02,2,10,,50,60,
+PB03,3,11,,51,61,
diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h
index 399b48c040..7c95c341b9 100644
--- a/ports/samd/mcu/samd51/mpconfigmcu.h
+++ b/ports/samd/mcu/samd51/mpconfigmcu.h
@@ -30,10 +30,6 @@
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC (trng_random_u32())
 unsigned long trng_random_u32(void);
 
-#ifndef MICROPY_PY_MACHINE_PIN_BOARD_CPU
-#define MICROPY_PY_MACHINE_PIN_BOARD_CPU (1)
-#endif
-
 // fatfs configuration used in ffconf.h
 #define MICROPY_FATFS_ENABLE_LFN            (1)
 #define MICROPY_FATFS_RPATH                 (2)
diff --git a/ports/samd/mcu/samd51/pin-af-table.csv b/ports/samd/mcu/samd51/pin-af-table.csv
index 249ce6865c..69f51a33ca 100644
--- a/ports/samd/mcu/samd51/pin-af-table.csv
+++ b/ports/samd/mcu/samd51/pin-af-table.csv
@@ -10,104 +10,103 @@
 # The first column is the pin id, not the number of the board pin.
 # Rows not starting with pa, pb, pc or pd are ignored.
 # When editing the table with a spread sheet, take care to import the data as text.
-#
-# Pin,EIC,ADC0,ADC1,SERCOM1,SERCOM2,TC,TCC1,TCC2
-pb03,9,15,,,51,61,,
-pa00,0,,,,10,20,,
-pa01,1,,,,11,21,,
-pc00,0,,10,,,,,
-pc01,1,,11,,,,,
-pc02,2,,4,,,,,
-pc03,3,,5,,,,,
-pa02,2,0,,,,,,
-pa03,3,10,,,,,,
-pb04,4,,6,,,,,
-pb05,5,,7,,,,,
-pd00,0,,14,,,,,
-pd01,1,,15,,,,,
-pb06,6,,8,,,,,
-pb07,7,,9,,,,,
-pb08,8,2,0,,40,40,,
-pb09,9,3,1,,41,41,,
-pa04,4,4,,,00,00,,
-pa05,5,5,,,01,01,,
-pa06,6,6,,,02,10,,
-pa07,7,7,,,03,11,,
-pc04,4,,,60,,,00,
-pc05,5,,,61,,,,
-pc06,6,,,62,,,,
-pc07,9,,,63,,,,
-pa08,,8,2,00,21,00,00,14
-pa09,9,9,3,01,20,01,01,15
-pa10,10,10,,02,22,10,02,16
-pa11,11,11,,03,23,11,03,17
-pb10,10,,,,42,50,04,10
-pb11,12,,,,43,51,05,11
-pb12,12,,,40,,40,30,00
-pb13,13,,,41,,41,31,01
-pb14,14,,,42,,50,40,02
-pb15,15,,,43,,51,41,03
-pd08,3,,,70,61,,01,
-pd09,4,,,71,60,,02,
-pd10,5,,,72,62,,03,
-pd11,6,,,73,63,,04,
-pd12,7,,,,,,05,
-pc10,10,,,62,72,,00,14
-pc11,11,,,63,73,,01,15
-pc12,12,,,70,61,,02,16
-pc13,13,,,71,60,,03,17
-pc14,14,,,72,62,,04,10
-pc15,15,,,73,63,,05,11
-pa12,12,,,20,41,20,06,12
-pa13,13,,,21,40,21,07,13
-pa14,14,,,22,42,30,20,12
-pa15,15,,,23,43,31,21,13
-pa16,0,,,10,31,20,10,04
-pa17,1,,,11,30,21,11,05
-pa18,2,,,12,32,30,12,06
-pa19,3,,,13,33,31,13,07
-pc16,0,,,60,01,,00,
-pc17,1,,,61,00,,01,
-pc18,2,,,62,02,,02,
-pc19,3,,,63,03,,03,
-pc20,4,,,,,,04,
-pc21,5,,,,,,05,
-pc22,6,,,10,31,,05,
-pc23,7,,,11,30,,07,
-pd20,10,,,12,32,,10,
-pd21,11,,,13,33,,11,
-pb16,0,,,50,,60,30,04
-pb17,1,,,51,,61,31,05
-pb18,2,,,52,72,,10,
-pb19,3,,,53,73,,11,
-pb20,4,,,30,71,,12,
-pb21,5,,,31,70,,13,
-pa20,4,,,52,32,70,14,00
-pa21,5,,,53,33,71,15,01
-pa22,6,,,30,51,40,16,02
-pa23,7,,,31,50,41,17,03
-pa24,8,,,32,52,50,22,
-pa25,9,,,33,53,51,,
-pb22,22,,,12,52,70,,
-pb23,7,,,13,53,71,,
-pb24,8,,,00,21,,,
-pb25,9,,,01,20,,,
-pb26,12,,,20,41,,12,
-pb27,13,,,21,40,,13,
-pb28,14,,,22,42,,14,
-pb29,15,,,23,43,,15,
-pc24,8,,,02,22,,,
-pc25,9,,,03,23,,,
-pc26,10,,,,,,,
-pc27,11,,,10,,,,
-pc28,12,,,11,,,,
-pa27,11,,,,,,,
-pa30,14,,,72,12,60,20,
-pa31,15,,,73,13,61,21,
-pb30,14,,,70,51,00,40,06
-pb31,15,,,71,50,01,41,07
-pc30,14,,12,,,,,
-pc31,15,,13,,,,,
-pb00,9,12,,,52,70,,
-pb01,1,13,,,53,71,,
-pb02,2,14,,,50,60,22,
+Pin,EIC,ADC0,ADC1,SERCOM1,SERCOM2,TC,TCC1,TCC2
+PB03,9,15,,,51,61,,
+PA00,0,,,,10,20,,
+PA01,1,,,,11,21,,
+PC00,0,,10,,,,,
+PC01,1,,11,,,,,
+PC02,2,,4,,,,,
+PC03,3,,5,,,,,
+PA02,2,0,,,,,,
+PA03,3,10,,,,,,
+PB04,4,,6,,,,,
+PB05,5,,7,,,,,
+PD00,0,,14,,,,,
+PD01,1,,15,,,,,
+PB06,6,,8,,,,,
+PB07,7,,9,,,,,
+PB08,8,2,0,,40,40,,
+PB09,9,3,1,,41,41,,
+PA04,4,4,,,00,00,,
+PA05,5,5,,,01,01,,
+PA06,6,6,,,02,10,,
+PA07,7,7,,,03,11,,
+PC04,4,,,60,,,00,
+PC05,5,,,61,,,,
+PC06,6,,,62,,,,
+PC07,9,,,63,,,,
+PA08,,8,2,00,21,00,00,14
+PA09,9,9,3,01,20,01,01,15
+PA10,10,10,,02,22,10,02,16
+PA11,11,11,,03,23,11,03,17
+PB10,10,,,,42,50,04,10
+PB11,12,,,,43,51,05,11
+PB12,12,,,40,,40,30,00
+PB13,13,,,41,,41,31,01
+PB14,14,,,42,,50,40,02
+PB15,15,,,43,,51,41,03
+PD08,3,,,70,61,,01,
+PD09,4,,,71,60,,02,
+PD10,5,,,72,62,,03,
+PD11,6,,,73,63,,04,
+PD12,7,,,,,,05,
+PC10,10,,,62,72,,00,14
+PC11,11,,,63,73,,01,15
+PC12,12,,,70,61,,02,16
+PC13,13,,,71,60,,03,17
+PC14,14,,,72,62,,04,10
+PC15,15,,,73,63,,05,11
+PA12,12,,,20,41,20,06,12
+PA13,13,,,21,40,21,07,13
+PA14,14,,,22,42,30,20,12
+PA15,15,,,23,43,31,21,13
+PA16,0,,,10,31,20,10,04
+PA17,1,,,11,30,21,11,05
+PA18,2,,,12,32,30,12,06
+PA19,3,,,13,33,31,13,07
+PC16,0,,,60,01,,00,
+PC17,1,,,61,00,,01,
+PC18,2,,,62,02,,02,
+PC19,3,,,63,03,,03,
+PC20,4,,,,,,04,
+PC21,5,,,,,,05,
+PC22,6,,,10,31,,05,
+PC23,7,,,11,30,,07,
+PD20,10,,,12,32,,10,
+PD21,11,,,13,33,,11,
+PB16,0,,,50,,60,30,04
+PB17,1,,,51,,61,31,05
+PB18,2,,,52,72,,10,
+PB19,3,,,53,73,,11,
+PB20,4,,,30,71,,12,
+PB21,5,,,31,70,,13,
+PA20,4,,,52,32,70,14,00
+PA21,5,,,53,33,71,15,01
+PA22,6,,,30,51,40,16,02
+PA23,7,,,31,50,41,17,03
+PA24,8,,,32,52,50,22,
+PA25,9,,,33,53,51,,
+PB22,22,,,12,52,70,,
+PB23,7,,,13,53,71,,
+PB24,8,,,00,21,,,
+PB25,9,,,01,20,,,
+PB26,12,,,20,41,,12,
+PB27,13,,,21,40,,13,
+PB28,14,,,22,42,,14,
+PB29,15,,,23,43,,15,
+PC24,8,,,02,22,,,
+PC25,9,,,03,23,,,
+PC26,10,,,,,,,
+PC27,11,,,10,,,,
+PC28,12,,,11,,,,
+PA27,11,,,,,,,
+PA30,14,,,72,12,60,20,
+PA31,15,,,73,13,61,21,
+PB30,14,,,70,51,00,40,06
+PB31,15,,,71,50,01,41,07
+PC30,14,,12,,,,,
+PC31,15,,13,,,,,
+PB00,9,12,,,52,70,,
+PB01,1,13,,,53,71,,
+PB02,2,14,,,50,60,22,
diff --git a/ports/samd/pin_af.c b/ports/samd/pin_af.c
index 6de9a74778..ca11e3b7a8 100644
--- a/ports/samd/pin_af.c
+++ b/ports/samd/pin_af.c
@@ -40,30 +40,26 @@
 
 extern const uint8_t tcc_channel_count[];
 
-#include "pin_af_table.c"
-
 // Just look for an table entry for a given pin and raise an error
 // in case of no match (which should not happen).
-
-const machine_pin_obj_t *get_pin_obj_ptr(int pin_id) {
-    for (int i = 0; i < MP_ARRAY_SIZE(pin_af_table); i++) {
-        if (pin_af_table[i]->pin_id == pin_id) { // Pin match
-            return pin_af_table[i];
+const machine_pin_obj_t *pin_find_by_id(int pin_id) {
+    const mp_map_t *cpu_map = &machine_pin_cpu_pins_locals_dict.map;
+    for (uint i = 0; i < cpu_map->alloc; i++) {
+        machine_pin_obj_t *pin = MP_OBJ_TO_PTR(cpu_map->table[i].value);
+        if (pin->pin_id == pin_id) {
+            return pin;
         }
     }
     mp_raise_ValueError(MP_ERROR_TEXT("not a Pin"));
 }
 
-#if MICROPY_PY_MACHINE_PIN_BOARD_CPU
 STATIC const machine_pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) {
-    mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)named_pins);
-    mp_map_elem_t *named_elem = mp_map_lookup(named_map, name, MP_MAP_LOOKUP);
-    if (named_elem != NULL && named_elem->value != NULL) {
+    mp_map_elem_t *named_elem = mp_map_lookup((mp_map_t *)&named_pins->map, name, MP_MAP_LOOKUP);
+    if (named_elem != NULL) {
         return named_elem->value;
     }
     return NULL;
 }
-#endif
 
 const machine_pin_obj_t *pin_find(mp_obj_t pin) {
     // Is already a object of the proper type
@@ -72,10 +68,9 @@ const machine_pin_obj_t *pin_find(mp_obj_t pin) {
     }
     if (mp_obj_is_small_int(pin)) {
         // Pin defined by pin number for PAnn, PBnn, etc.
-        return get_pin_obj_ptr(mp_obj_get_int(pin));
+        return pin_find_by_id(mp_obj_get_int(pin));
     }
 
-    #if MICROPY_PY_MACHINE_PIN_BOARD_CPU
     const machine_pin_obj_t *self = NULL;
     // See if the pin name matches a board pin
     self = pin_find_named_pin(&machine_pin_board_pins_locals_dict, pin);
@@ -87,47 +82,17 @@ const machine_pin_obj_t *pin_find(mp_obj_t pin) {
     if (self != NULL) {
         return self;
     }
-    #else
-    if (mp_obj_is_str(pin)) {
-        // Search by name
-        size_t slen;
-        const char *s = mp_obj_str_get_data(pin, &slen);
-        // Check for a string like PA02 or PD12
-        if (slen == 4 && s[0] == 'P' && strchr("ABCD", s[1]) != NULL &&
-            strchr("0123456789", s[2]) != NULL && strchr("0123456789", s[2]) != NULL) {
-            int num = (s[1] - 'A') * 32 + (s[2] - '0') * 10 + (s[3] - '0');
-            return get_pin_obj_ptr(num);
-        } else {
-            for (int i = 0; i < MP_ARRAY_SIZE(pin_af_table); i++) {
-                size_t len;
-                const char *name = (char *)qstr_data(pin_af_table[i]->name, &len);
-                if (slen == len && strncmp(s, name, slen) == 0) {
-                    return pin_af_table[i];
-                }
-            }
-        }
-    }
-    #endif // MICROPY_PY_MACHINE_PIN_BOARD_CPU
 
     mp_raise_ValueError(MP_ERROR_TEXT("not a Pin"));
 }
 
-const char *pin_name(int id) {
-    for (int i = 0; i < sizeof(pin_af_table); i++) {
-        if (pin_af_table[i]->pin_id == id) {
-            return qstr_str(pin_af_table[i]->name);
-        }
-    }
-    return "-";
-}
-
 #if MICROPY_PY_MACHINE_I2C || MICROPY_PY_MACHINE_SPI || MICROPY_PY_MACHINE_UART
 // Test, whether the given pin is defined and has signals for sercom.
 // If that applies return the alt_fct and pad_nr.
 // If not, an error will be raised.
 
 sercom_pad_config_t get_sercom_config(int pin_id, uint8_t sercom_nr) {
-    const machine_pin_obj_t *pct_ptr = get_pin_obj_ptr(pin_id);
+    const machine_pin_obj_t *pct_ptr = pin_find_by_id(pin_id);
     if ((pct_ptr->sercom1 >> 4) == sercom_nr) {
         return (sercom_pad_config_t) {ALT_FCT_SERCOM1, pct_ptr->sercom1 & 0x0f};
     } else if ((pct_ptr->sercom2 >> 4) == sercom_nr) {
@@ -144,7 +109,7 @@ sercom_pad_config_t get_sercom_config(int pin_id, uint8_t sercom_nr) {
 // If not, an error will be raised.
 
 adc_config_t get_adc_config(int pin_id, int32_t flag) {
-    const machine_pin_obj_t *pct_ptr = get_pin_obj_ptr(pin_id);
+    const machine_pin_obj_t *pct_ptr = pin_find_by_id(pin_id);
     if (pct_ptr->adc0 != 0xff && (flag & (1 << pct_ptr->adc0)) == 0) {
         return (adc_config_t) {0, pct_ptr->adc0};
     #if defined(MUC_SAMD51)
@@ -166,7 +131,7 @@ adc_config_t get_adc_config(int pin_id, int32_t flag) {
 // tries to provide an unused device, if available.
 
 pwm_config_t get_pwm_config(int pin_id, int wanted_dev, uint8_t device_status[]) {
-    const machine_pin_obj_t *pct_ptr = get_pin_obj_ptr(pin_id);
+    const machine_pin_obj_t *pct_ptr = pin_find_by_id(pin_id);
     uint8_t tcc1 = pct_ptr->tcc1;
     uint8_t tcc2 = pct_ptr->tcc2;
 
diff --git a/ports/samd/pin_af.h b/ports/samd/pin_af.h
index 3a15ae7f35..83839a0503 100644
--- a/ports/samd/pin_af.h
+++ b/ports/samd/pin_af.h
@@ -92,14 +92,11 @@ typedef struct _pwm_config_t {
 #define ALT_FCT_SERCOM1   2
 #define ALT_FCT_SERCOM2   3
 
-#if MICROPY_PY_MACHINE_PIN_BOARD_CPU
 extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;
 extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;
-#endif
 
 sercom_pad_config_t get_sercom_config(int pin_id, uint8_t sercom);
 adc_config_t get_adc_config(int pin_id, int32_t flag);
 pwm_config_t get_pwm_config(int pin_id, int wanted_dev, uint8_t used_dev[]);
-const machine_pin_obj_t *get_pin_obj_ptr(int pin_id);
-const char *pin_name(int id);
+const machine_pin_obj_t *pin_find_by_id(int pin_id);
 const machine_pin_obj_t *pin_find(mp_obj_t pin);

From c0b64a3f23639bcc52d1488728771560bc9a1d0a Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 16 Aug 2023 16:45:09 +1000
Subject: [PATCH 108/310] mimxrt/boards/make-pins.py: Update to use
 tools/boardgen.py.

Minor change to remove support for using numeric IDs for machine.Pin.  This
was previously based on the index of the pin in the board csv, but this is
different (and incompatible) with other ports.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/mimxrt/Makefile                         |   1 -
 .../boards/MIMXRT1020_EVK/mpconfigboard.h     |   4 -
 ports/mimxrt/boards/MIMXRT1020_EVK/pins.csv   |   9 +
 .../boards/MIMXRT1050_EVK/mpconfigboard.h     |   4 -
 ports/mimxrt/boards/MIMXRT1050_EVK/pins.csv   |  10 +
 .../boards/MIMXRT1060_EVK/mpconfigboard.h     |   4 -
 ports/mimxrt/boards/MIMXRT1060_EVK/pins.csv   |  10 +
 .../boards/MIMXRT1064_EVK/mpconfigboard.h     |   4 -
 ports/mimxrt/boards/MIMXRT1064_EVK/pins.csv   |  10 +
 .../boards/MIMXRT1170_EVK/mpconfigboard.h     |   4 -
 ports/mimxrt/boards/MIMXRT1170_EVK/pins.csv   |  10 +
 .../boards/SEEED_ARCH_MIX/mpconfigboard.h     |   5 -
 ports/mimxrt/boards/SEEED_ARCH_MIX/pins.csv   |  12 +-
 ports/mimxrt/boards/TEENSY41/mpconfigboard.h  |   4 -
 ports/mimxrt/boards/TEENSY41/pins.csv         |   9 +
 ports/mimxrt/boards/make-pins.py              | 512 ++++++------------
 ports/mimxrt/boards/mimxrt_prefix.c           |   6 +-
 ports/mimxrt/eth.c                            |  20 +-
 ports/mimxrt/led.c                            |   8 +-
 ports/mimxrt/machine_pwm.c                    |   5 +-
 ports/mimxrt/pin.c                            |   8 -
 ports/mimxrt/pin.h                            |   3 -
 22 files changed, 256 insertions(+), 406 deletions(-)

diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index 879ee05f4a..bdf66926b6 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -61,7 +61,6 @@ AF_FILE = boards/$(MCU_SERIES)_af.csv
 BOARD_PINS = $(BOARD_DIR)/pins.csv
 PREFIX_FILE = boards/mimxrt_prefix.c
 GEN_FLEXRAM_CONFIG_SRC = $(BUILD)/flexram_config.s
-GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
 GEN_PINS_SRC = $(BUILD)/pins_gen.c
 
diff --git a/ports/mimxrt/boards/MIMXRT1020_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1020_EVK/mpconfigboard.h
index 8b7316c8da..b4f777cf93 100644
--- a/ports/mimxrt/boards/MIMXRT1020_EVK/mpconfigboard.h
+++ b/ports/mimxrt/boards/MIMXRT1020_EVK/mpconfigboard.h
@@ -170,10 +170,6 @@
 #define ENET_PHY_ADDRESS    (2)
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// Etherner PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_AD_B0_04
-#define ENET_INT_PIN        &pin_GPIO_AD_B1_06
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_AD_B0_08_ENET_REF_CLK1, 1, 0xB0E9u }, \
     { IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, 0, 0xB0E9u }, \
diff --git a/ports/mimxrt/boards/MIMXRT1020_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1020_EVK/pins.csv
index e1f2669b08..e524958dc8 100644
--- a/ports/mimxrt/boards/MIMXRT1020_EVK/pins.csv
+++ b/ports/mimxrt/boards/MIMXRT1020_EVK/pins.csv
@@ -38,3 +38,12 @@ SD_RX,GPIO_AD_B1_05
 SCK_TX,GPIO_AD_B1_01
 WS_TX,GPIO_AD_B1_02
 SD_TX,GPIO_AD_B1_03
+-ENET_RESET,-GPIO_AD_B0_04
+-ENET_INT,-GPIO_AD_B1_06
+-SD_CMD,-GPIO_SD_B0_02
+-SD_CLK,-GPIO_SD_B0_03
+-SD_CD,-GPIO_SD_B0_06
+-SD_DATA0,-GPIO_SD_B0_04
+-SD_DATA1,-GPIO_SD_B0_05
+-SD_DATA2,-GPIO_SD_B0_00
+-SD_DATA3,-GPIO_SD_B0_01
diff --git a/ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h
index 74666562a8..59a5c4fa69 100644
--- a/ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h
+++ b/ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h
@@ -160,10 +160,6 @@
 #define ENET_PHY_ADDRESS    (2)
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// Etherner PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_AD_B0_09
-#define ENET_INT_PIN        &pin_GPIO_AD_B0_10
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \
diff --git a/ports/mimxrt/boards/MIMXRT1050_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1050_EVK/pins.csv
index 4bdd9e4f03..dc624b6d28 100644
--- a/ports/mimxrt/boards/MIMXRT1050_EVK/pins.csv
+++ b/ports/mimxrt/boards/MIMXRT1050_EVK/pins.csv
@@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
 SCK_TX,GPIO_AD_B1_14
 WS_TX,GPIO_AD_B1_15
 SD_TX,GPIO_AD_B1_13
+
+-ENET_RESET,-GPIO_AD_B0_09
+-ENET_INT,-GPIO_AD_B0_10
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_CD_B,-GPIO_B1_12
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/MIMXRT1060_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1060_EVK/mpconfigboard.h
index 824f9977c2..58ecd74e3b 100644
--- a/ports/mimxrt/boards/MIMXRT1060_EVK/mpconfigboard.h
+++ b/ports/mimxrt/boards/MIMXRT1060_EVK/mpconfigboard.h
@@ -158,10 +158,6 @@
 #define ENET_PHY_ADDRESS    (2)
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// Etherner PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_AD_B0_09
-#define ENET_INT_PIN        &pin_GPIO_AD_B0_10
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \
diff --git a/ports/mimxrt/boards/MIMXRT1060_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1060_EVK/pins.csv
index 4bdd9e4f03..dc624b6d28 100644
--- a/ports/mimxrt/boards/MIMXRT1060_EVK/pins.csv
+++ b/ports/mimxrt/boards/MIMXRT1060_EVK/pins.csv
@@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
 SCK_TX,GPIO_AD_B1_14
 WS_TX,GPIO_AD_B1_15
 SD_TX,GPIO_AD_B1_13
+
+-ENET_RESET,-GPIO_AD_B0_09
+-ENET_INT,-GPIO_AD_B0_10
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_CD_B,-GPIO_B1_12
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/MIMXRT1064_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1064_EVK/mpconfigboard.h
index cb64d2b9d2..3170849fe7 100644
--- a/ports/mimxrt/boards/MIMXRT1064_EVK/mpconfigboard.h
+++ b/ports/mimxrt/boards/MIMXRT1064_EVK/mpconfigboard.h
@@ -158,10 +158,6 @@
 #define ENET_PHY_ADDRESS    (2)
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// Etherner PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_AD_B0_09
-#define ENET_INT_PIN        &pin_GPIO_AD_B0_10
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \
diff --git a/ports/mimxrt/boards/MIMXRT1064_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1064_EVK/pins.csv
index 4bdd9e4f03..dc624b6d28 100644
--- a/ports/mimxrt/boards/MIMXRT1064_EVK/pins.csv
+++ b/ports/mimxrt/boards/MIMXRT1064_EVK/pins.csv
@@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
 SCK_TX,GPIO_AD_B1_14
 WS_TX,GPIO_AD_B1_15
 SD_TX,GPIO_AD_B1_13
+
+-ENET_RESET,-GPIO_AD_B0_09
+-ENET_INT,-GPIO_AD_B0_10
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_CD_B,-GPIO_B1_12
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/MIMXRT1170_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1170_EVK/mpconfigboard.h
index 8ce91adbaf..131c5e1725 100644
--- a/ports/mimxrt/boards/MIMXRT1170_EVK/mpconfigboard.h
+++ b/ports/mimxrt/boards/MIMXRT1170_EVK/mpconfigboard.h
@@ -155,10 +155,6 @@
 #define ENET_PHY            KSZ8081
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// 10/100 Ethernet PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_LPSR_12
-#define ENET_INT_PIN        &pin_GPIO_AD_12
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_DISP_B2_06_ENET_RX_DATA00, 0, 0x06u }, \
     { IOMUXC_GPIO_DISP_B2_07_ENET_RX_DATA01, 0, 0x06u }, \
diff --git a/ports/mimxrt/boards/MIMXRT1170_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1170_EVK/pins.csv
index 77f87e8ba1..30062fe344 100644
--- a/ports/mimxrt/boards/MIMXRT1170_EVK/pins.csv
+++ b/ports/mimxrt/boards/MIMXRT1170_EVK/pins.csv
@@ -57,3 +57,13 @@ SD_RX,GPIO_AD_20
 SCK_TX,GPIO_AD_22
 WS_TX,GPIO_AD_23
 SD_TX,GPIO_AD_21
+
+-ENET_RESET,-GPIO_LPSR_12
+-ENET_INT,-GPIO_AD_12
+-ENET_1_RESET,-GPIO_DISP_B2_13
+-SD_CMD,-GPIO_SD_B1_00
+-SD_CLK,-GPIO_SD_B1_01
+-SD_DATA0,-GPIO_SD_B1_02
+-SD_DATA1,-GPIO_SD_B1_03
+-SD_DATA2,-GPIO_SD_B1_04
+-SD_DATA3,-GPIO_SD_B1_05
diff --git a/ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.h b/ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.h
index edda72f266..627b1aa3b1 100644
--- a/ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.h
+++ b/ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.h
@@ -127,11 +127,6 @@
 #define ENET_PHY_OPS        phylan8720_ops
 #define ENET_TX_CLK_OUTPUT  false
 
-// Etherner PIN definitions
-// No reset and interrupt pin by intention
-#define ENET_RESET_PIN      NULL
-#define ENET_INT_PIN        NULL
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \
diff --git a/ports/mimxrt/boards/SEEED_ARCH_MIX/pins.csv b/ports/mimxrt/boards/SEEED_ARCH_MIX/pins.csv
index 6b757fae4b..785a442dbc 100644
--- a/ports/mimxrt/boards/SEEED_ARCH_MIX/pins.csv
+++ b/ports/mimxrt/boards/SEEED_ARCH_MIX/pins.csv
@@ -9,7 +9,7 @@ J3_11,GPIO_B1_07
 J3_12,GPIO_B1_09
 J3_13,GPIO_B1_10
 J3_14,GPIO_AD_B0_14
-J3_15,GPO_AD_B0_15
+J3_15,GPIO_AD_B0_15
 J3_16,GPIO_AD_B1_00
 J3_17,GPIO_AD_B1_01
 J3_19,GPIO_AD_B0_13
@@ -67,3 +67,13 @@ SD_RX,GPIO_AD_B1_12
 SCK_TX,GPIO_AD_B1_14
 WS_TX,GPIO_AD_B1_15
 SD_TX,GPIO_AD_B1_13
+
+# No ethernet reset and interrupt pin by intention
+
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_CD_B,-GPIO_B1_12
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/TEENSY41/mpconfigboard.h b/ports/mimxrt/boards/TEENSY41/mpconfigboard.h
index 09addbe52c..bff319c6d1 100644
--- a/ports/mimxrt/boards/TEENSY41/mpconfigboard.h
+++ b/ports/mimxrt/boards/TEENSY41/mpconfigboard.h
@@ -125,10 +125,6 @@
 #define ENET_PHY_ADDRESS    (0)
 #define ENET_PHY_OPS        phydp83825_ops
 
-// Ethernet PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_B0_14
-#define ENET_INT_PIN        &pin_GPIO_B0_15
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \
diff --git a/ports/mimxrt/boards/TEENSY41/pins.csv b/ports/mimxrt/boards/TEENSY41/pins.csv
index b28a22312c..e09c979620 100755
--- a/ports/mimxrt/boards/TEENSY41/pins.csv
+++ b/ports/mimxrt/boards/TEENSY41/pins.csv
@@ -88,3 +88,12 @@ SD_RX,GPIO_B1_00
 SCK_TX,GPIO_EMC_06
 WS_TX,GPIO_EMC_05
 SD_TX,GPIO_EMC_04
+
+-ENET_RESET,-GPIO_B0_14
+-ENET_INT,-GPIO_B0_15
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/make-pins.py b/ports/mimxrt/boards/make-pins.py
index d6752af1e9..55c7f5bd02 100644
--- a/ports/mimxrt/boards/make-pins.py
+++ b/ports/mimxrt/boards/make-pins.py
@@ -1,19 +1,15 @@
 #!/usr/bin/env python
-"""Creates the pin file for the MIMXRT10xx."""
 
-from __future__ import print_function
-
-import argparse
-import sys
-import csv
+from collections import defaultdict
+import os
 import re
+import sys
 
-SUPPORTED_AFS = {"GPIO", "USDHC", "FLEXPWM", "TMR"}
-MAX_AF = 10  # AF0 .. AF9
-ADC_COL = 11
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
+import boardgen
 
 
-regexes = [
+IOMUX_REGEXS = [
     r"IOMUXC_(?P<pin>GPIO_SD_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
     r"IOMUXC_(?P<pin>GPIO_AD_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
     r"IOMUXC_(?P<pin>GPIO_EMC_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
@@ -30,387 +26,197 @@ regexes = [
     r"IOMUXC_(?P<pin>GPIO_SNVS_\d\d_DIG)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
 ]
 
-
-def parse_pad(pad_str):
-    """Parses a string and returns a (port, gpio_bit) tuple."""
-    if len(pad_str) < 4:
-        raise ValueError("Expecting pad name to be at least 4 characters")
-    if pad_str[:4] != "GPIO":
-        raise ValueError("Expecting pad name to start with GPIO")
-    return pad_str
+SUPPORTED_AF_FNS = {"GPIO", "USDHC", "FLEXPWM", "TMR"}
 
 
-def af_supported(af_str):
-    for supported_af in SUPPORTED_AFS:
-        if af_str.startswith(supported_af):
-            return True
-    else:
-        return False
+class MimxrtPin(boardgen.Pin):
+    def __init__(self, cpu_pin_name):
+        super().__init__(cpu_pin_name)
 
+        self._afs = []
+        self._adc_fns = []
 
-class Pin(object):
-    """Holds the information associated with a pin."""
+    # Called for each AF defined in the csv file for this pin.
+    def add_af(self, af_idx, af_name, af):
+        # mimxrt-specific: Any pin in the af.csv is implicitly part of the board
+        # pins.csv and will therefore be in the Pin.cpu dict. This is
+        # equivalent to adding `,CPUNAME` to the board.csv for every pin in the
+        # af.csv.
+        self._available = True
 
-    def __init__(self, pad, gpio, pin, idx=0):
-        self.idx = idx
-        self.name = pad
-        self.pad = pad
-        self.gpio = gpio
-        self.pin = pin
-        self.alt_fn = []
-        self.adc_fns = []
-        self.board_pin = False
+        if af_name == "ALT5":
+            m = re.match("GPIO([0-9]+)_IO([0-9]+)", af)
+            self._port = int(m.group(1))
+            self._pin = int(m.group(2))
 
-    def set_is_board_pin(self):
-        self.board_pin = True
+        if af_name.startswith("ALT"):
+            instance = af.split("_")[0]
+            fn = re.match("^([A-Z][A-Z0-9]+[A-Z])[0-9]*$", instance).group(1)
+            if fn not in SUPPORTED_AF_FNS:
+                return
+            iomux_config = self._generator._iomux_pin_config[self.name()]
+            input_reg = iomux_config[af_idx]["inputRegister"].strip("U")
+            input_daisy = int(iomux_config[af_idx]["inputDaisy"].strip("U"), 16)
+            self._afs.append((af_idx, input_reg, input_daisy, instance, fn, af))
 
-    def is_board_pin(self):
-        return self.board_pin
+        elif af_name == "ADC":
+            adc_regex = r"ADC(?P<instance>\d*)_IN(?P<channel>\d*)"
+            lpadc_regex = r"ADC(?P<instance>\d*)_CH(?P<channel>\d*)"  # LPADC for MIMXRT11xx chips
 
-    def parse_adc(self, adc_str):
-        adc_regex = r"ADC(?P<instance>\d*)_IN(?P<channel>\d*)"
-        lpadc_regex = r"ADC(?P<instance>\d*)_CH(?P<channel>\d*)"  # LPADC for MIMXRT11xx chips
-
-        matches = re.finditer(adc_regex, adc_str, re.MULTILINE)
-        for match in matches:
-            self.adc_fns.append(
-                AdcFunction(instance=match.group("instance"), channel=match.group("channel"))
-            )
-
-        matches = re.finditer(lpadc_regex, adc_str, re.MULTILINE)
-        for match in matches:
-            self.adc_fns.append(
-                AdcFunction(
-                    peripheral="LPADC",
-                    instance=match.group("instance"),
-                    channel=match.group("channel"),
+            matches = re.finditer(adc_regex, af, re.MULTILINE)
+            for match in matches:
+                self._adc_fns.append(
+                    (int(match.group("instance")), int(match.group("channel")), "ADC")
                 )
-            )
 
-    def parse_af(self, af_idx, af_strs_in):
-        pass
+            matches = re.finditer(lpadc_regex, af, re.MULTILINE)
+            for match in matches:
+                self._adc_fns.append(
+                    (int(match.group("instance")), int(match.group("channel")), "LPADC")
+                )
 
-    def add_af(self, af):
-        self.alt_fn.append(af)
-
-    def print_pin_af(self, out_source):
-        if self.alt_fn:
-            print(
-                "static const machine_pin_af_obj_t pin_{0}_af[{1}] = {{".format(
-                    self.name, len(self.alt_fn)
-                ),
-                file=out_source,
-            )
-            for af in self.alt_fn:
-                af.print(out_source)
-            print("};", file=out_source)
+    # Use the PIN() macro defined in samd_prefix.c for defining the pin
+    # objects.
+    def definition(self):
+        if "_LPSR_" in self.name():
+            macro = "PIN_LPSR"
+        elif (
+            "_SNVS_" in self.name()
+            or self.name().startswith("PMIC_")
+            or self.name().startswith("WAKEUP")
+        ):
+            macro = "PIN_SNVS"
         else:
-            raise ValueError("Pin '{}' has no alternative functions".format(self.name))
+            macro = "PIN"
 
-    def print_pin_adc(self, out_source):
-        if self.adc_fns:
-            print(
-                "static const machine_pin_adc_obj_t pin_{0}_adc[{1}] = {{".format(
-                    self.name, len(self.adc_fns)
-                ),
-                file=out_source,
-            )
-            for adc_fn in self.adc_fns:
-                adc_fn.print(out_source)
-            print("};", file=out_source)
-
-    def print(self, out_source):
-        if self.alt_fn:
-            self.print_pin_af(out_source)
-            self.print_pin_adc(out_source)
-
-            options = {
-                "GPIO_LPSR_00": "PIN_LPSR",
-                "GPIO_LPSR_01": "PIN_LPSR",
-                "GPIO_LPSR_02": "PIN_LPSR",
-                "GPIO_LPSR_03": "PIN_LPSR",
-                "GPIO_LPSR_04": "PIN_LPSR",
-                "GPIO_LPSR_05": "PIN_LPSR",
-                "GPIO_LPSR_06": "PIN_LPSR",
-                "GPIO_LPSR_07": "PIN_LPSR",
-                "GPIO_LPSR_08": "PIN_LPSR",
-                "GPIO_LPSR_09": "PIN_LPSR",
-                "GPIO_LPSR_10": "PIN_LPSR",
-                "GPIO_LPSR_11": "PIN_LPSR",
-                "GPIO_LPSR_12": "PIN_LPSR",
-                "GPIO_LPSR_13": "PIN_LPSR",
-                "GPIO_LPSR_14": "PIN_LPSR",
-                "GPIO_LPSR_15": "PIN_LPSR",
-                "GPIO_SNVS_00_DIG": "PIN_SNVS",
-                "GPIO_SNVS_01_DIG": "PIN_SNVS",
-                "GPIO_SNVS_02_DIG": "PIN_SNVS",
-                "GPIO_SNVS_03_DIG": "PIN_SNVS",
-                "GPIO_SNVS_04_DIG": "PIN_SNVS",
-                "GPIO_SNVS_05_DIG": "PIN_SNVS",
-                "GPIO_SNVS_06_DIG": "PIN_SNVS",
-                "GPIO_SNVS_07_DIG": "PIN_SNVS",
-                "GPIO_SNVS_08_DIG": "PIN_SNVS",
-                "GPIO_SNVS_09_DIG": "PIN_SNVS",
-                "WAKEUP": "PIN_SNVS",
-                "WAKEUP_DIG": "PIN_SNVS",
-                "PMIC_ON_REQ": "PIN_SNVS",
-                "PMIC_ON_REQ_DIG": "PIN_SNVS",
-                "PMIC_STBY_REQ": "PIN_SNVS",
-                "PMIC_STBY_REQ_DIG": "PIN_SNVS",
-            }
-
-            print(
-                "const machine_pin_obj_t pin_{0} = {1}({0}, {2}, {3}, pin_{0}_af, {4}, {5});\n".format(
-                    self.name,
-                    options.get(self.name, "PIN"),
-                    self.gpio,
-                    int(self.pin),
-                    len(self.adc_fns),
-                    "pin_{}_adc".format(self.name) if self.adc_fns else "NULL",
-                ),
-                file=out_source,
-            )
-        else:
-            raise ValueError("Pin '{}' has no alternative functions".format(self.name))
-
-    def print_header(self, out_header):
-        pass
-
-
-class AdcFunction(object):
-    """Holds the information associated with a pins ADC function."""
-
-    def __init__(self, instance, channel, peripheral="ADC"):
-        self.peripheral = peripheral
-        self.instance = instance
-        self.channel = channel
-
-    def print(self, out_source):
-        """Prints the C representation of this AF."""
-        print(f"    PIN_ADC({self.peripheral}{self.instance}, {self.channel}),", file=out_source)
-
-
-class AlternateFunction(object):
-    """Holds the information associated with a pins alternate function."""
-
-    def __init__(self, idx, input_reg, input_daisy, af_str):
-        self.idx = idx
-        self.af_str = af_str
-        self.input_reg = input_reg
-        self.input_daisy = input_daisy
-        self.instance = self.af_str.split("_")[0]
-
-    def print(self, out_source):
-        """Prints the C representation of this AF."""
-        print(
-            "    PIN_AF({0}, PIN_AF_MODE_ALT{1}, {2}, {3}, {4}, {5}),".format(
-                self.af_str, self.idx, self.input_daisy, self.instance, self.input_reg, "0x10B0U"
-            ),
-            file=out_source,
+        # PIN(_name, _gpio, _pin, _af_list, _adc_list_len, _adc_list)
+        return "{:s}({:s}, GPIO{:d}, {:d}, pin_{:s}_af, {:d}, {:s})".format(
+            macro,
+            self.name(),
+            self._port,
+            self._pin,
+            self.name(),
+            len(self._adc_fns),
+            "pin_{:s}_adc".format(self.name()) if self._adc_fns else "NULL",
         )
 
+    # This will be called at the start of the output (after the prefix) for
+    # each pin. Use it to emit the af and adc objects.
+    def print_source(self, out_source):
+        print(
+            "static const machine_pin_af_obj_t pin_{:s}_af[] = {{".format(self.name()),
+            file=out_source,
+        )
+        for af_idx, input_reg, input_daisy, instance, _fn, af in self._afs:
+            print(
+                "    PIN_AF({:s}, PIN_AF_MODE_ALT{:d}, {:d}, {:s}, {:s}, {:s}),".format(
+                    af, af_idx, input_daisy, instance, input_reg, "0x10B0U"
+                ),
+                file=out_source,
+            )
+        print("};", file=out_source)
+        print(file=out_source)
 
-class NamedPin(object):
-    def __init__(self, name, pad, idx):
-        self.name = name
-        self.pad = pad
-        self.idx = idx
+        if self._adc_fns:
+            print(
+                "static const machine_pin_adc_obj_t pin_{:s}_adc[] = {{".format(self.name()),
+                file=out_source,
+            )
+            for instance, channel, peripheral in self._adc_fns:
+                print(
+                    "    PIN_ADC({:s}{:d}, {:d}),".format(peripheral, instance, channel),
+                    file=out_source,
+                )
+            print("};", file=out_source)
+
+    # mimxrt cpu names must be "GPIO_<funcs>_<num>", with zero-prefixed two-digit <num>.
+    @staticmethod
+    def validate_cpu_pin_name(cpu_pin_name):
+        boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
+
+        if not re.match(
+            "^((GPIO_((SNVS|EMC|LPSR|DISP)_)?([AS]D_)?(B[012]_)?[0-9][0-9])|WAKEUP|PMIC_(ON|STBY)_REQ)(_DIG)?$",
+            cpu_pin_name,
+        ):
+            raise boardgen.PinGeneratorError("Invalid cpu pin name '{}'".format(cpu_pin_name))
 
 
-class Pins(object):
+class MimxrtPinGenerator(boardgen.PinGenerator):
     def __init__(self):
-        self.cpu_pins = []
-        self.board_pins = []
+        # Use custom pin type above, and also enable the --af-csv argument so
+        # that add_af gets called on each pin.
+        super().__init__(
+            pin_type=MimxrtPin,
+            enable_af=True,
+        )
+        self._iomux_pin_config = {}
 
-    def find_pin_by_num(self, pin_num):
-        for pin in self.cpu_pins:
-            if pin.pin_num == pin_num:
-                return pin
-
-    def find_pin_by_name(self, pad):
-        for pin in self.cpu_pins:
-            if pin.pad == pad:
-                return pin
-
-    def parse_board_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                if len(row) == 0 or row[0].startswith("#"):
-                    # Skip empty lines, and lines starting with "#"
-                    continue
-                if len(row) != 2:
-                    raise ValueError("Expecting two entries in a row")
-
-                pin = self.find_pin_by_name(row[1])
-                if pin and row[0]:  # Only add board pins that have a name
-                    self.board_pins.append(NamedPin(row[0], pin.pad, pin.idx))
-
-    def parse_af_file(self, filename, iomux_filename):
-        iomux_pin_config = dict()
+    # Load the iomux configuration from fsl_iomuxc.h.
+    def load_iomux_header(self, iomux_filename):
         with open(iomux_filename, "r") as ipt:
             input_str = ipt.read()
-            for regex in regexes:
+            for regex in IOMUX_REGEXS:
                 matches = re.finditer(regex, input_str, re.MULTILINE)
 
                 for match in matches:
-                    if match.group("pin") not in iomux_pin_config:
-                        iomux_pin_config[match.group("pin")] = {
+                    if match.group("pin") not in self._iomux_pin_config:
+                        self._iomux_pin_config[match.group("pin")] = {
                             int((match.groupdict()["muxMode"].strip("U")), 16): match.groupdict()
                         }
                     else:
-                        iomux_pin_config[match.group("pin")][
+                        self._iomux_pin_config[match.group("pin")][
                             int((match.groupdict()["muxMode"].strip("U")), 16)
                         ] = match.groupdict()
 
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            header = next(rows)
-            # Extract indexes from header row
-            pad_col = header.index("Pad")
-            adc_col = header.index("ADC")
-            #
-            for idx, row in enumerate(rows):
-                pad = row[pad_col]
-                gpio, pin = row[6].split("_")
-                pin_number = pin.lstrip("IO")
-                pin = Pin(pad, gpio, pin_number, idx=idx)
+    # Also load the iomux header.
+    def load_inputs(self, out_source):
+        if self.args.iomux_header:
+            print("// --iomux-header {:s}".format(self.args.iomux_header), file=out_source)
+            self.load_iomux_header(self.args.iomux_header)
 
-                # Parse alternate functions
-                af_idx = 0
-                for af_idx, af in enumerate(row[(pad_col + 1) : adc_col]):
-                    if af and af_supported(af):
-                        pin.add_af(
-                            AlternateFunction(
-                                af_idx,
-                                iomux_pin_config[pin.name][af_idx]["inputRegister"].strip("U"),
-                                int(
-                                    iomux_pin_config[pin.name][af_idx]["inputDaisy"].strip("U"), 16
-                                ),
-                                af,
+        super().load_inputs(out_source)
+
+    # Provide a macro for each supported (pin,af) that can be used to
+    # initialise a struct containing a machine_pin_obj_t* and the
+    # corresponding af for that pin. e.g. A mimxrt_sdcard_pin_t instance can
+    # be initialised with GPIO_SD_B0_00_USDHC1_CMD which tells it how to get
+    # the CMD pin of the USDHC1 function on the GPIO_SD_B0_00 pin.
+    def print_module_instances(self, out_header):
+        print(file=out_header)
+        for match_fn in ("USDHC", "FLEXPWM", "TMR"):
+            module_instances = defaultdict(list)
+            for pin in self.available_pins():
+                for i, (_af_idx, _input_reg, _input_daisy, instance, fn, af) in enumerate(
+                    pin._afs
+                ):
+                    if fn == match_fn:
+                        module_instances[instance].append(
+                            "#define {:s}_{:s} pin_{:s}, {:d}".format(
+                                pin.name(), af, pin.name(), i
                             )
                         )
+            for k, v in module_instances.items():
+                print("// {:s}".format(k), file=out_header)
+                print("#define {:s}_AVAIL (1)".format(k), file=out_header)
+                if match_fn == "FLEXPWM":
+                    print("#define {:s} {:s}".format(k, k[-4:]), file=out_header)
+                for i in v:
+                    print(i, file=out_header)
 
-                pin.parse_adc(row[adc_col])
-
-                self.cpu_pins.append(pin)
-
-    @staticmethod
-    def print_named(label, pins, out_source):
-        print("", file=out_source)
-        print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
-            file=out_source,
-        )
-        for pin in pins:
-            (
-                print(
-                    "    {{ MP_ROM_QSTR(MP_QSTR_{}), MP_ROM_PTR(&pin_{}) }},".format(
-                        pin.name, pin.pad
-                    ),
-                    file=out_source,
-                ),
-            )
-        print("};", file=out_source)
-        print(
-            "MP_DEFINE_CONST_DICT(machine_pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
-                label, label
-            ),
-            file=out_source,
-        )
-
-    def print(self, out_source):
-        # Print Pin Object declarations
-        for pin in self.cpu_pins:
-            pin.print(out_source)
-
-        print("", file=out_source)
-        print("const machine_pin_obj_t* machine_pin_board_pins [] = {", file=out_source)
-        for pin in self.board_pins:
-            print("    &pin_{},".format(pin.pad), file=out_source)
-        print("};", file=out_source)
-        print(
-            "const uint32_t num_board_pins = {:d};".format(len(self.board_pins)), file=out_source
-        )
-        # Print Pin mapping dictionaries
-        self.print_named("cpu", self.cpu_pins, out_source)
-        self.print_named("board", self.board_pins, out_source)
-        print("", file=out_source)
-
+    # Override to also print the module instances.
     def print_header(self, out_header):
-        for pin in self.cpu_pins:
-            print("extern const machine_pin_obj_t pin_{};".format(pin.name), file=out_header)
-        print("extern const machine_pin_obj_t* machine_pin_board_pins[];", file=out_header)
-        print("extern const uint32_t num_board_pins;", file=out_header)
-        print("extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;", file=out_header)
-        print("extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;", file=out_header)
-        print("", file=out_header)
-        print("// Defines", file=out_header)
-        module_instance_factory(self.cpu_pins, out_header, "USDHC")
-        module_instance_factory(self.cpu_pins, out_header, "FLEXPWM")
-        module_instance_factory(self.cpu_pins, out_header, "TMR")
+        super().print_header(out_header)
+        self.print_module_instances(out_header)
 
+    # Override the default implementation just to change the default arguments
+    # (extra header row, skip first column).
+    def parse_af_csv(self, filename):
+        return super().parse_af_csv(filename, header_rows=1, pin_col=0, af_col=1)
 
-def module_instance_factory(pins, out_header, name):
-    module_pin = filter(lambda p: any([af for af in p.alt_fn if name in af.af_str]), pins)
-
-    module_instances = dict()
-    for pin in module_pin:
-        for idx, alt_fn in enumerate(pin.alt_fn):
-            if name in alt_fn.instance:
-                format_string = "#define {0}_{1} &pin_{0}, {2}"
-                if alt_fn.instance not in module_instances:
-                    module_instances[alt_fn.instance] = [
-                        format_string.format(pin.name, alt_fn.af_str, idx)
-                    ]
-                else:
-                    module_instances[alt_fn.instance].append(
-                        format_string.format(pin.name, alt_fn.af_str, idx)
-                    )
-
-    for k, v in module_instances.items():
-        print(f"// {k}", file=out_header)
-        print(f"#define {k}_AVAIL (1)", file=out_header)
-        if name == "FLEXPWM":
-            print(f"#define {k} {k[-4:]}", file=out_header)
-        for i in v:
-            print(i, file=out_header)
-
-
-def main():
-    parser = argparse.ArgumentParser(description="Generate board specific pin file")
-    parser.add_argument("--board-csv")
-    parser.add_argument("--af-csv")
-    parser.add_argument("--prefix")
-    parser.add_argument("--iomux-header")
-    parser.add_argument("--output-source")
-    parser.add_argument("--output-header")
-    args = parser.parse_args()
-
-    pins = Pins()
-
-    with open(args.output_source, "w") as out_source:
-        if args.af_csv:
-            print("// --af {:s}".format(args.af_csv), file=out_source)
-            pins.parse_af_file(args.af_csv, args.iomux_header)
-
-        if args.board_csv:
-            print("// --board {:s}".format(args.board_csv), file=out_source)
-            pins.parse_board_file(args.board_csv)
-
-        if args.output_header:
-            print("// --hdr {:s}".format(args.output_header), file=out_source)
-
-        if args.prefix:
-            print("// --prefix {:s}".format(args.prefix), file=out_source)
-            with open(args.prefix, "r") as prefix_file:
-                print(prefix_file.read(), file=out_source)
-
-        pins.print(out_source)
-
-    with open(args.output_header, "w") as out_header:
-        pins.print_header(out_header)
+    # We need to know the mcu to emit the correct AF list.
+    def extra_args(self, parser):
+        parser.add_argument("--iomux-header")
 
 
 if __name__ == "__main__":
-    main()
+    MimxrtPinGenerator().main()
diff --git a/ports/mimxrt/boards/mimxrt_prefix.c b/ports/mimxrt/boards/mimxrt_prefix.c
index 3097535c52..49d6e67dc4 100644
--- a/ports/mimxrt/boards/mimxrt_prefix.c
+++ b/ports/mimxrt/boards/mimxrt_prefix.c
@@ -30,7 +30,7 @@
         .pin = (uint32_t)(_pin), \
         .muxRegister = (uint32_t)&(IOMUXC->SW_MUX_CTL_PAD[kIOMUXC_SW_MUX_CTL_PAD_##_name]), \
         .configRegister = (uint32_t)&(IOMUXC->SW_PAD_CTL_PAD[kIOMUXC_SW_PAD_CTL_PAD_##_name]), \
-        .af_list_len = (uint8_t)(sizeof((_af_list)) / sizeof(machine_pin_af_obj_t)), \
+        .af_list_len = MP_ARRAY_SIZE(_af_list), \
         .adc_list_len = (_adc_list_len), \
         .af_list = (_af_list), \
         .adc_list = (_adc_list), \
@@ -44,7 +44,7 @@
         .pin = (uint32_t)(_pin), \
         .muxRegister = (uint32_t)&(IOMUXC_LPSR->SW_MUX_CTL_PAD[kIOMUXC_LPSR_SW_MUX_CTL_PAD_##_name]), \
         .configRegister = (uint32_t)&(IOMUXC_LPSR->SW_PAD_CTL_PAD[kIOMUXC_LPSR_SW_PAD_CTL_PAD_##_name]), \
-        .af_list_len = (uint8_t)(sizeof((_af_list)) / sizeof(machine_pin_af_obj_t)), \
+        .af_list_len = MP_ARRAY_SIZE(_af_list), \
         .adc_list_len = (_adc_list_len), \
         .af_list = (_af_list), \
         .adc_list = (_adc_list), \
@@ -58,7 +58,7 @@
         .pin = (uint32_t)(_pin), \
         .muxRegister = (uint32_t)&(IOMUXC_SNVS->SW_MUX_CTL_PAD_##_name), \
         .configRegister = (uint32_t)&(IOMUXC_SNVS->SW_PAD_CTL_PAD_##_name), \
-        .af_list_len = (uint8_t)(sizeof((_af_list)) / sizeof(machine_pin_af_obj_t)), \
+        .af_list_len = MP_ARRAY_SIZE(_af_list), \
         .adc_list_len = (_adc_list_len), \
         .af_list = (_af_list), \
         .adc_list = (_adc_list), \
diff --git a/ports/mimxrt/eth.c b/ports/mimxrt/eth.c
index befccca1cd..ed9db81298 100644
--- a/ports/mimxrt/eth.c
+++ b/ports/mimxrt/eth.c
@@ -365,7 +365,15 @@ void eth_init_0(eth_t *self, int eth_id, const phy_operations_t *phy_ops, int ph
 
     uint32_t source_clock = eth_clock_init(eth_id, phy_clock);
 
-    eth_gpio_init(iomux_table_enet, ARRAY_SIZE(iomux_table_enet), ENET_RESET_PIN, ENET_INT_PIN);
+    const machine_pin_obj_t *reset_pin = NULL;
+    #if defined(pin_ENET_RESET)
+    reset_pin = pin_ENET_RESET;
+    #endif
+    const machine_pin_obj_t *int_pin = NULL;
+    #if defined(pin_ENET_INT)
+    int_pin = pin_ENET_INT;
+    #endif
+    eth_gpio_init(iomux_table_enet, ARRAY_SIZE(iomux_table_enet), reset_pin, int_pin);
 
     mp_hal_get_mac(0, hw_addr);
 
@@ -411,7 +419,15 @@ void eth_init_1(eth_t *self, int eth_id, const phy_operations_t *phy_ops, int ph
 
     uint32_t source_clock = eth_clock_init(eth_id, phy_clock);
 
-    eth_gpio_init(iomux_table_enet_1, ARRAY_SIZE(iomux_table_enet_1), ENET_1_RESET_PIN, ENET_1_INT_PIN);
+    const machine_pin_obj_t *reset_pin = NULL;
+    #if defined(pin_ENET_1_INT)
+    reset_pin = pin_ENET_1_RESET;
+    #endif
+    const machine_pin_obj_t *int_pin = NULL;
+    #if defined(pin_ENET_1_INT)
+    int_pin = pin_ENET_1_INT;
+    #endif
+    eth_gpio_init(iomux_table_enet_1, ARRAY_SIZE(iomux_table_enet_1), reset_pin, int_pin);
 
     #if defined MIMXRT117x_SERIES
     NVIC_SetPriority(ENET_1G_MAC0_Tx_Rx_1_IRQn, IRQ_PRI_PENDSV);
diff --git a/ports/mimxrt/led.c b/ports/mimxrt/led.c
index 99876a5d90..eb4d42cd9f 100644
--- a/ports/mimxrt/led.c
+++ b/ports/mimxrt/led.c
@@ -34,13 +34,13 @@
 #if defined(MICROPY_HW_LED1_PIN)
 
 const machine_led_obj_t machine_led_obj[] = {
-    { .base = {&machine_led_type}, .led_id = 1U, .led_pin = &MICROPY_HW_LED1_PIN, },
+    { .base = {&machine_led_type}, .led_id = 1U, .led_pin = MICROPY_HW_LED1_PIN, },
     #if defined(MICROPY_HW_LED2_PIN)
-    { .base = {&machine_led_type}, .led_id = 2U, .led_pin = &MICROPY_HW_LED2_PIN, },
+    { .base = {&machine_led_type}, .led_id = 2U, .led_pin = MICROPY_HW_LED2_PIN, },
     #if defined(MICROPY_HW_LED3_PIN)
-    { .base = {&machine_led_type}, .led_id = 3U, .led_pin = &MICROPY_HW_LED3_PIN, },
+    { .base = {&machine_led_type}, .led_id = 3U, .led_pin = MICROPY_HW_LED3_PIN, },
     #if defined(MICROPY_HW_LED4_PIN)
-    { .base = {&machine_led_type}, .led_id = 4U, .led_pin = &MICROPY_HW_LED4_PIN, },
+    { .base = {&machine_led_type}, .led_id = 4U, .led_pin = MICROPY_HW_LED4_PIN, },
     #endif
     #endif
     #endif
diff --git a/ports/mimxrt/machine_pwm.c b/ports/mimxrt/machine_pwm.c
index 7b95d78877..98545eec95 100644
--- a/ports/mimxrt/machine_pwm.c
+++ b/ports/mimxrt/machine_pwm.c
@@ -191,8 +191,9 @@ STATIC const machine_pin_af_obj_t *af_name_decode_qtmr(const machine_pin_af_obj_
 #endif
 
 STATIC bool is_board_pin(const machine_pin_obj_t *pin) {
-    for (int i = 0; i < num_board_pins; i++) {
-        if (pin == machine_pin_board_pins[i]) {
+    const mp_map_t *board_map = &machine_pin_board_pins_locals_dict.map;
+    for (uint i = 0; i < board_map->alloc; i++) {
+        if (pin == MP_OBJ_TO_PTR(board_map->table[i].value)) {
             return true;
         }
     }
diff --git a/ports/mimxrt/pin.c b/ports/mimxrt/pin.c
index 4403f6ac77..b7b33da5ae 100644
--- a/ports/mimxrt/pin.c
+++ b/ports/mimxrt/pin.c
@@ -152,14 +152,6 @@ const machine_pin_obj_t *pin_find(mp_obj_t user_obj) {
         return pin_obj;
     }
 
-    // If pin is SMALL_INT
-    if (mp_obj_is_small_int(user_obj)) {
-        uint8_t value = MP_OBJ_SMALL_INT_VALUE(user_obj);
-        if (value < num_board_pins) {
-            return machine_pin_board_pins[value];
-        }
-    }
-
     // See if the pin name matches a board pin
     pin_obj = pin_find_named_pin(&machine_pin_board_pins_locals_dict, user_obj);
     if (pin_obj) {
diff --git a/ports/mimxrt/pin.h b/ports/mimxrt/pin.h
index bf611aa989..13b313c41f 100644
--- a/ports/mimxrt/pin.h
+++ b/ports/mimxrt/pin.h
@@ -147,9 +147,6 @@ extern const mp_obj_type_t machine_pin_af_type;
 // Include board specific pins
 #include "genhdr/pins.h"  // pins.h must included at this location
 
-extern const machine_pin_obj_t *machine_pin_board_pins[];
-extern const uint32_t num_board_pins;
-
 extern const mp_obj_type_t machine_pin_board_pins_obj_type;
 extern const mp_obj_type_t machine_pin_cpu_pins_obj_type;
 

From 1f804e03f64b0ec7e29e27333dc6a2a7c5148aef Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 24 Aug 2023 23:22:16 +1000
Subject: [PATCH 109/310] renesas-ra/boards/make-pins.py: Update to use
 tools/boardgen.py.

This removes previously unused functionality to generate pins_ad_const.h,
as well as the unused handling of pin AF in machine_pin.c.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/renesas-ra/Makefile               |   6 +-
 ports/renesas-ra/boards/make-pins.py    | 303 ++++++------------------
 ports/renesas-ra/boards/ra_pin_prefix.c |  10 +-
 ports/renesas-ra/machine_pin.c          |  33 +--
 ports/renesas-ra/pin.h                  |  43 +---
 5 files changed, 89 insertions(+), 306 deletions(-)

diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index 4e31029073..6d6eeb7dbf 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -556,8 +556,6 @@ AF_FILE = boards/ra6m5_af.csv
 endif
 GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-# Currently unused.
-GEN_PINS_AD_CONST = $(HEADER_BUILD)/pins_ad_const.h
 
 FILE2H = $(TOP)/tools/file2h.py
 
@@ -578,10 +576,10 @@ $(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
 # Use a pattern rule here so that make will only call make-pins.py once to make
 # both pins_$(BOARD).c and pins.h
 .PRECIOUS: $(GEN_PINS_SRC)
-$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_ad_const.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
+$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
 	$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv $(AF_FILE) --prefix $(PREFIX_FILE) \
-	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR) --output-ad-const $(GEN_PINS_AD_CONST)
+	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR)
 
 CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h
 
diff --git a/ports/renesas-ra/boards/make-pins.py b/ports/renesas-ra/boards/make-pins.py
index 5eebbb4926..edc4cf7209 100644
--- a/ports/renesas-ra/boards/make-pins.py
+++ b/ports/renesas-ra/boards/make-pins.py
@@ -1,258 +1,89 @@
 #!/usr/bin/env python
-"""Creates the pin file for the RAxxx."""
 
-from __future__ import print_function
-
-import argparse
+import os
+import re
 import sys
-import csv
+
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
+import boardgen
 
 
-class PinAD(object):
-    def __init__(self, name, cpu_pin_name, pin_idx, bit, channel):
-        self._name = name
-        self._cpu_pin_name = cpu_pin_name
-        self._pin_idx = pin_idx
-        self._bit = bit
-        self._channel = channel
+class RenesasRaPin(boardgen.Pin):
+    def __init__(self, cpu_pin_name):
+        super().__init__(cpu_pin_name)
 
-    def cpu_pin_name(self):
-        return self._cpu_pin_name
+        self._port = int(cpu_pin_name[1], 16)
+        self._bit = int(cpu_pin_name[2:])
 
-    def name(self):
-        return self._name
+        self._adc_name = None
+        self._adc_bits = 0
+        self._adc_channel = 0
 
-    def bit(self):
-        return self._bit
+    def add_adc(self, adc):
+        # The previous version of make-pins.py handled len==4 to mean
+        # adc_bits=8, but this is not used in any of the current af.csv files,
+        # so this needs to be validated.
+        assert len(adc) == 5 and (adc.startswith("AN0") or adc.startswith("AN1"))
+        self._adc_name = adc
+        self._adc_bit = 12
+        self._adc_channel = int(adc[2:])
 
-    def channel(self):
-        return self._channel
+    # Called for each AF defined in the csv file for this pin.
+    def add_af(self, af_idx, af_name, af):
+        if af_idx == 0 and af:
+            assert af_name == "Analog"
+            self.add_adc(af)
 
-    def print(self, out_source):
-        print(
-            "const pin_ad_obj_t pin_{:s}_ad_obj = PIN_AD({:s}, {:d}, {:d}, {:d});".format(
-                self._cpu_pin_name, self._name, self._pin_idx, self._bit, self._channel
-            ),
-            file=out_source,
-        )
-        print("", file=out_source)
+    # Use the PIN() macro defined in ra_pin_prefix.c for defining the pin
+    # objects.
+    def definition(self):
+        # PIN(p_name, p_pin, p_adc)
+        adc = "&pin_{}_adc_obj".format(self.name()) if self._adc_name else "NULL"
+        return "PIN({:s}, {:d}, {:s})".format(self.name(), self._port * 16 + self._bit, adc)
 
-    def print_header(self, out_header):
-        n = self.cpu_pin_name()
-        print("extern const pin_ad_obj_t pin_{:s}_ad_obj;".format(n), file=out_header)
-        print("#define pin_{:s}_ad (&pin_{:s}_ad_obj)".format(n, n), file=out_header)
-
-
-class Pin(object):
-    def __init__(self, name, port, bit):
-        self._name = name
-        self._pin_idx = port * 16 + bit
-        self._pin_ad = []
-        self._board_pin = False
-        # print('// pin_{:s}_obj = PIN({:s}, {:d});'.format(self.name, self.name, self.pin))
-
-    def cpu_pin_name(self):
-        return self._name
-
-    def pin_ad(self):
-        return self._pin_ad
-
-    def is_board_pin(self):
-        return self._board_pin
-
-    def set_is_board_pin(self):
-        self._board_pin = True
-
-    def parse_ad(self, ad_str):
-        ad_bit = 0
-        ad_channel = 0
-        if (len(ad_str) == 5) and (ad_str[:3] == "AN0"):
-            ad_bit = 12
-            ad_channel = int(ad_str[2:])
-            self._pin_ad.append(PinAD(ad_str, self._name, self._pin_idx, ad_bit, ad_channel))
-        elif (len(ad_str) == 5) and (ad_str[:3] == "AN1"):
-            ad_bit = 12
-            ad_channel = int(ad_str[2:])
-            self._pin_ad.append(PinAD(ad_str, self._name, self._pin_idx, ad_bit, ad_channel))
-        elif ad_str[:2] == "AN":
-            ad_bit = 8
-            ad_channel = int(ad_str[2:4])
-            self._pin_ad.append(PinAD(ad_str, self._name, self._pin_idx, ad_bit, ad_channel))
-
-    def print(self, out_source):
-        pin_ad_name = "NULL"
-        for pin_ad in self._pin_ad:
-            pin_ad.print(out_source)
-            pin_ad_name = "pin_{:s}_ad".format(pin_ad.cpu_pin_name())
-        print(
-            "const machine_pin_obj_t pin_{:s}_obj = PIN({:s}, {:d}, {:s});".format(
-                self._name, self._name, self._pin_idx, pin_ad_name
-            ),
-            file=out_source,
-        )
-        print("", file=out_source)
-
-    def print_header(self, out_header):
-        n = self.cpu_pin_name()
-        print("extern const machine_pin_obj_t pin_{:s}_obj;".format(n), file=out_header)
-        print("#define pin_{:s} (&pin_{:s}_obj)".format(n, n), file=out_header)
-
-
-class NamedPin(object):
-    def __init__(self, name, pin):
-        self._name = name
-        self._pin = pin
-        # print('// NamedPin {:s}'.format(self._name))
-
-    def pin(self):
-        return self._pin
-
-    def name(self):
-        return self._name
-
-
-class Pins(object):
-    def __init__(self):
-        self.cpu_pins = []  # list of NamedPin objects
-        self.board_pins = []  # list of NamedPin objects
-
-    def find_pin(self, cpu_pin_name):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.cpu_pin_name() == cpu_pin_name:
-                return pin
-
-    # rx63n_al.csv
-    # cpu_pin_name, cpu_pin_port, cpu_pin_bit
-    def parse_af_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                try:
-                    cpu_pin_name = row[0]
-                    cpu_pin_port = int(row[1], 16)
-                    cpu_pin_bit = int(row[2])
-                except:
-                    continue
-                pin = Pin(cpu_pin_name, cpu_pin_port, cpu_pin_bit)
-                self.cpu_pins.append(NamedPin(cpu_pin_name, pin))
-                pin.parse_ad(row[3])
-
-    # pins.csv
-    # named_pin, cpu_pin_name
-    def parse_board_file(self, filename):
-        with open(filename, "r") as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                try:
-                    board_pin_name = row[0]
-                    cpu_pin_name = row[1]
-                except:
-                    continue
-                pin = self.find_pin(cpu_pin_name)
-                if pin:
-                    pin.set_is_board_pin()
-                    self.board_pins.append(NamedPin(board_pin_name, pin))
-
-    def print_named(self, label, named_pins, out_source):
-        print(
-            "STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
-            file=out_source,
-        )
-        for named_pin in named_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin():
-                print(
-                    "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}_obj) }},".format(
-                        named_pin.name(), pin.cpu_pin_name()
-                    ),
-                    file=out_source,
-                )
-        print("};", file=out_source)
-        print(
-            "MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
-                label, label
-            ),
-            file=out_source,
-        )
-
-    def print(self, out_source):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin():
-                pin.print(out_source)
-        self.print_named("cpu", self.cpu_pins, out_source)
-        print("", file=out_source)
-        self.print_named("board", self.board_pins, out_source)
-
-    def print_header(self, out_header):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin():
-                pin.print_header(out_header)
-            pin_ads = pin.pin_ad()
-            for pin_ad in pin_ads:
-                pin_ad.print_header(out_header)
-        # provide #define's mapping board to cpu name
-        for named_pin in self.board_pins:
+    # This will be called at the start of the output (after the prefix). Use
+    # it to emit the ADC objects (via the PIN_ADC() macro).
+    def print_source(self, out_source):
+        # PIN_ADC(p_name, p_pin, adc_bit, adc_channel)
+        if self._adc_name:
             print(
-                "#define pyb_pin_{:s} pin_{:s}".format(
-                    named_pin.name(), named_pin.pin().cpu_pin_name()
+                "const machine_pin_adc_obj_t pin_{}_adc_obj = PIN_ADC({:s}, {:d}, {:d}, {:d});".format(
+                    self.name(),
+                    self._adc_name,
+                    self._port * 16 + self._bit,
+                    self._adc_bits,
+                    self._adc_channel,
                 ),
-                file=out_header,
+                file=out_source,
             )
 
-    def print_ad_hdr(self, out_ad_const):
-        for named_pin in self.cpu_pins:
-            pin = named_pin.pin()
-            if pin.is_board_pin():
-                pin_ads = pin.pin_ad()
-                for pin_ad in pin_ads:
-                    print(
-                        "  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_INT(GPIO_{:s}) }}, \n".format(
-                            pin_ad.name(), pin_ad.name()
-                        ),
-                        file=out_ad_const,
-                    )
+    # RA cpu names must be "PXNN", where X is hexadecimal port, NN is decimal bit offset.
+    @staticmethod
+    def validate_cpu_pin_name(cpu_pin_name):
+        boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
+
+        if not re.match("^P[0-9A-F][0-9][0-9]$", cpu_pin_name):
+            raise boardgen.PinGeneratorError("Invalid cpu pin name '{}'".format(cpu_pin_name))
 
 
-def main():
-    parser = argparse.ArgumentParser(description="Generate board specific pin file")
-    parser.add_argument("--board-csv")
-    parser.add_argument("--af-csv")
-    parser.add_argument("--prefix")
-    parser.add_argument("--output-source")
-    parser.add_argument("--output-header")
-    parser.add_argument("--output-ad-const")
-    args = parser.parse_args()
+class RenesasRaPinGenerator(boardgen.PinGenerator):
+    def __init__(self):
+        # Use custom pin type above, and also enable the --af-csv argument so
+        # that add_af gets called on each pin.
+        super().__init__(
+            pin_type=RenesasRaPin,
+            enable_af=True,
+        )
 
-    pins = Pins()
+    # Override the default implementation just to change the default arguments.
+    def parse_af_csv(self, filename):
+        return super().parse_af_csv(filename, header_rows=1, pin_col=0, af_col=3)
 
-    with open(args.output_source, "w") as out_source:
-        print("// This file was automatically generated by make-pins.py", file=out_source)
-        print("//", file=out_source)
-        if args.af_csv:
-            print("// --af {:s}".format(args.af_csv), file=out_source)
-            pins.parse_af_file(args.af_csv)
-
-        if args.board_csv:
-            print("// --board {:s}".format(args.board_csv), file=out_source)
-            pins.parse_board_file(args.board_csv)
-
-        if args.prefix:
-            print("// --prefix {:s}".format(args.prefix), file=out_source)
-            print("", file=out_source)
-            with open(args.prefix, "r") as prefix_file:
-                print(prefix_file.read(), file=out_source)
-
-        pins.print(out_source)
-
-    with open(args.output_header, "w") as out_header:
-        pins.print_header(out_header)
-
-    with open(args.output_ad_const, "w") as out_ad_const:
-        pins.print_ad_hdr(out_ad_const)
+    # Renesas-specific behavior, we use pin_PNNN for the cpu names, but
+    # pyb_pin_FOO for the board names.
+    def board_name_define_prefix(self):
+        return "pyb_"
 
 
 if __name__ == "__main__":
-    main()
+    RenesasRaPinGenerator().main()
diff --git a/ports/renesas-ra/boards/ra_pin_prefix.c b/ports/renesas-ra/boards/ra_pin_prefix.c
index 918c84e632..c52e973866 100644
--- a/ports/renesas-ra/boards/ra_pin_prefix.c
+++ b/ports/renesas-ra/boards/ra_pin_prefix.c
@@ -7,19 +7,19 @@
 #include "extmod/modmachine.h"
 #include "pin.h"
 
-#define PIN_AD(p_name, p_pin, ad_bit, ad_channel) \
+#define PIN_ADC(p_name, p_pin, adc_bits, adc_channel) \
     { \
         { &machine_pin_type }, \
         .name = MP_QSTR_##p_name, \
         .pin = p_pin, \
-        .bit = ad_bit, \
-        .channel = ad_channel \
+        .bit = adc_bits, \
+        .channel = adc_channel \
     }
 
-#define PIN(p_name, p_pin, p_ad) \
+#define PIN(p_name, p_pin, p_adc) \
     { \
         { &machine_pin_type }, \
         .name = MP_QSTR_##p_name, \
         .pin = p_pin, \
-        .ad = p_ad, \
+        .ad = p_adc, \
     }
diff --git a/ports/renesas-ra/machine_pin.c b/ports/renesas-ra/machine_pin.c
index 70f98cd03a..e11188118c 100644
--- a/ports/renesas-ra/machine_pin.c
+++ b/ports/renesas-ra/machine_pin.c
@@ -56,13 +56,13 @@ const machine_pin_obj_t *machine_pin_find(mp_obj_t user_obj) {
     }
 
     // See if the pin name matches a board pin
-    pin_obj = pin_find_named_pin(&pin_board_pins_locals_dict, user_obj);
+    pin_obj = pin_find_named_pin(&machine_pin_board_pins_locals_dict, user_obj);
     if (pin_obj) {
         return pin_obj;
     }
 
     // See if the pin name matches a cpu pin
-    pin_obj = pin_find_named_pin(&pin_cpu_pins_locals_dict, user_obj);
+    pin_obj = pin_find_named_pin(&machine_pin_cpu_pins_locals_dict, user_obj);
     if (pin_obj) {
         return pin_obj;
     }
@@ -134,12 +134,7 @@ STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
         // AF mode
         if (af) {
             mp_uint_t af_idx = pin_get_af(self);
-            const pin_af_obj_t *af_obj = pin_find_af_by_index(self, af_idx);
-            if (af_obj == NULL) {
-                mp_printf(print, ", alt=%d)", af_idx);
-            } else {
-                mp_printf(print, ", alt=Pin.%q)", af_obj->name);
-            }
+            mp_printf(print, ", alt=%d)", af_idx);
         } else {
             mp_print_str(print, ")");
         }
@@ -306,8 +301,8 @@ STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_high), MP_ROM_PTR(&machine_pin_high_obj) },
 
     // class attributes
-    { MP_ROM_QSTR(MP_QSTR_board),   MP_ROM_PTR(&pin_board_pins_obj_type) },
-    { MP_ROM_QSTR(MP_QSTR_cpu),     MP_ROM_PTR(&pin_cpu_pins_obj_type) },
+    { MP_ROM_QSTR(MP_QSTR_board),   MP_ROM_PTR(&machine_pin_board_pins_obj_type) },
+    { MP_ROM_QSTR(MP_QSTR_cpu),     MP_ROM_PTR(&machine_pin_cpu_pins_obj_type) },
 
     // class constants
     { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(MP_HAL_PIN_MODE_INPUT) },
@@ -391,17 +386,17 @@ uint32_t pin_get_af(const machine_pin_obj_t *pin) {
 }
 
 MP_DEFINE_CONST_OBJ_TYPE(
-    pin_cpu_pins_obj_type,
+    machine_pin_cpu_pins_obj_type,
     MP_QSTR_cpu,
     MP_TYPE_FLAG_NONE,
-    locals_dict, &pin_cpu_pins_locals_dict
+    locals_dict, &machine_pin_cpu_pins_locals_dict
     );
 
 MP_DEFINE_CONST_OBJ_TYPE(
-    pin_board_pins_obj_type,
+    machine_pin_board_pins_obj_type,
     MP_QSTR_board,
     MP_TYPE_FLAG_NONE,
-    locals_dict, &pin_board_pins_locals_dict
+    locals_dict, &machine_pin_board_pins_locals_dict
     );
 
 const machine_pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) {
@@ -412,13 +407,3 @@ const machine_pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_
     }
     return NULL;
 }
-
-const pin_af_obj_t *pin_find_af_by_index(const machine_pin_obj_t *pin, mp_uint_t af_idx) {
-    const pin_af_obj_t *af = pin->af;
-    for (mp_uint_t i = 0; i < pin->num_af; i++, af++) {
-        if (af->idx == af_idx) {
-            return af;
-        }
-    }
-    return NULL;
-}
diff --git a/ports/renesas-ra/pin.h b/ports/renesas-ra/pin.h
index ac84b7f66b..76d6c0b1e4 100644
--- a/ports/renesas-ra/pin.h
+++ b/ports/renesas-ra/pin.h
@@ -31,57 +31,29 @@
 #include "shared/runtime/mpirq.h"
 #include "py/obj.h"
 
-typedef struct {
-    mp_obj_base_t base;
-    qstr name;
-    uint8_t idx;
-    uint8_t fn;
-    uint8_t unit;
-    uint8_t type;
-    void *reg; // The peripheral associated with this AF
-} pin_af_obj_t;
-
 typedef struct {
     mp_obj_base_t base;
     qstr name;
     uint8_t pin;
     uint8_t bit;
     uint8_t channel;
-} pin_ad_obj_t;
+} machine_pin_adc_obj_t;
 
 typedef struct {
     mp_obj_base_t base;
     qstr name;
     uint8_t pin;
-    uint8_t num_af;
-    const pin_af_obj_t *af;
-    const pin_ad_obj_t *ad;
+    const machine_pin_adc_obj_t *ad;
 } machine_pin_obj_t;
 
-extern const mp_obj_type_t pin_af_type;
-
 // Include all of the individual pin objects
 #include "genhdr/pins.h"
 
-typedef struct {
-    const char *name;
-    const machine_pin_obj_t *pin;
-} pin_named_pin_t;
+extern const mp_obj_type_t machine_pin_board_pins_obj_type;
+extern const mp_obj_type_t machine_pin_cpu_pins_obj_type;
 
-extern const pin_named_pin_t pin_board_pins[];
-extern const pin_named_pin_t pin_cpu_pins[];
-
-typedef struct {
-    mp_obj_base_t base;
-    qstr name;
-    const pin_named_pin_t *named_pins;
-} pin_named_pins_obj_t;
-
-extern const mp_obj_type_t pin_board_pins_obj_type;
-extern const mp_obj_type_t pin_cpu_pins_obj_type;
-
-extern const mp_obj_dict_t pin_cpu_pins_locals_dict;
-extern const mp_obj_dict_t pin_board_pins_locals_dict;
+extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;
+extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;
 
 void machine_pin_init(void);
 uint32_t pin_get_mode(const machine_pin_obj_t *pin);
@@ -90,8 +62,5 @@ uint32_t pin_get_drive(const machine_pin_obj_t *pin);
 uint32_t pin_get_af(const machine_pin_obj_t *pin);
 const machine_pin_obj_t *machine_pin_find(mp_obj_t user_obj);
 const machine_pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name);
-const pin_af_obj_t *pin_find_af(const machine_pin_obj_t *pin, uint8_t fn, uint8_t unit);
-const pin_af_obj_t *pin_find_af_by_index(const machine_pin_obj_t *pin, mp_uint_t af_idx);
-const pin_af_obj_t *pin_find_af_by_name(const machine_pin_obj_t *pin, const char *name);
 
 #endif // MICROPY_INCLUDED_RA_PIN_H

From 6ef9b29f88ed20a43140211732754f8f7d8e6133 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Fri, 25 Aug 2023 16:15:46 +1000
Subject: [PATCH 110/310] {cc3200,nrf}/boards/make-pins.py: Add a note about
 tools/boardgen.py.

It's not worth the effort to update these ports to use boardgen.py, but
put a note just in case anyone uses this as a reference for a new port.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/cc3200/boards/make-pins.py | 3 +++
 ports/nrf/boards/make-pins.py    | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/ports/cc3200/boards/make-pins.py b/ports/cc3200/boards/make-pins.py
index da04d8e36c..f1bdf15a30 100644
--- a/ports/cc3200/boards/make-pins.py
+++ b/ports/cc3200/boards/make-pins.py
@@ -1,6 +1,9 @@
 #!/usr/bin/env python
 """Generates the pins file for the CC3200."""
 
+# Do not use this as a reference for new ports. See tools/boardgen.py and e.g.
+# ports/stm32/boards/make-pins.py.
+
 from __future__ import print_function
 
 import argparse
diff --git a/ports/nrf/boards/make-pins.py b/ports/nrf/boards/make-pins.py
index 6932a18d64..57e815a43d 100644
--- a/ports/nrf/boards/make-pins.py
+++ b/ports/nrf/boards/make-pins.py
@@ -1,6 +1,9 @@
 #!/usr/bin/env python
 """Creates the pin file for the nRF5."""
 
+# Do not use this as a reference for new ports. See tools/boardgen.py and e.g.
+# ports/stm32/boards/make-pins.py.
+
 from __future__ import print_function
 
 import argparse

From 9a4d4db3a147d5a2a02b62a805912bac08a89107 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 3 Nov 2023 15:21:51 +1100
Subject: [PATCH 111/310] py/runtime: Remove declaration of function from
 inside function.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/runtime.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/py/runtime.c b/py/runtime.c
index b4d5250e83..6d8eddedc8 100644
--- a/py/runtime.c
+++ b/py/runtime.c
@@ -40,6 +40,7 @@
 #include "py/objmodule.h"
 #include "py/objgenerator.h"
 #include "py/smallint.h"
+#include "py/stream.h"
 #include "py/runtime.h"
 #include "py/builtin.h"
 #include "py/stackctrl.h"
@@ -1327,7 +1328,6 @@ mp_obj_t mp_getiter(mp_obj_t o_in, mp_obj_iter_buf_t *iter_buf) {
 
 STATIC mp_fun_1_t type_get_iternext(const mp_obj_type_t *type) {
     if ((type->flags & MP_TYPE_FLAG_ITER_IS_STREAM) == MP_TYPE_FLAG_ITER_IS_STREAM) {
-        mp_obj_t mp_stream_unbuffered_iter(mp_obj_t self);
         return mp_stream_unbuffered_iter;
     } else if (type->flags & MP_TYPE_FLAG_ITER_IS_ITERNEXT) {
         return (mp_fun_1_t)MP_OBJ_TYPE_GET_SLOT(type, iter);

From c85db05244ef6185fbb3c218c508ddd179830942 Mon Sep 17 00:00:00 2001
From: Mathieu Serandour <mathieu.serandour@numworks.fr>
Date: Tue, 24 Oct 2023 15:54:09 +0200
Subject: [PATCH 112/310] py/lexer: Change token position for new lines.

Set the position of new line tokens as the end of the preceding line
instead of the beginning of the next line.  This is done by first moving
the pointer to the end of the current line to skip any whitespace, record
the position for the token, then finaly skip any other line and whitespace.

The previous behavior was to skip every new line and whitespace, including
the indent of the next line, before recording the token position.

(Note that both lex->emit_dent and lex->nested_bracket_level equal 0 if
had_physical_newline == true, which allows simplifying the if-logic for
MP_TOKEN_NEWLINE.)

And update the cmd_parsetree.py test expected output, because the position
of the new-line token has changed.

Fixes issue #12792.

Signed-off-by: Mathieu Serandour <mathieu.serandour@numworks.fr>
---
 py/lexer.c                         | 31 +++++++++++++++++++-----------
 tests/cmdline/cmd_parsetree.py.exp |  2 +-
 2 files changed, 21 insertions(+), 12 deletions(-)

diff --git a/py/lexer.c b/py/lexer.c
index 9587f6b164..5e911a1a23 100644
--- a/py/lexer.c
+++ b/py/lexer.c
@@ -527,14 +527,14 @@ STATIC void parse_string_literal(mp_lexer_t *lex, bool is_raw, bool is_fstring)
     vstr_cut_tail_bytes(&lex->vstr, n_closing);
 }
 
+// This function returns whether it has crossed a newline or not.
+// It therefore always return true if stop_at_newline is true
 STATIC bool skip_whitespace(mp_lexer_t *lex, bool stop_at_newline) {
-    bool had_physical_newline = false;
     while (!is_end(lex)) {
         if (is_physical_newline(lex)) {
             if (stop_at_newline && lex->nested_bracket_level == 0) {
-                break;
+                return true;
             }
-            had_physical_newline = true;
             next_char(lex);
         } else if (is_whitespace(lex)) {
             next_char(lex);
@@ -543,16 +543,16 @@ STATIC bool skip_whitespace(mp_lexer_t *lex, bool stop_at_newline) {
             while (!is_end(lex) && !is_physical_newline(lex)) {
                 next_char(lex);
             }
-            // had_physical_newline will be set on next loop
+            // will return true on next loop
         } else if (is_char_and(lex, '\\', '\n')) {
-            // line-continuation, so don't set had_physical_newline
+            // line-continuation, so don't return true
             next_char(lex);
             next_char(lex);
         } else {
             break;
         }
     }
-    return had_physical_newline;
+    return false;
 }
 
 void mp_lexer_to_next(mp_lexer_t *lex) {
@@ -577,7 +577,10 @@ void mp_lexer_to_next(mp_lexer_t *lex) {
     vstr_reset(&lex->vstr);
 
     // skip white space and comments
-    bool had_physical_newline = skip_whitespace(lex, false);
+    // set the newline tokens at the line and column of the preceding line:
+    // only advance on the pointer until a new line is crossed, save the
+    // line and column, and then readvance it
+    bool had_physical_newline = skip_whitespace(lex, true);
 
     // set token source information
     lex->tok_line = lex->line;
@@ -591,7 +594,12 @@ void mp_lexer_to_next(mp_lexer_t *lex) {
         lex->tok_kind = MP_TOKEN_INDENT;
         lex->emit_dent -= 1;
 
-    } else if (had_physical_newline && lex->nested_bracket_level == 0) {
+    } else if (had_physical_newline) {
+        // The cursor is at the end of the previous line, pointing to a
+        // physical newline. Skip any remaining whitespace, comments, and
+        // newlines.
+        skip_whitespace(lex, false);
+
         lex->tok_kind = MP_TOKEN_NEWLINE;
 
         size_t num_spaces = lex->column - 1;
@@ -862,9 +870,10 @@ mp_lexer_t *mp_lexer_new(qstr src_name, mp_reader_t reader) {
     // preload first token
     mp_lexer_to_next(lex);
 
-    // Check that the first token is in the first column.  If it's not then we
-    // convert the token kind to INDENT so that the parser gives a syntax error.
-    if (lex->tok_column != 1) {
+    // Check that the first token is in the first column unless it is a
+    // newline. Otherwise we convert the token kind to INDENT so that
+    // the parser gives a syntax error.
+    if (lex->tok_column != 1 && lex->tok_kind != MP_TOKEN_NEWLINE) {
         lex->tok_kind = MP_TOKEN_INDENT;
     }
 
diff --git a/tests/cmdline/cmd_parsetree.py.exp b/tests/cmdline/cmd_parsetree.py.exp
index 3049267c0b..6ec553b8a9 100644
--- a/tests/cmdline/cmd_parsetree.py.exp
+++ b/tests/cmdline/cmd_parsetree.py.exp
@@ -1,5 +1,5 @@
 ----------------
-[   4] \(rule\|file_input_2\)(1) (n=10)
+[   1] file_input_2(1) (n=10)
          tok(6)
 [   4]   \(rule\|for_stmt\)(22) (n=4)
            id(i)

From b6a977848407a4ced45d118cf926bd915cc89dfb Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Fri, 3 Nov 2023 14:19:55 +1100
Subject: [PATCH 113/310] py/misc: Change sizeof to offsetof for
 variable-length alloc.

This fixes the case where e.g.

    struct foo_t {
      mp_obj_t x;
      uint16_t y;
      char buf[];
    };

will have `sizeof(struct foo_t)==8`, but `offsetof(struct foo_t, buf)==6`.

When computing the size to allocate for `m_new_obj_var` we need to use
offsetof to avoid over-allocating. This is important especially when it
might cause it to spill over into another GC block.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 extmod/modre.c                      |  4 ++--
 extmod/nimble/modbluetooth_nimble.c |  2 +-
 extmod/vfs_lfsx_file.c              |  4 ++--
 ports/unix/coverage.c               |  2 +-
 py/misc.h                           | 14 +++++++-------
 py/modthread.c                      |  4 ++--
 py/objexcept.c                      |  2 +-
 py/objfun.c                         | 10 +++++-----
 py/objnamedtuple.c                  |  2 +-
 py/objtuple.c                       |  2 +-
 py/objtype.c                        |  2 +-
 11 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/extmod/modre.c b/extmod/modre.c
index 7f00b1c23c..c24c07d095 100644
--- a/extmod/modre.c
+++ b/extmod/modre.c
@@ -207,12 +207,12 @@ STATIC mp_obj_t re_exec(bool is_anchored, uint n_args, const mp_obj_t *args) {
     subj.begin_line = subj.begin = mp_obj_str_get_data(args[1], &len);
     subj.end = subj.begin + len;
     int caps_num = (self->re.sub + 1) * 2;
-    mp_obj_match_t *match = m_new_obj_var(mp_obj_match_t, char *, caps_num);
+    mp_obj_match_t *match = m_new_obj_var(mp_obj_match_t, caps, char *, caps_num);
     // cast is a workaround for a bug in msvc: it treats const char** as a const pointer instead of a pointer to pointer to const char
     memset((char *)match->caps, 0, caps_num * sizeof(char *));
     int res = re1_5_recursiveloopprog(&self->re, &subj, match->caps, caps_num, is_anchored);
     if (res == 0) {
-        m_del_var(mp_obj_match_t, char *, caps_num, match);
+        m_del_var(mp_obj_match_t, caps, char *, caps_num, match);
         return mp_const_none;
     }
 
diff --git a/extmod/nimble/modbluetooth_nimble.c b/extmod/nimble/modbluetooth_nimble.c
index 5e3e38ea67..3cdf4d1a78 100644
--- a/extmod/nimble/modbluetooth_nimble.c
+++ b/extmod/nimble/modbluetooth_nimble.c
@@ -1701,7 +1701,7 @@ STATIC int create_l2cap_channel(uint16_t mtu, mp_bluetooth_nimble_l2cap_channel_
     // multiply that by the "MTUs per channel" (set to 3 above).
     const size_t buf_blocks = MP_CEIL_DIVIDE(mtu, L2CAP_BUF_BLOCK_SIZE) * L2CAP_BUF_SIZE_MTUS_PER_CHANNEL;
 
-    mp_bluetooth_nimble_l2cap_channel_t *chan = m_new_obj_var(mp_bluetooth_nimble_l2cap_channel_t, uint8_t, OS_MEMPOOL_SIZE(buf_blocks, L2CAP_BUF_BLOCK_SIZE) * sizeof(os_membuf_t));
+    mp_bluetooth_nimble_l2cap_channel_t *chan = m_new_obj_var(mp_bluetooth_nimble_l2cap_channel_t, sdu_mem, uint8_t, OS_MEMPOOL_SIZE(buf_blocks, L2CAP_BUF_BLOCK_SIZE) * sizeof(os_membuf_t));
     MP_STATE_PORT(bluetooth_nimble_root_pointers)->l2cap_chan = chan;
 
     // Will be set in BLE_L2CAP_EVENT_COC_CONNECTED or BLE_L2CAP_EVENT_COC_ACCEPT.
diff --git a/extmod/vfs_lfsx_file.c b/extmod/vfs_lfsx_file.c
index 879ba78973..b9f3323397 100644
--- a/extmod/vfs_lfsx_file.c
+++ b/extmod/vfs_lfsx_file.c
@@ -90,9 +90,9 @@ mp_obj_t MP_VFS_LFSx(file_open)(mp_obj_t self_in, mp_obj_t path_in, mp_obj_t mod
     }
 
     #if LFS_BUILD_VERSION == 1
-    MP_OBJ_VFS_LFSx_FILE *o = m_new_obj_var_with_finaliser(MP_OBJ_VFS_LFSx_FILE, uint8_t, self->lfs.cfg->prog_size);
+    MP_OBJ_VFS_LFSx_FILE *o = m_new_obj_var_with_finaliser(MP_OBJ_VFS_LFSx_FILE, file_buffer, uint8_t, self->lfs.cfg->prog_size);
     #else
-    MP_OBJ_VFS_LFSx_FILE *o = m_new_obj_var_with_finaliser(MP_OBJ_VFS_LFSx_FILE, uint8_t, self->lfs.cfg->cache_size);
+    MP_OBJ_VFS_LFSx_FILE *o = m_new_obj_var_with_finaliser(MP_OBJ_VFS_LFSx_FILE, file_buffer, uint8_t, self->lfs.cfg->cache_size);
     #endif
     o->base.type = type;
     o->vfs = self;
diff --git a/ports/unix/coverage.c b/ports/unix/coverage.c
index f3bb3d450f..88dd48bfab 100644
--- a/ports/unix/coverage.c
+++ b/ports/unix/coverage.c
@@ -545,7 +545,7 @@ STATIC mp_obj_t extra_coverage(void) {
         fun_bc.context = &context;
         fun_bc.child_table = NULL;
         fun_bc.bytecode = (const byte *)"\x01"; // just needed for n_state
-        mp_code_state_t *code_state = m_new_obj_var(mp_code_state_t, mp_obj_t, 1);
+        mp_code_state_t *code_state = m_new_obj_var(mp_code_state_t, state, mp_obj_t, 1);
         code_state->fun_bc = &fun_bc;
         code_state->ip = (const byte *)"\x00"; // just needed for an invalid opcode
         code_state->sp = &code_state->state[0];
diff --git a/py/misc.h b/py/misc.h
index 32061a009e..352a9f34c4 100644
--- a/py/misc.h
+++ b/py/misc.h
@@ -71,26 +71,26 @@ typedef unsigned int uint;
 #define m_new0(type, num) ((type *)(m_malloc0(sizeof(type) * (num))))
 #define m_new_obj(type) (m_new(type, 1))
 #define m_new_obj_maybe(type) (m_new_maybe(type, 1))
-#define m_new_obj_var(obj_type, var_type, var_num) ((obj_type *)m_malloc(sizeof(obj_type) + sizeof(var_type) * (var_num)))
-#define m_new_obj_var0(obj_type, var_type, var_num) ((obj_type *)m_malloc0(sizeof(obj_type) + sizeof(var_type) * (var_num)))
-#define m_new_obj_var_maybe(obj_type, var_type, var_num) ((obj_type *)m_malloc_maybe(sizeof(obj_type) + sizeof(var_type) * (var_num)))
+#define m_new_obj_var(obj_type, var_field, var_type, var_num) ((obj_type *)m_malloc(offsetof(obj_type, var_field) + sizeof(var_type) * (var_num)))
+#define m_new_obj_var0(obj_type, var_field, var_type, var_num) ((obj_type *)m_malloc0(offsetof(obj_type, var_field) + sizeof(var_type) * (var_num)))
+#define m_new_obj_var_maybe(obj_type, var_field, var_type, var_num) ((obj_type *)m_malloc_maybe(offsetof(obj_type, var_field) + sizeof(var_type) * (var_num)))
 #if MICROPY_ENABLE_FINALISER
 #define m_new_obj_with_finaliser(type) ((type *)(m_malloc_with_finaliser(sizeof(type))))
-#define m_new_obj_var_with_finaliser(type, var_type, var_num) ((type *)m_malloc_with_finaliser(sizeof(type) + sizeof(var_type) * (var_num)))
+#define m_new_obj_var_with_finaliser(type, var_field, var_type, var_num) ((type *)m_malloc_with_finaliser(offsetof(type, var_field) + sizeof(var_type) * (var_num)))
 #else
 #define m_new_obj_with_finaliser(type) m_new_obj(type)
-#define m_new_obj_var_with_finaliser(type, var_type, var_num) m_new_obj_var(type, var_type, var_num)
+#define m_new_obj_var_with_finaliser(type, var_field, var_type, var_num) m_new_obj_var(type, var_field, var_type, var_num)
 #endif
 #if MICROPY_MALLOC_USES_ALLOCATED_SIZE
 #define m_renew(type, ptr, old_num, new_num) ((type *)(m_realloc((ptr), sizeof(type) * (old_num), sizeof(type) * (new_num))))
 #define m_renew_maybe(type, ptr, old_num, new_num, allow_move) ((type *)(m_realloc_maybe((ptr), sizeof(type) * (old_num), sizeof(type) * (new_num), (allow_move))))
 #define m_del(type, ptr, num) m_free(ptr, sizeof(type) * (num))
-#define m_del_var(obj_type, var_type, var_num, ptr) (m_free(ptr, sizeof(obj_type) + sizeof(var_type) * (var_num)))
+#define m_del_var(obj_type, var_field, var_type, var_num, ptr) (m_free(ptr, offsetof(obj_type, var_field) + sizeof(var_type) * (var_num)))
 #else
 #define m_renew(type, ptr, old_num, new_num) ((type *)(m_realloc((ptr), sizeof(type) * (new_num))))
 #define m_renew_maybe(type, ptr, old_num, new_num, allow_move) ((type *)(m_realloc_maybe((ptr), sizeof(type) * (new_num), (allow_move))))
 #define m_del(type, ptr, num) ((void)(num), m_free(ptr))
-#define m_del_var(obj_type, var_type, var_num, ptr) ((void)(var_num), m_free(ptr))
+#define m_del_var(obj_type, var_field, var_type, var_num, ptr) ((void)(var_num), m_free(ptr))
 #endif
 #define m_del_obj(type, ptr) (m_del(type, ptr, 1))
 
diff --git a/py/modthread.c b/py/modthread.c
index e4dcccd259..3a8a1e03ce 100644
--- a/py/modthread.c
+++ b/py/modthread.c
@@ -235,7 +235,7 @@ STATIC mp_obj_t mod_thread_start_new_thread(size_t n_args, const mp_obj_t *args)
     // check for keyword arguments
     if (n_args == 2) {
         // just position arguments
-        th_args = m_new_obj_var(thread_entry_args_t, mp_obj_t, pos_args_len);
+        th_args = m_new_obj_var(thread_entry_args_t, args, mp_obj_t, pos_args_len);
         th_args->n_kw = 0;
     } else {
         // positional and keyword arguments
@@ -243,7 +243,7 @@ STATIC mp_obj_t mod_thread_start_new_thread(size_t n_args, const mp_obj_t *args)
             mp_raise_TypeError(MP_ERROR_TEXT("expecting a dict for keyword args"));
         }
         mp_map_t *map = &((mp_obj_dict_t *)MP_OBJ_TO_PTR(args[2]))->map;
-        th_args = m_new_obj_var(thread_entry_args_t, mp_obj_t, pos_args_len + 2 * map->used);
+        th_args = m_new_obj_var(thread_entry_args_t, args, mp_obj_t, pos_args_len + 2 * map->used);
         th_args->n_kw = map->used;
         // copy across the keyword arguments
         for (size_t i = 0, n = pos_args_len; i < map->alloc; ++i) {
diff --git a/py/objexcept.c b/py/objexcept.c
index a90405c525..a54b81370d 100644
--- a/py/objexcept.c
+++ b/py/objexcept.c
@@ -221,7 +221,7 @@ mp_obj_t mp_obj_exception_make_new(const mp_obj_type_t *type, size_t n_args, siz
         o_tuple = (mp_obj_tuple_t *)&mp_const_empty_tuple_obj;
     } else {
         // Try to allocate memory for the tuple containing the args
-        o_tuple = m_new_obj_var_maybe(mp_obj_tuple_t, mp_obj_t, n_args);
+        o_tuple = m_new_obj_var_maybe(mp_obj_tuple_t, items, mp_obj_t, n_args);
 
         #if MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF
         // If we are called by mp_obj_new_exception_msg_varg then it will have
diff --git a/py/objfun.c b/py/objfun.c
index 94b33cd5bd..e2136968b6 100644
--- a/py/objfun.c
+++ b/py/objfun.c
@@ -215,7 +215,7 @@ mp_code_state_t *mp_obj_fun_bc_prepare_codestate(mp_obj_t self_in, size_t n_args
     // RuntimeError should be raised instead. So, we use m_new_obj_var_maybe(),
     // return NULL, then vm.c takes the needed action (either raise
     // RuntimeError or fallback to stack allocation).
-    code_state = m_new_obj_var_maybe(mp_code_state_t, byte, state_size);
+    code_state = m_new_obj_var_maybe(mp_code_state_t, state, byte, state_size);
     if (!code_state) {
         return NULL;
     }
@@ -247,10 +247,10 @@ STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const
     // allocate state for locals and stack
     mp_code_state_t *code_state = NULL;
     #if MICROPY_ENABLE_PYSTACK
-    code_state = mp_pystack_alloc(sizeof(mp_code_state_t) + state_size);
+    code_state = mp_pystack_alloc(offsetof(mp_code_state_t, state) + state_size);
     #else
     if (state_size > VM_MAX_STATE_ON_STACK) {
-        code_state = m_new_obj_var_maybe(mp_code_state_t, byte, state_size);
+        code_state = m_new_obj_var_maybe(mp_code_state_t, state, byte, state_size);
         #if MICROPY_DEBUG_VM_STACK_OVERFLOW
         if (code_state != NULL) {
             memset(code_state->state, 0, state_size);
@@ -258,7 +258,7 @@ STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const
         #endif
     }
     if (code_state == NULL) {
-        code_state = alloca(sizeof(mp_code_state_t) + state_size);
+        code_state = alloca(offsetof(mp_code_state_t, state) + state_size);
         #if MICROPY_DEBUG_VM_STACK_OVERFLOW
         memset(code_state->state, 0, state_size);
         #endif
@@ -320,7 +320,7 @@ STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const
     #else
     // free the state if it was allocated on the heap
     if (state_size != 0) {
-        m_del_var(mp_code_state_t, byte, state_size, code_state);
+        m_del_var(mp_code_state_t, state, byte, state_size, code_state);
     }
     #endif
 
diff --git a/py/objnamedtuple.c b/py/objnamedtuple.c
index 75e21494b4..e586f08945 100644
--- a/py/objnamedtuple.c
+++ b/py/objnamedtuple.c
@@ -143,7 +143,7 @@ STATIC mp_obj_t namedtuple_make_new(const mp_obj_type_t *type_in, size_t n_args,
 }
 
 mp_obj_namedtuple_type_t *mp_obj_new_namedtuple_base(size_t n_fields, mp_obj_t *fields) {
-    mp_obj_namedtuple_type_t *o = m_new_obj_var0(mp_obj_namedtuple_type_t, qstr, n_fields);
+    mp_obj_namedtuple_type_t *o = m_new_obj_var0(mp_obj_namedtuple_type_t, fields, qstr, n_fields);
     o->n_fields = n_fields;
     for (size_t i = 0; i < n_fields; i++) {
         o->fields[i] = mp_obj_str_get_qstr(fields[i]);
diff --git a/py/objtuple.c b/py/objtuple.c
index 0318a35db6..969c488ee2 100644
--- a/py/objtuple.c
+++ b/py/objtuple.c
@@ -264,7 +264,7 @@ void mp_obj_tuple_get(mp_obj_t self_in, size_t *len, mp_obj_t **items) {
 void mp_obj_tuple_del(mp_obj_t self_in) {
     assert(mp_obj_is_type(self_in, &mp_type_tuple));
     mp_obj_tuple_t *self = MP_OBJ_TO_PTR(self_in);
-    m_del_var(mp_obj_tuple_t, mp_obj_t, self->len, self);
+    m_del_var(mp_obj_tuple_t, items, mp_obj_t, self->len, self);
 }
 
 /******************************************************************************/
diff --git a/py/objtype.c b/py/objtype.c
index 772f25d744..d21c2a4b5b 100644
--- a/py/objtype.c
+++ b/py/objtype.c
@@ -1155,7 +1155,7 @@ mp_obj_t mp_obj_new_type(qstr name, mp_obj_t bases_tuple, mp_obj_t locals_dict)
     // (currently 10, plus 1 for base, plus 1 for base-protocol).
     // Note: mp_obj_type_t is (2 + 3 + #slots) words, so going from 11 to 12 slots
     // moves from 4 to 5 gc blocks.
-    mp_obj_type_t *o = m_new_obj_var0(mp_obj_type_t, void *, 10 + (bases_len ? 1 : 0) + (base_protocol ? 1 : 0));
+    mp_obj_type_t *o = m_new_obj_var0(mp_obj_type_t, slots, void *, 10 + (bases_len ? 1 : 0) + (base_protocol ? 1 : 0));
     o->base.type = &mp_type_type;
     o->flags = base_flags;
     o->name = name;

From e5014a4d7953808355c1882a65d6d7824cdd0001 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Mon, 16 Oct 2023 17:20:40 +0200
Subject: [PATCH 114/310] stm32: Add configuration options for analog switches.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h    |  6 ++++++
 .../stm32/boards/ARDUINO_NICLA_VISION/board_init.c |  5 -----
 .../boards/ARDUINO_NICLA_VISION/mpconfigboard.h    |  7 +++++++
 .../boards/ARDUINO_PORTENTA_H7/mpconfigboard.h     |  6 ++++++
 ports/stm32/system_stm32.c                         | 14 ++++++++++++++
 5 files changed, 33 insertions(+), 5 deletions(-)

diff --git a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
index a9b8cbfc7b..ec9bbed5ea 100644
--- a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
@@ -104,6 +104,12 @@ void GIGA_board_low_power(int mode);
 // SMPS configuration
 #define MICROPY_HW_PWR_SMPS_CONFIG      (PWR_LDO_SUPPLY)
 
+// Configure the analog switches for dual-pad pins.
+#define MICROPY_HW_ANALOG_SWITCH_PA0    (SYSCFG_SWITCH_PA0_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PA1    (SYSCFG_SWITCH_PA1_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PC2    (SYSCFG_SWITCH_PC2_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PC3    (SYSCFG_SWITCH_PC3_OPEN)
+
 // There is an external 32kHz oscillator
 #define RTC_ASYNCH_PREDIV           (0)
 #define RTC_SYNCH_PREDIV            (0x7fff)
diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/board_init.c b/ports/stm32/boards/ARDUINO_NICLA_VISION/board_init.c
index ed8c609275..ec78b09de3 100644
--- a/ports/stm32/boards/ARDUINO_NICLA_VISION/board_init.c
+++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/board_init.c
@@ -65,11 +65,6 @@ void NICLAV_board_early_init(void) {
     }
     #endif
 
-    // Make sure PC2 and PC3 and PC2_C and PC3_C pads are connected
-    // through the analog switch for ULPI NXT and DIR pins.
-    HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC2, SYSCFG_SWITCH_PC2_CLOSE);
-    HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC3, SYSCFG_SWITCH_PC3_CLOSE);
-
     #if MICROPY_HW_USB_HS_ULPI3320
     // Make sure UPLI is Not in low-power mode.
     ulpi_leave_low_power();
diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h b/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
index 7cb3d85d3d..3cae9b25fa 100644
--- a/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
@@ -107,6 +107,13 @@ void NICLAV_board_osc_enable(int enable);
 // SMPS configuration
 #define MICROPY_HW_PWR_SMPS_CONFIG      (PWR_LDO_SUPPLY)
 
+// Configure the analog switches for dual-pad pins.
+#define MICROPY_HW_ANALOG_SWITCH_PA0    (SYSCFG_SWITCH_PA0_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PA1    (SYSCFG_SWITCH_PA1_OPEN)
+// PC2_C and PC3_C, which are connected to ULPI NXT and DIR pins.
+#define MICROPY_HW_ANALOG_SWITCH_PC2    (SYSCFG_SWITCH_PC2_CLOSE)
+#define MICROPY_HW_ANALOG_SWITCH_PC3    (SYSCFG_SWITCH_PC3_CLOSE)
+
 // There is an external 32kHz oscillator
 #define RTC_ASYNCH_PREDIV           (0)
 #define RTC_SYNCH_PREDIV            (0x7fff)
diff --git a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
index 349ca9e001..133158c60a 100644
--- a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
@@ -109,6 +109,12 @@ void PORTENTA_board_osc_enable(int enable);
 // SMPS configuration
 #define MICROPY_HW_PWR_SMPS_CONFIG      (PWR_SMPS_1V8_SUPPLIES_LDO)
 
+// Configure the analog switches for dual-pad pins.
+#define MICROPY_HW_ANALOG_SWITCH_PA0    (SYSCFG_SWITCH_PA0_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PA1    (SYSCFG_SWITCH_PA1_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PC2    (SYSCFG_SWITCH_PC2_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PC3    (SYSCFG_SWITCH_PC3_OPEN)
+
 // There is an external 32kHz oscillator
 #define RTC_ASYNCH_PREDIV           (0)
 #define RTC_SYNCH_PREDIV            (0x7fff)
diff --git a/ports/stm32/system_stm32.c b/ports/stm32/system_stm32.c
index de1897b4a6..2cff36c3a6 100644
--- a/ports/stm32/system_stm32.c
+++ b/ports/stm32/system_stm32.c
@@ -587,6 +587,20 @@ MP_WEAK void SystemClock_Config(void) {
     // Enable the Debug Module in low-power modes.
     DBGMCU->CR |= (DBGMCU_CR_DBG_SLEEPD1 | DBGMCU_CR_DBG_STOPD1 | DBGMCU_CR_DBG_STANDBYD1);
     #endif
+
+    // Configure the analog switches
+    #ifdef MICROPY_HW_ANALOG_SWITCH_PA0
+    HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PA0, MICROPY_HW_ANALOG_SWITCH_PA0);
+    #endif
+    #ifdef MICROPY_HW_ANALOG_SWITCH_PA1
+    HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PA1, MICROPY_HW_ANALOG_SWITCH_PA1);
+    #endif
+    #ifdef MICROPY_HW_ANALOG_SWITCH_PC2
+    HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC2, MICROPY_HW_ANALOG_SWITCH_PC2);
+    #endif
+    #ifdef MICROPY_HW_ANALOG_SWITCH_PC3
+    HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC3, MICROPY_HW_ANALOG_SWITCH_PC3);
+    #endif
 }
 
 #endif

From 47ea831c0e741722a9e7a94bb453947cff5f66d8 Mon Sep 17 00:00:00 2001
From: Rene Straub <rene@see5.ch>
Date: Sat, 21 Oct 2023 15:03:53 +0200
Subject: [PATCH 115/310] stm32: Add STM32H5 support for sleep mode.

Update rtc, machine and powerctrl drivers to support STM32H5 sleep
modes. This makes RTC alarm wakeup working from lightsleep() and
deepsleep().

Changes:
- Determine start reason for machine.reset_cause() in modmachine.c.
- Add proper interrupt clear code in rtc.c.
- Add wakeup functionality in powerctrl_enter_stop_mode(). Remember
  and restore voltage scaling level. Restart HSI48 if it was on before
  entering sleep mode.
- Clear DBGMCU_CR in SystemClock_Config() as for other variants.
  Otherwise debug flags prevent entering sleep mode.

Implementation Notes:
- rtc.c: EXTI_RTSTR1 bits are not present for H5. Code sequence from
  G0/G4/L4/WB/WL would be invalid. RTSTR is only defined for external
  (GPIO) interrupts. Maybe this is also true for other STM32 variants.
- powerctrl_enter_stop_mode() uses complicated, nested conditionals
  to select STM32 variants. To make code slightly better readable,
  comment have been added. A non-nested, #if/#elif sequence would
  make the code more readable. I leave this to the original authors.

Signed-off-by: Rene Straub <rene@see5.ch>
---
 ports/stm32/modmachine.c    |  6 ++++++
 ports/stm32/powerctrl.c     | 27 +++++++++++++++++++++++----
 ports/stm32/powerctrlboot.c |  4 ++++
 ports/stm32/rtc.c           |  8 ++++++--
 4 files changed, 39 insertions(+), 6 deletions(-)

diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 83327bede0..67fcffb0f1 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -108,6 +108,12 @@ void machine_init(void) {
         reset_cause = PYB_RESET_DEEPSLEEP;
         PWR->CR1 |= PWR_CR1_CSBF;
     } else
+    #elif defined(STM32H5)
+    if (PWR->PMSR & PWR_PMSR_STOPF || PWR->PMSR & PWR_PMSR_SBF) {
+        // came out of standby or stop mode
+        reset_cause = PYB_RESET_DEEPSLEEP;
+        PWR->PMCR |= PWR_PMCR_CSSF;
+    } else
     #elif defined(STM32H7)
     if (PWR->CPUCR & PWR_CPUCR_SBF || PWR->CPUCR & PWR_CPUCR_STOPF) {
         // came out of standby or stop mode
diff --git a/ports/stm32/powerctrl.c b/ports/stm32/powerctrl.c
index 03224f4d8b..1bb66c9781 100644
--- a/ports/stm32/powerctrl.c
+++ b/ports/stm32/powerctrl.c
@@ -48,6 +48,8 @@
 #define POWERCTRL_GET_VOLTAGE_SCALING() PWR_REGULATOR_VOLTAGE_SCALE0
 #elif defined(STM32H723xx)
 #define POWERCTRL_GET_VOLTAGE_SCALING() LL_PWR_GetRegulVoltageScaling()
+#elif defined(STM32H5)
+#define POWERCTRL_GET_VOLTAGE_SCALING() LL_PWR_GetRegulVoltageScaling()
 #else
 #define POWERCTRL_GET_VOLTAGE_SCALING()     \
     (((PWR->CSR1 & PWR_CSR1_ACTVOS) && (SYSCFG->PWRCR & SYSCFG_PWRCR_ODEN)) ? \
@@ -797,6 +799,14 @@ void powerctrl_enter_stop_mode(void) {
     HAL_PWREx_EnableFlashPowerDown();
     #endif
 
+    #if defined(STM32H5)
+    // Save RCC CR to re-enable OSCs and PLLs after wake up from low power mode.
+    uint32_t rcc_cr = RCC->CR;
+
+    // Save the current voltage scaling level to restore after exiting low power mode.
+    uint32_t vscaling = POWERCTRL_GET_VOLTAGE_SCALING();
+    #endif
+
     #if defined(STM32H7)
     // Save RCC CR to re-enable OSCs and PLLs after wake up from low power mode.
     uint32_t rcc_cr = RCC->CR;
@@ -837,9 +847,9 @@ void powerctrl_enter_stop_mode(void) {
     while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI48) {
     }
 
-    #else
+    #else // defined(STM32F0)
 
-    #if defined(STM32H7)
+    #if defined(STM32H5) || defined(STM32H7)
     // When exiting from Stop or Standby modes, the Run mode voltage scaling is reset to
     // the default VOS3 value. Restore the voltage scaling to the previous voltage scale.
     if (vscaling != POWERCTRL_GET_VOLTAGE_SCALING()) {
@@ -879,7 +889,7 @@ void powerctrl_enter_stop_mode(void) {
     while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL1) {
     }
 
-    #else
+    #else // defined(STM32H5)
 
     // enable PLL
     __HAL_RCC_PLL_ENABLE();
@@ -899,7 +909,7 @@ void powerctrl_enter_stop_mode(void) {
     }
     #endif
 
-    #endif
+    #endif // defined(STM32H5)
 
     powerctrl_disable_hsi_if_unused();
 
@@ -912,6 +922,15 @@ void powerctrl_enter_stop_mode(void) {
     }
     #endif
 
+    #if defined(STM32H5)
+    if (rcc_cr & RCC_CR_HSI48ON) {
+        // Enable HSI48.
+        LL_RCC_HSI48_Enable();
+        while (!LL_RCC_HSI48_IsReady()) {
+        }
+    }
+    #endif
+
     #if defined(STM32H7)
     // Enable HSI
     if (rcc_cr & RCC_CR_HSION) {
diff --git a/ports/stm32/powerctrlboot.c b/ports/stm32/powerctrlboot.c
index c7802a5588..31dae527c1 100644
--- a/ports/stm32/powerctrlboot.c
+++ b/ports/stm32/powerctrlboot.c
@@ -298,6 +298,10 @@ void SystemClock_Config(void) {
     LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_PLL3Q);
 
     #endif
+
+    #ifdef NDEBUG
+    DBGMCU->CR = 0;
+    #endif
 }
 
 #elif defined(STM32L0)
diff --git a/ports/stm32/rtc.c b/ports/stm32/rtc.c
index 3b05fb40eb..b209ea8354 100644
--- a/ports/stm32/rtc.c
+++ b/ports/stm32/rtc.c
@@ -756,9 +756,11 @@ mp_obj_t pyb_rtc_wakeup(size_t n_args, const mp_obj_t *args) {
         RTC->WPR = 0xff;
 
         // enable external interrupts on line EXTI_RTC_WAKEUP
-        #if defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
+        #if defined(STM32G0) || defined(STM32G4) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
         EXTI->IMR1 |= 1 << EXTI_RTC_WAKEUP;
         EXTI->RTSR1 |= 1 << EXTI_RTC_WAKEUP;
+        #elif defined(STM32H5)
+        EXTI->IMR1 |= 1 << EXTI_RTC_WAKEUP;
         #elif defined(STM32H7)
         EXTI_D1->IMR1 |= 1 << EXTI_RTC_WAKEUP;
         EXTI->RTSR1 |= 1 << EXTI_RTC_WAKEUP;
@@ -768,8 +770,10 @@ mp_obj_t pyb_rtc_wakeup(size_t n_args, const mp_obj_t *args) {
         #endif
 
         // clear interrupt flags
-        #if defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32WL)
+        #if defined(STM32G0) || defined(STM32G4) || defined(STM32WL)
         RTC->ICSR &= ~RTC_ICSR_WUTWF;
+        #elif defined(STM32H5)
+        RTC->SCR = RTC_SCR_CWUTF;
         #elif defined(STM32H7A3xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xx) || defined(STM32H7B3xxQ)
         RTC->SR &= ~RTC_SR_WUTF;
         #else

From d95f5aa01131f3aa669867ebdde391f9db277846 Mon Sep 17 00:00:00 2001
From: Maarten van der Schrieck <maarten@thingsconnected.nl>
Date: Tue, 24 Oct 2023 10:16:00 +0200
Subject: [PATCH 116/310] rp2/machine_uart: Fix handling of serial break
 condition.

The FIFO reports not only the bytes read, but also 4 error bits. These were
not checked, leading to NUL value read in case of break and possible
garbage bytes being written on parity/framing error.

This patch addresses the issue that NUL bytes are incorrectly read on
break, and at least provides the boilerplate code and comments for error
handling, that may be implemented in the future.

Signed-off-by: Maarten van der Schrieck <maarten@thingsconnected.nl>
---
 ports/rp2/machine_uart.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/ports/rp2/machine_uart.c b/ports/rp2/machine_uart.c
index 044c905ff2..dae57012a8 100644
--- a/ports/rp2/machine_uart.c
+++ b/ports/rp2/machine_uart.c
@@ -140,8 +140,27 @@ static inline void read_mutex_unlock(machine_uart_obj_t *u) {
 STATIC void uart_drain_rx_fifo(machine_uart_obj_t *self) {
     if (read_mutex_try_lock(self)) {
         while (uart_is_readable(self->uart) && ringbuf_free(&self->read_buffer) > 0) {
-            // get a byte from uart and put into the buffer
-            ringbuf_put(&(self->read_buffer), uart_get_hw(self->uart)->dr);
+            // Get a byte from uart and put into the buffer. Every entry from
+            // the FIFO is accompanied by 4 error bits, that may be used for
+            // error handling.
+            uint16_t c = uart_get_hw(self->uart)->dr;
+            if (c & UART_UARTDR_OE_BITS) {
+                // Overrun Error: We missed at least one byte. Not much we can do here.
+            }
+            if (c & UART_UARTDR_BE_BITS) {
+                // Break Error: RX was held low for longer than one character
+                // (11 bits). We did *not* read the zero byte that we seemed to
+                // read from dr.
+                continue;
+            }
+            if (c & UART_UARTDR_PE_BITS) {
+                // Parity Error: The byte we read is invalid.
+            }
+            if (c & UART_UARTDR_FE_BITS) {
+                // Framing Error: We did not receive a valid stop bit.
+            }
+
+            ringbuf_put(&(self->read_buffer), c);
         }
         read_mutex_unlock(self);
     }

From b41055a5a3e1c51ee7ea274da4744dd47c211b3a Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Wed, 25 Oct 2023 09:05:54 +0200
Subject: [PATCH 117/310] rp2/machine_adc: Refactor channel/pin validation
 code.

This patch ensures that integer channel numbers passed to the ADC
constructor (including temperature sensor) are interpreted as raw
channel numbers, and not cause any GPIO pins to be initialized.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/rp2/machine_adc.c | 32 +++++++++++++++++---------------
 1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/ports/rp2/machine_adc.c b/ports/rp2/machine_adc.c
index 80c4d0533e..3a7a71a741 100644
--- a/ports/rp2/machine_adc.c
+++ b/ports/rp2/machine_adc.c
@@ -69,21 +69,21 @@ STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args
 
     mp_obj_t source = all_args[0];
 
-    uint32_t channel;
+    uint32_t channel = -1;
     bool is_ext = false;
     const machine_pin_obj_t *pin = NULL;
 
     if (mp_obj_is_int(source)) {
         // Get and validate channel number.
         channel = mp_obj_get_int(source);
-        if (!((channel >= 0 && channel <= ADC_CHANNEL_TEMPSENSOR) || ADC_IS_VALID_GPIO(channel))) {
+        if (ADC_IS_VALID_GPIO(channel)) {
+            channel = ADC_CHANNEL_FROM_GPIO(channel);
+        } else if (!(channel >= 0 && channel <= ADC_CHANNEL_TEMPSENSOR)) {
             mp_raise_ValueError(MP_ERROR_TEXT("invalid channel"));
         }
-
     } else {
         // Get GPIO and check it has ADC capabilities.
         pin = machine_pin_find(source);
-        channel = pin->id;
         bool valid_adc_pin = false;
         #if MICROPY_HW_ADC_EXT_COUNT
         is_ext = pin->is_ext;
@@ -92,7 +92,7 @@ STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args
         } else
         #endif
         {
-            valid_adc_pin = ADC_IS_VALID_GPIO(channel);
+            valid_adc_pin = ADC_IS_VALID_GPIO(pin->id);
         }
         if (!valid_adc_pin) {
             mp_raise_ValueError(MP_ERROR_TEXT("Pin doesn't have ADC capabilities"));
@@ -104,16 +104,18 @@ STATIC mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args
         adc_init();
     }
 
-    if (is_ext) {
-        #if MICROPY_HW_ADC_EXT_COUNT
-        // Note external pins are mutable.
-        machine_pin_ext_config((machine_pin_obj_t *)pin, MACHINE_PIN_MODE_ANALOG, 0);
-        channel = machine_pin_ext_to_adc_channel(pin);
-        #endif
-    } else if (ADC_IS_VALID_GPIO(channel)) {
-        // Configure the GPIO pin in ADC mode.
-        adc_gpio_init(channel);
-        channel = ADC_CHANNEL_FROM_GPIO(channel);
+    if (pin) {
+        if (is_ext) {
+            #if MICROPY_HW_ADC_EXT_COUNT
+            // Note external pins are mutable.
+            machine_pin_ext_config((machine_pin_obj_t *)pin, MACHINE_PIN_MODE_ANALOG, 0);
+            channel = machine_pin_ext_to_adc_channel(pin);
+            #endif
+        } else {
+            // Configure the GPIO pin in ADC mode.
+            adc_gpio_init(pin->id);
+            channel = ADC_CHANNEL_FROM_GPIO(pin->id);
+        }
     } else if (channel == ADC_CHANNEL_TEMPSENSOR) {
         // Enable temperature sensor.
         adc_set_temp_sensor_enabled(1);

From 8c432ea2d437255eefb4aff18764936ad11b70c7 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Tue, 31 Oct 2023 16:42:10 +1100
Subject: [PATCH 118/310] rp2: Remove 1ms timeout to make idle waiting
 tickless.

The main motivation for doing this was to reduce the latency when the
system is woken by a USB interrupt.  The best_effort_wfe_or_timeout()
function calls into the pico-sdk dynamic timer framework which sets up a
new dynamic timer instance each time, and then has to tear it down before
continuing after a WFE.

Testing Python interrupt latency, it seems to be improved by about 12us
(from average of 46us to 34us running a Pin IRQ).  C-based "scheduled
nodes" should see even lower latency.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/rp2/modmachine.c   | 2 +-
 ports/rp2/mpconfigport.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 29a8dbed2c..4c428cbddf 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -111,7 +111,7 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
 
 STATIC mp_obj_t machine_idle(void) {
-    best_effort_wfe_or_timeout(make_timeout_time_ms(1));
+    __wfe();
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index 0a63312734..84a961db43 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -274,7 +274,7 @@ extern void mp_thread_end_atomic_section(uint32_t);
 #define MICROPY_EVENT_POLL_HOOK \
     do { \
         MICROPY_EVENT_POLL_HOOK_FAST; \
-        best_effort_wfe_or_timeout(make_timeout_time_ms(1)); \
+        __wfe(); \
     } while (0);
 
 #define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((mp_uint_t)(p) | 1))

From 841422817e069087df9d10d37bd8896a51f2f356 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Fri, 3 Nov 2023 18:43:58 +1100
Subject: [PATCH 119/310] stm32/boards/make-pins.py: Fix H7 ADC generation.

Fixes are:
- Only emit ADC table entries for pins that aren't cpu-hidden
  (i.e. ignore `X,-Y` rows).
- Only use the P channels on H7.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/boards/make-pins.py | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py
index 31e7bdb0e2..9f9950ff17 100755
--- a/ports/stm32/boards/make-pins.py
+++ b/ports/stm32/boards/make-pins.py
@@ -135,7 +135,11 @@ class Stm32Pin(boardgen.Pin):
                     "Invalid adc '{:s}' for pin '{:s}'".format(adc_name, self.name())
                 )
             adc_units = [int(x) for x in m.group(1)]
-            _adc_mode = m.group(2)
+            adc_mode = m.group(2)
+            if adc_mode == "INN":
+                # On H7 we have INN/INP, all other parts use IN only. Only use
+                # IN or INP channels.
+                continue
             adc_channel = int(m.group(3))
 
             # Pick the entry with the most ADC units, e.g. "ADC1_INP16/ADC12_INN1/ADC12_INP0" --> "ADC12_INN1".
@@ -247,6 +251,8 @@ class Stm32PinGenerator(boardgen.PinGenerator):
             )
             # Don't include pins that weren't in pins.csv.
             for pin in self.available_pins():
+                if pin._hidden:
+                    continue
                 if adc_unit in pin._adc_units:
                     print(
                         "    [{:d}] = {:s},".format(pin._adc_channel, self._cpu_pin_pointer(pin)),

From c028f956fc0fc93f1ca00950203693d4c59254e4 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Sat, 4 Nov 2023 09:00:33 +1100
Subject: [PATCH 120/310] stm32/boards/stm32f4x9_af.csv: Fix DCMI_VSYNC.

This incorrectly had a `(1)` on the end.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/boards/stm32f429_af.csv | 340 ++++++++++++++--------------
 ports/stm32/boards/stm32f439_af.csv | 340 ++++++++++++++--------------
 2 files changed, 340 insertions(+), 340 deletions(-)

diff --git a/ports/stm32/boards/stm32f429_af.csv b/ports/stm32/boards/stm32f429_af.csv
index e9cf2880b4..afa3250e11 100644
--- a/ports/stm32/boards/stm32f429_af.csv
+++ b/ports/stm32/boards/stm32f429_af.csv
@@ -1,170 +1,170 @@
-Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5              ,AF6              ,AF7            ,AF8               ,AF9                   ,AF10           ,AF11                           ,AF12              ,AF13         ,AF14     ,AF15    ,ADC
-     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/2/3/4/5/6   ,SPI2/3/SAI1      ,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH                            ,FMC/SDIO/OTG2_FS  ,DCMI         ,LCD      ,SYS     ,
-PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                 ,                 ,USART2_CTS     ,UART4_TX          ,                      ,               ,ETH_MII_CRS                    ,                  ,             ,         ,EVENTOUT,
-PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                 ,                 ,USART2_RTS     ,UART4_RX          ,                      ,               ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                  ,             ,         ,EVENTOUT,ADC123_IN1
-PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,ETH_MDIO                       ,                  ,             ,         ,EVENTOUT,ADC123_IN2
-PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                 ,                 ,USART2_RX      ,                  ,                      ,OTG_HS_ULPI_D0 ,ETH_MII_COL                    ,                  ,             ,LCD_B5   ,EVENTOUT,ADC123_IN3
-PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK      ,                  ,                      ,               ,                               ,OTG_HS_SOF        ,DCMI_HSYNC   ,LCD_VSYNC,EVENTOUT,ADC12_IN4
-PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK         ,                 ,               ,                  ,                      ,OTG_HS_ULPI_CK ,                               ,                  ,             ,         ,EVENTOUT,ADC12_IN5
-PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO        ,                 ,               ,                  ,TIM13_CH1             ,               ,                               ,                  ,DCMI_PIXCLK  ,LCD_G2   ,EVENTOUT,ADC12_IN6
-PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI        ,                 ,               ,                  ,TIM14_CH1             ,               ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,                  ,             ,         ,EVENTOUT,ADC12_IN7
-PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                 ,                 ,USART1_CK      ,                  ,                      ,OTG_FS_SOF     ,                               ,                  ,             ,LCD_R6   ,EVENTOUT,
-PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,                 ,                 ,USART1_TX      ,                  ,                      ,               ,                               ,                  ,DCMI_D0      ,         ,EVENTOUT,
-PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                 ,                 ,USART1_RX      ,                  ,                      ,OTG_FS_ID      ,                               ,                  ,DCMI_D1      ,         ,EVENTOUT,
-PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                 ,                 ,USART1_CTS     ,                  ,CAN1_RX               ,OTG_FS_DM      ,                               ,                  ,             ,LCD_R4   ,EVENTOUT,
-PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,USART1_RTS     ,                  ,CAN1_TX               ,OTG_FS_DP      ,                               ,                  ,             ,LCD_R5   ,EVENTOUT,
-PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,LCD_R3                ,OTG_HS_ULPI_D1 ,ETH_MII_RXD2                   ,                  ,             ,         ,EVENTOUT,ADC12_IN8
-PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,LCD_R6                ,OTG_HS_ULPI_D2 ,ETH_MII_RXD3                   ,                  ,             ,         ,EVENTOUT,ADC12_IN9
-PortB,PB2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO        ,SPI3_MISO        ,I2S3ext_SD     ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,               ,                  ,CAN2_RX               ,OTG_HS_ULPI_D7 ,ETH_PPS_OUT                    ,FMC_SDCKE1        ,DCMI_D10     ,         ,EVENTOUT,
-PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                 ,                 ,USART1_TX      ,                  ,CAN2_TX               ,               ,                               ,FMC_SDNE1         ,DCMI_D5      ,         ,EVENTOUT,
-PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                 ,                 ,USART1_RX      ,                  ,                      ,               ,                               ,FMC_NL            ,DCMI_VSYNC   ,         ,EVENTOUT,
-PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,ETH_MII_TXD3                   ,SDIO_D4           ,DCMI_D6      ,LCD_B6   ,EVENTOUT,
-PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,SDIO_D5           ,DCMI_D7      ,LCD_B7   ,EVENTOUT,
-PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX      ,                  ,                      ,OTG_HS_ULPI_D3 ,ETH_MII_RX_ER                  ,                  ,             ,LCD_G4   ,EVENTOUT,
-PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                 ,                 ,USART3_RX      ,                  ,                      ,OTG_HS_ULPI_D4 ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,             ,LCD_G5   ,EVENTOUT,
-PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK      ,                  ,CAN2_RX               ,OTG_HS_ULPI_D5 ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID         ,             ,         ,EVENTOUT,
-PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS     ,                  ,CAN2_TX               ,OTG_HS_ULPI_D6 ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                  ,             ,         ,EVENTOUT,
-PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO        ,I2S2ext_SD       ,USART3_RTS     ,                  ,TIM12_CH1             ,               ,                               ,OTG_HS_DM         ,             ,         ,EVENTOUT,
-PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,OTG_HS_DP         ,             ,         ,EVENTOUT,
-PortC,PC0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_STP,                               ,FMC_SDNWE         ,             ,         ,EVENTOUT,ADC123_IN10
-PortC,PC1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MDC                        ,                  ,             ,         ,EVENTOUT,ADC123_IN11
-PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,OTG_HS_ULPI_DIR,ETH_MII_TXD2                   ,FMC_SDNE0         ,             ,         ,EVENTOUT,ADC123_IN12
-PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK                 ,FMC_SDCKE0        ,             ,         ,EVENTOUT,ADC123_IN13
-PortC,PC4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD0/ETH_RMII_RXD0     ,                  ,             ,         ,EVENTOUT,ADC12_IN14
-PortC,PC5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD1/ETH_RMII_RXD1     ,                  ,             ,         ,EVENTOUT,ADC12_IN15
-PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK         ,                 ,               ,USART6_TX         ,                      ,               ,                               ,SDIO_D6           ,DCMI_D0      ,LCD_HSYNC,EVENTOUT,
-PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                 ,I2S3_MCK         ,               ,USART6_RX         ,                      ,               ,                               ,SDIO_D7           ,DCMI_D1      ,LCD_G6   ,EVENTOUT,
-PortC,PC8 ,             ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,SDIO_D0           ,DCMI_D2      ,         ,EVENTOUT,
-PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN         ,                 ,               ,                  ,                      ,               ,                               ,SDIO_D1           ,DCMI_D3      ,         ,EVENTOUT,
-PortC,PC10,             ,                 ,        ,            ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX      ,UART4_TX          ,                      ,               ,                               ,SDIO_D2           ,DCMI_D8      ,LCD_R2   ,EVENTOUT,
-PortC,PC11,             ,                 ,        ,            ,         ,I2S3ext_SD       ,SPI3_MISO        ,USART3_RX      ,UART4_RX          ,                      ,               ,                               ,SDIO_D3           ,DCMI_D4      ,         ,EVENTOUT,
-PortC,PC12,             ,                 ,        ,            ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK      ,UART5_TX          ,                      ,               ,                               ,SDIO_CK           ,DCMI_D9      ,         ,EVENTOUT,
-PortC,PC13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortC,PC14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortC,PC15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortD,PD0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D2            ,             ,         ,EVENTOUT,
-PortD,PD1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D3            ,             ,         ,EVENTOUT,
-PortD,PD2 ,             ,                 ,TIM3_ETR,            ,         ,                 ,                 ,               ,UART5_RX          ,                      ,               ,                               ,SDIO_CMD          ,DCMI_D11     ,         ,EVENTOUT,
-PortD,PD3 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS     ,                  ,                      ,               ,                               ,FMC_CLK           ,DCMI_D5      ,LCD_G7   ,EVENTOUT,
-PortD,PD4 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_RTS     ,                  ,                      ,               ,                               ,FMC_NOE           ,             ,         ,EVENTOUT,
-PortD,PD5 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,                               ,FMC_NWE           ,             ,         ,EVENTOUT,
-PortD,PD6 ,             ,                 ,        ,            ,         ,SPI3_MOSI/I2S3_SD,SAI1_SD_A        ,USART2_RX      ,                  ,                      ,               ,                               ,FMC_NWAIT         ,DCMI_D10     ,LCD_B2   ,EVENTOUT,
-PortD,PD7 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_CK      ,                  ,                      ,               ,                               ,FMC_NE1/FMC_NCE2  ,             ,         ,EVENTOUT,
-PortD,PD8 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_TX      ,                  ,                      ,               ,                               ,FMC_D13           ,             ,         ,EVENTOUT,
-PortD,PD9 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_RX      ,                  ,                      ,               ,                               ,FMC_D14           ,             ,         ,EVENTOUT,
-PortD,PD10,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CK      ,                  ,                      ,               ,                               ,FMC_D15           ,             ,LCD_B3   ,EVENTOUT,
-PortD,PD11,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CTS     ,                  ,                      ,               ,                               ,FMC_A16           ,             ,         ,EVENTOUT,
-PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                 ,                 ,USART3_RTS     ,                  ,                      ,               ,                               ,FMC_A17           ,             ,         ,EVENTOUT,
-PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A18           ,             ,         ,EVENTOUT,
-PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D0            ,             ,         ,EVENTOUT,
-PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D1            ,             ,         ,EVENTOUT,
-PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                 ,                 ,               ,UART8_RX          ,                      ,               ,                               ,FMC_NBL0          ,DCMI_D2      ,         ,EVENTOUT,
-PortE,PE1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,UART8_TX          ,                      ,               ,                               ,FMC_NBL1          ,DCMI_D3      ,         ,EVENTOUT,
-PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,SPI4_SCK         ,SAI1_MCLK_A      ,               ,                  ,                      ,               ,ETH_MII_TXD3                   ,FMC_A23           ,             ,         ,EVENTOUT,
-PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                 ,SAI1_SD_B        ,               ,                  ,                      ,               ,                               ,FMC_A19           ,             ,         ,EVENTOUT,
-PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,SPI4_NSS         ,SAI1_FS_A        ,               ,                  ,                      ,               ,                               ,FMC_A20           ,DCMI_D4      ,LCD_B0   ,EVENTOUT,
-PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,SPI4_MISO        ,SAI1_SCK_A       ,               ,                  ,                      ,               ,                               ,FMC_A21           ,DCMI_D6      ,LCD_G0   ,EVENTOUT,
-PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,SPI4_MOSI        ,SAI1_SD_A        ,               ,                  ,                      ,               ,                               ,FMC_A22           ,DCMI_D7      ,LCD_G1   ,EVENTOUT,
-PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,               ,UART7_RX          ,                      ,               ,                               ,FMC_D4            ,             ,         ,EVENTOUT,
-PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                 ,                 ,               ,UART7_TX          ,                      ,               ,                               ,FMC_D5            ,             ,         ,EVENTOUT,
-PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D6            ,             ,         ,EVENTOUT,
-PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D7            ,             ,         ,EVENTOUT,
-PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,SPI4_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_D8            ,             ,LCD_G3   ,EVENTOUT,
-PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,SPI4_SCK         ,                 ,               ,                  ,                      ,               ,                               ,FMC_D9            ,             ,LCD_B4   ,EVENTOUT,
-PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,SPI4_MISO        ,                 ,               ,                  ,                      ,               ,                               ,FMC_D10           ,             ,LCD_DE   ,EVENTOUT,
-PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,SPI4_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_D11           ,             ,LCD_CLK  ,EVENTOUT,
-PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D12           ,             ,LCD_R7   ,EVENTOUT,
-PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A0            ,             ,         ,EVENTOUT,
-PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A1            ,             ,         ,EVENTOUT,
-PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A2            ,             ,         ,EVENTOUT,
-PortF,PF3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A3            ,             ,         ,EVENTOUT,ADC3_IN9
-PortF,PF4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A4            ,             ,         ,EVENTOUT,ADC3_IN14
-PortF,PF5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A5            ,             ,         ,EVENTOUT,ADC3_IN15
-PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,SPI5_NSS         ,SAI1_SD_B        ,               ,UART7_RX          ,                      ,               ,                               ,FMC_NIORD         ,             ,         ,EVENTOUT,ADC3_IN4
-PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,SPI5_SCK         ,SAI1_MCLK_B      ,               ,UART7_TX          ,                      ,               ,                               ,FMC_NREG          ,             ,         ,EVENTOUT,ADC3_IN5
-PortF,PF8 ,             ,                 ,        ,            ,         ,SPI5_MISO        ,SAI1_SCK_B       ,               ,                  ,TIM13_CH1             ,               ,                               ,FMC_NIOWR         ,             ,         ,EVENTOUT,ADC3_IN6
-PortF,PF9 ,             ,                 ,        ,            ,         ,SPI5_MOSI        ,SAI1_FS_B        ,               ,                  ,TIM14_CH1             ,               ,                               ,FMC_CD            ,             ,         ,EVENTOUT,ADC3_IN7
-PortF,PF10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INTR          ,DCMI_D11     ,LCD_DE   ,EVENTOUT,ADC3_IN8
-PortF,PF11,             ,                 ,        ,            ,         ,SPI5_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNRAS        ,DCMI_D12     ,         ,EVENTOUT,
-PortF,PF12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A6            ,             ,         ,EVENTOUT,
-PortF,PF13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A7            ,             ,         ,EVENTOUT,
-PortF,PF14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A8            ,             ,         ,EVENTOUT,
-PortF,PF15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A9            ,             ,         ,EVENTOUT,
-PortG,PG0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A10           ,             ,         ,EVENTOUT,
-PortG,PG1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A11           ,             ,         ,EVENTOUT,
-PortG,PG2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A12           ,             ,         ,EVENTOUT,
-PortG,PG3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A13           ,             ,         ,EVENTOUT,
-PortG,PG4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A14/FMC_BA0   ,             ,         ,EVENTOUT,
-PortG,PG5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A15/FMC_BA1   ,             ,         ,EVENTOUT,
-PortG,PG6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INT2          ,DCMI_D12     ,LCD_R7   ,EVENTOUT,
-PortG,PG7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,FMC_INT3          ,DCMI_D13     ,LCD_CLK  ,EVENTOUT,
-PortG,PG8 ,             ,                 ,        ,            ,         ,SPI6_NSS         ,                 ,               ,USART6_RTS        ,                      ,               ,ETH_PPS_OUT                    ,FMC_SDCLK         ,             ,         ,EVENTOUT,
-PortG,PG9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_RX         ,                      ,               ,                               ,FMC_NE2/FMC_NCE3  ,DCMI_VSYNC(1),         ,EVENTOUT,
-PortG,PG10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,LCD_G3                ,               ,                               ,FMC_NCE4_1/FMC_NE3,DCMI_D2      ,LCD_B2   ,EVENTOUT,
-PortG,PG11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,FMC_NCE4_2        ,DCMI_D3      ,LCD_B3   ,EVENTOUT,
-PortG,PG12,             ,                 ,        ,            ,         ,SPI6_MISO        ,                 ,               ,USART6_RTS        ,LCD_B4                ,               ,                               ,FMC_NE4           ,             ,LCD_B1   ,EVENTOUT,
-PortG,PG13,             ,                 ,        ,            ,         ,SPI6_SCK         ,                 ,               ,USART6_CTS        ,                      ,               ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24           ,             ,         ,EVENTOUT,
-PortG,PG14,             ,                 ,        ,            ,         ,SPI6_MOSI        ,                 ,               ,USART6_TX         ,                      ,               ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25           ,             ,         ,EVENTOUT,
-PortG,PG15,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CTS        ,                      ,               ,                               ,FMC_SDNCAS        ,DCMI_D13     ,         ,EVENTOUT,
-PortH,PH0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortH,PH1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortH,PH2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_CRS                    ,FMC_SDCKE0        ,             ,LCD_R0   ,EVENTOUT,
-PortH,PH3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_COL                    ,FMC_SDNE0         ,             ,LCD_R1   ,EVENTOUT,
-PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,                               ,                  ,             ,         ,EVENTOUT,
-PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,SPI5_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNWE         ,             ,         ,EVENTOUT,
-PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,SPI5_SCK         ,                 ,               ,                  ,TIM12_CH1             ,               ,                               ,FMC_SDNE1         ,DCMI_D8      ,         ,        ,
-PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,SPI5_MISO        ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD3                   ,FMC_SDCKE1        ,DCMI_D9      ,         ,        ,
-PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D16           ,DCMI_HSYNC   ,LCD_R2   ,EVENTOUT,
-PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                 ,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,FMC_D17           ,DCMI_D0      ,LCD_R3   ,EVENTOUT,
-PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D18           ,DCMI_D1      ,LCD_R4   ,EVENTOUT,
-PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D19           ,DCMI_D2      ,LCD_R5   ,EVENTOUT,
-PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D20           ,DCMI_D3      ,LCD_R6   ,EVENTOUT,
-PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D21           ,             ,LCD_G2   ,EVENTOUT,
-PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D22           ,DCMI_D4      ,LCD_G3   ,EVENTOUT,
-PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D23           ,DCMI_D11     ,LCD_G4   ,EVENTOUT,
-PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,                      ,               ,                               ,FMC_D24           ,DCMI_D13     ,LCD_G5   ,EVENTOUT,
-PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,               ,                  ,                      ,               ,                               ,FMC_D25           ,DCMI_D8      ,LCD_G6   ,EVENTOUT,
-PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,               ,                               ,FMC_D26           ,DCMI_D9      ,LCD_G7   ,EVENTOUT,
-PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,               ,                               ,FMC_D27           ,DCMI_D10     ,         ,EVENTOUT,
-PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL2          ,DCMI_D5      ,LCD_B4   ,EVENTOUT,
-PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL3          ,DCMI_VSYNC   ,LCD_B5   ,EVENTOUT,
-PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D28           ,DCMI_D6      ,LCD_B6   ,EVENTOUT,
-PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D29           ,DCMI_D7      ,LCD_B7   ,EVENTOUT,
-PortI,PI8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortI,PI9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D30           ,             ,LCD_VSYNC,EVENTOUT,
-PortI,PI10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RX_ER                  ,FMC_D31           ,             ,LCD_HSYNC,EVENTOUT,
-PortI,PI11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_DIR,                               ,                  ,             ,         ,EVENTOUT,
-PortI,PI12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_HSYNC,EVENTOUT,
-PortI,PI13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_VSYNC,EVENTOUT,
-PortI,PI14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_CLK  ,EVENTOUT,
-PortI,PI15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R0   ,EVENTOUT,
-PortJ,PJ0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R1   ,EVENTOUT,
-PortJ,PJ1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R2   ,EVENTOUT,
-PortJ,PJ2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R3   ,EVENTOUT,
-PortJ,PJ3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R4   ,EVENTOUT,
-PortJ,PJ4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R5   ,EVENTOUT,
-PortJ,PJ5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R6   ,EVENTOUT,
-PortJ,PJ6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R7   ,EVENTOUT,
-PortJ,PJ7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G0   ,EVENTOUT,
-PortJ,PJ8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G1   ,EVENTOUT,
-PortJ,PJ9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G2   ,EVENTOUT,
-PortJ,PJ10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G3   ,EVENTOUT,
-PortJ,PJ11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G4   ,EVENTOUT,
-PortJ,PJ12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B0   ,EVENTOUT,
-PortJ,PJ13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B1   ,EVENTOUT,
-PortJ,PJ14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B2   ,EVENTOUT,
-PortJ,PJ15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B3   ,EVENTOUT,
-PortK,PK0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G5   ,EVENTOUT,
-PortK,PK1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G6   ,EVENTOUT,
-PortK,PK2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G7   ,EVENTOUT,
-PortK,PK3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B4   ,EVENTOUT,
-PortK,PK4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B5   ,EVENTOUT,
-PortK,PK5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B6   ,EVENTOUT,
-PortK,PK6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B7   ,EVENTOUT,
-PortK,PK7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_DE   ,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5              ,AF6              ,AF7            ,AF8               ,AF9                   ,AF10           ,AF11                           ,AF12              ,AF13       ,AF14     ,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/2/3/4/5/6   ,SPI2/3/SAI1      ,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH                            ,FMC/SDIO/OTG2_FS  ,DCMI       ,LCD      ,SYS     ,
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                 ,                 ,USART2_CTS     ,UART4_TX          ,                      ,               ,ETH_MII_CRS                    ,                  ,           ,         ,EVENTOUT,
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                 ,                 ,USART2_RTS     ,UART4_RX          ,                      ,               ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                  ,           ,         ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,ETH_MDIO                       ,                  ,           ,         ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                 ,                 ,USART2_RX      ,                  ,                      ,OTG_HS_ULPI_D0 ,ETH_MII_COL                    ,                  ,           ,LCD_B5   ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK      ,                  ,                      ,               ,                               ,OTG_HS_SOF        ,DCMI_HSYNC ,LCD_VSYNC,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK         ,                 ,               ,                  ,                      ,OTG_HS_ULPI_CK ,                               ,                  ,           ,         ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO        ,                 ,               ,                  ,TIM13_CH1             ,               ,                               ,                  ,DCMI_PIXCLK,LCD_G2   ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI        ,                 ,               ,                  ,TIM14_CH1             ,               ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,                  ,           ,         ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                 ,                 ,USART1_CK      ,                  ,                      ,OTG_FS_SOF     ,                               ,                  ,           ,LCD_R6   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,                 ,                 ,USART1_TX      ,                  ,                      ,               ,                               ,                  ,DCMI_D0    ,         ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                 ,                 ,USART1_RX      ,                  ,                      ,OTG_FS_ID      ,                               ,                  ,DCMI_D1    ,         ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                 ,                 ,USART1_CTS     ,                  ,CAN1_RX               ,OTG_FS_DM      ,                               ,                  ,           ,LCD_R4   ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,USART1_RTS     ,                  ,CAN1_TX               ,OTG_FS_DP      ,                               ,                  ,           ,LCD_R5   ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,LCD_R3                ,OTG_HS_ULPI_D1 ,ETH_MII_RXD2                   ,                  ,           ,         ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,LCD_R6                ,OTG_HS_ULPI_D2 ,ETH_MII_RXD3                   ,                  ,           ,         ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO        ,SPI3_MISO        ,I2S3ext_SD     ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,               ,                  ,CAN2_RX               ,OTG_HS_ULPI_D7 ,ETH_PPS_OUT                    ,FMC_SDCKE1        ,DCMI_D10   ,         ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                 ,                 ,USART1_TX      ,                  ,CAN2_TX               ,               ,                               ,FMC_SDNE1         ,DCMI_D5    ,         ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                 ,                 ,USART1_RX      ,                  ,                      ,               ,                               ,FMC_NL            ,DCMI_VSYNC ,         ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,ETH_MII_TXD3                   ,SDIO_D4           ,DCMI_D6    ,LCD_B6   ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,SDIO_D5           ,DCMI_D7    ,LCD_B7   ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX      ,                  ,                      ,OTG_HS_ULPI_D3 ,ETH_MII_RX_ER                  ,                  ,           ,LCD_G4   ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                 ,                 ,USART3_RX      ,                  ,                      ,OTG_HS_ULPI_D4 ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,           ,LCD_G5   ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK      ,                  ,CAN2_RX               ,OTG_HS_ULPI_D5 ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID         ,           ,         ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS     ,                  ,CAN2_TX               ,OTG_HS_ULPI_D6 ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                  ,           ,         ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO        ,I2S2ext_SD       ,USART3_RTS     ,                  ,TIM12_CH1             ,               ,                               ,OTG_HS_DM         ,           ,         ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,OTG_HS_DP         ,           ,         ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_STP,                               ,FMC_SDNWE         ,           ,         ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MDC                        ,                  ,           ,         ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,OTG_HS_ULPI_DIR,ETH_MII_TXD2                   ,FMC_SDNE0         ,           ,         ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK                 ,FMC_SDCKE0        ,           ,         ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD0/ETH_RMII_RXD0     ,                  ,           ,         ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD1/ETH_RMII_RXD1     ,                  ,           ,         ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK         ,                 ,               ,USART6_TX         ,                      ,               ,                               ,SDIO_D6           ,DCMI_D0    ,LCD_HSYNC,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                 ,I2S3_MCK         ,               ,USART6_RX         ,                      ,               ,                               ,SDIO_D7           ,DCMI_D1    ,LCD_G6   ,EVENTOUT,
+PortC,PC8 ,             ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,SDIO_D0           ,DCMI_D2    ,         ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN         ,                 ,               ,                  ,                      ,               ,                               ,SDIO_D1           ,DCMI_D3    ,         ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,            ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX      ,UART4_TX          ,                      ,               ,                               ,SDIO_D2           ,DCMI_D8    ,LCD_R2   ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,            ,         ,I2S3ext_SD       ,SPI3_MISO        ,USART3_RX      ,UART4_RX          ,                      ,               ,                               ,SDIO_D3           ,DCMI_D4    ,         ,EVENTOUT,
+PortC,PC12,             ,                 ,        ,            ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK      ,UART5_TX          ,                      ,               ,                               ,SDIO_CK           ,DCMI_D9    ,         ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D2            ,           ,         ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D3            ,           ,         ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR,            ,         ,                 ,                 ,               ,UART5_RX          ,                      ,               ,                               ,SDIO_CMD          ,DCMI_D11   ,         ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS     ,                  ,                      ,               ,                               ,FMC_CLK           ,DCMI_D5    ,LCD_G7   ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_RTS     ,                  ,                      ,               ,                               ,FMC_NOE           ,           ,         ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,                               ,FMC_NWE           ,           ,         ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,            ,         ,SPI3_MOSI/I2S3_SD,SAI1_SD_A        ,USART2_RX      ,                  ,                      ,               ,                               ,FMC_NWAIT         ,DCMI_D10   ,LCD_B2   ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_CK      ,                  ,                      ,               ,                               ,FMC_NE1/FMC_NCE2  ,           ,         ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_TX      ,                  ,                      ,               ,                               ,FMC_D13           ,           ,         ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_RX      ,                  ,                      ,               ,                               ,FMC_D14           ,           ,         ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CK      ,                  ,                      ,               ,                               ,FMC_D15           ,           ,LCD_B3   ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CTS     ,                  ,                      ,               ,                               ,FMC_A16           ,           ,         ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                 ,                 ,USART3_RTS     ,                  ,                      ,               ,                               ,FMC_A17           ,           ,         ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A18           ,           ,         ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D0            ,           ,         ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D1            ,           ,         ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                 ,                 ,               ,UART8_RX          ,                      ,               ,                               ,FMC_NBL0          ,DCMI_D2    ,         ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,UART8_TX          ,                      ,               ,                               ,FMC_NBL1          ,DCMI_D3    ,         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,SPI4_SCK         ,SAI1_MCLK_A      ,               ,                  ,                      ,               ,ETH_MII_TXD3                   ,FMC_A23           ,           ,         ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                 ,SAI1_SD_B        ,               ,                  ,                      ,               ,                               ,FMC_A19           ,           ,         ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,SPI4_NSS         ,SAI1_FS_A        ,               ,                  ,                      ,               ,                               ,FMC_A20           ,DCMI_D4    ,LCD_B0   ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,SPI4_MISO        ,SAI1_SCK_A       ,               ,                  ,                      ,               ,                               ,FMC_A21           ,DCMI_D6    ,LCD_G0   ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,SPI4_MOSI        ,SAI1_SD_A        ,               ,                  ,                      ,               ,                               ,FMC_A22           ,DCMI_D7    ,LCD_G1   ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,               ,UART7_RX          ,                      ,               ,                               ,FMC_D4            ,           ,         ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                 ,                 ,               ,UART7_TX          ,                      ,               ,                               ,FMC_D5            ,           ,         ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D6            ,           ,         ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D7            ,           ,         ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,SPI4_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_D8            ,           ,LCD_G3   ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,SPI4_SCK         ,                 ,               ,                  ,                      ,               ,                               ,FMC_D9            ,           ,LCD_B4   ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,SPI4_MISO        ,                 ,               ,                  ,                      ,               ,                               ,FMC_D10           ,           ,LCD_DE   ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,SPI4_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_D11           ,           ,LCD_CLK  ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D12           ,           ,LCD_R7   ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A0            ,           ,         ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A1            ,           ,         ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A2            ,           ,         ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A3            ,           ,         ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A4            ,           ,         ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A5            ,           ,         ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,SPI5_NSS         ,SAI1_SD_B        ,               ,UART7_RX          ,                      ,               ,                               ,FMC_NIORD         ,           ,         ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,SPI5_SCK         ,SAI1_MCLK_B      ,               ,UART7_TX          ,                      ,               ,                               ,FMC_NREG          ,           ,         ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,            ,         ,SPI5_MISO        ,SAI1_SCK_B       ,               ,                  ,TIM13_CH1             ,               ,                               ,FMC_NIOWR         ,           ,         ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,            ,         ,SPI5_MOSI        ,SAI1_FS_B        ,               ,                  ,TIM14_CH1             ,               ,                               ,FMC_CD            ,           ,         ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INTR          ,DCMI_D11   ,LCD_DE   ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,            ,         ,SPI5_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNRAS        ,DCMI_D12   ,         ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A6            ,           ,         ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A7            ,           ,         ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A8            ,           ,         ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A9            ,           ,         ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A10           ,           ,         ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A11           ,           ,         ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A12           ,           ,         ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A13           ,           ,         ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A14/FMC_BA0   ,           ,         ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A15/FMC_BA1   ,           ,         ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INT2          ,DCMI_D12   ,LCD_R7   ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,FMC_INT3          ,DCMI_D13   ,LCD_CLK  ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,            ,         ,SPI6_NSS         ,                 ,               ,USART6_RTS        ,                      ,               ,ETH_PPS_OUT                    ,FMC_SDCLK         ,           ,         ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_RX         ,                      ,               ,                               ,FMC_NE2/FMC_NCE3  ,DCMI_VSYNC ,         ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,LCD_G3                ,               ,                               ,FMC_NCE4_1/FMC_NE3,DCMI_D2    ,LCD_B2   ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,FMC_NCE4_2        ,DCMI_D3    ,LCD_B3   ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,            ,         ,SPI6_MISO        ,                 ,               ,USART6_RTS        ,LCD_B4                ,               ,                               ,FMC_NE4           ,           ,LCD_B1   ,EVENTOUT,
+PortG,PG13,             ,                 ,        ,            ,         ,SPI6_SCK         ,                 ,               ,USART6_CTS        ,                      ,               ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24           ,           ,         ,EVENTOUT,
+PortG,PG14,             ,                 ,        ,            ,         ,SPI6_MOSI        ,                 ,               ,USART6_TX         ,                      ,               ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25           ,           ,         ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CTS        ,                      ,               ,                               ,FMC_SDNCAS        ,DCMI_D13   ,         ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_CRS                    ,FMC_SDCKE0        ,           ,LCD_R0   ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_COL                    ,FMC_SDNE0         ,           ,LCD_R1   ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,SPI5_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNWE         ,           ,         ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,SPI5_SCK         ,                 ,               ,                  ,TIM12_CH1             ,               ,                               ,FMC_SDNE1         ,DCMI_D8    ,         ,        ,
+PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,SPI5_MISO        ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD3                   ,FMC_SDCKE1        ,DCMI_D9    ,         ,        ,
+PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D16           ,DCMI_HSYNC ,LCD_R2   ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                 ,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,FMC_D17           ,DCMI_D0    ,LCD_R3   ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D18           ,DCMI_D1    ,LCD_R4   ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D19           ,DCMI_D2    ,LCD_R5   ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D20           ,DCMI_D3    ,LCD_R6   ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D21           ,           ,LCD_G2   ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D22           ,DCMI_D4    ,LCD_G3   ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D23           ,DCMI_D11   ,LCD_G4   ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,                      ,               ,                               ,FMC_D24           ,DCMI_D13   ,LCD_G5   ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,               ,                  ,                      ,               ,                               ,FMC_D25           ,DCMI_D8    ,LCD_G6   ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,               ,                               ,FMC_D26           ,DCMI_D9    ,LCD_G7   ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,               ,                               ,FMC_D27           ,DCMI_D10   ,         ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL2          ,DCMI_D5    ,LCD_B4   ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL3          ,DCMI_VSYNC ,LCD_B5   ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D28           ,DCMI_D6    ,LCD_B6   ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D29           ,DCMI_D7    ,LCD_B7   ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D30           ,           ,LCD_VSYNC,EVENTOUT,
+PortI,PI10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RX_ER                  ,FMC_D31           ,           ,LCD_HSYNC,EVENTOUT,
+PortI,PI11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_DIR,                               ,                  ,           ,         ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_HSYNC,EVENTOUT,
+PortI,PI13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_VSYNC,EVENTOUT,
+PortI,PI14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_CLK  ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R0   ,EVENTOUT,
+PortJ,PJ0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R1   ,EVENTOUT,
+PortJ,PJ1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R2   ,EVENTOUT,
+PortJ,PJ2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R3   ,EVENTOUT,
+PortJ,PJ3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R4   ,EVENTOUT,
+PortJ,PJ4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R5   ,EVENTOUT,
+PortJ,PJ5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R6   ,EVENTOUT,
+PortJ,PJ6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R7   ,EVENTOUT,
+PortJ,PJ7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G0   ,EVENTOUT,
+PortJ,PJ8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G1   ,EVENTOUT,
+PortJ,PJ9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G2   ,EVENTOUT,
+PortJ,PJ10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G3   ,EVENTOUT,
+PortJ,PJ11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G4   ,EVENTOUT,
+PortJ,PJ12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B0   ,EVENTOUT,
+PortJ,PJ13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B1   ,EVENTOUT,
+PortJ,PJ14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B2   ,EVENTOUT,
+PortJ,PJ15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B3   ,EVENTOUT,
+PortK,PK0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G5   ,EVENTOUT,
+PortK,PK1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G6   ,EVENTOUT,
+PortK,PK2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G7   ,EVENTOUT,
+PortK,PK3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B4   ,EVENTOUT,
+PortK,PK4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B5   ,EVENTOUT,
+PortK,PK5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B6   ,EVENTOUT,
+PortK,PK6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B7   ,EVENTOUT,
+PortK,PK7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_DE   ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32f439_af.csv b/ports/stm32/boards/stm32f439_af.csv
index 94466c6c1a..f7069fb579 100644
--- a/ports/stm32/boards/stm32f439_af.csv
+++ b/ports/stm32/boards/stm32f439_af.csv
@@ -1,170 +1,170 @@
-Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5              ,AF6              ,AF7            ,AF8               ,AF9                   ,AF10           ,AF11                           ,AF12              ,AF13         ,AF14     ,AF15    ,ADC
-     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/2/3/4/5/6   ,SPI2/3/SAI1      ,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH                            ,FMC/SDIO/OTG2_FS  ,DCMI         ,LCD      ,SYS     ,
-PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                 ,                 ,USART2_CTS     ,UART4_TX          ,                      ,               ,ETH_MII_CRS                    ,                  ,             ,         ,EVENTOUT,ADC123_IN0
-PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                 ,                 ,USART2_RTS     ,UART4_RX          ,                      ,               ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                  ,             ,         ,EVENTOUT,ADC123_IN1
-PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,ETH_MDIO                       ,                  ,             ,         ,EVENTOUT,ADC123_IN2
-PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                 ,                 ,USART2_RX      ,                  ,                      ,OTG_HS_ULPI_D0 ,ETH_MII_COL                    ,                  ,             ,LCD_B5   ,EVENTOUT,ADC123_IN3
-PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK      ,                  ,                      ,               ,                               ,OTG_HS_SOF        ,DCMI_HSYNC   ,LCD_VSYNC,EVENTOUT,ADC12_IN4
-PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK         ,                 ,               ,                  ,                      ,OTG_HS_ULPI_CK ,                               ,                  ,             ,         ,EVENTOUT,ADC12_IN5
-PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO        ,                 ,               ,                  ,TIM13_CH1             ,               ,                               ,                  ,DCMI_PIXCLK  ,LCD_G2   ,EVENTOUT,ADC12_IN6
-PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI        ,                 ,               ,                  ,TIM14_CH1             ,               ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,                  ,             ,         ,EVENTOUT,ADC12_IN7
-PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                 ,                 ,USART1_CK      ,                  ,                      ,OTG_FS_SOF     ,                               ,                  ,             ,LCD_R6   ,EVENTOUT,
-PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,                 ,                 ,USART1_TX      ,                  ,                      ,               ,                               ,                  ,DCMI_D0      ,         ,EVENTOUT,
-PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                 ,                 ,USART1_RX      ,                  ,                      ,OTG_FS_ID      ,                               ,                  ,DCMI_D1      ,         ,EVENTOUT,
-PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                 ,                 ,USART1_CTS     ,                  ,CAN1_RX               ,OTG_FS_DM      ,                               ,                  ,             ,LCD_R4   ,EVENTOUT,
-PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,USART1_RTS     ,                  ,CAN1_TX               ,OTG_FS_DP      ,                               ,                  ,             ,LCD_R5   ,EVENTOUT,
-PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,LCD_R3                ,OTG_HS_ULPI_D1 ,ETH_MII_RXD2                   ,                  ,             ,         ,EVENTOUT,ADC12_IN8
-PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,LCD_R6                ,OTG_HS_ULPI_D2 ,ETH_MII_RXD3                   ,                  ,             ,         ,EVENTOUT,ADC12_IN9
-PortB,PB2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO        ,SPI3_MISO        ,I2S3ext_SD     ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,               ,                  ,CAN2_RX               ,OTG_HS_ULPI_D7 ,ETH_PPS_OUT                    ,FMC_SDCKE1        ,DCMI_D10     ,         ,EVENTOUT,
-PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                 ,                 ,USART1_TX      ,                  ,CAN2_TX               ,               ,                               ,FMC_SDNE1         ,DCMI_D5      ,         ,EVENTOUT,
-PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                 ,                 ,USART1_RX      ,                  ,                      ,               ,                               ,FMC_NL            ,DCMI_VSYNC   ,         ,EVENTOUT,
-PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,ETH_MII_TXD3                   ,SDIO_D4           ,DCMI_D6      ,LCD_B6   ,EVENTOUT,
-PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,SDIO_D5           ,DCMI_D7      ,LCD_B7   ,EVENTOUT,
-PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX      ,                  ,                      ,OTG_HS_ULPI_D3 ,ETH_MII_RX_ER                  ,                  ,             ,LCD_G4   ,EVENTOUT,
-PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                 ,                 ,USART3_RX      ,                  ,                      ,OTG_HS_ULPI_D4 ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,             ,LCD_G5   ,EVENTOUT,
-PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK      ,                  ,CAN2_RX               ,OTG_HS_ULPI_D5 ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID         ,             ,         ,EVENTOUT,
-PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS     ,                  ,CAN2_TX               ,OTG_HS_ULPI_D6 ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                  ,             ,         ,EVENTOUT,
-PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO        ,I2S2ext_SD       ,USART3_RTS     ,                  ,TIM12_CH1             ,               ,                               ,OTG_HS_DM         ,             ,         ,EVENTOUT,
-PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,OTG_HS_DP         ,             ,         ,EVENTOUT,
-PortC,PC0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_STP,                               ,FMC_SDNWE         ,             ,         ,EVENTOUT,ADC123_IN10
-PortC,PC1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MDC                        ,                  ,             ,         ,EVENTOUT,ADC123_IN11
-PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,OTG_HS_ULPI_DIR,ETH_MII_TXD2                   ,FMC_SDNE0         ,             ,         ,EVENTOUT,ADC123_IN12
-PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK                 ,FMC_SDCKE0        ,             ,         ,EVENTOUT,ADC123_IN13
-PortC,PC4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD0/ETH_RMII_RXD0     ,                  ,             ,         ,EVENTOUT,ADC12_IN14
-PortC,PC5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD1/ETH_RMII_RXD1     ,                  ,             ,         ,EVENTOUT,ADC12_IN15
-PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK         ,                 ,               ,USART6_TX         ,                      ,               ,                               ,SDIO_D6           ,DCMI_D0      ,LCD_HSYNC,EVENTOUT,
-PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                 ,I2S3_MCK         ,               ,USART6_RX         ,                      ,               ,                               ,SDIO_D7           ,DCMI_D1      ,LCD_G6   ,EVENTOUT,
-PortC,PC8 ,             ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,SDIO_D0           ,DCMI_D2      ,         ,EVENTOUT,
-PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN         ,                 ,               ,                  ,                      ,               ,                               ,SDIO_D1           ,DCMI_D3      ,         ,EVENTOUT,
-PortC,PC10,             ,                 ,        ,            ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX      ,UART4_TX          ,                      ,               ,                               ,SDIO_D2           ,DCMI_D8      ,LCD_R2   ,EVENTOUT,
-PortC,PC11,             ,                 ,        ,            ,         ,I2S3ext_SD       ,SPI3_MISO        ,USART3_RX      ,UART4_RX          ,                      ,               ,                               ,SDIO_D3           ,DCMI_D4      ,         ,EVENTOUT,
-PortC,PC12,             ,                 ,        ,            ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK      ,UART5_TX          ,                      ,               ,                               ,SDIO_CK           ,DCMI_D9      ,         ,EVENTOUT,
-PortC,PC13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortC,PC14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortC,PC15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortD,PD0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D2            ,             ,         ,EVENTOUT,
-PortD,PD1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D3            ,             ,         ,EVENTOUT,
-PortD,PD2 ,             ,                 ,TIM3_ETR,            ,         ,                 ,                 ,               ,UART5_RX          ,                      ,               ,                               ,SDIO_CMD          ,DCMI_D11     ,         ,EVENTOUT,
-PortD,PD3 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS     ,                  ,                      ,               ,                               ,FMC_CLK           ,DCMI_D5      ,LCD_G7   ,EVENTOUT,
-PortD,PD4 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_RTS     ,                  ,                      ,               ,                               ,FMC_NOE           ,             ,         ,EVENTOUT,
-PortD,PD5 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,                               ,FMC_NWE           ,             ,         ,EVENTOUT,
-PortD,PD6 ,             ,                 ,        ,            ,         ,I2S3_SD          ,SAI1_SD_A        ,USART2_RX      ,                  ,                      ,               ,                               ,FMC_NWAIT         ,DCMI_D10     ,LCD_B2   ,EVENTOUT,
-PortD,PD7 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_CK      ,                  ,                      ,               ,                               ,FMC_NE1/FMC_NCE2  ,             ,         ,EVENTOUT,
-PortD,PD8 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_TX      ,                  ,                      ,               ,                               ,FMC_D13           ,             ,         ,EVENTOUT,
-PortD,PD9 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_RX      ,                  ,                      ,               ,                               ,FMC_D14           ,             ,         ,EVENTOUT,
-PortD,PD10,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CK      ,                  ,                      ,               ,                               ,FMC_D15           ,             ,LCD_B3   ,EVENTOUT,
-PortD,PD11,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CTS     ,                  ,                      ,               ,                               ,FMC_A16           ,             ,         ,EVENTOUT,
-PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                 ,                 ,USART3_RTS     ,                  ,                      ,               ,                               ,FMC_A17           ,             ,         ,EVENTOUT,
-PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A18           ,             ,         ,EVENTOUT,
-PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D0            ,             ,         ,EVENTOUT,
-PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D1            ,             ,         ,EVENTOUT,
-PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                 ,                 ,               ,UART8_RX          ,                      ,               ,                               ,FMC_NBL0          ,DCMI_D2      ,         ,EVENTOUT,
-PortE,PE1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,UART8_TX          ,                      ,               ,                               ,FMC_NBL1          ,DCMI_D3      ,         ,EVENTOUT,
-PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,SPI4_SCK         ,SAI1_MCLK_A      ,               ,                  ,                      ,               ,ETH_MII_TXD3                   ,FMC_A23           ,             ,         ,EVENTOUT,
-PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                 ,SAI1_SD_B        ,               ,                  ,                      ,               ,                               ,FMC_A19           ,             ,         ,EVENTOUT,
-PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,SPI4_NSS         ,SAI1_FS_A        ,               ,                  ,                      ,               ,                               ,FMC_A20           ,DCMI_D4      ,LCD_B0   ,EVENTOUT,
-PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,SPI4_MISO        ,SAI1_SCK_A       ,               ,                  ,                      ,               ,                               ,FMC_A21           ,DCMI_D6      ,LCD_G0   ,EVENTOUT,
-PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,SPI4_MOSI        ,SAI1_SD_A        ,               ,                  ,                      ,               ,                               ,FMC_A22           ,DCMI_D7      ,LCD_G1   ,EVENTOUT,
-PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,               ,UART7_RX          ,                      ,               ,                               ,FMC_D4            ,             ,         ,EVENTOUT,
-PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                 ,                 ,               ,UART7_TX          ,                      ,               ,                               ,FMC_D5            ,             ,         ,EVENTOUT,
-PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D6            ,             ,         ,EVENTOUT,
-PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D7            ,             ,         ,EVENTOUT,
-PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,SPI4_NSS         ,SPI3_NSS         ,               ,                  ,                      ,               ,                               ,FMC_D8            ,             ,LCD_G3   ,EVENTOUT,
-PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,SPI4_SCK         ,SPI3_SCK         ,               ,                  ,                      ,               ,                               ,FMC_D9            ,             ,LCD_B4   ,EVENTOUT,
-PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,SPI4_MISO        ,SPI3_MISO        ,               ,                  ,                      ,               ,                               ,FMC_D10           ,             ,LCD_DE   ,EVENTOUT,
-PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,SPI4_MOSI        ,SP3_MOSI         ,               ,                  ,                      ,               ,                               ,FMC_D11           ,             ,LCD_CLK  ,EVENTOUT,
-PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D12           ,             ,LCD_R7   ,EVENTOUT,
-PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A0            ,             ,         ,EVENTOUT,
-PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A1            ,             ,         ,EVENTOUT,
-PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A2            ,             ,         ,EVENTOUT,
-PortF,PF3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A3            ,             ,         ,EVENTOUT,ADC3_IN9
-PortF,PF4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A4            ,             ,         ,EVENTOUT,ADC3_IN14
-PortF,PF5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A5            ,             ,         ,EVENTOUT,ADC3_IN15
-PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,SPI5_NSS         ,SAI1_SD_B        ,               ,UART7_RX          ,                      ,               ,                               ,FMC_NIORD         ,             ,         ,EVENTOUT,ADC3_IN4
-PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,SPI5_SCK         ,SAI1_MCLK_B      ,               ,UART7_TX          ,                      ,               ,                               ,FMC_NREG          ,             ,         ,EVENTOUT,ADC3_IN5
-PortF,PF8 ,             ,                 ,        ,            ,         ,SPI5_MISO        ,SAI1_SCK_B       ,               ,                  ,TIM13_CH1             ,               ,                               ,FMC_NIOWR         ,             ,         ,EVENTOUT,ADC3_IN6
-PortF,PF9 ,             ,                 ,        ,            ,         ,SPI5_MOSI        ,SAI1_FS_B        ,               ,                  ,TIM14_CH1             ,               ,                               ,FMC_CD            ,             ,         ,EVENTOUT,ADC3_IN7
-PortF,PF10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INTR          ,DCMI_D11     ,LCD_DE   ,EVENTOUT,ADC3_IN8
-PortF,PF11,             ,                 ,        ,            ,         ,SPI5_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNRAS        ,DCMI_D12     ,         ,EVENTOUT,
-PortF,PF12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A6            ,             ,         ,EVENTOUT,
-PortF,PF13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A7            ,             ,         ,EVENTOUT,
-PortF,PF14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A8            ,             ,         ,EVENTOUT,
-PortF,PF15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A9            ,             ,         ,EVENTOUT,
-PortG,PG0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A10           ,             ,         ,EVENTOUT,
-PortG,PG1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A11           ,             ,         ,EVENTOUT,
-PortG,PG2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A12           ,             ,         ,EVENTOUT,
-PortG,PG3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A13           ,             ,         ,EVENTOUT,
-PortG,PG4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A14/FMC_BA0   ,             ,         ,EVENTOUT,
-PortG,PG5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A15/FMC_BA1   ,             ,         ,EVENTOUT,
-PortG,PG6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INT2          ,DCMI_D12     ,LCD_R7   ,EVENTOUT,
-PortG,PG7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,FMC_INT3          ,DCMI_D13     ,LCD_CLK  ,EVENTOUT,
-PortG,PG8 ,             ,                 ,        ,            ,         ,SPI6_NSS         ,                 ,               ,USART6_RTS        ,                      ,               ,ETH_PPS_OUT                    ,FMC_SDCLK         ,             ,         ,EVENTOUT,
-PortG,PG9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_RX         ,                      ,               ,                               ,FMC_NE2/FMC_NCE3  ,DCMI_VSYNC(1),         ,EVENTOUT,
-PortG,PG10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,LCD_G3                ,               ,                               ,FMC_NCE4_1/FMC_NE3,DCMI_D2      ,LCD_B2   ,EVENTOUT,
-PortG,PG11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,FMC_NCE4_2        ,DCMI_D3      ,LCD_B3   ,EVENTOUT,
-PortG,PG12,             ,                 ,        ,            ,         ,SPI6_MISO        ,                 ,               ,USART6_RTS        ,LCD_B4                ,               ,                               ,FMC_NE4           ,             ,LCD_B1   ,EVENTOUT,
-PortG,PG13,             ,                 ,        ,            ,         ,SPI6_SCK         ,                 ,               ,USART6_CTS        ,                      ,               ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24           ,             ,         ,EVENTOUT,
-PortG,PG14,             ,                 ,        ,            ,         ,SPI6_MOSI        ,                 ,               ,USART6_TX         ,                      ,               ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25           ,             ,         ,EVENTOUT,
-PortG,PG15,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CTS        ,                      ,               ,                               ,FMC_SDNCAS        ,DCMI_D13     ,         ,EVENTOUT,
-PortH,PH0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortH,PH1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortH,PH2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_CRS                    ,FMC_SDCKE0        ,             ,LCD_R0   ,EVENTOUT,
-PortH,PH3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_COL                    ,FMC_SDNE0         ,             ,LCD_R1   ,EVENTOUT,
-PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,                               ,                  ,             ,         ,EVENTOUT,
-PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,SPI5_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNWE         ,             ,         ,EVENTOUT,
-PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,SPI5_SCK         ,                 ,               ,                  ,TIM12_CH1             ,               ,                               ,FMC_SDNE1         ,DCMI_D8      ,         ,        ,
-PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,SPI5_MISO        ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD3                   ,FMC_SDCKE1        ,DCMI_D9      ,         ,        ,
-PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D16           ,DCMI_HSYNC   ,LCD_R2   ,EVENTOUT,
-PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                 ,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,FMC_D17           ,DCMI_D0      ,LCD_R3   ,EVENTOUT,
-PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D18           ,DCMI_D1      ,LCD_R4   ,EVENTOUT,
-PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D19           ,DCMI_D2      ,LCD_R5   ,EVENTOUT,
-PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D20           ,DCMI_D3      ,LCD_R6   ,EVENTOUT,
-PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D21           ,             ,LCD_G2   ,EVENTOUT,
-PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D22           ,DCMI_D4      ,LCD_G3   ,EVENTOUT,
-PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D23           ,DCMI_D11     ,LCD_G4   ,EVENTOUT,
-PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,                      ,               ,                               ,FMC_D24           ,DCMI_D13     ,LCD_G5   ,EVENTOUT,
-PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,               ,                  ,                      ,               ,                               ,FMC_D25           ,DCMI_D8      ,LCD_G6   ,EVENTOUT,
-PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,               ,                               ,FMC_D26           ,DCMI_D9      ,LCD_G7   ,EVENTOUT,
-PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,               ,                               ,FMC_D27           ,DCMI_D10     ,         ,EVENTOUT,
-PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL2          ,DCMI_D5      ,LCD_B4   ,EVENTOUT,
-PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL3          ,DCMI_VSYNC   ,LCD_B5   ,EVENTOUT,
-PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D28           ,DCMI_D6      ,LCD_B6   ,EVENTOUT,
-PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D29           ,DCMI_D7      ,LCD_B7   ,EVENTOUT,
-PortI,PI8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,         ,EVENTOUT,
-PortI,PI9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D30           ,             ,LCD_VSYNC,EVENTOUT,
-PortI,PI10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RX_ER                  ,FMC_D31           ,             ,LCD_HSYNC,EVENTOUT,
-PortI,PI11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_DIR,                               ,                  ,             ,         ,EVENTOUT,
-PortI,PI12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_HSYNC,EVENTOUT,
-PortI,PI13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_VSYNC,EVENTOUT,
-PortI,PI14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_CLK  ,EVENTOUT,
-PortI,PI15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R0   ,EVENTOUT,
-PortJ,PJ0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R1   ,EVENTOUT,
-PortJ,PJ1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R2   ,EVENTOUT,
-PortJ,PJ2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R3   ,EVENTOUT,
-PortJ,PJ3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R4   ,EVENTOUT,
-PortJ,PJ4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R5   ,EVENTOUT,
-PortJ,PJ5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R6   ,EVENTOUT,
-PortJ,PJ6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_R7   ,EVENTOUT,
-PortJ,PJ7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G0   ,EVENTOUT,
-PortJ,PJ8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G1   ,EVENTOUT,
-PortJ,PJ9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G2   ,EVENTOUT,
-PortJ,PJ10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G3   ,EVENTOUT,
-PortJ,PJ11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G4   ,EVENTOUT,
-PortJ,PJ12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B0   ,EVENTOUT,
-PortJ,PJ13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B1   ,EVENTOUT,
-PortJ,PJ14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B2   ,EVENTOUT,
-PortJ,PJ15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B3   ,EVENTOUT,
-PortK,PK0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G5   ,EVENTOUT,
-PortK,PK1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G6   ,EVENTOUT,
-PortK,PK2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_G7   ,EVENTOUT,
-PortK,PK3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B4   ,EVENTOUT,
-PortK,PK4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B5   ,EVENTOUT,
-PortK,PK5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B6   ,EVENTOUT,
-PortK,PK6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_B7   ,EVENTOUT,
-PortK,PK7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,             ,LCD_DE   ,EVENTOUT,
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5              ,AF6              ,AF7            ,AF8               ,AF9                   ,AF10           ,AF11                           ,AF12              ,AF13       ,AF14     ,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/2/3/4/5/6   ,SPI2/3/SAI1      ,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH                            ,FMC/SDIO/OTG2_FS  ,DCMI       ,LCD      ,SYS     ,
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                 ,                 ,USART2_CTS     ,UART4_TX          ,                      ,               ,ETH_MII_CRS                    ,                  ,           ,         ,EVENTOUT,ADC123_IN0
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                 ,                 ,USART2_RTS     ,UART4_RX          ,                      ,               ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                  ,           ,         ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,ETH_MDIO                       ,                  ,           ,         ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                 ,                 ,USART2_RX      ,                  ,                      ,OTG_HS_ULPI_D0 ,ETH_MII_COL                    ,                  ,           ,LCD_B5   ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK      ,                  ,                      ,               ,                               ,OTG_HS_SOF        ,DCMI_HSYNC ,LCD_VSYNC,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK         ,                 ,               ,                  ,                      ,OTG_HS_ULPI_CK ,                               ,                  ,           ,         ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO        ,                 ,               ,                  ,TIM13_CH1             ,               ,                               ,                  ,DCMI_PIXCLK,LCD_G2   ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI        ,                 ,               ,                  ,TIM14_CH1             ,               ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,                  ,           ,         ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                 ,                 ,USART1_CK      ,                  ,                      ,OTG_FS_SOF     ,                               ,                  ,           ,LCD_R6   ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,                 ,                 ,USART1_TX      ,                  ,                      ,               ,                               ,                  ,DCMI_D0    ,         ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                 ,                 ,USART1_RX      ,                  ,                      ,OTG_FS_ID      ,                               ,                  ,DCMI_D1    ,         ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                 ,                 ,USART1_CTS     ,                  ,CAN1_RX               ,OTG_FS_DM      ,                               ,                  ,           ,LCD_R4   ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,USART1_RTS     ,                  ,CAN1_TX               ,OTG_FS_DP      ,                               ,                  ,           ,LCD_R5   ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,LCD_R3                ,OTG_HS_ULPI_D1 ,ETH_MII_RXD2                   ,                  ,           ,         ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,LCD_R6                ,OTG_HS_ULPI_D2 ,ETH_MII_RXD3                   ,                  ,           ,         ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO        ,SPI3_MISO        ,I2S3ext_SD     ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,               ,                  ,CAN2_RX               ,OTG_HS_ULPI_D7 ,ETH_PPS_OUT                    ,FMC_SDCKE1        ,DCMI_D10   ,         ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                 ,                 ,USART1_TX      ,                  ,CAN2_TX               ,               ,                               ,FMC_SDNE1         ,DCMI_D5    ,         ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                 ,                 ,USART1_RX      ,                  ,                      ,               ,                               ,FMC_NL            ,DCMI_VSYNC ,         ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,ETH_MII_TXD3                   ,SDIO_D4           ,DCMI_D6    ,LCD_B6   ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,SDIO_D5           ,DCMI_D7    ,LCD_B7   ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX      ,                  ,                      ,OTG_HS_ULPI_D3 ,ETH_MII_RX_ER                  ,                  ,           ,LCD_G4   ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                 ,                 ,USART3_RX      ,                  ,                      ,OTG_HS_ULPI_D4 ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,           ,LCD_G5   ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK      ,                  ,CAN2_RX               ,OTG_HS_ULPI_D5 ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID         ,           ,         ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS     ,                  ,CAN2_TX               ,OTG_HS_ULPI_D6 ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                  ,           ,         ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO        ,I2S2ext_SD       ,USART3_RTS     ,                  ,TIM12_CH1             ,               ,                               ,OTG_HS_DM         ,           ,         ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,OTG_HS_DP         ,           ,         ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_STP,                               ,FMC_SDNWE         ,           ,         ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MDC                        ,                  ,           ,         ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,OTG_HS_ULPI_DIR,ETH_MII_TXD2                   ,FMC_SDNE0         ,           ,         ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK                 ,FMC_SDCKE0        ,           ,         ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD0/ETH_RMII_RXD0     ,                  ,           ,         ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD1/ETH_RMII_RXD1     ,                  ,           ,         ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK         ,                 ,               ,USART6_TX         ,                      ,               ,                               ,SDIO_D6           ,DCMI_D0    ,LCD_HSYNC,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                 ,I2S3_MCK         ,               ,USART6_RX         ,                      ,               ,                               ,SDIO_D7           ,DCMI_D1    ,LCD_G6   ,EVENTOUT,
+PortC,PC8 ,             ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,SDIO_D0           ,DCMI_D2    ,         ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN         ,                 ,               ,                  ,                      ,               ,                               ,SDIO_D1           ,DCMI_D3    ,         ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,            ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX      ,UART4_TX          ,                      ,               ,                               ,SDIO_D2           ,DCMI_D8    ,LCD_R2   ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,            ,         ,I2S3ext_SD       ,SPI3_MISO        ,USART3_RX      ,UART4_RX          ,                      ,               ,                               ,SDIO_D3           ,DCMI_D4    ,         ,EVENTOUT,
+PortC,PC12,             ,                 ,        ,            ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK      ,UART5_TX          ,                      ,               ,                               ,SDIO_CK           ,DCMI_D9    ,         ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D2            ,           ,         ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D3            ,           ,         ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR,            ,         ,                 ,                 ,               ,UART5_RX          ,                      ,               ,                               ,SDIO_CMD          ,DCMI_D11   ,         ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS     ,                  ,                      ,               ,                               ,FMC_CLK           ,DCMI_D5    ,LCD_G7   ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_RTS     ,                  ,                      ,               ,                               ,FMC_NOE           ,           ,         ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,                               ,FMC_NWE           ,           ,         ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,            ,         ,I2S3_SD          ,SAI1_SD_A        ,USART2_RX      ,                  ,                      ,               ,                               ,FMC_NWAIT         ,DCMI_D10   ,LCD_B2   ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_CK      ,                  ,                      ,               ,                               ,FMC_NE1/FMC_NCE2  ,           ,         ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_TX      ,                  ,                      ,               ,                               ,FMC_D13           ,           ,         ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_RX      ,                  ,                      ,               ,                               ,FMC_D14           ,           ,         ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CK      ,                  ,                      ,               ,                               ,FMC_D15           ,           ,LCD_B3   ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CTS     ,                  ,                      ,               ,                               ,FMC_A16           ,           ,         ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                 ,                 ,USART3_RTS     ,                  ,                      ,               ,                               ,FMC_A17           ,           ,         ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A18           ,           ,         ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D0            ,           ,         ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D1            ,           ,         ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                 ,                 ,               ,UART8_RX          ,                      ,               ,                               ,FMC_NBL0          ,DCMI_D2    ,         ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,UART8_TX          ,                      ,               ,                               ,FMC_NBL1          ,DCMI_D3    ,         ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,SPI4_SCK         ,SAI1_MCLK_A      ,               ,                  ,                      ,               ,ETH_MII_TXD3                   ,FMC_A23           ,           ,         ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                 ,SAI1_SD_B        ,               ,                  ,                      ,               ,                               ,FMC_A19           ,           ,         ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,SPI4_NSS         ,SAI1_FS_A        ,               ,                  ,                      ,               ,                               ,FMC_A20           ,DCMI_D4    ,LCD_B0   ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,SPI4_MISO        ,SAI1_SCK_A       ,               ,                  ,                      ,               ,                               ,FMC_A21           ,DCMI_D6    ,LCD_G0   ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,SPI4_MOSI        ,SAI1_SD_A        ,               ,                  ,                      ,               ,                               ,FMC_A22           ,DCMI_D7    ,LCD_G1   ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,               ,UART7_RX          ,                      ,               ,                               ,FMC_D4            ,           ,         ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                 ,                 ,               ,UART7_TX          ,                      ,               ,                               ,FMC_D5            ,           ,         ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D6            ,           ,         ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D7            ,           ,         ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,SPI4_NSS         ,SPI3_NSS         ,               ,                  ,                      ,               ,                               ,FMC_D8            ,           ,LCD_G3   ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,SPI4_SCK         ,SPI3_SCK         ,               ,                  ,                      ,               ,                               ,FMC_D9            ,           ,LCD_B4   ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,SPI4_MISO        ,SPI3_MISO        ,               ,                  ,                      ,               ,                               ,FMC_D10           ,           ,LCD_DE   ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,SPI4_MOSI        ,SP3_MOSI         ,               ,                  ,                      ,               ,                               ,FMC_D11           ,           ,LCD_CLK  ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D12           ,           ,LCD_R7   ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A0            ,           ,         ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A1            ,           ,         ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A2            ,           ,         ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A3            ,           ,         ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A4            ,           ,         ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A5            ,           ,         ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,SPI5_NSS         ,SAI1_SD_B        ,               ,UART7_RX          ,                      ,               ,                               ,FMC_NIORD         ,           ,         ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,SPI5_SCK         ,SAI1_MCLK_B      ,               ,UART7_TX          ,                      ,               ,                               ,FMC_NREG          ,           ,         ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,            ,         ,SPI5_MISO        ,SAI1_SCK_B       ,               ,                  ,TIM13_CH1             ,               ,                               ,FMC_NIOWR         ,           ,         ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,            ,         ,SPI5_MOSI        ,SAI1_FS_B        ,               ,                  ,TIM14_CH1             ,               ,                               ,FMC_CD            ,           ,         ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INTR          ,DCMI_D11   ,LCD_DE   ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,            ,         ,SPI5_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNRAS        ,DCMI_D12   ,         ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A6            ,           ,         ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A7            ,           ,         ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A8            ,           ,         ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A9            ,           ,         ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A10           ,           ,         ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A11           ,           ,         ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A12           ,           ,         ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A13           ,           ,         ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A14/FMC_BA0   ,           ,         ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A15/FMC_BA1   ,           ,         ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INT2          ,DCMI_D12   ,LCD_R7   ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,FMC_INT3          ,DCMI_D13   ,LCD_CLK  ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,            ,         ,SPI6_NSS         ,                 ,               ,USART6_RTS        ,                      ,               ,ETH_PPS_OUT                    ,FMC_SDCLK         ,           ,         ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_RX         ,                      ,               ,                               ,FMC_NE2/FMC_NCE3  ,DCMI_VSYNC ,         ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,LCD_G3                ,               ,                               ,FMC_NCE4_1/FMC_NE3,DCMI_D2    ,LCD_B2   ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,FMC_NCE4_2        ,DCMI_D3    ,LCD_B3   ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,            ,         ,SPI6_MISO        ,                 ,               ,USART6_RTS        ,LCD_B4                ,               ,                               ,FMC_NE4           ,           ,LCD_B1   ,EVENTOUT,
+PortG,PG13,             ,                 ,        ,            ,         ,SPI6_SCK         ,                 ,               ,USART6_CTS        ,                      ,               ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24           ,           ,         ,EVENTOUT,
+PortG,PG14,             ,                 ,        ,            ,         ,SPI6_MOSI        ,                 ,               ,USART6_TX         ,                      ,               ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25           ,           ,         ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CTS        ,                      ,               ,                               ,FMC_SDNCAS        ,DCMI_D13   ,         ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_CRS                    ,FMC_SDCKE0        ,           ,LCD_R0   ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_COL                    ,FMC_SDNE0         ,           ,LCD_R1   ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,                               ,                  ,           ,         ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,SPI5_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNWE         ,           ,         ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,SPI5_SCK         ,                 ,               ,                  ,TIM12_CH1             ,               ,                               ,FMC_SDNE1         ,DCMI_D8    ,         ,        ,
+PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,SPI5_MISO        ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD3                   ,FMC_SDCKE1        ,DCMI_D9    ,         ,        ,
+PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D16           ,DCMI_HSYNC ,LCD_R2   ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                 ,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,FMC_D17           ,DCMI_D0    ,LCD_R3   ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D18           ,DCMI_D1    ,LCD_R4   ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D19           ,DCMI_D2    ,LCD_R5   ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D20           ,DCMI_D3    ,LCD_R6   ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D21           ,           ,LCD_G2   ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D22           ,DCMI_D4    ,LCD_G3   ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D23           ,DCMI_D11   ,LCD_G4   ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,                      ,               ,                               ,FMC_D24           ,DCMI_D13   ,LCD_G5   ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,               ,                  ,                      ,               ,                               ,FMC_D25           ,DCMI_D8    ,LCD_G6   ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,               ,                               ,FMC_D26           ,DCMI_D9    ,LCD_G7   ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,               ,                               ,FMC_D27           ,DCMI_D10   ,         ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL2          ,DCMI_D5    ,LCD_B4   ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL3          ,DCMI_VSYNC ,LCD_B5   ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D28           ,DCMI_D6    ,LCD_B6   ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D29           ,DCMI_D7    ,LCD_B7   ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,         ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D30           ,           ,LCD_VSYNC,EVENTOUT,
+PortI,PI10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RX_ER                  ,FMC_D31           ,           ,LCD_HSYNC,EVENTOUT,
+PortI,PI11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_DIR,                               ,                  ,           ,         ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_HSYNC,EVENTOUT,
+PortI,PI13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_VSYNC,EVENTOUT,
+PortI,PI14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_CLK  ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R0   ,EVENTOUT,
+PortJ,PJ0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R1   ,EVENTOUT,
+PortJ,PJ1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R2   ,EVENTOUT,
+PortJ,PJ2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R3   ,EVENTOUT,
+PortJ,PJ3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R4   ,EVENTOUT,
+PortJ,PJ4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R5   ,EVENTOUT,
+PortJ,PJ5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R6   ,EVENTOUT,
+PortJ,PJ6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_R7   ,EVENTOUT,
+PortJ,PJ7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G0   ,EVENTOUT,
+PortJ,PJ8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G1   ,EVENTOUT,
+PortJ,PJ9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G2   ,EVENTOUT,
+PortJ,PJ10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G3   ,EVENTOUT,
+PortJ,PJ11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G4   ,EVENTOUT,
+PortJ,PJ12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B0   ,EVENTOUT,
+PortJ,PJ13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B1   ,EVENTOUT,
+PortJ,PJ14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B2   ,EVENTOUT,
+PortJ,PJ15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B3   ,EVENTOUT,
+PortK,PK0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G5   ,EVENTOUT,
+PortK,PK1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G6   ,EVENTOUT,
+PortK,PK2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_G7   ,EVENTOUT,
+PortK,PK3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B4   ,EVENTOUT,
+PortK,PK4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B5   ,EVENTOUT,
+PortK,PK5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B6   ,EVENTOUT,
+PortK,PK6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_B7   ,EVENTOUT,
+PortK,PK7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,LCD_DE   ,EVENTOUT,

From 09c9c8ac3038bba46fa7b57634eff3ed646bacb4 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Sat, 4 Nov 2023 11:00:06 +1100
Subject: [PATCH 121/310] stm32/boards/stm32g474_af.csv: Fix final row ADC
 column.

The original file was missing a trailing , on the final row.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/boards/stm32g474_af.csv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/stm32/boards/stm32g474_af.csv b/ports/stm32/boards/stm32g474_af.csv
index 34ab285837..5853f5f900 100644
--- a/ports/stm32/boards/stm32g474_af.csv
+++ b/ports/stm32/boards/stm32g474_af.csv
@@ -106,4 +106,4 @@ PortG,PG6 ,            ,                      ,TIM20_BKIN
 PortG,PG7 ,            ,                      ,                                 ,SAI1_CK1                                        ,I2C3_SCL               ,                                                     ,                                           ,                        ,LPUART1_TX                              ,                    ,                      ,                    ,FMC_INT                     ,SAI1_MCLK_A           ,                          ,EVENTOUT,
 PortG,PG8 ,            ,                      ,                                 ,                                                ,I2C3_SDA               ,                                                     ,                                           ,                        ,LPUART1_RX                              ,                    ,                      ,                    ,FMC_NE3                     ,                      ,                          ,EVENTOUT,
 PortG,PG9 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,SPI3_SCK                                   ,USART1_TX               ,                                        ,                    ,                      ,                    ,FMC_NCE/FMC_NE2             ,                      ,TIM15_CH1N                ,EVENTOUT,
-PortG,PG10,MCO         ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,        ,EVENTOUT
+PortG,PG10,MCO         ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,

From ae3b1cfab1387c4d875ec67bdeda885f87e52967 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Fri, 3 Nov 2023 22:20:06 +0100
Subject: [PATCH 122/310] mimxrt/modmachine: Fix settings for the MIMXRT1170
 board.

These were not changed with commit c0b64a3f2 for using tools/boardgen.py.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/mimxrt/modmachine.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index aa12f44d47..57090bda27 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -121,10 +121,10 @@ STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     }
 
     #ifdef MIMXRT117x_SERIES
-    machine_pin_config(&pin_WAKEUP_DIG, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5);
+    machine_pin_config(pin_WAKEUP_DIG, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5);
     GPC_CM_EnableIrqWakeup(GPC_CPU_MODE_CTRL_0, GPIO13_Combined_0_31_IRQn, true);
     #elif defined IOMUXC_SNVS_WAKEUP_GPIO5_IO00
-    machine_pin_config(&pin_WAKEUP, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5);
+    machine_pin_config(pin_WAKEUP, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5);
     GPC_EnableIRQ(GPC, GPIO5_Combined_0_15_IRQn);
     #endif
 

From e63d7189bc2b6dfa1e8f5a799d9f17e17f792155 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Sat, 4 Nov 2023 15:20:31 +0100
Subject: [PATCH 123/310] docs/mimxrt: Change the examples which denote a Pin
 with a number.

This option was removed in PR #12211.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 docs/mimxrt/quickref.rst | 44 +++++++++++++++++++---------------------
 1 file changed, 21 insertions(+), 23 deletions(-)

diff --git a/docs/mimxrt/quickref.rst b/docs/mimxrt/quickref.rst
index ab8bf8831b..578364c55a 100644
--- a/docs/mimxrt/quickref.rst
+++ b/docs/mimxrt/quickref.rst
@@ -92,9 +92,7 @@ Use the :ref:`machine.Pin <machine.Pin>` class::
 
 Available Pins follow the ranges and labelling of the respective board, like:
 
-- 0-33 for Teensy 4.0,
-- 0-21 for the MIMXRT10xx-EVK board, or 'D0-Dxx', or 'A0-Ann',
-- 0-14 for the Olimex RT1010Py board, or 'D0'-'Dxx' and 'A0'-'Ann'
+- 'D0-Dxx', or 'A0-Ann' for Teensy 4.0, MIMXRT10xx-EVK ns Olimex board,
 - 'J3_xx', 'J4_xx', 'J5_xx' for the Seeed ARCH MIX board,
 
 or the pin names of the Pin.board or Pin.cpu classes.
@@ -106,9 +104,9 @@ Notes:
 * At the MIMXRT1010_EVK, pins D4, D5 and D9 of the Arduino connector are by
   default not connected to the MCU. For details refer to the schematics.
 * At the MIMXRT1170_EVK board, the inner rows of the Arduino connectors are assigned as follows:
-    - D16 - D23: J9, odd pin numbers; D17 is by default not connected.
-    - D24 - D27: J26, odd pin numbers; J63-J66 have to be closed to enable these pins.
-    - D29 - D36: J25, odd pin numbers; D29 and D30 are by default not connected.
+    - 'D16' - 'D23': J9, odd pin numbers; 'D17' is by default not connected.
+    - 'D24' - 'D27': J26, odd pin numbers; J63-J66 have to be closed to enable these pins.
+    - 'D29' - 'D36': J25, odd pin numbers; 'D29' and 'D30' are by default not connected.
 
 There's a higher-level abstraction :ref:`machine.Signal <machine.Signal>`
 which can be used to invert a pin.  Useful for illuminating active-low LEDs
@@ -146,22 +144,22 @@ handling signal groups. ::
     from machine import Pin, PWM
 
     # create PWM object from a pin and set the frequency and duty cycle
-    pwm2 = PWM(Pin(2), freq=2000, duty_u16=32768)
+    pwm2 = PWM(Pin('D2'), freq=2000, duty_u16=32768)
     pwm2.freq()             # get the current frequency
     pwm2.freq(1000)         # set/change the frequency
     pwm2.duty_u16()         # get the current duty cycle, range 0-65535
     pwm2.duty_u16(200)      # set the duty cycle, range 0-65535
     pwm2.deinit()           # turn off PWM on the pin
     # create a complementary signal pair on Pin 2 and 3
-    pwm2 = PWM((2, 3), freq=2000, duty_ns=20000)
+    pwm2 = PWM(('D2', 'D3'), freq=2000, duty_ns=20000)
 
     # Create a group of four synchronized signals.
-    # Start with Pin(4) at submodule 0, which creates the sync pulse.
-    pwm4 = PWM(Pin(4), freq=1000, align=PWM.HEAD)
-    # Pins 5, 6, and 9 are pins at the same module
-    pwm5 = PWM(Pin(5), freq=1000, duty_u16=10000, align=PWM.HEAD, sync=True)
-    pwm6 = PWM(Pin(6), freq=1000, duty_u16=20000, align=PWM.HEAD, sync=True)
-    pwm9 = PWM(Pin(9), freq=1000, duty_u16=30000, align=PWM.HEAD, sync=True)
+    # Start with Pin('D4') at submodule 0, which creates the sync pulse.
+    pwm4 = PWM(Pin('D4'), freq=1000, align=PWM.HEAD)
+    # Pins D5, D6, and D9 are pins at the same module
+    pwm5 = PWM(Pin('D5'), freq=1000, duty_u16=10000, align=PWM.HEAD, sync=True)
+    pwm6 = PWM(Pin('D6', freq=1000, duty_u16=20000, align=PWM.HEAD, sync=True)
+    pwm9 = PWM(Pin('D9'), freq=1000, duty_u16=30000, align=PWM.HEAD, sync=True)
 
     pwm3                    # show the PWM objects properties
 
@@ -256,7 +254,7 @@ Use the :ref:`machine.ADC <machine.ADC>` class::
 
     from machine import ADC
 
-    adc = ADC(Pin(32))          # create ADC object on ADC pin
+    adc = ADC(Pin('A2'))        # create ADC object on ADC pin
     adc.read_u16()              # read value, 0-65536 across voltage range 0.0v - 3.3v
 
 The resolution of the ADC is 12 bit with 10 to 11 bit accuracy, irrespective of the
@@ -274,7 +272,7 @@ Software SPI (using bit-banging) works on all pins, and is accessed via the
     # construct a SoftSPI bus on the given pins
     # polarity is the idle state of SCK
     # phase=0 means sample on the first edge of SCK, phase=1 means the second
-    spi = SoftSPI(baudrate=100000, polarity=1, phase=0, sck=Pin(0), mosi=Pin(2), miso=Pin(4))
+    spi = SoftSPI(baudrate=100000, polarity=1, phase=0, sck=Pin('D0'), mosi=Pin('D2'), miso=Pin('D4'))
 
     spi.init(baudrate=200000) # set the baudrate
 
@@ -303,7 +301,7 @@ rates (up to 30Mhz).  Hardware SPI is accessed via the
     from machine import SPI, Pin
 
     spi = SPI(0, 10000000)
-    cs_pin = Pin(6, Pin.OUT, value=1)
+    cs_pin = Pin('D6', Pin.OUT, value=1)
     cs_pin(0)
     spi.write('Hello World')
     cs_pin(1)
@@ -331,7 +329,7 @@ accessed via the :ref:`machine.SoftI2C <machine.SoftI2C>` class::
 
     from machine import Pin, SoftI2C
 
-    i2c = SoftI2C(scl=Pin(5), sda=Pin(4), freq=100000)
+    i2c = SoftI2C(scl=Pin('D5'), sda=Pin('D4'), freq=100000)
 
     i2c.scan()              # scan for devices
 
@@ -365,7 +363,7 @@ See :ref:`machine.I2S <machine.I2S>`. Example using a Teensy 4.1 board with a si
 external Codec like UDA1334.::
 
     from machine import I2S, Pin
-    i2s = I2S(2, sck=Pin(26), ws=Pin(27), sd=Pin(7),
+    i2s = I2S(2, sck=Pin('D26'), ws=Pin('D27'), sd=Pin('D7'),
         mode=I2S.TX, bts=16,format=I2S.STEREO,
         rate=44100,ibuf=40000)
     i2s.write(buf)             # write buffer of audio samples to I2S device
@@ -397,7 +395,7 @@ Example using the Teensy audio shield::
 
     from machine import I2C, I2S, Pin
     from sgtl5000 import CODEC
-    i2s = I2S(1, sck=Pin(21), ws=Pin(20), sd=Pin(7), mck=Pin(23),
+    i2s = I2S(1, sck=Pin('D21'), ws=Pin('D20'), sd=Pin('D7'), mck=Pin('D23'),
         mode=I2S.TX, bits=16,rate=44100,format=I2S.STEREO,
         ibuf=40000,
     )
@@ -475,7 +473,7 @@ The OneWire driver is implemented in software and works on all pins::
     from machine import Pin
     import onewire
 
-    ow = onewire.OneWire(Pin(12)) # create a OneWire bus on GPIO12
+    ow = onewire.OneWire(Pin('D12')) # create a OneWire bus on GPIO12
     ow.scan()                     # return a list of devices on the bus
     ow.reset()                    # reset the bus
     ow.readbyte()                 # read a byte
@@ -505,12 +503,12 @@ The DHT driver is implemented in software and works on all pins::
     import dht
     import machine
 
-    d = dht.DHT11(machine.Pin(4))
+    d = dht.DHT11(machine.Pin('D4'))
     d.measure()
     d.temperature() # eg. 23 (°C)
     d.humidity()    # eg. 41 (% RH)
 
-    d = dht.DHT22(machine.Pin(4))
+    d = dht.DHT22(machine.Pin('D4'))
     d.measure()
     d.temperature() # eg. 23.6 (°C)
     d.humidity()    # eg. 41.3 (% RH)

From 47ed06bda21799b3378091c2a41a47b64187dfc0 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Sat, 4 Nov 2023 11:08:37 +1100
Subject: [PATCH 124/310] stm32/boards/make-pins.py: Only support ADC1-3.

e.g. The STM32G4 includes ADC4 & ADC5 which is not currently supported
by the stm32 driver.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/boards/make-pins.py | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py
index 9f9950ff17..bfa22d7974 100755
--- a/ports/stm32/boards/make-pins.py
+++ b/ports/stm32/boards/make-pins.py
@@ -49,6 +49,11 @@ PinAf = namedtuple(
     ],
 )
 
+# Only support ADC1, ADC2, ADC3 for now (e.g. cannot support ADC4 & ADC5 on
+# STM32G4).
+MIN_ADC_UNIT = 1
+MAX_ADC_UNIT = 3
+
 
 class Stm32Pin(boardgen.Pin):
     def __init__(self, cpu_pin_name):
@@ -134,7 +139,7 @@ class Stm32Pin(boardgen.Pin):
                 raise boardgen.PinGeneratorError(
                     "Invalid adc '{:s}' for pin '{:s}'".format(adc_name, self.name())
                 )
-            adc_units = [int(x) for x in m.group(1)]
+            adc_units = [int(x) for x in m.group(1) if MIN_ADC_UNIT <= int(x) <= MAX_ADC_UNIT]
             adc_mode = m.group(2)
             if adc_mode == "INN":
                 # On H7 we have INN/INP, all other parts use IN only. Only use

From 6866d17d8f414140fd79be526c46ef236a29be06 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Mon, 28 Aug 2023 19:11:28 +0200
Subject: [PATCH 125/310] docs/samd: Fix the pinout for SAMD21 Itsy Bitsy
 Express M0.

And the "Pin", "GPIO" and "Name" key explanations.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 docs/samd/pinout.rst | 80 ++++++++++++++++++++++++--------------------
 1 file changed, 44 insertions(+), 36 deletions(-)

diff --git a/docs/samd/pinout.rst b/docs/samd/pinout.rst
index 5fe1e14ecb..272f7c58df 100644
--- a/docs/samd/pinout.rst
+++ b/docs/samd/pinout.rst
@@ -17,44 +17,53 @@ Adafruit ItsyBitsy M0 Express pin assignment table
 === ==== ============ ==== ==== ====== ====== ====== ======
 Pin GPIO Pin name     IRQ  ADC  Serial Serial TCC/TC TCC/TC
 === ==== ============ ==== ==== ====== ====== ====== ======
-  0 PA11           D0  11   19    0/3    2/3   1/1    0/3
-  1 PA10           D1  10   18    0/2    2/2   1/0    0/2
-  2 PA14           D2  14    -    2/2    4/2   3/0    0/4
-  3 PA09           D3   9   17    0/1    2/1   0/1    1/3
-  4 PA08           D4   -   16    0/0    2/0   0/0    1/2
-  5 PA15           D5  15    -    2/3    4/3   3/1    0/5
-  7 PA21           D7   5    -    5/3    3/3   7/1    0/7
-  9 PA07           D9   7    7     -     0/3   1/1     -
- 10 PA18          D10   2    -    1/2    3/2   3/0    0/2
- 11 PA16          D11   0    -    1/0    3/0   2/0    0/6
- 12 PA19          D12   3    -    1/3    3/3   3/1    0/3
- 13 PA17          D13   1    -    1/1    3/1   2/1    0/7
- 14 PA02           A0   2    0     -      -     -      -
- 15 PB08           A1   8    2     -     4/0   4/0     -
- 16 PB09           A2   9    3     -     4/1   4/1     -
- 17 PA04           A3   4    4     -     0/0   0/0     -
- 18 PA05           A4   5    5     -     0/1   0/1     -
- 19 PB02           A5   2    -     -     5/0   6/0     -
- 20 PA22          SDA   6    -    3/0    5/0   4/0    0/4
- 21 PA23          SCL   7    -    3/1    5/1   4/1    0/5
- 22 PB10         MOSI  10    -     -     4/2   5/0    0/4
- 23 PA12         MISO  12    -    2/0    4/0   2/0    0/6
- 24 PB11          SCK  11    -     -     4/3   5/1    0/5
- 25 PA00  DOTSTAR_CLK   0    -     -     1/0   2/0     -
- 26 PA01 DOTSTAR_DATA   1    -     -     1/1   2/1     -
- 27 PB22   FLASH_MOSI   6    -     -     5/2   7/0     -
- 28 PB03   FLASH_MISO   3    -     -     5/1   6/1     -
- 29 PB23    FLASH_SCK   7    -     -     5/3   7/1     -
+  2 PA02           A0   2   0     -       -     -      - 
+ 40 PB08           A1   8   2     -      4/0   4/0     - 
+ 41 PB09           A2   9   3     -      4/1   4/1     - 
+  4 PA04           A3   4   4     -      0/0   0/0     - 
+  5 PA05           A4   5   5     -      0/1   0/1     - 
+ 34 PB02           A5   2  10     -      5/0   6/0     - 
+ 11 PA11           D0  11  19    0/3     2/3   1/1    0/3
+ 10 PA10           D1  10  18    0/2     2/2   1/0    0/2
+ 14 PA14           D2  14   -    2/2     4/2   3/0    0/4
+  9 PA09           D3   9  17    0/1     2/1   0/1    1/3
+  8 PA08           D4   -  16    0/0     2/0   0/0    1/2
+ 15 PA15           D5  15   -    2/3     4/3   3/1    0/5
+ 21 PA21           D7   5   -    5/3     3/3   7/1    0/7
+  7 PA07           D9   7   7     -      0/3   1/1     - 
+ 18 PA18          D10   2   -    1/2     3/2   3/0    0/2
+ 16 PA16          D11   0   -    1/0     3/0   2/0    0/6
+ 19 PA19          D12   3   -    1/3     3/3   3/1    0/3
+ 17 PA17          D13   1   -    1/1     3/1   2/1    0/7
+  0 PA00  DOTSTAR_CLK   0   -     -      1/0   2/0     - 
+  1 PA01 DOTSTAR_DATA   1   -     -      1/1   2/1     - 
+ 27 PA27     FLASH_CS  15   -     -       -     -      - 
+ 35 PB03   FLASH_MISO   3  11     -      5/1   6/1     - 
+ 54 PB22   FLASH_MOSI   6   -     -      5/2   7/0     - 
+ 55 PB23    FLASH_SCK   7   -     -      5/3   7/1     - 
+ 12 PA12         MISO  12   -    2/0     4/0   2/0    0/6
+ 42 PB10         MOSI  10   -     -      4/2   5/0    0/4
+ 43 PB11          SCK  11   -     -      4/3   5/1    0/5
+ 23 PA23          SCL   7   -    3/1     5/1   4/1    0/5
+ 22 PA22          SDA   6   -    3/0     5/0   4/0    0/4
+ 30 PA30        SWCLK  10   -     -      1/2   1/0     - 
+ 31 PA31        SWDIO  11   -     -      1/3   1/1     - 
+ 24 PA24       USB_DM  12   -    3/2     5/2   5/0    1/2
+ 25 PA25       USB_DP  13   -    3/3     5/3   5/1    1/3
+  3 PA03                3   1     -       -     -      - 
+  6 PA06                6   6     -      0/2   1/0     - 
+ 13 PA13               13   -    2/1     4/1   2/0    0/7
+ 20 PA20                4   -    5/2     3/2   7/0    0/4
+ 28 PA28                8   -     -       -     -      - 
 === ==== ============ ==== ==== ====== ====== ====== ======
 
 
 Description of the columns:
 
 - *Pin* - The number that is expected at ``machine.Pin(n)``, if the pin is given
-  as a number. This is NOT the GPIO number, but the board pin number, as
-  given in the board specific definition file.
-- *GPIO* - The GPIO number.
-- *Pin Name* - The name of a Pin which is expected argument to ``machine.Pin("name")``.
+  as a number.
+- *GPIO* - The GPIO name, which can be used as argument to ``machine.Pin("name")``.
+- *Pin Name* - The boards name, which can be used as argument to ``machine.Pin("name")``.
 - *IRQ* - The IRQ number assigned to that GPIO, used internally by ``Pin.irq()``. When
   using ``Pin.irq()``, different pins must use different IRQs
 - *ADC* - The ADC channel assigned to the pin. When using ADC, different pins must
@@ -183,10 +192,9 @@ Pin GPIO Pin name     IRQ  ADC  ADC  Serial Serial  TC    PWM   PWM
 Description of the columns:
 
 - *Pin* - The number that is expected at ``machine.Pin(n)``, if the pin is given
-  as a number. This is NOT the GPIO number, but the board pin number, as
-  given in the board specific definition file.
-- *GPIO* - The GPIO number.
-- *Pin Name* The name of a Pin which is expected argument to ``machine.Pin("name")``.
+  as a number.
+- *GPIO* - The GPIO name, which can be used as argument to ``machine.Pin("name")``.
+- *Pin Name* - The boards name, which can be used as argument to ``machine.Pin("name")``.
 - *IRQ* - The IRQ number assigned to that GPIO, used internally by ``Pin.irq()``. When
   using ``Pin.irq()``, different pins must use different IRQs
 - *ADC* - The ADC0/1 channel assigned to the pin. When using ADC, different pins must

From 2c1f23820572e36a1d12597dff3261242fd6573c Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Thu, 7 Sep 2023 15:59:34 +0200
Subject: [PATCH 126/310] samd/mpconfigport: Set MICROPY_USE_INTERNAL_ERRNO to
 1.

Without this, error codes can be misleading.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/samd/mpconfigport.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 801408ed47..91a7c1a10d 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -56,6 +56,7 @@
 #define MICROPY_PY_BUILTINS_HELP            (1)
 #define MICROPY_PY_BUILTINS_HELP_TEXT       samd_help_text
 #define MICROPY_PY_BUILTINS_HELP_MODULES    (1)
+#define MICROPY_USE_INTERNAL_ERRNO          (1)
 #define MICROPY_ENABLE_SCHEDULER            (1)
 #define MICROPY_SCHEDULER_STATIC_NODES      (1)
 #define MICROPY_HW_ENABLE_USBDEV            (1)

From 59afeb056ac3657eebfffc16136d7eedbbc378e2 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Mon, 18 Sep 2023 09:08:24 +0200
Subject: [PATCH 127/310] samd/machine_uart: Add machine_uart_set_baudrate()
 function.

Changing the baudrate requires a complete re-configuration of the Sercom
device, which is put into a separate rather large function.  This new
machine_uart_set_baudrate() function will be useful for future drivers such
as Bluetooth.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/samd/machine_uart.c | 159 +++++++++++++++++++++-----------------
 1 file changed, 86 insertions(+), 73 deletions(-)

diff --git a/ports/samd/machine_uart.c b/ports/samd/machine_uart.c
index ada193020b..de6c92c5f5 100644
--- a/ports/samd/machine_uart.c
+++ b/ports/samd/machine_uart.c
@@ -49,6 +49,7 @@ typedef struct _machine_uart_obj_t {
     uint8_t bits;
     uint8_t parity;
     uint8_t stop;
+    uint8_t flow_control;
     uint8_t tx;
     uint8_t rx;
     sercom_pad_config_t tx_pad_config;
@@ -112,6 +113,85 @@ void common_uart_irq_handler(int uart_id) {
     }
 }
 
+// Configure the Sercom device
+STATIC void machine_sercom_configure(machine_uart_obj_t *self) {
+    Sercom *uart = sercom_instance[self->id];
+
+    // Reset (clear) the peripheral registers.
+    while (uart->USART.SYNCBUSY.bit.SWRST) {
+    }
+    uart->USART.CTRLA.bit.SWRST = 1; // Reset all Registers, disable peripheral
+    while (uart->USART.SYNCBUSY.bit.SWRST) {
+    }
+
+    uint8_t txpo = self->tx_pad_config.pad_nr;
+    #if defined(MCU_SAMD21)
+    if (self->tx_pad_config.pad_nr == 2) { // Map pad 2 to TXPO = 1
+        txpo = 1;
+    } else
+    #endif
+    if (self->tx_pad_config.pad_nr != 0) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid UART pin"));
+    }
+    #if MICROPY_HW_UART_RTSCTS
+    if ((self->flow_control & FLOW_CONTROL_RTS) && self->rts_pad_config.pad_nr == 2) {
+        txpo = 2;
+        mp_hal_set_pin_mux(self->rts, self->rts_pad_config.alt_fct);
+    }
+    if ((self->flow_control & FLOW_CONTROL_CTS) && self->cts_pad_config.pad_nr == 3) {
+        txpo = 2;
+        mp_hal_set_pin_mux(self->cts, self->cts_pad_config.alt_fct);
+    }
+    #endif
+
+    uart->USART.CTRLA.reg =
+        SERCOM_USART_CTRLA_DORD // Data order
+        | SERCOM_USART_CTRLA_FORM(self->parity != 0 ? 1 : 0)  // Enable parity or not
+        | SERCOM_USART_CTRLA_RXPO(self->rx_pad_config.pad_nr) // Set Pad#
+        | SERCOM_USART_CTRLA_TXPO(txpo) // Set Pad#
+        | SERCOM_USART_CTRLA_MODE(1) // USART with internal clock
+    ;
+    uart->USART.CTRLB.reg =
+        SERCOM_USART_CTRLB_RXEN   // Enable Rx & Tx
+        | SERCOM_USART_CTRLB_TXEN
+        | ((self->parity & 1) << SERCOM_USART_CTRLB_PMODE_Pos)
+        | (self->stop << SERCOM_USART_CTRLB_SBMODE_Pos)
+        | SERCOM_USART_CTRLB_CHSIZE((self->bits & 7) | (self->bits & 1))
+    ;
+    while (uart->USART.SYNCBUSY.bit.CTRLB) {
+    }
+
+    // USART is driven by the clock of GCLK Generator 2, freq by get_peripheral_freq()
+    // baud rate; 65536 * (1 - 16 * 115200/bus_freq)
+    uint32_t baud = 65536 - ((uint64_t)(65536 * 16) * self->baudrate + get_peripheral_freq() / 2) / get_peripheral_freq();
+    uart->USART.BAUD.bit.BAUD = baud; // Set Baud
+
+    sercom_register_irq(self->id, &common_uart_irq_handler);
+
+    // Enable RXC interrupt
+    uart->USART.INTENSET.reg = SERCOM_USART_INTENSET_RXC;
+    #if defined(MCU_SAMD21)
+    NVIC_EnableIRQ(SERCOM0_IRQn + self->id);
+    #elif defined(MCU_SAMD51)
+    NVIC_EnableIRQ(SERCOM0_0_IRQn + 4 * self->id + 2);
+    #endif
+    #if MICROPY_HW_UART_TXBUF
+    // Enable DRE interrupt
+    // SAMD21 has just 1 IRQ for all USART events, so no need for an additional NVIC enable
+    #if defined(MCU_SAMD51)
+    NVIC_EnableIRQ(SERCOM0_0_IRQn + 4 * self->id + 0);
+    #endif
+    #endif
+
+    sercom_enable(uart, 1);
+}
+
+void machine_uart_set_baudrate(mp_obj_t self_in, uint32_t baudrate) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    self->baudrate = baudrate;
+    machine_sercom_configure(self);
+}
+
 STATIC void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, "
@@ -194,22 +274,22 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
     if (args[ARG_rx].u_obj != mp_const_none) {
         self->rx = mp_hal_get_pin_obj(args[ARG_rx].u_obj);
     }
+    self->flow_control = 0;
     #if MICROPY_HW_UART_RTSCTS
-    uint8_t flow_control = 0;
     // Set RTS/CTS pins if configured.
     if (args[ARG_rts].u_obj != mp_const_none) {
         self->rts = mp_hal_get_pin_obj(args[ARG_rts].u_obj);
         self->rts_pad_config = get_sercom_config(self->rts, self->id);
-        flow_control = FLOW_CONTROL_RTS;
+        self->flow_control = FLOW_CONTROL_RTS;
     }
     if (args[ARG_cts].u_obj != mp_const_none) {
         self->cts = mp_hal_get_pin_obj(args[ARG_cts].u_obj);
         self->cts_pad_config = get_sercom_config(self->cts, self->id);
-        flow_control |= FLOW_CONTROL_CTS;
+        self->flow_control |= FLOW_CONTROL_CTS;
     }
     // rts only flow control is not allowed. Otherwise the state of the
     // cts pin is undefined.
-    if (flow_control == FLOW_CONTROL_RTS) {
+    if (self->flow_control == FLOW_CONTROL_RTS) {
         mp_raise_ValueError(MP_ERROR_TEXT("cts missing for flow control"));
     }
     #endif
@@ -278,75 +358,8 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         // Next: Set up the clocks
         enable_sercom_clock(self->id);
 
-        // Next: Configure the USART
-        Sercom *uart = sercom_instance[self->id];
-        // Reset (clear) the peripheral registers.
-        while (uart->USART.SYNCBUSY.bit.SWRST) {
-        }
-        uart->USART.CTRLA.bit.SWRST = 1; // Reset all Registers, disable peripheral
-        while (uart->USART.SYNCBUSY.bit.SWRST) {
-        }
-
-        uint8_t txpo = self->tx_pad_config.pad_nr;
-        #if defined(MCU_SAMD21)
-        if (self->tx_pad_config.pad_nr == 2) { // Map pad 2 to TXPO = 1
-            txpo = 1;
-        } else
-        #endif
-        if (self->tx_pad_config.pad_nr != 0) {
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid UART pin"));
-        }
-        #if MICROPY_HW_UART_RTSCTS
-        if ((flow_control & FLOW_CONTROL_RTS) && self->rts_pad_config.pad_nr == 2) {
-            txpo = 2;
-            mp_hal_set_pin_mux(self->rts, self->rts_pad_config.alt_fct);
-        }
-        if ((flow_control & FLOW_CONTROL_CTS) && self->cts_pad_config.pad_nr == 3) {
-            txpo = 2;
-            mp_hal_set_pin_mux(self->cts, self->cts_pad_config.alt_fct);
-        }
-        #endif
-
-        uart->USART.CTRLA.reg =
-            SERCOM_USART_CTRLA_DORD // Data order
-            | SERCOM_USART_CTRLA_FORM(self->parity != 0 ? 1 : 0)  // Enable parity or not
-            | SERCOM_USART_CTRLA_RXPO(self->rx_pad_config.pad_nr) // Set Pad#
-            | SERCOM_USART_CTRLA_TXPO(txpo) // Set Pad#
-            | SERCOM_USART_CTRLA_MODE(1) // USART with internal clock
-        ;
-        uart->USART.CTRLB.reg =
-            SERCOM_USART_CTRLB_RXEN   // Enable Rx & Tx
-            | SERCOM_USART_CTRLB_TXEN
-            | ((self->parity & 1) << SERCOM_USART_CTRLB_PMODE_Pos)
-            | (self->stop << SERCOM_USART_CTRLB_SBMODE_Pos)
-            | SERCOM_USART_CTRLB_CHSIZE((self->bits & 7) | (self->bits & 1))
-        ;
-        while (uart->USART.SYNCBUSY.bit.CTRLB) {
-        }
-
-        // USART is driven by the clock of GCLK Generator 2, freq by get_peripheral_freq()
-        // baud rate; 65536 * (1 - 16 * 115200/bus_freq)
-        uint32_t baud = 65536 - ((uint64_t)(65536 * 16) * self->baudrate + get_peripheral_freq() / 2) / get_peripheral_freq();
-        uart->USART.BAUD.bit.BAUD = baud; // Set Baud
-
-        sercom_register_irq(self->id, &common_uart_irq_handler);
-
-        // Enable RXC interrupt
-        uart->USART.INTENSET.reg = SERCOM_USART_INTENSET_RXC;
-        #if defined(MCU_SAMD21)
-        NVIC_EnableIRQ(SERCOM0_IRQn + self->id);
-        #elif defined(MCU_SAMD51)
-        NVIC_EnableIRQ(SERCOM0_0_IRQn + 4 * self->id + 2);
-        #endif
-        #if MICROPY_HW_UART_TXBUF
-        // Enable DRE interrupt
-        // SAMD21 has just 1 IRQ for all USART events, so no need for an additional NVIC enable
-        #if defined(MCU_SAMD51)
-        NVIC_EnableIRQ(SERCOM0_0_IRQn + 4 * self->id + 0);
-        #endif
-        #endif
-
-        sercom_enable(uart, 1);
+        // Configure the sercom module
+        machine_sercom_configure(self);
     }
 }
 

From c35cc63366a924b818eaaf4f0bd1c11eeb236d79 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Sat, 4 Nov 2023 19:00:56 +0100
Subject: [PATCH 128/310] samd/pin_af: Fix a typo in a conditional compile.

Thanks to @ricksorensen for finding it.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/samd/pin_af.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/samd/pin_af.c b/ports/samd/pin_af.c
index ca11e3b7a8..a73c6591dd 100644
--- a/ports/samd/pin_af.c
+++ b/ports/samd/pin_af.c
@@ -112,7 +112,7 @@ adc_config_t get_adc_config(int pin_id, int32_t flag) {
     const machine_pin_obj_t *pct_ptr = pin_find_by_id(pin_id);
     if (pct_ptr->adc0 != 0xff && (flag & (1 << pct_ptr->adc0)) == 0) {
         return (adc_config_t) {0, pct_ptr->adc0};
-    #if defined(MUC_SAMD51)
+    #if defined(MCU_SAMD51)
     } else if (pct_ptr->adc1 != 0xff && (flag & (1 << (pct_ptr->adc1 + 16))) == 0) {
         return (adc_config_t) {1, pct_ptr->adc1};
     #endif

From bea6ff82fadf37555a3a282105f861a914475bb6 Mon Sep 17 00:00:00 2001
From: Alessandro Gatti <a.gatti@frob.it>
Date: Thu, 2 Nov 2023 13:19:09 +0100
Subject: [PATCH 129/310] tools/tinytest-codegen.py: Externalise tests list.

Remove port-specific test directories and excluded tests from
tinytest-codegen, and let it read said information from an external file.
This way tinytest-codegen is not limited to always generate tests for the
`qemu-arm` target.

This allows having port-specific test directory and excluded tests for more
than one QEMU bare-metal target.

The `qemu-arm` port Makefile was modified to work with the generator
changes and a tests profile file was added to said port.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
---
 ports/qemu-arm/Makefile.test     |   4 +-
 ports/qemu-arm/tests_profile.txt |  16 +++++
 tools/tinytest-codegen.py        | 116 +++++++++++++++++--------------
 3 files changed, 82 insertions(+), 54 deletions(-)
 create mode 100644 ports/qemu-arm/tests_profile.txt

diff --git a/ports/qemu-arm/Makefile.test b/ports/qemu-arm/Makefile.test
index e0f3a54169..cb5b0927c8 100644
--- a/ports/qemu-arm/Makefile.test
+++ b/ports/qemu-arm/Makefile.test
@@ -13,10 +13,12 @@ CFLAGS += -DTEST
 
 .PHONY: $(BUILD)/genhdr/tests.h
 
+TESTS_PROFILE = $(dir $(abspath $(firstword $(MAKEFILE_LIST))))/tests_profile.txt
+
 $(BUILD)/test_main.o: $(BUILD)/genhdr/tests.h
 $(BUILD)/genhdr/tests.h:
 	(cd $(TOP)/tests; ./run-tests.py --target=qemu-arm --write-exp)
-	$(Q)echo "Generating $@";(cd $(TOP)/tests; ../tools/tinytest-codegen.py $(addprefix --exclude ,$(TESTS_EXCLUDE))) > $@
+	$(Q)echo "Generating $@";(cd $(TOP)/tests; ../tools/tinytest-codegen.py --profile $(TESTS_PROFILE) $(addprefix --exclude ,$(TESTS_EXCLUDE))) > $@
 
 $(BUILD)/lib/tinytest/tinytest.o: CFLAGS += -DNO_FORKING
 
diff --git a/ports/qemu-arm/tests_profile.txt b/ports/qemu-arm/tests_profile.txt
new file mode 100644
index 0000000000..c55185a0eb
--- /dev/null
+++ b/ports/qemu-arm/tests_profile.txt
@@ -0,0 +1,16 @@
+# Port-specific test directories.
+
+test_dirs.add(("inlineasm", "qemu-arm"))
+
+# Port-specific tests exclusion list.
+
+exclude_tests.add(
+    (
+        # inline asm FP tests (require Cortex-M4)
+        "inlineasm/asmfpaddsub.py",
+        "inlineasm/asmfpcmp.py",
+        "inlineasm/asmfpldrstr.py",
+        "inlineasm/asmfpmuldiv.py",
+        "inlineasm/asmfpsqrt.py",
+    )
+)
diff --git a/tools/tinytest-codegen.py b/tools/tinytest-codegen.py
index 7f6c86243b..8178b56020 100755
--- a/tools/tinytest-codegen.py
+++ b/tools/tinytest-codegen.py
@@ -32,6 +32,12 @@ def script_to_map(test_file):
     return r
 
 
+def load_profile(profile_file, test_dirs, exclude_tests):
+    profile_globals = {"test_dirs": test_dirs, "exclude_tests": exclude_tests}
+    exec(profile_file.read(), profile_globals)
+    return profile_globals["test_dirs"], profile_globals["exclude_tests"]
+
+
 test_function = (
     "void {name}(void* data) {{\n"
     "  static const char pystr[] = {script};\n"
@@ -50,58 +56,55 @@ testgroup_struct = "struct testgroup_t groups[] = {{\n{body}\n  END_OF_GROUPS\n}
 testgroup_member = '  {{ "{name}", {name}_tests }},'
 
 ## XXX: may be we could have `--without <groups>` argument...
-# currently these tests are selected because they pass on qemu-arm
-test_dirs = (
-    "basics",
-    "micropython",
-    "misc",
-    "extmod",
-    "float",
-    "inlineasm",
-    "qemu-arm",
-)  # 'import', 'io',)
-exclude_tests = (
-    # pattern matching in .exp
-    "basics/bytes_compare3.py",
-    "extmod/ticks_diff.py",
-    "extmod/time_ms_us.py",
-    # unicode char issue
-    "extmod/json_loads.py",
-    # doesn't output to python stdout
-    "extmod/re_debug.py",
-    "extmod/vfs_basic.py",
-    "extmod/vfs_fat_ramdisk.py",
-    "extmod/vfs_fat_fileio.py",
-    "extmod/vfs_fat_fsusermount.py",
-    "extmod/vfs_fat_oldproto.py",
-    # rounding issues
-    "float/float_divmod.py",
-    # requires double precision floating point to work
-    "float/float2int_doubleprec_intbig.py",
-    "float/float_format_ints_doubleprec.py",
-    "float/float_parse_doubleprec.py",
-    # inline asm FP tests (require Cortex-M4)
-    "inlineasm/asmfpaddsub.py",
-    "inlineasm/asmfpcmp.py",
-    "inlineasm/asmfpldrstr.py",
-    "inlineasm/asmfpmuldiv.py",
-    "inlineasm/asmfpsqrt.py",
-    # different filename in output
-    "micropython/emg_exc.py",
-    "micropython/heapalloc_traceback.py",
-    # don't have emergency exception buffer
-    "micropython/heapalloc_exc_compressed_emg_exc.py",
-    # pattern matching in .exp
-    "micropython/meminfo.py",
-    # needs sys stdfiles
-    "misc/print_exception.py",
-    # settrace .exp files are too large
-    "misc/sys_settrace_loop.py",
-    "misc/sys_settrace_generator.py",
-    "misc/sys_settrace_features.py",
-    # don't have f-string
-    "basics/string_fstring.py",
-    "basics/string_fstring_debug.py",
+
+test_dirs = set(
+    (
+        "basics",
+        "extmod",
+        "float",
+        "micropython",
+        "misc",
+    )
+)
+
+exclude_tests = set(
+    (
+        # pattern matching in .exp
+        "basics/bytes_compare3.py",
+        "extmod/ticks_diff.py",
+        "extmod/time_ms_us.py",
+        # unicode char issue
+        "extmod/json_loads.py",
+        # doesn't output to python stdout
+        "extmod/re_debug.py",
+        "extmod/vfs_basic.py",
+        "extmod/vfs_fat_ramdisk.py",
+        "extmod/vfs_fat_fileio.py",
+        "extmod/vfs_fat_fsusermount.py",
+        "extmod/vfs_fat_oldproto.py",
+        # rounding issues
+        "float/float_divmod.py",
+        # requires double precision floating point to work
+        "float/float2int_doubleprec_intbig.py",
+        "float/float_format_ints_doubleprec.py",
+        "float/float_parse_doubleprec.py",
+        # different filename in output
+        "micropython/emg_exc.py",
+        "micropython/heapalloc_traceback.py",
+        # don't have emergency exception buffer
+        "micropython/heapalloc_exc_compressed_emg_exc.py",
+        # pattern matching in .exp
+        "micropython/meminfo.py",
+        # needs sys stdfiles
+        "misc/print_exception.py",
+        # settrace .exp files are too large
+        "misc/sys_settrace_loop.py",
+        "misc/sys_settrace_generator.py",
+        "misc/sys_settrace_features.py",
+        # don't have f-string
+        "basics/string_fstring.py",
+        "basics/string_fstring_debug.py",
+    )
 )
 
 output = []
@@ -112,11 +115,18 @@ argparser = argparse.ArgumentParser(
 )
 argparser.add_argument("--stdin", action="store_true", help="read list of tests from stdin")
 argparser.add_argument("--exclude", action="append", help="exclude test by name")
+argparser.add_argument(
+    "--profile",
+    type=argparse.FileType("rt", encoding="utf-8"),
+    help="optional profile file providing test directories and exclusion list",
+)
 args = argparser.parse_args()
 
 if not args.stdin:
+    if args.profile:
+        test_dirs, exclude_tests = load_profile(args.profile, test_dirs, exclude_tests)
     if args.exclude:
-        exclude_tests += tuple(args.exclude)
+        exclude_tests = exclude_tests.union(args.exclude)
     for group in test_dirs:
         tests += [test for test in glob("{}/*.py".format(group)) if test not in exclude_tests]
 else:

From 9be0623d4ce518eead8ea477a4615cb8c3e357d8 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Mon, 6 Nov 2023 15:06:28 +1100
Subject: [PATCH 130/310] shared/libc/string0: Don't deref args for n==0 case.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

C99 says that strncmp has UB for either string being NULL, so the
current behavior is technically correct, but it's an easy fix to handle
this case correctly.

7.1.4: "unless explicitly stated otherwise in the detailed
description... if an argument to a function has ...null pointer.. the
behavior is undefined".

7.21.1: "Unless explicitly stated otherwise in the description of a
particular function in this subclause, pointer arguments on such a call
shall still have valid values, as described in 7.1.4".

Also make the same change for the minimal version in bare-arm/lib.c.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/bare-arm/lib.c  | 3 ++-
 shared/libc/string0.c | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/ports/bare-arm/lib.c b/ports/bare-arm/lib.c
index 61d3be64e3..1574d5c902 100644
--- a/ports/bare-arm/lib.c
+++ b/ports/bare-arm/lib.c
@@ -110,8 +110,9 @@ char *strchr(const char *s, int c) {
 }
 
 int strncmp(const char *s1, const char *s2, size_t n) {
-    while (*s1 && *s2 && n-- > 0) {
+    while (n > 0 && *s1 && *s2) {
         int c = *s1++ - *s2++;
+        --n;
         if (c) {
             return c;
         }
diff --git a/shared/libc/string0.c b/shared/libc/string0.c
index a3b268e441..3909f70ed8 100644
--- a/shared/libc/string0.c
+++ b/shared/libc/string0.c
@@ -154,7 +154,7 @@ int strcmp(const char *s1, const char *s2) {
 }
 
 int strncmp(const char *s1, const char *s2, size_t n) {
-    while (*s1 && *s2 && n > 0) {
+    while (n > 0 && *s1 && *s2) {
         char c1 = *s1++; // XXX UTF8 get char, next char
         char c2 = *s2++; // XXX UTF8 get char, next char
         n--;

From 4212799fd8bded69e5cf47faf2ebd675906ac151 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Mon, 6 Nov 2023 15:08:11 +1100
Subject: [PATCH 131/310] py/qstr: Special case qstr_find_strn for empty
 string.

This handles the case where an empty bytes/bytearray/str could pass in
NULL as the str argument (with length zero). This would result in UB in
strncmp. Even though our bare-metal implementation of strncmp handles
this, best to avoid it for when we're using system strncmp.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 py/qstr.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/py/qstr.c b/py/qstr.c
index 0ae08354a5..dc89013f86 100644
--- a/py/qstr.c
+++ b/py/qstr.c
@@ -233,6 +233,11 @@ STATIC qstr qstr_add(mp_uint_t hash, mp_uint_t len, const char *q_ptr) {
 }
 
 qstr qstr_find_strn(const char *str, size_t str_len) {
+    if (str_len == 0) {
+        // strncmp behaviour is undefined for str==NULL.
+        return MP_QSTR_;
+    }
+
     // work out hash of str
     size_t str_hash = qstr_compute_hash((const byte *)str, str_len);
 

From 03eae48847c61985afece342df971f149c8ffa42 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 25 Oct 2023 19:13:11 +1100
Subject: [PATCH 132/310] extmod/machine_adc_block: Factor esp32 ADCBlock
 bindings to common code.

This is a code factoring to have the Python bindings in one location, and
all the ports use those same bindings.  At this stage only esp32 implements
this class, so the code for the bindings comes from that port.

The documentation is also updated to reflect the esp32's behaviour of
ADCBlock.connect().

Signed-off-by: Damien George <damien@micropython.org>
---
 docs/library/machine.ADCBlock.rst |   9 +-
 extmod/extmod.cmake               |   1 +
 extmod/extmod.mk                  |   1 +
 extmod/machine_adc_block.c        | 128 +++++++++++++++++++
 extmod/modmachine.h               |   2 +
 ports/esp32/adc.c                 |  92 ++++++++++++++
 ports/esp32/adc.h                 |  60 +++++++++
 ports/esp32/esp32_common.cmake    |   2 +-
 ports/esp32/machine_adc.c         |  10 +-
 ports/esp32/machine_adc.h         |  16 ---
 ports/esp32/machine_adc_block.c   |  72 +++++++++++
 ports/esp32/machine_adcblock.c    | 204 ------------------------------
 ports/esp32/machine_adcblock.h    |  22 ----
 ports/esp32/modmachine.c          |   4 +-
 ports/esp32/modmachine.h          |   1 -
 ports/esp32/mpconfigport.h        |   3 +-
 ports/renesas-ra/modmachine.h     |   1 -
 17 files changed, 371 insertions(+), 257 deletions(-)
 create mode 100644 extmod/machine_adc_block.c
 create mode 100644 ports/esp32/adc.c
 create mode 100644 ports/esp32/adc.h
 delete mode 100644 ports/esp32/machine_adc.h
 create mode 100644 ports/esp32/machine_adc_block.c
 delete mode 100644 ports/esp32/machine_adcblock.c
 delete mode 100644 ports/esp32/machine_adcblock.h

diff --git a/docs/library/machine.ADCBlock.rst b/docs/library/machine.ADCBlock.rst
index 56a468dd62..eb94362d55 100644
--- a/docs/library/machine.ADCBlock.rst
+++ b/docs/library/machine.ADCBlock.rst
@@ -39,9 +39,9 @@ Methods
    Configure the ADC peripheral.  *bits* will set the resolution of the
    conversion process.
 
-.. method:: ADCBlock.connect(channel)
-            ADCBlock.connect(source)
-            ADCBlock.connect(channel, source)
+.. method:: ADCBlock.connect(channel, *, ...)
+            ADCBlock.connect(source, *, ...)
+            ADCBlock.connect(channel, source, *, ...)
 
    Connect up a channel on the ADC peripheral so it is ready for sampling,
    and return an :ref:`ADC <machine.ADC>` object that represents that connection.
@@ -56,3 +56,6 @@ Methods
 
    If both *channel* and *source* are given then they are connected together
    and made ready for sampling.
+
+   Any additional keyword arguments are used to configure the returned ADC object,
+   via its :meth:`init <machine.ADC.init>` method.
diff --git a/extmod/extmod.cmake b/extmod/extmod.cmake
index a1a0a9f736..5bfdf65513 100644
--- a/extmod/extmod.cmake
+++ b/extmod/extmod.cmake
@@ -8,6 +8,7 @@ set(MICROPY_SOURCE_EXTMOD
     ${MICROPY_DIR}/shared/libc/printf.c
     ${MICROPY_EXTMOD_DIR}/btstack/modbluetooth_btstack.c
     ${MICROPY_EXTMOD_DIR}/machine_adc.c
+    ${MICROPY_EXTMOD_DIR}/machine_adc_block.c
     ${MICROPY_EXTMOD_DIR}/machine_bitstream.c
     ${MICROPY_EXTMOD_DIR}/machine_i2c.c
     ${MICROPY_EXTMOD_DIR}/machine_i2s.c
diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index c4b2c3d9c5..a04856bce2 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -3,6 +3,7 @@
 
 SRC_EXTMOD_C += \
 	extmod/machine_adc.c \
+	extmod/machine_adc_block.c \
 	extmod/machine_bitstream.c \
 	extmod/machine_i2c.c \
 	extmod/machine_i2s.c \
diff --git a/extmod/machine_adc_block.c b/extmod/machine_adc_block.c
new file mode 100644
index 0000000000..f80e2dae4c
--- /dev/null
+++ b/extmod/machine_adc_block.c
@@ -0,0 +1,128 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Jonathan Hogg
+ * Copyright (c) 2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+
+#if MICROPY_PY_MACHINE_ADC_BLOCK
+
+#include "py/mphal.h"
+#include "extmod/modmachine.h"
+
+// The port must provide implementations of these low-level ADCBlock functions.
+STATIC void mp_machine_adc_block_print(const mp_print_t *print, machine_adc_block_obj_t *self);
+STATIC machine_adc_block_obj_t *mp_machine_adc_block_get(mp_int_t unit);
+STATIC void mp_machine_adc_block_bits_set(machine_adc_block_obj_t *self, mp_int_t bits);
+STATIC machine_adc_obj_t *mp_machine_adc_block_connect(machine_adc_block_obj_t *self, mp_int_t channel_id, mp_hal_pin_obj_t pin, mp_map_t *kw_args);
+
+// The port provides implementations of the above in this file.
+#include MICROPY_PY_MACHINE_ADC_BLOCK_INCLUDEFILE
+
+STATIC void machine_adc_block_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_adc_block_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_machine_adc_block_print(print, self);
+}
+
+STATIC void machine_adc_block_init_helper(machine_adc_block_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    enum {
+        ARG_bits,
+    };
+
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+    };
+
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_pos_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    mp_int_t bits = args[ARG_bits].u_int;
+    mp_machine_adc_block_bits_set(self, bits);
+}
+
+STATIC mp_obj_t machine_adc_block_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
+    mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
+    mp_int_t unit = mp_obj_get_int(args[0]);
+    machine_adc_block_obj_t *self = mp_machine_adc_block_get(unit);
+    if (self == NULL) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid block id"));
+    }
+
+    mp_map_t kw_args;
+    mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
+    machine_adc_block_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
+STATIC mp_obj_t machine_adc_block_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    machine_adc_block_obj_t *self = pos_args[0];
+    machine_adc_block_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_adc_block_init_obj, 1, machine_adc_block_init);
+
+STATIC mp_obj_t machine_adc_block_connect(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    machine_adc_block_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+    mp_int_t channel_id = -1;
+    mp_hal_pin_obj_t pin = -1;
+    if (n_pos_args == 2) {
+        if (mp_obj_is_int(pos_args[1])) {
+            channel_id = mp_obj_get_int(pos_args[1]);
+        } else {
+            pin = mp_hal_get_pin_obj(pos_args[1]);
+        }
+    } else if (n_pos_args == 3) {
+        channel_id = mp_obj_get_int(pos_args[1]);
+        pin = mp_hal_get_pin_obj(pos_args[2]);
+    } else {
+        mp_raise_TypeError(MP_ERROR_TEXT("too many positional args"));
+    }
+
+    machine_adc_obj_t *adc = mp_machine_adc_block_connect(self, channel_id, pin, kw_args);
+    if (adc == NULL) {
+        mp_raise_ValueError(MP_ERROR_TEXT("no matching ADC"));
+    }
+
+    return MP_OBJ_FROM_PTR(adc);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_adc_block_connect_obj, 2, machine_adc_block_connect);
+
+STATIC const mp_rom_map_elem_t machine_adc_block_locals_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_adc_block_init_obj) },
+    { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&machine_adc_block_connect_obj) },
+};
+STATIC MP_DEFINE_CONST_DICT(machine_adc_block_locals_dict, machine_adc_block_locals_dict_table);
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_adc_block_type,
+    MP_QSTR_ADCBlock,
+    MP_TYPE_FLAG_NONE,
+    make_new, machine_adc_block_make_new,
+    print, machine_adc_block_print,
+    locals_dict, &machine_adc_block_locals_dict
+    );
+
+#endif // MICROPY_PY_MACHINE_ADC_BLOCK
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index 6cace4f851..0744ef7889 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -128,6 +128,7 @@
 
 // A port must provide these types, but they are otherwise opaque.
 typedef struct _machine_adc_obj_t machine_adc_obj_t;
+typedef struct _machine_adc_block_obj_t machine_adc_block_obj_t;
 typedef struct _machine_i2s_obj_t machine_i2s_obj_t;
 typedef struct _machine_pwm_obj_t machine_pwm_obj_t;
 typedef struct _machine_uart_obj_t machine_uart_obj_t;
@@ -200,6 +201,7 @@ extern const machine_mem_obj_t machine_mem32_obj;
 // Their Python bindings are implemented in extmod, and their implementation
 // is provided by a port.
 extern const mp_obj_type_t machine_adc_type;
+extern const mp_obj_type_t machine_adc_block_type;
 extern const mp_obj_type_t machine_i2c_type;
 extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_mem_type;
diff --git a/ports/esp32/adc.c b/ports/esp32/adc.c
new file mode 100644
index 0000000000..c5886624ec
--- /dev/null
+++ b/ports/esp32/adc.c
@@ -0,0 +1,92 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Nick Moore
+ * Copyright (c) 2021 Jonathan Hogg
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "adc.h"
+#include "driver/adc.h"
+
+#define DEFAULT_VREF 1100
+
+void madcblock_bits_helper(machine_adc_block_obj_t *self, mp_int_t bits) {
+    switch (bits) {
+        #if CONFIG_IDF_TARGET_ESP32
+        case 9:
+            self->width = ADC_WIDTH_BIT_9;
+            break;
+        case 10:
+            self->width = ADC_WIDTH_BIT_10;
+            break;
+        case 11:
+            self->width = ADC_WIDTH_BIT_11;
+            break;
+        #endif
+        #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
+        case 12:
+            self->width = ADC_WIDTH_BIT_12;
+            break;
+        #endif
+        #if CONFIG_IDF_TARGET_ESP32S2
+        case 13:
+            self->width = ADC_WIDTH_BIT_13;
+            break;
+        #endif
+        default:
+            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
+    }
+    self->bits = bits;
+
+    if (self->unit_id == ADC_UNIT_1) {
+        adc1_config_width(self->width);
+    }
+    for (adc_atten_t atten = ADC_ATTEN_DB_0; atten < ADC_ATTEN_MAX; atten++) {
+        if (self->characteristics[atten] != NULL) {
+            esp_adc_cal_characterize(self->unit_id, atten, self->width, DEFAULT_VREF, self->characteristics[atten]);
+        }
+    }
+}
+
+mp_int_t madcblock_read_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id) {
+    int raw;
+    if (self->unit_id == ADC_UNIT_1) {
+        raw = adc1_get_raw(channel_id);
+    } else {
+        check_esp_err(adc2_get_raw(channel_id, self->width, &raw));
+    }
+    return raw;
+}
+
+mp_int_t madcblock_read_uv_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id, adc_atten_t atten) {
+    int raw = madcblock_read_helper(self, channel_id);
+    esp_adc_cal_characteristics_t *adc_chars = self->characteristics[atten];
+    if (adc_chars == NULL) {
+        adc_chars = malloc(sizeof(esp_adc_cal_characteristics_t));
+        esp_adc_cal_characterize(self->unit_id, atten, self->width, DEFAULT_VREF, adc_chars);
+        self->characteristics[atten] = adc_chars;
+    }
+    mp_int_t uv = esp_adc_cal_raw_to_voltage(raw, adc_chars) * 1000;
+    return uv;
+}
diff --git a/ports/esp32/adc.h b/ports/esp32/adc.h
new file mode 100644
index 0000000000..ae5c0d3c37
--- /dev/null
+++ b/ports/esp32/adc.h
@@ -0,0 +1,60 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * Development of the code in this file was sponsored by Microbric Pty Ltd
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ESP32_ADC_H
+#define MICROPY_INCLUDED_ESP32_ADC_H
+
+#include "py/runtime.h"
+#include "esp_adc_cal.h"
+
+#define ADC_ATTEN_MAX SOC_ADC_ATTEN_NUM
+
+typedef struct _machine_adc_block_obj_t {
+    mp_obj_base_t base;
+    adc_unit_t unit_id;
+    mp_int_t bits;
+    adc_bits_width_t width;
+    esp_adc_cal_characteristics_t *characteristics[ADC_ATTEN_MAX];
+} machine_adc_block_obj_t;
+
+typedef struct _machine_adc_obj_t {
+    mp_obj_base_t base;
+    machine_adc_block_obj_t *block;
+    adc_channel_t channel_id;
+    gpio_num_t gpio_id;
+} machine_adc_obj_t;
+
+extern machine_adc_block_obj_t madcblock_obj[];
+
+void madcblock_bits_helper(machine_adc_block_obj_t *self, mp_int_t bits);
+mp_int_t madcblock_read_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id);
+mp_int_t madcblock_read_uv_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id, adc_atten_t atten);
+
+const machine_adc_obj_t *madc_search_helper(machine_adc_block_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id);
+void madc_init_helper(const machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+
+#endif // MICROPY_INCLUDED_ESP32_ADC_H
diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index f66c59e341..40ae98822d 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -53,6 +53,7 @@ list(APPEND MICROPY_SOURCE_DRIVERS
 )
 
 list(APPEND MICROPY_SOURCE_PORT
+    adc.c
     main.c
     ppp_set_auth.c
     uart.c
@@ -66,7 +67,6 @@ list(APPEND MICROPY_SOURCE_PORT
     machine_timer.c
     machine_pin.c
     machine_touchpad.c
-    machine_adcblock.c
     machine_dac.c
     machine_i2c.c
     modmachine.c
diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c
index 42746cb4bd..b5233e4dda 100644
--- a/ports/esp32/machine_adc.c
+++ b/ports/esp32/machine_adc.c
@@ -28,13 +28,9 @@
 // This file is never compiled standalone, it's included directly from
 // extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
 
-#include "esp_log.h"
-
-#include "driver/gpio.h"
-#include "driver/adc.h"
-
 #include "py/mphal.h"
-#include "machine_adc.h"
+#include "adc.h"
+#include "driver/adc.h"
 
 #define ADCBLOCK1 (&madcblock_obj[0])
 #define ADCBLOCK2 (&madcblock_obj[1])
@@ -136,7 +132,7 @@ static inline void madc_atten_set(const machine_adc_obj_t *self, adc_atten_t att
     madc_obj_atten[self - &madc_obj[0]] = atten + 1;
 }
 
-const machine_adc_obj_t *madc_search_helper(madcblock_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id) {
+const machine_adc_obj_t *madc_search_helper(machine_adc_block_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id) {
     for (int i = 0; i < MP_ARRAY_SIZE(madc_obj); i++) {
         const machine_adc_obj_t *adc = &madc_obj[i];
         if ((block == NULL || block == adc->block) && (channel_id == -1 || channel_id == adc->channel_id) && (gpio_id == -1 || gpio_id == adc->gpio_id)) {
diff --git a/ports/esp32/machine_adc.h b/ports/esp32/machine_adc.h
deleted file mode 100644
index 6d06486c30..0000000000
--- a/ports/esp32/machine_adc.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef MICROPY_INCLUDED_MACHINE_ADC_H
-#define MICROPY_INCLUDED_MACHINE_ADC_H
-
-#include "machine_adcblock.h"
-
-typedef struct _machine_adc_obj_t {
-    mp_obj_base_t base;
-    madcblock_obj_t *block;
-    adc_channel_t channel_id;
-    gpio_num_t gpio_id;
-} machine_adc_obj_t;
-
-const machine_adc_obj_t *madc_search_helper(madcblock_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id);
-void madc_init_helper(const machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
-
-#endif // MICROPY_INCLUDED_MACHINE_ADC_H
diff --git a/ports/esp32/machine_adc_block.c b/ports/esp32/machine_adc_block.c
new file mode 100644
index 0000000000..f2975ff2f2
--- /dev/null
+++ b/ports/esp32/machine_adc_block.c
@@ -0,0 +1,72 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Jonathan Hogg
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc_block.c via MICROPY_PY_MACHINE_ADC_BLOCK_INCLUDEFILE.
+
+#include "py/mphal.h"
+#include "adc.h"
+#include "driver/adc.h"
+
+machine_adc_block_obj_t madcblock_obj[] = {
+    #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
+    {{&machine_adc_block_type}, ADC_UNIT_1, 12, -1, {0}},
+    {{&machine_adc_block_type}, ADC_UNIT_2, 12, -1, {0}},
+    #elif CONFIG_IDF_TARGET_ESP32S2
+    {{&machine_adc_block_type}, ADC_UNIT_1, 13, -1, {0}},
+    {{&machine_adc_block_type}, ADC_UNIT_2, 13, -1, {0}},
+    #endif
+};
+
+STATIC void mp_machine_adc_block_print(const mp_print_t *print, machine_adc_block_obj_t *self) {
+    mp_printf(print, "ADCBlock(%u, bits=%u)", self->unit_id, self->bits);
+}
+
+STATIC void mp_machine_adc_block_bits_set(machine_adc_block_obj_t *self, mp_int_t bits) {
+    if (bits != -1) {
+        madcblock_bits_helper(self, bits);
+    } else if (self->width == -1) {
+        madcblock_bits_helper(self, self->bits);
+    }
+}
+
+STATIC machine_adc_block_obj_t *mp_machine_adc_block_get(mp_int_t unit) {
+    for (int i = 0; i < MP_ARRAY_SIZE(madcblock_obj); i++) {
+        if (unit == madcblock_obj[i].unit_id) {
+            return &madcblock_obj[i];
+        }
+    }
+    return NULL;
+}
+
+STATIC machine_adc_obj_t *mp_machine_adc_block_connect(machine_adc_block_obj_t *self, mp_int_t channel_id, mp_hal_pin_obj_t gpio_id, mp_map_t *kw_args) {
+    const machine_adc_obj_t *adc = madc_search_helper(self, channel_id, gpio_id);
+    if (adc == NULL) {
+        return NULL;
+    }
+    madc_init_helper(adc, 0, NULL, kw_args);
+    return (machine_adc_obj_t *)adc;
+}
diff --git a/ports/esp32/machine_adcblock.c b/ports/esp32/machine_adcblock.c
deleted file mode 100644
index 8d5296e2e5..0000000000
--- a/ports/esp32/machine_adcblock.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2021 Jonathan Hogg
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include <stdio.h>
-
-#include "esp_log.h"
-
-#include "driver/gpio.h"
-#include "driver/adc.h"
-
-#include "py/runtime.h"
-#include "py/mphal.h"
-#include "modmachine.h"
-#include "machine_adc.h"
-#include "machine_adcblock.h"
-
-#define DEFAULT_VREF 1100
-
-madcblock_obj_t madcblock_obj[] = {
-    #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
-    {{&machine_adcblock_type}, ADC_UNIT_1, 12, -1, {0}},
-    {{&machine_adcblock_type}, ADC_UNIT_2, 12, -1, {0}},
-    #elif CONFIG_IDF_TARGET_ESP32S2
-    {{&machine_adcblock_type}, ADC_UNIT_1, 13, -1, {0}},
-    {{&machine_adcblock_type}, ADC_UNIT_2, 13, -1, {0}},
-    #endif
-};
-
-STATIC void madcblock_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    madcblock_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "ADCBlock(%u, bits=%u)", self->unit_id, self->bits);
-}
-
-void madcblock_bits_helper(madcblock_obj_t *self, mp_int_t bits) {
-    switch (bits) {
-        #if CONFIG_IDF_TARGET_ESP32
-        case 9:
-            self->width = ADC_WIDTH_BIT_9;
-            break;
-        case 10:
-            self->width = ADC_WIDTH_BIT_10;
-            break;
-        case 11:
-            self->width = ADC_WIDTH_BIT_11;
-            break;
-        #endif
-        #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
-        case 12:
-            self->width = ADC_WIDTH_BIT_12;
-            break;
-        #endif
-        #if CONFIG_IDF_TARGET_ESP32S2
-        case 13:
-            self->width = ADC_WIDTH_BIT_13;
-            break;
-        #endif
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
-    }
-    self->bits = bits;
-
-    if (self->unit_id == ADC_UNIT_1) {
-        adc1_config_width(self->width);
-    }
-    for (adc_atten_t atten = ADC_ATTEN_DB_0; atten < ADC_ATTEN_MAX; atten++) {
-        if (self->characteristics[atten] != NULL) {
-            esp_adc_cal_characterize(self->unit_id, atten, self->width, DEFAULT_VREF, self->characteristics[atten]);
-        }
-    }
-}
-
-STATIC void madcblock_init_helper(madcblock_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    enum {
-        ARG_bits,
-    };
-
-    static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
-    };
-
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_pos_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-    mp_int_t bits = args[ARG_bits].u_int;
-    if (bits != -1) {
-        madcblock_bits_helper(self, bits);
-    } else if (self->width == -1) {
-        madcblock_bits_helper(self, self->bits);
-    }
-}
-
-STATIC mp_obj_t madcblock_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
-    mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
-    adc_unit_t unit = mp_obj_get_int(args[0]);
-    madcblock_obj_t *self = NULL;
-    for (int i = 0; i < MP_ARRAY_SIZE(madcblock_obj); i++) {
-        if (unit == madcblock_obj[i].unit_id) {
-            self = &madcblock_obj[i];
-            break;
-        }
-    }
-    if (!self) {
-        mp_raise_ValueError(MP_ERROR_TEXT("invalid block id"));
-    }
-
-    mp_map_t kw_args;
-    mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
-    madcblock_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
-
-    return MP_OBJ_FROM_PTR(self);
-}
-
-STATIC mp_obj_t madcblock_init(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    madcblock_obj_t *self = pos_args[0];
-    madcblock_init_helper(self, n_pos_args - 1, pos_args + 1, kw_args);
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(madcblock_init_obj, 1, madcblock_init);
-
-STATIC mp_obj_t madcblock_connect(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    madcblock_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
-    adc_channel_t channel_id = -1;
-    gpio_num_t gpio_id = -1;
-    if (n_pos_args == 2) {
-        if (mp_obj_is_int(pos_args[1])) {
-            channel_id = mp_obj_get_int(pos_args[1]);
-        } else {
-            gpio_id = machine_pin_get_id(pos_args[1]);
-        }
-    } else if (n_pos_args == 3) {
-        channel_id = mp_obj_get_int(pos_args[1]);
-        gpio_id = machine_pin_get_id(pos_args[2]);
-    } else {
-        mp_raise_TypeError(MP_ERROR_TEXT("too many positional args"));
-    }
-
-    const machine_adc_obj_t *adc = madc_search_helper(self, channel_id, gpio_id);
-    if (adc != NULL) {
-        madc_init_helper(adc, 0, pos_args + n_pos_args, kw_args);
-        return MP_OBJ_FROM_PTR(adc);
-    }
-    mp_raise_ValueError(MP_ERROR_TEXT("no matching ADC"));
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(madcblock_connect_obj, 2, madcblock_connect);
-
-mp_int_t madcblock_read_helper(madcblock_obj_t *self, adc_channel_t channel_id) {
-    int raw;
-    if (self->unit_id == ADC_UNIT_1) {
-        raw = adc1_get_raw(channel_id);
-    } else {
-        check_esp_err(adc2_get_raw(channel_id, self->width, &raw));
-    }
-    return raw;
-}
-
-mp_int_t madcblock_read_uv_helper(madcblock_obj_t *self, adc_channel_t channel_id, adc_atten_t atten) {
-    int raw = madcblock_read_helper(self, channel_id);
-    esp_adc_cal_characteristics_t *adc_chars = self->characteristics[atten];
-    if (adc_chars == NULL) {
-        adc_chars = malloc(sizeof(esp_adc_cal_characteristics_t));
-        esp_adc_cal_characterize(self->unit_id, atten, self->width, DEFAULT_VREF, adc_chars);
-        self->characteristics[atten] = adc_chars;
-    }
-    mp_int_t uv = esp_adc_cal_raw_to_voltage(raw, adc_chars) * 1000;
-    return uv;
-}
-
-STATIC const mp_rom_map_elem_t madcblock_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&madcblock_init_obj) },
-    { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&madcblock_connect_obj) },
-};
-STATIC MP_DEFINE_CONST_DICT(madcblock_locals_dict, madcblock_locals_dict_table);
-
-MP_DEFINE_CONST_OBJ_TYPE(
-    machine_adcblock_type,
-    MP_QSTR_ADCBlock,
-    MP_TYPE_FLAG_NONE,
-    make_new, madcblock_make_new,
-    print, madcblock_print,
-    locals_dict, &madcblock_locals_dict
-    );
diff --git a/ports/esp32/machine_adcblock.h b/ports/esp32/machine_adcblock.h
deleted file mode 100644
index 7c9249b072..0000000000
--- a/ports/esp32/machine_adcblock.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef MICROPY_INCLUDED_MACHINE_ADCBLOCK_H
-#define MICROPY_INCLUDED_MACHINE_ADCBLOCK_H
-
-#include "esp_adc_cal.h"
-
-#define ADC_ATTEN_MAX SOC_ADC_ATTEN_NUM
-
-typedef struct _madcblock_obj_t {
-    mp_obj_base_t base;
-    adc_unit_t unit_id;
-    mp_int_t bits;
-    adc_bits_width_t width;
-    esp_adc_cal_characteristics_t *characteristics[ADC_ATTEN_MAX];
-} madcblock_obj_t;
-
-extern madcblock_obj_t madcblock_obj[];
-
-extern void madcblock_bits_helper(madcblock_obj_t *self, mp_int_t bits);
-extern mp_int_t madcblock_read_helper(madcblock_obj_t *self, adc_channel_t channel_id);
-extern mp_int_t madcblock_read_uv_helper(madcblock_obj_t *self, adc_channel_t channel_id, adc_atten_t atten);
-
-#endif // MICROPY_INCLUDED_MACHINE_ADCBLOCK_H
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 1e83935a8b..461ddacdad 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -312,7 +312,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     #if MICROPY_PY_MACHINE_ADC
     { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
     #endif
-    { MP_ROM_QSTR(MP_QSTR_ADCBlock), MP_ROM_PTR(&machine_adcblock_type) },
+    #if MICROPY_PY_MACHINE_ADC_BLOCK
+    { MP_ROM_QSTR(MP_QSTR_ADCBlock), MP_ROM_PTR(&machine_adc_block_type) },
+    #endif
     #if MICROPY_PY_MACHINE_DAC
     { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&machine_dac_type) },
     #endif
diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h
index 7b26df609d..06a1d7b0e2 100644
--- a/ports/esp32/modmachine.h
+++ b/ports/esp32/modmachine.h
@@ -10,7 +10,6 @@ typedef enum {
 } wake_type_t;
 
 extern const mp_obj_type_t machine_touchpad_type;
-extern const mp_obj_type_t machine_adcblock_type;
 extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_sdcard_type;
 
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index b4ec082092..706baae5b2 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -99,10 +99,11 @@
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/esp32/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH  (1)
-#define MICROPY_PY_MACHINE_ADC_BLOCK        (1)
 #define MICROPY_PY_MACHINE_ADC_INIT         (1)
 #define MICROPY_PY_MACHINE_ADC_READ         (1)
 #define MICROPY_PY_MACHINE_ADC_READ_UV      (1)
+#define MICROPY_PY_MACHINE_ADC_BLOCK        (1)
+#define MICROPY_PY_MACHINE_ADC_BLOCK_INCLUDEFILE "ports/esp32/machine_adc_block.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM        (1)
 #define MICROPY_PY_MACHINE_PULSE            (1)
diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h
index 9bb3196b37..22d1fc475e 100644
--- a/ports/renesas-ra/modmachine.h
+++ b/ports/renesas-ra/modmachine.h
@@ -30,7 +30,6 @@
 #include "py/obj.h"
 
 extern const mp_obj_type_t machine_touchpad_type;
-extern const mp_obj_type_t machine_adcblock_type;
 extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_sdcard_type;
 

From 958c6d917dac86e844458974e6faa8f9552c04f7 Mon Sep 17 00:00:00 2001
From: stijn <stijn@ignitron.net>
Date: Tue, 15 Nov 2022 15:13:29 +0100
Subject: [PATCH 133/310] windows: Use the MicroPython logo as application
 icon.

Add a .ico file with common icon image size, created from
vector-logo-2.png, and embed it into the resulting executable.

Signed-off-by: stijn <stijn@ignitron.net>
---
 .gitattributes                    |   1 +
 logo/vector-logo-2.ico            | Bin 0 -> 170356 bytes
 ports/windows/Makefile            |   6 ++++++
 ports/windows/README.md           |  10 ++++++++++
 ports/windows/micropython.rc      |   1 +
 ports/windows/micropython.vcxproj |   3 +++
 py/mkenv.mk                       |   1 +
 7 files changed, 22 insertions(+)
 create mode 100644 logo/vector-logo-2.ico
 create mode 100644 ports/windows/micropython.rc

diff --git a/.gitattributes b/.gitattributes
index e6d31d6aa3..fe0c4b47e0 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -8,6 +8,7 @@
 
 # These are binary so should never be modified by git.
 *.a binary
+*.ico binary
 *.png binary
 *.jpg binary
 *.dxf binary
diff --git a/logo/vector-logo-2.ico b/logo/vector-logo-2.ico
new file mode 100644
index 0000000000000000000000000000000000000000..24b12812cf49e2dd31050869020c2a359152d2e2
GIT binary patch
literal 170356
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literal 0
HcmV?d00001

diff --git a/ports/windows/Makefile b/ports/windows/Makefile
index 47ce664d7b..2215ce38d1 100644
--- a/ports/windows/Makefile
+++ b/ports/windows/Makefile
@@ -102,3 +102,9 @@ test: $(BUILD)/$(PROG) $(TOP)/tests/run-tests.py
 test_full: test
 	$(eval DIRNAME=ports/$(notdir $(CURDIR)))
 	cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/$(BUILD)/$(PROG) $(PYTHON) ./run-tests.py --via-mpy $(RUN_TESTS_MPY_CROSS_FLAGS) $(RUN_TESTS_SKIP) -d basics float micropython
+
+$(BUILD)/$(PROG): $(BUILD)/micropython.res
+
+$(BUILD)/%.res: %.rc
+	$(ECHO) "WINDRES $<"
+	$(Q)$(WINDRES) $< -O coff -o $@
diff --git a/ports/windows/README.md b/ports/windows/README.md
index 7b5f92f10a..2b3ed44599 100644
--- a/ports/windows/README.md
+++ b/ports/windows/README.md
@@ -135,3 +135,13 @@ For more info, see https://www.winehq.org/docs/wineusr-guide/cui-programs .
 If built without line editing and history capabilities
 (MICROPY_USE_READLINE=0), the resulting binary can be run using the standard
 `wine` tool.
+
+
+Generating the icon file
+------------------------
+The windows builds use a .ico file for the executable logo.
+To generate such file from a .png file use ImageMagick, as was done for the icons in the logo/ directory:
+
+    magick convert vector-logo-2.png -define icon:auto-resize="256,128,96,64,48,32,16" vector-logo-2.ico
+
+Note that for versions prior to 7.0 the command is `convert` instead of `magick convert`.
diff --git a/ports/windows/micropython.rc b/ports/windows/micropython.rc
new file mode 100644
index 0000000000..8d92bb0d81
--- /dev/null
+++ b/ports/windows/micropython.rc
@@ -0,0 +1 @@
+app     ICON    "../../logo/vector-logo-2.ico"
diff --git a/ports/windows/micropython.vcxproj b/ports/windows/micropython.vcxproj
index de04975cd4..d5affd9e23 100644
--- a/ports/windows/micropython.vcxproj
+++ b/ports/windows/micropython.vcxproj
@@ -103,6 +103,9 @@
     <ClInclude Include="$(PyBaseDir)ports\windows\*.h" />
     <ClInclude Include="$(PyBaseDir)ports\windows\msvc\*.h" />
   </ItemGroup>
+  <ItemGroup>
+    <ResourceCompile Include="micropython.rc" />
+  </ItemGroup>
   <Import Project="msvc/genhdr.targets" />
   <Import Project="$(CustomPropsFile)" Condition="exists('$(CustomPropsFile)')" />
   <Target Name="GenerateMicroPythonSources" BeforeTargets="BuildGenerateSources" DependsOnTargets="GenerateHeaders;FreezeModules">
diff --git a/py/mkenv.mk b/py/mkenv.mk
index d3dddcc32d..b52dafbc9d 100644
--- a/py/mkenv.mk
+++ b/py/mkenv.mk
@@ -54,6 +54,7 @@ OBJCOPY = $(CROSS_COMPILE)objcopy
 SIZE = $(CROSS_COMPILE)size
 STRIP = $(CROSS_COMPILE)strip
 AR = $(CROSS_COMPILE)ar
+WINDRES = $(CROSS_COMPILE)windres
 
 MAKE_MANIFEST = $(PYTHON) $(TOP)/tools/makemanifest.py
 MAKE_FROZEN = $(PYTHON) $(TOP)/tools/make-frozen.py

From dff293840e381444bcd843a325ab3dd7da685733 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 8 Nov 2023 23:34:08 +1100
Subject: [PATCH 134/310] extmod/machine_i2c: Do a fast poll during I2C.scan().

Fixes issue #12912.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_i2c.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/extmod/machine_i2c.c b/extmod/machine_i2c.c
index 44e6921309..6cc2aa5bbf 100644
--- a/extmod/machine_i2c.c
+++ b/extmod/machine_i2c.c
@@ -328,7 +328,12 @@ STATIC mp_obj_t machine_i2c_scan(mp_obj_t self_in) {
         if (ret == 0) {
             mp_obj_list_append(list, MP_OBJ_NEW_SMALL_INT(addr));
         }
-        #ifdef MICROPY_EVENT_POLL_HOOK
+        // This scan loop may run for some time, so process any pending events/exceptions,
+        // or allow the port to run any necessary background tasks.  But do it as fast as
+        // possible, in particular we are not waiting on any events.
+        #if defined(MICROPY_EVENT_POLL_HOOK_FAST)
+        MICROPY_EVENT_POLL_HOOK_FAST;
+        #elif defined(MICROPY_EVENT_POLL_HOOK)
         MICROPY_EVENT_POLL_HOOK
         #endif
     }

From 4cf741062b20fa34062d236d56b2168515e990b4 Mon Sep 17 00:00:00 2001
From: Andrew Leech <andrew.leech@planetinnovation.com.au>
Date: Tue, 31 Oct 2023 15:14:05 +1100
Subject: [PATCH 135/310] extmod/vfs_reader: Add file ioctl to set read buffer
 size.

Can be used to speed up importing a file from a vfs based filesystem.

Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
---
 extmod/vfs_reader.c            | 50 ++++++++++++++++++++++++----------
 py/stream.h                    |  1 +
 tests/extmod/vfs_userfs.py     | 18 +++++++++++-
 tests/extmod/vfs_userfs.py.exp | 16 +++++++++++
 4 files changed, 69 insertions(+), 16 deletions(-)

diff --git a/extmod/vfs_reader.c b/extmod/vfs_reader.c
index 3c6ff52a99..13fc31bee5 100644
--- a/extmod/vfs_reader.c
+++ b/extmod/vfs_reader.c
@@ -26,6 +26,7 @@
 
 #include <stdio.h>
 #include <string.h>
+#include <stdlib.h>
 
 #include "py/runtime.h"
 #include "py/stream.h"
@@ -34,33 +35,39 @@
 
 #if MICROPY_READER_VFS
 
+#ifndef MICROPY_READER_VFS_DEFAULT_BUFFER_SIZE
+#define MICROPY_READER_VFS_DEFAULT_BUFFER_SIZE (2 * MICROPY_BYTES_PER_GC_BLOCK - offsetof(mp_reader_vfs_t, buf))
+#endif
+#define MICROPY_READER_VFS_MIN_BUFFER_SIZE (MICROPY_BYTES_PER_GC_BLOCK - offsetof(mp_reader_vfs_t, buf))
+#define MICROPY_READER_VFS_MAX_BUFFER_SIZE (255)
+
 typedef struct _mp_reader_vfs_t {
     mp_obj_t file;
-    uint16_t len;
-    uint16_t pos;
-    byte buf[24];
+    uint8_t bufpos;
+    uint8_t buflen;
+    uint8_t bufsize;
+    byte buf[];
 } mp_reader_vfs_t;
 
 STATIC mp_uint_t mp_reader_vfs_readbyte(void *data) {
     mp_reader_vfs_t *reader = (mp_reader_vfs_t *)data;
-    if (reader->pos >= reader->len) {
-        if (reader->len < sizeof(reader->buf)) {
+    if (reader->bufpos >= reader->buflen) {
+        if (reader->buflen < reader->bufsize) {
             return MP_READER_EOF;
         } else {
             int errcode;
-            reader->len = mp_stream_rw(reader->file, reader->buf, sizeof(reader->buf),
-                &errcode, MP_STREAM_RW_READ | MP_STREAM_RW_ONCE);
+            reader->buflen = mp_stream_rw(reader->file, reader->buf, reader->bufsize, &errcode, MP_STREAM_RW_READ | MP_STREAM_RW_ONCE);
             if (errcode != 0) {
                 // TODO handle errors properly
                 return MP_READER_EOF;
             }
-            if (reader->len == 0) {
+            if (reader->buflen == 0) {
                 return MP_READER_EOF;
             }
-            reader->pos = 0;
+            reader->bufpos = 0;
         }
     }
-    return reader->buf[reader->pos++];
+    return reader->buf[reader->bufpos++];
 }
 
 STATIC void mp_reader_vfs_close(void *data) {
@@ -70,18 +77,31 @@ STATIC void mp_reader_vfs_close(void *data) {
 }
 
 void mp_reader_new_file(mp_reader_t *reader, qstr filename) {
-    mp_reader_vfs_t *rf = m_new_obj(mp_reader_vfs_t);
     mp_obj_t args[2] = {
         MP_OBJ_NEW_QSTR(filename),
         MP_OBJ_NEW_QSTR(MP_QSTR_rb),
     };
-    rf->file = mp_vfs_open(MP_ARRAY_SIZE(args), &args[0], (mp_map_t *)&mp_const_empty_map);
-    int errcode;
-    rf->len = mp_stream_rw(rf->file, rf->buf, sizeof(rf->buf), &errcode, MP_STREAM_RW_READ | MP_STREAM_RW_ONCE);
+    mp_obj_t file = mp_vfs_open(MP_ARRAY_SIZE(args), &args[0], (mp_map_t *)&mp_const_empty_map);
+
+    const mp_stream_p_t *stream_p = mp_get_stream(file);
+    int errcode = 0;
+    mp_uint_t bufsize = stream_p->ioctl(file, MP_STREAM_GET_BUFFER_SIZE, 0, &errcode);
+    if (bufsize == MP_STREAM_ERROR || bufsize == 0) {
+        // bufsize == 0 is included here to support mpremote v1.21 and older where mount file ioctl
+        // returned 0 by default.
+        bufsize = MICROPY_READER_VFS_DEFAULT_BUFFER_SIZE;
+    } else {
+        bufsize = MIN(MICROPY_READER_VFS_MAX_BUFFER_SIZE, MAX(MICROPY_READER_VFS_MIN_BUFFER_SIZE, bufsize));
+    }
+
+    mp_reader_vfs_t *rf = m_new_obj_var(mp_reader_vfs_t, buf, byte, bufsize);
+    rf->file = file;
+    rf->bufsize = bufsize;
+    rf->buflen = mp_stream_rw(rf->file, rf->buf, rf->bufsize, &errcode, MP_STREAM_RW_READ | MP_STREAM_RW_ONCE);
     if (errcode != 0) {
         mp_raise_OSError(errcode);
     }
-    rf->pos = 0;
+    rf->bufpos = 0;
     reader->data = rf;
     reader->readbyte = mp_reader_vfs_readbyte;
     reader->close = mp_reader_vfs_close;
diff --git a/py/stream.h b/py/stream.h
index 6b5c85ab15..e6e6f283df 100644
--- a/py/stream.h
+++ b/py/stream.h
@@ -43,6 +43,7 @@
 #define MP_STREAM_GET_DATA_OPTS (8)  // Get data/message options
 #define MP_STREAM_SET_DATA_OPTS (9)  // Set data/message options
 #define MP_STREAM_GET_FILENO    (10) // Get fileno of underlying file
+#define MP_STREAM_GET_BUFFER_SIZE (11) // Get preferred buffer size for file
 
 // These poll ioctl values are compatible with Linux
 #define MP_STREAM_POLL_RD       (0x0001)
diff --git a/tests/extmod/vfs_userfs.py b/tests/extmod/vfs_userfs.py
index 36f1088870..5c487315eb 100644
--- a/tests/extmod/vfs_userfs.py
+++ b/tests/extmod/vfs_userfs.py
@@ -16,6 +16,8 @@ except (ImportError, AttributeError):
 
 
 class UserFile(io.IOBase):
+    buffer_size = 16
+
     def __init__(self, mode, data):
         assert isinstance(data, bytes)
         self.is_text = mode.find("b") == -1
@@ -39,7 +41,11 @@ class UserFile(io.IOBase):
 
     def ioctl(self, req, arg):
         print("ioctl", req, arg)
-        return 0
+        if req == 4:  # MP_STREAM_CLOSE
+            return 0
+        if req == 11:  # MP_STREAM_GET_BUFFER_SIZE
+            return UserFile.buffer_size
+        return -1
 
 
 class UserFS:
@@ -70,6 +76,8 @@ user_files = {
     "/usermod2.py": b"print('in usermod2')",
     "/usermod3.py": b"syntax error",
     "/usermod4.mpy": b"syntax error",
+    "/usermod5.py": b"print('in usermod5')",
+    "/usermod6.py": b"print('in usermod6')",
 }
 os.mount(UserFS(user_files), "/userfs")
 
@@ -93,6 +101,14 @@ try:
 except ValueError:
     print("ValueError in usermod4")
 
+# Test an import with largest buffer size
+UserFile.buffer_size = 255
+import usermod5
+
+# Test an import with over-size buffer size (should be safely limited internally)
+UserFile.buffer_size = 1024
+import usermod6
+
 # unmount and undo path addition
 os.umount("/userfs")
 sys.path.pop()
diff --git a/tests/extmod/vfs_userfs.py.exp b/tests/extmod/vfs_userfs.py.exp
index 05cff0452c..be8011d567 100644
--- a/tests/extmod/vfs_userfs.py.exp
+++ b/tests/extmod/vfs_userfs.py.exp
@@ -3,21 +3,37 @@ some data in a text file
 stat /usermod1
 stat /usermod1.py
 open /usermod1.py rb
+ioctl 11 0
 ioctl 4 0
 in usermod1
 stat /usermod2
 stat /usermod2.py
 open /usermod2.py rb
+ioctl 11 0
 ioctl 4 0
 in usermod2
 stat /usermod3
 stat /usermod3.py
 open /usermod3.py rb
+ioctl 11 0
 ioctl 4 0
 SyntaxError in usermod3
 stat /usermod4
 stat /usermod4.py
 stat /usermod4.mpy
 open /usermod4.mpy rb
+ioctl 11 0
 ioctl 4 0
 ValueError in usermod4
+stat /usermod5
+stat /usermod5.py
+open /usermod5.py rb
+ioctl 11 0
+ioctl 4 0
+in usermod5
+stat /usermod6
+stat /usermod6.py
+open /usermod6.py rb
+ioctl 11 0
+ioctl 4 0
+in usermod6

From bbc5a18d092425bee802d88a5c9ed3516056bdd5 Mon Sep 17 00:00:00 2001
From: Andrew Leech <andrew.leech@planetinnovation.com.au>
Date: Wed, 1 Nov 2023 15:14:37 +1100
Subject: [PATCH 136/310] tools/mpremote: Add ioctl to specify large read
 buffer size.

Speeds up importing files from mounted filesystem.

Also fix the return code for invalid / unsupported ioctl requests.

Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
---
 tools/mpremote/mpremote/transport_serial.py | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/tools/mpremote/mpremote/transport_serial.py b/tools/mpremote/mpremote/transport_serial.py
index 23a379d16b..3b4cd00078 100644
--- a/tools/mpremote/mpremote/transport_serial.py
+++ b/tools/mpremote/mpremote/transport_serial.py
@@ -753,6 +753,13 @@ class RemoteFile(io.IOBase):
             machine.mem32[arg] = self.seek(machine.mem32[arg], machine.mem32[arg + 4])
         elif request == 4:  # CLOSE
             self.close()
+        elif request == 11:  # BUFFER_SIZE
+            # This is used as the vfs_reader buffer. n + 4 should be less than 255 to
+            # fit in stdin ringbuffer on supported ports. n + 7 should be multiple of 16
+            # to efficiently use gc blocks in mp_reader_vfs_t.
+            return 249
+        else:
+            return -1
         return 0
 
     def flush(self):

From 2d363a23cb9e825200e772f973eab921a69e0646 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 25 Oct 2023 11:04:54 +1100
Subject: [PATCH 137/310] shared/tinyusb: Schedule TinyUSB task function from
 dcd_event_handler.

dcd_event_handler() is called from the IRQ when a new DCD event is queued
for processing by the TinyUSB thread mode task.  This lets us queue the
handler to run immediately when MicroPython resumes.

Currently this relies on a linker --wrap hack to work, but a PR has been
submitted to TinyUSB to allow the function to be called inline from
dcd_event_handler() itself.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 shared/tinyusb/mp_usbd.c | 23 +++++++++++++++++++++++
 shared/tinyusb/mp_usbd.h |  3 ---
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/shared/tinyusb/mp_usbd.c b/shared/tinyusb/mp_usbd.c
index ea1de674bc..87c10310f7 100644
--- a/shared/tinyusb/mp_usbd.c
+++ b/shared/tinyusb/mp_usbd.c
@@ -27,17 +27,40 @@
 #include <stdlib.h>
 
 #include "py/mpconfig.h"
+#include "py/runtime.h"
 
 #if MICROPY_HW_ENABLE_USBDEV
 
 #ifndef NO_QSTR
 #include "tusb.h" // TinyUSB is not available when running the string preprocessor
+#include "device/dcd.h"
 #include "device/usbd.h"
 #include "device/usbd_pvt.h"
 #endif
 
+// Legacy TinyUSB task function wrapper, called by some ports from the interpreter hook
 void usbd_task(void) {
     tud_task_ext(0, false);
 }
 
+// TinyUSB task function wrapper, as scheduled from the USB IRQ
+static void mp_usbd_task(mp_sched_node_t *node);
+
+extern void __real_dcd_event_handler(dcd_event_t const *event, bool in_isr);
+
+// If -Wl,--wrap=dcd_event_handler is passed to the linker, then this wrapper
+// will be called and allows MicroPython to schedule the TinyUSB task when
+// dcd_event_handler() is called from an ISR.
+TU_ATTR_FAST_FUNC void __wrap_dcd_event_handler(dcd_event_t const *event, bool in_isr) {
+    static mp_sched_node_t usbd_task_node;
+
+    __real_dcd_event_handler(event, in_isr);
+    mp_sched_schedule_node(&usbd_task_node, mp_usbd_task);
+}
+
+static void mp_usbd_task(mp_sched_node_t *node) {
+    (void)node;
+    tud_task_ext(0, false);
+}
+
 #endif
diff --git a/shared/tinyusb/mp_usbd.h b/shared/tinyusb/mp_usbd.h
index 3a93b929c5..2e4feaca9f 100644
--- a/shared/tinyusb/mp_usbd.h
+++ b/shared/tinyusb/mp_usbd.h
@@ -29,9 +29,6 @@
 
 #include "py/obj.h"
 
-// Call instead of tud_task()
-void mp_usbd_task(void);
-
 // Function to be implemented in port code.
 // Can write a string up to MICROPY_HW_USB_DESC_STR_MAX characters long, plus terminating byte.
 extern void mp_usbd_port_get_serial_number(char *buf);

From bcbdee235719d459a4cd60d51021454fba54cd0f Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 25 Oct 2023 13:50:53 +1100
Subject: [PATCH 138/310] rp2: Change to use TinyUSB dcd_event_handler hook.

This change:
- Has a small code size reduction.
- Should slightly improve overall performance.  The old hook code
  seemed to use between 0.1% and 1.6% of the total CPU time doing no-op
  calls even when no USB work was required.
- USB performance is mostly the same, there is a small increase in
  latency for some workloads that seems to because sometimes the hook
  usbd_task() is called at the right time to line up with the next USB host
  request.  This only happened semi-randomly due to the timing of the hook.
  Improving the wakeup latency by switching rp2 to tickless WFE allows the
  usbd_task() to run in time for the next USB host request almost always,
  improving performance and more than offsetting this impact.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/rp2/CMakeLists.txt |  1 +
 ports/rp2/mpconfigport.h | 15 ---------------
 2 files changed, 1 insertion(+), 15 deletions(-)

diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 4f76c5864f..15f6f6ca1c 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -406,6 +406,7 @@ target_compile_options(${MICROPY_TARGET} PRIVATE
 
 target_link_options(${MICROPY_TARGET} PRIVATE
     -Wl,--defsym=__micropy_c_heap_size__=${MICROPY_C_HEAP_SIZE}
+    -Wl,--wrap=dcd_event_handler
 )
 
 set_source_files_properties(
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index 84a961db43..61749f108a 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -250,23 +250,8 @@ extern void mp_thread_end_atomic_section(uint32_t);
 #define MICROPY_PY_LWIP_REENTER lwip_lock_acquire();
 #define MICROPY_PY_LWIP_EXIT    lwip_lock_release();
 
-#if MICROPY_HW_ENABLE_USBDEV
-#define MICROPY_HW_USBDEV_TASK_HOOK extern void usbd_task(void); usbd_task();
-#define MICROPY_VM_HOOK_COUNT (10)
-#define MICROPY_VM_HOOK_INIT static uint vm_hook_divisor = MICROPY_VM_HOOK_COUNT;
-#define MICROPY_VM_HOOK_POLL if (get_core_num() == 0 && --vm_hook_divisor == 0) { \
-        vm_hook_divisor = MICROPY_VM_HOOK_COUNT; \
-        MICROPY_HW_USBDEV_TASK_HOOK \
-}
-#define MICROPY_VM_HOOK_LOOP MICROPY_VM_HOOK_POLL
-#define MICROPY_VM_HOOK_RETURN MICROPY_VM_HOOK_POLL
-#else
-#define MICROPY_HW_USBDEV_TASK_HOOK
-#endif
-
 #define MICROPY_EVENT_POLL_HOOK_FAST \
     do { \
-        if (get_core_num() == 0) { MICROPY_HW_USBDEV_TASK_HOOK } \
         extern void mp_handle_pending(bool); \
         mp_handle_pending(true); \
     } while (0)

From 26d5032980335ccdfe81234ad7a24030a580f6d3 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 1 Nov 2023 15:30:05 +1100
Subject: [PATCH 139/310] samd: Switch TinyUSB to run via a scheduled task.

Previously the TinyUSB task was run in the ISR immediately after the
interrupt handler.  This approach gives very similar performance (no change
in CDC throughput tests) but reduces the amount of time spent in the ISR,
and allows TinyUSB callbacks to run in thread mode.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/samd/Makefile    |  3 +++
 ports/samd/samd_isr.c  |  8 ++++----
 ports/samd/samd_soc.h  |  4 ----
 ports/samd/tusb_port.c | 27 ---------------------------
 4 files changed, 7 insertions(+), 35 deletions(-)

diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index 291a894ab7..12223e6ded 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -93,6 +93,8 @@ LIBSTDCPP_FILE_NAME = "$(shell $(CXX) $(CXXFLAGS) -print-file-name=libstdc++.a)"
 LDFLAGS += -L"$(shell dirname $(LIBSTDCPP_FILE_NAME))"
 endif
 
+LDFLAGS += --wrap=dcd_event_handler
+
 MPY_CROSS_FLAGS += -march=$(MPY_CROSS_MCU_ARCH)
 
 SRC_C += \
@@ -131,6 +133,7 @@ SHARED_SRC_C += \
 	shared/runtime/sys_stdio_mphal.c \
 	shared/timeutils/timeutils.c \
 	shared/tinyusb/mp_cdc_common.c \
+	shared/tinyusb/mp_usbd.c
 
 ASF4_SRC_C += $(addprefix lib/asf4/$(MCU_SERIES_LOWER)/,\
 	hal/src/hal_atomic.c \
diff --git a/ports/samd/samd_isr.c b/ports/samd/samd_isr.c
index a12140313b..7c4c1d060f 100644
--- a/ports/samd/samd_isr.c
+++ b/ports/samd/samd_isr.c
@@ -310,10 +310,10 @@ const ISR isr_vector[] __attribute__((section(".isr_vector"))) = {
     &Sercom7_Handler, // 77 Serial Communication Interface 7 (SERCOM7): SERCOM7_3 - 6
     0,                // 78 Control Area Network 0 (CAN0)
     0,                // 79 Control Area Network 1 (CAN1)
-    &USB_0_Handler_wrapper, // 80 Universal Serial Bus (USB): USB_EORSM_DNRS, ...
-    &USB_1_Handler_wrapper, // 81 Universal Serial Bus (USB): USB_SOF_HSOF
-    &USB_2_Handler_wrapper, // 82 Universal Serial Bus (USB): USB_TRCPT0_0 - _7
-    &USB_3_Handler_wrapper, // 83 Universal Serial Bus (USB): USB_TRCPT1_0 - _7
+    &USB_Handler_wrapper, // 80 Universal Serial Bus (USB): USB_EORSM_DNRS, ...
+    &USB_Handler_wrapper, // 81 Universal Serial Bus (USB): USB_SOF_HSOF
+    &USB_Handler_wrapper, // 82 Universal Serial Bus (USB): USB_TRCPT0_0 - _7
+    &USB_Handler_wrapper, // 83 Universal Serial Bus (USB): USB_TRCPT1_0 - _7
     0,                // 84 Ethernet MAC (GMAC)
     0,                // 85 Timer Counter Control 0 (TCC0): TCC0_CNT_A ...
     0,                // 86 Timer Counter Control 0 (TCC0): TCC0_MC_0
diff --git a/ports/samd/samd_soc.h b/ports/samd/samd_soc.h
index 1848cf7db1..90a5a57ffa 100644
--- a/ports/samd/samd_soc.h
+++ b/ports/samd/samd_soc.h
@@ -36,10 +36,6 @@ void samd_init(void);
 void samd_main(void);
 
 void USB_Handler_wrapper(void);
-void USB_0_Handler_wrapper(void);
-void USB_1_Handler_wrapper(void);
-void USB_2_Handler_wrapper(void);
-void USB_3_Handler_wrapper(void);
 
 void sercom_enable(Sercom *spi, int state);
 void sercom_register_irq(int sercom_id, void (*sercom_irq_handler));
diff --git a/ports/samd/tusb_port.c b/ports/samd/tusb_port.c
index 2098334fba..e56ef0fd6a 100644
--- a/ports/samd/tusb_port.c
+++ b/ports/samd/tusb_port.c
@@ -117,33 +117,6 @@ const uint16_t *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
     return desc_str;
 }
 
-#if defined(MCU_SAMD21)
-
 void USB_Handler_wrapper(void) {
     tud_int_handler(0);
-    tud_task();
 }
-
-#elif defined(MCU_SAMD51)
-
-void USB_0_Handler_wrapper(void) {
-    tud_int_handler(0);
-    tud_task();
-}
-
-void USB_1_Handler_wrapper(void) {
-    tud_int_handler(0);
-    tud_task();
-}
-
-void USB_2_Handler_wrapper(void) {
-    tud_int_handler(0);
-    tud_task();
-}
-
-void USB_3_Handler_wrapper(void) {
-    tud_int_handler(0);
-    tud_task();
-}
-
-#endif

From 4679a90097cc881c9d53d6e0dd0dde1c4c2de99c Mon Sep 17 00:00:00 2001
From: Andrew Leech <andrew@alelec.net>
Date: Wed, 8 Nov 2023 15:50:47 +1100
Subject: [PATCH 140/310] CODECONVENTIONS: Update for change from black to ruff
 format.

Also add notes on running pre-commit manually.

Signed-off-by: Andrew Leech <andrew@alelec.net>
---
 CODECONVENTIONS.md | 31 ++++++++++++++++++++++---------
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/CODECONVENTIONS.md b/CODECONVENTIONS.md
index d44b382b25..d6b0a5926b 100644
--- a/CODECONVENTIONS.md
+++ b/CODECONVENTIONS.md
@@ -53,13 +53,16 @@ are then certifying and signing off against the following:
 Code auto-formatting
 ====================
 
-Both C and Python code are auto-formatted using the `tools/codeformat.py`
-script.  This uses [uncrustify](https://github.com/uncrustify/uncrustify) to
-format C code and [black](https://github.com/psf/black) to format Python code.
-After making changes, and before committing, run this tool to reformat your
-changes to the correct style.  Without arguments this tool will reformat all
-source code (and may take some time to run).  Otherwise pass as arguments to
-the tool the files that changed and it will only reformat those.
+Both C and Python code formatting are controlled for consistency across the
+MicroPython codebase.  C code is formatted using the `tools/codeformat.py`
+script which uses [uncrustify](https://github.com/uncrustify/uncrustify).
+Python code is linted and formatted using
+[ruff & ruff format](https://github.com/astral-sh/ruff).
+After making changes, and before committing, run  `tools/codeformat.py` to
+reformat your C code and `ruff format` for any Python code.  Without
+arguments this tool will reformat all source code (and may take some time
+to run).  Otherwise pass as arguments to the tool the files that changed,
+and it will only reformat those.
 
 uncrustify
 ==========
@@ -151,12 +154,22 @@ Tips:
 * To ignore the pre-commit message format check temporarily, start the commit
   message subject line with "WIP" (for "Work In Progress").
 
+Running pre-commit manually
+===========================
+
+Once pre-commit is installed as per the previous section it can be manually
+run against the MicroPython python codebase to update file formatting on
+demand, with either:
+* `pre-commit run --all-files` to fix all files in the MicroPython codebase
+* `pre-commit run --file ./path/to/my/file` to fix just one file
+* `pre-commit run --file ./path/to/my/folder/*` to fix just one folder
+
 Python code conventions
 =======================
 
 Python code follows [PEP 8](https://legacy.python.org/dev/peps/pep-0008/) and
-is auto-formatted using [black](https://github.com/psf/black) with a line-length
-of 99 characters.
+is auto-formatted using [ruff format](https://docs.astral.sh/ruff/formatter)
+with a line-length of 99 characters.
 
 Naming conventions:
 - Module names are short and all lowercase; eg pyb, stm.

From f07f90f1abfd6784db9c47a5602fae319991f8e7 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Thu, 19 Oct 2023 12:43:17 +0200
Subject: [PATCH 141/310] mimxrt/boards/OLIMEX_RT1010: Adjust the UART pin
 assignment.

Olimex asked for that, getting a UART at the UEXT1 connector as well.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 docs/mimxrt/pinout.rst                            | 2 +-
 ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/docs/mimxrt/pinout.rst b/docs/mimxrt/pinout.rst
index b5a7fbbfe0..16bb472273 100644
--- a/docs/mimxrt/pinout.rst
+++ b/docs/mimxrt/pinout.rst
@@ -28,7 +28,7 @@ MIMXRT1060-EVK     Debug USB      D0/D1        D7/D6        D8/D9
 MIMXRT1064-EVK     Debug USB      D0/D1        D7/D6        D8/D9
 MIMXRT1170-EVK     Debug USB      D0/D1       D12/D11      D10/D13
 Adafruit Metro M7     -           D0/D1        D7/D3        A1/A0
-Olimex RT1010Py       -          RxD/TxD       D5/D6           -
+Olimex RT1010Py       -          RxD/TxD       D7/D8        D5/D6
 Seeed ARCH MIX        -         J3_19/J3_20  J4_16/J4_17  J4_06/J4_07
 =================  ===========  ===========  ===========  ===========
 
diff --git a/ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h b/ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h
index 324cee9b14..1ad2e9df5e 100644
--- a/ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h
+++ b/ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h
@@ -18,18 +18,18 @@
 // LPUART4 on D5/D6    -> 2
 
 #define MICROPY_HW_UART_NUM     (sizeof(uart_index_table) / sizeof(uart_index_table)[0])
-#define MICROPY_HW_UART_INDEX   { 0, 1, 4 }
+#define MICROPY_HW_UART_INDEX   { 0, 1, 3, 4 }
 
 #define IOMUX_TABLE_UART \
     { IOMUXC_GPIO_10_LPUART1_TXD }, { IOMUXC_GPIO_09_LPUART1_RXD }, \
     { 0 }, { 0 }, \
-    { 0 }, { 0 }, \
+    { IOMUXC_GPIO_08_LPUART3_TXD }, { IOMUXC_GPIO_07_LPUART3_RXD }, \
     { IOMUXC_GPIO_06_LPUART4_TXD }, { IOMUXC_GPIO_05_LPUART4_RXD },
 
 #define IOMUX_TABLE_UART_CTS_RTS \
     { IOMUXC_GPIO_08_LPUART1_CTS_B }, { IOMUXC_GPIO_07_LPUART1_RTS_B }, \
     { 0 }, { 0 }, \
-    { 0 }, { 0 }, \
+    { IOMUXC_GPIO_AD_14_LPUART3_CTS_B }, { IOMUXC_GPIO_AD_13_LPUART3_RTS_B }, \
     { IOMUXC_GPIO_AD_14_LPUART4_CTS_B }, { IOMUXC_GPIO_AD_13_LPUART4_RTS_B },
 
 #define MICROPY_HW_SPI_INDEX { 0, 1, 2 }

From fbb7c32040c407a60126a879dc2afe07a0ef6e5d Mon Sep 17 00:00:00 2001
From: Mark Blakeney <mark.blakeney@bullet-systems.net>
Date: Tue, 24 Oct 2023 10:24:26 +1000
Subject: [PATCH 142/310] esp32/esp32_rmt: Change RMT.source_freq() to class
 method.

To create an esp32.RMT() instance with an optimum (i.e. highest resolution)
clock_div is currently awkward because you need to know the source clock
frequency to calculate the best clock_div, but unfortunately that is only
currently available as an source_freq() method on the instance after you
have already created it.  So RMT.source_freq() should really be a class
method, not an instance method.  This change is backwards compatible for
existing code because you can still reference that function from an
instance, or now also, from the class.

Signed-off-by: Mark Blakeney <mark.blakeney@bullet-systems.net>
---
 docs/library/esp32.rst  | 2 +-
 ports/esp32/esp32_rmt.c | 9 ++++++---
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/docs/library/esp32.rst b/docs/library/esp32.rst
index 7701f43539..796dbbbc54 100644
--- a/docs/library/esp32.rst
+++ b/docs/library/esp32.rst
@@ -226,7 +226,7 @@ For more details see Espressif's `ESP-IDF RMT documentation.
     ``100``) and the output level to apply the carrier to (a boolean as per
     *idle_level*).
 
-.. method:: RMT.source_freq()
+.. classmethod:: RMT.source_freq()
 
     Returns the source clock frequency. Currently the source clock is not
     configurable so this will always return 80MHz.
diff --git a/ports/esp32/esp32_rmt.c b/ports/esp32/esp32_rmt.c
index f92af636f5..14caffddad 100644
--- a/ports/esp32/esp32_rmt.c
+++ b/ports/esp32/esp32_rmt.c
@@ -206,10 +206,11 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp32_rmt_deinit_obj, esp32_rmt_deinit);
 // Return the source frequency.
 // Currently only the APB clock (80MHz) can be used but it is possible other
 // clock sources will added in the future.
-STATIC mp_obj_t esp32_rmt_source_freq(mp_obj_t self_in) {
+STATIC mp_obj_t esp32_rmt_source_freq() {
     return mp_obj_new_int(APB_CLK_FREQ);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp32_rmt_source_freq_obj, esp32_rmt_source_freq);
+STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp32_rmt_source_freq_obj, esp32_rmt_source_freq);
+STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(esp32_rmt_source_obj, MP_ROM_PTR(&esp32_rmt_source_freq_obj));
 
 // Return the clock divider.
 STATIC mp_obj_t esp32_rmt_clock_div(mp_obj_t self_in) {
@@ -357,7 +358,6 @@ STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(esp32_rmt_bitstream_channel_obj, MP_ROM_
 STATIC const mp_rom_map_elem_t esp32_rmt_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&esp32_rmt_deinit_obj) },
     { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&esp32_rmt_deinit_obj) },
-    { MP_ROM_QSTR(MP_QSTR_source_freq), MP_ROM_PTR(&esp32_rmt_source_freq_obj) },
     { MP_ROM_QSTR(MP_QSTR_clock_div), MP_ROM_PTR(&esp32_rmt_clock_div_obj) },
     { MP_ROM_QSTR(MP_QSTR_wait_done), MP_ROM_PTR(&esp32_rmt_wait_done_obj) },
     { MP_ROM_QSTR(MP_QSTR_loop), MP_ROM_PTR(&esp32_rmt_loop_obj) },
@@ -365,6 +365,9 @@ STATIC const mp_rom_map_elem_t esp32_rmt_locals_dict_table[] = {
 
     // Static methods
     { MP_ROM_QSTR(MP_QSTR_bitstream_channel), MP_ROM_PTR(&esp32_rmt_bitstream_channel_obj) },
+
+    // Class methods
+    { MP_ROM_QSTR(MP_QSTR_source_freq), MP_ROM_PTR(&esp32_rmt_source_obj) },
 };
 STATIC MP_DEFINE_CONST_DICT(esp32_rmt_locals_dict, esp32_rmt_locals_dict_table);
 

From 2888c5b23057b056bdeed6fcd2af414ddf2ef0c4 Mon Sep 17 00:00:00 2001
From: Mark Blakeney <mark.blakeney@bullet-systems.net>
Date: Tue, 31 Oct 2023 14:24:43 +1000
Subject: [PATCH 143/310] esp32/esp32_rmt: Add RMT.PULSE_MAX constant.

If you have a variable frequency and pulse width, and you want to optimize
pulse resolution, then you must do a calculation beforehand to ensure you
normalize the array to keep all list values within bound.  That calculation
requires RMT.source_freq(), RMT.clock_div(), and this 32767 constant.

Signed-off-by: Mark Blakeney <mark.blakeney@bullet-systems.net>
---
 docs/library/esp32.rst  | 17 ++++++++++++-----
 ports/esp32/esp32_rmt.c |  3 +++
 2 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/docs/library/esp32.rst b/docs/library/esp32.rst
index 796dbbbc54..422329bf1e 100644
--- a/docs/library/esp32.rst
+++ b/docs/library/esp32.rst
@@ -193,7 +193,7 @@ numbers specified in ``write_pulses`` are multiplied by the resolution to
 define the pulses.
 
 ``clock_div`` is an 8-bit divider (0-255) and each pulse can be defined by
-multiplying the resolution by a 15-bit (0-32,768) number. There are eight
+multiplying the resolution by a 15-bit (1-``PULSE_MAX``) number. There are eight
 channels (0-7) and each can have a different clock divider.
 
 So, in the example above, the 80MHz clock is divided by 8. Thus the
@@ -264,10 +264,10 @@ For more details see Espressif's `ESP-IDF RMT documentation.
     **Mode 3:** *duration* and *data* are lists or tuples of equal length,
     specifying individual durations and the output level for each.
 
-    Durations are in integer units of the channel resolution (as described
-    above), between 1 and 32767 units. Output levels are any value that can
-    be converted to a boolean, with ``True`` representing high voltage and
-    ``False`` representing low.
+    Durations are in integer units of the channel resolution (as
+    described above), between 1 and ``PULSE_MAX`` units. Output levels
+    are any value that can be converted to a boolean, with ``True``
+    representing high voltage and ``False`` representing low.
 
     If transmission of an earlier sequence is in progress then this method will
     block until that transmission is complete before beginning the new sequence.
@@ -290,6 +290,13 @@ For more details see Espressif's `ESP-IDF RMT documentation.
     Passing in no argument will not change the channel.  This function returns
     the current channel number.
 
+Constants
+---------
+
+.. data:: RMT.PULSE_MAX
+
+   Maximum integer that can be set for a pulse duration.
+
 Ultra-Low-Power co-processor
 ----------------------------
 
diff --git a/ports/esp32/esp32_rmt.c b/ports/esp32/esp32_rmt.c
index 14caffddad..5d53018f4b 100644
--- a/ports/esp32/esp32_rmt.c
+++ b/ports/esp32/esp32_rmt.c
@@ -368,6 +368,9 @@ STATIC const mp_rom_map_elem_t esp32_rmt_locals_dict_table[] = {
 
     // Class methods
     { MP_ROM_QSTR(MP_QSTR_source_freq), MP_ROM_PTR(&esp32_rmt_source_obj) },
+
+    // Constants
+    { MP_ROM_QSTR(MP_QSTR_PULSE_MAX), MP_ROM_INT(32767) },
 };
 STATIC MP_DEFINE_CONST_DICT(esp32_rmt_locals_dict, esp32_rmt_locals_dict_table);
 

From af52e1ff24b0b543f6fdb3bc937713a6ab94d506 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Wed, 8 Nov 2023 13:01:08 +1100
Subject: [PATCH 144/310] stm32/boards/NUCLEO_WL55: Freeze LoRa driver.

This adds the sync version of the LoRa driver (and the base WL55 driver).

Adds +13.6kiB (212.6 -> 226.2). Limit for this board is 232kiB.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 ports/stm32/boards/NUCLEO_WL55/manifest.py      | 6 ++++++
 ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk | 4 ++--
 2 files changed, 8 insertions(+), 2 deletions(-)
 create mode 100644 ports/stm32/boards/NUCLEO_WL55/manifest.py

diff --git a/ports/stm32/boards/NUCLEO_WL55/manifest.py b/ports/stm32/boards/NUCLEO_WL55/manifest.py
new file mode 100644
index 0000000000..8998166a3e
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_WL55/manifest.py
@@ -0,0 +1,6 @@
+# Don't include default frozen modules because MCU is tight on flash space.
+
+# Only install the sync version of the LoRa driver because this board doesn't
+# have asyncio by default.
+require("lora-sync")
+require("lora-stm32wl5")
diff --git a/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk
index 210f3058c1..ced2e7619b 100644
--- a/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk
@@ -9,5 +9,5 @@ TEXT0_ADDR = 0x08000000
 MICROPY_VFS_FAT = 0
 MICROPY_VFS_LFS2 = 1
 
-# Don't include default frozen modules because MCU is tight on flash space
-FROZEN_MANIFEST ?=
+# Board-specific manifest (doesn't include default modules, adds LoRa driver).
+FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py

From 3b954698fa036ab34fe578ce46ff9fa5cf6ca4ce Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Mon, 30 Oct 2023 15:25:38 +0100
Subject: [PATCH 145/310] extmod/modbluetooth: Initialise nlr_jump_callback_top
 for IRQ handlers.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Similar to 3883f29485fad21105f6f965d56bfec842b8cfbb where this change was
implemented for threads: when the Bluetooth IRQ handler is called the
thread state is not not zero-initialized and thus we need to manually set
this to NULL.

Fixes issue #12239.

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 extmod/modbluetooth.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/extmod/modbluetooth.c b/extmod/modbluetooth.c
index 3417df7a27..cef5151cc9 100644
--- a/extmod/modbluetooth.c
+++ b/extmod/modbluetooth.c
@@ -1276,6 +1276,7 @@ STATIC mp_obj_t invoke_irq_handler(uint16_t event,
         mp_stack_set_top(&ts + 1); // need to include ts in root-pointer scan
         mp_stack_set_limit(MICROPY_PY_BLUETOOTH_SYNC_EVENT_STACK_SIZE - 1024);
         ts.gc_lock_depth = 0;
+        ts.nlr_jump_callback_top = NULL;
         ts.mp_pending_exception = MP_OBJ_NULL;
         mp_locals_set(mp_state_ctx.thread.dict_locals); // set from the outer context
         mp_globals_set(mp_state_ctx.thread.dict_globals); // set from the outer context

From 365913953a4e050eab45c00e637e92f612400b11 Mon Sep 17 00:00:00 2001
From: stijn <stijn@ignitron.net>
Date: Mon, 6 Nov 2023 15:48:13 +0100
Subject: [PATCH 146/310] extmod/vfs_posix_file: Make standard file objects
 non-const.

Fixes undefined behavior when calling vfs_posix_file_ioctl with
MP_STREAM_CLOSE as request because that casts away the constness and
assigns -1 to the object's fd member.

Fixes issue #12670.

Signed-off-by: stijn <stijn@ignitron.net>
---
 extmod/vfs_posix_file.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/extmod/vfs_posix_file.c b/extmod/vfs_posix_file.c
index 81a608d2b6..2f70789543 100644
--- a/extmod/vfs_posix_file.c
+++ b/extmod/vfs_posix_file.c
@@ -279,14 +279,14 @@ STATIC const mp_stream_p_t vfs_posix_textio_stream_p = {
 
 #if MICROPY_PY_SYS_STDIO_BUFFER
 
-const mp_obj_vfs_posix_file_t mp_sys_stdin_buffer_obj = {{&mp_type_vfs_posix_fileio}, STDIN_FILENO};
-const mp_obj_vfs_posix_file_t mp_sys_stdout_buffer_obj = {{&mp_type_vfs_posix_fileio}, STDOUT_FILENO};
-const mp_obj_vfs_posix_file_t mp_sys_stderr_buffer_obj = {{&mp_type_vfs_posix_fileio}, STDERR_FILENO};
+mp_obj_vfs_posix_file_t mp_sys_stdin_buffer_obj = {{&mp_type_vfs_posix_fileio}, STDIN_FILENO};
+mp_obj_vfs_posix_file_t mp_sys_stdout_buffer_obj = {{&mp_type_vfs_posix_fileio}, STDOUT_FILENO};
+mp_obj_vfs_posix_file_t mp_sys_stderr_buffer_obj = {{&mp_type_vfs_posix_fileio}, STDERR_FILENO};
 
 // Forward declarations.
-const mp_obj_vfs_posix_file_t mp_sys_stdin_obj;
-const mp_obj_vfs_posix_file_t mp_sys_stdout_obj;
-const mp_obj_vfs_posix_file_t mp_sys_stderr_obj;
+mp_obj_vfs_posix_file_t mp_sys_stdin_obj;
+mp_obj_vfs_posix_file_t mp_sys_stdout_obj;
+mp_obj_vfs_posix_file_t mp_sys_stderr_obj;
 
 STATIC void vfs_posix_textio_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) {
     if (dest[0] != MP_OBJ_NULL) {
@@ -332,8 +332,8 @@ MP_DEFINE_CONST_OBJ_TYPE(
     locals_dict, &vfs_posix_rawfile_locals_dict
     );
 
-const mp_obj_vfs_posix_file_t mp_sys_stdin_obj = {{&mp_type_vfs_posix_textio}, STDIN_FILENO};
-const mp_obj_vfs_posix_file_t mp_sys_stdout_obj = {{&mp_type_vfs_posix_textio}, STDOUT_FILENO};
-const mp_obj_vfs_posix_file_t mp_sys_stderr_obj = {{&mp_type_vfs_posix_textio}, STDERR_FILENO};
+mp_obj_vfs_posix_file_t mp_sys_stdin_obj = {{&mp_type_vfs_posix_textio}, STDIN_FILENO};
+mp_obj_vfs_posix_file_t mp_sys_stdout_obj = {{&mp_type_vfs_posix_textio}, STDOUT_FILENO};
+mp_obj_vfs_posix_file_t mp_sys_stderr_obj = {{&mp_type_vfs_posix_textio}, STDERR_FILENO};
 
 #endif // MICROPY_VFS_POSIX

From d46dc5e1738d843b83f1668798669ff177119d03 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 9 Nov 2023 16:56:06 +1100
Subject: [PATCH 147/310] shared/tinyusb: Expose mp_usbd_task as a public
 function.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/renesas-ra/mpconfigport.h |  2 +-
 shared/tinyusb/mp_usbd.c        | 17 ++++++++---------
 shared/tinyusb/mp_usbd.h        |  3 +++
 3 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/ports/renesas-ra/mpconfigport.h b/ports/renesas-ra/mpconfigport.h
index d3bc3235fd..222d5b919d 100644
--- a/ports/renesas-ra/mpconfigport.h
+++ b/ports/renesas-ra/mpconfigport.h
@@ -272,7 +272,7 @@ static inline mp_uint_t disable_irq(void) {
 #define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
 
 #if MICROPY_HW_ENABLE_USBDEV
-#define MICROPY_HW_USBDEV_TASK_HOOK extern void usbd_task(void); usbd_task();
+#define MICROPY_HW_USBDEV_TASK_HOOK extern void mp_usbd_task(void); mp_usbd_task();
 #define MICROPY_VM_HOOK_COUNT (10)
 #define MICROPY_VM_HOOK_INIT static uint vm_hook_divisor = MICROPY_VM_HOOK_COUNT;
 #define MICROPY_VM_HOOK_POLL if (--vm_hook_divisor == 0) { \
diff --git a/shared/tinyusb/mp_usbd.c b/shared/tinyusb/mp_usbd.c
index 87c10310f7..55af3d4fb4 100644
--- a/shared/tinyusb/mp_usbd.c
+++ b/shared/tinyusb/mp_usbd.c
@@ -38,16 +38,15 @@
 #include "device/usbd_pvt.h"
 #endif
 
-// Legacy TinyUSB task function wrapper, called by some ports from the interpreter hook
-void usbd_task(void) {
-    tud_task_ext(0, false);
-}
-
 // TinyUSB task function wrapper, as scheduled from the USB IRQ
-static void mp_usbd_task(mp_sched_node_t *node);
+static void mp_usbd_task_callback(mp_sched_node_t *node);
 
 extern void __real_dcd_event_handler(dcd_event_t const *event, bool in_isr);
 
+void mp_usbd_task(void) {
+    tud_task_ext(0, false);
+}
+
 // If -Wl,--wrap=dcd_event_handler is passed to the linker, then this wrapper
 // will be called and allows MicroPython to schedule the TinyUSB task when
 // dcd_event_handler() is called from an ISR.
@@ -55,12 +54,12 @@ TU_ATTR_FAST_FUNC void __wrap_dcd_event_handler(dcd_event_t const *event, bool i
     static mp_sched_node_t usbd_task_node;
 
     __real_dcd_event_handler(event, in_isr);
-    mp_sched_schedule_node(&usbd_task_node, mp_usbd_task);
+    mp_sched_schedule_node(&usbd_task_node, mp_usbd_task_callback);
 }
 
-static void mp_usbd_task(mp_sched_node_t *node) {
+static void mp_usbd_task_callback(mp_sched_node_t *node) {
     (void)node;
-    tud_task_ext(0, false);
+    mp_usbd_task();
 }
 
 #endif
diff --git a/shared/tinyusb/mp_usbd.h b/shared/tinyusb/mp_usbd.h
index 2e4feaca9f..340637c95f 100644
--- a/shared/tinyusb/mp_usbd.h
+++ b/shared/tinyusb/mp_usbd.h
@@ -29,6 +29,9 @@
 
 #include "py/obj.h"
 
+// Call this to explicitly run the TinyUSB device task.
+void mp_usbd_task(void);
+
 // Function to be implemented in port code.
 // Can write a string up to MICROPY_HW_USB_DESC_STR_MAX characters long, plus terminating byte.
 extern void mp_usbd_port_get_serial_number(char *buf);

From a00c9d56db775ee5fc14c2db60eb07bab8e872dd Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 9 Nov 2023 16:56:21 +1100
Subject: [PATCH 148/310] rp2/mphalport: Run TinyUSB stack while waiting for
 CDC input/output.

The recent change in bcbdee235719d459a4cd60d51021454fba54cd0f means that
TinyUSB can no longer be run from within a soft (or hard) IRQ handler, ie
when the scheduler is locked.  That means that Python code that calls
`print(...)` from within a scheduled function may block indefinitely if the
USB CDC buffers are full.

This commit fixes that problem by explicitly running the TinyUSB stack when
waiting within stdio tx/rx functions.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/mphalport.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/ports/rp2/mphalport.c b/ports/rp2/mphalport.c
index d1bba43642..4b1c1fa1f5 100644
--- a/ports/rp2/mphalport.c
+++ b/ports/rp2/mphalport.c
@@ -30,6 +30,7 @@
 #include "extmod/misc.h"
 #include "shared/runtime/interrupt_char.h"
 #include "shared/timeutils/timeutils.h"
+#include "shared/tinyusb/mp_usbd.h"
 #include "tusb.h"
 #include "uart.h"
 #include "hardware/rtc.h"
@@ -54,6 +55,19 @@ ringbuf_t stdin_ringbuf = { stdin_ringbuf_array, sizeof(stdin_ringbuf_array) };
 
 #endif
 
+#if MICROPY_HW_USB_CDC
+// Explicitly run the USB stack in case the scheduler is locked (eg we are in an
+// interrupt handler) and there is in/out data pending on the USB CDC interface.
+#define MICROPY_EVENT_POLL_HOOK_WITH_USB \
+    do { \
+        MICROPY_EVENT_POLL_HOOK; \
+        mp_usbd_task(); \
+    } while (0)
+
+#else
+#define MICROPY_EVENT_POLL_HOOK_WITH_USB MICROPY_EVENT_POLL_HOOK
+#endif
+
 #if MICROPY_HW_USB_CDC
 
 uint8_t cdc_itf_pending; // keep track of cdc interfaces which need attention to poll
@@ -135,7 +149,7 @@ int mp_hal_stdin_rx_chr(void) {
             return dupterm_c;
         }
         #endif
-        MICROPY_EVENT_POLL_HOOK
+        MICROPY_EVENT_POLL_HOOK_WITH_USB;
     }
 }
 
@@ -155,7 +169,7 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
             int timeout = 0;
             // Wait with a max of USC_CDC_TIMEOUT ms
             while (n > tud_cdc_write_available() && timeout++ < MICROPY_HW_USB_CDC_TX_TIMEOUT) {
-                MICROPY_EVENT_POLL_HOOK
+                MICROPY_EVENT_POLL_HOOK_WITH_USB;
             }
             if (timeout >= MICROPY_HW_USB_CDC_TX_TIMEOUT) {
                 break;

From 033361da4a90a441ecb372ca6c541575aef8d8a7 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Fri, 10 Nov 2023 07:53:23 +1100
Subject: [PATCH 149/310] samd/mphalport: Run TinyUSB stack while waiting for
 CDC input/output.

See the commit a00c9d56db for a detailed description of the problem, a
regression introduced in 26d503298.

Same approach here as the linked fix for rp2 (applied unconditionally here
as this port only supports USB-CDC for stdin/stdout).

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/samd/mphalport.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/ports/samd/mphalport.c b/ports/samd/mphalport.c
index dc38ea2964..3c803403f2 100644
--- a/ports/samd/mphalport.c
+++ b/ports/samd/mphalport.c
@@ -29,6 +29,7 @@
 #include "py/mphal.h"
 #include "py/stream.h"
 #include "shared/runtime/interrupt_char.h"
+#include "shared/tinyusb/mp_usbd.h"
 #include "extmod/misc.h"
 #include "samd_soc.h"
 #include "tusb.h"
@@ -42,6 +43,14 @@ extern volatile uint32_t ticks_us64_upper;
 STATIC uint8_t stdin_ringbuf_array[MICROPY_HW_STDIN_BUFFER_LEN];
 ringbuf_t stdin_ringbuf = { stdin_ringbuf_array, sizeof(stdin_ringbuf_array), 0, 0 };
 
+// Explicitly run the USB stack in case the scheduler is locked (eg we are in an
+// interrupt handler) and there is in/out data pending on the USB CDC interface.
+#define MICROPY_EVENT_POLL_HOOK_WITH_USB \
+    do { \
+        MICROPY_EVENT_POLL_HOOK; \
+        mp_usbd_task(); \
+    } while (0)
+
 uint8_t cdc_itf_pending; // keep track of cdc interfaces which need attention to poll
 
 void poll_cdc_interfaces(void) {
@@ -187,7 +196,7 @@ int mp_hal_stdin_rx_chr(void) {
             return dupterm_c;
         }
         #endif
-        MICROPY_EVENT_POLL_HOOK
+        MICROPY_EVENT_POLL_HOOK_WITH_USB;
     }
 }
 
@@ -201,7 +210,7 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
             int timeout = 0;
             // Wait with a max of USC_CDC_TIMEOUT ms
             while (n > tud_cdc_write_available() && timeout++ < MICROPY_HW_USB_CDC_TX_TIMEOUT) {
-                MICROPY_EVENT_POLL_HOOK
+                MICROPY_EVENT_POLL_HOOK_WITH_USB;
             }
             if (timeout >= MICROPY_HW_USB_CDC_TX_TIMEOUT) {
                 break;

From 5e3f0e7f8580d854eb451adbf164a9ab97386d4c Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 8 Nov 2023 09:48:33 +1100
Subject: [PATCH 150/310] samd: Switch to shared TinyUSB implementation.

Functionality and code size don't really change, but removes port-specific
code in favour of shared code.

(The MSC implemented in shared/tinyusb depends on some functions in the
pico-sdk, so this change doesn't make this available for samd.)

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/samd/Makefile                  |   6 +-
 ports/samd/mcu/samd21/mpconfigmcu.mk |   2 +
 ports/samd/mcu/samd51/mpconfigmcu.mk |   2 +
 ports/samd/mpconfigport.h            |  16 ++++
 ports/samd/tusb_port.c               | 122 ---------------------------
 ports/samd/{tusb_config.h => usbd.c} |  39 +++++----
 6 files changed, 43 insertions(+), 144 deletions(-)
 delete mode 100644 ports/samd/tusb_port.c
 rename ports/samd/{tusb_config.h => usbd.c} (64%)

diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index 12223e6ded..95d0f3bd18 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -55,6 +55,7 @@ INC += -I$(TOP)/lib/asf4/$(MCU_SERIES_LOWER)/hpl/tc
 INC += -I$(TOP)/lib/asf4/$(MCU_SERIES_LOWER)/include
 INC += -I$(TOP)/lib/asf4/$(MCU_SERIES_LOWER)/include/pio
 INC += -I$(TOP)/lib/tinyusb/src
+INC += -I$(TOP)/shared/tinyusb/
 
 MAKE_PINS = boards/make-pins.py
 BOARD_PINS = $(BOARD_DIR)/pins.csv
@@ -117,7 +118,7 @@ SRC_C += \
 	samd_qspiflash.c \
 	samd_soc.c \
 	samd_spiflash.c \
-	tusb_port.c \
+	usbd.c \
 
 SHARED_SRC_C += \
 	drivers/dht/dht.c \
@@ -133,7 +134,8 @@ SHARED_SRC_C += \
 	shared/runtime/sys_stdio_mphal.c \
 	shared/timeutils/timeutils.c \
 	shared/tinyusb/mp_cdc_common.c \
-	shared/tinyusb/mp_usbd.c
+	shared/tinyusb/mp_usbd.c \
+	shared/tinyusb/mp_usbd_descriptor.c \
 
 ASF4_SRC_C += $(addprefix lib/asf4/$(MCU_SERIES_LOWER)/,\
 	hal/src/hal_atomic.c \
diff --git a/ports/samd/mcu/samd21/mpconfigmcu.mk b/ports/samd/mcu/samd21/mpconfigmcu.mk
index 35f442d869..b3092837cb 100644
--- a/ports/samd/mcu/samd21/mpconfigmcu.mk
+++ b/ports/samd/mcu/samd21/mpconfigmcu.mk
@@ -1,5 +1,7 @@
 CFLAGS_MCU += -mtune=cortex-m0plus -mcpu=cortex-m0plus -msoft-float
 
+CFLAGS_MCU += -DCFG_TUSB_MCU=OPT_MCU_SAMD21
+
 MPY_CROSS_MCU_ARCH = armv6m
 
 MICROPY_HW_CODESIZE ?= 184K
diff --git a/ports/samd/mcu/samd51/mpconfigmcu.mk b/ports/samd/mcu/samd51/mpconfigmcu.mk
index c706331aca..0201bacffe 100644
--- a/ports/samd/mcu/samd51/mpconfigmcu.mk
+++ b/ports/samd/mcu/samd51/mpconfigmcu.mk
@@ -1,5 +1,7 @@
 CFLAGS_MCU += -mtune=cortex-m4 -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
 
+CFLAGS_MCU += -DCFG_TUSB_MCU=OPT_MCU_SAMD51
+
 MPY_CROSS_MCU_ARCH = armv7m
 
 MICROPY_HW_CODESIZE ?= 368K
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 91a7c1a10d..497ca9a870 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -62,6 +62,13 @@
 #define MICROPY_HW_ENABLE_USBDEV            (1)
 #define MICROPY_HW_USB_CDC_1200BPS_TOUCH    (1)
 
+#if MICROPY_HW_ENABLE_USBDEV
+// Enable USB-CDC serial port
+#ifndef MICROPY_HW_USB_CDC
+#define MICROPY_HW_USB_CDC (1)
+#endif
+#endif
+
 // Control over Python builtins
 #define MICROPY_PY_BUILTINS_BYTES_HEX       (1)
 #define MICROPY_PY_BUILTINS_MEMORYVIEW      (1)
@@ -141,6 +148,15 @@
 
 #define MP_STATE_PORT MP_STATE_VM
 
+// Miscellaneous settings
+
+#ifndef MICROPY_HW_USB_VID
+#define MICROPY_HW_USB_VID (0xf055)
+#endif
+#ifndef MICROPY_HW_USB_PID
+#define MICROPY_HW_USB_PID (0x9802)
+#endif
+
 // Additional entries for use with pendsv_schedule_dispatch.
 #ifndef MICROPY_BOARD_PENDSV_ENTRIES
 #define MICROPY_BOARD_PENDSV_ENTRIES
diff --git a/ports/samd/tusb_port.c b/ports/samd/tusb_port.c
deleted file mode 100644
index e56ef0fd6a..0000000000
--- a/ports/samd/tusb_port.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "samd_soc.h"
-#include "tusb.h"
-
-#ifndef MICROPY_HW_USB_VID
-#define MICROPY_HW_USB_VID (0xf055)
-#define MICROPY_HW_USB_PID (0x9802)
-#endif
-
-#define USBD_DESC_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN)
-#define USBD_MAX_POWER_MA (250)
-
-#define USBD_ITF_CDC (0) // needs 2 interfaces
-#define USBD_ITF_MAX (2)
-
-#define USBD_CDC_EP_CMD (0x81)
-#define USBD_CDC_EP_OUT (0x02)
-#define USBD_CDC_EP_IN (0x82)
-#define USBD_CDC_CMD_MAX_SIZE (8)
-#define USBD_CDC_IN_OUT_MAX_SIZE (64)
-
-#define USBD_STR_0 (0x00)
-#define USBD_STR_MANUF (0x01)
-#define USBD_STR_PRODUCT (0x02)
-#define USBD_STR_SERIAL (0x03)
-#define USBD_STR_CDC (0x04)
-
-// Note: descriptors returned from callbacks must exist long enough for transfer to complete
-
-static const tusb_desc_device_t usbd_desc_device = {
-    .bLength = sizeof(tusb_desc_device_t),
-    .bDescriptorType = TUSB_DESC_DEVICE,
-    .bcdUSB = 0x0200,
-    .bDeviceClass = TUSB_CLASS_MISC,
-    .bDeviceSubClass = MISC_SUBCLASS_COMMON,
-    .bDeviceProtocol = MISC_PROTOCOL_IAD,
-    .bMaxPacketSize0 = CFG_TUD_ENDOINT0_SIZE,
-    .idVendor = MICROPY_HW_USB_VID,
-    .idProduct = MICROPY_HW_USB_PID,
-    .bcdDevice = 0x0100,
-    .iManufacturer = USBD_STR_MANUF,
-    .iProduct = USBD_STR_PRODUCT,
-    .iSerialNumber = USBD_STR_SERIAL,
-    .bNumConfigurations = 1,
-};
-
-static const uint8_t usbd_desc_cfg[USBD_DESC_LEN] = {
-    TUD_CONFIG_DESCRIPTOR(1, USBD_ITF_MAX, USBD_STR_0, USBD_DESC_LEN,
-        TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, USBD_MAX_POWER_MA),
-
-    TUD_CDC_DESCRIPTOR(USBD_ITF_CDC, USBD_STR_CDC, USBD_CDC_EP_CMD,
-        USBD_CDC_CMD_MAX_SIZE, USBD_CDC_EP_OUT, USBD_CDC_EP_IN, USBD_CDC_IN_OUT_MAX_SIZE),
-};
-
-static const char *const usbd_desc_str[] = {
-    [USBD_STR_MANUF] = "MicroPython",
-    [USBD_STR_PRODUCT] = "Board in FS mode",
-    [USBD_STR_SERIAL] = "000000000000", // TODO
-    [USBD_STR_CDC] = "Board CDC",
-};
-
-const uint8_t *tud_descriptor_device_cb(void) {
-    return (const uint8_t *)&usbd_desc_device;
-}
-
-const uint8_t *tud_descriptor_configuration_cb(uint8_t index) {
-    (void)index;
-    return usbd_desc_cfg;
-}
-
-const uint16_t *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
-    #define DESC_STR_MAX (20)
-    static uint16_t desc_str[DESC_STR_MAX];
-
-    uint8_t len;
-    if (index == 0) {
-        desc_str[1] = 0x0409; // supported language is English
-        len = 1;
-    } else {
-        if (index >= sizeof(usbd_desc_str) / sizeof(usbd_desc_str[0])) {
-            return NULL;
-        }
-        const char *str = usbd_desc_str[index];
-        for (len = 0; len < DESC_STR_MAX - 1 && str[len]; ++len) {
-            desc_str[1 + len] = str[len];
-        }
-    }
-
-    // first byte is length (including header), second byte is string type
-    desc_str[0] = (TUSB_DESC_STRING << 8) | (2 * len + 2);
-
-    return desc_str;
-}
-
-void USB_Handler_wrapper(void) {
-    tud_int_handler(0);
-}
diff --git a/ports/samd/tusb_config.h b/ports/samd/usbd.c
similarity index 64%
rename from ports/samd/tusb_config.h
rename to ports/samd/usbd.c
index 07fa680cbb..90f2e1bfd9 100644
--- a/ports/samd/tusb_config.h
+++ b/ports/samd/usbd.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2019 Damien P. George
+ * Copyright (c) 2023 Angus Gratton
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -23,25 +23,24 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
-#ifndef MICROPY_INCLUDED_SAMD_TUSB_CONFIG_H
-#define MICROPY_INCLUDED_SAMD_TUSB_CONFIG_H
 
-// Common configuration
+#include "py/mpconfig.h"
+
+#if MICROPY_HW_ENABLE_USBDEV
+
+#include "mp_usbd.h"
+#include "string.h"
+#include "tusb.h"
+
+#define SERIAL_TODO "000000000000" // TODO
+
+void mp_usbd_port_get_serial_number(char *serial_buf) {
+    MP_STATIC_ASSERT(sizeof(SERIAL_TODO) <= MICROPY_HW_USB_DESC_STR_MAX);
+    strcpy(serial_buf, SERIAL_TODO);
+}
+
+void USB_Handler_wrapper(void) {
+    tud_int_handler(0);
+}
 
-#if defined(MCU_SAMD21)
-#define CFG_TUSB_MCU                OPT_MCU_SAMD21
-#elif defined(MCU_SAMD51)
-#define CFG_TUSB_MCU                OPT_MCU_SAMD51
 #endif
-#define CFG_TUSB_RHPORT0_MODE       OPT_MODE_DEVICE
-#define CFG_TUSB_MEM_SECTION
-#define CFG_TUSB_MEM_ALIGN          TU_ATTR_ALIGNED(4)
-
-// Device configuration
-
-#define CFG_TUD_ENDOINT0_SIZE       (64)
-#define CFG_TUD_CDC                 (1)
-#define CFG_TUD_CDC_RX_BUFSIZE      (64)
-#define CFG_TUD_CDC_TX_BUFSIZE      (64)
-
-#endif // MICROPY_INCLUDED_SAMD_TUSB_CONFIG_H

From f567a9255a2f801c8e47d8a1468f1c0415971fe4 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 8 Nov 2023 10:34:57 +1100
Subject: [PATCH 151/310] shared/tinyusb: Add a helper for hex string
 conversion.

Change the rp2 and renesas-ra ports to use the helper function.

Saves copy-pasta, at the small cost of one more function call in the
firmware (if not using LTO).

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/renesas-ra/usbd.c  | 11 ++---------
 ports/rp2/usbd.c         | 11 ++---------
 shared/tinyusb/mp_usbd.c | 10 ++++++++++
 shared/tinyusb/mp_usbd.h |  5 +++++
 4 files changed, 19 insertions(+), 18 deletions(-)

diff --git a/ports/renesas-ra/usbd.c b/ports/renesas-ra/usbd.c
index 7047503864..e7252b5f7a 100644
--- a/ports/renesas-ra/usbd.c
+++ b/ports/renesas-ra/usbd.c
@@ -34,15 +34,8 @@
 
 void mp_usbd_port_get_serial_number(char *serial_buf) {
     const bsp_unique_id_t *id = R_BSP_UniqueIdGet();
-    // convert to hex
-    int hexlen = sizeof(id->unique_id_bytes) * 2;
-    MP_STATIC_ASSERT(hexlen <= MICROPY_HW_USB_DESC_STR_MAX);
-    for (int i = 0; i < hexlen; i += 2) {
-        static const char *hexdig = "0123456789abcdef";
-        serial_buf[i] = hexdig[id->unique_id_bytes[i / 2] >> 4];
-        serial_buf[i + 1] = hexdig[id->unique_id_bytes[i / 2] & 0x0f];
-    }
-    serial_buf[hexlen] = 0;
+    MP_STATIC_ASSERT(sizeof(id->unique_id_bytes) * 2 <= MICROPY_HW_USB_DESC_STR_MAX);
+    mp_usbd_hex_str(serial_buf, id->unique_id_bytes, sizeof(id->unique_id_bytes));
 }
 
 #endif
diff --git a/ports/rp2/usbd.c b/ports/rp2/usbd.c
index 568b628416..8724f802f0 100644
--- a/ports/rp2/usbd.c
+++ b/ports/rp2/usbd.c
@@ -36,15 +36,8 @@
 void mp_usbd_port_get_serial_number(char *serial_buf) {
     pico_unique_board_id_t id;
     pico_get_unique_board_id(&id);
-    // convert to hex
-    int hexlen = sizeof(id.id) * 2;
-    MP_STATIC_ASSERT(hexlen <= MICROPY_HW_USB_DESC_STR_MAX);
-    for (int i = 0; i < hexlen; i += 2) {
-        static const char *hexdig = "0123456789abcdef";
-        serial_buf[i] = hexdig[id.id[i / 2] >> 4];
-        serial_buf[i + 1] = hexdig[id.id[i / 2] & 0x0f];
-    }
-    serial_buf[hexlen] = 0;
+    MP_STATIC_ASSERT(sizeof(id.id) * 2 <= MICROPY_HW_USB_DESC_STR_MAX);
+    mp_usbd_hex_str(serial_buf, id.id, sizeof(id.id));
 }
 
 #endif
diff --git a/shared/tinyusb/mp_usbd.c b/shared/tinyusb/mp_usbd.c
index 55af3d4fb4..74b3f07492 100644
--- a/shared/tinyusb/mp_usbd.c
+++ b/shared/tinyusb/mp_usbd.c
@@ -62,4 +62,14 @@ static void mp_usbd_task_callback(mp_sched_node_t *node) {
     mp_usbd_task();
 }
 
+void mp_usbd_hex_str(char *out_str, const uint8_t *bytes, size_t bytes_len) {
+    size_t hex_len = bytes_len * 2;
+    for (int i = 0; i < hex_len; i += 2) {
+        static const char *hexdig = "0123456789abcdef";
+        out_str[i] = hexdig[bytes[i / 2] >> 4];
+        out_str[i + 1] = hexdig[bytes[i / 2] & 0x0f];
+    }
+    out_str[hex_len] = 0;
+}
+
 #endif
diff --git a/shared/tinyusb/mp_usbd.h b/shared/tinyusb/mp_usbd.h
index 340637c95f..83a8f8617c 100644
--- a/shared/tinyusb/mp_usbd.h
+++ b/shared/tinyusb/mp_usbd.h
@@ -36,4 +36,9 @@ void mp_usbd_task(void);
 // Can write a string up to MICROPY_HW_USB_DESC_STR_MAX characters long, plus terminating byte.
 extern void mp_usbd_port_get_serial_number(char *buf);
 
+// Most ports need to write a hexadecimal serial number from a byte array, this
+// is a helper function for this. out_str must be long enough to hold a string of total
+// length (2 * bytes_len + 1) (including NUL terminator).
+void mp_usbd_hex_str(char *out_str, const uint8_t *bytes, size_t bytes_len);
+
 #endif // MICROPY_INCLUDED_SHARED_TINYUSB_USBD_H

From 8b1980ad450ea2b34af4b831a8c655ba08dee800 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 8 Nov 2023 10:37:04 +1100
Subject: [PATCH 152/310] samd: Use unique id for USB serial number.

Replaces the previous all-zeroes "TODO" serial number.

Requires refactoring the low-level unique_id routine out from modmachine.c.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/samd/modmachine.c   | 42 +++------------------------------------
 ports/samd/mpconfigport.h |  5 +++++
 ports/samd/samd_soc.c     | 36 +++++++++++++++++++++++++++++++++
 ports/samd/samd_soc.h     |  8 ++++++++
 ports/samd/usbd.c         |  9 +++++----
 5 files changed, 57 insertions(+), 43 deletions(-)

diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 7c3d96eb01..8c4808075e 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -92,45 +92,9 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
 
 STATIC mp_obj_t machine_unique_id(void) {
-    // Each device has a unique 128-bit serial number which is a concatenation of four 32-bit
-    // words contained at the following addresses. The uniqueness of the serial number is
-    // guaranteed only when using all 128 bits.
-    // Atmel SAM D21E / SAM D21G / SAM D21J
-    // SMART ARM-Based Microcontroller
-    // DATASHEET
-    // 9.6 (SAMD51) or 9.3.3 (or 10.3.3 depending on which manual)(SAMD21) Serial Number
-    //
-    // EXAMPLE (SAMD21)
-    // ----------------
-    // OpenOCD:
-    // Word0:
-    // > at91samd21g18.cpu mdw 0x0080A00C 1
-    // 0x0080a00c: 6e27f15f
-    // Words 1-3:
-    // > at91samd21g18.cpu mdw 0x0080A040 3
-    // 0x0080a040: 50534b54 332e3120 ff091645
-    //
-    // MicroPython (this code and same order as shown in Arduino IDE)
-    // >>> binascii.hexlify(machine.unique_id())
-    // b'6e27f15f50534b54332e3120ff091645'
-
-    #if defined(MCU_SAMD21)
-    uint32_t *id_addresses[4] = {(uint32_t *)0x0080A00C, (uint32_t *)0x0080A040,
-                                 (uint32_t *)0x0080A044, (uint32_t *)0x0080A048};
-    #elif defined(MCU_SAMD51)
-    uint32_t *id_addresses[4] = {(uint32_t *)0x008061FC, (uint32_t *)0x00806010,
-                                 (uint32_t *)0x00806014, (uint32_t *)0x00806018};
-    #endif
-    uint8_t raw_id[16];
-
-    for (int i = 0; i < 4; i++) {
-        for (int k = 0; k < 4; k++) {
-            // 'Reverse' the read bytes into a 32 bit word (Consistent with Arduino)
-            raw_id[4 * i + k] = (*(id_addresses[i]) >> (24 - k * 8)) & 0xff;
-        }
-    }
-
-    return mp_obj_new_bytes((byte *)&raw_id, sizeof(raw_id));
+    samd_unique_id_t id;
+    samd_get_unique_id(&id);
+    return mp_obj_new_bytes((byte *)&id.bytes, sizeof(id.bytes));
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 497ca9a870..3684457b48 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -67,6 +67,11 @@
 #ifndef MICROPY_HW_USB_CDC
 #define MICROPY_HW_USB_CDC (1)
 #endif
+// SAMD unique ID is 16 bytes (hex string == 32)
+#ifndef MICROPY_HW_USB_DESC_STR_MAX
+#define MICROPY_HW_USB_DESC_STR_MAX (32)
+#endif
+
 #endif
 
 // Control over Python builtins
diff --git a/ports/samd/samd_soc.c b/ports/samd/samd_soc.c
index ad5910301c..dcfff9dc22 100644
--- a/ports/samd/samd_soc.c
+++ b/ports/samd/samd_soc.c
@@ -153,3 +153,39 @@ void sercom_deinit_all(void) {
 }
 
 #endif
+
+void samd_get_unique_id(samd_unique_id_t *id) {
+    // Atmel SAM D21E / SAM D21G / SAM D21J
+    // SMART ARM-Based Microcontroller
+    // DATASHEET
+    // 9.6 (SAMD51) or 9.3.3 (or 10.3.3 depending on which manual)(SAMD21) Serial Number
+    //
+    // EXAMPLE (SAMD21)
+    // ----------------
+    // OpenOCD:
+    // Word0:
+    // > at91samd21g18.cpu mdw 0x0080A00C 1
+    // 0x0080a00c: 6e27f15f
+    // Words 1-3:
+    // > at91samd21g18.cpu mdw 0x0080A040 3
+    // 0x0080a040: 50534b54 332e3120 ff091645
+    //
+    // MicroPython (this code and same order as shown in Arduino IDE)
+    // >>> binascii.hexlify(machine.unique_id())
+    // b'6e27f15f50534b54332e3120ff091645'
+
+    #if defined(MCU_SAMD21)
+    uint32_t *id_addresses[4] = {(uint32_t *)0x0080A00C, (uint32_t *)0x0080A040,
+                                 (uint32_t *)0x0080A044, (uint32_t *)0x0080A048};
+    #elif defined(MCU_SAMD51)
+    uint32_t *id_addresses[4] = {(uint32_t *)0x008061FC, (uint32_t *)0x00806010,
+                                 (uint32_t *)0x00806014, (uint32_t *)0x00806018};
+    #endif
+
+    for (int i = 0; i < 4; i++) {
+        for (int k = 0; k < 4; k++) {
+            // 'Reverse' the read bytes into a 32 bit word (Consistent with Arduino)
+            id->bytes[4 * i + k] = (*(id_addresses[i]) >> (24 - k * 8)) & 0xff;
+        }
+    }
+}
diff --git a/ports/samd/samd_soc.h b/ports/samd/samd_soc.h
index 90a5a57ffa..707d2f8edf 100644
--- a/ports/samd/samd_soc.h
+++ b/ports/samd/samd_soc.h
@@ -30,6 +30,10 @@
 #include "sam.h"
 #include "clock_config.h"
 
+typedef struct _samd_unique_id_t {
+    uint8_t bytes[16];
+} samd_unique_id_t;
+
 extern Sercom *sercom_instance[];
 
 void samd_init(void);
@@ -40,6 +44,10 @@ void USB_Handler_wrapper(void);
 void sercom_enable(Sercom *spi, int state);
 void sercom_register_irq(int sercom_id, void (*sercom_irq_handler));
 
+// Each device has a unique 128-bit serial number. The uniqueness of the serial number is
+// guaranteed only when using all 128 bits.
+void samd_get_unique_id(samd_unique_id_t *id);
+
 #define SERCOM_IRQ_TYPE_UART  (0)
 #define SERCOM_IRQ_TYPE_SPI   (1)
 #define SERCOM_IRQ_TYPE_I2C   (2)
diff --git a/ports/samd/usbd.c b/ports/samd/usbd.c
index 90f2e1bfd9..2e3200ad7d 100644
--- a/ports/samd/usbd.c
+++ b/ports/samd/usbd.c
@@ -31,12 +31,13 @@
 #include "mp_usbd.h"
 #include "string.h"
 #include "tusb.h"
-
-#define SERIAL_TODO "000000000000" // TODO
+#include "samd_soc.h"
 
 void mp_usbd_port_get_serial_number(char *serial_buf) {
-    MP_STATIC_ASSERT(sizeof(SERIAL_TODO) <= MICROPY_HW_USB_DESC_STR_MAX);
-    strcpy(serial_buf, SERIAL_TODO);
+    samd_unique_id_t id;
+    samd_get_unique_id(&id);
+    MP_STATIC_ASSERT(sizeof(id.bytes) * 2 <= MICROPY_HW_USB_DESC_STR_MAX);
+    mp_usbd_hex_str(serial_buf, id.bytes, sizeof(id.bytes));
 }
 
 void USB_Handler_wrapper(void) {

From 37c1c5fa49aec4b6e5813719341af442fa45a9d9 Mon Sep 17 00:00:00 2001
From: Andrew Leech <andrew.leech@planetinnovation.com.au>
Date: Wed, 7 Jun 2023 13:35:02 +1000
Subject: [PATCH 153/310] stm32/mpu: Enable STM32WB mpu use to support qspi
 flash.

Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
---
 ports/stm32/mpu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/stm32/mpu.h b/ports/stm32/mpu.h
index e95a07da91..b3e2aec2d8 100644
--- a/ports/stm32/mpu.h
+++ b/ports/stm32/mpu.h
@@ -26,7 +26,7 @@
 #ifndef MICROPY_INCLUDED_STM32_MPU_H
 #define MICROPY_INCLUDED_STM32_MPU_H
 
-#if (defined(STM32F4) && defined(MICROPY_HW_ETH_MDC)) || defined(STM32F7) || defined(STM32H7)
+#if (defined(STM32F4) && defined(MICROPY_HW_ETH_MDC)) || defined(STM32F7) || defined(STM32H7) || defined(STM32WB)
 
 #define MPU_REGION_ETH      (MPU_REGION_NUMBER0)
 #define MPU_REGION_QSPI1    (MPU_REGION_NUMBER1)

From 1879db7105e5139160d79193fc95964662792401 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Peter=20Z=C3=BCger?= <zueger.peter@icloud.com>
Date: Fri, 3 Nov 2023 11:17:42 +0100
Subject: [PATCH 154/310] extmod/extmod.mk: Allow enabling lwip loopback
 support.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Enabling MICROPY_PY_LWIP_LOOPBACK via make will turn on loopback support.

Signed-off-by: Peter Züger <zueger.peter@icloud.com>
---
 extmod/extmod.mk | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index a04856bce2..84573ec861 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -267,6 +267,9 @@ SRC_THIRDPARTY_C += $(addprefix $(LWIP_DIR)/,\
 	core/ipv6/nd6.c \
 	netif/ethernet.c \
 	)
+ifeq ($(MICROPY_PY_LWIP_LOOPBACK),1)
+CFLAGS_EXTMOD += -DLWIP_NETIF_LOOPBACK=1
+endif
 ifeq ($(MICROPY_PY_LWIP_SLIP),1)
 CFLAGS_EXTMOD += -DMICROPY_PY_LWIP_SLIP=1
 SRC_THIRDPARTY_C += $(LWIP_DIR)/netif/slipif.c

From a23dbdca7944e03a990f04f5aede0c1fb93d6919 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Peter=20Z=C3=BCger?= <zueger.peter@icloud.com>
Date: Fri, 3 Nov 2023 11:18:05 +0100
Subject: [PATCH 155/310] stm32: Add optional lwip loopback support.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

MICROPY_PY_LWIP_LOOPBACK must be set at the make level to enable this.

Signed-off-by: Peter Züger <zueger.peter@icloud.com>
---
 ports/stm32/lwip_inc/lwipopts.h | 3 +++
 ports/stm32/mpnetworkport.c     | 4 ++++
 2 files changed, 7 insertions(+)

diff --git a/ports/stm32/lwip_inc/lwipopts.h b/ports/stm32/lwip_inc/lwipopts.h
index 7b2460fa80..f641cf515a 100644
--- a/ports/stm32/lwip_inc/lwipopts.h
+++ b/ports/stm32/lwip_inc/lwipopts.h
@@ -24,6 +24,9 @@
 #define LWIP_NETIF_HOSTNAME             1
 #define LWIP_NETIF_EXT_STATUS_CALLBACK  1
 
+#define LWIP_LOOPIF_MULTICAST           1
+#define LWIP_LOOPBACK_MAX_PBUFS         8
+
 #define LWIP_IPV6                       0
 #define LWIP_DHCP                       1
 #define LWIP_DHCP_CHECK_LINK_UP         1
diff --git a/ports/stm32/mpnetworkport.c b/ports/stm32/mpnetworkport.c
index 62f780a35a..3b9591213a 100644
--- a/ports/stm32/mpnetworkport.c
+++ b/ports/stm32/mpnetworkport.c
@@ -72,6 +72,10 @@ STATIC void pyb_lwip_poll(void) {
 
     // Run the lwIP internal updates
     sys_check_timeouts();
+
+    #if LWIP_NETIF_LOOPBACK
+    netif_poll_all();
+    #endif
 }
 
 void mod_network_lwip_poll_wrapper(uint32_t ticks_ms) {

From 36e162f11602a23682dd482efbc69e0483924800 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Peter=20Z=C3=BCger?= <zueger.peter@icloud.com>
Date: Fri, 3 Nov 2023 11:19:53 +0100
Subject: [PATCH 156/310] tests/net_hosted/asyncio_loopback.py: Add loopback
 test.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Peter Züger <zueger.peter@icloud.com>
---
 tests/net_hosted/asyncio_loopback.py     | 64 ++++++++++++++++++++++++
 tests/net_hosted/asyncio_loopback.py.exp | 14 ++++++
 2 files changed, 78 insertions(+)
 create mode 100644 tests/net_hosted/asyncio_loopback.py
 create mode 100644 tests/net_hosted/asyncio_loopback.py.exp

diff --git a/tests/net_hosted/asyncio_loopback.py b/tests/net_hosted/asyncio_loopback.py
new file mode 100644
index 0000000000..fd4674544c
--- /dev/null
+++ b/tests/net_hosted/asyncio_loopback.py
@@ -0,0 +1,64 @@
+# Test network loopback behaviour
+
+try:
+    import asyncio
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+async def client(host, port):
+    print(f"client open_connection to {host}:{port}")
+    reader, writer = await asyncio.open_connection(host, port)
+
+    data_in = b"A" * 100
+
+    print("client writing")
+    writer.write(data_in)
+    await writer.drain()
+
+    await asyncio.sleep(0.1)
+
+    print("client reading")
+    data = await reader.readexactly(100)
+    print(f"client got {len(data)} bytes")
+
+    assert data_in == data
+
+    print("client closing")
+
+    writer.close()
+    await writer.wait_closed()
+
+    print("client closed")
+
+
+async def echo_handler(reader, writer):
+    print("handler reading")
+    await asyncio.sleep(0.1)
+    data = await reader.readexactly(100)
+    print(f"handler got {len(data)} bytes")
+
+    print("handler writing")
+    writer.write(data)
+    await writer.drain()
+
+    print("handler closing")
+
+    writer.close()
+    await writer.wait_closed()
+
+    print("handler closed")
+
+
+async def test(host, port):
+    print(f"create server on {host}:{port}")
+    server = await asyncio.start_server(echo_handler, host, port)
+
+    async with server:
+        print("server started")
+        await client("127.0.0.1", 8080)
+    print("server closed")
+
+
+asyncio.run(test("0.0.0.0", 8080))
diff --git a/tests/net_hosted/asyncio_loopback.py.exp b/tests/net_hosted/asyncio_loopback.py.exp
new file mode 100644
index 0000000000..7110b35e12
--- /dev/null
+++ b/tests/net_hosted/asyncio_loopback.py.exp
@@ -0,0 +1,14 @@
+create server on 0.0.0.0:8080
+server started
+client open_connection to 127.0.0.1:8080
+client writing
+handler reading
+client reading
+handler got 100 bytes
+handler writing
+handler closing
+handler closed
+client got 100 bytes
+client closing
+client closed
+server closed

From 70feb123bf60fa59e731d7c66b07fcb87a486227 Mon Sep 17 00:00:00 2001
From: ThomHPL <thomas.herpoel@gmail.com>
Date: Thu, 16 Nov 2023 03:28:59 +0100
Subject: [PATCH 157/310] stm32/boards/NUCLEO_F446RE: Add UARTs 1, 3 and 4.

Signed-off-by: ThomHPL <thomas.herpoel@gmail.com>
---
 .../stm32/boards/NUCLEO_F446RE/mpconfigboard.h | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h
index 88bfd39b41..a0a6dbf8c5 100644
--- a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h
@@ -16,10 +16,20 @@
 #define MICROPY_HW_CLK_PLLQ (7)
 
 // UART config
-#define MICROPY_HW_UART2_TX     (pin_A2)
-#define MICROPY_HW_UART2_RX     (pin_A3)
-#define MICROPY_HW_UART6_TX     (pin_C6)
-#define MICROPY_HW_UART6_RX     (pin_C7)
+#define MICROPY_HW_UART1_TX     (pin_B6)    // Arduino D10, pin 17 on CN10
+#define MICROPY_HW_UART1_RX     (pin_B7)    //              pin 21 on CN7
+#define MICROPY_HW_UART2_TX     (pin_A2)    // Arduino D1,  pin 35 on CN10
+#define MICROPY_HW_UART2_RX     (pin_A3)    // Arduino D0,  pin 37 on CN10
+#define MICROPY_HW_UART2_RTS    (pin_A1)    // Arduino A1,  pin 30 on CN7
+#define MICROPY_HW_UART2_CTS    (pin_A0)    // Arduino A0,  pin 28 on CN7
+#define MICROPY_HW_UART3_TX     (pin_B10)   // Arduino D6,  pin 25 on CN10
+#define MICROPY_HW_UART3_RX     (pin_C5)    //              pin  6 on CN10
+#define MICROPY_HW_UART3_RTS    (pin_B14)   //              pin 28 on CN10
+#define MICROPY_HW_UART3_CTS    (pin_B13)   //              pin 30 on CN10
+#define MICROPY_HW_UART4_TX     (pin_A0)    // Arduino A0,  pin 28 on CN7
+#define MICROPY_HW_UART4_RX     (pin_A1)    // Arduino A1,  pin 30 on CN7
+#define MICROPY_HW_UART6_TX     (pin_C6)    //              pin  4 on CN10
+#define MICROPY_HW_UART6_RX     (pin_C7)    // Arduino D9,  pin 19 on CN10
 // UART 2 connects to the STM32F103 (STLINK) on the Nucleo board
 // and this is exposed as a USB Serial port.
 #define MICROPY_HW_UART_REPL        PYB_UART_2

From 0cc100be2c08f6b4e53a208dea8ef7953dc29cea Mon Sep 17 00:00:00 2001
From: Rene Straub <rene@see5.ch>
Date: Sun, 6 Aug 2023 11:18:53 +0200
Subject: [PATCH 158/310] stm32/boards/NUCLEO_H563ZI: Add new NUCLEO-H563ZI
 board definition.

Configuration:
- Clock is HSE, CPU runs at 250MHz.
- REPL on USB and UART connected to the ST-Link interface.
- Storage is configured for internal flash memory.
- Three LEDs and one user button.
- Ethernet is enabled.

Signed-off-by: Rene Straub <rene@see5.ch>
---
 ports/stm32/boards/NUCLEO_H563ZI/board.json   |  15 ++
 .../boards/NUCLEO_H563ZI/mpconfigboard.h      |  91 ++++++++++++
 .../boards/NUCLEO_H563ZI/mpconfigboard.mk     |  23 ++++
 ports/stm32/boards/NUCLEO_H563ZI/pins.csv     | 130 ++++++++++++++++++
 .../boards/NUCLEO_H563ZI/stm32h5xx_hal_conf.h |  19 +++
 5 files changed, 278 insertions(+)
 create mode 100644 ports/stm32/boards/NUCLEO_H563ZI/board.json
 create mode 100644 ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.h
 create mode 100644 ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.mk
 create mode 100644 ports/stm32/boards/NUCLEO_H563ZI/pins.csv
 create mode 100644 ports/stm32/boards/NUCLEO_H563ZI/stm32h5xx_hal_conf.h

diff --git a/ports/stm32/boards/NUCLEO_H563ZI/board.json b/ports/stm32/boards/NUCLEO_H563ZI/board.json
new file mode 100644
index 0000000000..b9c4e41b3e
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H563ZI/board.json
@@ -0,0 +1,15 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [],
+    "images": [
+        "nucleo_h563zi.jpg"
+    ],
+    "mcu": "stm32h5",
+    "product": "Nucleo H563ZI",
+    "thumbnail": "",
+    "url": "",
+    "vendor": "ST Microelectronics"
+}
diff --git a/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.h
new file mode 100644
index 0000000000..1e802eda5b
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.h
@@ -0,0 +1,91 @@
+#define MICROPY_HW_BOARD_NAME               "NUCLEO_H563ZI"
+#define MICROPY_HW_MCU_NAME                 "STM32H563ZI"
+
+#define MICROPY_PY_PYB_LEGACY               (0)
+#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1)
+#define MICROPY_HW_ENABLE_RTC               (1)
+#define MICROPY_HW_ENABLE_RNG               (1)
+#define MICROPY_HW_ENABLE_ADC               (1)
+#define MICROPY_HW_ENABLE_DAC               (1)
+#define MICROPY_HW_ENABLE_USB               (1)
+#define MICROPY_HW_HAS_SWITCH               (1)
+#define MICROPY_HW_HAS_FLASH                (1)
+
+// The board has a 8MHz oscillator, the following gives 250MHz CPU speed
+#define MICROPY_HW_CLK_USE_BYPASS           (1)
+#define MICROPY_HW_CLK_PLLM                 (2)
+#define MICROPY_HW_CLK_PLLN                 (125)
+#define MICROPY_HW_CLK_PLLP                 (2)
+#define MICROPY_HW_CLK_PLLQ                 (2)
+#define MICROPY_HW_CLK_PLLR                 (2)
+#define MICROPY_HW_CLK_PLLVCI_LL            (LL_RCC_PLLINPUTRANGE_4_8)
+#define MICROPY_HW_CLK_PLLVCO_LL            (LL_RCC_PLLVCORANGE_WIDE)
+#define MICROPY_HW_CLK_PLLFRAC              (0)
+
+// PLL3 with Q output at 48MHz for USB
+// #define MICROPY_HW_CLK_USE_PLL3_FOR_USB
+#define MICROPY_HW_CLK_PLL3M                (8)
+#define MICROPY_HW_CLK_PLL3N                (192)
+#define MICROPY_HW_CLK_PLL3P                (2)
+#define MICROPY_HW_CLK_PLL3Q                (4)
+#define MICROPY_HW_CLK_PLL3R                (2)
+#define MICROPY_HW_CLK_PLL3FRAC             (0)
+#define MICROPY_HW_CLK_PLL3VCI_LL           (LL_RCC_PLLINPUTRANGE_1_2)
+#define MICROPY_HW_CLK_PLL3VCO_LL           (LL_RCC_PLLVCORANGE_MEDIUM)
+
+// 5 wait states, according to Table 37, Reference Manual (RM0481 Rev 1)
+#define MICROPY_HW_FLASH_LATENCY            FLASH_LATENCY_5
+
+// There is an external 32kHz oscillator
+#define MICROPY_HW_RTC_USE_LSE              (1)
+
+// UART config
+#define MICROPY_HW_UART1_TX                 (pin_B6) // SB14: Arduino Connector CN10-Pin14 (D1)
+#define MICROPY_HW_UART1_RX                 (pin_B7) // SB63: Arduino Connector CN10-Pin16 (D0)
+#define MICROPY_HW_UART3_TX                 (pin_D8) // SB23: ST-Link
+#define MICROPY_HW_UART3_RX                 (pin_D9) // SB18: ST-Link
+
+// Connect REPL to UART3 which is provided on ST-Link USB interface
+#define MICROPY_HW_UART_REPL                PYB_UART_3
+#define MICROPY_HW_UART_REPL_BAUD           115200
+
+// I2C buses
+#define MICROPY_HW_I2C1_SCL                 (pin_B8) // Arduino Connector CN7-Pin2 (D15)
+#define MICROPY_HW_I2C1_SDA                 (pin_B9) // Arduino Connector CN7-Pin4 (D14)
+#define MICROPY_HW_I2C2_SCL                 (pin_F1) // Connector CN9-Pin19
+#define MICROPY_HW_I2C2_SDA                 (pin_F0) // Connector CN9-Pin21
+
+// SPI buses
+// PD14 according to datasheet not working as SPI1_NSS, have to use as GPIO, not as AF
+#define MICROPY_HW_SPI1_NSS                 (pin_D14) // Arduino Connector CN7-Pin16 (D10)
+#define MICROPY_HW_SPI1_SCK                 (pin_A5) // Arduino Connector CN7-Pin10 (D13)
+#define MICROPY_HW_SPI1_MISO                (pin_G9) // Arduino Connector CN7-Pin12 (D12)
+#define MICROPY_HW_SPI1_MOSI                (pin_B5) // Arduino Connector CN7-Pin14 (D11)
+
+// USRSW is pulled low. Pressing the button makes the input go high.
+#define MICROPY_HW_USRSW_PIN                (pin_C13)
+#define MICROPY_HW_USRSW_PULL               (GPIO_NOPULL)
+#define MICROPY_HW_USRSW_EXTI_MODE          (GPIO_MODE_IT_RISING)
+#define MICROPY_HW_USRSW_PRESSED            (1)
+
+// LEDs
+#define MICROPY_HW_LED1                     (pin_B0) // Green
+#define MICROPY_HW_LED2                     (pin_F4) // Orange
+#define MICROPY_HW_LED3                     (pin_G4) // Red
+#define MICROPY_HW_LED_ON(pin)              (mp_hal_pin_high(pin))
+#define MICROPY_HW_LED_OFF(pin)             (mp_hal_pin_low(pin))
+
+// USB config
+#define MICROPY_HW_USB_FS                   (1)
+#define MICROPY_HW_USB_MAIN_DEV             (USB_PHY_FS_ID)
+
+// Ethernet via RMII
+#define MICROPY_HW_ETH_MDC          (pin_C1)
+#define MICROPY_HW_ETH_MDIO         (pin_A2)
+#define MICROPY_HW_ETH_RMII_REF_CLK (pin_A1)
+#define MICROPY_HW_ETH_RMII_CRS_DV  (pin_A7)
+#define MICROPY_HW_ETH_RMII_RXD0    (pin_C4)
+#define MICROPY_HW_ETH_RMII_RXD1    (pin_C5)
+#define MICROPY_HW_ETH_RMII_TX_EN   (pin_G11)
+#define MICROPY_HW_ETH_RMII_TXD0    (pin_G13)
+#define MICROPY_HW_ETH_RMII_TXD1    (pin_B15)
diff --git a/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.mk
new file mode 100644
index 0000000000..a55a54d1c7
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.mk
@@ -0,0 +1,23 @@
+USE_MBOOT ?= 0
+
+# MCU settings
+MCU_SERIES = h5
+CMSIS_MCU = STM32H573xx
+MICROPY_FLOAT_IMPL = single
+AF_FILE = boards/stm32h573_af.csv
+
+ifeq ($(USE_MBOOT),1)
+# When using Mboot everything goes after the bootloader
+# TODO: not tested
+LD_FILES = boards/stm32h573xi.ld boards/common_bl.ld
+TEXT0_ADDR = 0x08008000
+else
+# When not using Mboot everything goes at the start of flash
+LD_FILES = boards/stm32h573xi.ld boards/common_basic.ld
+TEXT0_ADDR = 0x08000000
+endif
+
+# MicroPython settings
+MICROPY_PY_LWIP = 1
+MICROPY_PY_SSL = 1
+MICROPY_SSL_MBEDTLS = 1
diff --git a/ports/stm32/boards/NUCLEO_H563ZI/pins.csv b/ports/stm32/boards/NUCLEO_H563ZI/pins.csv
new file mode 100644
index 0000000000..1f83e8a505
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H563ZI/pins.csv
@@ -0,0 +1,130 @@
+,PA0
+,PA1
+,PA2
+,PA3
+,PA4
+,PA5
+,PA7
+,PA8
+,PA9
+,PA10
+,PA11
+,PA12
+,PA13
+,PA14
+,PA15
+,PB0
+,PB2
+,PB3
+,PB4
+,PB5
+,PB6
+,PB7
+,PB8
+,PB9
+,PB10
+,PB11
+,PB12
+,PB13
+,PB14
+,PB15
+,PC1
+,PC4
+,PC5
+,PC6
+,PC7
+,PC8
+,PC9
+,PC10
+,PC11
+,PC12
+,PC13
+,PC14
+,PC15
+,PD0
+,PD1
+,PD2
+,PD3
+,PD4
+,PD5
+,PD6
+,PD7
+,PD8
+,PD9
+,PD10
+,PD11
+,PD12
+,PD13
+,PD14
+,PE0
+,PE1
+,PE2
+,PE3
+,PE4
+,PE5
+,PE6
+,PE7
+,PE8
+,PE10
+,PE12
+,PE15
+,PF0
+,PF1
+,PF2
+,PF4
+,PF5
+,PF6
+,PF7
+,PF8
+,PF9
+,PF10
+,PF12
+,PF13
+,PF14
+,PF15
+,PG0
+,PG1
+,PG2
+,PG3
+,PG4
+,PG5
+,PG6
+,PG7
+,PG8
+,PG9
+,PG10
+,PG11
+,PG13
+,PG15
+A0,PA6
+A1,PC0
+A2,PC3
+A3,PB1
+A4,PC2
+A5,PF11
+D2,PG14
+D3,PE13
+D4,PE14
+D5,PE11
+D6,PE9
+D7,PG12
+D8,PF3
+D9,PD15
+UART1_TX,PB6
+UART1_RX,PB7
+UART3_TX,PD8
+UART3_RX,PD9
+LED_GREEN,PB0
+LED_ORANGE,PF4
+LED_RED,PG4
+SW,PC13
+I2C1_SDA,PB9
+I2C1_SCL,PB8
+I2C2_SDA,PF1
+I2C2_SCL,PF0
+USB_DM,PA11
+USB_DP,PA12
+SPI_A_CS,PD14
+SPI_A_SCK,PA5
+SPI_A_MOSI,PB5
+SPI_A_MISO,PG9
diff --git a/ports/stm32/boards/NUCLEO_H563ZI/stm32h5xx_hal_conf.h b/ports/stm32/boards/NUCLEO_H563ZI/stm32h5xx_hal_conf.h
new file mode 100644
index 0000000000..f86c9300e3
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H563ZI/stm32h5xx_hal_conf.h
@@ -0,0 +1,19 @@
+/* This file is part of the MicroPython project, http://micropython.org/
+ * The MIT License (MIT)
+ * Copyright (c) 2023 Damien P. George
+ */
+#ifndef MICROPY_INCLUDED_STM32H5XX_HAL_CONF_H
+#define MICROPY_INCLUDED_STM32H5XX_HAL_CONF_H
+
+// Oscillator values in Hz
+#define HSE_VALUE (8000000)
+#define LSE_VALUE (32768)
+#define EXTERNAL_CLOCK_VALUE (12288000)
+
+// Oscillator timeouts in ms
+#define HSE_STARTUP_TIMEOUT (100)
+#define LSE_STARTUP_TIMEOUT (5000)
+
+#include "boards/stm32h5xx_hal_conf_base.h"
+
+#endif // MICROPY_INCLUDED_STM32H5XX_HAL_CONF_H

From c34941109fa9390c1b41200064eaa17c7aeb7961 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 16 Nov 2023 18:29:39 +1100
Subject: [PATCH 159/310] stm32/sdcard: Add SD card support for H5 MCUs.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/Makefile | 2 +-
 ports/stm32/dma.c    | 2 +-
 ports/stm32/sdcard.c | 6 +++---
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index edebd2db9d..56b5a1020c 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -408,7 +408,7 @@ HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_,\
 	)
 endif
 
-ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 h7 l4))
+ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 h5 h7 l4))
 HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_,\
 	hal_sd.c \
 	ll_sdmmc.c \
diff --git a/ports/stm32/dma.c b/ports/stm32/dma.c
index 0a5d25c16c..af56d81236 100644
--- a/ports/stm32/dma.c
+++ b/ports/stm32/dma.c
@@ -156,7 +156,7 @@ static const DMA_InitTypeDef dma_init_struct_i2s = {
 };
 #endif
 
-#if ENABLE_SDIO && !defined(STM32H7)
+#if ENABLE_SDIO && !defined(STM32H5) && !defined(STM32H7)
 // Parameters to dma_init() for SDIO tx and rx.
 static const DMA_InitTypeDef dma_init_struct_sdio = {
     #if defined(STM32F4) || defined(STM32F7)
diff --git a/ports/stm32/sdcard.c b/ports/stm32/sdcard.c
index d09ee21d09..a903f79ed2 100644
--- a/ports/stm32/sdcard.c
+++ b/ports/stm32/sdcard.c
@@ -40,7 +40,7 @@
 
 #if MICROPY_HW_ENABLE_SDCARD || MICROPY_HW_ENABLE_MMCARD
 
-#if defined(STM32F7) || defined(STM32H7) || defined(STM32L4)
+#if defined(STM32F7) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4)
 
 // The H7/F7/L4 have 2 SDMMC peripherals, but at the moment this driver only supports
 // using one of them in a given build, selected by MICROPY_HW_SDCARD_SDMMC.
@@ -104,7 +104,7 @@
 #define SDIO_HARDWARE_FLOW_CONTROL_DISABLE  SDMMC_HARDWARE_FLOW_CONTROL_DISABLE
 #define SDIO_HARDWARE_FLOW_CONTROL_ENABLE   SDMMC_HARDWARE_FLOW_CONTROL_ENABLE
 
-#if defined(STM32H7)
+#if defined(STM32H5) || defined(STM32H7)
 #define SDIO_TRANSFER_CLK_DIV               SDMMC_NSpeed_CLK_DIV
 #define SDIO_USE_GPDMA                      0
 #else
@@ -268,7 +268,7 @@ STATIC HAL_StatusTypeDef sdmmc_init_sd(void) {
     // SD device interface configuration
     sdmmc_handle.sd.Instance = SDIO;
     sdmmc_handle.sd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
-    #ifndef STM32H7
+    #if !defined(STM32H5) && !defined(STM32H7)
     sdmmc_handle.sd.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
     #endif
     sdmmc_handle.sd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_ENABLE;

From 92741a34388e85d07e26511ff81b27af99445f00 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 17 Nov 2023 14:17:16 +1100
Subject: [PATCH 160/310] stm32/boards/STM32H573I_DK: Enable the SD card.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/boards/STM32H573I_DK/mpconfigboard.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/ports/stm32/boards/STM32H573I_DK/mpconfigboard.h b/ports/stm32/boards/STM32H573I_DK/mpconfigboard.h
index fba14329a5..c8e0340af1 100644
--- a/ports/stm32/boards/STM32H573I_DK/mpconfigboard.h
+++ b/ports/stm32/boards/STM32H573I_DK/mpconfigboard.h
@@ -8,6 +8,7 @@
 #define MICROPY_HW_ENABLE_ADC               (1)
 #define MICROPY_HW_ENABLE_DAC               (1)
 #define MICROPY_HW_ENABLE_USB               (1)
+#define MICROPY_HW_ENABLE_SDCARD            (1)
 #define MICROPY_HW_HAS_SWITCH               (1)
 #define MICROPY_HW_HAS_FLASH                (1)
 
@@ -106,6 +107,11 @@
 #define MICROPY_HW_USB_FS                   (1)
 #define MICROPY_HW_USB_MAIN_DEV             (USB_PHY_FS_ID)
 
+// SD card
+#define MICROPY_HW_SDCARD_DETECT_PIN        (pin_H14)
+#define MICROPY_HW_SDCARD_DETECT_PULL       (GPIO_PULLUP)
+#define MICROPY_HW_SDCARD_DETECT_PRESENT    (GPIO_PIN_RESET)
+
 // Ethernet via RMII
 #define MICROPY_HW_ETH_MDC                  (pin_C1)
 #define MICROPY_HW_ETH_MDIO                 (pin_A2)

From a968888f69d94890e8851efe38ace3b9448552d7 Mon Sep 17 00:00:00 2001
From: stijn <stijn@ignitron.net>
Date: Mon, 13 Nov 2023 16:04:40 +0100
Subject: [PATCH 161/310] py/obj: Fix mp_obj_is_type compilation with C++.

Fixes issue #12951.

Signed-off-by: stijn <stijn@ignitron.net>
---
 examples/usercmodule/cppexample/example.cpp |  7 +++++++
 py/misc.h                                   | 11 ++++++++---
 py/obj.h                                    |  8 ++++----
 3 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/examples/usercmodule/cppexample/example.cpp b/examples/usercmodule/cppexample/example.cpp
index 06809732a4..2df832baa7 100644
--- a/examples/usercmodule/cppexample/example.cpp
+++ b/examples/usercmodule/cppexample/example.cpp
@@ -1,9 +1,16 @@
 extern "C" {
 #include <examplemodule.h>
+#include <py/objstr.h>
 
 // Here we implement the function using C++ code, but since it's
 // declaration has to be compatible with C everything goes in extern "C" scope.
 mp_obj_t cppfunc(mp_obj_t a_obj, mp_obj_t b_obj) {
+    // The following no-ops are just here to verify the static assertions used in
+    // the public API all compile with C++.
+    MP_STATIC_ASSERT_STR_ARRAY_COMPATIBLE;
+    if (mp_obj_is_type(a_obj, &mp_type_BaseException)) {
+    }
+
     // Prove we have (at least) C++11 features.
     const auto a = mp_obj_get_int(a_obj);
     const auto b = mp_obj_get_int(b_obj);
diff --git a/py/misc.h b/py/misc.h
index 352a9f34c4..e19a535720 100644
--- a/py/misc.h
+++ b/py/misc.h
@@ -52,10 +52,15 @@ typedef unsigned int uint;
 
 // Static assertion macro
 #define MP_STATIC_ASSERT(cond) ((void)sizeof(char[1 - 2 * !(cond)]))
-#if defined(_MSC_VER)
-#define MP_STATIC_ASSERT_NOT_MSC(cond) (1)
+// In C++ things like comparing extern const pointers are not constant-expressions so cannot be used
+// in MP_STATIC_ASSERT. Note that not all possible compiler versions will reject this. Some gcc versions
+// do, others only with -Werror=vla, msvc always does.
+// The (void) is needed to avoid "left operand of comma operator has no effect [-Werror=unused-value]"
+// when using this macro on the left-hand side of a comma.
+#if defined(_MSC_VER) || defined(__cplusplus)
+#define MP_STATIC_ASSERT_NONCONSTEXPR(cond) ((void)1)
 #else
-#define MP_STATIC_ASSERT_NOT_MSC(cond) MP_STATIC_ASSERT(cond)
+#define MP_STATIC_ASSERT_NONCONSTEXPR(cond) MP_STATIC_ASSERT(cond)
 #endif
 
 // Round-up integer division
diff --git a/py/obj.h b/py/obj.h
index 56ae62172f..c7b7db0c38 100644
--- a/py/obj.h
+++ b/py/obj.h
@@ -928,10 +928,10 @@ void *mp_obj_malloc_helper(size_t num_bytes, const mp_obj_type_t *type);
 // optimizations (other tricks like using ({ expr; exper; }) or (exp, expr, expr) in mp_obj_is_type() result
 // in missed optimizations)
 #define mp_type_assert_not_bool_int_str_nonetype(t) (                                     \
-    MP_STATIC_ASSERT_NOT_MSC((t) != &mp_type_bool), assert((t) != &mp_type_bool),         \
-    MP_STATIC_ASSERT_NOT_MSC((t) != &mp_type_int), assert((t) != &mp_type_int),           \
-    MP_STATIC_ASSERT_NOT_MSC((t) != &mp_type_str), assert((t) != &mp_type_str),           \
-    MP_STATIC_ASSERT_NOT_MSC((t) != &mp_type_NoneType), assert((t) != &mp_type_NoneType), \
+    MP_STATIC_ASSERT_NONCONSTEXPR((t) != &mp_type_bool), assert((t) != &mp_type_bool),         \
+    MP_STATIC_ASSERT_NONCONSTEXPR((t) != &mp_type_int), assert((t) != &mp_type_int),           \
+    MP_STATIC_ASSERT_NONCONSTEXPR((t) != &mp_type_str), assert((t) != &mp_type_str),           \
+    MP_STATIC_ASSERT_NONCONSTEXPR((t) != &mp_type_NoneType), assert((t) != &mp_type_NoneType), \
     1)
 
 #define mp_obj_is_type(o, t) (mp_type_assert_not_bool_int_str_nonetype(t) && mp_obj_is_exact_type(o, t))

From 6f0193335af497c4e14d67c4224f8e35d3755ba8 Mon Sep 17 00:00:00 2001
From: Sebastian Romero <s.romero@arduino.cc>
Date: Thu, 9 Nov 2023 11:21:00 +0100
Subject: [PATCH 162/310] ports: Fix incorrect identifiers on Arduino boards.

This commit changes the Arduino board identifiers to correspond to their
official names.  This helps to identify boards at runtime.  At the moment
the Arduino Portenta H7 is reported as PORTENTA which is unfortunate as now
there is another Portenta board (Portenta C33) supported in MicroPython.

Also made the other identifiers for flash and network name consistent,
removed the incorrectly used MICROPY_PY_SYS_PLATFORM identifiers, and added
missing MICROPY_PY_NETWORK_HOSTNAME_DEFAULT identifiers.

Boards affected:
- stm32: ARDUINO_PORTENTA_H7, ARDUINO_GIGA, ARDUINO_NICLA_VISION
- renesas-ra: ARDUINO_PORTENTA_C33
- esp32: ARDUINO_NANO_ESP32
- rp2: ARDUINO_NANO_RP2040_CONNECT

Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
---
 ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h     | 3 +++
 .../boards/ARDUINO_PORTENTA_C33/mpconfigboard.h           | 6 +++++-
 .../boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h    | 3 +++
 ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h           | 8 +++++---
 ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h   | 8 +++++---
 ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h    | 8 ++++----
 6 files changed, 25 insertions(+), 11 deletions(-)

diff --git a/ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h b/ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h
index 3e98bb99d7..ec85a7bb36 100644
--- a/ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h
+++ b/ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h
@@ -1,6 +1,9 @@
 #define MICROPY_HW_BOARD_NAME               "Arduino Nano ESP32"
 #define MICROPY_HW_MCU_NAME                 "ESP32S3"
 
+// Network config
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-nano-esp32"
+
 #define MICROPY_PY_MACHINE_DAC              (0)
 
 #define MICROPY_HW_I2C0_SCL                 (12)
diff --git a/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h b/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
index aa1e28ab9d..da452f6871 100644
--- a/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
+++ b/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
@@ -5,10 +5,14 @@
  */
 
 // MCU config
-#define MICROPY_HW_BOARD_NAME       "PORTENTA C33"
+#define MICROPY_HW_BOARD_NAME       "Arduino Portenta C33"
 #define MICROPY_HW_MCU_NAME         "RA6M5"
 #define MICROPY_HW_MCU_SYSCLK       200000000
 #define MICROPY_HW_MCU_PCLK         100000000
+#define MICROPY_HW_FLASH_FS_LABEL   "Portenta C33"
+
+// Network config
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-portenta-c33"
 
 // module config
 #define MICROPY_EMIT_THUMB          (1)
diff --git a/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h b/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h
index 537c6d7057..b969341a7f 100644
--- a/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h
+++ b/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/mpconfigboard.h
@@ -4,6 +4,9 @@
 #define MICROPY_HW_BOARD_NAME           "Arduino Nano RP2040 Connect"
 #define MICROPY_HW_FLASH_STORAGE_BYTES  (8 * 1024 * 1024)
 
+// Network config
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-nano-rp2040-connect"
+
 // Enable networking.
 #define MICROPY_PY_NETWORK              (1)
 
diff --git a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
index ec9bbed5ea..b278fa005b 100644
--- a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
@@ -4,10 +4,12 @@
  * Copyright (c) 2023 Arduino SA
  */
 
-#define MICROPY_HW_BOARD_NAME       "GIGA"
+#define MICROPY_HW_BOARD_NAME       "Arduino GIGA R1 WiFi"
 #define MICROPY_HW_MCU_NAME         "STM32H747"
-#define MICROPY_PY_SYS_PLATFORM     "Giga"
-#define MICROPY_HW_FLASH_FS_LABEL   "Giga"
+#define MICROPY_HW_FLASH_FS_LABEL   "GIGA R1 WiFi"
+
+// Network config
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-giga-r1-wifi"
 
 #define MICROPY_OBJ_REPR            (MICROPY_OBJ_REPR_C)
 #define UINT_FMT                    "%u"
diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h b/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
index 3cae9b25fa..3a2def4d40 100644
--- a/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
@@ -4,10 +4,12 @@
  * Copyright (c) 2023 Arduino SA
  */
 
-#define MICROPY_HW_BOARD_NAME       "NICLAVISION"
+#define MICROPY_HW_BOARD_NAME       "Arduino Nicla Vision"
 #define MICROPY_HW_MCU_NAME         "STM32H747"
-#define MICROPY_PY_SYS_PLATFORM     "Nicla Vision"
-#define MICROPY_HW_FLASH_FS_LABEL   "niclavision"
+#define MICROPY_HW_FLASH_FS_LABEL   "Nicla Vision"
+
+// Network config
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-nicla-vision"
 
 #define MICROPY_OBJ_REPR            (MICROPY_OBJ_REPR_C)
 #define UINT_FMT                    "%u"
diff --git a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
index 133158c60a..e2e6956a47 100644
--- a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
@@ -4,12 +4,12 @@
  * Copyright (c) 2022 Arduino SA
  */
 
-#define MICROPY_HW_BOARD_NAME       "PORTENTA"
+#define MICROPY_HW_BOARD_NAME       "Arduino Portenta H7"
 #define MICROPY_HW_MCU_NAME         "STM32H747"
-#define MICROPY_PY_SYS_PLATFORM     "Portenta"
-#define MICROPY_HW_FLASH_FS_LABEL   "portenta"
+#define MICROPY_HW_FLASH_FS_LABEL   "Portenta H7"
 
-#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "Portenta"
+// Network config
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-portenta-h7"
 
 #define MICROPY_OBJ_REPR            (MICROPY_OBJ_REPR_C)
 #define UINT_FMT                    "%u"

From 6117aa686f5faac6692f0def91be8e40a696aca3 Mon Sep 17 00:00:00 2001
From: Sebastian Romero <s.romero@arduino.cc>
Date: Wed, 15 Nov 2023 11:38:01 +0100
Subject: [PATCH 163/310] renesas-ra/boards/ARDUINO_PORTENTA_C33: Fix incorrect
 I2C pins.

Also change the number of the interface to 0 as it's connected to IIC0.

Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
---
 ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h b/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
index da452f6871..52346dedc4 100644
--- a/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
+++ b/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
@@ -63,8 +63,8 @@ void PORTENTA_C33_board_enter_bootloader(void);
 #endif
 
 // I2C
-#define MICROPY_HW_I2C2_SCL         (pin_P407)
-#define MICROPY_HW_I2C2_SDA         (pin_P408)
+#define MICROPY_HW_I2C0_SCL         (pin_P408)
+#define MICROPY_HW_I2C0_SDA         (pin_P407)
 
 // SPI
 #define MICROPY_HW_SPI1_SSL         (pin_P104)

From 57cce79a46f6ab7e990a626251ca8f9d59cd095a Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 8 Nov 2023 17:35:28 +1100
Subject: [PATCH 164/310] esp32/modsocket: Implement socket connect timeout.

LWIP doesn't implement a timeout for blocking connect(), and such a timeout
is not required by POSIX.  However, CPython will use the socket timeout for
blocking connect on most platforms.  The "principle of least surprise"
suggests we should support it on ESP32 as well (not to mention it's
useful!).

This provides the additional improvement that external exceptions (like
KeyboardInterrupt) are now handled immediately if they happen during
connect().  Previously Ctrl-C would not terminate a blocking connect until
connect() returned, but now it will.

Fixes issue #8326.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/esp32/modsocket.c | 94 ++++++++++++++++++++++++++++++++++++++---
 1 file changed, 88 insertions(+), 6 deletions(-)

diff --git a/ports/esp32/modsocket.c b/ports/esp32/modsocket.c
index fe76b5f760..cacc52dec5 100644
--- a/ports/esp32/modsocket.c
+++ b/ports/esp32/modsocket.c
@@ -82,6 +82,8 @@ typedef struct _socket_obj_t {
     #endif
 } socket_obj_t;
 
+STATIC const char *TAG = "modsocket";
+
 void _socket_settimeout(socket_obj_t *sock, uint64_t timeout_ms);
 
 #if MICROPY_PY_SOCKET_EVENTS
@@ -364,16 +366,96 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept);
 STATIC mp_obj_t socket_connect(const mp_obj_t arg0, const mp_obj_t arg1) {
     socket_obj_t *self = MP_OBJ_TO_PTR(arg0);
     struct addrinfo *res;
+    bool blocking = false;
+    int flags;
+    int raise_err = 0;
+
     _socket_getaddrinfo(arg1, &res);
     MP_THREAD_GIL_EXIT();
     self->state = SOCKET_STATE_CONNECTED;
-    int r = lwip_connect(self->fd, res->ai_addr, res->ai_addrlen);
-    MP_THREAD_GIL_ENTER();
-    lwip_freeaddrinfo(res);
-    if (r != 0) {
-        mp_raise_OSError(errno);
+
+    flags = fcntl(self->fd, F_GETFL);
+
+    blocking = (flags & O_NONBLOCK) == 0;
+
+    if (blocking) {
+        // For blocking sockets, make the socket temporarily non-blocking and emulate
+        // blocking using select.
+        //
+        // This has two benefits:
+        //
+        // - Allows handling external exceptions while waiting for connect.
+        //
+        // - Allows emulating a connect timeout, which is not supported by LWIP or
+        //   required by POSIX but is normal behaviour for CPython.
+        if (fcntl(self->fd, F_SETFL, flags | O_NONBLOCK) < 0) {
+            ESP_LOGE(TAG, "fcntl set failed %d", errno); // Unexpected internal failure
+            raise_err = errno;
+        }
     }
 
+    if (raise_err == 0) {
+        // Try performing the actual connect. Expected to always return immediately.
+        int r = lwip_connect(self->fd, res->ai_addr, res->ai_addrlen);
+        if (r != 0) {
+            raise_err = errno;
+        }
+    }
+
+    if (blocking) {
+        // Set the socket back to blocking. We can still pass it to select() in this state.
+        int r = fcntl(self->fd, F_SETFL, flags);
+        if (r != 0 && (raise_err == 0 || raise_err == EINPROGRESS)) {
+            ESP_LOGE(TAG, "fcntl restore failed %d", errno); // Unexpected internal failure
+            raise_err = errno;
+        }
+    }
+
+    lwip_freeaddrinfo(res);
+
+    if (blocking && raise_err == EINPROGRESS) {
+        // Keep calling select() until the socket is marked writable (i.e. connected),
+        // or an error or a timeout occurs
+
+        // Note: _socket_settimeout() always sets self->retries != 0 on blocking sockets.
+
+        for (unsigned int i = 0; i <= self->retries; i++) {
+            struct timeval timeout = {
+                .tv_sec = 0,
+                .tv_usec = SOCKET_POLL_US,
+            };
+            fd_set wfds;
+            FD_ZERO(&wfds);
+            FD_SET(self->fd, &wfds);
+
+            int r = select(self->fd + 1, NULL, &wfds, NULL, &timeout);
+            if (r < 0) {
+                // Error condition
+                raise_err = errno;
+                break;
+            } else if (r > 0) {
+                // Select indicated the socket is writable. Check for any error.
+                socklen_t socklen = sizeof(raise_err);
+                r = getsockopt(self->fd, SOL_SOCKET, SO_ERROR, &raise_err, &socklen);
+                if (r < 0) {
+                    raise_err = errno;
+                }
+                break;
+            } else {
+                // Select timed out
+                raise_err = ETIMEDOUT;
+
+                MP_THREAD_GIL_ENTER();
+                check_for_exceptions();
+                MP_THREAD_GIL_EXIT();
+            }
+        }
+    }
+
+    MP_THREAD_GIL_ENTER();
+    if (raise_err) {
+        mp_raise_OSError(raise_err);
+    }
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect);
@@ -847,7 +929,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_socket_getaddrinfo_obj, 2, 6, esp
 STATIC mp_obj_t esp_socket_initialize() {
     static int initialized = 0;
     if (!initialized) {
-        ESP_LOGI("modsocket", "Initializing");
+        ESP_LOGI(TAG, "Initializing");
         esp_netif_init();
         initialized = 1;
     }

From fce8d9fd55409ab1027beee5671bc653fb5beb97 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 9 Nov 2023 10:30:23 +1100
Subject: [PATCH 165/310] esp32/modsocket: Try garbage collection if the socket
 limit is reached.

If the hard socket limit (default 16) is reached then it's possible that
socket allocation fails but garbage collection would allow it to succeed.

Perform a GC pass and try again before giving up, similar to the logic
elsewhere in MicroPython that tries a GC pass before raising MemoryError.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/esp32/modsocket.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/ports/esp32/modsocket.c b/ports/esp32/modsocket.c
index cacc52dec5..ca8c63030c 100644
--- a/ports/esp32/modsocket.c
+++ b/ports/esp32/modsocket.c
@@ -36,6 +36,7 @@
 #include <stdlib.h>
 #include <string.h>
 
+#include "py/gc.h"
 #include "py/runtime0.h"
 #include "py/nlr.h"
 #include "py/objlist.h"
@@ -274,6 +275,13 @@ STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type_in, size_t n_args, siz
     sock->state = sock->type == SOCK_STREAM ? SOCKET_STATE_NEW : SOCKET_STATE_CONNECTED;
 
     sock->fd = lwip_socket(sock->domain, sock->type, sock->proto);
+    if (sock->fd < 0 && errno == ENFILE) {
+        // ESP32 LWIP has a hard socket limit, ENFILE is returned when this is
+        // reached. Similar to the logic elsewhere for MemoryError, try running
+        // GC before failing outright.
+        gc_collect();
+        sock->fd = lwip_socket(sock->domain, sock->type, sock->proto);
+    }
     if (sock->fd < 0) {
         mp_raise_OSError(errno);
     }

From f397a3ec318f3ad05aa287764ae7cef32202380f Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 21 Nov 2023 22:28:57 +1100
Subject: [PATCH 166/310] py/objslice: Validate that the argument to indices()
 is an integer.

Otherwise passing in a non-integer can lead to an invalid memory access.

Thanks to Junwha Hong and Wonil Jang @S2Lab, UNIST for finding the issue.

Fixes issue #13007.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/objslice.c                 | 2 +-
 tests/basics/slice_indices.py | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/py/objslice.c b/py/objslice.c
index 75fa3bc3f5..dcd6af8b28 100644
--- a/py/objslice.c
+++ b/py/objslice.c
@@ -54,7 +54,7 @@ STATIC mp_obj_t slice_unary_op(mp_unary_op_t op, mp_obj_t o_in) {
 
 #if MICROPY_PY_BUILTINS_SLICE_INDICES
 STATIC mp_obj_t slice_indices(mp_obj_t self_in, mp_obj_t length_obj) {
-    mp_int_t length = mp_obj_int_get_checked(length_obj);
+    mp_int_t length = mp_obj_get_int(length_obj);
     mp_bound_slice_t bound_indices;
     mp_obj_slice_indices(self_in, length, &bound_indices);
 
diff --git a/tests/basics/slice_indices.py b/tests/basics/slice_indices.py
index b7f439ccca..ccd7667e9b 100644
--- a/tests/basics/slice_indices.py
+++ b/tests/basics/slice_indices.py
@@ -25,3 +25,8 @@ print(A()[2:7:2].indices(5))
 print(A()[2:7:-2].indices(5))
 print(A()[7:2:2].indices(5))
 print(A()[7:2:-2].indices(5))
+
+try:
+    print(A()[::].indices(None))
+except TypeError:
+    print("TypeError")

From 917b56137fd8b8729531452b2aefa5aa1b1666c9 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Tue, 7 Nov 2023 14:11:05 +1100
Subject: [PATCH 167/310] esp32/boards/sdkconfig.base: Fix increasing log level
 via esp.osdebug().

At some point the config changed such that no messages above Error level
were compiled into the final binary.

Fixes issue #12815.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/esp32/boards/sdkconfig.base | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/ports/esp32/boards/sdkconfig.base b/ports/esp32/boards/sdkconfig.base
index 372633e711..2a7c9a1c5b 100644
--- a/ports/esp32/boards/sdkconfig.base
+++ b/ports/esp32/boards/sdkconfig.base
@@ -17,9 +17,18 @@ CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
 CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y
 
 # Change default log level to "ERROR" (instead of "INFO")
-CONFIG_LOG_DEFAULT_LEVEL_INFO=n
 CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
-CONFIG_LOG_DEFAULT_LEVEL=1
+
+# Set the maximum included log level higher than the default,
+# so esp.osdebug() can enable more logging at runtime.
+#
+# To increase the max log verbosity to Debug or Verbose instead, comment
+# CONFIG_LOG_MAXIMUM_LEVEL_INFO=y and uncomment one of the other settings.
+#
+# If not needed, the next line can be commented entirely to save binary size.
+CONFIG_LOG_MAXIMUM_LEVEL_INFO=y
+#CONFIG_LOG_MAXIMUM_LEVEL_DEBUG=y
+#CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE=y
 
 # Main XTAL Config
 # Only on: ESP32

From a800ed5ae34f8a9bbe075e007de55109f33c7592 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Tue, 7 Nov 2023 14:11:20 +1100
Subject: [PATCH 168/310] docs/library/esp: Correct the description of
 esp.osdebug().

The behaviour described in the docs was not correct for either port.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 docs/library/esp.rst | 40 ++++++++++++++++++++++++++++++++++++----
 ports/esp32/modesp.c |  4 ++--
 2 files changed, 38 insertions(+), 6 deletions(-)

diff --git a/docs/library/esp.rst b/docs/library/esp.rst
index 8920c8241e..9c20b5e8b2 100644
--- a/docs/library/esp.rst
+++ b/docs/library/esp.rst
@@ -62,12 +62,35 @@ Functions
 
 .. function:: flash_erase(sector_no)
 
-.. function:: osdebug(level)
+.. function:: osdebug(uart_no)
 
-    Turn esp os debugging messages on or off.
+    .. note:: This is the ESP8266 form of this function.
 
-    The *level* parameter sets the threshold for the log messages for all esp components.
-    The log levels are defined as constants:
+    Change the level of OS serial debug log messages. On boot,
+    OS serial debug log messages are disabled.
+
+    ``uart_no`` is the number of the UART peripheral which should receive
+    OS-level output, or ``None`` to disable OS serial debug log messages.
+
+.. function:: osdebug(uart_no, [level])
+    :no-index:
+
+    .. note:: This is the ESP32 form of this function.
+
+    Change the level of OS serial debug log messages. On boot, OS
+    serial debug log messages are limited to Error output only.
+
+    The behaviour of this function depends on the arguments passed to it. The
+    following combinations are supported:
+
+    ``osdebug(None)`` restores the default OS debug log message level
+    (``LOG_ERROR``).
+
+    ``osdebug(0)`` enables all available OS debug log messages (in the
+    default build configuration this is ``LOG_INFO``).
+
+    ``osdebug(0, level)`` sets the OS debug log message level to the
+     specified value. The log levels are defined as constants:
 
         * ``LOG_NONE`` -- No log output
         * ``LOG_ERROR`` -- Critical errors, software module can not recover on its own
@@ -77,6 +100,15 @@ Functions
         * ``LOG_VERBOSE`` -- Bigger chunks of debugging information, or frequent messages
           which can potentially flood the output
 
+    .. note:: ``LOG_DEBUG`` and ``LOG_VERBOSE`` are not compiled into the
+              MicroPython binary by default, to save size. A custom build with a
+              modified "``sdkconfig``" source file is needed to see any output
+              at these log levels.
+
+    .. note:: Log output on ESP32 is automatically suspended in "Raw REPL" mode,
+              to prevent communications issues. This means OS level logging is never
+              seen when using ``mpremote run`` and similar tools.
+
 .. function:: set_native_code_location(start, length)
 
     **Note**: ESP8266 only
diff --git a/ports/esp32/modesp.c b/ports/esp32/modesp.c
index 4726ce5874..f51ba6ab34 100644
--- a/ports/esp32/modesp.c
+++ b/ports/esp32/modesp.c
@@ -37,12 +37,12 @@
 #include "py/mphal.h"
 
 STATIC mp_obj_t esp_osdebug(size_t n_args, const mp_obj_t *args) {
-    esp_log_level_t level = LOG_LOCAL_LEVEL;
+    esp_log_level_t level = LOG_LOCAL_LEVEL; // Maximum available level
     if (n_args == 2) {
         level = mp_obj_get_int(args[1]);
     }
     if (args[0] == mp_const_none) {
-        // Disable logging
+        // Set logging back to boot default of ESP_LOG_ERROR
         esp_log_level_set("*", ESP_LOG_ERROR);
     } else {
         // Enable logging at the given level

From a85c3c45a6edc75da649492092e5ffdafae55d6a Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 23 Nov 2023 10:39:12 +1100
Subject: [PATCH 169/310] esp32/boards/ESP32_GENERIC: Reduce size of D2WD
 variant to fit in flash.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd b/ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd
index f6e07893e9..2ac983693d 100644
--- a/ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd
+++ b/ports/esp32/boards/ESP32_GENERIC/sdkconfig.d2wd
@@ -3,6 +3,10 @@ CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_PERF=n
 CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
 
+# Change maximum log level to error, to reduce firmware size.
+CONFIG_LOG_MAXIMUM_LEVEL_ERROR=y
+CONFIG_LOG_MAXIMUM_LEVEL_INFO=n
+
 # Disable SPI Ethernet driver to reduce firmware size.
 CONFIG_ETH_USE_SPI_ETHERNET=n
 

From f72a7dde18600379471189b6727bb65bd2834519 Mon Sep 17 00:00:00 2001
From: Trent Piepho <tpiepho@gmail.com>
Date: Wed, 8 Nov 2023 03:04:28 -0800
Subject: [PATCH 170/310] esp32/uart: Preserve console UART clock, fix UART
 console with DFS.

In commit 7c929d44 the console UART was changed to use the UART HAL.
Starting the UART HAL will change the UART clock from whatever it was
already configured at to UART_SCLK_DEFAULT.  There is no "initialize at
existing settings" option.

This clock doesn't work with DFS.

The ESP-IDF code already takes this into account, and when DFS is enabled
it will configure the console UART to use the correct platform-specific
clock that will work with DFS.

The UART HAL init undoes this and sets it back to default.

This change will query the clock before the HAL init, then use the HAL
function to restore it back.  Thus keeping the clock at the "correct"
value, which depends on platform, DFS status, and so on.

The clock frequency will be found using the UART driver function ESP-IDF
code uses for this.  The existing code hard-coded a path that worked if the
clock was the APB clock and would fail otherwise.

The UART_NUM_0 define is removed because driver/uart.h already provides
this same macro.

Signed-off-by: Trent Piepho <tpiepho@gmail.com>
---
 ports/esp32/uart.c | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/ports/esp32/uart.c b/ports/esp32/uart.c
index fc69e279e3..e0c8141a89 100644
--- a/ports/esp32/uart.c
+++ b/ports/esp32/uart.c
@@ -34,12 +34,9 @@
 #if MICROPY_HW_ENABLE_UART_REPL
 
 #include <stdio.h>
+#include "driver/uart.h" // For uart_get_sclk_freq()
 #include "hal/uart_hal.h"
 
-// Backwards compatibility for when MICROPY_HW_UART_REPL was a ESP-IDF UART
-// driver enum. Only UART_NUM_0 was supported with that version of the driver.
-#define UART_NUM_0 0
-
 STATIC void uart_irq_handler(void *arg);
 
 // Declaring the HAL structure on the stack saves a tiny amount of static RAM
@@ -53,16 +50,14 @@ STATIC void uart_irq_handler(void *arg);
 
 void uart_stdout_init(void) {
     uart_hal_context_t repl_hal = REPL_HAL_DEFN();
+    uart_sclk_t sclk;
     uint32_t sclk_freq;
 
-    #if UART_SCLK_DEFAULT == SOC_MOD_CLK_APB
-    sclk_freq = APB_CLK_FREQ; // Assumes no frequency scaling
-    #else
-    // ESP32-H2 and ESP32-C2, I think
-    #error "This SoC uses a different default UART SCLK source, code needs updating."
-    #endif
+    uart_hal_get_sclk(&repl_hal, &sclk); // To restore SCLK after uart_hal_init() resets it
+    ESP_ERROR_CHECK(uart_get_sclk_freq(sclk, &sclk_freq));
 
     uart_hal_init(&repl_hal, MICROPY_HW_UART_REPL); // Sets defaults: 8n1, no flow control
+    uart_hal_set_sclk(&repl_hal, sclk);
     uart_hal_set_baudrate(&repl_hal, MICROPY_HW_UART_REPL_BAUD, sclk_freq);
     uart_hal_rxfifo_rst(&repl_hal);
     uart_hal_txfifo_rst(&repl_hal);

From 92f046971100eee91e8f7e935ffcfdc324f511cb Mon Sep 17 00:00:00 2001
From: Trent Piepho <tpiepho@gmail.com>
Date: Mon, 13 Nov 2023 17:56:11 -0800
Subject: [PATCH 171/310] esp32/uart: Make compatible with sclk type change in
 ESP-IDF 5.3.

This type changes when they add LP-UART support for the ESP32-C6 in the dev
version of ESP-IDF 5.3.

Signed-off-by: Trent Piepho <tpiepho@gmail.com>
---
 ports/esp32/uart.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/ports/esp32/uart.c b/ports/esp32/uart.c
index e0c8141a89..b82a638a5b 100644
--- a/ports/esp32/uart.c
+++ b/ports/esp32/uart.c
@@ -50,7 +50,11 @@ STATIC void uart_irq_handler(void *arg);
 
 void uart_stdout_init(void) {
     uart_hal_context_t repl_hal = REPL_HAL_DEFN();
+    #if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 3, 0)
     uart_sclk_t sclk;
+    #else
+    soc_module_clk_t sclk;
+    #endif
     uint32_t sclk_freq;
 
     uart_hal_get_sclk(&repl_hal, &sclk); // To restore SCLK after uart_hal_init() resets it

From 960eef70e8a0073440d6d7edc2c05f6e2237e0af Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Tue, 14 Nov 2023 16:46:55 +1100
Subject: [PATCH 172/310] esp32/network_wlan: Reduce RAM usage if SPIRAM fails
 to initialise.

In ESP-IDF, enabling SPIRAM in menuconfig sets some Kconfig options:

- "Wi-Fi Cache TX Buffers" enabled. By default this tries to allocate 32 of
these when Wi-Fi is initialised, which requires 54,400 bytes of free heap.

- Switches "Type of WiFi TX buffers" from Dynamic to Static. This
pre-allocates all of the Wi-Fi transmit buffers.

Not a problem if PSRAM is initialised, but it's quite a lot of RAM if PSRAM
failed to initialise! As we use the same config for PSRAM & no-PSRAM builds
now, this either causes Wi-Fi to fail to initialise (seen on S2) or will
eat quite a lot of RAM.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/esp32/network_wlan.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/ports/esp32/network_wlan.c b/ports/esp32/network_wlan.c
index e1d16b4191..e9918efa5e 100644
--- a/ports/esp32/network_wlan.c
+++ b/ports/esp32/network_wlan.c
@@ -41,6 +41,7 @@
 
 #include "esp_wifi.h"
 #include "esp_log.h"
+#include "esp_psram.h"
 
 #ifndef NO_QSTR
 #include "mdns.h"
@@ -206,6 +207,23 @@ void esp_initialise_wifi(void) {
         wlan_ap_obj.active = false;
 
         wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT();
+        #if CONFIG_SPIRAM_IGNORE_NOTFOUND
+        if (!esp_psram_is_initialized()) {
+            // If PSRAM failed to initialize, disable "Wi-Fi Cache TX Buffers"
+            // (default SPIRAM config ESP32_WIFI_CACHE_TX_BUFFER_NUM==32, this is 54,400 bytes of heap)
+            cfg.cache_tx_buf_num = 0;
+            cfg.feature_caps &= ~CONFIG_FEATURE_CACHE_TX_BUF_BIT;
+
+            // Set some other options back to the non-SPIRAM default values
+            // to save more RAM.
+            //
+            // These can be determined from ESP-IDF components/esp_wifi/Kconfig and the
+            // WIFI_INIT_CONFIG_DEFAULT macro
+            cfg.tx_buf_type = 1; // Dynamic, this "magic number" is defined in IDF KConfig
+            cfg.static_tx_buf_num = 0; // Probably don't need, due to tx_buf_type
+            cfg.dynamic_tx_buf_num = 32; // ESP-IDF default value (maximum)
+        }
+        #endif
         ESP_LOGD("modnetwork", "Initializing WiFi");
         esp_exceptions(esp_wifi_init(&cfg));
         esp_exceptions(esp_wifi_set_storage(WIFI_STORAGE_RAM));

From d6154925d5340e1fb3b2db073bd343da1154f163 Mon Sep 17 00:00:00 2001
From: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
Date: Thu, 9 Nov 2023 16:18:39 +0200
Subject: [PATCH 173/310] esp32/network_wlan: Fix network.WLAN.status() to
 return better info.

Prior to this change, after calling connect() the status() method for the
STA interface would either return STAT_GOT_IP or STAT_CONNECTION.  The
latter would be returned because wifi_sta_connect_requested==true and
conf_wifi_sta_reconnects==0 by default.  As such there was no way to know
anything about errors when attempting to connect, such as a bad password.

Now, status() can return STAT_NO_AP_FOUND and STAT_WRONG_PASSWORD when
those conditions are met.

Fixes issue #12930.

Signed-off-by: IhorNehrutsa <Ihor.Nehrutsa@gmail.com>
---
 ports/esp32/network_wlan.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/ports/esp32/network_wlan.c b/ports/esp32/network_wlan.c
index e9918efa5e..e8c75c619d 100644
--- a/ports/esp32/network_wlan.c
+++ b/ports/esp32/network_wlan.c
@@ -107,21 +107,21 @@ static void network_wlan_wifi_event_handler(void *event_handler_arg, esp_event_b
             switch (disconn->reason) {
                 case WIFI_REASON_BEACON_TIMEOUT:
                     // AP has dropped out; try to reconnect.
-                    message = "\nbeacon timeout";
+                    message = "beacon timeout";
                     break;
                 case WIFI_REASON_NO_AP_FOUND:
                     // AP may not exist, or it may have momentarily dropped out; try to reconnect.
-                    message = "\nno AP found";
+                    message = "no AP found";
                     break;
                 case WIFI_REASON_AUTH_FAIL:
                     // Password may be wrong, or it just failed to connect; try to reconnect.
-                    message = "\nauthentication failed";
+                    message = "authentication failed";
                     break;
                 default:
                     // Let other errors through and try to reconnect.
                     break;
             }
-            ESP_LOGI("wifi", "STA_DISCONNECTED, reason:%d%s", disconn->reason, message);
+            ESP_LOGI("wifi", "STA_DISCONNECTED, reason:%d:%s", disconn->reason, message);
 
             wifi_sta_connected = false;
             if (wifi_sta_connect_requested) {
@@ -351,6 +351,14 @@ STATIC mp_obj_t network_wlan_status(size_t n_args, const mp_obj_t *args) {
             if (wifi_sta_connected) {
                 // Happy path, connected with IP
                 return MP_OBJ_NEW_SMALL_INT(STAT_GOT_IP);
+            } else if (wifi_sta_disconn_reason == WIFI_REASON_NO_AP_FOUND) {
+                return MP_OBJ_NEW_SMALL_INT(WIFI_REASON_NO_AP_FOUND);
+            } else if ((wifi_sta_disconn_reason == WIFI_REASON_AUTH_FAIL) || (wifi_sta_disconn_reason == WIFI_REASON_CONNECTION_FAIL)) {
+                // wrong password
+                return MP_OBJ_NEW_SMALL_INT(WIFI_REASON_AUTH_FAIL);
+            } else if (wifi_sta_disconn_reason == WIFI_REASON_ASSOC_LEAVE) {
+                // After wlan.disconnect()
+                return MP_OBJ_NEW_SMALL_INT(STAT_IDLE);
             } else if (wifi_sta_connect_requested
                        && (conf_wifi_sta_reconnects == 0
                            || wifi_sta_reconnects < conf_wifi_sta_reconnects)) {

From 094b52b8ad13be1e919354b188ad3dbe94fc4bf5 Mon Sep 17 00:00:00 2001
From: Mark Blakeney <mark.blakeney@bullet-systems.net>
Date: Mon, 20 Nov 2023 15:46:08 +1000
Subject: [PATCH 174/310] esp32/esp32_rmt: Fix RMT looping.

Commit 7ea06a3e2638e0fb82240c0b88c9cd1ecaf942f5 moved the
`rmt_write_items()` call to fix RMT looping for ESP32-S3, but broke it for
the other ESP32s.  This commit conditionally compiles the location of that
call.

Signed-off-by: Mark Blakeney <mark.blakeney@bullet-systems.net>
---
 ports/esp32/esp32_rmt.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/ports/esp32/esp32_rmt.c b/ports/esp32/esp32_rmt.c
index 5d53018f4b..77a31ebc0f 100644
--- a/ports/esp32/esp32_rmt.c
+++ b/ports/esp32/esp32_rmt.c
@@ -323,12 +323,18 @@ STATIC mp_obj_t esp32_rmt_write_pulses(size_t n_args, const mp_obj_t *args) {
         check_esp_err(rmt_wait_tx_done(self->channel_id, portMAX_DELAY));
     }
 
+    #if !CONFIG_IDF_TARGET_ESP32S3
+    check_esp_err(rmt_write_items(self->channel_id, self->items, num_items, false));
+    #endif
+
     if (self->loop_en) {
         check_esp_err(rmt_set_tx_intr_en(self->channel_id, false));
         check_esp_err(rmt_set_tx_loop_mode(self->channel_id, true));
     }
 
+    #if CONFIG_IDF_TARGET_ESP32S3
     check_esp_err(rmt_write_items(self->channel_id, self->items, num_items, false));
+    #endif
 
     return mp_const_none;
 }

From 992cd6455522da04bd209e7f7b0915ba7bbfc2f0 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 9 Nov 2023 17:57:40 +1100
Subject: [PATCH 175/310] py/mkrules: Add support for custom manifest
 variables.

This allows e.g. a board (or make command line) to set

    MICROPY_MANIFEST_MY_VARIABLE = path/to/somewhere
    set(MICROPY_MANIFEST_MY_VARIABLE path/to/somewhere)

and then in the manifest.py they can query this, e.g. via

    include("$(MY_VARIABLE)/path/manifest.py")

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 py/mkrules.cmake | 19 ++++++++++++++++++-
 py/mkrules.mk    | 13 ++++++++++++-
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/py/mkrules.cmake b/py/mkrules.cmake
index 7622cd903a..743302aea9 100644
--- a/py/mkrules.cmake
+++ b/py/mkrules.cmake
@@ -218,10 +218,27 @@ if(MICROPY_FROZEN_MANIFEST)
         set(MICROPY_CROSS_FLAGS "-f${MICROPY_CROSS_FLAGS}")
     endif()
 
+    # Set default path variables to be passed to makemanifest.py. These will
+    # be available in path substitutions. Additional variables can be set
+    # per-board in mpconfigboard.cmake.
+    set(MICROPY_MANIFEST_PORT_DIR ${MICROPY_PORT_DIR})
+    set(MICROPY_MANIFEST_BOARD_DIR ${MICROPY_BOARD_DIR})
+    set(MICROPY_MANIFEST_MPY_DIR ${MICROPY_DIR})
+    set(MICROPY_MANIFEST_MPY_LIB_DIR ${MICROPY_LIB_DIR})
+
+    # Find all MICROPY_MANIFEST_* variables and turn them into command line arguments.
+    get_cmake_property(_manifest_vars VARIABLES)
+    list(FILTER _manifest_vars INCLUDE REGEX "MICROPY_MANIFEST_.*")
+    foreach(_manifest_var IN LISTS _manifest_vars)
+        list(APPEND _manifest_var_args "-v")
+        string(REGEX REPLACE "MICROPY_MANIFEST_(.*)" "\\1" _manifest_var_name ${_manifest_var})
+        list(APPEND _manifest_var_args "${_manifest_var_name}=${${_manifest_var}}")
+    endforeach()
+
     add_custom_target(
         BUILD_FROZEN_CONTENT ALL
         BYPRODUCTS ${MICROPY_FROZEN_CONTENT}
-        COMMAND ${Python3_EXECUTABLE} ${MICROPY_DIR}/tools/makemanifest.py -o ${MICROPY_FROZEN_CONTENT} -v "MPY_DIR=${MICROPY_DIR}" -v "MPY_LIB_DIR=${MICROPY_LIB_DIR}" -v "PORT_DIR=${MICROPY_PORT_DIR}" -v "BOARD_DIR=${MICROPY_BOARD_DIR}" -b "${CMAKE_BINARY_DIR}" ${MICROPY_CROSS_FLAGS} --mpy-tool-flags=${MICROPY_MPY_TOOL_FLAGS} ${MICROPY_FROZEN_MANIFEST}
+        COMMAND ${Python3_EXECUTABLE} ${MICROPY_DIR}/tools/makemanifest.py -o ${MICROPY_FROZEN_CONTENT} ${_manifest_var_args} -b "${CMAKE_BINARY_DIR}" ${MICROPY_CROSS_FLAGS} --mpy-tool-flags=${MICROPY_MPY_TOOL_FLAGS} ${MICROPY_FROZEN_MANIFEST}
         DEPENDS
             ${MICROPY_QSTRDEFS_GENERATED}
             ${MICROPY_ROOT_POINTERS}
diff --git a/py/mkrules.mk b/py/mkrules.mk
index 5076559328..7ecb2a5f66 100644
--- a/py/mkrules.mk
+++ b/py/mkrules.mk
@@ -199,10 +199,21 @@ CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool
 CFLAGS += -DMICROPY_MODULE_FROZEN_MPY
 CFLAGS += -DMICROPY_MODULE_FROZEN_STR
 
+# Set default path variables to be passed to makemanifest.py. These will be
+# available in path substitutions. Additional variables can be set per-board
+# in mpconfigboard.mk or on the make command line.
+MICROPY_MANIFEST_MPY_LIB_DIR = $(MPY_LIB_DIR)
+MICROPY_MANIFEST_PORT_DIR = $(shell pwd)
+MICROPY_MANIFEST_BOARD_DIR = $(BOARD_DIR)
+MICROPY_MANIFEST_MPY_DIR = $(TOP)
+
+# Find all MICROPY_MANIFEST_* variables and turn them into command line arguments.
+MANIFEST_VARIABLES = $(foreach var,$(filter MICROPY_MANIFEST_%, $(.VARIABLES)),-v "$(subst MICROPY_MANIFEST_,,$(var))=$($(var))")
+
 # to build frozen_content.c from a manifest
 $(BUILD)/frozen_content.c: FORCE $(BUILD)/genhdr/qstrdefs.generated.h $(BUILD)/genhdr/root_pointers.h | $(MICROPY_MPYCROSS_DEPENDENCY)
 	$(Q)test -e "$(MPY_LIB_DIR)/README.md" || (echo -e $(HELP_MPY_LIB_SUBMODULE); false)
-	$(Q)$(MAKE_MANIFEST) -o $@ -v "MPY_DIR=$(TOP)" -v "MPY_LIB_DIR=$(MPY_LIB_DIR)" -v "PORT_DIR=$(shell pwd)" -v "BOARD_DIR=$(BOARD_DIR)" -b "$(BUILD)" $(if $(MPY_CROSS_FLAGS),-f"$(MPY_CROSS_FLAGS)",) --mpy-tool-flags="$(MPY_TOOL_FLAGS)" $(FROZEN_MANIFEST)
+	$(Q)$(MAKE_MANIFEST) -o $@ $(MANIFEST_VARIABLES) -b "$(BUILD)" $(if $(MPY_CROSS_FLAGS),-f"$(MPY_CROSS_FLAGS)",) --mpy-tool-flags="$(MPY_TOOL_FLAGS)" $(FROZEN_MANIFEST)
 endif
 
 ifneq ($(PROG),)

From cfcd0c4022c571a174efd0400496d679fbe369e2 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Tue, 21 Nov 2023 08:58:36 +0100
Subject: [PATCH 176/310] stm32: Add missing header include for debug builds.

Debug build fails if string.h header is not included.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/stm32/i2c.c           | 1 +
 ports/stm32/machine_i2s.c   | 1 +
 ports/stm32/pin_static_af.h | 3 +++
 ports/stm32/spi.c           | 1 +
 4 files changed, 6 insertions(+)

diff --git a/ports/stm32/i2c.c b/ports/stm32/i2c.c
index 42aba2eccb..52f227a950 100644
--- a/ports/stm32/i2c.c
+++ b/ports/stm32/i2c.c
@@ -24,6 +24,7 @@
  * THE SOFTWARE.
  */
 
+#include <string.h>
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "py/runtime.h"
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index dbcd9352d5..b3e1cee34f 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -29,6 +29,7 @@
 // extmod/machine_i2s.c via MICROPY_PY_MACHINE_I2S_INCLUDEFILE.
 
 #include <stdlib.h>
+#include <string.h>
 #include "py/mphal.h"
 #include "pin.h"
 #include "dma.h"
diff --git a/ports/stm32/pin_static_af.h b/ports/stm32/pin_static_af.h
index 49580a2787..86ae90ba4c 100644
--- a/ports/stm32/pin_static_af.h
+++ b/ports/stm32/pin_static_af.h
@@ -26,6 +26,9 @@
 #ifndef MICROPY_INCLUDED_STM32_PIN_STATIC_AF_H
 #define MICROPY_INCLUDED_STM32_PIN_STATIC_AF_H
 
+// For debug builds some of the macros expand to use strcmp.
+#include <string.h>
+
 #include "py/mphal.h"
 #include "genhdr/pins.h"
 #include "genhdr/pins_af_defs.h"
diff --git a/ports/stm32/spi.c b/ports/stm32/spi.c
index 47714a2872..ee2301c803 100644
--- a/ports/stm32/spi.c
+++ b/ports/stm32/spi.c
@@ -24,6 +24,7 @@
  * THE SOFTWARE.
  */
 
+#include <string.h>
 #include "py/runtime.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"

From 9c7067d9ad91a303389ec0add306bedac55e18f9 Mon Sep 17 00:00:00 2001
From: Jeff Epler <jepler@gmail.com>
Date: Thu, 23 Nov 2023 11:49:57 -0600
Subject: [PATCH 177/310] py/modbuiltins: Share vstr_add_char's implementation
 of utf8 encoding.

This saves ~84 bytes on trinket m0, and saves 112 bytes on PYBV10.

Signed-off-by: Jeff Epler <jepler@gmail.com>
---
 py/modbuiltins.c | 26 ++++----------------------
 1 file changed, 4 insertions(+), 22 deletions(-)

diff --git a/py/modbuiltins.c b/py/modbuiltins.c
index da29e5b67d..4ff7d44509 100644
--- a/py/modbuiltins.c
+++ b/py/modbuiltins.c
@@ -137,30 +137,12 @@ MP_DEFINE_CONST_FUN_OBJ_1(mp_builtin_callable_obj, mp_builtin_callable);
 STATIC mp_obj_t mp_builtin_chr(mp_obj_t o_in) {
     #if MICROPY_PY_BUILTINS_STR_UNICODE
     mp_uint_t c = mp_obj_get_int(o_in);
-    uint8_t str[4];
-    int len = 0;
-    if (c < 0x80) {
-        *str = c;
-        len = 1;
-    } else if (c < 0x800) {
-        str[0] = (c >> 6) | 0xC0;
-        str[1] = (c & 0x3F) | 0x80;
-        len = 2;
-    } else if (c < 0x10000) {
-        str[0] = (c >> 12) | 0xE0;
-        str[1] = ((c >> 6) & 0x3F) | 0x80;
-        str[2] = (c & 0x3F) | 0x80;
-        len = 3;
-    } else if (c < 0x110000) {
-        str[0] = (c >> 18) | 0xF0;
-        str[1] = ((c >> 12) & 0x3F) | 0x80;
-        str[2] = ((c >> 6) & 0x3F) | 0x80;
-        str[3] = (c & 0x3F) | 0x80;
-        len = 4;
-    } else {
+    if (c >= 0x110000) {
         mp_raise_ValueError(MP_ERROR_TEXT("chr() arg not in range(0x110000)"));
     }
-    return mp_obj_new_str_via_qstr((char *)str, len);
+    VSTR_FIXED(buf, 4);
+    vstr_add_char(&buf, c);
+    return mp_obj_new_str_via_qstr(buf.buf, buf.len);
     #else
     mp_int_t ord = mp_obj_get_int(o_in);
     if (0 <= ord && ord <= 0xff) {

From 516cc280e03b35469096db5f7de141a1018a185f Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 14 Nov 2023 13:19:31 +1100
Subject: [PATCH 178/310] shared/runtime/softtimer: Generalise soft_timer to
 work without SysTick.

If a port defines MICROPY_SOFT_TIMER_TICKS_MS then soft_timer assumes a
SysTick back end, and provides a soft_timer_next variable that sets when
the next call to soft_timer_handler() should occur.

Otherwise, a port should provide soft_timer_get_ms() and
soft_timer_schedule_at_ms() with appropriate semantics (see comments).

Existing users of soft_timer should continue to work as they did.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/renesas-ra/mphalport.h |  3 ++
 ports/samd/mphalport.h       |  3 ++
 shared/runtime/softtimer.c   | 75 ++++++++++++++++++------------------
 shared/runtime/softtimer.h   | 20 ++++++++++
 4 files changed, 63 insertions(+), 38 deletions(-)

diff --git a/ports/renesas-ra/mphalport.h b/ports/renesas-ra/mphalport.h
index 2b25a36fbf..e29a7fec7b 100644
--- a/ports/renesas-ra/mphalport.h
+++ b/ports/renesas-ra/mphalport.h
@@ -29,6 +29,9 @@
 #include "pin.h"
 #include "py/ringbuf.h"
 
+#define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV)
+#define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state)
+
 #define MICROPY_HW_USB_CDC_TX_TIMEOUT (500)
 
 extern const unsigned char mp_hal_status_to_errno_table[4];
diff --git a/ports/samd/mphalport.h b/ports/samd/mphalport.h
index 83ccf44222..ee33e74462 100644
--- a/ports/samd/mphalport.h
+++ b/ports/samd/mphalport.h
@@ -35,6 +35,9 @@
 #include "hpl_time_measure.h"
 #include "sam.h"
 
+#define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV)
+#define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state)
+
 #define MICROPY_HW_USB_CDC_TX_TIMEOUT (500)
 
 extern int mp_interrupt_char;
diff --git a/shared/runtime/softtimer.c b/shared/runtime/softtimer.c
index 267610b269..468fa95b72 100644
--- a/shared/runtime/softtimer.c
+++ b/shared/runtime/softtimer.c
@@ -30,42 +30,43 @@
 #include "py/runtime.h"
 #include "softtimer.h"
 
+#ifdef MICROPY_SOFT_TIMER_TICKS_MS
+
 extern __IO uint32_t MICROPY_SOFT_TIMER_TICKS_MS;
 
 volatile uint32_t soft_timer_next;
 
+static inline uint32_t soft_timer_get_ms(void) {
+    return MICROPY_SOFT_TIMER_TICKS_MS;
+}
+
+static void soft_timer_schedule_at_ms(uint32_t ticks_ms) {
+    uint32_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
+    uint32_t uw_tick = MICROPY_SOFT_TIMER_TICKS_MS;
+    if (soft_timer_ticks_diff(ticks_ms, uw_tick) <= 0) {
+        soft_timer_next = uw_tick + 1;
+    } else {
+        soft_timer_next = ticks_ms;
+    }
+    MICROPY_END_ATOMIC_SECTION(atomic_state);
+}
+
+#endif
+
 // Pointer to the pairheap of soft timer objects.
 // This may contain bss/data pointers as well as GC-heap pointers,
 // and is explicitly GC traced by soft_timer_gc_mark_all().
 STATIC soft_timer_entry_t *soft_timer_heap;
 
-static inline int32_t ticks_diff(uint32_t t1, uint32_t t0) {
-    // t1 is after t0 (i.e. positive result) if there exists a uint32_t X <= INT_MAX
-    // such that t0 + X = t1. Otherwise t1 is interpreted to be earlier than
-    // t0 (negative result).
-    return t1 - t0;
-}
-
 STATIC int soft_timer_lt(mp_pairheap_t *n1, mp_pairheap_t *n2) {
     soft_timer_entry_t *e1 = (soft_timer_entry_t *)n1;
     soft_timer_entry_t *e2 = (soft_timer_entry_t *)n2;
-    return ticks_diff(e1->expiry_ms, e2->expiry_ms) < 0;
-}
-
-STATIC void soft_timer_schedule_systick(uint32_t ticks_ms) {
-    uint32_t irq_state = disable_irq();
-    uint32_t uw_tick = MICROPY_SOFT_TIMER_TICKS_MS;
-    if (ticks_diff(ticks_ms, uw_tick) <= 0) {
-        soft_timer_next = uw_tick + 1;
-    } else {
-        soft_timer_next = ticks_ms;
-    }
-    enable_irq(irq_state);
+    return soft_timer_ticks_diff(e1->expiry_ms, e2->expiry_ms) < 0;
 }
 
 void soft_timer_deinit(void) {
     // Pop off all the nodes which are allocated on the GC-heap.
-    uint32_t irq_state = raise_irq_pri(IRQ_PRI_PENDSV);
+    MICROPY_PY_PENDSV_ENTER;
     soft_timer_entry_t *heap_from = soft_timer_heap;
     soft_timer_entry_t *heap_to = (soft_timer_entry_t *)mp_pairheap_new(soft_timer_lt);
     while (heap_from != NULL) {
@@ -76,14 +77,14 @@ void soft_timer_deinit(void) {
         }
     }
     soft_timer_heap = heap_to;
-    restore_irq_pri(irq_state);
+    MICROPY_PY_PENDSV_EXIT;
 }
 
 // Must be executed at IRQ_PRI_PENDSV
 void soft_timer_handler(void) {
-    uint32_t ticks_ms = MICROPY_SOFT_TIMER_TICKS_MS;
+    uint32_t ticks_ms = soft_timer_get_ms();
     soft_timer_entry_t *heap = soft_timer_heap;
-    while (heap != NULL && ticks_diff(heap->expiry_ms, ticks_ms) <= 0) {
+    while (heap != NULL && soft_timer_ticks_diff(heap->expiry_ms, ticks_ms) <= 0) {
         soft_timer_entry_t *entry = heap;
         heap = (soft_timer_entry_t *)mp_pairheap_pop(soft_timer_lt, &heap->pairheap);
         if (entry->flags & SOFT_TIMER_FLAG_PY_CALLBACK) {
@@ -97,19 +98,17 @@ void soft_timer_handler(void) {
         }
     }
     soft_timer_heap = heap;
-    if (heap == NULL) {
-        // No more timers left, set largest delay possible
-        soft_timer_next = MICROPY_SOFT_TIMER_TICKS_MS;
-    } else {
-        // Set soft_timer_next so SysTick calls us back at the correct time
-        soft_timer_schedule_systick(heap->expiry_ms);
+
+    // Schedule the port's timer to call us back at the correct time.
+    if (heap != NULL) {
+        soft_timer_schedule_at_ms(heap->expiry_ms);
     }
 }
 
 void soft_timer_gc_mark_all(void) {
     // Mark all soft timer nodes that are allocated on the GC-heap.
     // To avoid deep C recursion, pop and recreate the pairheap as nodes are marked.
-    uint32_t irq_state = raise_irq_pri(IRQ_PRI_PENDSV);
+    MICROPY_PY_PENDSV_ENTER;
     soft_timer_entry_t *heap_from = soft_timer_heap;
     soft_timer_entry_t *heap_to = (soft_timer_entry_t *)mp_pairheap_new(soft_timer_lt);
     while (heap_from != NULL) {
@@ -121,7 +120,7 @@ void soft_timer_gc_mark_all(void) {
         heap_to = (soft_timer_entry_t *)mp_pairheap_push(soft_timer_lt, &heap_to->pairheap, &entry->pairheap);
     }
     soft_timer_heap = heap_to;
-    restore_irq_pri(irq_state);
+    MICROPY_PY_PENDSV_EXIT;
 }
 
 void soft_timer_static_init(soft_timer_entry_t *entry, uint16_t mode, uint32_t delta_ms, void (*cb)(soft_timer_entry_t *)) {
@@ -134,18 +133,18 @@ void soft_timer_static_init(soft_timer_entry_t *entry, uint16_t mode, uint32_t d
 
 void soft_timer_insert(soft_timer_entry_t *entry, uint32_t initial_delta_ms) {
     mp_pairheap_init_node(soft_timer_lt, &entry->pairheap);
-    entry->expiry_ms = MICROPY_SOFT_TIMER_TICKS_MS + initial_delta_ms;
-    uint32_t irq_state = raise_irq_pri(IRQ_PRI_PENDSV);
+    entry->expiry_ms = soft_timer_get_ms() + initial_delta_ms;
+    MICROPY_PY_PENDSV_ENTER;
     soft_timer_heap = (soft_timer_entry_t *)mp_pairheap_push(soft_timer_lt, &soft_timer_heap->pairheap, &entry->pairheap);
     if (entry == soft_timer_heap) {
-        // This new timer became the earliest one so set soft_timer_next
-        soft_timer_schedule_systick(entry->expiry_ms);
+        // This new timer became the earliest one so schedule a callback.
+        soft_timer_schedule_at_ms(entry->expiry_ms);
     }
-    restore_irq_pri(irq_state);
+    MICROPY_PY_PENDSV_EXIT;
 }
 
 void soft_timer_remove(soft_timer_entry_t *entry) {
-    uint32_t irq_state = raise_irq_pri(IRQ_PRI_PENDSV);
+    MICROPY_PY_PENDSV_ENTER;
     soft_timer_heap = (soft_timer_entry_t *)mp_pairheap_delete(soft_timer_lt, &soft_timer_heap->pairheap, &entry->pairheap);
-    restore_irq_pri(irq_state);
+    MICROPY_PY_PENDSV_EXIT;
 }
diff --git a/shared/runtime/softtimer.h b/shared/runtime/softtimer.h
index 8603ea13f0..fe5d02b907 100644
--- a/shared/runtime/softtimer.h
+++ b/shared/runtime/softtimer.h
@@ -48,6 +48,13 @@ typedef struct _soft_timer_entry_t {
 
 extern volatile uint32_t soft_timer_next;
 
+static inline int32_t soft_timer_ticks_diff(uint32_t t1, uint32_t t0) {
+    // t1 is after t0 (i.e. positive result) if there exists a uint32_t X <= INT_MAX
+    // such that t0 + X = t1. Otherwise t1 is interpreted to be earlier than
+    // t0 (negative result).
+    return t1 - t0;
+}
+
 void soft_timer_deinit(void);
 void soft_timer_handler(void);
 void soft_timer_gc_mark_all(void);
@@ -63,4 +70,17 @@ static inline void soft_timer_reinsert(soft_timer_entry_t *entry, uint32_t initi
     soft_timer_insert(entry, initial_delta_ms);
 }
 
+#if !defined(MICROPY_SOFT_TIMER_TICKS_MS)
+// IF MICROPY_SOFT_TIMER_TICKS_MS is not defined then the port must provide the
+// following timer functions:
+// - soft_timer_get_ms() must return a 32-bit millisecond counter that wraps around.
+// - soft_timer_schedule_at_ms(ticks_ms) must schedule a callback of soft_timer_handler()
+//   when the above millisecond counter reaches the given ticks_ms value.  If ticks_ms
+//   is behind the current counter (using int32_t arithmetic) then the callback should
+//   be scheduled immediately.  The callback of soft_timer_handler() should be made at
+//   pend-SV IRQ level, or equivalent.
+uint32_t soft_timer_get_ms(void);
+void soft_timer_schedule_at_ms(uint32_t ticks_ms);
+#endif
+
 #endif // MICROPY_INCLUDED_SHARED_RUNTIME_SOFTTIMER_H

From c9a9b2e682f040d2c5cfce97bb4858d3e871bf4e Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 14 Nov 2023 13:21:13 +1100
Subject: [PATCH 179/310] rp2: Integrate soft_timer using the alarm pool.

The alarm pool is used to schedule the callback to soft_timer_handler().

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/CMakeLists.txt |  1 +
 ports/rp2/main.c         |  2 ++
 ports/rp2/mphalport.c    | 23 +++++++++++++++++++++++
 ports/rp2/mphalport.h    |  4 ++++
 ports/rp2/pendsv.h       |  1 +
 5 files changed, 31 insertions(+)

diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 15f6f6ca1c..0f8c6d8e88 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -102,6 +102,7 @@ set(MICROPY_SOURCE_LIB
     ${MICROPY_DIR}/shared/runtime/mpirq.c
     ${MICROPY_DIR}/shared/runtime/pyexec.c
     ${MICROPY_DIR}/shared/runtime/stdout_helpers.c
+    ${MICROPY_DIR}/shared/runtime/softtimer.c
     ${MICROPY_DIR}/shared/runtime/sys_stdio_mphal.c
     ${MICROPY_DIR}/shared/timeutils/timeutils.c
     ${MICROPY_DIR}/shared/tinyusb/mp_cdc_common.c
diff --git a/ports/rp2/main.c b/ports/rp2/main.c
index 682ea14476..43680a46cd 100644
--- a/ports/rp2/main.c
+++ b/ports/rp2/main.c
@@ -37,6 +37,7 @@
 #include "shared/readline/readline.h"
 #include "shared/runtime/gchelper.h"
 #include "shared/runtime/pyexec.h"
+#include "shared/runtime/softtimer.h"
 #include "tusb.h"
 #include "uart.h"
 #include "modmachine.h"
@@ -212,6 +213,7 @@ int main(int argc, char **argv) {
         #if MICROPY_PY_THREAD
         mp_thread_deinit();
         #endif
+        soft_timer_deinit();
         gc_sweep_all();
         mp_deinit();
     }
diff --git a/ports/rp2/mphalport.c b/ports/rp2/mphalport.c
index 4b1c1fa1f5..c567a560b1 100644
--- a/ports/rp2/mphalport.c
+++ b/ports/rp2/mphalport.c
@@ -29,8 +29,10 @@
 #include "py/mphal.h"
 #include "extmod/misc.h"
 #include "shared/runtime/interrupt_char.h"
+#include "shared/runtime/softtimer.h"
 #include "shared/timeutils/timeutils.h"
 #include "shared/tinyusb/mp_usbd.h"
+#include "pendsv.h"
 #include "tusb.h"
 #include "uart.h"
 #include "hardware/rtc.h"
@@ -44,6 +46,8 @@
 // microseconds since the Epoch.
 STATIC uint64_t time_us_64_offset_from_epoch;
 
+static alarm_id_t soft_timer_alarm_id = 0;
+
 #if MICROPY_HW_ENABLE_UART_REPL || MICROPY_HW_USB_CDC
 
 #ifndef MICROPY_HW_STDIN_BUFFER_LEN
@@ -260,3 +264,22 @@ void mp_hal_get_mac_ascii(int idx, size_t chr_off, size_t chr_len, char *dest) {
 uint32_t storage_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) {
     panic_unsupported();
 }
+
+static int64_t soft_timer_callback(alarm_id_t id, void *user_data) {
+    soft_timer_alarm_id = 0;
+    pendsv_schedule_dispatch(PENDSV_DISPATCH_SOFT_TIMER, soft_timer_handler);
+    return 0; // don't reschedule this alarm
+}
+
+uint32_t soft_timer_get_ms(void) {
+    return mp_hal_ticks_ms();
+}
+
+void soft_timer_schedule_at_ms(uint32_t ticks_ms) {
+    if (soft_timer_alarm_id != 0) {
+        cancel_alarm(soft_timer_alarm_id);
+    }
+    int32_t ms = soft_timer_ticks_diff(ticks_ms, mp_hal_ticks_ms());
+    ms = MAX(0, ms);
+    soft_timer_alarm_id = add_alarm_in_ms(ms, soft_timer_callback, NULL, true);
+}
diff --git a/ports/rp2/mphalport.h b/ports/rp2/mphalport.h
index 95e7cba2c5..b8133c783e 100644
--- a/ports/rp2/mphalport.h
+++ b/ports/rp2/mphalport.h
@@ -31,10 +31,14 @@
 #include "hardware/clocks.h"
 #include "hardware/structs/systick.h"
 #include "RP2040.h" // cmsis, for __WFI
+#include "pendsv.h"
 
 #define SYSTICK_MAX (0xffffff)
 #define MICROPY_HW_USB_CDC_TX_TIMEOUT (500)
 
+#define MICROPY_PY_PENDSV_ENTER   pendsv_suspend()
+#define MICROPY_PY_PENDSV_EXIT    pendsv_resume()
+
 extern int mp_interrupt_char;
 extern ringbuf_t stdin_ringbuf;
 
diff --git a/ports/rp2/pendsv.h b/ports/rp2/pendsv.h
index 294cef3c70..fd21ad9ef6 100644
--- a/ports/rp2/pendsv.h
+++ b/ports/rp2/pendsv.h
@@ -29,6 +29,7 @@
 #include <stddef.h>
 
 enum {
+    PENDSV_DISPATCH_SOFT_TIMER,
     #if MICROPY_PY_LWIP
     PENDSV_DISPATCH_LWIP,
     #endif

From 633c6047227fa9d50a1d1156030c80771ddd1b7c Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 14 Nov 2023 13:23:46 +1100
Subject: [PATCH 180/310] rp2/mpbthciport: Rework HCI polling timer to use
 soft_timer.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/mpbthciport.c  | 33 ++++++++++++++++-----------------
 ports/rp2/mpnimbleport.c |  5 ++---
 2 files changed, 18 insertions(+), 20 deletions(-)

diff --git a/ports/rp2/mpbthciport.c b/ports/rp2/mpbthciport.c
index 16d50ddacc..1aacbe881f 100644
--- a/ports/rp2/mpbthciport.c
+++ b/ports/rp2/mpbthciport.c
@@ -30,36 +30,37 @@
 #include "extmod/modbluetooth.h"
 #include "extmod/modmachine.h"
 #include "extmod/mpbthci.h"
+#include "shared/runtime/softtimer.h"
 #include "modmachine.h"
 #include "mpbthciport.h"
-#include "pico/stdlib.h"
 
 #if MICROPY_PY_BLUETOOTH
 
 #define debug_printf(...) // mp_printf(&mp_plat_print, "mpbthciport.c: " __VA_ARGS__)
 #define error_printf(...) mp_printf(&mp_plat_print, "mpbthciport.c: " __VA_ARGS__)
 
-// Poll timer ID.
-static alarm_id_t poll_timer_id = 0;
-
 uint8_t mp_bluetooth_hci_cmd_buf[4 + 256];
 
+// Soft timer and scheduling node for scheduling a HCI poll.
+static soft_timer_entry_t mp_bluetooth_hci_soft_timer;
 static mp_sched_node_t mp_bluetooth_hci_sched_node;
 
-void mp_bluetooth_hci_init(void) {
+// This is called by soft_timer and executes at PendSV level.
+static void mp_bluetooth_hci_soft_timer_callback(soft_timer_entry_t *self) {
+    mp_bluetooth_hci_poll_now();
 }
 
-static int64_t mp_bluetooth_hci_timer_callback(alarm_id_t id, void *user_data) {
-    poll_timer_id = 0;
-    mp_bluetooth_hci_poll_now();
-    return 0;
+void mp_bluetooth_hci_init(void) {
+    soft_timer_static_init(
+        &mp_bluetooth_hci_soft_timer,
+        SOFT_TIMER_MODE_ONE_SHOT,
+        0,
+        mp_bluetooth_hci_soft_timer_callback
+        );
 }
 
 void mp_bluetooth_hci_poll_in_ms(uint32_t ms) {
-    if (poll_timer_id != 0) {
-        cancel_alarm(poll_timer_id);
-    }
-    poll_timer_id = add_alarm_in_ms(ms, mp_bluetooth_hci_timer_callback, NULL, true);
+    soft_timer_reinsert(&mp_bluetooth_hci_soft_timer, ms);
 }
 
 // For synchronous mode, we run all BLE stack code inside a scheduled task.
@@ -110,10 +111,8 @@ int mp_bluetooth_hci_uart_deinit(void) {
     debug_printf("mp_bluetooth_hci_uart_deinit\n");
 
     // If a poll callback is set cancel it now.
-    if (poll_timer_id > 0) {
-        cancel_alarm(poll_timer_id);
-    }
-    poll_timer_id = 0;
+    soft_timer_remove(&mp_bluetooth_hci_soft_timer);
+
     return 0;
 }
 
diff --git a/ports/rp2/mpnimbleport.c b/ports/rp2/mpnimbleport.c
index 74e9ecb026..fbeaf2beca 100644
--- a/ports/rp2/mpnimbleport.c
+++ b/ports/rp2/mpnimbleport.c
@@ -69,9 +69,8 @@ void mp_bluetooth_hci_poll(void) {
 // --- Port-specific helpers for the generic NimBLE bindings. -----------------
 
 void mp_bluetooth_nimble_hci_uart_wfi(void) {
-    #if defined(__WFI)
-    __WFI();
-    #endif
+    best_effort_wfe_or_timeout(make_timeout_time_ms(1));
+
     // This is called while NimBLE is waiting in ble_npl_sem_pend, i.e. waiting for an HCI ACK.
     // Do not need to run events here (it must not invoke Python code), only processing incoming HCI data.
     mp_bluetooth_nimble_hci_uart_process(false);

From fc94399ffe3c0c794319dd2641386b1ad896ec4f Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 14 Nov 2023 13:26:27 +1100
Subject: [PATCH 181/310] rp2/mpnetworkport: Rework lwIP polling to use
 soft_timer.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/cyw43_configport.h |  4 +---
 ports/rp2/mpnetworkport.c    | 36 ++++++++++++++++++------------------
 ports/rp2/pendsv.h           |  3 ---
 3 files changed, 19 insertions(+), 24 deletions(-)

diff --git a/ports/rp2/cyw43_configport.h b/ports/rp2/cyw43_configport.h
index 8f64762df5..a3a5c48e5e 100644
--- a/ports/rp2/cyw43_configport.h
+++ b/ports/rp2/cyw43_configport.h
@@ -104,11 +104,9 @@ void cyw43_post_poll_hook(void);
 extern volatile int cyw43_has_pending;
 
 static inline void cyw43_yield(void) {
-    uint32_t my_interrupts = save_and_disable_interrupts();
     if (!cyw43_has_pending) {
-        __WFI();
+        best_effort_wfe_or_timeout(make_timeout_time_ms(1));
     }
-    restore_interrupts(my_interrupts);
 }
 
 static inline void cyw43_delay_us(uint32_t us) {
diff --git a/ports/rp2/mpnetworkport.c b/ports/rp2/mpnetworkport.c
index dac04760b8..09a543c2db 100644
--- a/ports/rp2/mpnetworkport.c
+++ b/ports/rp2/mpnetworkport.c
@@ -30,13 +30,14 @@
 
 #if MICROPY_PY_LWIP
 
+#include "shared/runtime/softtimer.h"
 #include "lwip/timeouts.h"
-#include "pico/time.h"
 
 // Poll lwIP every 64ms by default
 #define LWIP_TICK_RATE_MS 64
 
-static alarm_id_t lwip_alarm_id = -1;
+// Soft timer for running lwIP in the background.
+static soft_timer_entry_t mp_network_soft_timer;
 
 #if MICROPY_PY_NETWORK_CYW43
 #include "lib/cyw43-driver/src/cyw43.h"
@@ -56,6 +57,7 @@ static void gpio_irq_handler(void) {
         // CYW43_POST_POLL_HOOK which is called at the end of cyw43_poll_func.
         gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, CYW43_IRQ_LEVEL, false);
         cyw43_has_pending = 1;
+        __SEV();
         pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, cyw43_poll);
         CYW43_STAT_INC(IRQ_COUNT);
     }
@@ -88,11 +90,6 @@ u32_t sys_now(void) {
     return mp_hal_ticks_ms();
 }
 
-STATIC void lwip_poll(void) {
-    // Run the lwIP internal updates
-    sys_check_timeouts();
-}
-
 void lwip_lock_acquire(void) {
     // Prevent PendSV from running.
     pendsv_suspend();
@@ -103,22 +100,25 @@ void lwip_lock_release(void) {
     pendsv_resume();
 }
 
-STATIC int64_t alarm_callback(alarm_id_t id, void *user_data) {
-    pendsv_schedule_dispatch(PENDSV_DISPATCH_LWIP, lwip_poll);
+// This is called by soft_timer and executes at PendSV level.
+static void mp_network_soft_timer_callback(soft_timer_entry_t *self) {
+    // Run the lwIP internal updates.
+    sys_check_timeouts();
+
     #if MICROPY_PY_NETWORK_WIZNET5K
-    pendsv_schedule_dispatch(PENDSV_DISPATCH_WIZNET, wiznet5k_poll);
+    wiznet5k_poll();
     #endif
-    return LWIP_TICK_RATE_MS * 1000;
 }
 
 void mod_network_lwip_init(void) {
-    #if MICROPY_PY_NETWORK_WIZNET5K
-    wiznet5k_deinit();
-    #endif
-    if (lwip_alarm_id != -1) {
-        cancel_alarm(lwip_alarm_id);
-    }
-    lwip_alarm_id = add_alarm_in_us(LWIP_TICK_RATE_MS * 1000, alarm_callback, mp_const_true, true);
+    soft_timer_static_init(
+        &mp_network_soft_timer,
+        SOFT_TIMER_MODE_PERIODIC,
+        LWIP_TICK_RATE_MS,
+        mp_network_soft_timer_callback
+        );
+
+    soft_timer_reinsert(&mp_network_soft_timer, LWIP_TICK_RATE_MS);
 }
 
 #endif // MICROPY_PY_LWIP
diff --git a/ports/rp2/pendsv.h b/ports/rp2/pendsv.h
index fd21ad9ef6..bc8e8d61c8 100644
--- a/ports/rp2/pendsv.h
+++ b/ports/rp2/pendsv.h
@@ -30,9 +30,6 @@
 
 enum {
     PENDSV_DISPATCH_SOFT_TIMER,
-    #if MICROPY_PY_LWIP
-    PENDSV_DISPATCH_LWIP,
-    #endif
     #if MICROPY_PY_NETWORK_CYW43
     PENDSV_DISPATCH_CYW43,
     #endif

From 12ef8a5ba2558a1dd9209c2b1b843a28fb2b584e Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 14 Nov 2023 16:17:24 +1100
Subject: [PATCH 182/310] rp2/mphalport: Optimise exit of mp_hal_delay_ms loop.

best_effort_wfe_or_timeout() already calls time_reached() and returns the
result of it, so no need to call it again.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/mphalport.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/ports/rp2/mphalport.c b/ports/rp2/mphalport.c
index c567a560b1..1fb833f2e5 100644
--- a/ports/rp2/mphalport.c
+++ b/ports/rp2/mphalport.c
@@ -192,10 +192,9 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
 
 void mp_hal_delay_ms(mp_uint_t ms) {
     absolute_time_t t = make_timeout_time_ms(ms);
-    while (!time_reached(t)) {
+    do {
         MICROPY_EVENT_POLL_HOOK_FAST;
-        best_effort_wfe_or_timeout(t);
-    }
+    } while (!best_effort_wfe_or_timeout(t));
 }
 
 void mp_hal_time_ns_set_from_rtc(void) {

From e182f3862e2c8ab731d169b70e83a6535c01a3f2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 14 Nov 2023 16:18:55 +1100
Subject: [PATCH 183/310] rp2/cyw43_configport: Implement cyw43_delay_ms as
 mp_hal_delay_ms.

They do the same thing.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/cyw43_configport.h | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/ports/rp2/cyw43_configport.h b/ports/rp2/cyw43_configport.h
index a3a5c48e5e..96324ee5ec 100644
--- a/ports/rp2/cyw43_configport.h
+++ b/ports/rp2/cyw43_configport.h
@@ -116,12 +116,7 @@ static inline void cyw43_delay_us(uint32_t us) {
 }
 
 static inline void cyw43_delay_ms(uint32_t ms) {
-    uint32_t us = ms * 1000;
-    int32_t start = mp_hal_ticks_us();
-    while (mp_hal_ticks_us() - start < us) {
-        cyw43_yield();
-        MICROPY_EVENT_POLL_HOOK_FAST;
-    }
+    mp_hal_delay_ms(ms);
 }
 
 #define CYW43_EVENT_POLL_HOOK MICROPY_EVENT_POLL_HOOK_FAST

From 6ba57f760cfcfed64157ef7dd030d76738cb0e24 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 29 Nov 2023 11:40:21 +1100
Subject: [PATCH 184/310] lib/uzlib: For matches of the same length, take the
 closest one.

Signed-off-by: Damien George <damien@micropython.org>
---
 lib/uzlib/lz77.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/uzlib/lz77.c b/lib/uzlib/lz77.c
index 117ce50f70..8d6920665e 100644
--- a/lib/uzlib/lz77.c
+++ b/lib/uzlib/lz77.c
@@ -28,13 +28,13 @@ void uzlib_lz77_init(uzlib_lz77_state_t *state, uint8_t *hist, size_t hist_max)
     state->hist_len = 0;
 }
 
-// Push the given byte to the history.
 // Search back in the history for the maximum match of the given src data,
 // with support for searching beyond the end of the history and into the src buffer
 // (effectively the history and src buffer are concatenated).
 static size_t uzlib_lz77_search_max_match(uzlib_lz77_state_t *state, const uint8_t *src, size_t len, size_t *longest_offset) {
     size_t longest_len = 0;
     for (size_t hist_search = 0; hist_search < state->hist_len; ++hist_search) {
+        // Search for a match.
         size_t match_len;
         for (match_len = 0; match_len <= MATCH_LEN_MAX && match_len < len; ++match_len) {
             uint8_t hist;
@@ -47,7 +47,11 @@ static size_t uzlib_lz77_search_max_match(uzlib_lz77_state_t *state, const uint8
                 break;
             }
         }
-        if (match_len >= MATCH_LEN_MIN && match_len > longest_len) {
+
+        // Take this match if its length is at least the minimum, and larger than previous matches.
+        // If the length is the same as the previous longest then take this match as well, because
+        // this match will be closer (more recent in the history) and take less bits to encode.
+        if (match_len >= MATCH_LEN_MIN && match_len >= longest_len) {
             longest_len = match_len;
             *longest_offset = state->hist_len - hist_search;
         }

From c554df57f618fb8c42fcd120ce227a425e44c4bc Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 29 Nov 2023 11:43:43 +1100
Subject: [PATCH 185/310] tests/extmod/deflate_compress.py: Add a test for
 optimal compression.

Signed-off-by: Damien George <damien@micropython.org>
---
 tests/extmod/deflate_compress.py     | 6 ++++++
 tests/extmod/deflate_compress.py.exp | 1 +
 2 files changed, 7 insertions(+)

diff --git a/tests/extmod/deflate_compress.py b/tests/extmod/deflate_compress.py
index 612af663e4..981a986cbf 100644
--- a/tests/extmod/deflate_compress.py
+++ b/tests/extmod/deflate_compress.py
@@ -146,3 +146,9 @@ for wbits in range(5, 10):
     next_len = len(result)
     print(next_len < prev_len and decompress(result, deflate.RAW, wbits) == buf)
     prev_len = next_len
+
+# Verify that compression is optimal: in the bytes below, the final "123" should be
+# compressed by referencing the "123" just before it, and not the one all the way back
+# at the start of the bytes.
+compressed = compress(b"1234567890abcdefghijklmnopqrstuvwxyz123123", deflate.RAW)
+print(len(compressed), compressed)
diff --git a/tests/extmod/deflate_compress.py.exp b/tests/extmod/deflate_compress.py.exp
index 5da70f491b..7b00fa3cb2 100644
--- a/tests/extmod/deflate_compress.py.exp
+++ b/tests/extmod/deflate_compress.py.exp
@@ -39,3 +39,4 @@ True
 True
 True
 True
+41 b'3426153\xb7\xb04HLJNIMK\xcf\xc8\xcc\xca\xce\xc9\xcd\xcb/(,*.)-+\xaf\xa8\xac\x02\xaa\x01"\x00'

From 911662cc10971b1b0054fe0b19686e4a1683b9bd Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 23 Nov 2023 15:21:34 +1100
Subject: [PATCH 186/310] esp8266/machine_spi: Rename machine_hspi to
 machine_spi.

This renames the type, functions and file to match other ports.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp8266/Makefile                        |  2 +-
 ports/esp8266/boards/esp8266_common.ld        |  1 -
 .../esp8266/{machine_hspi.c => machine_spi.c} | 34 +++++++++----------
 ports/esp8266/modmachine.c                    |  2 +-
 ports/esp8266/modmachine.h                    |  1 -
 5 files changed, 19 insertions(+), 21 deletions(-)
 rename ports/esp8266/{machine_hspi.c => machine_spi.c} (85%)

diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index cea0e789c6..88c129952e 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -114,7 +114,7 @@ SRC_C = \
 	machine_bitstream.c \
 	machine_pin.c \
 	machine_rtc.c \
-	machine_hspi.c \
+	machine_spi.c \
 	modesp.c \
 	network_wlan.c \
 	ets_alt_task.c \
diff --git a/ports/esp8266/boards/esp8266_common.ld b/ports/esp8266/boards/esp8266_common.ld
index ed8c6a7fe8..cf4883acc9 100644
--- a/ports/esp8266/boards/esp8266_common.ld
+++ b/ports/esp8266/boards/esp8266_common.ld
@@ -161,7 +161,6 @@ SECTIONS
         *modmachine.o(.literal*, .text*)
         *machine_wdt.o(.literal*, .text*)
         *machine_spi.o(.literal*, .text*)
-        *machine_hspi.o(.literal*, .text*)
         *hspi.o(.literal*, .text*)
         *modesp.o(.literal* .text*)
         *modespnow.o(.literal* .text*)
diff --git a/ports/esp8266/machine_hspi.c b/ports/esp8266/machine_spi.c
similarity index 85%
rename from ports/esp8266/machine_hspi.c
rename to ports/esp8266/machine_spi.c
index 1a7de7f49b..b7f8ecf240 100644
--- a/ports/esp8266/machine_hspi.c
+++ b/ports/esp8266/machine_spi.c
@@ -41,14 +41,14 @@
 
 #if MICROPY_PY_MACHINE_SPI
 
-typedef struct _machine_hspi_obj_t {
+typedef struct _machine_spi_obj_t {
     mp_obj_base_t base;
     uint32_t baudrate;
     uint8_t polarity;
     uint8_t phase;
-} machine_hspi_obj_t;
+} machine_spi_obj_t;
 
-STATIC void machine_hspi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
+STATIC void machine_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
     (void)self_in;
 
     if (dest == NULL) {
@@ -94,14 +94,14 @@ STATIC void machine_hspi_transfer(mp_obj_base_t *self_in, size_t len, const uint
 /******************************************************************************/
 // MicroPython bindings for HSPI
 
-STATIC void machine_hspi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
-    machine_hspi_obj_t *self = MP_OBJ_TO_PTR(self_in);
+STATIC void machine_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "HSPI(id=1, baudrate=%u, polarity=%u, phase=%u)",
         self->baudrate, self->polarity, self->phase);
 }
 
-STATIC void machine_hspi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    machine_hspi_obj_t *self = (machine_hspi_obj_t *)self_in;
+STATIC void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    machine_spi_obj_t *self = (machine_spi_obj_t *)self_in;
 
     enum { ARG_baudrate, ARG_polarity, ARG_phase };
     static const mp_arg_t allowed_args[] = {
@@ -150,7 +150,7 @@ STATIC void machine_hspi_init(mp_obj_base_t *self_in, size_t n_args, const mp_ob
     spi_mode(HSPI, self->phase, self->polarity);
 }
 
-mp_obj_t machine_hspi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     MP_MACHINE_SPI_CHECK_FOR_LEGACY_SOFTSPI_CONSTRUCTION(n_args, n_kw, args);
 
     // args[0] holds the id of the peripheral
@@ -159,29 +159,29 @@ mp_obj_t machine_hspi_make_new(const mp_obj_type_t *type, size_t n_args, size_t
         mp_raise_ValueError(NULL);
     }
 
-    machine_hspi_obj_t *self = mp_obj_malloc(machine_hspi_obj_t, &machine_hspi_type);
+    machine_spi_obj_t *self = mp_obj_malloc(machine_spi_obj_t, &machine_spi_type);
     // set defaults
     self->baudrate = 80000000L;
     self->polarity = 0;
     self->phase = 0;
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    machine_hspi_init((mp_obj_base_t *)self, n_args - 1, args + 1, &kw_args);
+    machine_spi_init((mp_obj_base_t *)self, n_args - 1, args + 1, &kw_args);
     return MP_OBJ_FROM_PTR(self);
 }
 
-STATIC const mp_machine_spi_p_t machine_hspi_p = {
-    .init = machine_hspi_init,
-    .transfer = machine_hspi_transfer,
+STATIC const mp_machine_spi_p_t machine_spi_p = {
+    .init = machine_spi_init,
+    .transfer = machine_spi_transfer,
 };
 
 MP_DEFINE_CONST_OBJ_TYPE(
-    machine_hspi_type,
+    machine_spi_type,
     MP_QSTR_HSPI,
     MP_TYPE_FLAG_NONE,
-    make_new, machine_hspi_make_new,
-    print, machine_hspi_print,
-    protocol, &machine_hspi_p,
+    make_new, machine_spi_make_new,
+    print, machine_spi_print,
+    protocol, &machine_spi_p,
     locals_dict, &mp_machine_spi_locals_dict
     );
 
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index 78d5bde26d..3daf5ad876 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -432,7 +432,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
     #endif
     #if MICROPY_PY_MACHINE_SPI
-    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hspi_type) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
     #endif
 
diff --git a/ports/esp8266/modmachine.h b/ports/esp8266/modmachine.h
index 5a90a6c6fe..ff8670687b 100644
--- a/ports/esp8266/modmachine.h
+++ b/ports/esp8266/modmachine.h
@@ -5,7 +5,6 @@
 
 extern const mp_obj_type_t pyb_pin_type;
 extern const mp_obj_type_t pyb_rtc_type;
-extern const mp_obj_type_t machine_hspi_type;
 
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj);
 

From b4d288ae4478886a0d547a176f090de678bff70e Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 23 Nov 2023 15:56:11 +1100
Subject: [PATCH 187/310] nrf: Use MICROPY_PY_MACHINE_SPI instead of
 MICROPY_PY_MACHINE_HW_SPI.

MICROPY_PY_MACHINE_SPI is defined in mpconfigport.h to be equal to
MICROPY_PY_MACHINE_HW_SPI, so they are equivalent options.  The former one
is preferred because it's used by all other ports.

The default in mpconfigport.h is to enable this option, and all boards that
enable SPI have this removed from their mpconfigboard.h file so they pick
up the default.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h           | 1 -
 ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h | 1 -
 ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h             | 1 -
 ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h           | 1 -
 ports/nrf/boards/DVK_BL652/mpconfigboard.h                 | 1 -
 ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h               | 1 -
 ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h               | 1 -
 ports/nrf/boards/FEATHER52/mpconfigboard.h                 | 1 -
 ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h            | 1 -
 ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h            | 1 -
 ports/nrf/boards/MICROBIT/mpconfigboard.h                  | 1 -
 ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h   | 1 -
 ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h            | 1 -
 ports/nrf/boards/PCA10000/mpconfigboard.h                  | 2 +-
 ports/nrf/boards/PCA10001/mpconfigboard.h                  | 2 +-
 ports/nrf/boards/PCA10028/mpconfigboard.h                  | 1 -
 ports/nrf/boards/PCA10031/mpconfigboard.h                  | 1 -
 ports/nrf/boards/PCA10040/mpconfigboard.h                  | 1 -
 ports/nrf/boards/PCA10056/mpconfigboard.h                  | 1 -
 ports/nrf/boards/PCA10059/mpconfigboard.h                  | 1 -
 ports/nrf/boards/PCA10090/mpconfigboard.h                  | 1 -
 ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h          | 1 -
 ports/nrf/boards/WT51822_S4AT/mpconfigboard.h              | 1 -
 ports/nrf/main.c                                           | 2 +-
 ports/nrf/modules/machine/modmachine.c                     | 2 +-
 ports/nrf/modules/machine/spi.c                            | 4 ++--
 ports/nrf/mpconfigport.h                                   | 6 ++----
 ports/nrf/nrfx_config.h                                    | 6 +++---
 28 files changed, 11 insertions(+), 34 deletions(-)

diff --git a/ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h b/ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h
index 9bf2a8d191..87e9f8ed2e 100644
--- a/ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h
+++ b/ports/nrf/boards/ACTINIUS_ICARUS/mpconfigboard.h
@@ -31,7 +31,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf9160"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (0)
diff --git a/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h b/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
index 0e6c5a44ab..69d715f18b 100644
--- a/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
+++ b/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
@@ -15,7 +15,6 @@
 
 #define MICROPY_PY_MACHINE_UART         (1)
 #define MICROPY_PY_MACHINE_HW_PWM       (1)
-#define MICROPY_PY_MACHINE_HW_SPI       (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER    (1)
 #define MICROPY_PY_MACHINE_I2C          (1)
 #define MICROPY_PY_MACHINE_ADC          (1)
diff --git a/ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h b/ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h
index a16ce1a20d..6b1b4e0074 100644
--- a/ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h
+++ b/ports/nrf/boards/ARDUINO_PRIMO/mpconfigboard.h
@@ -33,7 +33,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h b/ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h
index b69f6a882e..417b49fce6 100644
--- a/ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h
+++ b/ports/nrf/boards/BLUEIO_TAG_EVIM/mpconfigboard.h
@@ -33,7 +33,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/DVK_BL652/mpconfigboard.h b/ports/nrf/boards/DVK_BL652/mpconfigboard.h
index 5eb666c975..fe77fe1957 100644
--- a/ports/nrf/boards/DVK_BL652/mpconfigboard.h
+++ b/ports/nrf/boards/DVK_BL652/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h b/ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h
index 8d3b3688f3..dd64ffb8b7 100644
--- a/ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h
+++ b/ports/nrf/boards/EVK_NINA_B1/mpconfigboard.h
@@ -32,7 +32,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h b/ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h
index 17903e576d..98bd71eec8 100644
--- a/ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h
+++ b/ports/nrf/boards/EVK_NINA_B3/mpconfigboard.h
@@ -47,7 +47,6 @@
 // Peripherals Config
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/FEATHER52/mpconfigboard.h b/ports/nrf/boards/FEATHER52/mpconfigboard.h
index f653832c62..7dcc7357a6 100644
--- a/ports/nrf/boards/FEATHER52/mpconfigboard.h
+++ b/ports/nrf/boards/FEATHER52/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h b/ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h
index 85b48e1fb2..6d1c5364b5 100644
--- a/ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h
+++ b/ports/nrf/boards/IBK_BLYST_NANO/mpconfigboard.h
@@ -33,7 +33,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h b/ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h
index 1f47e9b06d..aacb49e715 100644
--- a/ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h
+++ b/ports/nrf/boards/IDK_BLYST_NANO/mpconfigboard.h
@@ -33,7 +33,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/MICROBIT/mpconfigboard.h b/ports/nrf/boards/MICROBIT/mpconfigboard.h
index 63f45587af..3f9f873ff7 100644
--- a/ports/nrf/boards/MICROBIT/mpconfigboard.h
+++ b/ports/nrf/boards/MICROBIT/mpconfigboard.h
@@ -31,7 +31,6 @@
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MUSIC            (1)
 #define MICROPY_PY_MACHINE_SOFT_PWM (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h b/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h
index d502c86575..94624be028 100644
--- a/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h
+++ b/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART      (1)
 #define MICROPY_PY_MACHINE_HW_PWM    (1)
-#define MICROPY_PY_MACHINE_HW_SPI    (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C       (1)
 #define MICROPY_PY_MACHINE_ADC       (1)
diff --git a/ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h b/ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h
index d77e104ce2..343fa4c2f3 100644
--- a/ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h
+++ b/ports/nrf/boards/PARTICLE_XENON/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/PCA10000/mpconfigboard.h b/ports/nrf/boards/PCA10000/mpconfigboard.h
index 2f551612ea..a450c3c36e 100644
--- a/ports/nrf/boards/PCA10000/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10000/mpconfigboard.h
@@ -30,7 +30,7 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_SOFT_PWM (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (0)
+#define MICROPY_PY_MACHINE_SPI      (0)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (0)
 #define MICROPY_PY_MACHINE_ADC      (0)
diff --git a/ports/nrf/boards/PCA10001/mpconfigboard.h b/ports/nrf/boards/PCA10001/mpconfigboard.h
index 2120ee0a88..929189188e 100644
--- a/ports/nrf/boards/PCA10001/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10001/mpconfigboard.h
@@ -30,7 +30,7 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_SOFT_PWM (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (0)
+#define MICROPY_PY_MACHINE_SPI      (0)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/PCA10028/mpconfigboard.h b/ports/nrf/boards/PCA10028/mpconfigboard.h
index f8e3541f37..3dc8ed3459 100644
--- a/ports/nrf/boards/PCA10028/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10028/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_SOFT_PWM (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/PCA10031/mpconfigboard.h b/ports/nrf/boards/PCA10031/mpconfigboard.h
index b618f61b50..e74e83c663 100644
--- a/ports/nrf/boards/PCA10031/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10031/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_SOFT_PWM (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/PCA10040/mpconfigboard.h b/ports/nrf/boards/PCA10040/mpconfigboard.h
index 7202f6a0b1..b965bf319d 100644
--- a/ports/nrf/boards/PCA10040/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10040/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/PCA10056/mpconfigboard.h b/ports/nrf/boards/PCA10056/mpconfigboard.h
index f7daf48a62..5b1b3a36ee 100644
--- a/ports/nrf/boards/PCA10056/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10056/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/PCA10059/mpconfigboard.h b/ports/nrf/boards/PCA10059/mpconfigboard.h
index f4c78915c6..1c87731584 100644
--- a/ports/nrf/boards/PCA10059/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10059/mpconfigboard.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/PCA10090/mpconfigboard.h b/ports/nrf/boards/PCA10090/mpconfigboard.h
index f58ac8989b..1989fd0476 100644
--- a/ports/nrf/boards/PCA10090/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10090/mpconfigboard.h
@@ -31,7 +31,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf9160-DK"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_TIMER_NRF (0)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
diff --git a/ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h b/ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h
index 1a2d14f1d4..25a34541a4 100644
--- a/ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h
+++ b/ports/nrf/boards/SEEED_XIAO_NRF52/mpconfigboard.h
@@ -35,7 +35,6 @@
 #define MICROPY_HW_USB_CDC          (1)
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_HW_PWM   (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/boards/WT51822_S4AT/mpconfigboard.h b/ports/nrf/boards/WT51822_S4AT/mpconfigboard.h
index 7997aa2697..e9865cb4d6 100644
--- a/ports/nrf/boards/WT51822_S4AT/mpconfigboard.h
+++ b/ports/nrf/boards/WT51822_S4AT/mpconfigboard.h
@@ -31,7 +31,6 @@
 #define MICROPY_PY_SYS_PLATFORM     "nrf51"
 
 #define MICROPY_PY_MACHINE_UART     (1)
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
 #define MICROPY_PY_MACHINE_RTCOUNTER (1)
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
diff --git a/ports/nrf/main.c b/ports/nrf/main.c
index 959c31e2e7..8e57be8dec 100644
--- a/ports/nrf/main.c
+++ b/ports/nrf/main.c
@@ -137,7 +137,7 @@ soft_reset:
     mp_init();
     readline_init0();
 
-    #if MICROPY_PY_MACHINE_HW_SPI
+    #if MICROPY_PY_MACHINE_SPI
     spi_init0();
     #endif
 
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index 9043b7a441..0bacc24eea 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -219,7 +219,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
 #if MICROPY_PY_MACHINE_UART
     { MP_ROM_QSTR(MP_QSTR_UART),               MP_ROM_PTR(&machine_uart_type) },
 #endif
-#if MICROPY_PY_MACHINE_HW_SPI
+#if MICROPY_PY_MACHINE_SPI
     { MP_ROM_QSTR(MP_QSTR_SPI),                MP_ROM_PTR(&machine_spi_type) },
 #endif
 #if MICROPY_PY_MACHINE_I2C
diff --git a/ports/nrf/modules/machine/spi.c b/ports/nrf/modules/machine/spi.c
index d0234244af..cb09a23491 100644
--- a/ports/nrf/modules/machine/spi.c
+++ b/ports/nrf/modules/machine/spi.c
@@ -31,7 +31,7 @@
 
 #include "py/runtime.h"
 
-#if MICROPY_PY_MACHINE_HW_SPI
+#if MICROPY_PY_MACHINE_SPI
 
 #include "py/nlr.h"
 #include "py/mphal.h"
@@ -347,4 +347,4 @@ MP_DEFINE_CONST_OBJ_TYPE(
     locals_dict, &mp_machine_spi_locals_dict
     );
 
-#endif // MICROPY_PY_MACHINE_HW_SPI
+#endif // MICROPY_PY_MACHINE_SPI
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 61e2421038..e18e55fb31 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -183,11 +183,9 @@
 #define MICROPY_PY_MACHINE_I2C      (0)
 #endif
 
-#ifndef MICROPY_PY_MACHINE_HW_SPI
-#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#ifndef MICROPY_PY_MACHINE_SPI
+#define MICROPY_PY_MACHINE_SPI      (1)
 #endif
-
-#define MICROPY_PY_MACHINE_SPI      (MICROPY_PY_MACHINE_HW_SPI)
 #define MICROPY_PY_MACHINE_SPI_MIN_DELAY (0)
 
 #ifndef MICROPY_PY_MACHINE_HW_PWM
diff --git a/ports/nrf/nrfx_config.h b/ports/nrf/nrfx_config.h
index 4669a09056..c38af62145 100644
--- a/ports/nrf/nrfx_config.h
+++ b/ports/nrf/nrfx_config.h
@@ -103,7 +103,7 @@
 #endif
 
 #if defined(NRF51) || defined(NRF52832)
-  #define NRFX_SPI_ENABLED (MICROPY_PY_MACHINE_HW_SPI)
+  #define NRFX_SPI_ENABLED (MICROPY_PY_MACHINE_SPI)
   #define NRFX_SPI0_ENABLED 1
   #define NRFX_SPI1_ENABLED 1
 
@@ -111,13 +111,13 @@
     #define NRFX_SPI2_ENABLED 1
   #endif
 #elif defined(NRF52840)
-  #define NRFX_SPIM_ENABLED (MICROPY_PY_MACHINE_HW_SPI)
+  #define NRFX_SPIM_ENABLED (MICROPY_PY_MACHINE_SPI)
   #define NRFX_SPIM0_ENABLED 1
   #define NRFX_SPIM1_ENABLED 1
   #define NRFX_SPIM2_ENABLED 1
   #define NRFX_SPIM3_ENABLED (NRF52840)
 #elif defined(NRF9160_XXAA)
-  #define NRFX_SPIM_ENABLED (MICROPY_PY_MACHINE_HW_SPI)
+  #define NRFX_SPIM_ENABLED (MICROPY_PY_MACHINE_SPI)
   #define NRFX_SPIM0_ENABLED 1
   #define NRFX_SPIM1_ENABLED 1
 

From e120c00c9590b5691a8a4560382ad70ffb7a1c5d Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 24 Nov 2023 11:35:31 +1100
Subject: [PATCH 188/310] stm32/modmachine: Only enable machine.I2C if hardware
 I2C is enabled.

Prior to this change, if a board did not define any hardware I2C pins, via
MICROPY_HW_I2Cx_SCL, then machine.I2C would alias to machine.SoftI2C.

That doesn't really make sense, and SoftI2C should always be used if there
is no hardware implementation.  So this commit makes it so that machine.I2C
is only available if at least one set of I2C hardware pins are defined via
the MICROPY_HW_I2Cx_SCL/SDA macros.

For all boards that define at least one set of I2C hardware pins (which is
most of them) this commit is a no-op.  The only boards that change are:
LEGO_HUB_NO6, LEGO_HUB_NO7, STM32H7B3I_DK.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/mpconfigport.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index 00ded86e16..e5bcf4d701 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -117,7 +117,7 @@
 #endif
 #define MICROPY_PY_MACHINE_PULSE    (1)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
-#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_I2C      (MICROPY_HW_ENABLE_HW_I2C)
 #define MICROPY_PY_MACHINE_SOFTI2C  (1)
 #define MICROPY_PY_MACHINE_I2S_INCLUDEFILE "ports/stm32/machine_i2s.c"
 #define MICROPY_PY_MACHINE_I2S_CONSTANT_RX (I2S_MODE_MASTER_RX)

From 7b2f13fb69d95980c8e517d1944bc1e9d7ed5489 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 24 Nov 2023 11:46:54 +1100
Subject: [PATCH 189/310] renesas-ra: Consolidate MICROPY_PY_MACHINE_I2C
 option.

MICROPY_HW_ENABLE_HW_I2C and MICROPY_PY_MACHINE_I2C are equivalent, so
just use the latter.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/renesas-ra/machine_i2c.c          | 4 ++--
 ports/renesas-ra/mpconfigboard_common.h | 4 ++--
 ports/renesas-ra/mpconfigport.h         | 1 -
 3 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/ports/renesas-ra/machine_i2c.c b/ports/renesas-ra/machine_i2c.c
index 0e2d62f8a4..dc14be9594 100644
--- a/ports/renesas-ra/machine_i2c.c
+++ b/ports/renesas-ra/machine_i2c.c
@@ -35,7 +35,7 @@
 
 #include "ra_i2c.h"
 
-#if MICROPY_HW_ENABLE_HW_I2C
+#if MICROPY_PY_MACHINE_I2C
 
 #define DEFAULT_I2C_FREQ (400000)
 #define DEFAULT_I2C_TIMEOUT (1000)
@@ -165,4 +165,4 @@ MP_DEFINE_CONST_OBJ_TYPE(
     protocol, &machine_i2c_p
     );
 
-#endif // MICROPY_HW_ENABLE_HW_I2C
+#endif // MICROPY_PY_MACHINE_I2C
diff --git a/ports/renesas-ra/mpconfigboard_common.h b/ports/renesas-ra/mpconfigboard_common.h
index f8990f489e..479c9f61d1 100644
--- a/ports/renesas-ra/mpconfigboard_common.h
+++ b/ports/renesas-ra/mpconfigboard_common.h
@@ -256,9 +256,9 @@
 // Enable hardware I2C if there are any peripherals defined
 #if defined(MICROPY_HW_I2C0_SCL) || defined(MICROPY_HW_I2C1_SCL) \
     || defined(MICROPY_HW_I2C2_SCL)
-#define MICROPY_HW_ENABLE_HW_I2C (1)
+#define MICROPY_PY_MACHINE_I2C (1)
 #else
-#define MICROPY_HW_ENABLE_HW_I2C (0)
+#define MICROPY_PY_MACHINE_I2C (0)
 #endif
 
 #if defined(MICROPY_HW_PWM_0A) || defined(MICROPY_HW_PWM_0B) \
diff --git a/ports/renesas-ra/mpconfigport.h b/ports/renesas-ra/mpconfigport.h
index 222d5b919d..94e07b3391 100644
--- a/ports/renesas-ra/mpconfigport.h
+++ b/ports/renesas-ra/mpconfigport.h
@@ -138,7 +138,6 @@
 #endif
 #define MICROPY_PY_MACHINE_PULSE    (1)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
-#define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_SOFTI2C  (1)
 #define MICROPY_PY_MACHINE_SPI      (1)
 #define MICROPY_PY_MACHINE_SPI_MSB  (SPI_FIRSTBIT_MSB)

From 14432b5da022e32c035c47c7f6c44b5e97d16c89 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 24 Nov 2023 14:43:40 +1100
Subject: [PATCH 190/310] extmod/modmachine: Make I2C/SPI defns available when
 soft impl enabled.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modmachine.h | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index 0744ef7889..488aef4afd 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -114,7 +114,7 @@
         } \
     } while (0)
 
-#if MICROPY_PY_MACHINE_I2C
+#if MICROPY_PY_MACHINE_I2C || MICROPY_PY_MACHINE_SOFTI2C
 
 #define MP_MACHINE_I2C_FLAG_READ (0x01) // if not set then it's a write
 #define MP_MACHINE_I2C_FLAG_STOP (0x02)
@@ -139,7 +139,7 @@ typedef struct _machine_mem_obj_t {
     unsigned elem_size; // in bytes
 } machine_mem_obj_t;
 
-#if MICROPY_PY_MACHINE_I2C
+#if MICROPY_PY_MACHINE_I2C || MICROPY_PY_MACHINE_SOFTI2C
 
 typedef struct _mp_machine_i2c_buf_t {
     size_t len;
@@ -175,7 +175,7 @@ typedef struct _mp_machine_soft_i2c_obj_t {
 
 #endif
 
-#if MICROPY_PY_MACHINE_SPI
+#if MICROPY_PY_MACHINE_SPI || MICROPY_PY_MACHINE_SOFTSPI
 
 // SPI protocol.
 typedef struct _mp_machine_spi_p_t {
@@ -215,16 +215,20 @@ extern const mp_obj_type_t machine_timer_type;
 extern const mp_obj_type_t machine_uart_type;
 extern const mp_obj_type_t machine_wdt_type;
 
-#if MICROPY_PY_MACHINE_I2C
+#if MICROPY_PY_MACHINE_SOFTI2C
 extern const mp_obj_type_t mp_machine_soft_i2c_type;
+#endif
+#if MICROPY_PY_MACHINE_I2C || MICROPY_PY_MACHINE_SOFTI2C
 extern const mp_obj_dict_t mp_machine_i2c_locals_dict;
 #endif
 
-#if MICROPY_PY_MACHINE_SPI
+#if MICROPY_PY_MACHINE_SOFTSPI
 extern const mp_obj_type_t mp_machine_soft_spi_type;
-extern const mp_obj_dict_t mp_machine_spi_locals_dict;
 extern const mp_machine_spi_p_t mp_machine_soft_spi_p;
 #endif
+#if MICROPY_PY_MACHINE_SPI || MICROPY_PY_MACHINE_SOFTSPI
+extern const mp_obj_dict_t mp_machine_spi_locals_dict;
+#endif
 
 #if defined(MICROPY_MACHINE_MEM_GET_READ_ADDR)
 uintptr_t MICROPY_MACHINE_MEM_GET_READ_ADDR(mp_obj_t addr_o, uint align);

From 7d39db2503cab67f03216161b0e829939f80fff7 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 22 Nov 2023 13:00:02 +1100
Subject: [PATCH 191/310] extmod/modmachine: Factor ports' machine module dict
 to common code.

This is a code factoring to have the dict for the machine module in one
location, and all the ports use that same dict.  The machine.soft_reset()
function implementation is also factored because it's the same for all
ports that did already implement it.  Eventually more functions/bindings
can be factored.

All ports remain functionally the same, except:
- cc3200 port: gains soft_reset, mem8, mem16, mem32, Signal; loses POWER_ON
  (which was a legacy constant, replaced long ago by PWRON_RESET)
- nrf port: gains Signal
- qemu-arm port: gains soft_reset
- unix port: gains soft_reset
- zephyr port: gains soft_reset, mem8, mem16, mem32

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/extmod.cmake                    |   1 +
 extmod/extmod.mk                       |   1 +
 extmod/modmachine.c                    | 125 +++++++++++++++++++
 ports/cc3200/application.mk            |   1 -
 ports/cc3200/mods/modmachine.c         | 115 ++++++++---------
 ports/cc3200/mpconfigport.h            |   1 +
 ports/esp32/esp32_common.cmake         |   1 -
 ports/esp32/modmachine.c               | 164 ++++++++-----------------
 ports/esp32/mpconfigport.h             |   2 +
 ports/esp8266/Makefile                 |   1 -
 ports/esp8266/main.c                   |   3 -
 ports/esp8266/modmachine.c             | 124 +++++--------------
 ports/esp8266/mpconfigport.h           |   6 +-
 ports/mimxrt/Makefile                  |   1 -
 ports/mimxrt/modmachine.c              | 119 ++++++------------
 ports/mimxrt/mpconfigport.h            |   2 +
 ports/nrf/Makefile                     |   1 -
 ports/nrf/modules/machine/modmachine.c | 132 ++++++++------------
 ports/nrf/mpconfigport.h               |   1 +
 ports/qemu-arm/Makefile                |   1 -
 ports/qemu-arm/modmachine.c            |  31 ++---
 ports/qemu-arm/mpconfigport.h          |   1 +
 ports/renesas-ra/Makefile              |   1 -
 ports/renesas-ra/modmachine.c          | 126 ++++++-------------
 ports/renesas-ra/mpconfigport.h        |   5 +-
 ports/rp2/CMakeLists.txt               |   2 -
 ports/rp2/modmachine.c                 |  99 ++++-----------
 ports/rp2/mpconfigport.h               |   2 +
 ports/samd/Makefile                    |   1 -
 ports/samd/modmachine.c                | 128 ++++++-------------
 ports/samd/mpconfigport.h              |   1 +
 ports/stm32/Makefile                   |   3 +-
 ports/stm32/modmachine.c               | 149 ++++++----------------
 ports/stm32/mpconfigport.h             |   2 +
 ports/unix/Makefile                    |   1 -
 ports/unix/modmachine.c                |  53 +++-----
 ports/unix/mpconfigport.h              |   3 +
 ports/windows/Makefile                 |   1 -
 ports/windows/micropython.vcxproj      |   1 -
 ports/windows/mpconfigport.h           |   1 +
 ports/windows/msvc/sources.props       |   1 +
 ports/zephyr/CMakeLists.txt            |   1 -
 ports/zephyr/modmachine.c              |  56 +++------
 ports/zephyr/mpconfigport.h            |   1 +
 44 files changed, 550 insertions(+), 922 deletions(-)
 create mode 100644 extmod/modmachine.c

diff --git a/extmod/extmod.cmake b/extmod/extmod.cmake
index 5bfdf65513..b9a1d67034 100644
--- a/extmod/extmod.cmake
+++ b/extmod/extmod.cmake
@@ -22,6 +22,7 @@ set(MICROPY_SOURCE_EXTMOD
     ${MICROPY_EXTMOD_DIR}/modbluetooth.c
     ${MICROPY_EXTMOD_DIR}/modframebuf.c
     ${MICROPY_EXTMOD_DIR}/modlwip.c
+    ${MICROPY_EXTMOD_DIR}/modmachine.c
     ${MICROPY_EXTMOD_DIR}/modnetwork.c
     ${MICROPY_EXTMOD_DIR}/modonewire.c
     ${MICROPY_EXTMOD_DIR}/modasyncio.c
diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index 84573ec861..7aba7d93eb 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -27,6 +27,7 @@ SRC_EXTMOD_C += \
 	extmod/modheapq.c \
 	extmod/modjson.c \
 	extmod/modlwip.c \
+	extmod/modmachine.c \
 	extmod/modnetwork.c \
 	extmod/modonewire.c \
 	extmod/modos.c \
diff --git a/extmod/modmachine.c b/extmod/modmachine.c
new file mode 100644
index 0000000000..e0bef3a73f
--- /dev/null
+++ b/extmod/modmachine.c
@@ -0,0 +1,125 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+
+#if MICROPY_PY_MACHINE
+
+#include "extmod/modmachine.h"
+#include "shared/runtime/pyexec.h"
+
+#if MICROPY_PY_MACHINE_DHT_READINTO
+#include "drivers/dht/dht.h"
+#endif
+
+// The port can provide additional machine-module implementation in this file.
+#ifdef MICROPY_PY_MACHINE_INCLUDEFILE
+#include MICROPY_PY_MACHINE_INCLUDEFILE
+#endif
+
+STATIC mp_obj_t machine_soft_reset(void) {
+    pyexec_system_exit = PYEXEC_FORCED_EXIT;
+    mp_raise_type(&mp_type_SystemExit);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
+
+STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
+    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
+
+    // Memory access objects.
+    { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
+    { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
+    { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
+
+    // Reset related functions.
+    { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
+
+    // Functions for bit protocols.
+    #if MICROPY_PY_MACHINE_BITSTREAM
+    { MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) },
+    #endif
+    #if MICROPY_PY_MACHINE_DHT_READINTO
+    { MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) },
+    #endif
+    #if MICROPY_PY_MACHINE_PULSE
+    { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
+    #endif
+
+    // Class for Signal.
+    { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
+
+    // Classes for software bus protocols.
+    #if MICROPY_PY_MACHINE_SOFTI2C
+    { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_SOFTSPI
+    { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
+    #endif
+
+    // Classes for hardware peripherals.
+    #if MICROPY_PY_MACHINE_ADC
+    { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_ADC_BLOCK
+    { MP_ROM_QSTR(MP_QSTR_ADCBlock), MP_ROM_PTR(&machine_adc_block_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_DAC
+    { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&machine_dac_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_I2C
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_I2S
+    { MP_ROM_QSTR(MP_QSTR_I2S), MP_ROM_PTR(&machine_i2s_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_PWM
+    { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_SPI
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_UART
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
+    #endif
+    #if MICROPY_PY_MACHINE_WDT
+    { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) },
+    #endif
+
+    // A port can add extra entries to the module by defining the following macro.
+    #ifdef MICROPY_PY_MACHINE_EXTRA_GLOBALS
+    MICROPY_PY_MACHINE_EXTRA_GLOBALS
+    #endif
+};
+STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
+
+const mp_obj_module_t mp_module_machine = {
+    .base = { &mp_type_module },
+    .globals = (mp_obj_dict_t *)&machine_module_globals,
+};
+
+MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
+
+#endif // MICROPY_PY_MACHINE
diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index 6959c64b66..9fc58553cd 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -76,7 +76,6 @@ APP_MISC_SRC_C = $(addprefix misc/,\
 	)
 
 APP_MODS_SRC_C = $(addprefix mods/,\
-	modmachine.c \
 	modnetwork.c \
 	modos.c \
 	modsocket.c \
diff --git a/ports/cc3200/mods/modmachine.c b/ports/cc3200/mods/modmachine.c
index 107efaef16..8673c62865 100644
--- a/ports/cc3200/mods/modmachine.c
+++ b/ports/cc3200/mods/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013, 2014 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2015 Daniel Campora
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -25,29 +25,22 @@
  * THE SOFTWARE.
  */
 
-#include <stdint.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
+
 #include <stdio.h>
 
-#include "py/runtime.h"
-#include "py/mphal.h"
-#include "extmod/modmachine.h"
 #include "inc/hw_types.h"
 #include "inc/hw_gpio.h"
 #include "inc/hw_ints.h"
 #include "inc/hw_memmap.h"
 #include "inc/hw_uart.h"
 #include "rom_map.h"
-#include "prcm.h"
 #include "pybuart.h"
 #include "pybpin.h"
 #include "pybrtc.h"
 #include "simplelink.h"
-#include "modnetwork.h"
 #include "modwlan.h"
-#include "modos.h"
-#include "FreeRTOS.h"
-#include "portable.h"
-#include "task.h"
 #include "random.h"
 #include "pybadc.h"
 #include "pybi2c.h"
@@ -55,9 +48,51 @@
 #include "pybsleep.h"
 #include "pybspi.h"
 #include "pybtimer.h"
-#include "utils.h"
-#include "gccollect.h"
 
+#ifdef DEBUG
+#define MICROPY_PY_MACHINE_INFO_ENTRY { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) },
+#else
+#define MICROPY_PY_MACHINE_INFO_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
+    MICROPY_PY_MACHINE_INFO_ENTRY \
+    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_main),                MP_ROM_PTR(&machine_main_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_rng),                 MP_ROM_PTR(&machine_rng_get_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_wake_reason),         MP_ROM_PTR(&machine_wake_reason_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&pyb_rtc_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&pin_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&pyb_adc_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&pyb_i2c_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&pyb_spi_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&pyb_uart_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&pyb_timer_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_SD),                  MP_ROM_PTR(&pyb_sd_type) }, \
+    \
+    /* class constants */ \
+    { MP_ROM_QSTR(MP_QSTR_IDLE),                MP_ROM_INT(PYB_PWR_MODE_ACTIVE) }, \
+    { MP_ROM_QSTR(MP_QSTR_SLEEP),               MP_ROM_INT(PYB_PWR_MODE_LPDS) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP),           MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) }, \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(PYB_SLP_PWRON_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),          MP_ROM_INT(PYB_SLP_HARD_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(PYB_SLP_WDT_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET),     MP_ROM_INT(PYB_SLP_HIB_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(PYB_SLP_SOFT_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_WLAN_WAKE),           MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) }, \
+    { MP_ROM_QSTR(MP_QSTR_PIN_WAKE),            MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) }, \
+    { MP_ROM_QSTR(MP_QSTR_RTC_WAKE),            MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) }, \
 
 #ifdef DEBUG
 extern OsiTaskHandle    mpTaskHandle;
@@ -161,58 +196,4 @@ STATIC mp_obj_t machine_wake_reason (void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_wake_reason_obj, machine_wake_reason);
 
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__),            MP_ROM_QSTR(MP_QSTR_machine) },
-
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) },
-#ifdef DEBUG
-    { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) },
-#endif
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) },
-    { MP_ROM_QSTR(MP_QSTR_main),                MP_ROM_PTR(&machine_main_obj) },
-    { MP_ROM_QSTR(MP_QSTR_rng),                 MP_ROM_PTR(&machine_rng_get_obj) },
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) },
-    { MP_ROM_QSTR(MP_QSTR_wake_reason),         MP_ROM_PTR(&machine_wake_reason_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&pyb_rtc_type) },
-    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&pyb_adc_type) },
-    { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&pyb_i2c_type) },
-    { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&pyb_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&pyb_uart_type) },
-    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&pyb_timer_type) },
-    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
-    { MP_ROM_QSTR(MP_QSTR_SD),                  MP_ROM_PTR(&pyb_sd_type) },
-
-    // class constants
-    { MP_ROM_QSTR(MP_QSTR_IDLE),                MP_ROM_INT(PYB_PWR_MODE_ACTIVE) },
-    { MP_ROM_QSTR(MP_QSTR_SLEEP),               MP_ROM_INT(PYB_PWR_MODE_LPDS) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP),           MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) },
-    { MP_ROM_QSTR(MP_QSTR_POWER_ON),            MP_ROM_INT(PYB_SLP_PWRON_RESET) }, // legacy constant
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(PYB_SLP_PWRON_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),          MP_ROM_INT(PYB_SLP_HARD_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(PYB_SLP_WDT_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET),     MP_ROM_INT(PYB_SLP_HIB_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(PYB_SLP_SOFT_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_WLAN_WAKE),           MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) },
-    { MP_ROM_QSTR(MP_QSTR_PIN_WAKE),            MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) },
-    { MP_ROM_QSTR(MP_QSTR_RTC_WAKE),            MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t*)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
 MP_REGISTER_ROOT_POINTER(mp_obj_t machine_config_main);
diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h
index c19288fe89..f2dff028fc 100644
--- a/ports/cc3200/mpconfigport.h
+++ b/ports/cc3200/mpconfigport.h
@@ -121,6 +121,7 @@
 #define MICROPY_PY_TIME_TIME_TIME_NS                (1)
 #define MICROPY_PY_TIME_INCLUDEFILE                 "ports/cc3200/mods/modtime.c"
 #define MICROPY_PY_MACHINE                          (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE              "ports/cc3200/mods/modmachine.c"
 #define MICROPY_PY_MACHINE_WDT                      (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE          "ports/cc3200/mods/machine_wdt.c"
 
diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index 40ae98822d..71b42a590d 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -69,7 +69,6 @@ list(APPEND MICROPY_SOURCE_PORT
     machine_touchpad.c
     machine_dac.c
     machine_i2c.c
-    modmachine.c
     network_common.c
     network_lan.c
     network_ppp.c
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 461ddacdad..a1bd9a5cb9 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -5,7 +5,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013-2015 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2016 Paul Sokolovsky
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -27,8 +27,8 @@
  * THE SOFTWARE.
  */
 
-#include <stdint.h>
-#include <stdio.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
 
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
@@ -36,15 +36,60 @@
 #include "esp_sleep.h"
 #include "esp_pm.h"
 
-#include "py/obj.h"
-#include "py/runtime.h"
-#include "shared/runtime/pyexec.h"
-#include "drivers/dht/dht.h"
-#include "extmod/modmachine.h"
 #include "modmachine.h"
 #include "machine_rtc.h"
 
-#if MICROPY_PY_MACHINE
+#if MICROPY_HW_ENABLE_SDCARD
+#define MICROPY_PY_MACHINE_SDCARD_ENTRY { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&machine_sdcard_type) },
+#else
+#define MICROPY_PY_MACHINE_SDCARD_ENTRY
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#define MICROPY_PY_MACHINE_TOUCH_PAD_ENTRY { MP_ROM_QSTR(MP_QSTR_TouchPad), MP_ROM_PTR(&machine_touchpad_type) },
+#else
+#define MICROPY_PY_MACHINE_TOUCH_PAD_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) }, \
+    MICROPY_PY_MACHINE_SDCARD_ENTRY \
+    { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, \
+    MICROPY_PY_MACHINE_TOUCH_PAD_ENTRY \
+    { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) }, \
+    \
+    /* wake abilities */ \
+    { MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(MACHINE_WAKE_SLEEP) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(MACHINE_WAKE_DEEPSLEEP) }, \
+    \
+    /* Reset reasons */ \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(MP_HARD_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(MP_PWRON_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(MP_WDT_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(MP_DEEPSLEEP_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(MP_SOFT_RESET) }, \
+    \
+    /* Wake reasons */ \
+    { MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT0) }, \
+    { MP_ROM_QSTR(MP_QSTR_EXT0_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT0) }, \
+    { MP_ROM_QSTR(MP_QSTR_EXT1_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT1) }, \
+    { MP_ROM_QSTR(MP_QSTR_TIMER_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_TIMER) }, \
+    { MP_ROM_QSTR(MP_QSTR_TOUCHPAD_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_TOUCHPAD) }, \
+    { MP_ROM_QSTR(MP_QSTR_ULP_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_ULP) }, \
 
 typedef enum {
     MP_PWRON_RESET = 1,
@@ -231,12 +276,6 @@ STATIC mp_obj_t machine_reset(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_soft_reset(void) {
-    pyexec_system_exit = PYEXEC_FORCED_EXIT;
-    mp_raise_type(&mp_type_SystemExit);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
-
 STATIC mp_obj_t machine_unique_id(void) {
     uint8_t chipid[6];
     esp_efuse_mac_get_default(chipid);
@@ -264,98 +303,3 @@ STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
     return mp_const_none;
 }
 MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
-
-    { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
-
-    #if MICROPY_PY_MACHINE_BITSTREAM
-    { MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) },
-    #endif
-    #if MICROPY_PY_MACHINE_PULSE
-    { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) },
-    #if MICROPY_PY_MACHINE_WDT
-    { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) },
-    #endif
-    #if MICROPY_HW_ENABLE_SDCARD
-    { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&machine_sdcard_type) },
-    #endif
-
-    // wake abilities
-    { MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(MACHINE_WAKE_SLEEP) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(MACHINE_WAKE_DEEPSLEEP) },
-    { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
-    #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
-    { MP_ROM_QSTR(MP_QSTR_TouchPad), MP_ROM_PTR(&machine_touchpad_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_ADC
-    { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_ADC_BLOCK
-    { MP_ROM_QSTR(MP_QSTR_ADCBlock), MP_ROM_PTR(&machine_adc_block_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_DAC
-    { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&machine_dac_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    #if MICROPY_PY_MACHINE_I2S
-    { MP_ROM_QSTR(MP_QSTR_I2S), MP_ROM_PTR(&machine_i2s_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) },
-    { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) },
-    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
-    #if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
-    #endif
-
-    // Reset reasons
-    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
-    { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(MP_HARD_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(MP_PWRON_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(MP_WDT_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(MP_DEEPSLEEP_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(MP_SOFT_RESET) },
-
-    // Wake reasons
-    { MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) },
-    { MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT0) },
-    { MP_ROM_QSTR(MP_QSTR_EXT0_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT0) },
-    { MP_ROM_QSTR(MP_QSTR_EXT1_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT1) },
-    { MP_ROM_QSTR(MP_QSTR_TIMER_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_TIMER) },
-    { MP_ROM_QSTR(MP_QSTR_TOUCHPAD_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_TOUCHPAD) },
-    { MP_ROM_QSTR(MP_QSTR_ULP_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_ULP) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 706baae5b2..8a21cabb7d 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -96,6 +96,7 @@
 #define MICROPY_PY_OS_UNAME                 (1)
 #define MICROPY_PY_OS_URANDOM               (1)
 #define MICROPY_PY_MACHINE                  (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/esp32/modmachine.c"
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/esp32/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH  (1)
@@ -106,6 +107,7 @@
 #define MICROPY_PY_MACHINE_ADC_BLOCK_INCLUDEFILE "ports/esp32/machine_adc_block.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM        (1)
+#define MICROPY_PY_MACHINE_DHT_READINTO     (1)
 #define MICROPY_PY_MACHINE_PULSE            (1)
 #define MICROPY_PY_MACHINE_PWM              (1)
 #define MICROPY_PY_MACHINE_PWM_DUTY         (1)
diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index 88c129952e..4f5c2c36e4 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -110,7 +110,6 @@ SRC_C = \
 	uart.c \
 	esppwm.c \
 	espapa102.c \
-	modmachine.c \
 	machine_bitstream.c \
 	machine_pin.c \
 	machine_rtc.c \
diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c
index 33e0272f80..d0f52ed566 100644
--- a/ports/esp8266/main.c
+++ b/ports/esp8266/main.c
@@ -36,9 +36,6 @@
 #include "py/mphal.h"
 #include "py/gc.h"
 
-// This needs to be defined before any ESP SDK headers are included
-#define USE_US_TIMER 1
-
 #include "extmod/misc.h"
 #include "extmod/modmachine.h"
 #include "shared/readline/readline.h"
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index 3daf5ad876..b15515acd7 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013-2015 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2016 Paul Sokolovsky
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -25,20 +25,10 @@
  * THE SOFTWARE.
  */
 
-#include <stdint.h>
-#include <stdio.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
 
-#include "py/obj.h"
-#include "py/runtime.h"
-#include "shared/runtime/pyexec.h"
-#include "drivers/dht/dht.h"
-
-// This needs to be set before we include the RTOS headers
-#define USE_US_TIMER 1
-
-#include "extmod/modmachine.h"
 #include "modmachine.h"
-
 #include "xtirq.h"
 #include "os_type.h"
 #include "osapi.h"
@@ -46,12 +36,39 @@
 #include "ets_alt_task.h"
 #include "user_interface.h"
 
-#if MICROPY_PY_MACHINE
-
 // #define MACHINE_WAKE_IDLE (0x01)
 // #define MACHINE_WAKE_SLEEP (0x02)
 #define MACHINE_WAKE_DEEPSLEEP (0x04)
 
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&esp_timer_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pyb_pin_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, \
+    \
+    /* wake abilities */ \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(MACHINE_WAKE_DEEPSLEEP) }, \
+    \
+    /* reset causes */ \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(REASON_DEFAULT_RST) }, \
+    { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(REASON_EXT_SYS_RST) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(REASON_DEEP_SLEEP_AWAKE) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(REASON_WDT_RST) }, \
+    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(REASON_SOFT_RESTART) }, \
+
 STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
     if (n_args == 0) {
         // get
@@ -74,12 +91,6 @@ STATIC mp_obj_t machine_reset(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_soft_reset(void) {
-    pyexec_system_exit = PYEXEC_FORCED_EXIT;
-    mp_raise_type(&mp_type_SystemExit);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
-
 STATIC mp_obj_t machine_reset_cause(void) {
     return MP_OBJ_NEW_SMALL_INT(system_get_rst_info()->reason);
 }
@@ -386,74 +397,3 @@ mp_uint_t machine_time_pulse_us(mp_hal_pin_obj_t pin, int pulse_level, mp_uint_t
         }
     }
 }
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
-    { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) },
-    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
-
-    #if MICROPY_PY_MACHINE_BITSTREAM
-    { MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) },
-    #endif
-
-    { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
-    { MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) },
-    { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&esp_timer_type) },
-    #if MICROPY_PY_MACHINE_WDT
-    { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pyb_pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
-    { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) },
-    #if MICROPY_PY_MACHINE_ADC
-    { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_I2C
-    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_SPI
-    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
-    #endif
-
-    // wake abilities
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(MACHINE_WAKE_DEEPSLEEP) },
-
-    // reset causes
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(REASON_DEFAULT_RST) },
-    { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(REASON_EXT_SYS_RST) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(REASON_DEEP_SLEEP_AWAKE) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(REASON_WDT_RST) },
-    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(REASON_SOFT_RESTART) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index 8493814b41..fa9acce6c7 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -1,6 +1,9 @@
 // Options to control how MicroPython is built for this port,
 // overriding defaults in py/mpconfig.h.
 
+// This needs to be defined before any ESP SDK headers are included.
+#define USE_US_TIMER 1
+
 // Board-specific definitions
 #include "mpconfigboard.h"
 
@@ -61,16 +64,17 @@
 #define MICROPY_PY_LWIP             (1)
 #define MICROPY_PY_LWIP_SOCK_RAW    (1)
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE "ports/esp8266/modmachine.c"
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/esp8266/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_READ (1)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM (1)
+#define MICROPY_PY_MACHINE_DHT_READINTO (1)
 #define MICROPY_PY_MACHINE_PULSE    (1)
 #define MICROPY_PY_MACHINE_PWM      (1)
 #define MICROPY_PY_MACHINE_PWM_DUTY (1)
 #define MICROPY_PY_MACHINE_PWM_INCLUDEFILE "ports/esp8266/machine_pwm.c"
-#define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_SOFTI2C  (1)
 #define MICROPY_PY_MACHINE_SPI      (1)
 #define MICROPY_PY_MACHINE_SOFTSPI  (1)
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index bdf66926b6..542382b6fa 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -204,7 +204,6 @@ SRC_C += \
 	mbedtls/mbedtls_port.c \
 	mimxrt_flash.c \
 	mimxrt_sdram.c \
-	modmachine.c \
 	modmimxrt.c \
 	mphalport.c \
 	mpnetworkport.c \
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index 57090bda27..ecd79d2230 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2019 Damien P. George
+ * Copyright (c) 2019-2023 Damien P. George
  * Copyright (c) 2020 Jim Mussared
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -25,10 +25,9 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "drivers/dht/dht.h"
-#include "extmod/modmachine.h"
-#include "shared/runtime/pyexec.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
+
 #include "led.h"
 #include "pin.h"
 #include "modmachine.h"
@@ -43,10 +42,43 @@
 #include "fsl_romapi.h"
 #endif
 
-#if MICROPY_PY_MACHINE
-
 #include CPU_HEADER_H
 
+#if defined(MICROPY_HW_LED1_PIN)
+#define MICROPY_PY_MACHINE_LED_ENTRY { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&machine_led_type) },
+#else
+#define MICROPY_PY_MACHINE_LED_ENTRY
+#endif
+
+#if MICROPY_PY_MACHINE_SDCARD
+#define MICROPY_PY_MACHINE_SDCARD_ENTRY { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&machine_sdcard_type) },
+#else
+#define MICROPY_PY_MACHINE_SDCARD_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
+    MICROPY_PY_MACHINE_LED_ENTRY \
+    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) }, \
+    MICROPY_PY_MACHINE_SDCARD_ENTRY \
+    \
+    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
+    \
+    /* Reset reasons */ \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(MP_PWRON_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(MP_WDT_RESET) }, \
+    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(MP_SOFT_RESET) }, \
+
 typedef enum {
     MP_PWRON_RESET = 1,
     MP_HARD_RESET,
@@ -62,12 +94,6 @@ STATIC mp_obj_t machine_unique_id(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
-STATIC mp_obj_t machine_soft_reset(void) {
-    pyexec_system_exit = PYEXEC_FORCED_EXIT;
-    mp_raise_type(&mp_type_SystemExit);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
-
 STATIC mp_obj_t machine_reset(void) {
     WDOG_TriggerSystemSoftwareReset(WDOG1);
     return mp_const_none;
@@ -168,70 +194,3 @@ NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
     }
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__),            MP_ROM_QSTR(MP_QSTR_machine) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) },
-    { MP_ROM_QSTR(MP_QSTR_soft_reset),          MP_ROM_PTR(&machine_soft_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) },
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem8),                MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16),               MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32),               MP_ROM_PTR(&machine_mem32_obj) },
-    #if defined(MICROPY_HW_LED1_PIN)
-    { MP_ROM_QSTR(MP_QSTR_LED),                 MP_ROM_PTR(&machine_led_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) },
-    #if MICROPY_PY_MACHINE_ADC
-    { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
-    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) },
-    #if MICROPY_PY_MACHINE_SDCARD
-    { MP_ROM_QSTR(MP_QSTR_SDCard),              MP_ROM_PTR(&machine_sdcard_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_PWM),                 MP_ROM_PTR(&machine_pwm_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal),              MP_ROM_PTR(&machine_signal_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftI2C),             MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&machine_i2c_type) },
-    #if MICROPY_PY_MACHINE_I2S
-    { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
-    #if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_WDT
-    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
-    #endif
-
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) },
-
-    #if MICROPY_PY_MACHINE_BITSTREAM
-    { MP_ROM_QSTR(MP_QSTR_bitstream),           MP_ROM_PTR(&machine_bitstream_obj) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_time_pulse_us),       MP_ROM_PTR(&machine_time_pulse_us_obj) },
-    { MP_ROM_QSTR(MP_QSTR_dht_readinto),        MP_ROM_PTR(&dht_readinto_obj) },
-
-    // Reset reasons
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(MP_PWRON_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(MP_WDT_RESET) },
-    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(MP_SOFT_RESET) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index 01502d5472..f831dee364 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -78,10 +78,12 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_OS_URANDOM               (1)
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC    (trng_random_u32())
 #define MICROPY_PY_MACHINE                  (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/mimxrt/modmachine.c"
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/mimxrt/machine_adc.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM        (1)
+#define MICROPY_PY_MACHINE_DHT_READINTO     (1)
 #define MICROPY_PY_MACHINE_PULSE            (1)
 #define MICROPY_PY_MACHINE_PWM              (1)
 #define MICROPY_PY_MACHINE_PWM_INCLUDEFILE  "ports/mimxrt/machine_pwm.c"
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index d0ecddd615..0a57471849 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -318,7 +318,6 @@ SRC_C += $(addprefix lib/tinyusb/src/,\
 endif
 
 DRIVERS_SRC_C += $(addprefix modules/,\
-	machine/modmachine.c \
 	machine/spi.c \
 	machine/i2c.c \
 	machine/pin.c \
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index 0bacc24eea..b5d078ae51 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013-2015 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2016 Glenn Ruben Bakke
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -24,14 +24,15 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
+
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
+
 #include <stdio.h>
 
 #include "modmachine.h"
 #include "py/gc.h"
-#include "py/runtime.h"
 #include "py/mphal.h"
-#include "extmod/modmachine.h"
-#include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
 #include "lib/oofatfs/diskio.h"
 #include "gccollect.h"
@@ -49,8 +50,6 @@
 #include "rtcounter.h"
 #endif
 
-#if MICROPY_PY_MACHINE
-
 #define PYB_RESET_HARD      (0)
 #define PYB_RESET_WDT       (1)
 #define PYB_RESET_SOFT      (2)
@@ -60,6 +59,55 @@
 #define PYB_RESET_DIF       (18)
 #define PYB_RESET_NFC       (19)
 
+#if MICROPY_PY_MACHINE_RTCOUNTER
+#define MICROPY_PY_MACHINE_RTCOUNTER_ENTRY { MP_ROM_QSTR(MP_QSTR_RTCounter), MP_ROM_PTR(&machine_rtcounter_type) },
+#else
+#define MICROPY_PY_MACHINE_RTCOUNTER_ENTRY
+#endif
+
+#if MICROPY_PY_MACHINE_TIMER_NRF
+#define MICROPY_PY_MACHINE_TIMER_ENTRY { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) },
+#else
+#define MICROPY_PY_MACHINE_TIMER_ENTRY
+#endif
+
+#if MICROPY_PY_MACHINE_TEMP
+#define MICROPY_PY_MACHINE_TEMP_ENTRY { MP_ROM_QSTR(MP_QSTR_Temp), MP_ROM_PTR(&machine_temp_type) },
+#else
+#define MICROPY_PY_MACHINE_TEMP_ENTRY
+#endif
+
+#if defined(NRF52_SERIES)
+#define MICROPY_PY_MACHINE_NFC_RESET_ENTRY { MP_ROM_QSTR(MP_QSTR_NFC_RESET), MP_ROM_INT(PYB_RESET_NFC) },
+#else
+#define MICROPY_PY_MACHINE_NFC_RESET_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_info),               MP_ROM_PTR(&machine_info_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset),              MP_ROM_PTR(&machine_reset_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_bootloader),         MP_ROM_PTR(&machine_bootloader_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq),         MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq),        MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_idle),               MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_sleep),              MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_lightsleep),         MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep),          MP_ROM_PTR(&machine_deepsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause),        MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_Pin),                MP_ROM_PTR(&pin_type) }, \
+    \
+    MICROPY_PY_MACHINE_RTCOUNTER_ENTRY \
+    MICROPY_PY_MACHINE_TIMER_ENTRY \
+    MICROPY_PY_MACHINE_TEMP_ENTRY \
+    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),         MP_ROM_INT(PYB_RESET_HARD) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),          MP_ROM_INT(PYB_RESET_WDT) }, \
+    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),         MP_ROM_INT(PYB_RESET_SOFT) }, \
+    { MP_ROM_QSTR(MP_QSTR_LOCKUP_RESET),       MP_ROM_INT(PYB_RESET_LOCKUP) }, \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),        MP_ROM_INT(PYB_RESET_POWER_ON) }, \
+    { MP_ROM_QSTR(MP_QSTR_LPCOMP_RESET),       MP_ROM_INT(PYB_RESET_LPCOMP) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEBUG_IF_RESET),     MP_ROM_INT(PYB_RESET_DIF) }, \
+    MICROPY_PY_MACHINE_NFC_RESET_ENTRY \
+
 STATIC uint32_t reset_cause;
 
 void machine_init(void) {
@@ -141,12 +189,6 @@ STATIC mp_obj_t machine_reset(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_soft_reset(void) {
-    pyexec_system_exit = PYEXEC_FORCED_EXIT;
-    mp_raise_type(&mp_type_SystemExit);
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
-
 NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
     for (;;) {
@@ -197,69 +239,3 @@ STATIC mp_obj_t machine_disable_irq(void) {
     return mp_const_none;
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__),           MP_ROM_QSTR(MP_QSTR_machine) },
-    { MP_ROM_QSTR(MP_QSTR_info),               MP_ROM_PTR(&machine_info_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset),              MP_ROM_PTR(&machine_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_soft_reset),         MP_ROM_PTR(&machine_soft_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_bootloader),         MP_ROM_PTR(&machine_bootloader_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),         MP_ROM_PTR(&machine_enable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),        MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_idle),               MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sleep),              MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),         MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),          MP_ROM_PTR(&machine_deepsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),        MP_ROM_PTR(&machine_reset_cause_obj) },
-    { MP_ROM_QSTR(MP_QSTR_Pin),                MP_ROM_PTR(&pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_mem8),               MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16),              MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32),              MP_ROM_PTR(&machine_mem32_obj) },
-    
-#if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART),               MP_ROM_PTR(&machine_uart_type) },
-#endif
-#if MICROPY_PY_MACHINE_SPI
-    { MP_ROM_QSTR(MP_QSTR_SPI),                MP_ROM_PTR(&machine_spi_type) },
-#endif
-#if MICROPY_PY_MACHINE_I2C
-    { MP_ROM_QSTR(MP_QSTR_I2C),                MP_ROM_PTR(&machine_i2c_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftI2C),            MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-#endif
-#if MICROPY_PY_MACHINE_ADC
-    { MP_ROM_QSTR(MP_QSTR_ADC),                MP_ROM_PTR(&machine_adc_type) },
-#endif
-#if MICROPY_PY_MACHINE_RTCOUNTER
-    { MP_ROM_QSTR(MP_QSTR_RTCounter),          MP_ROM_PTR(&machine_rtcounter_type) },
-#endif
-#if MICROPY_PY_MACHINE_TIMER_NRF
-    { MP_ROM_QSTR(MP_QSTR_Timer),              MP_ROM_PTR(&machine_timer_type) },
-#endif
-#if MICROPY_PY_MACHINE_HW_PWM || MICROPY_PY_MACHINE_SOFT_PWM
-    { MP_ROM_QSTR(MP_QSTR_PWM),                MP_ROM_PTR(&machine_pwm_type) },
-#endif
-#if MICROPY_PY_MACHINE_TEMP
-    { MP_ROM_QSTR(MP_QSTR_Temp),               MP_ROM_PTR(&machine_temp_type) },
-#endif
-    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),         MP_ROM_INT(PYB_RESET_HARD) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),          MP_ROM_INT(PYB_RESET_WDT) },
-    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),         MP_ROM_INT(PYB_RESET_SOFT) },
-    { MP_ROM_QSTR(MP_QSTR_LOCKUP_RESET),       MP_ROM_INT(PYB_RESET_LOCKUP) },
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),        MP_ROM_INT(PYB_RESET_POWER_ON) },
-    { MP_ROM_QSTR(MP_QSTR_LPCOMP_RESET),       MP_ROM_INT(PYB_RESET_LPCOMP) },
-    { MP_ROM_QSTR(MP_QSTR_DEBUG_IF_RESET),     MP_ROM_INT(PYB_RESET_DIF) },
-#if defined(NRF52_SERIES)
-    { MP_ROM_QSTR(MP_QSTR_NFC_RESET),          MP_ROM_INT(PYB_RESET_NFC) },
-#endif
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t*)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index e18e55fb31..f3e71f675d 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -159,6 +159,7 @@
 #define MICROPY_PY_RANDOM_EXTRA_FUNCS (1)
 #define MICROPY_PY_TIME             (1)
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE "ports/nrf/modules/machine/modmachine.c"
 #define MICROPY_PY_MACHINE_PULSE    (0)
 #define MICROPY_PY_MACHINE_SOFTI2C  (MICROPY_PY_MACHINE_I2C)
 
diff --git a/ports/qemu-arm/Makefile b/ports/qemu-arm/Makefile
index 599caf0266..9b5cfc4af0 100644
--- a/ports/qemu-arm/Makefile
+++ b/ports/qemu-arm/Makefile
@@ -78,7 +78,6 @@ LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
 SRC_COMMON_C = \
 	startup.c \
 	uart.c \
-	modmachine.c \
 	shared/libc/string0.c \
 	shared/runtime/sys_stdio_mphal.c \
 
diff --git a/ports/qemu-arm/modmachine.c b/ports/qemu-arm/modmachine.c
index 8a22fe2bd8..1134ab4103 100644
--- a/ports/qemu-arm/modmachine.c
+++ b/ports/qemu-arm/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2017 Damien P. George
+ * Copyright (c) 2017-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,28 +24,11 @@
  * THE SOFTWARE.
  */
 
-#include "extmod/modmachine.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
 
-#if MICROPY_PY_MACHINE
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) }, \
 
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
-
-    { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
+// This variable is needed for machine.soft_reset(), but the variable is otherwise unused.
+int pyexec_system_exit = 0;
diff --git a/ports/qemu-arm/mpconfigport.h b/ports/qemu-arm/mpconfigport.h
index 4341fba58f..36ce2db848 100644
--- a/ports/qemu-arm/mpconfigport.h
+++ b/ports/qemu-arm/mpconfigport.h
@@ -47,6 +47,7 @@
 #define MICROPY_PY_HEAPQ            (1)
 #define MICROPY_PY_HASHLIB          (1)
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE "ports/qemu-arm/modmachine.c"
 #define MICROPY_PY_MICROPYTHON_MEM_INFO (1)
 #define MICROPY_USE_INTERNAL_PRINTF (1)
 #define MICROPY_VFS                 (1)
diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index 6d6eeb7dbf..3512e4a94d 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -324,7 +324,6 @@ SRC_C += \
 	machine_pin.c \
 	machine_rtc.c \
 	machine_sdcard.c \
-	modmachine.c \
 	extint.c \
 	usrsw.c \
 	flash.c \
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index c8edf61268..4617f0af0c 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013-2015 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2021,2022 Renesas Electronics Corporation
  * Copyright (c) 2023 Vekatech Ltd.
  *
@@ -26,21 +26,17 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
 
 #include "modmachine.h"
 #include "py/gc.h"
-#include "py/runtime.h"
 #include "py/objstr.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
-#include "extmod/modmachine.h"
-#include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
 #include "extmod/vfs.h"
 #include "extmod/vfs_fat.h"
-#include "drivers/dht/dht.h"
 #include "gccollect.h"
 #include "irq.h"
 #include "powerctrl.h"
@@ -53,14 +49,44 @@
 #include "spi.h"
 #include "uart.h"
 
-#if MICROPY_PY_MACHINE
-
 #define PYB_RESET_SOFT      (0)
 #define PYB_RESET_POWER_ON  (1)
 #define PYB_RESET_HARD      (2)
 #define PYB_RESET_WDT       (3)
 #define PYB_RESET_DEEPSLEEP (4)
 
+#if MICROPY_HW_HAS_SDHI_CARD
+#define MICROPY_PY_MACHINE_SDCARD_ENTRY { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&machine_sdcard_type) },
+#else
+#define MICROPY_PY_MACHINE_SDCARD_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
+    MICROPY_PY_MACHINE_SDCARD_ENTRY \
+    \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(PYB_RESET_POWER_ON) }, \
+    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),          MP_ROM_INT(PYB_RESET_HARD) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(PYB_RESET_WDT) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET),     MP_ROM_INT(PYB_RESET_DEEPSLEEP) }, \
+    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(PYB_RESET_SOFT) }, \
+
 STATIC uint32_t reset_cause;
 
 void get_unique_id(uint8_t *id) {
@@ -173,12 +199,6 @@ STATIC mp_obj_t machine_reset(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_soft_reset(void) {
-    pyexec_system_exit = PYEXEC_FORCED_EXIT;
-    mp_raise_type(&mp_type_SystemExit);
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
-
 // Activate the bootloader without BOOT* pins.
 NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if MICROPY_HW_ENABLE_STORAGE
@@ -246,79 +266,3 @@ STATIC mp_obj_t machine_reset_cause(void) {
     return MP_OBJ_NEW_SMALL_INT(reset_cause);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__),            MP_ROM_QSTR(MP_QSTR_machine) },
-    { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_soft_reset),          MP_ROM_PTR(&machine_soft_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) },
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) },
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) },
-
-    #if MICROPY_PY_MACHINE_PULSE
-    { MP_ROM_QSTR(MP_QSTR_time_pulse_us),       MP_ROM_PTR(&machine_time_pulse_us_obj) },
-    #endif
-
-    { MP_ROM_QSTR(MP_QSTR_mem8),                MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16),               MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32),               MP_ROM_PTR(&machine_mem32_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal),              MP_ROM_PTR(&machine_signal_type) },
-
-    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) },
-    #if MICROPY_PY_MACHINE_ADC
-    { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_DAC
-    { MP_ROM_QSTR(MP_QSTR_DAC),                 MP_ROM_PTR(&machine_dac_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_I2C
-    #if MICROPY_HW_ENABLE_HW_I2C
-    { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&machine_i2c_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_SoftI2C),             MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_SPI
-    { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
-    #if MICROPY_PY_MACHINE_PWM
-    #if MICROPY_HW_ENABLE_HW_PWM
-    { MP_ROM_QSTR(MP_QSTR_PWM),                 MP_ROM_PTR(&machine_pwm_type) },
-    #endif
-    #endif
-    #if MICROPY_HW_HAS_SDHI_CARD
-    { MP_ROM_QSTR(MP_QSTR_SDCard),              MP_ROM_PTR(&machine_sdcard_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(PYB_RESET_POWER_ON) },
-    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),          MP_ROM_INT(PYB_RESET_HARD) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(PYB_RESET_WDT) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET),     MP_ROM_INT(PYB_RESET_DEEPSLEEP) },
-    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(PYB_RESET_SOFT) },
-
-    { MP_ROM_QSTR(MP_QSTR_dht_readinto),        MP_ROM_PTR(&dht_readinto_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/renesas-ra/mpconfigport.h b/ports/renesas-ra/mpconfigport.h
index 94e07b3391..7fdb363883 100644
--- a/ports/renesas-ra/mpconfigport.h
+++ b/ports/renesas-ra/mpconfigport.h
@@ -130,12 +130,11 @@
 #define MICROPY_PY_LWIP_SOCK_RAW    (MICROPY_PY_LWIP)
 #ifndef MICROPY_PY_MACHINE
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE "ports/renesas-ra/modmachine.c"
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/renesas-ra/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_READ (1)
-#ifndef MICROPY_PY_MACHINE_BITSTREAM
-#define MICROPY_PY_MACHINE_BITSTREAM (1)
-#endif
+#define MICROPY_PY_MACHINE_DHT_READINTO (1)
 #define MICROPY_PY_MACHINE_PULSE    (1)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
 #define MICROPY_PY_MACHINE_SOFTI2C  (1)
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 0f8c6d8e88..dcf1328724 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -125,7 +125,6 @@ set(MICROPY_SOURCE_PORT
     machine_spi.c
     machine_timer.c
     main.c
-    modmachine.c
     modrp2.c
     mphalport.c
     mpnetworkport.c
@@ -153,7 +152,6 @@ set(MICROPY_SOURCE_QSTR
     ${MICROPY_PORT_DIR}/machine_timer.c
     ${MICROPY_PORT_DIR}/machine_uart.c
     ${MICROPY_PORT_DIR}/machine_wdt.c
-    ${MICROPY_PORT_DIR}/modmachine.c
     ${MICROPY_PORT_DIR}/modrp2.c
     ${MICROPY_PORT_DIR}/modos.c
     ${MICROPY_PORT_DIR}/rp2_flash.c
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 4c428cbddf..6ec2811f98 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2020-2021 Damien P. George
+ * Copyright (c) 2020-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,12 +24,10 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "py/mphal.h"
-#include "drivers/dht/dht.h"
-#include "shared/runtime/pyexec.h"
-#include "extmod/modmachine.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
 
+#include "py/mphal.h"
 #include "modmachine.h"
 #include "uart.h"
 #include "hardware/clocks.h"
@@ -46,11 +44,30 @@
 #include "lib/cyw43-driver/src/cyw43.h"
 #endif
 
-#if MICROPY_PY_MACHINE
-
 #define RP2_RESET_PWRON (1)
 #define RP2_RESET_WDT (3)
 
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(RP2_RESET_PWRON) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(RP2_RESET_WDT) }, \
+
 STATIC mp_obj_t machine_unique_id(void) {
     pico_unique_board_id_t id;
     pico_get_unique_board_id(&id);
@@ -58,12 +75,6 @@ STATIC mp_obj_t machine_unique_id(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
-STATIC mp_obj_t machine_soft_reset(void) {
-    pyexec_system_exit = PYEXEC_FORCED_EXIT;
-    mp_raise_type(&mp_type_SystemExit);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
-
 STATIC mp_obj_t machine_reset(void) {
     watchdog_reboot(0, SRAM_END, 0);
     for (;;) {
@@ -221,63 +232,3 @@ STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
     return mp_const_none;
 }
 MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__),            MP_ROM_QSTR(MP_QSTR_machine) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) },
-    { MP_ROM_QSTR(MP_QSTR_soft_reset),          MP_ROM_PTR(&machine_soft_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) },
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) },
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) },
-
-    #if MICROPY_PY_MACHINE_BITSTREAM
-    { MP_ROM_QSTR(MP_QSTR_bitstream),           MP_ROM_PTR(&machine_bitstream_obj) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_time_pulse_us),       MP_ROM_PTR(&machine_time_pulse_us_obj) },
-    { MP_ROM_QSTR(MP_QSTR_dht_readinto),        MP_ROM_PTR(&dht_readinto_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_mem8),                MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16),               MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32),               MP_ROM_PTR(&machine_mem32_obj) },
-
-    #if MICROPY_PY_MACHINE_ADC
-    { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&machine_i2c_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftI2C),             MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
-    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_PWM),                 MP_ROM_PTR(&machine_pwm_type) },
-    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal),              MP_ROM_PTR(&machine_signal_type) },
-    { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
-    #if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_WDT
-    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
-    #endif
-
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(RP2_RESET_PWRON) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(RP2_RESET_WDT) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index 61749f108a..f197d36cc4 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -111,10 +111,12 @@
 #define MICROPY_PY_TIME_INCLUDEFILE             "ports/rp2/modtime.c"
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC        (rosc_random_u32())
 #define MICROPY_PY_MACHINE                      (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE          "ports/rp2/modmachine.c"
 #define MICROPY_PY_MACHINE_ADC                  (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE      "ports/rp2/machine_adc.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW         mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM            (1)
+#define MICROPY_PY_MACHINE_DHT_READINTO         (1)
 #define MICROPY_PY_MACHINE_PULSE                (1)
 #define MICROPY_PY_MACHINE_PWM                  (1)
 #define MICROPY_PY_MACHINE_PWM_INCLUDEFILE      "ports/rp2/machine_pwm.c"
diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index 95d0f3bd18..f6409d17e8 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -108,7 +108,6 @@ SRC_C += \
 	machine_rtc.c \
 	machine_spi.c \
 	main.c \
-	modmachine.c \
 	modsamd.c \
 	mphalport.c \
 	pendsv.c \
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 8c4808075e..9b2e88ba60 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2019 Damien P. George
+ * Copyright (c) 2019-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,10 +24,9 @@
  * THE SOFTWARE.
  */
 
-#include "py/runtime.h"
-#include "extmod/modmachine.h"
-#include "drivers/dht/dht.h"
-#include "shared/runtime/pyexec.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
+
 #include "modmachine.h"
 #include "samd_soc.h"
 
@@ -37,7 +36,6 @@
 #include "hpl_gclk_base.h"
 #include "hpl_pm_base.h"
 
-#if MICROPY_PY_MACHINE
 #if defined(MCU_SAMD21)
 #define DBL_TAP_ADDR    ((volatile uint32_t *)(HMCRAMC0_ADDR + HMCRAMC0_SIZE - 4))
 #elif defined(MCU_SAMD51)
@@ -50,15 +48,41 @@
 
 #define LIGHTSLEEP_CPU_FREQ 200000
 
+#if MICROPY_PY_MACHINE_RTC
+#define MICROPY_PY_MACHINE_RTC_ENTRY { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) },
+#else
+#define MICROPY_PY_MACHINE_RTC_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
+    MICROPY_PY_MACHINE_RTC_ENTRY \
+    \
+    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    \
+    /* Class constants. */ \
+    /* Use numerical constants instead of the symbolic names, */ \
+    /* since the names differ between SAMD21 and SAMD51. */ \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(0x01) }, \
+    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),          MP_ROM_INT(0x10) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(0x20) }, \
+    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(0x40) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET),     MP_ROM_INT(0x80) }, \
+
 extern bool EIC_occured;
 extern uint32_t _dbl_tap_addr;
 
-STATIC mp_obj_t machine_soft_reset(void) {
-    pyexec_system_exit = PYEXEC_FORCED_EXIT;
-    mp_raise_type(&mp_type_SystemExit);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
-
 STATIC mp_obj_t machine_reset(void) {
     *DBL_TAP_ADDR = DBL_TAP_MAGIC_RESET;
     #ifdef DBL_TAP_ADDR_ALT
@@ -181,83 +205,3 @@ STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__),            MP_ROM_QSTR(MP_QSTR_machine) },
-    { MP_ROM_QSTR(MP_QSTR_soft_reset),          MP_ROM_PTR(&machine_soft_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) },
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem8),                MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16),               MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32),               MP_ROM_PTR(&machine_mem32_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) },
-
-    #if MICROPY_PY_MACHINE_ADC
-    { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_DAC
-    { MP_ROM_QSTR(MP_QSTR_DAC),                 MP_ROM_PTR(&machine_dac_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal),              MP_ROM_PTR(&machine_signal_type) },
-    #if MICROPY_PY_MACHINE_PWM
-    { MP_ROM_QSTR(MP_QSTR_PWM),                 MP_ROM_PTR(&machine_pwm_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_SOFTI2C
-    { MP_ROM_QSTR(MP_QSTR_SoftI2C),             MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_I2C
-    { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&machine_i2c_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_SOFTSPI
-    { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_SPI
-    { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
-    #if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_WDT
-    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_RTC
-    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) },
-    #endif
-
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) },
-    #if MICROPY_PY_MACHINE_PULSE
-    { MP_ROM_QSTR(MP_QSTR_time_pulse_us),       MP_ROM_PTR(&machine_time_pulse_us_obj) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_lightsleep_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_bitstream),           MP_ROM_PTR(&machine_bitstream_obj) },
-    #if MICROPY_PY_MACHINE_DHT_READINTO
-    { MP_ROM_QSTR(MP_QSTR_dht_readinto),        MP_ROM_PTR(&dht_readinto_obj) },
-    #endif
-
-    // Class constants.
-    // Use numerical constants instead of the symbolic names,
-    // since the names differ between SAMD21 and SAMD51.
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(0x01) },
-    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),          MP_ROM_INT(0x10) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(0x20) },
-    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(0x40) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET),     MP_ROM_INT(0x80) },
-};
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 3684457b48..bef705e50f 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -93,6 +93,7 @@
 #define MICROPY_PY_TIME_TIME_TIME_NS        (1)
 #define MICROPY_PY_TIME_INCLUDEFILE         "ports/samd/modtime.c"
 #define MICROPY_PY_MACHINE                  (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/samd/modmachine.c"
 #define MICROPY_PY_OS                       (1)
 #define MICROPY_PY_OS_INCLUDEFILE           "ports/samd/modos.c"
 #define MICROPY_READER_VFS                  (1)
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index 56b5a1020c..0bae26f2f1 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -331,7 +331,6 @@ SRC_C += \
 	machine_bitstream.c \
 	machine_i2c.c \
 	machine_spi.c \
-	modmachine.c \
 	modpyb.c \
 	modstm.c \
 	network_lan.c \
@@ -677,7 +676,7 @@ $(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_
 	    --output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR) \
 		--output-af-const $(GEN_PINS_AF_CONST) --output-af-defs $(GEN_PINS_AF_DEFS)
 
-modmachine.c: $(GEN_PLLFREQTABLE_HDR)
+powerctrl.c: $(GEN_PLLFREQTABLE_HDR)
 $(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
 	$(Q)$(PYTHON) $(PLLVALUES) -c -m $(CMSIS_MCU_LOWER) file:$(BOARD_DIR)/stm32$(MCU_SERIES)xx_hal_conf.h > $@
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 67fcffb0f1..fcdab9dfc1 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013-2015 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,16 +24,13 @@
  * THE SOFTWARE.
  */
 
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
 
+#include <string.h>
 #include "modmachine.h"
 #include "py/gc.h"
-#include "py/runtime.h"
 #include "py/mperrno.h"
-#include "py/mphal.h"
-#include "drivers/dht/dht.h"
-#include "extmod/modmachine.h"
-#include "shared/runtime/pyexec.h"
 #include "lib/oofatfs/ff.h"
 #include "extmod/vfs.h"
 #include "extmod/vfs_fat.h"
@@ -50,7 +47,6 @@
 #include "rtc.h"
 #include "i2c.h"
 #include "spi.h"
-#include "uart.h"
 
 #if defined(STM32G0)
 // G0 has BOR and POR combined
@@ -93,6 +89,39 @@
 #define PYB_RESET_WDT       (3)
 #define PYB_RESET_DEEPSLEEP (4)
 
+#if MICROPY_HW_ENABLE_RNG
+#define MICROPY_PY_MACHINE_RNG_ENTRY { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) },
+#else
+#define MICROPY_PY_MACHINE_RNG_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
+    MICROPY_PY_MACHINE_RNG_ENTRY \
+    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&pin_type) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&pyb_rtc_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
+    \
+    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(PYB_RESET_POWER_ON) }, \
+    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),          MP_ROM_INT(PYB_RESET_HARD) }, \
+    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(PYB_RESET_WDT) }, \
+    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET),     MP_ROM_INT(PYB_RESET_DEEPSLEEP) }, \
+    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(PYB_RESET_SOFT) }, \
+
 STATIC uint32_t reset_cause;
 
 void machine_init(void) {
@@ -269,12 +298,6 @@ STATIC mp_obj_t machine_reset(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_soft_reset(void) {
-    pyexec_system_exit = PYEXEC_FORCED_EXIT;
-    mp_raise_type(&mp_type_SystemExit);
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
-
 // Activate the bootloader without BOOT* pins.
 NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if MICROPY_HW_ENABLE_USB
@@ -388,101 +411,3 @@ STATIC mp_obj_t machine_reset_cause(void) {
     return MP_OBJ_NEW_SMALL_INT(reset_cause);
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
-
-#if MICROPY_PY_MACHINE
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__),            MP_ROM_QSTR(MP_QSTR_machine) },
-    { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_soft_reset),          MP_ROM_PTR(&machine_soft_reset_obj) },
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) },
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) },
-    #if MICROPY_HW_ENABLE_RNG
-    { MP_ROM_QSTR(MP_QSTR_rng),                 MP_ROM_PTR(&pyb_rng_get_obj) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) },
-    { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) },
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) },
-    #if 0
-    { MP_ROM_QSTR(MP_QSTR_wake_reason),         MP_ROM_PTR(&machine_wake_reason_obj) },
-    #endif
-
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) },
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) },
-
-    #if MICROPY_PY_MACHINE_BITSTREAM
-    { MP_ROM_QSTR(MP_QSTR_bitstream),           MP_ROM_PTR(&machine_bitstream_obj) },
-    #endif
-    #if MICROPY_PY_MACHINE_PULSE
-    { MP_ROM_QSTR(MP_QSTR_time_pulse_us),       MP_ROM_PTR(&machine_time_pulse_us_obj) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_dht_readinto),        MP_ROM_PTR(&dht_readinto_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_mem8),                MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16),               MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32),               MP_ROM_PTR(&machine_mem32_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal),              MP_ROM_PTR(&machine_signal_type) },
-
-    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&pyb_rtc_type) },
-    #if MICROPY_PY_MACHINE_ADC
-    { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&machine_adc_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_I2C
-    #if MICROPY_HW_ENABLE_HW_I2C
-    { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&machine_i2c_type) },
-    #else
-    { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_SoftI2C),             MP_ROM_PTR(&mp_machine_soft_i2c_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_SPI
-    { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
-    { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_I2S
-    { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_WDT
-    { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) },
-    #if 0
-    { MP_ROM_QSTR(MP_QSTR_HeartBeat),           MP_ROM_PTR(&pyb_heartbeat_type) },
-    { MP_ROM_QSTR(MP_QSTR_SD),                  MP_ROM_PTR(&pyb_sd_type) },
-
-    // class constants
-    { MP_ROM_QSTR(MP_QSTR_IDLE),                MP_ROM_INT(PYB_PWR_MODE_ACTIVE) },
-    { MP_ROM_QSTR(MP_QSTR_SLEEP),               MP_ROM_INT(PYB_PWR_MODE_LPDS) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP),           MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(PYB_RESET_POWER_ON) },
-    { MP_ROM_QSTR(MP_QSTR_HARD_RESET),          MP_ROM_INT(PYB_RESET_HARD) },
-    { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(PYB_RESET_WDT) },
-    { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET),     MP_ROM_INT(PYB_RESET_DEEPSLEEP) },
-    { MP_ROM_QSTR(MP_QSTR_SOFT_RESET),          MP_ROM_INT(PYB_RESET_SOFT) },
-    #if 0
-    { MP_ROM_QSTR(MP_QSTR_WLAN_WAKE),           MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) },
-    { MP_ROM_QSTR(MP_QSTR_PIN_WAKE),            MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) },
-    { MP_ROM_QSTR(MP_QSTR_RTC_WAKE),            MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) },
-    #endif
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index e5bcf4d701..d9056ec339 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -110,11 +110,13 @@
 #define MICROPY_PY_LWIP_SOCK_RAW    (MICROPY_PY_LWIP)
 #ifndef MICROPY_PY_MACHINE
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE "ports/stm32/modmachine.c"
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/stm32/machine_adc.c"
 #ifndef MICROPY_PY_MACHINE_BITSTREAM
 #define MICROPY_PY_MACHINE_BITSTREAM (1)
 #endif
+#define MICROPY_PY_MACHINE_DHT_READINTO (1)
 #define MICROPY_PY_MACHINE_PULSE    (1)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
 #define MICROPY_PY_MACHINE_I2C      (MICROPY_HW_ENABLE_HW_I2C)
diff --git a/ports/unix/Makefile b/ports/unix/Makefile
index 9f5e01a5ff..d5bd6d4098 100644
--- a/ports/unix/Makefile
+++ b/ports/unix/Makefile
@@ -200,7 +200,6 @@ SRC_C += \
 	unix_mphal.c \
 	mpthreadport.c \
 	input.c \
-	modmachine.c \
 	alloc.c \
 	fatfs_port.c \
 	mpbthciport.c \
diff --git a/ports/unix/modmachine.c b/ports/unix/modmachine.c
index d0c6a43bf8..91e3e61340 100644
--- a/ports/unix/modmachine.c
+++ b/ports/unix/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013, 2014 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2015 Paul Sokolovsky
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -25,13 +25,8 @@
  * THE SOFTWARE.
  */
 
-#include <stdio.h>
-#include <stdint.h>
-
-#include "py/runtime.h"
-#include "py/obj.h"
-
-#include "extmod/modmachine.h"
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
 
 #if MICROPY_PLAT_DEV_MEM
 #include <errno.h>
@@ -41,7 +36,18 @@
 #define MICROPY_PAGE_MASK (MICROPY_PAGE_SIZE - 1)
 #endif
 
-#if MICROPY_PY_MACHINE
+#ifdef MICROPY_UNIX_MACHINE_IDLE
+#define MICROPY_PY_MACHINE_IDLE_ENTRY { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
+#else
+#define MICROPY_PY_MACHINE_IDLE_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    MICROPY_PY_MACHINE_IDLE_ENTRY \
+    { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) }, \
+
+// This variable is needed for machine.soft_reset(), but the variable is otherwise unused.
+int pyexec_system_exit = 0;
 
 uintptr_t mod_machine_mem_get_addr(mp_obj_t addr_o, uint align) {
     uintptr_t addr = mp_obj_get_int_truncated(addr_o);
@@ -81,32 +87,3 @@ STATIC mp_obj_t machine_idle(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 #endif
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
-
-    { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
-
-    #ifdef MICROPY_UNIX_MACHINE_IDLE
-    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
-    #endif
-
-    { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
-    #if MICROPY_PY_MACHINE_PULSE
-    { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
-    #endif
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/unix/mpconfigport.h b/ports/unix/mpconfigport.h
index 2de05a0a6c..dfb99d51b1 100644
--- a/ports/unix/mpconfigport.h
+++ b/ports/unix/mpconfigport.h
@@ -134,6 +134,9 @@ typedef long mp_off_t;
 #define MICROPY_STACKLESS_STRICT    (0)
 #endif
 
+// Implementation of the machine module.
+#define MICROPY_PY_MACHINE_INCLUDEFILE "ports/unix/modmachine.c"
+
 // Unix-specific configuration of machine.mem*.
 #define MICROPY_MACHINE_MEM_GET_READ_ADDR   mod_machine_mem_get_addr
 #define MICROPY_MACHINE_MEM_GET_WRITE_ADDR  mod_machine_mem_get_addr
diff --git a/ports/windows/Makefile b/ports/windows/Makefile
index 2215ce38d1..94bd3f99f9 100644
--- a/ports/windows/Makefile
+++ b/ports/windows/Makefile
@@ -56,7 +56,6 @@ SRC_C = \
 	shared/runtime/gchelper_generic.c \
 	ports/unix/main.c \
 	ports/unix/input.c \
-	ports/unix/modmachine.c \
 	ports/unix/gccollect.c \
 	windows_mphal.c \
 	realpath.c \
diff --git a/ports/windows/micropython.vcxproj b/ports/windows/micropython.vcxproj
index d5affd9e23..9326f3f4cd 100644
--- a/ports/windows/micropython.vcxproj
+++ b/ports/windows/micropython.vcxproj
@@ -94,7 +94,6 @@
     <ClCompile Include="$(PyBaseDir)ports\unix\gccollect.c"/>
     <ClCompile Include="$(PyBaseDir)ports\unix\input.c"/>
     <ClCompile Include="$(PyBaseDir)ports\unix\main.c"/>
-    <ClCompile Include="$(PyBaseDir)ports\unix\modmachine.c" />
     <ClCompile Include="$(PyVariantDir)*.c" />
   </ItemGroup>
   <ItemGroup>
diff --git a/ports/windows/mpconfigport.h b/ports/windows/mpconfigport.h
index de209423dd..9dce520c28 100644
--- a/ports/windows/mpconfigport.h
+++ b/ports/windows/mpconfigport.h
@@ -154,6 +154,7 @@
 #define MICROPY_PY_BINASCII_CRC32   (1)
 #define MICROPY_PY_RANDOM           (1)
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE "ports/unix/modmachine.c"
 #define MICROPY_PY_MACHINE_PULSE    (1)
 #define MICROPY_MACHINE_MEM_GET_READ_ADDR   mod_machine_mem_get_addr
 #define MICROPY_MACHINE_MEM_GET_WRITE_ADDR  mod_machine_mem_get_addr
diff --git a/ports/windows/msvc/sources.props b/ports/windows/msvc/sources.props
index 53c4fdddfd..f7c4c6bcac 100644
--- a/ports/windows/msvc/sources.props
+++ b/ports/windows/msvc/sources.props
@@ -14,6 +14,7 @@
     <PyExtModSource Include="$(PyBaseDir)extmod\modhashlib.c" />
     <PyExtModSource Include="$(PyBaseDir)extmod\modheapq.c" />
     <PyExtModSource Include="$(PyBaseDir)extmod\modjson.c" />
+    <PyExtModSource Include="$(PyBaseDir)extmod\modmachine.c" />
     <PyExtModSource Include="$(PyBaseDir)extmod\modos.c" />
     <PyExtModSource Include="$(PyBaseDir)extmod\modrandom.c" />
     <PyExtModSource Include="$(PyBaseDir)extmod\modre.c" />
diff --git a/ports/zephyr/CMakeLists.txt b/ports/zephyr/CMakeLists.txt
index 8834aae96f..743907e623 100644
--- a/ports/zephyr/CMakeLists.txt
+++ b/ports/zephyr/CMakeLists.txt
@@ -41,7 +41,6 @@ set(MICROPY_SOURCE_PORT
     machine_spi.c
     machine_pin.c
     modbluetooth_zephyr.c
-    modmachine.c
     modsocket.c
     modzephyr.c
     modzsensor.c
diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c
index 24e004b40c..701420fadb 100644
--- a/ports/zephyr/modmachine.c
+++ b/ports/zephyr/modmachine.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013-2015 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2016 Paul Sokolovsky
  * Copyright (c) 2016 Linaro Limited
  *
@@ -26,16 +26,25 @@
  * THE SOFTWARE.
  */
 
-#include <stdint.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
+
 #include <stdio.h>
 #include <zephyr/sys/reboot.h>
 
-#include "py/obj.h"
-#include "py/runtime.h"
-#include "extmod/modmachine.h"
 #include "modmachine.h"
 
-#if MICROPY_PY_MACHINE
+#ifdef CONFIG_REBOOT
+#define MICROPY_PY_MACHINE_RESET_ENTRY { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
+#else
+#define MICROPY_PY_MACHINE_RESET_ENTRY
+#endif
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    MICROPY_PY_MACHINE_RESET_ENTRY \
+    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, \
 
 STATIC mp_obj_t machine_reset(void) {
     sys_reboot(SYS_REBOOT_COLD);
@@ -55,38 +64,3 @@ STATIC mp_obj_t machine_idle(void) {
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
-
-STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
-    #ifdef CONFIG_REBOOT
-    { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
-    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
-
-    #if MICROPY_PY_MACHINE_I2C
-    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_SPI
-    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
-    #endif
-    #if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
-    #endif
-    { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) },
-    { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
-
-    // reset causes
-    /*{ MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(REASON_DEFAULT_RST) },*/
-};
-
-STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
-
-const mp_obj_module_t mp_module_machine = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t *)&machine_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_machine, mp_module_machine);
-
-#endif // MICROPY_PY_MACHINE
diff --git a/ports/zephyr/mpconfigport.h b/ports/zephyr/mpconfigport.h
index 49d00f4ca6..918f0fb15a 100644
--- a/ports/zephyr/mpconfigport.h
+++ b/ports/zephyr/mpconfigport.h
@@ -64,6 +64,7 @@
 #define MICROPY_PY_IO               (0)
 #define MICROPY_PY_MICROPYTHON_MEM_INFO (1)
 #define MICROPY_PY_MACHINE          (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE "ports/zephyr/modmachine.c"
 #define MICROPY_PY_MACHINE_I2C      (1)
 #define MICROPY_PY_MACHINE_SPI      (1)
 #define MICROPY_PY_MACHINE_SPI_MSB (SPI_TRANSFER_MSB)

From 30a63a204dc6ad02c996d5c40c34b67c85c650e4 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 23 Nov 2023 16:36:52 +1100
Subject: [PATCH 192/310] extmod/modmachine: Provide common Python bindings for
 machine.idle().

And use it in all ports.  The ports are unchanged, except esp8266 which now
just returns None from this function instead of the time elapsed (to match
other ports), and qemu-arm which gains this function.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modmachine.c                    | 13 +++++++++++++
 ports/cc3200/mods/modmachine.c         |  5 +----
 ports/esp32/modmachine.c               |  5 +----
 ports/esp8266/modmachine.c             |  7 +------
 ports/mimxrt/modmachine.c              |  5 +----
 ports/nrf/modules/machine/modmachine.c |  5 +----
 ports/qemu-arm/modmachine.c            |  4 ++++
 ports/renesas-ra/modmachine.c          |  5 +----
 ports/renesas-ra/modmachine.h          |  1 -
 ports/rp2/modmachine.c                 |  5 +----
 ports/samd/modmachine.c                |  5 +----
 ports/stm32/modmachine.c               |  5 +----
 ports/stm32/modmachine.h               |  1 -
 ports/stm32/modpyb.c                   |  8 +++++++-
 ports/unix/modmachine.c                | 17 +++++------------
 ports/zephyr/modmachine.c              |  5 +----
 16 files changed, 39 insertions(+), 57 deletions(-)

diff --git a/extmod/modmachine.c b/extmod/modmachine.c
index e0bef3a73f..311d5dc037 100644
--- a/extmod/modmachine.c
+++ b/extmod/modmachine.c
@@ -35,6 +35,10 @@
 #include "drivers/dht/dht.h"
 #endif
 
+// The port must provide implementations of these low-level machine functions.
+
+STATIC void mp_machine_idle(void);
+
 // The port can provide additional machine-module implementation in this file.
 #ifdef MICROPY_PY_MACHINE_INCLUDEFILE
 #include MICROPY_PY_MACHINE_INCLUDEFILE
@@ -46,6 +50,12 @@ STATIC mp_obj_t machine_soft_reset(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
 
+STATIC mp_obj_t machine_idle(void) {
+    mp_machine_idle();
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
+
 STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
 
@@ -57,6 +67,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     // Reset related functions.
     { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
 
+    // Power related functions.
+    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
+
     // Functions for bit protocols.
     #if MICROPY_PY_MACHINE_BITSTREAM
     { MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) },
diff --git a/ports/cc3200/mods/modmachine.c b/ports/cc3200/mods/modmachine.c
index 8673c62865..1df11c9d28 100644
--- a/ports/cc3200/mods/modmachine.c
+++ b/ports/cc3200/mods/modmachine.c
@@ -62,7 +62,6 @@
     { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_main),                MP_ROM_PTR(&machine_main_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_rng),                 MP_ROM_PTR(&machine_rng_get_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
@@ -168,11 +167,9 @@ STATIC mp_obj_t machine_main(mp_obj_t main) {
 }
 MP_DEFINE_CONST_FUN_OBJ_1(machine_main_obj, machine_main);
 
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     __WFI();
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_lightsleep(void) {
     pyb_sleep_sleep();
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index a1bd9a5cb9..1946d43db6 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -58,7 +58,6 @@
     { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) }, \
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
@@ -283,13 +282,11 @@ STATIC mp_obj_t machine_unique_id(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     MP_THREAD_GIL_EXIT();
     taskYIELD();
     MP_THREAD_GIL_ENTER();
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_disable_irq(void) {
     uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index b15515acd7..cce6b01ce7 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -45,7 +45,6 @@
     { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, \
@@ -102,14 +101,10 @@ STATIC mp_obj_t machine_unique_id(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
-STATIC mp_obj_t machine_idle(void) {
-    uint32_t t = mp_hal_ticks_cpu();
+STATIC void mp_machine_idle(void) {
     asm ("waiti 0");
-    t = mp_hal_ticks_cpu() - t;
     ets_event_poll(); // handle any events after possibly a long wait (eg feed WDT)
-    return MP_OBJ_NEW_SMALL_INT(t);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     uint32_t max_us = 0xffffffff;
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index ecd79d2230..b0c41fe1af 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -67,7 +67,6 @@
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) }, \
     MICROPY_PY_MACHINE_SDCARD_ENTRY \
     \
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
@@ -127,11 +126,9 @@ STATIC mp_obj_t machine_freq(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_freq_obj, machine_freq);
 
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     MICROPY_EVENT_POLL_HOOK;
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index b5d078ae51..3e3f185f6c 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -89,7 +89,6 @@
     { MP_ROM_QSTR(MP_QSTR_bootloader),         MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),         MP_ROM_PTR(&machine_enable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),        MP_ROM_PTR(&machine_disable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_idle),               MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),              MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep),         MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep),          MP_ROM_PTR(&machine_deepsleep_obj) }, \
@@ -196,11 +195,9 @@ NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
 
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     MICROPY_EVENT_POLL_HOOK;
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_lightsleep(void) {
     __WFE();
diff --git a/ports/qemu-arm/modmachine.c b/ports/qemu-arm/modmachine.c
index 1134ab4103..59694f92fc 100644
--- a/ports/qemu-arm/modmachine.c
+++ b/ports/qemu-arm/modmachine.c
@@ -32,3 +32,7 @@
 
 // This variable is needed for machine.soft_reset(), but the variable is otherwise unused.
 int pyexec_system_exit = 0;
+
+STATIC void mp_machine_idle(void) {
+    // Do nothing.
+}
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index 4617f0af0c..e0b34666fe 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -67,7 +67,6 @@
     { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
@@ -236,11 +235,9 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
 // idle()
 // This executies a wfi machine instruction which reduces power consumption
 // of the MCU until an interrupt occurs, at which point execution continues.
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     __WFI();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h
index 22d1fc475e..b8f8b631f2 100644
--- a/ports/renesas-ra/modmachine.h
+++ b/ports/renesas-ra/modmachine.h
@@ -47,7 +47,6 @@ MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj);
 
-MP_DECLARE_CONST_FUN_OBJ_0(machine_idle_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj);
 
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 6ec2811f98..65a5f75c58 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -54,7 +54,6 @@
     { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     \
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
     \
@@ -121,11 +120,9 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
 
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     __wfe();
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     mp_int_t delay_ms = 0;
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 9b2e88ba60..60b09cb0a3 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -64,7 +64,6 @@
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
     MICROPY_PY_MACHINE_RTC_ENTRY \
     \
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
@@ -122,11 +121,9 @@ STATIC mp_obj_t machine_unique_id(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     MICROPY_EVENT_POLL_HOOK;
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_disable_irq(void) {
     uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index fcdab9dfc1..8378fb3feb 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -102,7 +102,6 @@
     { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     MICROPY_PY_MACHINE_RNG_ENTRY \
-    { MP_ROM_QSTR(MP_QSTR_idle),                MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
@@ -381,11 +380,9 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
 // idle()
 // This executies a wfi machine instruction which reduces power consumption
 // of the MCU until an interrupt occurs, at which point execution continues.
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     __WFI();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h
index 096666eb5a..a234325fd7 100644
--- a/ports/stm32/modmachine.h
+++ b/ports/stm32/modmachine.h
@@ -39,7 +39,6 @@ MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj);
 
-MP_DECLARE_CONST_FUN_OBJ_0(machine_idle_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj);
 MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_cause_obj);
diff --git a/ports/stm32/modpyb.c b/ports/stm32/modpyb.c
index 0bf2d6a2c3..165c982f5d 100644
--- a/ports/stm32/modpyb.c
+++ b/ports/stm32/modpyb.c
@@ -65,6 +65,12 @@ STATIC mp_obj_t pyb_fault_debug(mp_obj_t value) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_fault_debug_obj, pyb_fault_debug);
 
+STATIC mp_obj_t pyb_idle(void) {
+    __WFI();
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_idle_obj, pyb_idle);
+
 #if MICROPY_PY_PYB_LEGACY
 
 // Returns the number of milliseconds which have elapsed since `start`.
@@ -144,7 +150,7 @@ STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_repl_info), MP_ROM_PTR(&pyb_set_repl_info_obj) },
     #endif
 
-    { MP_ROM_QSTR(MP_QSTR_wfi), MP_ROM_PTR(&machine_idle_obj) },
+    { MP_ROM_QSTR(MP_QSTR_wfi), MP_ROM_PTR(&pyb_idle_obj) },
     { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
     { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
     #if IRQ_ENABLE_STATS
diff --git a/ports/unix/modmachine.c b/ports/unix/modmachine.c
index 91e3e61340..9eacd5539f 100644
--- a/ports/unix/modmachine.c
+++ b/ports/unix/modmachine.c
@@ -36,14 +36,7 @@
 #define MICROPY_PAGE_MASK (MICROPY_PAGE_SIZE - 1)
 #endif
 
-#ifdef MICROPY_UNIX_MACHINE_IDLE
-#define MICROPY_PY_MACHINE_IDLE_ENTRY { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
-#else
-#define MICROPY_PY_MACHINE_IDLE_ENTRY
-#endif
-
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    MICROPY_PY_MACHINE_IDLE_ENTRY \
     { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) }, \
 
 // This variable is needed for machine.soft_reset(), but the variable is otherwise unused.
@@ -80,10 +73,10 @@ uintptr_t mod_machine_mem_get_addr(mp_obj_t addr_o, uint align) {
     return addr;
 }
 
-#ifdef MICROPY_UNIX_MACHINE_IDLE
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
+    #ifdef MICROPY_UNIX_MACHINE_IDLE
     MICROPY_UNIX_MACHINE_IDLE
-    return mp_const_none;
+    #else
+    // Do nothing.
+    #endif
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
-#endif
diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c
index 701420fadb..16109a3af8 100644
--- a/ports/zephyr/modmachine.c
+++ b/ports/zephyr/modmachine.c
@@ -43,7 +43,6 @@
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     MICROPY_PY_MACHINE_RESET_ENTRY \
     { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, \
 
 STATIC mp_obj_t machine_reset(void) {
@@ -59,8 +58,6 @@ STATIC mp_obj_t machine_reset_cause(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
 
-STATIC mp_obj_t machine_idle(void) {
+STATIC void mp_machine_idle(void) {
     k_yield();
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);

From e68aa40d2a6fa37fc551006f9c6f8928a75220a9 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 24 Nov 2023 09:35:42 +1100
Subject: [PATCH 193/310] extmod/modmachine: Add MICROPY_PY_MACHINE_PIN_BASE
 option.

And use it in qemu-arm, unix and windows ports to enable PinBase.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/machine_pinbase.c                     | 8 ++++----
 extmod/modmachine.c                          | 5 ++++-
 ports/qemu-arm/modmachine.c                  | 3 ---
 ports/qemu-arm/mpconfigport.h                | 1 +
 ports/unix/modmachine.c                      | 3 ---
 ports/unix/variants/mpconfigvariant_common.h | 1 +
 ports/windows/mpconfigport.h                 | 1 +
 7 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/extmod/machine_pinbase.c b/extmod/machine_pinbase.c
index 90c17d7ab6..981dadf0f5 100644
--- a/extmod/machine_pinbase.c
+++ b/extmod/machine_pinbase.c
@@ -24,10 +24,10 @@
  * THE SOFTWARE.
  */
 
-#include "py/mpconfig.h"
-#if MICROPY_PY_MACHINE
-
 #include "py/runtime.h"
+
+#if MICROPY_PY_MACHINE_PIN_BASE
+
 #include "extmod/modmachine.h"
 #include "extmod/virtpin.h"
 
@@ -84,4 +84,4 @@ MP_DEFINE_CONST_OBJ_TYPE(
     protocol, &pinbase_pin_p
     );
 
-#endif // MICROPY_PY_MACHINE
+#endif // MICROPY_PY_MACHINE_PIN_BASE
diff --git a/extmod/modmachine.c b/extmod/modmachine.c
index 311d5dc037..e3baea5210 100644
--- a/extmod/modmachine.c
+++ b/extmod/modmachine.c
@@ -81,7 +81,10 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
     #endif
 
-    // Class for Signal.
+    // Classes for PinBase and Signal.
+    #if MICROPY_PY_MACHINE_PIN_BASE
+    { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
 
     // Classes for software bus protocols.
diff --git a/ports/qemu-arm/modmachine.c b/ports/qemu-arm/modmachine.c
index 59694f92fc..72eaad6eab 100644
--- a/ports/qemu-arm/modmachine.c
+++ b/ports/qemu-arm/modmachine.c
@@ -27,9 +27,6 @@
 // This file is never compiled standalone, it's included directly from
 // extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
 
-#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) }, \
-
 // This variable is needed for machine.soft_reset(), but the variable is otherwise unused.
 int pyexec_system_exit = 0;
 
diff --git a/ports/qemu-arm/mpconfigport.h b/ports/qemu-arm/mpconfigport.h
index 36ce2db848..3efa1412df 100644
--- a/ports/qemu-arm/mpconfigport.h
+++ b/ports/qemu-arm/mpconfigport.h
@@ -48,6 +48,7 @@
 #define MICROPY_PY_HASHLIB          (1)
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/qemu-arm/modmachine.c"
+#define MICROPY_PY_MACHINE_PIN_BASE (1)
 #define MICROPY_PY_MICROPYTHON_MEM_INFO (1)
 #define MICROPY_USE_INTERNAL_PRINTF (1)
 #define MICROPY_VFS                 (1)
diff --git a/ports/unix/modmachine.c b/ports/unix/modmachine.c
index 9eacd5539f..40d08d9111 100644
--- a/ports/unix/modmachine.c
+++ b/ports/unix/modmachine.c
@@ -36,9 +36,6 @@
 #define MICROPY_PAGE_MASK (MICROPY_PAGE_SIZE - 1)
 #endif
 
-#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) }, \
-
 // This variable is needed for machine.soft_reset(), but the variable is otherwise unused.
 int pyexec_system_exit = 0;
 
diff --git a/ports/unix/variants/mpconfigvariant_common.h b/ports/unix/variants/mpconfigvariant_common.h
index 082938ed5f..981babca9f 100644
--- a/ports/unix/variants/mpconfigvariant_common.h
+++ b/ports/unix/variants/mpconfigvariant_common.h
@@ -116,3 +116,4 @@
 // Enable the "machine" module, mostly for machine.mem*.
 #define MICROPY_PY_MACHINE             (1)
 #define MICROPY_PY_MACHINE_PULSE       (1)
+#define MICROPY_PY_MACHINE_PIN_BASE    (1)
diff --git a/ports/windows/mpconfigport.h b/ports/windows/mpconfigport.h
index 9dce520c28..2e1521b9c7 100644
--- a/ports/windows/mpconfigport.h
+++ b/ports/windows/mpconfigport.h
@@ -156,6 +156,7 @@
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/unix/modmachine.c"
 #define MICROPY_PY_MACHINE_PULSE    (1)
+#define MICROPY_PY_MACHINE_PIN_BASE (1)
 #define MICROPY_MACHINE_MEM_GET_READ_ADDR   mod_machine_mem_get_addr
 #define MICROPY_MACHINE_MEM_GET_WRITE_ADDR  mod_machine_mem_get_addr
 

From 48b5a7b06079f0d0aa4780016f015ff023875680 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 24 Nov 2023 18:24:40 +1100
Subject: [PATCH 194/310] extmod/modmachine: Provide common Python bindings for
 bootloader().

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modmachine.c                    | 14 ++++++++++++++
 extmod/modmachine.h                    |  2 ++
 ports/esp32/modmachine.c               |  4 +---
 ports/esp32/modmachine.h               |  1 -
 ports/esp32/mpconfigport.h             |  1 +
 ports/mimxrt/modmachine.c              |  4 +---
 ports/mimxrt/mpconfigport.h            |  1 +
 ports/nrf/modules/machine/modmachine.c |  4 +---
 ports/nrf/modules/machine/modmachine.h |  1 -
 ports/renesas-ra/modmachine.c          |  4 +---
 ports/renesas-ra/modmachine.h          |  1 -
 ports/renesas-ra/mpconfigport.h        |  1 +
 ports/rp2/modmachine.c                 |  4 +---
 ports/rp2/modmachine.h                 |  1 -
 ports/rp2/mpconfigport.h               |  1 +
 ports/samd/modmachine.c                |  4 +---
 ports/samd/modmachine.h                |  2 --
 ports/samd/mpconfigport.h              |  1 +
 ports/stm32/modmachine.c               |  4 +---
 ports/stm32/modmachine.h               |  2 --
 ports/stm32/mpconfigport.h             |  1 +
 shared/tinyusb/mp_cdc_common.c         |  2 +-
 22 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/extmod/modmachine.c b/extmod/modmachine.c
index e3baea5210..789d324d66 100644
--- a/extmod/modmachine.c
+++ b/extmod/modmachine.c
@@ -39,6 +39,10 @@
 
 STATIC void mp_machine_idle(void);
 
+#if MICROPY_PY_MACHINE_BOOTLOADER
+NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args);
+#endif
+
 // The port can provide additional machine-module implementation in this file.
 #ifdef MICROPY_PY_MACHINE_INCLUDEFILE
 #include MICROPY_PY_MACHINE_INCLUDEFILE
@@ -50,6 +54,13 @@ STATIC mp_obj_t machine_soft_reset(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
 
+#if MICROPY_PY_MACHINE_BOOTLOADER
+NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+    mp_machine_bootloader(n_args, args);
+}
+MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
+#endif
+
 STATIC mp_obj_t machine_idle(void) {
     mp_machine_idle();
     return mp_const_none;
@@ -66,6 +77,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
 
     // Reset related functions.
     { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
+    #if MICROPY_PY_MACHINE_BOOTLOADER
+    { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) },
+    #endif
 
     // Power related functions.
     { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index 488aef4afd..b0253bbb8c 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -237,9 +237,11 @@ uintptr_t MICROPY_MACHINE_MEM_GET_READ_ADDR(mp_obj_t addr_o, uint align);
 uintptr_t MICROPY_MACHINE_MEM_GET_WRITE_ADDR(mp_obj_t addr_o, uint align);
 #endif
 
+NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len);
 mp_uint_t machine_time_pulse_us(mp_hal_pin_obj_t pin, int pulse_level, mp_uint_t timeout_us);
 
+MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bitstream_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_time_pulse_us_obj);
 
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 1946d43db6..18bc0965a2 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -58,7 +58,6 @@
     { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) }, \
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, \
@@ -248,12 +247,11 @@ STATIC mp_obj_t machine_reset_cause(size_t n_args, const mp_obj_t *pos_args, mp_
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_reset_cause_obj, 0,  machine_reset_cause);
 
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
     for (;;) {
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
 
 void machine_init(void) {
     is_soft_reset = 0;
diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h
index 06a1d7b0e2..9a5e6a566e 100644
--- a/ports/esp32/modmachine.h
+++ b/ports/esp32/modmachine.h
@@ -21,6 +21,5 @@ void machine_pwm_deinit_all(void);
 // TODO: void machine_rmt_deinit_all(void);
 void machine_timer_deinit_all(void);
 void machine_i2s_init0();
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 
 #endif // MICROPY_INCLUDED_ESP32_MODMACHINE_H
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 8a21cabb7d..ef55d9ae35 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -97,6 +97,7 @@
 #define MICROPY_PY_OS_URANDOM               (1)
 #define MICROPY_PY_MACHINE                  (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/esp32/modmachine.c"
+#define MICROPY_PY_MACHINE_BOOTLOADER       (1)
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/esp32/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH  (1)
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index b0c41fe1af..8bcf10122c 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -71,7 +71,6 @@
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
     \
     /* Reset reasons */ \
     { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(MP_PWRON_RESET) }, \
@@ -174,7 +173,7 @@ STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
 }
 MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
 
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if defined(MICROPY_BOARD_ENTER_BOOTLOADER)
     // If a board has a custom bootloader, call it first.
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
@@ -190,4 +189,3 @@ NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
         ;
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index f831dee364..ad35bfe8c5 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -79,6 +79,7 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC    (trng_random_u32())
 #define MICROPY_PY_MACHINE                  (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/mimxrt/modmachine.c"
+#define MICROPY_PY_MACHINE_BOOTLOADER       (1)
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/mimxrt/machine_adc.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index 3e3f185f6c..54e45b4d0f 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -86,7 +86,6 @@
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     { MP_ROM_QSTR(MP_QSTR_info),               MP_ROM_PTR(&machine_info_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_reset),              MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_bootloader),         MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),         MP_ROM_PTR(&machine_enable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),        MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),              MP_ROM_PTR(&machine_lightsleep_obj) }, \
@@ -188,12 +187,11 @@ STATIC mp_obj_t machine_reset(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
     for (;;) {
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
 
 STATIC void mp_machine_idle(void) {
     MICROPY_EVENT_POLL_HOOK;
diff --git a/ports/nrf/modules/machine/modmachine.h b/ports/nrf/modules/machine/modmachine.h
index 45847d407f..5aab2a6029 100644
--- a/ports/nrf/modules/machine/modmachine.h
+++ b/ports/nrf/modules/machine/modmachine.h
@@ -36,6 +36,5 @@ MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj);
 MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj);
 MP_DECLARE_CONST_FUN_OBJ_0(machine_lightsleep_obj);
 MP_DECLARE_CONST_FUN_OBJ_0(machine_deepsleep_obj);
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 
 #endif // __MICROPY_INCLUDED_NRF5_MODMACHINE_H__
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index e0b34666fe..b4479e1260 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -65,7 +65,6 @@
     { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
@@ -199,7 +198,7 @@ STATIC mp_obj_t machine_reset(void) {
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 // Activate the bootloader without BOOT* pins.
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if MICROPY_HW_ENABLE_STORAGE
     storage_flush();
     #endif
@@ -217,7 +216,6 @@ NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
         ;
     }
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
 
 // get or set the MCU frequencies
 STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h
index b8f8b631f2..d9e6961063 100644
--- a/ports/renesas-ra/modmachine.h
+++ b/ports/renesas-ra/modmachine.h
@@ -39,7 +39,6 @@ void machine_deinit(void);
 void machine_pin_init(void);
 void machine_pin_deinit(void);
 void machine_i2s_init0(void);
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj);
 MP_DECLARE_CONST_FUN_OBJ_0(machine_unique_id_obj);
diff --git a/ports/renesas-ra/mpconfigport.h b/ports/renesas-ra/mpconfigport.h
index 7fdb363883..66655a8976 100644
--- a/ports/renesas-ra/mpconfigport.h
+++ b/ports/renesas-ra/mpconfigport.h
@@ -131,6 +131,7 @@
 #ifndef MICROPY_PY_MACHINE
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/renesas-ra/modmachine.c"
+#define MICROPY_PY_MACHINE_BOOTLOADER (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/renesas-ra/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_READ (1)
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 65a5f75c58..8cd9dd462e 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -51,7 +51,6 @@
     { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     \
     { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
@@ -94,14 +93,13 @@ STATIC mp_obj_t machine_reset_cause(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
 
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
     rosc_hw->ctrl = ROSC_CTRL_ENABLE_VALUE_ENABLE << ROSC_CTRL_ENABLE_LSB;
     reset_usb_boot(0, 0);
     for (;;) {
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
 
 STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
     if (n_args == 0) {
diff --git a/ports/rp2/modmachine.h b/ports/rp2/modmachine.h
index 6ef7222791..3d0c726cd9 100644
--- a/ports/rp2/modmachine.h
+++ b/ports/rp2/modmachine.h
@@ -9,6 +9,5 @@ void machine_i2s_init0(void);
 void machine_pwm_deinit_all(void);
 
 struct _machine_spi_obj_t *spi_from_mp_obj(mp_obj_t o);
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 
 #endif // MICROPY_INCLUDED_RP2_MODMACHINE_H
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index f197d36cc4..8e9d29cf76 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -112,6 +112,7 @@
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC        (rosc_random_u32())
 #define MICROPY_PY_MACHINE                      (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE          "ports/rp2/modmachine.c"
+#define MICROPY_PY_MACHINE_BOOTLOADER           (1)
 #define MICROPY_PY_MACHINE_ADC                  (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE      "ports/rp2/machine_adc.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW         mp_pin_make_new
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 60b09cb0a3..3271e160e1 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -56,7 +56,6 @@
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
     \
@@ -92,14 +91,13 @@ STATIC mp_obj_t machine_reset(void) {
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     *DBL_TAP_ADDR = DBL_TAP_MAGIC_LOADER;
     #ifdef DBL_TAP_ADDR_ALT
     *DBL_TAP_ADDR_ALT = DBL_TAP_MAGIC_LOADER;
     #endif
     NVIC_SystemReset();
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
 
 STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
     if (n_args == 0) {
diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h
index 5baaf5f7e1..e1279a2886 100644
--- a/ports/samd/modmachine.h
+++ b/ports/samd/modmachine.h
@@ -33,8 +33,6 @@
 extern const mp_obj_type_t machine_dac_type;
 #endif
 
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
-
 void rtc_gettime(timeutils_struct_time_t *tm);
 
 #endif // MICROPY_INCLUDED_SAMD_MODMACHINE_H
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index bef705e50f..90d014e811 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -94,6 +94,7 @@
 #define MICROPY_PY_TIME_INCLUDEFILE         "ports/samd/modtime.c"
 #define MICROPY_PY_MACHINE                  (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/samd/modmachine.c"
+#define MICROPY_PY_MACHINE_BOOTLOADER       (1)
 #define MICROPY_PY_OS                       (1)
 #define MICROPY_PY_OS_INCLUDEFILE           "ports/samd/modos.c"
 #define MICROPY_READER_VFS                  (1)
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 8378fb3feb..781ceea7d3 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -99,7 +99,6 @@
     { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_bootloader),          MP_ROM_PTR(&machine_bootloader_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     MICROPY_PY_MACHINE_RNG_ENTRY \
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
@@ -298,7 +297,7 @@ STATIC mp_obj_t machine_reset(void) {
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 // Activate the bootloader without BOOT* pins.
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if MICROPY_HW_ENABLE_USB
     pyb_usb_dev_deinit();
     #endif
@@ -322,7 +321,6 @@ NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
         ;
     }
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
 
 // get or set the MCU frequencies
 STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h
index a234325fd7..8c9e1241b1 100644
--- a/ports/stm32/modmachine.h
+++ b/ports/stm32/modmachine.h
@@ -31,12 +31,10 @@
 void machine_init(void);
 void machine_deinit(void);
 void machine_i2s_init0();
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj);
 MP_DECLARE_CONST_FUN_OBJ_0(machine_unique_id_obj);
 MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj);
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj);
 
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj);
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index d9056ec339..db48c8c3b6 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -111,6 +111,7 @@
 #ifndef MICROPY_PY_MACHINE
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/stm32/modmachine.c"
+#define MICROPY_PY_MACHINE_BOOTLOADER (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/stm32/machine_adc.c"
 #ifndef MICROPY_PY_MACHINE_BITSTREAM
diff --git a/shared/tinyusb/mp_cdc_common.c b/shared/tinyusb/mp_cdc_common.c
index 4ccae4bac1..8278685262 100644
--- a/shared/tinyusb/mp_cdc_common.c
+++ b/shared/tinyusb/mp_cdc_common.c
@@ -26,7 +26,7 @@
 
 #include "py/runtime.h"
 #include "py/mphal.h"
-#include "modmachine.h"
+#include "extmod/modmachine.h"
 
 #if MICROPY_HW_USB_CDC_1200BPS_TOUCH && MICROPY_HW_ENABLE_USBDEV
 

From e1ec6af654b1c5c4a973b6c6b029ee68bb92eb89 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 24 Nov 2023 18:25:30 +1100
Subject: [PATCH 195/310] extmod/modmachine: Provide common bindings for 6
 bare-metal functions.

Minor changes for consistency are:
- nrf gains: unique_id(), freq() [they do nothing]
- samd: deepsleep() now resets after calling lightsleep()
- esp32: lightsleep()/deepsleep() no longer take kw arg "sleep", instead
  it's positional to match others.  also, passing 0 here will now do a 0ms
  sleep instead of acting like nothing was passed.
  reset_cause() no longer takes any args (before it would just ignore them)
- mimxrt: freq() with an argument and lightsleep() both raise
  NotImplementedError

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modmachine.c                    |  64 ++++++++++++
 extmod/modmachine.h                    |   6 ++
 ports/cc3200/mods/modmachine.c         |  41 +++-----
 ports/cc3200/mpconfigport.h            |   1 +
 ports/esp32/modmachine.c               | 135 ++++++++++---------------
 ports/esp32/mpconfigport.h             |   1 +
 ports/esp8266/modmachine.c             |  60 +++++------
 ports/esp8266/mpconfigport.h           |   1 +
 ports/mimxrt/modmachine.c              |  39 ++++---
 ports/mimxrt/mpconfigport.h            |   1 +
 ports/nrf/modules/machine/modmachine.c |  37 +++----
 ports/nrf/modules/machine/modmachine.h |   5 -
 ports/nrf/mpconfigport.h               |   1 +
 ports/renesas-ra/modmachine.c          |  42 +++-----
 ports/renesas-ra/modmachine.h          |  12 ---
 ports/renesas-ra/mpconfigport.h        |   1 +
 ports/renesas-ra/powerctrl.c           |   4 +-
 ports/renesas-ra/powerctrl.h           |   2 +-
 ports/rp2/modmachine.c                 |  64 +++++-------
 ports/rp2/mpconfigport.h               |   1 +
 ports/samd/modmachine.c                |  50 ++++-----
 ports/samd/mpconfigport.h              |   1 +
 ports/stm32/modmachine.c               | 114 +++++++++------------
 ports/stm32/modmachine.h               |   7 --
 ports/stm32/mpconfigport.h             |   1 +
 ports/stm32/powerctrl.c                |   6 +-
 ports/stm32/powerctrl.h                |   2 +-
 ports/zephyr/modmachine.c              |   4 +-
 ports/zephyr/modmachine.h              |   2 -
 29 files changed, 320 insertions(+), 385 deletions(-)

diff --git a/extmod/modmachine.c b/extmod/modmachine.c
index 789d324d66..d56b938bb3 100644
--- a/extmod/modmachine.c
+++ b/extmod/modmachine.c
@@ -43,6 +43,16 @@ STATIC void mp_machine_idle(void);
 NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args);
 #endif
 
+#if MICROPY_PY_MACHINE_BARE_METAL_FUNCS
+STATIC mp_obj_t mp_machine_unique_id(void);
+NORETURN STATIC void mp_machine_reset(void);
+STATIC mp_int_t mp_machine_reset_cause(void);
+STATIC mp_obj_t mp_machine_get_freq(void);
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args);
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args);
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args);
+#endif
+
 // The port can provide additional machine-module implementation in this file.
 #ifdef MICROPY_PY_MACHINE_INCLUDEFILE
 #include MICROPY_PY_MACHINE_INCLUDEFILE
@@ -67,6 +77,46 @@ STATIC mp_obj_t machine_idle(void) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
+#if MICROPY_PY_MACHINE_BARE_METAL_FUNCS
+
+STATIC mp_obj_t machine_unique_id(void) {
+    return mp_machine_unique_id();
+}
+MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
+
+NORETURN STATIC mp_obj_t machine_reset(void) {
+    mp_machine_reset();
+}
+MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
+
+STATIC mp_obj_t machine_reset_cause(void) {
+    return MP_OBJ_NEW_SMALL_INT(mp_machine_reset_cause());
+}
+MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
+
+STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
+    if (n_args == 0) {
+        return mp_machine_get_freq();
+    } else {
+        mp_machine_set_freq(n_args, args);
+        return mp_const_none;
+    }
+}
+MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
+
+STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+    mp_machine_lightsleep(n_args, args);
+    return mp_const_none;
+}
+MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
+
+NORETURN STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+    mp_machine_deepsleep(n_args, args);
+}
+MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
+
+#endif
+
 STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
 
@@ -75,14 +125,28 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
     { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
 
+    // Miscellaneous functions.
+    #if MICROPY_PY_MACHINE_BARE_METAL_FUNCS
+    { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) },
+    #endif
+
     // Reset related functions.
     { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
     #if MICROPY_PY_MACHINE_BOOTLOADER
     { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) },
     #endif
+    #if MICROPY_PY_MACHINE_BARE_METAL_FUNCS
+    { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
+    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
+    #endif
 
     // Power related functions.
     { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
+    #if MICROPY_PY_MACHINE_BARE_METAL_FUNCS
+    { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) },
+    { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) },
+    { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) },
+    #endif
 
     // Functions for bit protocols.
     #if MICROPY_PY_MACHINE_BITSTREAM
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index b0253bbb8c..d186ce6615 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -241,6 +241,12 @@ NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len);
 mp_uint_t machine_time_pulse_us(mp_hal_pin_obj_t pin, int pulse_level, mp_uint_t timeout_us);
 
+MP_DECLARE_CONST_FUN_OBJ_0(machine_unique_id_obj);
+MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj);
+MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_cause_obj);
+MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj);
+MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj);
+MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bitstream_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_time_pulse_us_obj);
diff --git a/ports/cc3200/mods/modmachine.c b/ports/cc3200/mods/modmachine.c
index 1df11c9d28..5eb7e2ef15 100644
--- a/ports/cc3200/mods/modmachine.c
+++ b/ports/cc3200/mods/modmachine.c
@@ -56,16 +56,10 @@
 #endif
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
     MICROPY_PY_MACHINE_INFO_ENTRY \
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_main),                MP_ROM_PTR(&machine_main_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_rng),                 MP_ROM_PTR(&machine_rng_get_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_wake_reason),         MP_ROM_PTR(&machine_wake_reason_obj) }, \
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
@@ -99,24 +93,20 @@ extern OsiTaskHandle    svTaskHandle;
 extern OsiTaskHandle    xSimpleLinkSpawnTaskHndl;
 #endif
 
-
-/// \module machine - functions related to the SoC
-///
-
 MP_DECLARE_CONST_FUN_OBJ_0(machine_disable_irq_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_enable_irq_obj);
 
 /******************************************************************************/
 // MicroPython bindings;
 
-STATIC mp_obj_t machine_reset(void) {
+NORETURN STATIC void mp_machine_reset(void) {
     // disable wlan
     wlan_stop(SL_STOP_TIMEOUT_LONG);
     // reset the cpu and it's peripherals
     MAP_PRCMMCUReset(true);
-    return mp_const_none;
+    for (;;) {
+    }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 #ifdef DEBUG
 STATIC mp_obj_t machine_info(uint n_args, const mp_obj_t *args) {
@@ -145,17 +135,19 @@ STATIC mp_obj_t machine_info(uint n_args, const mp_obj_t *args) {
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info);
 #endif
 
-STATIC mp_obj_t machine_freq(void) {
+STATIC mp_obj_t mp_machine_get_freq(void) {
     return mp_obj_new_int(HAL_FCPU_HZ);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_freq_obj, machine_freq);
 
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    mp_raise_NotImplementedError(NULL);
+}
+
+STATIC mp_obj_t mp_machine_unique_id(void) {
     uint8_t mac[SL_BSSID_LENGTH];
     wlan_get_mac (mac);
     return mp_obj_new_bytes(mac, SL_BSSID_LENGTH);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
 STATIC mp_obj_t machine_main(mp_obj_t main) {
     if (mp_obj_is_str(main)) {
@@ -171,22 +163,19 @@ STATIC void mp_machine_idle(void) {
     __WFI();
 }
 
-STATIC mp_obj_t machine_lightsleep(void) {
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     pyb_sleep_sleep();
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_lightsleep_obj, machine_lightsleep);
 
-STATIC mp_obj_t machine_deepsleep (void) {
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     pyb_sleep_deepsleep();
-    return mp_const_none;
+    for (;;) {
+    }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep);
 
-STATIC mp_obj_t machine_reset_cause (void) {
-    return mp_obj_new_int(pyb_sleep_get_reset_cause());
+STATIC mp_int_t mp_machine_reset_cause(void) {
+    return pyb_sleep_get_reset_cause();
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
 
 STATIC mp_obj_t machine_wake_reason (void) {
     return mp_obj_new_int(pyb_sleep_get_wake_reason());
diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h
index f2dff028fc..7c52732459 100644
--- a/ports/cc3200/mpconfigport.h
+++ b/ports/cc3200/mpconfigport.h
@@ -122,6 +122,7 @@
 #define MICROPY_PY_TIME_INCLUDEFILE                 "ports/cc3200/mods/modtime.c"
 #define MICROPY_PY_MACHINE                          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE              "ports/cc3200/mods/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS         (1)
 #define MICROPY_PY_MACHINE_WDT                      (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE          "ports/cc3200/mods/machine_wdt.c"
 
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 18bc0965a2..0170655ba3 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -52,12 +52,7 @@
 #endif
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, \
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, \
@@ -73,7 +68,6 @@
     { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(MACHINE_WAKE_DEEPSLEEP) }, \
     \
     /* Reset reasons */ \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(MP_HARD_RESET) }, \
     { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(MP_PWRON_RESET) }, \
     { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(MP_WDT_RESET) }, \
@@ -103,65 +97,51 @@ STATIC bool is_soft_reset = 0;
 int esp_clk_cpu_freq(void);
 #endif
 
-STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        // get
-        return mp_obj_new_int(esp_rom_get_cpu_ticks_per_us() * 1000000);
-    } else {
-        // set
-        mp_int_t freq = mp_obj_get_int(args[0]) / 1000000;
-        if (freq != 20 && freq != 40 && freq != 80 && freq != 160
-            #if !CONFIG_IDF_TARGET_ESP32C3
-            && freq != 240
-            #endif
-            ) {
-            #if CONFIG_IDF_TARGET_ESP32C3
-            mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 20MHz, 40MHz, 80Mhz or 160MHz"));
-            #else
-            mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 20MHz, 40MHz, 80Mhz, 160MHz or 240MHz"));
-            #endif
-        }
-        #if CONFIG_IDF_TARGET_ESP32
-        esp_pm_config_esp32_t pm;
-        #elif CONFIG_IDF_TARGET_ESP32C3
-        esp_pm_config_esp32c3_t pm;
-        #elif CONFIG_IDF_TARGET_ESP32S2
-        esp_pm_config_esp32s2_t pm;
-        #elif CONFIG_IDF_TARGET_ESP32S3
-        esp_pm_config_esp32s3_t pm;
+STATIC mp_obj_t mp_machine_get_freq(void) {
+    return mp_obj_new_int(esp_rom_get_cpu_ticks_per_us() * 1000000);
+}
+
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    mp_int_t freq = mp_obj_get_int(args[0]) / 1000000;
+    if (freq != 20 && freq != 40 && freq != 80 && freq != 160
+        #if !CONFIG_IDF_TARGET_ESP32C3
+        && freq != 240
         #endif
-        pm.max_freq_mhz = freq;
-        pm.min_freq_mhz = freq;
-        pm.light_sleep_enable = false;
-        esp_err_t ret = esp_pm_configure(&pm);
-        if (ret != ESP_OK) {
-            mp_raise_ValueError(NULL);
-        }
-        while (esp_rom_get_cpu_ticks_per_us() != freq) {
-            vTaskDelay(1);
-        }
-        return mp_const_none;
+        ) {
+        #if CONFIG_IDF_TARGET_ESP32C3
+        mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 20MHz, 40MHz, 80Mhz or 160MHz"));
+        #else
+        mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 20MHz, 40MHz, 80Mhz, 160MHz or 240MHz"));
+        #endif
+    }
+    #if CONFIG_IDF_TARGET_ESP32
+    esp_pm_config_esp32_t pm;
+    #elif CONFIG_IDF_TARGET_ESP32C3
+    esp_pm_config_esp32c3_t pm;
+    #elif CONFIG_IDF_TARGET_ESP32S2
+    esp_pm_config_esp32s2_t pm;
+    #elif CONFIG_IDF_TARGET_ESP32S3
+    esp_pm_config_esp32s3_t pm;
+    #endif
+    pm.max_freq_mhz = freq;
+    pm.min_freq_mhz = freq;
+    pm.light_sleep_enable = false;
+    esp_err_t ret = esp_pm_configure(&pm);
+    if (ret != ESP_OK) {
+        mp_raise_ValueError(NULL);
+    }
+    while (esp_rom_get_cpu_ticks_per_us() != freq) {
+        vTaskDelay(1);
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
-
-STATIC mp_obj_t machine_sleep_helper(wake_type_t wake_type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-
-    enum {ARG_sleep_ms};
-    const mp_arg_t allowed_args[] = {
-        { MP_QSTR_sleep_ms, MP_ARG_INT, { .u_int = 0 } },
-    };
-
-    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
-
-
-    mp_int_t expiry = args[ARG_sleep_ms].u_int;
 
+STATIC void machine_sleep_helper(wake_type_t wake_type, size_t n_args, const mp_obj_t *args) {
     // First, disable any previously set wake-up source
     esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_ALL);
 
-    if (expiry != 0) {
+    // Set the expiry time of the sleep, if given.
+    if (n_args != 0) {
+        mp_int_t expiry = mp_obj_get_int(args[0]);
         esp_sleep_enable_timer_wakeup(((uint64_t)expiry) * 1000);
     }
 
@@ -199,53 +179,45 @@ STATIC mp_obj_t machine_sleep_helper(wake_type_t wake_type, size_t n_args, const
             esp_deep_sleep_start();
             break;
     }
-    return mp_const_none;
 }
 
-STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    return machine_sleep_helper(MACHINE_WAKE_SLEEP, n_args, pos_args, kw_args);
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+    machine_sleep_helper(MACHINE_WAKE_SLEEP, n_args, args);
 };
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_lightsleep_obj, 0, machine_lightsleep);
 
-STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    return machine_sleep_helper(MACHINE_WAKE_DEEPSLEEP, n_args, pos_args, kw_args);
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+    machine_sleep_helper(MACHINE_WAKE_DEEPSLEEP, n_args, args);
+    mp_machine_reset();
 };
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_deepsleep_obj, 0,  machine_deepsleep);
 
-STATIC mp_obj_t machine_reset_cause(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+STATIC mp_int_t mp_machine_reset_cause(void) {
     if (is_soft_reset) {
-        return MP_OBJ_NEW_SMALL_INT(MP_SOFT_RESET);
+        return MP_SOFT_RESET;
     }
     switch (esp_reset_reason()) {
         case ESP_RST_POWERON:
         case ESP_RST_BROWNOUT:
-            return MP_OBJ_NEW_SMALL_INT(MP_PWRON_RESET);
-            break;
+            return MP_PWRON_RESET;
 
         case ESP_RST_INT_WDT:
         case ESP_RST_TASK_WDT:
         case ESP_RST_WDT:
-            return MP_OBJ_NEW_SMALL_INT(MP_WDT_RESET);
-            break;
+            return MP_WDT_RESET;
 
         case ESP_RST_DEEPSLEEP:
-            return MP_OBJ_NEW_SMALL_INT(MP_DEEPSLEEP_RESET);
-            break;
+            return MP_DEEPSLEEP_RESET;
 
         case ESP_RST_SW:
         case ESP_RST_PANIC:
         case ESP_RST_EXT: // Comment in ESP-IDF: "For ESP32, ESP_RST_EXT is never returned"
-            return MP_OBJ_NEW_SMALL_INT(MP_HARD_RESET);
-            break;
+            return MP_HARD_RESET;
 
         case ESP_RST_SDIO:
         case ESP_RST_UNKNOWN:
         default:
-            return MP_OBJ_NEW_SMALL_INT(0);
-            break;
+            return 0;
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_reset_cause_obj, 0,  machine_reset_cause);
 
 NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
@@ -267,18 +239,15 @@ STATIC mp_obj_t machine_wake_reason(size_t n_args, const mp_obj_t *pos_args, mp_
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_wake_reason_obj, 0,  machine_wake_reason);
 
-STATIC mp_obj_t machine_reset(void) {
+NORETURN STATIC void mp_machine_reset(void) {
     esp_restart();
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC mp_obj_t mp_machine_unique_id(void) {
     uint8_t chipid[6];
     esp_efuse_mac_get_default(chipid);
     return mp_obj_new_bytes(chipid, 6);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
 STATIC void mp_machine_idle(void) {
     MP_THREAD_GIL_EXIT();
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index ef55d9ae35..083f1d11cf 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -97,6 +97,7 @@
 #define MICROPY_PY_OS_URANDOM               (1)
 #define MICROPY_PY_MACHINE                  (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/esp32/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER       (1)
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/esp32/machine_adc.c"
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index cce6b01ce7..d55a656ce0 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -41,13 +41,7 @@
 #define MACHINE_WAKE_DEEPSLEEP (0x04)
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, \
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, \
@@ -68,45 +62,42 @@
     { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(REASON_WDT_RST) }, \
     { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(REASON_SOFT_RESTART) }, \
 
-STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        // get
-        return mp_obj_new_int(system_get_cpu_freq() * 1000000);
-    } else {
-        // set
-        mp_int_t freq = mp_obj_get_int(args[0]) / 1000000;
-        if (freq != 80 && freq != 160) {
-            mp_raise_ValueError(MP_ERROR_TEXT("frequency can only be either 80Mhz or 160MHz"));
-        }
-        system_update_cpu_freq(freq);
-        return mp_const_none;
+STATIC mp_obj_t mp_machine_get_freq(void) {
+    return mp_obj_new_int(system_get_cpu_freq() * 1000000);
+}
+
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    mp_int_t freq = mp_obj_get_int(args[0]) / 1000000;
+    if (freq != 80 && freq != 160) {
+        mp_raise_ValueError(MP_ERROR_TEXT("frequency can only be either 80Mhz or 160MHz"));
+    }
+    system_update_cpu_freq(freq);
+}
+
+NORETURN STATIC void mp_machine_reset(void) {
+    system_restart();
+
+    // we must not return
+    for (;;) {
+        ets_loop_iter();
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
 
-STATIC mp_obj_t machine_reset(void) {
-    system_restart();
-    return mp_const_none;
+STATIC mp_int_t mp_machine_reset_cause(void) {
+    return system_get_rst_info()->reason;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_reset_cause(void) {
-    return MP_OBJ_NEW_SMALL_INT(system_get_rst_info()->reason);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
-
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC mp_obj_t mp_machine_unique_id(void) {
     uint32_t id = system_get_chip_id();
     return mp_obj_new_bytes((byte *)&id, sizeof(id));
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
 STATIC void mp_machine_idle(void) {
     asm ("waiti 0");
     ets_event_poll(); // handle any events after possibly a long wait (eg feed WDT)
 }
 
-STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     uint32_t max_us = 0xffffffff;
     if (n_args == 1) {
         mp_int_t max_ms = mp_obj_get_int(args[0]);
@@ -124,11 +115,9 @@ STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
             asm ("waiti 0");
         }
     }
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
 
-STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     // default to sleep forever
     uint32_t sleep_us = 0;
 
@@ -171,10 +160,7 @@ STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
         // we must not return
         ets_loop_iter();
     }
-
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
 
 // These values are from the datasheet
 #define ESP_TIMER_US_MIN (100)
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index fa9acce6c7..1925fc3e72 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -65,6 +65,7 @@
 #define MICROPY_PY_LWIP_SOCK_RAW    (1)
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/esp8266/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/esp8266/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_READ (1)
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index 8bcf10122c..b299112d95 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -57,18 +57,12 @@
 #endif
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     MICROPY_PY_MACHINE_LED_ENTRY \
     { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) }, \
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) }, \
     MICROPY_PY_MACHINE_SDCARD_ENTRY \
     \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
-    \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
     \
@@ -85,27 +79,27 @@ typedef enum {
     MP_SOFT_RESET
 } reset_reason_t;
 
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC mp_obj_t mp_machine_unique_id(void) {
     unsigned char id[8];
     mp_hal_get_unique_id(id);
     return mp_obj_new_bytes(id, sizeof(id));
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
-STATIC mp_obj_t machine_reset(void) {
+NORETURN STATIC void mp_machine_reset(void) {
     WDOG_TriggerSystemSoftwareReset(WDOG1);
-    return mp_const_none;
+    while (true) {
+        ;
+    }
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_reset_cause(void) {
+STATIC mp_int_t mp_machine_reset_cause(void) {
     #ifdef MIMXRT117x_SERIES
     uint32_t user_reset_flag = kSRC_M7CoreIppUserResetFlag;
     #else
     uint32_t user_reset_flag = kSRC_IppUserResetFlag;
     #endif
     if (SRC->SRSR & user_reset_flag) {
-        return MP_OBJ_NEW_SMALL_INT(MP_DEEPSLEEP_RESET);
+        return MP_DEEPSLEEP_RESET;
     }
     uint16_t reset_cause =
         WDOG_GetStatusFlags(WDOG1) & (kWDOG_PowerOnResetFlag | kWDOG_TimeoutResetFlag | kWDOG_SoftwareResetFlag);
@@ -116,20 +110,26 @@ STATIC mp_obj_t machine_reset_cause(void) {
     } else {
         reset_cause = MP_SOFT_RESET;
     }
-    return MP_OBJ_NEW_SMALL_INT(reset_cause);
+    return reset_cause;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
 
-STATIC mp_obj_t machine_freq(void) {
+STATIC mp_obj_t mp_machine_get_freq(void) {
     return MP_OBJ_NEW_SMALL_INT(mp_hal_get_cpu_freq());
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_freq_obj, machine_freq);
+
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    mp_raise_NotImplementedError(NULL);
+}
 
 STATIC void mp_machine_idle(void) {
     MICROPY_EVENT_POLL_HOOK;
 }
 
-STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+    mp_raise_NotImplementedError(NULL);
+}
+
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
         mp_int_t seconds = mp_obj_get_int(args[0]) / 1000;
         if (seconds > 0) {
@@ -155,10 +155,7 @@ STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     while (true) {
         ;
     }
-
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
 
 STATIC mp_obj_t machine_disable_irq(void) {
     uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index ad35bfe8c5..8150e3b1f5 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -79,6 +79,7 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC    (trng_random_u32())
 #define MICROPY_PY_MACHINE                  (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/mimxrt/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER       (1)
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/mimxrt/machine_adc.c"
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index 54e45b4d0f..7cdeb78c0a 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -85,13 +85,9 @@
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     { MP_ROM_QSTR(MP_QSTR_info),               MP_ROM_PTR(&machine_info_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset),              MP_ROM_PTR(&machine_reset_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),         MP_ROM_PTR(&machine_enable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),        MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),              MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),         MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),          MP_ROM_PTR(&machine_deepsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),        MP_ROM_PTR(&machine_reset_cause_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_Pin),                MP_ROM_PTR(&pin_type) }, \
     \
     MICROPY_PY_MACHINE_RTCOUNTER_ENTRY \
@@ -178,14 +174,16 @@ STATIC mp_obj_t machine_info(mp_uint_t n_args, const mp_obj_t *args) {
 
     return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info);
+STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info);
+
+STATIC mp_obj_t mp_machine_unique_id(void) {
+    return mp_const_empty_bytes;
+}
 
 // Resets the board in a manner similar to pushing the external RESET button.
-STATIC mp_obj_t machine_reset(void) {
+NORETURN STATIC void mp_machine_reset(void) {
     NVIC_SystemReset();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
@@ -197,22 +195,25 @@ STATIC void mp_machine_idle(void) {
     MICROPY_EVENT_POLL_HOOK;
 }
 
-STATIC mp_obj_t machine_lightsleep(void) {
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     __WFE();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_lightsleep_obj, machine_lightsleep);
 
-STATIC mp_obj_t machine_deepsleep(void) {
-    __WFI();
-    return mp_const_none;
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+    mp_machine_reset();
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep);
 
-STATIC mp_obj_t machine_reset_cause(void) {
-    return MP_OBJ_NEW_SMALL_INT(reset_cause);
+STATIC mp_int_t mp_machine_reset_cause(void) {
+    return reset_cause;
+}
+
+STATIC mp_obj_t mp_machine_get_freq(void) {
+    mp_raise_NotImplementedError(NULL);
+}
+
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    mp_raise_NotImplementedError(NULL);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
 
 STATIC mp_obj_t machine_enable_irq(void) {
 #ifndef BLUETOOTH_SD
diff --git a/ports/nrf/modules/machine/modmachine.h b/ports/nrf/modules/machine/modmachine.h
index 5aab2a6029..4574dc0010 100644
--- a/ports/nrf/modules/machine/modmachine.h
+++ b/ports/nrf/modules/machine/modmachine.h
@@ -32,9 +32,4 @@
 
 void machine_init(void);
 
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj);
-MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj);
-MP_DECLARE_CONST_FUN_OBJ_0(machine_lightsleep_obj);
-MP_DECLARE_CONST_FUN_OBJ_0(machine_deepsleep_obj);
-
 #endif // __MICROPY_INCLUDED_NRF5_MODMACHINE_H__
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index f3e71f675d..264b0dfe8d 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -160,6 +160,7 @@
 #define MICROPY_PY_TIME             (1)
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/nrf/modules/machine/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_PULSE    (0)
 #define MICROPY_PY_MACHINE_SOFTI2C  (MICROPY_PY_MACHINE_I2C)
 
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index b4479e1260..5bfbb919f4 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -63,13 +63,7 @@
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
     \
@@ -183,19 +177,16 @@ STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
 MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info);
 
 // Returns a string of 16 bytes (128 bits), which is the unique ID for the MCU.
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC mp_obj_t mp_machine_unique_id(void) {
     uint8_t id[16];
     get_unique_id((uint8_t *)&id);
     return mp_obj_new_bytes(id, 16);
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
 // Resets the pyboard in a manner similar to pushing the external RESET button.
-STATIC mp_obj_t machine_reset(void) {
+NORETURN STATIC void mp_machine_reset(void) {
     powerctrl_mcu_reset();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 // Activate the bootloader without BOOT* pins.
 NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
@@ -218,17 +209,13 @@ NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
 }
 
 // get or set the MCU frequencies
-STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        // get
-        return mp_obj_new_int(SystemCoreClock);
-    } else {
-        // set
-        mp_raise_NotImplementedError(MP_ERROR_TEXT("machine.freq set not supported yet"));
-        return mp_const_none;
-    }
+STATIC mp_obj_t mp_machine_get_freq(void) {
+    return mp_obj_new_int(SystemCoreClock);
+}
+
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    mp_raise_NotImplementedError(MP_ERROR_TEXT("machine.freq set not supported yet"));
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
 
 // idle()
 // This executies a wfi machine instruction which reduces power consumption
@@ -237,27 +224,22 @@ STATIC void mp_machine_idle(void) {
     __WFI();
 }
 
-STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
         mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
         machine_rtc_wakeup(2, args2);
     }
     powerctrl_enter_stop_mode();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
 
-STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
         mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
         machine_rtc_wakeup(2, args2);
     }
     powerctrl_enter_standby_mode();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
 
-STATIC mp_obj_t machine_reset_cause(void) {
-    return MP_OBJ_NEW_SMALL_INT(reset_cause);
+STATIC mp_int_t mp_machine_reset_cause(void) {
+    return reset_cause;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h
index d9e6961063..e64b6cc3d7 100644
--- a/ports/renesas-ra/modmachine.h
+++ b/ports/renesas-ra/modmachine.h
@@ -33,25 +33,13 @@ extern const mp_obj_type_t machine_touchpad_type;
 extern const mp_obj_type_t machine_dac_type;
 extern const mp_obj_type_t machine_sdcard_type;
 
-
 void machine_init(void);
 void machine_deinit(void);
 void machine_pin_init(void);
 void machine_pin_deinit(void);
 void machine_i2s_init0(void);
 
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj);
-MP_DECLARE_CONST_FUN_OBJ_0(machine_unique_id_obj);
-MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj);
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj);
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj);
-
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj);
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj);
-
 MP_DECLARE_CONST_FUN_OBJ_0(machine_disable_irq_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_enable_irq_obj);
 
-MP_DECLARE_CONST_FUN_OBJ_0(pyb_irq_stats_obj);
-
 #endif // MICROPY_INCLUDED_RENESAS_RA_MODMACHINE_H
diff --git a/ports/renesas-ra/mpconfigport.h b/ports/renesas-ra/mpconfigport.h
index 66655a8976..99286fa530 100644
--- a/ports/renesas-ra/mpconfigport.h
+++ b/ports/renesas-ra/mpconfigport.h
@@ -131,6 +131,7 @@
 #ifndef MICROPY_PY_MACHINE
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/renesas-ra/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/renesas-ra/machine_adc.c"
diff --git a/ports/renesas-ra/powerctrl.c b/ports/renesas-ra/powerctrl.c
index 26dc1cbe3a..548d31679a 100644
--- a/ports/renesas-ra/powerctrl.c
+++ b/ports/renesas-ra/powerctrl.c
@@ -245,7 +245,7 @@ void powerctrl_enter_stop_mode(void) {
     enable_irq(irq_state);
 }
 
-void powerctrl_enter_standby_mode(void) {
+NORETURN void powerctrl_enter_standby_mode(void) {
     rtc_init_finalise();
 
     #if defined(MICROPY_BOARD_ENTER_STANDBY)
@@ -301,4 +301,6 @@ void powerctrl_enter_standby_mode(void) {
     // enter standby mode
 
     // we never return; MCU is reset on exit from standby
+
+    powerctrl_mcu_reset();
 }
diff --git a/ports/renesas-ra/powerctrl.h b/ports/renesas-ra/powerctrl.h
index 1743150b32..34c40ea1ad 100644
--- a/ports/renesas-ra/powerctrl.h
+++ b/ports/renesas-ra/powerctrl.h
@@ -37,6 +37,6 @@ NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr);
 void powerctrl_check_enter_bootloader(void);
 
 void powerctrl_enter_stop_mode(void);
-void powerctrl_enter_standby_mode(void);
+NORETURN void powerctrl_enter_standby_mode(void);
 
 #endif // MICROPY_INCLUDED_RA_POWERCTRL_H
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 8cd9dd462e..2e9d1f20c0 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -48,14 +48,6 @@
 #define RP2_RESET_WDT (3)
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
-    \
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
-    \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
     \
@@ -66,32 +58,28 @@
     { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(RP2_RESET_PWRON) }, \
     { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(RP2_RESET_WDT) }, \
 
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC mp_obj_t mp_machine_unique_id(void) {
     pico_unique_board_id_t id;
     pico_get_unique_board_id(&id);
     return mp_obj_new_bytes(id.id, sizeof(id.id));
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
-STATIC mp_obj_t machine_reset(void) {
+NORETURN STATIC void mp_machine_reset(void) {
     watchdog_reboot(0, SRAM_END, 0);
     for (;;) {
         __wfi();
     }
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
-STATIC mp_obj_t machine_reset_cause(void) {
+STATIC mp_int_t mp_machine_reset_cause(void) {
     int reset_cause;
     if (watchdog_caused_reboot()) {
         reset_cause = RP2_RESET_WDT;
     } else {
         reset_cause = RP2_RESET_PWRON;
     }
-    return MP_OBJ_NEW_SMALL_INT(reset_cause);
+    return reset_cause;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
 
 NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
@@ -101,28 +89,26 @@ NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     }
 }
 
-STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        return MP_OBJ_NEW_SMALL_INT(mp_hal_get_cpu_freq());
-    } else {
-        mp_int_t freq = mp_obj_get_int(args[0]);
-        if (!set_sys_clock_khz(freq / 1000, false)) {
-            mp_raise_ValueError(MP_ERROR_TEXT("cannot change frequency"));
-        }
-        #if MICROPY_HW_ENABLE_UART_REPL
-        setup_default_uart();
-        mp_uart_init();
-        #endif
-        return mp_const_none;
-    }
+STATIC mp_obj_t mp_machine_get_freq(void) {
+    return MP_OBJ_NEW_SMALL_INT(mp_hal_get_cpu_freq());
+}
+
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    mp_int_t freq = mp_obj_get_int(args[0]);
+    if (!set_sys_clock_khz(freq / 1000, false)) {
+        mp_raise_ValueError(MP_ERROR_TEXT("cannot change frequency"));
+    }
+    #if MICROPY_HW_ENABLE_UART_REPL
+    setup_default_uart();
+    mp_uart_init();
+    #endif
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
 
 STATIC void mp_machine_idle(void) {
     __wfe();
 }
 
-STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     mp_int_t delay_ms = 0;
     bool use_timer_alarm = false;
 
@@ -131,7 +117,7 @@ STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
         if (delay_ms <= 1) {
             // Sleep is too small, just use standard delay.
             mp_hal_delay_ms(delay_ms);
-            return mp_const_none;
+            return;
         }
         use_timer_alarm = delay_ms < (1ULL << 32) / 1000;
         if (use_timer_alarm) {
@@ -148,7 +134,7 @@ STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     #if MICROPY_PY_NETWORK_CYW43
     if (cyw43_has_pending && cyw43_poll != NULL) {
         restore_interrupts(my_interrupts);
-        return mp_const_none;
+        return;
     }
     #endif
     // Disable USB and ADC clocks.
@@ -204,16 +190,12 @@ STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     // Bring back all clocks.
     clocks_init();
     restore_interrupts(my_interrupts);
-
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
 
-STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
-    machine_lightsleep(n_args, args);
-    return machine_reset();
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+    mp_machine_lightsleep(n_args, args);
+    mp_machine_reset();
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
 
 STATIC mp_obj_t machine_disable_irq(void) {
     uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index 8e9d29cf76..ee1f24b87a 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -112,6 +112,7 @@
 #define MICROPY_PY_RANDOM_SEED_INIT_FUNC        (rosc_random_u32())
 #define MICROPY_PY_MACHINE                      (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE          "ports/rp2/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS     (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER           (1)
 #define MICROPY_PY_MACHINE_ADC                  (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE      "ports/rp2/machine_adc.c"
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 3271e160e1..9d53048b13 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -55,19 +55,12 @@
 #endif
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
-    \
     { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) }, \
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
     MICROPY_PY_MACHINE_RTC_ENTRY \
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_lightsleep_obj) }, \
     \
     /* Class constants. */ \
     /* Use numerical constants instead of the symbolic names, */ \
@@ -81,15 +74,13 @@
 extern bool EIC_occured;
 extern uint32_t _dbl_tap_addr;
 
-STATIC mp_obj_t machine_reset(void) {
+NORETURN STATIC void mp_machine_reset(void) {
     *DBL_TAP_ADDR = DBL_TAP_MAGIC_RESET;
     #ifdef DBL_TAP_ADDR_ALT
     *DBL_TAP_ADDR_ALT = DBL_TAP_MAGIC_RESET;
     #endif
     NVIC_SystemReset();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     *DBL_TAP_ADDR = DBL_TAP_MAGIC_LOADER;
@@ -99,25 +90,22 @@ NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     NVIC_SystemReset();
 }
 
-STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        return MP_OBJ_NEW_SMALL_INT(get_cpu_freq());
-    } else {
-        uint32_t freq = mp_obj_get_int(args[0]);
-        if (freq >= 1000000 && freq <= MAX_CPU_FREQ) {
-            set_cpu_freq(freq);
-        }
-        return mp_const_none;
+STATIC mp_obj_t mp_machine_get_freq(void) {
+    return MP_OBJ_NEW_SMALL_INT(get_cpu_freq());
+}
+
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    uint32_t freq = mp_obj_get_int(args[0]);
+    if (freq >= 1000000 && freq <= MAX_CPU_FREQ) {
+        set_cpu_freq(freq);
     }
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
 
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC mp_obj_t mp_machine_unique_id(void) {
     samd_unique_id_t id;
     samd_get_unique_id(&id);
     return mp_obj_new_bytes((byte *)&id.bytes, sizeof(id.bytes));
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
 STATIC void mp_machine_idle(void) {
     MICROPY_EVENT_POLL_HOOK;
@@ -136,18 +124,17 @@ STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
 }
 MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
 
-STATIC mp_obj_t machine_reset_cause(void) {
+STATIC mp_int_t mp_machine_reset_cause(void) {
     #if defined(MCU_SAMD21)
-    return MP_OBJ_NEW_SMALL_INT(PM->RCAUSE.reg);
+    return PM->RCAUSE.reg;
     #elif defined(MCU_SAMD51)
-    return MP_OBJ_NEW_SMALL_INT(RSTC->RCAUSE.reg);
+    return RSTC->RCAUSE.reg;
     #else
-    return MP_OBJ_NEW_SMALL_INT(0);
+    return 0;
     #endif
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
 
-STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     int32_t duration = -1;
     uint32_t freq = get_cpu_freq();
     if (n_args > 0) {
@@ -197,6 +184,9 @@ STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     #endif
     // Speed up again
     set_cpu_freq(freq);
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
+
+NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+    mp_machine_lightsleep(n_args, args);
+    mp_machine_reset();
+}
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 90d014e811..1c29b024cf 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -94,6 +94,7 @@
 #define MICROPY_PY_TIME_INCLUDEFILE         "ports/samd/modtime.c"
 #define MICROPY_PY_MACHINE                  (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/samd/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER       (1)
 #define MICROPY_PY_OS                       (1)
 #define MICROPY_PY_OS_INCLUDEFILE           "ports/samd/modos.c"
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 781ceea7d3..206d28a89e 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -97,14 +97,8 @@
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&machine_info_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_unique_id),           MP_ROM_PTR(&machine_unique_id_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset),               MP_ROM_PTR(&machine_reset_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_freq),                MP_ROM_PTR(&machine_freq_obj) }, \
     MICROPY_PY_MACHINE_RNG_ENTRY \
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_lightsleep),          MP_ROM_PTR(&machine_lightsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_deepsleep),           MP_ROM_PTR(&machine_deepsleep_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_reset_cause),         MP_ROM_PTR(&machine_reset_cause_obj) }, \
     \
     { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
@@ -283,18 +277,15 @@ STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
 MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info);
 
 // Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU.
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC mp_obj_t mp_machine_unique_id(void) {
     byte *id = (byte *)MP_HAL_UNIQUE_ID_ADDRESS;
     return mp_obj_new_bytes(id, 12);
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
 
 // Resets the pyboard in a manner similar to pushing the external RESET button.
-STATIC mp_obj_t machine_reset(void) {
+NORETURN STATIC void mp_machine_reset(void) {
     powerctrl_mcu_reset();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 // Activate the bootloader without BOOT* pins.
 NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
@@ -323,57 +314,53 @@ NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
 }
 
 // get or set the MCU frequencies
-STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        // get
-        mp_obj_t tuple[] = {
-            mp_obj_new_int(HAL_RCC_GetSysClockFreq()),
-            mp_obj_new_int(HAL_RCC_GetHCLKFreq()),
-            mp_obj_new_int(HAL_RCC_GetPCLK1Freq()),
-            #if !defined(STM32F0) && !defined(STM32G0)
-            mp_obj_new_int(HAL_RCC_GetPCLK2Freq()),
-            #endif
-        };
-        return mp_obj_new_tuple(MP_ARRAY_SIZE(tuple), tuple);
-    } else {
-        // set
-        #if defined(STM32F0) || defined(STM32L0) || defined(STM32L1) || defined(STM32L4) || defined(STM32G0)
-        mp_raise_NotImplementedError(MP_ERROR_TEXT("machine.freq set not supported yet"));
-        #else
-        mp_int_t sysclk = mp_obj_get_int(args[0]);
-        mp_int_t ahb = sysclk;
-        #if defined(STM32H7)
-        if (ahb > 200000000) {
-            ahb /= 2;
-        }
+STATIC mp_obj_t mp_machine_get_freq(void) {
+    mp_obj_t tuple[] = {
+        mp_obj_new_int(HAL_RCC_GetSysClockFreq()),
+        mp_obj_new_int(HAL_RCC_GetHCLKFreq()),
+        mp_obj_new_int(HAL_RCC_GetPCLK1Freq()),
+        #if !defined(STM32F0) && !defined(STM32G0)
+        mp_obj_new_int(HAL_RCC_GetPCLK2Freq()),
         #endif
-        #if defined(STM32WB)
-        mp_int_t apb1 = ahb;
-        mp_int_t apb2 = ahb;
-        #else
-        mp_int_t apb1 = ahb / 4;
-        mp_int_t apb2 = ahb / 2;
-        #endif
-        if (n_args > 1) {
-            ahb = mp_obj_get_int(args[1]);
-            if (n_args > 2) {
-                apb1 = mp_obj_get_int(args[2]);
-                if (n_args > 3) {
-                    apb2 = mp_obj_get_int(args[3]);
-                }
+    };
+    return mp_obj_new_tuple(MP_ARRAY_SIZE(tuple), tuple);
+}
+
+STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    #if defined(STM32F0) || defined(STM32L0) || defined(STM32L1) || defined(STM32L4) || defined(STM32G0)
+    mp_raise_NotImplementedError(MP_ERROR_TEXT("machine.freq set not supported yet"));
+    #else
+    mp_int_t sysclk = mp_obj_get_int(args[0]);
+    mp_int_t ahb = sysclk;
+    #if defined(STM32H7)
+    if (ahb > 200000000) {
+        ahb /= 2;
+    }
+    #endif
+    #if defined(STM32WB)
+    mp_int_t apb1 = ahb;
+    mp_int_t apb2 = ahb;
+    #else
+    mp_int_t apb1 = ahb / 4;
+    mp_int_t apb2 = ahb / 2;
+    #endif
+    if (n_args > 1) {
+        ahb = mp_obj_get_int(args[1]);
+        if (n_args > 2) {
+            apb1 = mp_obj_get_int(args[2]);
+            if (n_args > 3) {
+                apb2 = mp_obj_get_int(args[3]);
             }
         }
-        int ret = powerctrl_set_sysclk(sysclk, ahb, apb1, apb2);
-        if (ret == -MP_EINVAL) {
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid freq"));
-        } else if (ret < 0) {
-            MICROPY_BOARD_FATAL_ERROR("can't change freq");
-        }
-        return mp_const_none;
-        #endif
     }
+    int ret = powerctrl_set_sysclk(sysclk, ahb, apb1, apb2);
+    if (ret == -MP_EINVAL) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid freq"));
+    } else if (ret < 0) {
+        MICROPY_BOARD_FATAL_ERROR("can't change freq");
+    }
+    #endif
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
 
 // idle()
 // This executies a wfi machine instruction which reduces power consumption
@@ -382,27 +369,22 @@ STATIC void mp_machine_idle(void) {
     __WFI();
 }
 
-STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
         mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
         pyb_rtc_wakeup(2, args2);
     }
     powerctrl_enter_stop_mode();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
 
-STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
         mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
         pyb_rtc_wakeup(2, args2);
     }
     powerctrl_enter_standby_mode();
-    return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
 
-STATIC mp_obj_t machine_reset_cause(void) {
-    return MP_OBJ_NEW_SMALL_INT(reset_cause);
+STATIC mp_int_t mp_machine_reset_cause(void) {
+    return reset_cause;
 }
-MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h
index 8c9e1241b1..899a29be8e 100644
--- a/ports/stm32/modmachine.h
+++ b/ports/stm32/modmachine.h
@@ -33,13 +33,6 @@ void machine_deinit(void);
 void machine_i2s_init0();
 
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj);
-MP_DECLARE_CONST_FUN_OBJ_0(machine_unique_id_obj);
-MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj);
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj);
-
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj);
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj);
-MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_cause_obj);
 
 MP_DECLARE_CONST_FUN_OBJ_0(machine_disable_irq_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_enable_irq_obj);
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index db48c8c3b6..e11e721030 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -111,6 +111,7 @@
 #ifndef MICROPY_PY_MACHINE
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/stm32/modmachine.c"
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/stm32/machine_adc.c"
diff --git a/ports/stm32/powerctrl.c b/ports/stm32/powerctrl.c
index 1bb66c9781..712021edb6 100644
--- a/ports/stm32/powerctrl.c
+++ b/ports/stm32/powerctrl.c
@@ -993,7 +993,7 @@ void powerctrl_enter_stop_mode(void) {
     enable_irq(irq_state);
 }
 
-void powerctrl_enter_standby_mode(void) {
+NORETURN void powerctrl_enter_standby_mode(void) {
     rtc_init_finalise();
 
     #if defined(MICROPY_BOARD_ENTER_STANDBY)
@@ -1114,5 +1114,7 @@ void powerctrl_enter_standby_mode(void) {
 
     // enter standby mode
     HAL_PWR_EnterSTANDBYMode();
-    // we never return; MCU is reset on exit from standby
+
+    // MCU is reset on exit from standby, but just in case it's not, do an explicit reset.
+    powerctrl_mcu_reset();
 }
diff --git a/ports/stm32/powerctrl.h b/ports/stm32/powerctrl.h
index e9adc52965..5b92405611 100644
--- a/ports/stm32/powerctrl.h
+++ b/ports/stm32/powerctrl.h
@@ -47,6 +47,6 @@ void powerctrl_config_systick(void);
 int powerctrl_rcc_clock_config_pll(RCC_ClkInitTypeDef *rcc_init, uint32_t sysclk_mhz, bool need_pllsai);
 int powerctrl_set_sysclk(uint32_t sysclk, uint32_t ahb, uint32_t apb1, uint32_t apb2);
 void powerctrl_enter_stop_mode(void);
-void powerctrl_enter_standby_mode(void);
+NORETURN void powerctrl_enter_standby_mode(void);
 
 #endif // MICROPY_INCLUDED_STM32_POWERCTRL_H
diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c
index 16109a3af8..7015989784 100644
--- a/ports/zephyr/modmachine.c
+++ b/ports/zephyr/modmachine.c
@@ -50,13 +50,13 @@ STATIC mp_obj_t machine_reset(void) {
     // Won't get here, Zephyr has infiniloop on its side
     return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
+MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
 
 STATIC mp_obj_t machine_reset_cause(void) {
     printf("Warning: %s is not implemented\n", __func__);
     return MP_OBJ_NEW_SMALL_INT(42);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
+MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
 
 STATIC void mp_machine_idle(void) {
     k_yield();
diff --git a/ports/zephyr/modmachine.h b/ports/zephyr/modmachine.h
index e3a69d8c1b..19dbe6a16a 100644
--- a/ports/zephyr/modmachine.h
+++ b/ports/zephyr/modmachine.h
@@ -3,8 +3,6 @@
 
 #include "py/obj.h"
 
-MP_DECLARE_CONST_FUN_OBJ_0(machine_info_obj);
-
 typedef struct _machine_pin_obj_t {
     mp_obj_base_t base;
     const struct device *port;

From f523b86541440cc756aa0b2379538ee5e7864803 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 27 Nov 2023 11:43:15 +1100
Subject: [PATCH 196/310] extmod/modmachine: Provide common implementation of
 disable/enable_irq.

The ports esp32, mimxrt, rp2 and samd all shared exactly the same
implementation of machine.disable_irq() and machine.enable_irq(),
implemented in terms of MICROPY_{BEGIN,END}_ATOMIC_SECTION.  This commit
factors these implementations into extmod/modmachine.c.

The cc3200, esp8266, nrf, renesas-ra and stm32 ports do not yet use this
common implementation.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modmachine.c         | 23 +++++++++++++++++++++++
 ports/esp32/modmachine.c    | 16 ----------------
 ports/esp32/mpconfigport.h  |  1 +
 ports/mimxrt/modmachine.c   | 16 ----------------
 ports/mimxrt/mpconfigport.h |  1 +
 ports/rp2/modmachine.c      | 16 ----------------
 ports/rp2/mpconfigport.h    |  1 +
 ports/samd/modmachine.c     | 16 ----------------
 ports/samd/mpconfigport.h   |  1 +
 9 files changed, 27 insertions(+), 64 deletions(-)

diff --git a/extmod/modmachine.c b/extmod/modmachine.c
index d56b938bb3..a64b8ba79d 100644
--- a/extmod/modmachine.c
+++ b/extmod/modmachine.c
@@ -117,6 +117,23 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsle
 
 #endif
 
+#if MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ
+
+STATIC mp_obj_t machine_disable_irq(void) {
+    uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
+    return mp_obj_new_int(state);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
+
+STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
+    uint32_t state = mp_obj_get_int(state_in);
+    MICROPY_END_ATOMIC_SECTION(state);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
+
+#endif
+
 STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
 
@@ -148,6 +165,12 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) },
     #endif
 
+    // Interrupt related functions.
+    #if MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ
+    { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
+    { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
+    #endif
+
     // Functions for bit protocols.
     #if MICROPY_PY_MACHINE_BITSTREAM
     { MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) },
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 0170655ba3..a3437f10c1 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -54,9 +54,6 @@
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
     \
-    { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    \
     { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) }, \
     MICROPY_PY_MACHINE_SDCARD_ENTRY \
     { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, \
@@ -254,16 +251,3 @@ STATIC void mp_machine_idle(void) {
     taskYIELD();
     MP_THREAD_GIL_ENTER();
 }
-
-STATIC mp_obj_t machine_disable_irq(void) {
-    uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
-    return mp_obj_new_int(state);
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
-
-STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
-    uint32_t state = mp_obj_get_int(state_in);
-    MICROPY_END_ATOMIC_SECTION(state);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 083f1d11cf..35943c47b6 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -99,6 +99,7 @@
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/esp32/modmachine.c"
 #define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER       (1)
+#define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ (1)
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/esp32/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH  (1)
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index b299112d95..b87747b409 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -63,9 +63,6 @@
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) }, \
     MICROPY_PY_MACHINE_SDCARD_ENTRY \
     \
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    \
     /* Reset reasons */ \
     { MP_ROM_QSTR(MP_QSTR_PWRON_RESET),         MP_ROM_INT(MP_PWRON_RESET) }, \
     { MP_ROM_QSTR(MP_QSTR_WDT_RESET),           MP_ROM_INT(MP_WDT_RESET) }, \
@@ -157,19 +154,6 @@ NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     }
 }
 
-STATIC mp_obj_t machine_disable_irq(void) {
-    uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
-    return mp_obj_new_int(state);
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
-
-STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
-    uint32_t state = mp_obj_get_int(state_in);
-    MICROPY_END_ATOMIC_SECTION(state);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
-
 NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if defined(MICROPY_BOARD_ENTER_BOOTLOADER)
     // If a board has a custom bootloader, call it first.
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index 8150e3b1f5..51f057ca82 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -81,6 +81,7 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/mimxrt/modmachine.c"
 #define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER       (1)
+#define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ (1)
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/mimxrt/machine_adc.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 2e9d1f20c0..70b22dac01 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -48,9 +48,6 @@
 #define RP2_RESET_WDT (3)
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    \
     { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) }, \
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) }, \
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
@@ -196,16 +193,3 @@ NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     mp_machine_lightsleep(n_args, args);
     mp_machine_reset();
 }
-
-STATIC mp_obj_t machine_disable_irq(void) {
-    uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
-    return mp_obj_new_int(state);
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
-
-STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
-    uint32_t state = mp_obj_get_int(state_in);
-    MICROPY_END_ATOMIC_SECTION(state);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index ee1f24b87a..6942d26714 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -114,6 +114,7 @@
 #define MICROPY_PY_MACHINE_INCLUDEFILE          "ports/rp2/modmachine.c"
 #define MICROPY_PY_MACHINE_BARE_METAL_FUNCS     (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER           (1)
+#define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ (1)
 #define MICROPY_PY_MACHINE_ADC                  (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE      "ports/rp2/machine_adc.c"
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW         mp_pin_make_new
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 9d53048b13..9aab705bf7 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -59,9 +59,6 @@
     { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
     MICROPY_PY_MACHINE_RTC_ENTRY \
     \
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    \
     /* Class constants. */ \
     /* Use numerical constants instead of the symbolic names, */ \
     /* since the names differ between SAMD21 and SAMD51. */ \
@@ -111,19 +108,6 @@ STATIC void mp_machine_idle(void) {
     MICROPY_EVENT_POLL_HOOK;
 }
 
-STATIC mp_obj_t machine_disable_irq(void) {
-    uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
-    return mp_obj_new_int(state);
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
-
-STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
-    uint32_t state = mp_obj_get_int(state_in);
-    MICROPY_END_ATOMIC_SECTION(state);
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
-
 STATIC mp_int_t mp_machine_reset_cause(void) {
     #if defined(MCU_SAMD21)
     return PM->RCAUSE.reg;
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 1c29b024cf..72cbb7d208 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -96,6 +96,7 @@
 #define MICROPY_PY_MACHINE_INCLUDEFILE      "ports/samd/modmachine.c"
 #define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER       (1)
+#define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ (1)
 #define MICROPY_PY_OS                       (1)
 #define MICROPY_PY_OS_INCLUDEFILE           "ports/samd/modos.c"
 #define MICROPY_READER_VFS                  (1)

From 4bf7987f0abfde47b0bac4e2e8546979802ba3c6 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 27 Nov 2023 11:51:36 +1100
Subject: [PATCH 197/310] cc3200/mods/modmachine: Use common implementation of
 disable/enable_irq.

This commit changes the cc3200 port to use the common machine
implementation of machine.disable_irq() and machine.enable_irq().  This
eliminates its dependency on the stm32 port's code.  The behaviour of
cc3200 for these functions is changed:
- disable_irq() now returns an (opaque) integer rather than a bool
- enable_irq(state) must be passed and argument, which is the return value
  of disable_irq() rather than a bool

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/cc3200/application.mk    | 1 -
 ports/cc3200/mods/modmachine.c | 6 ------
 ports/cc3200/mpconfigport.h    | 1 +
 3 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index 9fc58553cd..4a6828ea86 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -153,7 +153,6 @@ APP_SHARED_SRC_C = $(addprefix shared/,\
 
 APP_STM_SRC_C = $(addprefix ports/stm32/,\
 	bufhelper.c \
-	irq.c \
 	)
 
 OBJ = $(PY_O) $(addprefix $(BUILD)/, $(APP_FATFS_SRC_C:.c=.o) $(APP_RTOS_SRC_C:.c=.o) $(APP_FTP_SRC_C:.c=.o) $(APP_HAL_SRC_C:.c=.o) $(APP_MISC_SRC_C:.c=.o))
diff --git a/ports/cc3200/mods/modmachine.c b/ports/cc3200/mods/modmachine.c
index 5eb7e2ef15..6e50553365 100644
--- a/ports/cc3200/mods/modmachine.c
+++ b/ports/cc3200/mods/modmachine.c
@@ -62,9 +62,6 @@
     { MP_ROM_QSTR(MP_QSTR_sleep),               MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_wake_reason),         MP_ROM_PTR(&machine_wake_reason_obj) }, \
     \
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),         MP_ROM_PTR(&machine_disable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),          MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    \
     { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&pyb_rtc_type) }, \
     { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&pin_type) }, \
     { MP_ROM_QSTR(MP_QSTR_ADC),                 MP_ROM_PTR(&pyb_adc_type) }, \
@@ -93,9 +90,6 @@ extern OsiTaskHandle    svTaskHandle;
 extern OsiTaskHandle    xSimpleLinkSpawnTaskHndl;
 #endif
 
-MP_DECLARE_CONST_FUN_OBJ_0(machine_disable_irq_obj);
-MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_enable_irq_obj);
-
 /******************************************************************************/
 // MicroPython bindings;
 
diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h
index 7c52732459..64098c3fc0 100644
--- a/ports/cc3200/mpconfigport.h
+++ b/ports/cc3200/mpconfigport.h
@@ -123,6 +123,7 @@
 #define MICROPY_PY_MACHINE                          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE              "ports/cc3200/mods/modmachine.c"
 #define MICROPY_PY_MACHINE_BARE_METAL_FUNCS         (1)
+#define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ   (1)
 #define MICROPY_PY_MACHINE_WDT                      (1)
 #define MICROPY_PY_MACHINE_WDT_INCLUDEFILE          "ports/cc3200/mods/machine_wdt.c"
 

From 39d4153a8d91f1db3f2f034e5fa448b79ca14bc7 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 27 Nov 2023 12:00:16 +1100
Subject: [PATCH 198/310] esp8266/esp_mphal: Make atomic section more atomic.

By disabling ets_loop_iter when the atomic section is active.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp8266/esp_mphal.c    | 15 +++++++++++++++
 ports/esp8266/mpconfigport.h |  8 +++++---
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/ports/esp8266/esp_mphal.c b/ports/esp8266/esp_mphal.c
index 7606bd4f63..06502e85c4 100644
--- a/ports/esp8266/esp_mphal.c
+++ b/ports/esp8266/esp_mphal.c
@@ -166,6 +166,21 @@ void mp_hal_signal_dupterm_input(void) {
     system_os_post(DUPTERM_TASK_ID, 0, 0);
 }
 
+// this bit is unused in the Xtensa PS register
+#define ETS_LOOP_ITER_BIT (12)
+
+uint32_t esp_disable_irq(void) {
+    uint32_t state = disable_irq();
+    state = (state & ~(1 << ETS_LOOP_ITER_BIT)) | (ets_loop_iter_disable << ETS_LOOP_ITER_BIT);
+    ets_loop_iter_disable = 1;
+    return state;
+}
+
+void esp_enable_irq(uint32_t state) {
+    ets_loop_iter_disable = (state >> ETS_LOOP_ITER_BIT) & 1;
+    enable_irq(state & ~(1 << ETS_LOOP_ITER_BIT));
+}
+
 // Get pointer to esf_buf bookkeeping structure
 void *ets_get_esf_buf_ctlblk(void) {
     // Get literal ptr before start of esf_rx_buf_alloc func
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index 1925fc3e72..ec36291ed3 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -126,9 +126,8 @@
 #define MICROPY_VM_HOOK_LOOP MICROPY_VM_HOOK_POLL
 #define MICROPY_VM_HOOK_RETURN MICROPY_VM_HOOK_POLL
 
-#include "xtirq.h"
-#define MICROPY_BEGIN_ATOMIC_SECTION() disable_irq()
-#define MICROPY_END_ATOMIC_SECTION(state) enable_irq(state)
+#define MICROPY_BEGIN_ATOMIC_SECTION() esp_disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state) esp_enable_irq(state)
 
 // type definitions for the specific machine
 
@@ -173,3 +172,6 @@ extern const struct _mp_print_t mp_debug_print;
 #define WDEV_HWRNG ((volatile uint32_t *)0x3ff20e44)
 
 #define _assert(expr) ((expr) ? (void)0 : __assert_func(__FILE__, __LINE__, __func__, #expr))
+
+uint32_t esp_disable_irq(void);
+void esp_enable_irq(uint32_t state);

From cc8fc450a67204f254356454d34e27c19cea6d10 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 27 Nov 2023 12:00:27 +1100
Subject: [PATCH 199/310] esp8266/modmachine: Use common implementation of
 disable/enable_irq.

Now that the MICROPY_BEGIN_ATOMIC_SECTION/MICROPY_END_ATOMIC_SECTION macros
act the same as disable_irq/enable_irq, it's possible to use the common
extmod implementation of these machine functions.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp8266/modmachine.c   | 22 ----------------------
 ports/esp8266/mpconfigport.h |  1 +
 2 files changed, 1 insertion(+), 22 deletions(-)

diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index d55a656ce0..f41c84e14d 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -43,9 +43,6 @@
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) }, \
     \
-    { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    \
     { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, \
     { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&esp_timer_type) }, \
     { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pyb_pin_type) }, \
@@ -331,25 +328,6 @@ MP_DEFINE_CONST_OBJ_TYPE(
     locals_dict, &esp_timer_locals_dict
     );
 
-// this bit is unused in the Xtensa PS register
-#define ETS_LOOP_ITER_BIT (12)
-
-STATIC mp_obj_t machine_disable_irq(void) {
-    uint32_t state = disable_irq();
-    state = (state & ~(1 << ETS_LOOP_ITER_BIT)) | (ets_loop_iter_disable << ETS_LOOP_ITER_BIT);
-    ets_loop_iter_disable = 1;
-    return mp_obj_new_int(state);
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
-
-STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
-    uint32_t state = mp_obj_get_int(state_in);
-    ets_loop_iter_disable = (state >> ETS_LOOP_ITER_BIT) & 1;
-    enable_irq(state & ~(1 << ETS_LOOP_ITER_BIT));
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
-
 // Custom version of this function that feeds system WDT if necessary
 mp_uint_t machine_time_pulse_us(mp_hal_pin_obj_t pin, int pulse_level, mp_uint_t timeout_us) {
     int nchanges = 2;
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index ec36291ed3..ad9fefe0cd 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -66,6 +66,7 @@
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/esp8266/modmachine.c"
 #define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
+#define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ (1)
 #define MICROPY_PY_MACHINE_ADC      (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE "ports/esp8266/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_READ (1)

From e3c4c32c640465a3596acdb1bd6a2b8f1eb89a29 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 29 Nov 2023 12:21:54 +1100
Subject: [PATCH 200/310] nrf: Use dupterm_objs[0] instead of board_stdio_uart.

To make this a little more consistent with other ports.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/nrf/main.c             |  2 +-
 ports/nrf/modules/os/modos.c |  8 ++++----
 ports/nrf/mpconfigport.h     |  1 +
 ports/nrf/mphalport.c        | 20 +++++++++-----------
 4 files changed, 15 insertions(+), 16 deletions(-)

diff --git a/ports/nrf/main.c b/ports/nrf/main.c
index 8e57be8dec..bcd0bb9d71 100644
--- a/ports/nrf/main.c
+++ b/ports/nrf/main.c
@@ -171,7 +171,7 @@ soft_reset:
             MP_OBJ_NEW_SMALL_INT(0),
             MP_OBJ_NEW_SMALL_INT(115200),
         };
-        MP_STATE_PORT(board_stdio_uart) = MP_OBJ_TYPE_GET_SLOT(&machine_uart_type, make_new)((mp_obj_t)&machine_uart_type, MP_ARRAY_SIZE(args), 0, args);
+        MP_STATE_VM(dupterm_objs[0]) = MP_OBJ_TYPE_GET_SLOT(&machine_uart_type, make_new)((mp_obj_t)&machine_uart_type, MP_ARRAY_SIZE(args), 0, args);
     }
     #endif
 
diff --git a/ports/nrf/modules/os/modos.c b/ports/nrf/modules/os/modos.c
index ebe5045515..6ff7200a12 100644
--- a/ports/nrf/modules/os/modos.c
+++ b/ports/nrf/modules/os/modos.c
@@ -118,16 +118,16 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom);
 // TODO should accept any object with read/write methods.
 STATIC mp_obj_t os_dupterm(mp_uint_t n_args, const mp_obj_t *args) {
     if (n_args == 0) {
-        if (MP_STATE_PORT(board_stdio_uart) == NULL) {
+        if (MP_STATE_VM(dupterm_objs[0]) == MP_OBJ_NULL) {
             return mp_const_none;
         } else {
-            return MP_STATE_PORT(board_stdio_uart);
+            return MP_STATE_VM(dupterm_objs[0]);
         }
     } else {
         if (args[0] == mp_const_none) {
-            MP_STATE_PORT(board_stdio_uart) = NULL;
+            MP_STATE_VM(dupterm_objs[0]) = MP_OBJ_NULL;
         } else if (mp_obj_get_type(args[0]) == &machine_uart_type) {
-            MP_STATE_PORT(board_stdio_uart) = args[0];
+            MP_STATE_VM(dupterm_objs[0]) = args[0];
         } else {
             mp_raise_ValueError(MP_ERROR_TEXT("need a UART object"));
         }
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 264b0dfe8d..85db263648 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -135,6 +135,7 @@
 
 // Use port specific os module rather than extmod variant.
 #define MICROPY_PY_OS               (0)
+#define MICROPY_PY_OS_DUPTERM       (1)
 
 #define MICROPY_STREAMS_NON_BLOCK   (1)
 #define MICROPY_CAN_OVERRIDE_BUILTINS (1)
diff --git a/ports/nrf/mphalport.c b/ports/nrf/mphalport.c
index 7a51e187b7..f6c934a8b5 100644
--- a/ports/nrf/mphalport.c
+++ b/ports/nrf/mphalport.c
@@ -175,11 +175,11 @@ void mp_hal_set_interrupt_char(int c) {
 #if !MICROPY_PY_BLE_NUS && !MICROPY_HW_USB_CDC
 uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags) {
     uintptr_t ret = 0;
-    if ((poll_flags & MP_STREAM_POLL_RD) && MP_STATE_PORT(board_stdio_uart) != NULL
-        && uart_rx_any(MP_STATE_PORT(board_stdio_uart))) {
+    if ((poll_flags & MP_STREAM_POLL_RD) && MP_STATE_VM(dupterm_objs[0]) != MP_OBJ_NULL
+        && uart_rx_any(MP_STATE_VM(dupterm_objs[0]))) {
         ret |= MP_STREAM_POLL_RD;
     }
-    if ((poll_flags & MP_STREAM_POLL_WR) && MP_STATE_PORT(board_stdio_uart) != NULL) {
+    if ((poll_flags & MP_STREAM_POLL_WR) && MP_STATE_VM(dupterm_objs[0]) != MP_OBJ_NULL) {
         ret |= MP_STREAM_POLL_WR;
     }
     return ret;
@@ -187,8 +187,8 @@ uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags) {
 
 int mp_hal_stdin_rx_chr(void) {
     for (;;) {
-        if (MP_STATE_PORT(board_stdio_uart) != NULL && uart_rx_any(MP_STATE_PORT(board_stdio_uart))) {
-            return uart_rx_char(MP_STATE_PORT(board_stdio_uart));
+        if (MP_STATE_VM(dupterm_objs[0]) != MP_OBJ_NULL && uart_rx_any(MP_STATE_VM(dupterm_objs[0]))) {
+            return uart_rx_char(MP_STATE_VM(dupterm_objs[0]));
         }
         MICROPY_EVENT_POLL_HOOK
     }
@@ -197,14 +197,14 @@ int mp_hal_stdin_rx_chr(void) {
 }
 
 void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
-    if (MP_STATE_PORT(board_stdio_uart) != NULL) {
-        uart_tx_strn(MP_STATE_PORT(board_stdio_uart), str, len);
+    if (MP_STATE_VM(dupterm_objs[0]) != MP_OBJ_NULL) {
+        uart_tx_strn(MP_STATE_VM(dupterm_objs[0]), str, len);
     }
 }
 
 void mp_hal_stdout_tx_strn_cooked(const char *str, mp_uint_t len) {
-    if (MP_STATE_PORT(board_stdio_uart) != NULL) {
-        uart_tx_strn_cooked(MP_STATE_PORT(board_stdio_uart), str, len);
+    if (MP_STATE_VM(dupterm_objs[0]) != MP_OBJ_NULL) {
+        uart_tx_strn_cooked(MP_STATE_VM(dupterm_objs[0]), str, len);
     }
 }
 #endif
@@ -377,5 +377,3 @@ const char *nrfx_error_code_lookup(uint32_t err_code) {
 }
 
 #endif // NRFX_LOG_ENABLED
-
-MP_REGISTER_ROOT_POINTER(struct _machine_uart_obj_t *board_stdio_uart);

From 22d9116c8c53463805dcd30fbeb78fbfa84c0e98 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 29 Nov 2023 12:18:10 +1100
Subject: [PATCH 201/310] nrf: Convert os module to use extmod version.

The os.dupterm() function has changed on this port, it now matches the
semantics used by all other ports (except it's restricted to accept only
machine.UART objects).

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modos.c               |  15 ++++
 ports/nrf/Makefile           |   1 -
 ports/nrf/modules/os/modos.c | 169 +++--------------------------------
 ports/nrf/mpconfigport.h     |  17 +++-
 4 files changed, 42 insertions(+), 160 deletions(-)

diff --git a/extmod/modos.c b/extmod/modos.c
index 6df49d7f84..da14fd81f8 100644
--- a/extmod/modos.c
+++ b/extmod/modos.c
@@ -48,6 +48,13 @@
 #include "extmod/vfs_posix.h"
 #endif
 
+#if MICROPY_MBFS
+#if MICROPY_VFS
+#error "MICROPY_MBFS requires MICROPY_VFS to be disabled"
+#endif
+#include "ports/nrf/modules/os/microbitfs.h"
+#endif
+
 #if MICROPY_PY_OS_UNAME
 #include "genhdr/mpversion.h"
 #endif
@@ -187,6 +194,14 @@ STATIC const mp_rom_map_elem_t os_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_VfsPosix), MP_ROM_PTR(&mp_type_vfs_posix) },
     #endif
     #endif
+
+    #if MICROPY_MBFS
+    // For special micro:bit filesystem only.
+    { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&os_mbfs_listdir_obj) },
+    { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&os_mbfs_ilistdir_obj) },
+    { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&os_mbfs_stat_obj) },
+    { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&os_mbfs_remove_obj) },
+    #endif
 };
 STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table);
 
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index 0a57471849..45e44aed5a 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -324,7 +324,6 @@ DRIVERS_SRC_C += $(addprefix modules/,\
 	machine/timer.c \
 	machine/rtcounter.c \
 	machine/temp.c \
-	os/modos.c \
 	os/microbitfs.c \
 	board/modboard.c \
 	board/led.c \
diff --git a/ports/nrf/modules/os/modos.c b/ports/nrf/modules/os/modos.c
index 6ff7200a12..31bf1b2920 100644
--- a/ports/nrf/modules/os/modos.c
+++ b/ports/nrf/modules/os/modos.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013, 2014 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,84 +24,16 @@
  * THE SOFTWARE.
  */
 
-#include <stdint.h>
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modos.c via MICROPY_PY_OS_INCLUDEFILE.
 
-#include "py/mpstate.h"
 #include "py/runtime.h"
-#include "py/objtuple.h"
-#include "py/objstr.h"
-#include "lib/oofatfs/ff.h"
-#include "lib/oofatfs/diskio.h"
-#include "modules/os/microbitfs.h"
 #include "extmod/modmachine.h"
-#include "extmod/vfs.h"
-#include "extmod/vfs_fat.h"
-#include "extmod/vfs_lfs.h"
-#include "genhdr/mpversion.h"
-
-#if MICROPY_HW_ENABLE_RNG
 #include "drivers/rng.h"
-#endif // MICROPY_HW_ENABLE_RNG
 
-/// \module os - basic "operating system" services
-///
-/// The `os` module contains functions for filesystem access and `urandom`.
-///
-/// The filesystem has `/` as the root directory, and the available physical
-/// drives are accessible from here.  They are currently:
-///
-///     /flash      -- the internal flash filesystem
-///     /sd         -- the SD card (if it exists)
-///
-/// On boot up, the current directory is `/flash` if no SD card is inserted,
-/// otherwise it is `/sd`.
-
-STATIC const qstr os_uname_info_fields[] = {
-    MP_QSTR_sysname, MP_QSTR_nodename,
-    MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine
-};
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "pyboard");
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "pyboard");
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING);
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE);
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME);
-STATIC MP_DEFINE_ATTRTUPLE(
-    os_uname_info_obj,
-    os_uname_info_fields,
-    5,
-    (mp_obj_t)&os_uname_info_sysname_obj,
-    (mp_obj_t)&os_uname_info_nodename_obj,
-    (mp_obj_t)&os_uname_info_release_obj,
-    (mp_obj_t)&os_uname_info_version_obj,
-    (mp_obj_t)&os_uname_info_machine_obj
-);
-
-STATIC mp_obj_t os_uname(void) {
-    return (mp_obj_t)&os_uname_info_obj;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_uname_obj, os_uname);
-
-#if MICROPY_VFS
-/// \function sync()
-/// Sync all filesystems.
-STATIC mp_obj_t os_sync(void) {
-    #if MICROPY_VFS_FAT
-    for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) {
-        // this assumes that vfs->obj is fs_user_mount_t with block device functions
-        disk_ioctl(MP_OBJ_TO_PTR(vfs->obj), CTRL_SYNC, NULL);
-    }
-    #endif
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_0(mod_os_sync_obj, os_sync);
-#endif
-
-#if MICROPY_HW_ENABLE_RNG
-/// \function urandom(n)
-/// Return a bytes object with n random bytes, generated by the hardware
-/// random number generator.
-STATIC mp_obj_t os_urandom(mp_obj_t num) {
+#if MICROPY_PY_OS_URANDOM
+// Return a bytes object with n random bytes, generated by the hardware random number generator.
+STATIC mp_obj_t mp_os_urandom(mp_obj_t num) {
     mp_int_t n = mp_obj_get_int(num);
     vstr_t vstr;
     vstr_init_len(&vstr, n);
@@ -110,91 +42,14 @@ STATIC mp_obj_t os_urandom(mp_obj_t num) {
     }
     return mp_obj_new_bytes_from_vstr(&vstr);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom);
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_urandom_obj, mp_os_urandom);
 #endif
 
-#if MICROPY_PY_MACHINE_UART
-// Get or set the UART object that the REPL is repeated on.
+#if MICROPY_PY_OS_DUPTERM
 // TODO should accept any object with read/write methods.
-STATIC mp_obj_t os_dupterm(mp_uint_t n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        if (MP_STATE_VM(dupterm_objs[0]) == MP_OBJ_NULL) {
-            return mp_const_none;
-        } else {
-            return MP_STATE_VM(dupterm_objs[0]);
-        }
-    } else {
-        if (args[0] == mp_const_none) {
-            MP_STATE_VM(dupterm_objs[0]) = MP_OBJ_NULL;
-        } else if (mp_obj_get_type(args[0]) == &machine_uart_type) {
-            MP_STATE_VM(dupterm_objs[0]) = args[0];
-        } else {
-            mp_raise_ValueError(MP_ERROR_TEXT("need a UART object"));
-        }
-        return mp_const_none;
+void mp_os_dupterm_stream_detached_attached(mp_obj_t stream_detached, mp_obj_t stream_attached) {
+    if (!(stream_attached == mp_const_none || mp_obj_get_type(stream_attached) == &machine_uart_type)) {
+        mp_raise_ValueError(MP_ERROR_TEXT("need a UART object"));
     }
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_os_dupterm_obj, 0, 1, os_dupterm);
-#endif // MICROPY_PY_MACHINE_UART
-
-STATIC const mp_rom_map_elem_t os_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_os) },
-
-    { MP_ROM_QSTR(MP_QSTR_uname), MP_ROM_PTR(&os_uname_obj) },
-
-#if MICROPY_VFS
-    { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) },
-    { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&mp_vfs_ilistdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&mp_vfs_listdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&mp_vfs_mkdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&mp_vfs_remove_obj) },
-    { MP_ROM_QSTR(MP_QSTR_rename), MP_ROM_PTR(&mp_vfs_rename_obj) },
-    { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&mp_vfs_rmdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&mp_vfs_stat_obj) },
-    { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&mp_vfs_statvfs_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unlink), MP_ROM_PTR(&mp_vfs_remove_obj) }, // unlink aliases to remove
-
-    { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&mod_os_sync_obj) },
-
-#elif MICROPY_MBFS
-    { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&os_mbfs_listdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&os_mbfs_ilistdir_obj) }, // uses ~136 bytes
-    { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&os_mbfs_stat_obj) },         // uses ~228 bytes
-    { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&os_mbfs_remove_obj) },
-#endif
-
-    /// \constant sep - separation character used in paths
-    { MP_ROM_QSTR(MP_QSTR_sep), MP_ROM_QSTR(MP_QSTR__slash_) },
-
-#if MICROPY_HW_ENABLE_RNG
-    { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&os_urandom_obj) },
-#endif
-
-    // these are MicroPython extensions
-#if MICROPY_PY_MACHINE_UART
-    { MP_ROM_QSTR(MP_QSTR_dupterm), MP_ROM_PTR(&mod_os_dupterm_obj) },
-#endif
-#if MICROPY_VFS
-    { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) },
-    { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) },
-    #if MICROPY_VFS_FAT
-    { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) },
-    #endif
-    #if MICROPY_VFS_LFS1
-    { MP_ROM_QSTR(MP_QSTR_VfsLfs1), MP_ROM_PTR(&mp_type_vfs_lfs1) },
-    #endif
-    #if MICROPY_VFS_LFS2
-    { MP_ROM_QSTR(MP_QSTR_VfsLfs2), MP_ROM_PTR(&mp_type_vfs_lfs2) },
-    #endif
-#endif
-};
-
-STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table);
-
-const mp_obj_module_t mp_module_os = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t*)&os_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_os, mp_module_os);
+#endif // MICROPY_PY_OS_DUPTERM
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 85db263648..3ab1e0814f 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -76,6 +76,10 @@
 #define MICROPY_PY_ARRAY_SLICE_ASSIGN      (CORE_FEAT)
 #endif
 
+#ifndef MICROPY_PY_SYS_PLATFORM
+#define MICROPY_PY_SYS_PLATFORM            "nrf"
+#endif
+
 #ifndef MICROPY_PY_SYS_STDFILES
 #define MICROPY_PY_SYS_STDFILES            (CORE_FEAT)
 #endif
@@ -92,6 +96,10 @@
 #define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (CORE_FEAT)
 #endif
 
+#ifndef MICROPY_HW_ENABLE_RNG
+#define MICROPY_HW_ENABLE_RNG       (0)
+#endif
+
 #ifndef MICROPY_EMIT_THUMB
 #define MICROPY_EMIT_THUMB          (EXTRA_FEAT)
 #endif
@@ -133,9 +141,14 @@
     #define MICROPY_FATFS_MAX_SS       (4096)
 #endif
 
-// Use port specific os module rather than extmod variant.
-#define MICROPY_PY_OS               (0)
+#define MICROPY_PY_OS               (1)
+#define MICROPY_PY_OS_INCLUDEFILE   "ports/nrf/modules/os/modos.c"
 #define MICROPY_PY_OS_DUPTERM       (1)
+#define MICROPY_PY_OS_DUPTERM_STREAM_DETACHED_ATTACHED (1)
+#define MICROPY_PY_OS_SEP           (1)
+#define MICROPY_PY_OS_SYNC          (MICROPY_VFS)
+#define MICROPY_PY_OS_UNAME         (1)
+#define MICROPY_PY_OS_URANDOM       (MICROPY_HW_ENABLE_RNG)
 
 #define MICROPY_STREAMS_NON_BLOCK   (1)
 #define MICROPY_CAN_OVERRIDE_BUILTINS (1)

From 1c0e4644c7c9a9bc627b0a0197bc5702b43043c1 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 29 Nov 2023 13:19:28 +1100
Subject: [PATCH 202/310] cc3200: Convert dupterm to use common extmod
 implementation.

Tested on a WIPY.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/cc3200/ftp/ftp.c        |  1 -
 ports/cc3200/hal/cc3200_hal.c | 33 +++++++-----------------
 ports/cc3200/mods/modos.c     | 48 ++---------------------------------
 ports/cc3200/mods/modos.h     | 47 ----------------------------------
 ports/cc3200/mods/pybuart.c   |  3 +--
 ports/cc3200/mpconfigport.h   |  1 +
 ports/cc3200/mptask.c         |  4 ---
 7 files changed, 13 insertions(+), 124 deletions(-)
 delete mode 100644 ports/cc3200/mods/modos.h

diff --git a/ports/cc3200/ftp/ftp.c b/ports/cc3200/ftp/ftp.c
index 5d4fc6fb5f..fc071fc951 100644
--- a/ports/cc3200/ftp/ftp.c
+++ b/ports/cc3200/ftp/ftp.c
@@ -48,7 +48,6 @@
 #include "fifo.h"
 #include "socketfifo.h"
 #include "updater.h"
-#include "modos.h"
 
 /******************************************************************************
  DEFINE PRIVATE CONSTANTS
diff --git a/ports/cc3200/hal/cc3200_hal.c b/ports/cc3200/hal/cc3200_hal.c
index 4d9d7647d3..b75a40151f 100644
--- a/ports/cc3200/hal/cc3200_hal.c
+++ b/ports/cc3200/hal/cc3200_hal.c
@@ -36,6 +36,7 @@
 #include "py/mphal.h"
 #include "py/runtime.h"
 #include "py/objstr.h"
+#include "extmod/misc.h"
 #include "inc/hw_types.h"
 #include "inc/hw_ints.h"
 #include "inc/hw_nvic.h"
@@ -49,7 +50,6 @@
 #include "pybuart.h"
 #include "utils.h"
 #include "irq.h"
-#include "modos.h"
 
 #ifdef USE_FREERTOS
 #include "FreeRTOS.h"
@@ -142,14 +142,7 @@ void mp_hal_delay_ms(mp_uint_t delay) {
 }
 
 void mp_hal_stdout_tx_strn(const char *str, size_t len) {
-    if (MP_STATE_PORT(os_term_dup_obj)) {
-        if (mp_obj_is_type(MP_STATE_PORT(os_term_dup_obj)->stream_o, &pyb_uart_type)) {
-            uart_tx_strn(MP_STATE_PORT(os_term_dup_obj)->stream_o, str, len);
-        } else {
-            MP_STATE_PORT(os_term_dup_obj)->write[2] = mp_obj_new_str_of_type(&mp_type_str, (const byte *)str, len);
-            mp_call_method_n_kw(1, 0, MP_STATE_PORT(os_term_dup_obj)->write);
-        }
-    }
+    mp_os_dupterm_tx_strn(str, len);
     // and also to telnet
     telnet_tx_strn(str, len);
 }
@@ -159,22 +152,14 @@ int mp_hal_stdin_rx_chr(void) {
         // read telnet first
         if (telnet_rx_any()) {
             return telnet_rx_char();
-        } else if (MP_STATE_PORT(os_term_dup_obj)) { // then the stdio_dup
-            if (mp_obj_is_type(MP_STATE_PORT(os_term_dup_obj)->stream_o, &pyb_uart_type)) {
-                if (uart_rx_any(MP_STATE_PORT(os_term_dup_obj)->stream_o)) {
-                    return uart_rx_char(MP_STATE_PORT(os_term_dup_obj)->stream_o);
-                }
-            } else {
-                MP_STATE_PORT(os_term_dup_obj)->read[2] = mp_obj_new_int(1);
-                mp_obj_t data = mp_call_method_n_kw(1, 0, MP_STATE_PORT(os_term_dup_obj)->read);
-                // data len is > 0
-                if (mp_obj_is_true(data)) {
-                    mp_buffer_info_t bufinfo;
-                    mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ);
-                    return ((int *)(bufinfo.buf))[0];
-                }
-            }
         }
+
+        // then dupterm
+        int dupterm_c = mp_os_dupterm_rx_chr();
+        if (dupterm_c >= 0) {
+            return dupterm_c;
+        }
+
         mp_hal_delay_ms(1);
     }
 }
diff --git a/ports/cc3200/mods/modos.c b/ports/cc3200/mods/modos.c
index 1a854750f2..5228d1f4ba 100644
--- a/ports/cc3200/mods/modos.c
+++ b/ports/cc3200/mods/modos.c
@@ -35,8 +35,8 @@
 #include "lib/oofatfs/ff.h"
 #include "lib/oofatfs/diskio.h"
 #include "genhdr/mpversion.h"
-#include "modos.h"
 #include "sflash_diskio.h"
+#include "extmod/misc.h"
 #include "extmod/vfs.h"
 #include "extmod/vfs_fat.h"
 #include "random.h"
@@ -55,25 +55,6 @@
 ///
 /// On boot up, the current directory is `/flash`.
 
-/******************************************************************************
- DECLARE PRIVATE DATA
- ******************************************************************************/
-STATIC os_term_dup_obj_t os_term_dup_obj;
-
-/******************************************************************************
- DEFINE PUBLIC FUNCTIONS
- ******************************************************************************/
-
-void osmount_unmount_all (void) {
-    //TODO
-    /*
-    for (mp_uint_t i = 0; i < MP_STATE_PORT(mount_obj_list).len; i++) {
-        os_fs_mount_t *mount_obj = ((os_fs_mount_t *)(MP_STATE_PORT(mount_obj_list).items[i]));
-        unmount(mount_obj);
-    }
-    */
-}
-
 /******************************************************************************/
 // MicroPython bindings
 //
@@ -120,31 +101,6 @@ STATIC mp_obj_t os_urandom(mp_obj_t num) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom);
 
-STATIC mp_obj_t os_dupterm(uint n_args, const mp_obj_t *args) {
-    if (n_args == 0) {
-        if (MP_STATE_PORT(os_term_dup_obj) == MP_OBJ_NULL) {
-            return mp_const_none;
-        } else {
-            return MP_STATE_PORT(os_term_dup_obj)->stream_o;
-        }
-    } else {
-        mp_obj_t stream_o = args[0];
-        if (stream_o == mp_const_none) {
-            MP_STATE_PORT(os_term_dup_obj) = MP_OBJ_NULL;
-        } else {
-            if (!mp_obj_is_type(stream_o, &pyb_uart_type)) {
-                // must be a stream-like object providing at least read and write methods
-                mp_load_method(stream_o, MP_QSTR_read, os_term_dup_obj.read);
-                mp_load_method(stream_o, MP_QSTR_write, os_term_dup_obj.write);
-            }
-            os_term_dup_obj.stream_o = stream_o;
-            MP_STATE_PORT(os_term_dup_obj) = &os_term_dup_obj;
-        }
-        return mp_const_none;
-    }
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(os_dupterm_obj, 0, 1, os_dupterm);
-
 STATIC const mp_rom_map_elem_t os_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR___name__),        MP_ROM_QSTR(MP_QSTR_os) },
 
@@ -170,7 +126,7 @@ STATIC const mp_rom_map_elem_t os_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_mount),           MP_ROM_PTR(&mp_vfs_mount_obj) },
     { MP_ROM_QSTR(MP_QSTR_umount),          MP_ROM_PTR(&mp_vfs_umount_obj) },
     { MP_ROM_QSTR(MP_QSTR_VfsFat),          MP_ROM_PTR(&mp_fat_vfs_type) },
-    { MP_ROM_QSTR(MP_QSTR_dupterm),         MP_ROM_PTR(&os_dupterm_obj) },
+    { MP_ROM_QSTR(MP_QSTR_dupterm),         MP_ROM_PTR(&mp_os_dupterm_obj) },
 };
 
 STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table);
diff --git a/ports/cc3200/mods/modos.h b/ports/cc3200/mods/modos.h
deleted file mode 100644
index 5fa2a967d4..0000000000
--- a/ports/cc3200/mods/modos.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_MODS_MODOS_H
-#define MICROPY_INCLUDED_CC3200_MODS_MODOS_H
-
-#include "py/obj.h"
-
-/******************************************************************************
- DEFINE PUBLIC TYPES
- ******************************************************************************/
-
-typedef struct _os_term_dup_obj_t {
-    mp_obj_t stream_o;
-    mp_obj_t read[3];
-    mp_obj_t write[3];
-} os_term_dup_obj_t;
-
-/******************************************************************************
- DECLARE PUBLIC FUNCTIONS
- ******************************************************************************/
-void osmount_unmount_all (void);
-
-#endif // MICROPY_INCLUDED_CC3200_MODS_MODOS_H
diff --git a/ports/cc3200/mods/pybuart.c b/ports/cc3200/mods/pybuart.c
index 5d6ad07527..c9a753da04 100644
--- a/ports/cc3200/mods/pybuart.c
+++ b/ports/cc3200/mods/pybuart.c
@@ -50,7 +50,6 @@
 #include "pin.h"
 #include "pybpin.h"
 #include "pins.h"
-#include "modos.h"
 
 /// \moduleref pyb
 /// \class UART - duplex serial communication bus
@@ -249,7 +248,7 @@ STATIC void UARTGenericIntHandler(uint32_t uart_id) {
         MAP_UARTIntClear(self->reg, UART_INT_RX | UART_INT_RT);
         while (UARTCharsAvail(self->reg)) {
             int data = MAP_UARTCharGetNonBlocking(self->reg);
-            if (MP_STATE_PORT(os_term_dup_obj) && MP_STATE_PORT(os_term_dup_obj)->stream_o == self && data == mp_interrupt_char) {
+            if (MP_STATE_VM(dupterm_objs[0]) == MP_OBJ_FROM_PTR(self) && data == mp_interrupt_char) {
                 // raise an exception when interrupts are finished
                 mp_sched_keyboard_interrupt();
             } else { // there's always a read buffer available
diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h
index 64098c3fc0..cb0167ae09 100644
--- a/ports/cc3200/mpconfigport.h
+++ b/ports/cc3200/mpconfigport.h
@@ -115,6 +115,7 @@
 #define MICROPY_PY_RE                               (1)
 #define MICROPY_PY_HEAPQ                            (0)
 #define MICROPY_PY_HASHLIB                          (0)
+#define MICROPY_PY_OS_DUPTERM                       (1)
 #define MICROPY_PY_SELECT                           (1)
 #define MICROPY_PY_TIME                             (1)
 #define MICROPY_PY_TIME_GMTIME_LOCALTIME_MKTIME     (1)
diff --git a/ports/cc3200/mptask.c b/ports/cc3200/mptask.c
index abf8484b0d..83b5c091b8 100644
--- a/ports/cc3200/mptask.c
+++ b/ports/cc3200/mptask.c
@@ -70,7 +70,6 @@
 #include "cryptohash.h"
 #include "mpirq.h"
 #include "updater.h"
-#include "modos.h"
 #include "antenna.h"
 #include "task.h"
 
@@ -247,9 +246,6 @@ soft_reset_exit:
     // clean-up the user socket space
     modusocket_close_all_user_sockets();
 
-    // unmount all user file systems
-    osmount_unmount_all();
-
     // wait for pending transactions to complete
     mp_hal_delay_ms(20);
 

From 49fa3ce65deb1b6de75a210698e46e342ff73bca Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 30 Nov 2023 17:12:38 +1100
Subject: [PATCH 203/310] cc3200: Convert os module to use extmod version.

Changes:
- os.uname() is removed to save space; sys.version and sys.implementation
  can be used instead.
- os.sync() now uses the common extmod version and syncs by calling the FAT
  FS sync function, which eventually calls sflash_disk_flush().

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/cc3200/application.mk |   1 -
 ports/cc3200/mods/modos.c   | 106 ++----------------------------------
 ports/cc3200/mpconfigport.h |   4 ++
 3 files changed, 9 insertions(+), 102 deletions(-)

diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index 4a6828ea86..b40cfcd07c 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -77,7 +77,6 @@ APP_MISC_SRC_C = $(addprefix misc/,\
 
 APP_MODS_SRC_C = $(addprefix mods/,\
 	modnetwork.c \
-	modos.c \
 	modsocket.c \
 	modssl.c \
 	modwipy.c \
diff --git a/ports/cc3200/mods/modos.c b/ports/cc3200/mods/modos.c
index 5228d1f4ba..c62c5e22c4 100644
--- a/ports/cc3200/mods/modos.c
+++ b/ports/cc3200/mods/modos.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2013, 2014 Damien P. George
+ * Copyright (c) 2013-2023 Damien P. George
  * Copyright (c) 2015 Daniel Campora
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -25,72 +25,13 @@
  * THE SOFTWARE.
  */
 
-#include <stdint.h>
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modos.c via MICROPY_PY_OS_INCLUDEFILE.
 
-#include "py/objtuple.h"
-#include "py/objstr.h"
 #include "py/runtime.h"
-#include "shared/timeutils/timeutils.h"
-#include "lib/oofatfs/ff.h"
-#include "lib/oofatfs/diskio.h"
-#include "genhdr/mpversion.h"
-#include "sflash_diskio.h"
-#include "extmod/misc.h"
-#include "extmod/vfs.h"
-#include "extmod/vfs_fat.h"
 #include "random.h"
-#include "version.h"
-#include "pybsd.h"
-#include "pybuart.h"
 
-/// \module os - basic "operating system" services
-///
-/// The `os` module contains functions for filesystem access and `urandom`.
-///
-/// The filesystem has `/` as the root directory, and the available physical
-/// drives are accessible from here.  They are currently:
-///
-///     /flash      -- the serial flash filesystem
-///
-/// On boot up, the current directory is `/flash`.
-
-/******************************************************************************/
-// MicroPython bindings
-//
-
-STATIC const qstr os_uname_info_fields[] = {
-    MP_QSTR_sysname, MP_QSTR_nodename,
-    MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine
-};
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, MICROPY_PY_SYS_PLATFORM);
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, MICROPY_PY_SYS_PLATFORM);
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, WIPY_SW_VERSION_NUMBER);
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE);
-STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME);
-STATIC MP_DEFINE_ATTRTUPLE(
-    os_uname_info_obj,
-    os_uname_info_fields,
-    5,
-    (mp_obj_t)&os_uname_info_sysname_obj,
-    (mp_obj_t)&os_uname_info_nodename_obj,
-    (mp_obj_t)&os_uname_info_release_obj,
-    (mp_obj_t)&os_uname_info_version_obj,
-    (mp_obj_t)&os_uname_info_machine_obj
-);
-
-STATIC mp_obj_t os_uname(void) {
-    return (mp_obj_t)&os_uname_info_obj;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_uname_obj, os_uname);
-
-STATIC mp_obj_t os_sync(void) {
-    sflash_disk_flush();
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_sync_obj, os_sync);
-
-STATIC mp_obj_t os_urandom(mp_obj_t num) {
+STATIC mp_obj_t mp_os_urandom(mp_obj_t num) {
     mp_int_t n = mp_obj_get_int(num);
     vstr_t vstr;
     vstr_init_len(&vstr, n);
@@ -99,41 +40,4 @@ STATIC mp_obj_t os_urandom(mp_obj_t num) {
     }
     return mp_obj_new_bytes_from_vstr(&vstr);
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom);
-
-STATIC const mp_rom_map_elem_t os_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR___name__),        MP_ROM_QSTR(MP_QSTR_os) },
-
-    { MP_ROM_QSTR(MP_QSTR_uname),           MP_ROM_PTR(&os_uname_obj) },
-
-    { MP_ROM_QSTR(MP_QSTR_chdir),           MP_ROM_PTR(&mp_vfs_chdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_getcwd),          MP_ROM_PTR(&mp_vfs_getcwd_obj) },
-    { MP_ROM_QSTR(MP_QSTR_ilistdir),        MP_ROM_PTR(&mp_vfs_ilistdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_listdir),         MP_ROM_PTR(&mp_vfs_listdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_mkdir),           MP_ROM_PTR(&mp_vfs_mkdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_rename),          MP_ROM_PTR(&mp_vfs_rename_obj) },
-    { MP_ROM_QSTR(MP_QSTR_remove),          MP_ROM_PTR(&mp_vfs_remove_obj) },
-    { MP_ROM_QSTR(MP_QSTR_rmdir),           MP_ROM_PTR(&mp_vfs_rmdir_obj) },
-    { MP_ROM_QSTR(MP_QSTR_stat),            MP_ROM_PTR(&mp_vfs_stat_obj) },
-    { MP_ROM_QSTR(MP_QSTR_unlink),          MP_ROM_PTR(&mp_vfs_remove_obj) },     // unlink aliases to remove
-
-    { MP_ROM_QSTR(MP_QSTR_sync),            MP_ROM_PTR(&os_sync_obj) },
-    { MP_ROM_QSTR(MP_QSTR_urandom),         MP_ROM_PTR(&os_urandom_obj) },
-
-    // MicroPython additions
-    // removed: mkfs
-    // renamed: unmount -> umount
-    { MP_ROM_QSTR(MP_QSTR_mount),           MP_ROM_PTR(&mp_vfs_mount_obj) },
-    { MP_ROM_QSTR(MP_QSTR_umount),          MP_ROM_PTR(&mp_vfs_umount_obj) },
-    { MP_ROM_QSTR(MP_QSTR_VfsFat),          MP_ROM_PTR(&mp_fat_vfs_type) },
-    { MP_ROM_QSTR(MP_QSTR_dupterm),         MP_ROM_PTR(&mp_os_dupterm_obj) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table);
-
-const mp_obj_module_t mp_module_os = {
-    .base = { &mp_type_module },
-    .globals = (mp_obj_dict_t*)&os_module_globals,
-};
-
-MP_REGISTER_EXTENSIBLE_MODULE(MP_QSTR_os, mp_module_os);
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_urandom_obj, mp_os_urandom);
diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h
index cb0167ae09..d9087efdd5 100644
--- a/ports/cc3200/mpconfigport.h
+++ b/ports/cc3200/mpconfigport.h
@@ -115,7 +115,11 @@
 #define MICROPY_PY_RE                               (1)
 #define MICROPY_PY_HEAPQ                            (0)
 #define MICROPY_PY_HASHLIB                          (0)
+#define MICROPY_PY_OS                               (1)
+#define MICROPY_PY_OS_INCLUDEFILE                   "ports/cc3200/mods/modos.c"
 #define MICROPY_PY_OS_DUPTERM                       (1)
+#define MICROPY_PY_OS_SYNC                          (1)
+#define MICROPY_PY_OS_URANDOM                       (1)
 #define MICROPY_PY_SELECT                           (1)
 #define MICROPY_PY_TIME                             (1)
 #define MICROPY_PY_TIME_GMTIME_LOCALTIME_MKTIME     (1)

From 7a6489aaa51f0981b7920445667bda49f18dde36 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 1 Dec 2023 13:59:12 +1100
Subject: [PATCH 204/310] cc3200: Eliminate dependency on stm32's irq.h.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/cc3200/hal/cc3200_asm.h | 12 ++++++++++--
 ports/cc3200/hal/cc3200_hal.c |  1 -
 ports/cc3200/mpthreadport.c   |  1 -
 ports/cc3200/telnet/telnet.c  |  1 -
 4 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/ports/cc3200/hal/cc3200_asm.h b/ports/cc3200/hal/cc3200_asm.h
index 742c9a6f7f..2a9fc506ce 100644
--- a/ports/cc3200/hal/cc3200_asm.h
+++ b/ports/cc3200/hal/cc3200_asm.h
@@ -32,8 +32,11 @@
 //
 // Note on IRQ state: you should not need to know the specific
 // value of the state variable, but rather just pass the return
-// value from disable_irq back to enable_irq.  If you really need
-// to know the machine-specific values, see irq.h.
+// value from disable_irq back to enable_irq.
+
+// these states correspond to values from query_irq, enable_irq and disable_irq
+#define IRQ_STATE_DISABLED (0x00000001)
+#define IRQ_STATE_ENABLED  (0x00000000)
 
 #ifndef __disable_irq
 #define __disable_irq() __asm__ volatile ("cpsid i");
@@ -79,6 +82,11 @@ static inline void __set_BASEPRI(uint32_t value) {
     __asm volatile ("msr basepri, %0" : : "r" (value) : "memory");
 }
 
+__attribute__(( always_inline ))
+static inline uint32_t query_irq(void) {
+    return __get_PRIMASK();
+}
+
 __attribute__(( always_inline ))
 static inline void enable_irq(mp_uint_t state) {
     __set_PRIMASK(state);
diff --git a/ports/cc3200/hal/cc3200_hal.c b/ports/cc3200/hal/cc3200_hal.c
index b75a40151f..56dd2b2b82 100644
--- a/ports/cc3200/hal/cc3200_hal.c
+++ b/ports/cc3200/hal/cc3200_hal.c
@@ -49,7 +49,6 @@
 #include "telnet.h"
 #include "pybuart.h"
 #include "utils.h"
-#include "irq.h"
 
 #ifdef USE_FREERTOS
 #include "FreeRTOS.h"
diff --git a/ports/cc3200/mpthreadport.c b/ports/cc3200/mpthreadport.c
index 5b4771f395..c3f5f38d06 100644
--- a/ports/cc3200/mpthreadport.c
+++ b/ports/cc3200/mpthreadport.c
@@ -32,7 +32,6 @@
 #include "py/mphal.h"
 #include "mptask.h"
 #include "task.h"
-#include "irq.h"
 
 #if MICROPY_PY_THREAD
 
diff --git a/ports/cc3200/telnet/telnet.c b/ports/cc3200/telnet/telnet.c
index 86843c78f6..595be06f2f 100644
--- a/ports/cc3200/telnet/telnet.c
+++ b/ports/cc3200/telnet/telnet.c
@@ -37,7 +37,6 @@
 #include "debug.h"
 #include "serverstask.h"
 #include "genhdr/mpversion.h"
-#include "irq.h"
 
 /******************************************************************************
  DEFINE PRIVATE CONSTANTS

From 7d784e53853db7935112d5952aee13c19b539255 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 1 Dec 2023 13:56:34 +1100
Subject: [PATCH 205/310] cc3200/application.mk: Don't add stm32 to build
 include path.

Or this port may end up accidentally including unwanted headers from stm32.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/cc3200/application.mk | 1 -
 ports/cc3200/mods/pybadc.c  | 2 +-
 ports/cc3200/mods/pybi2c.c  | 2 +-
 ports/cc3200/mods/pybspi.c  | 2 +-
 4 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
index b40cfcd07c..6f4452da6b 100644
--- a/ports/cc3200/application.mk
+++ b/ports/cc3200/application.mk
@@ -18,7 +18,6 @@ APP_INC += -Iutil
 APP_INC += -Ibootmgr
 APP_INC += -I$(BUILD)
 APP_INC += -I$(BUILD)/genhdr
-APP_INC += -I$(TOP)/ports/stm32
 
 APP_CPPDEFINES = -Dgcc -DTARGET_IS_CC3200 -DSL_FULL -DUSE_FREERTOS
 
diff --git a/ports/cc3200/mods/pybadc.c b/ports/cc3200/mods/pybadc.c
index 7466428256..6f9f1f19ae 100644
--- a/ports/cc3200/mods/pybadc.c
+++ b/ports/cc3200/mods/pybadc.c
@@ -32,7 +32,7 @@
 #include "py/binary.h"
 #include "py/gc.h"
 #include "py/mperrno.h"
-#include "bufhelper.h"
+#include "ports/stm32/bufhelper.h"
 #include "inc/hw_types.h"
 #include "inc/hw_adc.h"
 #include "inc/hw_ints.h"
diff --git a/ports/cc3200/mods/pybi2c.c b/ports/cc3200/mods/pybi2c.c
index 5d77dc8367..a413eddeb2 100644
--- a/ports/cc3200/mods/pybi2c.c
+++ b/ports/cc3200/mods/pybi2c.c
@@ -31,7 +31,7 @@
 #include "py/runtime.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
-#include "bufhelper.h"
+#include "ports/stm32/bufhelper.h"
 #include "inc/hw_types.h"
 #include "inc/hw_i2c.h"
 #include "inc/hw_ints.h"
diff --git a/ports/cc3200/mods/pybspi.c b/ports/cc3200/mods/pybspi.c
index 61086ec2e1..fa38f0c657 100644
--- a/ports/cc3200/mods/pybspi.c
+++ b/ports/cc3200/mods/pybspi.c
@@ -30,7 +30,7 @@
 
 #include "py/runtime.h"
 #include "py/mperrno.h"
-#include "bufhelper.h"
+#include "ports/stm32/bufhelper.h"
 #include "inc/hw_types.h"
 #include "inc/hw_mcspi.h"
 #include "inc/hw_ints.h"

From bfdf500ea5756a4f0f2f8b384389b6f70af69526 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 1 Dec 2023 13:24:19 +1100
Subject: [PATCH 206/310] py/mphal: Move configuration of ATOMIC_SECTION macros
 to mphal.h.

MICROPY_BEGIN_ATOMIC_SECTION/MICROPY_END_ATOMIC_SECTION belong more to the
MicroPython HAL rather than build configuration settings, so move their
default configuration to py/mphal.h, and require all users of these macros
to include py/mphal.h (here, py/objexcept.c and py/scheduler.c).

This helps ports separate configuration from their HAL implementations, and
can improve build times (because mpconfig.h is included everywhere, whereas
mphal.h is not).

Signed-off-by: Damien George <damien@micropython.org>
---
 py/mpconfig.h  | 8 --------
 py/mphal.h     | 8 ++++++++
 py/objexcept.c | 2 ++
 py/scheduler.c | 1 +
 4 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/py/mpconfig.h b/py/mpconfig.h
index 6995600abe..d14b1aa044 100644
--- a/py/mpconfig.h
+++ b/py/mpconfig.h
@@ -1850,14 +1850,6 @@ typedef double mp_float_t;
 #endif
 #endif
 
-// On embedded platforms, these will typically enable/disable irqs.
-#ifndef MICROPY_BEGIN_ATOMIC_SECTION
-#define MICROPY_BEGIN_ATOMIC_SECTION() (0)
-#endif
-#ifndef MICROPY_END_ATOMIC_SECTION
-#define MICROPY_END_ATOMIC_SECTION(state) (void)(state)
-#endif
-
 // Allow to override static modifier for global objects, e.g. to use with
 // object code analysis tools which don't support static symbols.
 #ifndef STATIC
diff --git a/py/mphal.h b/py/mphal.h
index 0d4b1224e5..19fceef718 100644
--- a/py/mphal.h
+++ b/py/mphal.h
@@ -35,6 +35,14 @@
 #include <mphalport.h>
 #endif
 
+// On embedded platforms, these will typically enable/disable irqs.
+#ifndef MICROPY_BEGIN_ATOMIC_SECTION
+#define MICROPY_BEGIN_ATOMIC_SECTION() (0)
+#endif
+#ifndef MICROPY_END_ATOMIC_SECTION
+#define MICROPY_END_ATOMIC_SECTION(state) (void)(state)
+#endif
+
 #ifndef mp_hal_stdio_poll
 uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags);
 #endif
diff --git a/py/objexcept.c b/py/objexcept.c
index a54b81370d..fe74458cae 100644
--- a/py/objexcept.c
+++ b/py/objexcept.c
@@ -81,6 +81,8 @@ void mp_init_emergency_exception_buf(void) {
 #else
 #define mp_emergency_exception_buf_size MP_STATE_VM(mp_emergency_exception_buf_size)
 
+#include "py/mphal.h" // for MICROPY_BEGIN_ATOMIC_SECTION/MICROPY_END_ATOMIC_SECTION
+
 void mp_init_emergency_exception_buf(void) {
     mp_emergency_exception_buf_size = 0;
     MP_STATE_VM(mp_emergency_exception_buf) = NULL;
diff --git a/py/scheduler.c b/py/scheduler.c
index 165b26dc86..b9a43bfbdb 100644
--- a/py/scheduler.c
+++ b/py/scheduler.c
@@ -26,6 +26,7 @@
 
 #include <stdio.h>
 
+#include "py/mphal.h"
 #include "py/runtime.h"
 
 // Schedules an exception on the main thread (for exceptions "thrown" by async

From ad806df857b52e9814dbd857b14f09b63eb847fe Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 1 Dec 2023 13:29:42 +1100
Subject: [PATCH 207/310] ports: Move definitions of ATOMIC_SECTION macros to
 mphalport.h.

Also move MICROPY_PY_PENDSV_ENTER/REENTER/EXIT to mphalport.h, for ports
where these are not already there.

This helps separate the hardware implementation of these macros from the
MicroPython configuration (eg for renesas-ra and stm32, the IRQ static
inline helper functions can now be moved to irq.h).

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/cc3200/hal/cc3200_hal.h   |  7 +++++++
 ports/cc3200/mods/pybrtc.c      |  2 +-
 ports/cc3200/mpconfigport.h     |  6 ------
 ports/esp32/mpconfigport.h      |  7 -------
 ports/esp32/mphalport.h         |  7 +++++++
 ports/esp8266/esp_mphal.h       |  6 ++++++
 ports/esp8266/mpconfigport.h    |  6 ------
 ports/mimxrt/mpconfigport.h     | 22 ----------------------
 ports/mimxrt/mphalport.h        | 22 ++++++++++++++++++++++
 ports/renesas-ra/irq.h          | 17 ++++++++++++++++-
 ports/renesas-ra/mpconfigport.h | 21 ---------------------
 ports/renesas-ra/mphalport.h    |  3 +++
 ports/rp2/modrp2.c              |  1 +
 ports/rp2/mpconfigport.h        |  6 ------
 ports/rp2/mphalport.h           |  7 +++++++
 ports/rp2/mpthreadport.c        |  1 +
 ports/rp2/rp2_flash.c           |  1 +
 ports/samd/mpconfigport.h       | 12 ------------
 ports/samd/mphalport.h          | 13 +++++++++++++
 ports/stm32/irq.h               | 17 ++++++++++++++++-
 ports/stm32/mpconfigport.h      | 27 ---------------------------
 ports/stm32/mphalport.h         | 13 ++++++++++++-
 ports/stm32/mpu.h               |  2 ++
 ports/unix/mpconfigport.h       |  6 ------
 ports/unix/mphalport.h          |  6 ++++++
 ports/zephyr/mpconfigport.h     |  3 ---
 ports/zephyr/mphalport.h        |  3 +++
 27 files changed, 124 insertions(+), 120 deletions(-)

diff --git a/ports/cc3200/hal/cc3200_hal.h b/ports/cc3200/hal/cc3200_hal.h
index 9e57d39e2e..d07a9a1703 100644
--- a/ports/cc3200/hal/cc3200_hal.h
+++ b/ports/cc3200/hal/cc3200_hal.h
@@ -30,6 +30,10 @@
 #include "hal/utils.h"
 #include "hal/systick.h"
 
+// assembly functions to handle critical sections, interrupt
+// disabling/enabling and sleep mode enter/exit
+#include "cc3200_asm.h"
+
 /******************************************************************************
  DEFINE CONSTANTS
  ******************************************************************************/
@@ -55,6 +59,9 @@
                                               " isb \n");   \
                                      }
 
+#define MICROPY_BEGIN_ATOMIC_SECTION()              disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state)           enable_irq(state)
+
 /******************************************************************************
  DECLARE PUBLIC FUNCTIONS
  ******************************************************************************/
diff --git a/ports/cc3200/mods/pybrtc.c b/ports/cc3200/mods/pybrtc.c
index e79fb29d00..340e86e158 100644
--- a/ports/cc3200/mods/pybrtc.c
+++ b/ports/cc3200/mods/pybrtc.c
@@ -25,7 +25,7 @@
  * THE SOFTWARE.
  */
 
-#include "py/mpconfig.h"
+#include "py/mphal.h"
 #include "py/obj.h"
 #include "py/runtime.h"
 #include "py/mperrno.h"
diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h
index d9087efdd5..fe579c0874 100644
--- a/ports/cc3200/mpconfigport.h
+++ b/ports/cc3200/mpconfigport.h
@@ -161,14 +161,8 @@ typedef int32_t mp_int_t;                           // must be pointer size
 typedef unsigned int mp_uint_t;                     // must be pointer size
 typedef long mp_off_t;
 
-#define MICROPY_BEGIN_ATOMIC_SECTION()              disable_irq()
-#define MICROPY_END_ATOMIC_SECTION(state)           enable_irq(state)
 #define MICROPY_EVENT_POLL_HOOK                     __WFI();
 
-// assembly functions to handle critical sections, interrupt
-// disabling/enabling and sleep mode enter/exit
-#include "cc3200_asm.h"
-
 // We need to provide a declaration/definition of alloca()
 #include <alloca.h>
 
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 35943c47b6..ff6f6ab8d0 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -187,13 +187,6 @@ void *esp_native_code_commit(void *, size_t, void *);
 #define MP_PLAT_COMMIT_EXEC(buf, len, reloc) esp_native_code_commit(buf, len, reloc)
 #define MP_SSIZE_MAX (0x7fffffff)
 
-// Note: these "critical nested" macros do not ensure cross-CPU exclusion,
-// the only disable interrupts on the current CPU.  To full manage exclusion
-// one should use portENTER_CRITICAL/portEXIT_CRITICAL instead.
-#include "freertos/FreeRTOS.h"
-#define MICROPY_BEGIN_ATOMIC_SECTION() portSET_INTERRUPT_MASK_FROM_ISR()
-#define MICROPY_END_ATOMIC_SECTION(state) portCLEAR_INTERRUPT_MASK_FROM_ISR(state)
-
 #if MICROPY_PY_SOCKET_EVENTS
 #define MICROPY_PY_SOCKET_EVENTS_HANDLER extern void socket_events_handler(void); socket_events_handler();
 #else
diff --git a/ports/esp32/mphalport.h b/ports/esp32/mphalport.h
index d77e2dd0df..9a7c39487d 100644
--- a/ports/esp32/mphalport.h
+++ b/ports/esp32/mphalport.h
@@ -63,6 +63,13 @@ void check_esp_err_(esp_err_t code);
 void check_esp_err_(esp_err_t code, const char *func, const int line, const char *file);
 #endif
 
+// Note: these "critical nested" macros do not ensure cross-CPU exclusion,
+// the only disable interrupts on the current CPU.  To full manage exclusion
+// one should use portENTER_CRITICAL/portEXIT_CRITICAL instead.
+#include "freertos/FreeRTOS.h"
+#define MICROPY_BEGIN_ATOMIC_SECTION() portSET_INTERRUPT_MASK_FROM_ISR()
+#define MICROPY_END_ATOMIC_SECTION(state) portCLEAR_INTERRUPT_MASK_FROM_ISR(state)
+
 uint32_t mp_hal_ticks_us(void);
 __attribute__((always_inline)) static inline uint32_t mp_hal_ticks_cpu(void) {
     uint32_t ccount;
diff --git a/ports/esp8266/esp_mphal.h b/ports/esp8266/esp_mphal.h
index b0351877e8..73a36a4b65 100644
--- a/ports/esp8266/esp_mphal.h
+++ b/ports/esp8266/esp_mphal.h
@@ -29,6 +29,9 @@
 #include "shared/runtime/interrupt_char.h"
 #include "xtirq.h"
 
+#define MICROPY_BEGIN_ATOMIC_SECTION() esp_disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state) esp_enable_irq(state)
+
 void mp_sched_keyboard_interrupt(void);
 
 struct _mp_print_t;
@@ -66,6 +69,9 @@ uint32_t mp_hal_get_cpu_freq(void);
 void uart_task_init();
 void dupterm_task_init();
 
+uint32_t esp_disable_irq(void);
+void esp_enable_irq(uint32_t state);
+
 void ets_event_poll(void);
 #define ETS_POLL_WHILE(cond) { while (cond) ets_event_poll(); }
 
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index ad9fefe0cd..07586a0ea5 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -127,9 +127,6 @@
 #define MICROPY_VM_HOOK_LOOP MICROPY_VM_HOOK_POLL
 #define MICROPY_VM_HOOK_RETURN MICROPY_VM_HOOK_POLL
 
-#define MICROPY_BEGIN_ATOMIC_SECTION() esp_disable_irq()
-#define MICROPY_END_ATOMIC_SECTION(state) esp_enable_irq(state)
-
 // type definitions for the specific machine
 
 #define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((mp_uint_t)(p)))
@@ -173,6 +170,3 @@ extern const struct _mp_print_t mp_debug_print;
 #define WDEV_HWRNG ((volatile uint32_t *)0x3ff20e44)
 
 #define _assert(expr) ((expr) ? (void)0 : __assert_func(__FILE__, __LINE__, __func__, #expr))
-
-uint32_t esp_disable_irq(void);
-void esp_enable_irq(uint32_t state);
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index 51f057ca82..5feb5b62b8 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -151,30 +151,8 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-mimxrt"
 #endif
 
-// For regular code that wants to prevent "background tasks" from running.
-// These background tasks (LWIP, Bluetooth) run in PENDSV context.
-// TODO: Check for the settings of the STM32 port in irq.h
-#define NVIC_PRIORITYGROUP_4    ((uint32_t)0x00000003)
-#define IRQ_PRI_PENDSV          NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 15, 0)
-#define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
-#define MICROPY_PY_PENDSV_REENTER atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
-#define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state);
-
 // Hooks to add builtins
 
-__attribute__((always_inline)) static inline void enable_irq(uint32_t state) {
-    __set_PRIMASK(state);
-}
-
-__attribute__((always_inline)) static inline uint32_t disable_irq(void) {
-    uint32_t state = __get_PRIMASK();
-    __disable_irq();
-    return state;
-}
-
-#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
-#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
-
 #if defined(IOMUX_TABLE_ENET)
 extern const struct _mp_obj_type_t network_lan_type;
 #define MICROPY_HW_NIC_ETH                  { MP_ROM_QSTR(MP_QSTR_LAN), MP_ROM_PTR(&network_lan_type) },
diff --git a/ports/mimxrt/mphalport.h b/ports/mimxrt/mphalport.h
index 36eb387798..c4e5b052c9 100644
--- a/ports/mimxrt/mphalport.h
+++ b/ports/mimxrt/mphalport.h
@@ -36,6 +36,18 @@
 
 #define MICROPY_HAL_VERSION             "2.8.0"
 
+#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
+
+// For regular code that wants to prevent "background tasks" from running.
+// These background tasks (LWIP, Bluetooth) run in PENDSV context.
+// TODO: Check for the settings of the STM32 port in irq.h
+#define NVIC_PRIORITYGROUP_4    ((uint32_t)0x00000003)
+#define IRQ_PRI_PENDSV          NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 15, 0)
+#define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
+#define MICROPY_PY_PENDSV_REENTER atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
+#define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state);
+
 #define MICROPY_HW_USB_CDC_TX_TIMEOUT   (500)
 
 #define MP_HAL_PIN_FMT                  "%q"
@@ -82,6 +94,16 @@ extern ringbuf_t stdin_ringbuf;
 #define mp_hal_quiet_timing_enter() raise_irq_pri(1)
 #define mp_hal_quiet_timing_exit(irq_state) restore_irq_pri(irq_state)
 
+__attribute__((always_inline)) static inline void enable_irq(uint32_t state) {
+    __set_PRIMASK(state);
+}
+
+__attribute__((always_inline)) static inline uint32_t disable_irq(void) {
+    uint32_t state = __get_PRIMASK();
+    __disable_irq();
+    return state;
+}
+
 void mp_hal_set_interrupt_char(int c);
 
 static inline mp_uint_t mp_hal_ticks_ms(void) {
diff --git a/ports/renesas-ra/irq.h b/ports/renesas-ra/irq.h
index 076247953e..0c46caea0c 100644
--- a/ports/renesas-ra/irq.h
+++ b/ports/renesas-ra/irq.h
@@ -54,11 +54,26 @@ extern uint32_t irq_stats[IRQ_STATS_MAX];
 #define IRQ_EXIT(irq)
 #endif
 
+// We have inlined IRQ functions for efficiency (they are generally
+// 1 machine instruction).
+//
+// Note on IRQ state: you should not need to know the specific
+// value of the state variable, but rather just pass the return
+// value from disable_irq back to enable_irq.
+
 static inline uint32_t query_irq(void) {
     return __get_PRIMASK();
 }
 
-// enable_irq and disable_irq are defined inline in mpconfigport.h
+static inline void enable_irq(mp_uint_t state) {
+    __set_PRIMASK(state);
+}
+
+static inline mp_uint_t disable_irq(void) {
+    mp_uint_t state = __get_PRIMASK();
+    __disable_irq();
+    return state;
+}
 
 #if __CORTEX_M >= 0x03
 
diff --git a/ports/renesas-ra/mpconfigport.h b/ports/renesas-ra/mpconfigport.h
index 99286fa530..63537fa5ab 100644
--- a/ports/renesas-ra/mpconfigport.h
+++ b/ports/renesas-ra/mpconfigport.h
@@ -250,27 +250,6 @@ typedef unsigned int mp_uint_t; // must be pointer size
 
 typedef long mp_off_t;
 
-// We have inlined IRQ functions for efficiency (they are generally
-// 1 machine instruction).
-//
-// Note on IRQ state: you should not need to know the specific
-// value of the state variable, but rather just pass the return
-// value from disable_irq back to enable_irq.  If you really need
-// to know the machine-specific values, see irq.h.
-
-static inline void enable_irq(mp_uint_t state) {
-    __set_PRIMASK(state);
-}
-
-static inline mp_uint_t disable_irq(void) {
-    mp_uint_t state = __get_PRIMASK();
-    __disable_irq();
-    return state;
-}
-
-#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
-#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
-
 #if MICROPY_HW_ENABLE_USBDEV
 #define MICROPY_HW_USBDEV_TASK_HOOK extern void mp_usbd_task(void); mp_usbd_task();
 #define MICROPY_VM_HOOK_COUNT (10)
diff --git a/ports/renesas-ra/mphalport.h b/ports/renesas-ra/mphalport.h
index e29a7fec7b..b8441e3767 100644
--- a/ports/renesas-ra/mphalport.h
+++ b/ports/renesas-ra/mphalport.h
@@ -29,6 +29,9 @@
 #include "pin.h"
 #include "py/ringbuf.h"
 
+#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
+
 #define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV)
 #define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state)
 
diff --git a/ports/rp2/modrp2.c b/ports/rp2/modrp2.c
index 94d49489c0..7ccbcb40cb 100644
--- a/ports/rp2/modrp2.c
+++ b/ports/rp2/modrp2.c
@@ -24,6 +24,7 @@
  * THE SOFTWARE.
  */
 
+#include "py/mphal.h"
 #include "py/runtime.h"
 #include "drivers/dht/dht.h"
 #include "modrp2.h"
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index 6942d26714..5ff384c923 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -244,12 +244,6 @@ extern const struct _mp_obj_type_t mod_network_nic_type_wiznet5k;
 #define MICROPY_HW_BOOTSEL_DELAY_US 8
 #endif
 
-// Entering a critical section.
-extern uint32_t mp_thread_begin_atomic_section(void);
-extern void mp_thread_end_atomic_section(uint32_t);
-#define MICROPY_BEGIN_ATOMIC_SECTION()     mp_thread_begin_atomic_section()
-#define MICROPY_END_ATOMIC_SECTION(state)  mp_thread_end_atomic_section(state)
-
 // Prevent the "lwIP task" from running when unsafe to do so.
 #define MICROPY_PY_LWIP_ENTER   lwip_lock_acquire();
 #define MICROPY_PY_LWIP_REENTER lwip_lock_acquire();
diff --git a/ports/rp2/mphalport.h b/ports/rp2/mphalport.h
index b8133c783e..9feace2f43 100644
--- a/ports/rp2/mphalport.h
+++ b/ports/rp2/mphalport.h
@@ -36,12 +36,19 @@
 #define SYSTICK_MAX (0xffffff)
 #define MICROPY_HW_USB_CDC_TX_TIMEOUT (500)
 
+// Entering a critical section.
+#define MICROPY_BEGIN_ATOMIC_SECTION()     mp_thread_begin_atomic_section()
+#define MICROPY_END_ATOMIC_SECTION(state)  mp_thread_end_atomic_section(state)
+
 #define MICROPY_PY_PENDSV_ENTER   pendsv_suspend()
 #define MICROPY_PY_PENDSV_EXIT    pendsv_resume()
 
 extern int mp_interrupt_char;
 extern ringbuf_t stdin_ringbuf;
 
+uint32_t mp_thread_begin_atomic_section(void);
+void mp_thread_end_atomic_section(uint32_t);
+
 void mp_hal_set_interrupt_char(int c);
 void mp_hal_time_ns_set_from_rtc(void);
 
diff --git a/ports/rp2/mpthreadport.c b/ports/rp2/mpthreadport.c
index ed9e338da7..968de1f782 100644
--- a/ports/rp2/mpthreadport.c
+++ b/ports/rp2/mpthreadport.c
@@ -26,6 +26,7 @@
 
 #include "py/runtime.h"
 #include "py/gc.h"
+#include "py/mphal.h"
 #include "py/mpthread.h"
 #include "pico/stdlib.h"
 #include "pico/multicore.h"
diff --git a/ports/rp2/rp2_flash.c b/ports/rp2/rp2_flash.c
index 26ec41949e..bc284cd976 100644
--- a/ports/rp2/rp2_flash.c
+++ b/ports/rp2/rp2_flash.c
@@ -26,6 +26,7 @@
 
 #include <string.h>
 
+#include "py/mphal.h"
 #include "py/runtime.h"
 #include "extmod/vfs.h"
 #include "modrp2.h"
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 72cbb7d208..21c29be24e 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -177,18 +177,6 @@
 #endif  // !defined(MICROPY_HW_MCUFLASH) ....
 
 // Miscellaneous settings
-__attribute__((always_inline)) static inline void enable_irq(uint32_t state) {
-    __set_PRIMASK(state);
-}
-
-__attribute__((always_inline)) static inline uint32_t disable_irq(void) {
-    uint32_t state = __get_PRIMASK();
-    __disable_irq();
-    return state;
-}
-
-#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
-#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
 
 #define MICROPY_EVENT_POLL_HOOK \
     do { \
diff --git a/ports/samd/mphalport.h b/ports/samd/mphalport.h
index ee33e74462..48f047066d 100644
--- a/ports/samd/mphalport.h
+++ b/ports/samd/mphalport.h
@@ -35,6 +35,9 @@
 #include "hpl_time_measure.h"
 #include "sam.h"
 
+#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
+
 #define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV)
 #define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state)
 
@@ -46,6 +49,16 @@ uint64_t mp_hal_ticks_us_64(void);
 
 void mp_hal_set_interrupt_char(int c);
 
+__attribute__((always_inline)) static inline void enable_irq(uint32_t state) {
+    __set_PRIMASK(state);
+}
+
+__attribute__((always_inline)) static inline uint32_t disable_irq(void) {
+    uint32_t state = __get_PRIMASK();
+    __disable_irq();
+    return state;
+}
+
 #define mp_hal_delay_us_fast  mp_hal_delay_us
 
 static inline uint64_t mp_hal_ticks_ms_64(void) {
diff --git a/ports/stm32/irq.h b/ports/stm32/irq.h
index 7f10d0d004..e3a204ec96 100644
--- a/ports/stm32/irq.h
+++ b/ports/stm32/irq.h
@@ -52,11 +52,26 @@ extern uint32_t irq_stats[IRQ_STATS_MAX];
 #define IRQ_EXIT(irq)
 #endif
 
+// We have inlined IRQ functions for efficiency (they are generally
+// 1 machine instruction).
+//
+// Note on IRQ state: you should not need to know the specific
+// value of the state variable, but rather just pass the return
+// value from disable_irq back to enable_irq.
+
 static inline uint32_t query_irq(void) {
     return __get_PRIMASK();
 }
 
-// enable_irq and disable_irq are defined inline in mpconfigport.h
+static inline void enable_irq(mp_uint_t state) {
+    __set_PRIMASK(state);
+}
+
+static inline mp_uint_t disable_irq(void) {
+    mp_uint_t state = __get_PRIMASK();
+    __disable_irq();
+    return state;
+}
 
 #if __CORTEX_M >= 0x03
 
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index e11e721030..21fab6ffd6 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -239,27 +239,6 @@ typedef unsigned int mp_uint_t; // must be pointer size
 
 typedef long mp_off_t;
 
-// We have inlined IRQ functions for efficiency (they are generally
-// 1 machine instruction).
-//
-// Note on IRQ state: you should not need to know the specific
-// value of the state variable, but rather just pass the return
-// value from disable_irq back to enable_irq.  If you really need
-// to know the machine-specific values, see irq.h.
-
-static inline void enable_irq(mp_uint_t state) {
-    __set_PRIMASK(state);
-}
-
-static inline mp_uint_t disable_irq(void) {
-    mp_uint_t state = __get_PRIMASK();
-    __disable_irq();
-    return state;
-}
-
-#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
-#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
-
 #if MICROPY_PY_THREAD
 #define MICROPY_EVENT_POLL_HOOK \
     do { \
@@ -289,12 +268,6 @@ static inline mp_uint_t disable_irq(void) {
 // Configuration for shared/runtime/softtimer.c.
 #define MICROPY_SOFT_TIMER_TICKS_MS uwTick
 
-// For regular code that wants to prevent "background tasks" from running.
-// These background tasks (LWIP, Bluetooth) run in PENDSV context.
-#define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
-#define MICROPY_PY_PENDSV_REENTER atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
-#define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state);
-
 // Prevent the "LWIP task" from running.
 #define MICROPY_PY_LWIP_ENTER   MICROPY_PY_PENDSV_ENTER
 #define MICROPY_PY_LWIP_REENTER MICROPY_PY_PENDSV_REENTER
diff --git a/ports/stm32/mphalport.h b/ports/stm32/mphalport.h
index 410aa5a8de..4983970876 100644
--- a/ports/stm32/mphalport.h
+++ b/ports/stm32/mphalport.h
@@ -40,10 +40,21 @@ static inline int mp_hal_status_to_neg_errno(HAL_StatusTypeDef status) {
 NORETURN void mp_hal_raise(HAL_StatusTypeDef status);
 void mp_hal_set_interrupt_char(int c); // -1 to disable
 
-// timing functions
+// Atomic section helpers.
 
 #include "irq.h"
 
+#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
+
+// For regular code that wants to prevent "background tasks" from running.
+// These background tasks (LWIP, Bluetooth) run in PENDSV context.
+#define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
+#define MICROPY_PY_PENDSV_REENTER atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
+#define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state);
+
+// Timing functions.
+
 #if __CORTEX_M == 0
 // Don't have raise_irq_pri on Cortex-M0 so keep IRQs enabled to have SysTick timing
 #define mp_hal_quiet_timing_enter() (1)
diff --git a/ports/stm32/mpu.h b/ports/stm32/mpu.h
index b3e2aec2d8..e260b50219 100644
--- a/ports/stm32/mpu.h
+++ b/ports/stm32/mpu.h
@@ -26,6 +26,8 @@
 #ifndef MICROPY_INCLUDED_STM32_MPU_H
 #define MICROPY_INCLUDED_STM32_MPU_H
 
+#include "irq.h"
+
 #if (defined(STM32F4) && defined(MICROPY_HW_ETH_MDC)) || defined(STM32F7) || defined(STM32H7) || defined(STM32WB)
 
 #define MPU_REGION_ETH      (MPU_REGION_NUMBER0)
diff --git a/ports/unix/mpconfigport.h b/ports/unix/mpconfigport.h
index dfb99d51b1..e7ce534a71 100644
--- a/ports/unix/mpconfigport.h
+++ b/ports/unix/mpconfigport.h
@@ -221,12 +221,6 @@ static inline unsigned long mp_random_seed_init(void) {
 #include <stdio.h>
 #endif
 
-// If threading is enabled, configure the atomic section.
-#if MICROPY_PY_THREAD
-#define MICROPY_BEGIN_ATOMIC_SECTION() (mp_thread_unix_begin_atomic_section(), 0xffffffff)
-#define MICROPY_END_ATOMIC_SECTION(x) (void)x; mp_thread_unix_end_atomic_section()
-#endif
-
 // In lieu of a WFI(), slow down polling from being a tight loop.
 #ifndef MICROPY_EVENT_POLL_HOOK
 #define MICROPY_EVENT_POLL_HOOK \
diff --git a/ports/unix/mphalport.h b/ports/unix/mphalport.h
index 724fc8af5f..ca951e5001 100644
--- a/ports/unix/mphalport.h
+++ b/ports/unix/mphalport.h
@@ -30,6 +30,12 @@
 #define CHAR_CTRL_C (3)
 #endif
 
+// If threading is enabled, configure the atomic section.
+#if MICROPY_PY_THREAD
+#define MICROPY_BEGIN_ATOMIC_SECTION() (mp_thread_unix_begin_atomic_section(), 0xffffffff)
+#define MICROPY_END_ATOMIC_SECTION(x) (void)x; mp_thread_unix_end_atomic_section()
+#endif
+
 void mp_hal_set_interrupt_char(char c);
 
 #define mp_hal_stdio_poll unused // this is not implemented, nor needed
diff --git a/ports/zephyr/mpconfigport.h b/ports/zephyr/mpconfigport.h
index 918f0fb15a..94f4cc33d6 100644
--- a/ports/zephyr/mpconfigport.h
+++ b/ports/zephyr/mpconfigport.h
@@ -139,6 +139,3 @@ typedef long mp_off_t;
 // extra built in names to add to the global namespace
 #define MICROPY_PORT_BUILTINS \
     { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) },
-
-#define MICROPY_BEGIN_ATOMIC_SECTION irq_lock
-#define MICROPY_END_ATOMIC_SECTION irq_unlock
diff --git a/ports/zephyr/mphalport.h b/ports/zephyr/mphalport.h
index 6158593911..0d086ac299 100644
--- a/ports/zephyr/mphalport.h
+++ b/ports/zephyr/mphalport.h
@@ -1,6 +1,9 @@
 #include <zephyr/zephyr.h>
 #include "shared/runtime/interrupt_char.h"
 
+#define MICROPY_BEGIN_ATOMIC_SECTION irq_lock
+#define MICROPY_END_ATOMIC_SECTION irq_unlock
+
 void mp_hal_init(void);
 void mp_hal_wait_sem(struct k_sem *sem, uint32_t timeout_ms);
 

From 20ffbe1a414338c67cb531291aff647d001e878f Mon Sep 17 00:00:00 2001
From: Carlosgg <carlosgilglez@gmail.com>
Date: Thu, 30 Nov 2023 18:25:44 +0000
Subject: [PATCH 208/310] unix/mbedtls: Enable mbedtls cert time validation.

To match other ports.

Signed-off-by: Carlos Gil <carlosgilglez@gmail.com>
---
 ports/unix/mbedtls/mbedtls_config.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/ports/unix/mbedtls/mbedtls_config.h b/ports/unix/mbedtls/mbedtls_config.h
index 629064abcf..f76a9cbf72 100644
--- a/ports/unix/mbedtls/mbedtls_config.h
+++ b/ports/unix/mbedtls/mbedtls_config.h
@@ -29,6 +29,10 @@
 // Set mbedtls configuration
 #define MBEDTLS_CIPHER_MODE_CTR // needed for MICROPY_PY_CRYPTOLIB_CTR
 
+// Cert time validation
+#define MBEDTLS_HAVE_TIME
+#define MBEDTLS_HAVE_TIME_DATE
+
 // Enable mbedtls modules
 #define MBEDTLS_HAVEGE_C
 #define MBEDTLS_TIMING_C

From b5449b0f095a2232f38ca7842614dcfda83ffc26 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 1 Dec 2023 13:43:52 +1100
Subject: [PATCH 209/310] extmod/mbedtls: Enable certificate time/date
 validation by default.

All ports using this common configuration already enable time/date
validation, so this commit is a no-op change.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/mbedtls/mbedtls_config_common.h    | 2 ++
 ports/mimxrt/mbedtls/mbedtls_config.h     | 4 ----
 ports/renesas-ra/mbedtls/mbedtls_config.h | 4 ----
 ports/rp2/mbedtls/mbedtls_config.h        | 2 --
 ports/stm32/mbedtls/mbedtls_config.h      | 4 ----
 ports/unix/mbedtls/mbedtls_config.h       | 4 ----
 6 files changed, 2 insertions(+), 18 deletions(-)

diff --git a/extmod/mbedtls/mbedtls_config_common.h b/extmod/mbedtls/mbedtls_config_common.h
index bfbc6f7ba2..95458f18da 100644
--- a/extmod/mbedtls/mbedtls_config_common.h
+++ b/extmod/mbedtls/mbedtls_config_common.h
@@ -31,6 +31,8 @@
 // #define MBEDTLS_DEBUG_C
 
 // Set mbedtls configuration.
+#define MBEDTLS_HAVE_TIME
+#define MBEDTLS_HAVE_TIME_DATE
 #define MBEDTLS_DEPRECATED_REMOVED
 #define MBEDTLS_AES_ROM_TABLES
 #define MBEDTLS_CIPHER_MODE_CBC
diff --git a/ports/mimxrt/mbedtls/mbedtls_config.h b/ports/mimxrt/mbedtls/mbedtls_config.h
index 4404987570..f264ed4ad2 100644
--- a/ports/mimxrt/mbedtls/mbedtls_config.h
+++ b/ports/mimxrt/mbedtls/mbedtls_config.h
@@ -26,10 +26,6 @@
 #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H
 #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H
 
-// Enable mbedtls modules.
-#define MBEDTLS_HAVE_TIME
-#define MBEDTLS_HAVE_TIME_DATE
-
 // Time hook.
 #include <time.h>
 extern time_t mimxrt_rtctime_seconds(time_t *timer);
diff --git a/ports/renesas-ra/mbedtls/mbedtls_config.h b/ports/renesas-ra/mbedtls/mbedtls_config.h
index 006f5660fd..f036f536c2 100644
--- a/ports/renesas-ra/mbedtls/mbedtls_config.h
+++ b/ports/renesas-ra/mbedtls/mbedtls_config.h
@@ -26,10 +26,6 @@
 #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H
 #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H
 
-// Enable mbedtls modules.
-#define MBEDTLS_HAVE_TIME
-#define MBEDTLS_HAVE_TIME_DATE
-
 // Time hook.
 #include <time.h>
 extern time_t ra_rtctime_seconds(time_t *timer);
diff --git a/ports/rp2/mbedtls/mbedtls_config.h b/ports/rp2/mbedtls/mbedtls_config.h
index 1b6d3dd43a..81be6c111b 100644
--- a/ports/rp2/mbedtls/mbedtls_config.h
+++ b/ports/rp2/mbedtls/mbedtls_config.h
@@ -32,8 +32,6 @@
 
 // Enable mbedtls modules
 #define MBEDTLS_GCM_C
-#define MBEDTLS_HAVE_TIME
-#define MBEDTLS_HAVE_TIME_DATE
 
 // Time hook
 #include <time.h>
diff --git a/ports/stm32/mbedtls/mbedtls_config.h b/ports/stm32/mbedtls/mbedtls_config.h
index bdac073399..336fee0a19 100644
--- a/ports/stm32/mbedtls/mbedtls_config.h
+++ b/ports/stm32/mbedtls/mbedtls_config.h
@@ -26,10 +26,6 @@
 #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H
 #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H
 
-// Enable mbedtls modules.
-#define MBEDTLS_HAVE_TIME
-#define MBEDTLS_HAVE_TIME_DATE
-
 // Time hook.
 #include <time.h>
 extern time_t stm32_rtctime_seconds(time_t *timer);
diff --git a/ports/unix/mbedtls/mbedtls_config.h b/ports/unix/mbedtls/mbedtls_config.h
index f76a9cbf72..629064abcf 100644
--- a/ports/unix/mbedtls/mbedtls_config.h
+++ b/ports/unix/mbedtls/mbedtls_config.h
@@ -29,10 +29,6 @@
 // Set mbedtls configuration
 #define MBEDTLS_CIPHER_MODE_CTR // needed for MICROPY_PY_CRYPTOLIB_CTR
 
-// Cert time validation
-#define MBEDTLS_HAVE_TIME
-#define MBEDTLS_HAVE_TIME_DATE
-
 // Enable mbedtls modules
 #define MBEDTLS_HAVEGE_C
 #define MBEDTLS_TIMING_C

From 30b0ee34d3a7cf6f967387e783268c8a939e04c8 Mon Sep 17 00:00:00 2001
From: Carlosgg <carlosgilglez@gmail.com>
Date: Thu, 30 Nov 2023 18:42:07 +0000
Subject: [PATCH 210/310] esp32: Enable mbedtls cert time validation.

Signed-off-by: Carlos Gil <carlosgilglez@gmail.com>
---
 ports/esp32/boards/sdkconfig.base |  3 +++
 ports/esp32/main.c                | 17 +++++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/ports/esp32/boards/sdkconfig.base b/ports/esp32/boards/sdkconfig.base
index 2a7c9a1c5b..bfc8c6610e 100644
--- a/ports/esp32/boards/sdkconfig.base
+++ b/ports/esp32/boards/sdkconfig.base
@@ -59,6 +59,9 @@ CONFIG_LWIP_PPP_CHAP_SUPPORT=y
 # SSL
 # Use 4kiB output buffer instead of default 16kiB
 CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
+CONFIG_MBEDTLS_HAVE_TIME_DATE=y
+CONFIG_MBEDTLS_PLATFORM_TIME_ALT=y
+CONFIG_MBEDTLS_HAVE_TIME=y
 
 # Disable ALPN support as it's not implemented in MicroPython
 CONFIG_MBEDTLS_SSL_ALPN=n
diff --git a/ports/esp32/main.c b/ports/esp32/main.c
index 044b43655c..8e5675c941 100644
--- a/ports/esp32/main.c
+++ b/ports/esp32/main.c
@@ -29,6 +29,8 @@
 #include <stdio.h>
 #include <string.h>
 #include <stdarg.h>
+#include <sys/time.h>
+#include <time.h>
 
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
@@ -49,6 +51,9 @@
 #include "py/mphal.h"
 #include "shared/readline/readline.h"
 #include "shared/runtime/pyexec.h"
+#include "shared/timeutils/timeutils.h"
+#include "mbedtls/platform_time.h"
+
 #include "uart.h"
 #include "usb.h"
 #include "usb_serial_jtag.h"
@@ -83,6 +88,15 @@ int vprintf_null(const char *format, va_list ap) {
     return 0;
 }
 
+time_t platform_mbedtls_time(time_t *timer) {
+    // mbedtls_time requires time in seconds from EPOCH 1970
+
+    struct timeval tv;
+    gettimeofday(&tv, NULL);
+
+    return tv.tv_sec + TIMEUTILS_SECONDS_1970_TO_2000;
+}
+
 void mp_task(void *pvParameter) {
     volatile uint32_t sp = (uint32_t)esp_cpu_get_sp();
     #if MICROPY_PY_THREAD
@@ -98,6 +112,9 @@ void mp_task(void *pvParameter) {
     #endif
     machine_init();
 
+    // Configure time function, for mbedtls certificate time validation.
+    mbedtls_platform_set_time(platform_mbedtls_time);
+
     esp_err_t err = esp_event_loop_create_default();
     if (err != ESP_OK) {
         ESP_LOGE("esp_init", "can't create event loop: 0x%x\n", err);

From d422b68d1099fb88c8bcd6a78bbd66924422112c Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 4 Dec 2023 22:17:18 +1100
Subject: [PATCH 211/310] nrf/mpconfigport: Enable
 MICROPY_PY_MACHINE_BOOTLOADER.

This should have been enabled in 48b5a7b06079f0d0aa4780016f015ff023875680
but was missed.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/nrf/mpconfigport.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 3ab1e0814f..f3c08059a0 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -175,6 +175,7 @@
 #define MICROPY_PY_MACHINE          (1)
 #define MICROPY_PY_MACHINE_INCLUDEFILE "ports/nrf/modules/machine/modmachine.c"
 #define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
+#define MICROPY_PY_MACHINE_BOOTLOADER (1)
 #define MICROPY_PY_MACHINE_PULSE    (0)
 #define MICROPY_PY_MACHINE_SOFTI2C  (MICROPY_PY_MACHINE_I2C)
 

From 20af857f52f733548c6ab4d8615f2d1f8f207ac3 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 4 Dec 2023 22:18:14 +1100
Subject: [PATCH 212/310] nrf/boards/ARDUINO_NANO_33_BLE_SENSE: Don't enable
 MICROPY_MBFS.

This board has MICROPY_VFS enabled, which should take precedence over
MICROPY_MBFS (and did prior to 22d9116c8c53463805dcd30fbeb78fbfa84c0e98).

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h b/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
index 69d715f18b..9b26b358da 100644
--- a/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
+++ b/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/mpconfigboard.h
@@ -7,8 +7,6 @@
 #define MICROPY_HW_BOARD_NAME           "Arduino Nano 33 BLE Sense"
 #define MICROPY_HW_MCU_NAME             "NRF52840"
 
-#define MICROPY_MBFS                    (1)
-
 #define MICROPY_BOARD_EARLY_INIT        NANO33_board_early_init
 #define MICROPY_BOARD_DEINIT            NANO33_board_deinit
 #define MICROPY_BOARD_ENTER_BOOTLOADER(nargs, args) NANO33_board_enter_bootloader()

From f3889db265ea50fef35596a4bd49f15661590093 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 4 Dec 2023 22:19:35 +1100
Subject: [PATCH 213/310] stm32/usbd_cdc_interface: Include header to get
 machine_bootloader decl.

This was broken by commit 48b5a7b06079f0d0aa4780016f015ff023875680.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/usbd_cdc_interface.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/stm32/usbd_cdc_interface.c b/ports/stm32/usbd_cdc_interface.c
index f25dcc380a..20d8b3036d 100644
--- a/ports/stm32/usbd_cdc_interface.c
+++ b/ports/stm32/usbd_cdc_interface.c
@@ -44,9 +44,9 @@
 
 #include "py/runtime.h"
 #include "py/mphal.h"
+#include "extmod/modmachine.h"
 #include "shared/runtime/interrupt_char.h"
 #include "irq.h"
-#include "modmachine.h"
 
 #if MICROPY_HW_ENABLE_USB
 

From 58112fc49a23de08e40dab578e23188f65089763 Mon Sep 17 00:00:00 2001
From: MikeTeachman <mike.teachman@gmail.com>
Date: Sat, 28 Jan 2023 19:16:39 -0800
Subject: [PATCH 214/310] stm32/machine_i2s: Improve accuracy of SCK frequency.

Configures the I2S PLL to produce a frequency that the I2S clock generator
can use to create an optimal SCK frequency.  The I2S PLL configuration
table is automatically generated at build time.

Fixes issue #10280.

Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
---
 ports/stm32/Makefile               |   7 +
 ports/stm32/boards/plli2svalues.py | 213 +++++++++++++++++++++++++++++
 ports/stm32/machine_i2s.c          |  48 ++++++-
 3 files changed, 265 insertions(+), 3 deletions(-)
 create mode 100644 ports/stm32/boards/plli2svalues.py

diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index 0bae26f2f1..a1449e7181 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -65,6 +65,7 @@ OPENOCD_CONFIG ?= boards/openocd_stm32f4.cfg
 include stm32.mk
 
 PLLVALUES = boards/pllvalues.py
+PLLI2SVALUES = boards/plli2svalues.py
 MAKE_PINS = boards/make-pins.py
 BOARD_PINS = $(BOARD_DIR)/pins.csv
 PREFIX_FILE = boards/stm32f4xx_prefix.c
@@ -82,6 +83,7 @@ GEN_CDCINF_FILE = $(HEADER_BUILD)/pybcdc.inf
 GEN_CDCINF_HEADER = $(HEADER_BUILD)/pybcdc_inf.h
 
 GEN_PLLFREQTABLE_HDR = $(HEADER_BUILD)/pllfreqtable.h
+GEN_PLLI2STABLE_HDR = $(HEADER_BUILD)/plli2stable.h
 GEN_STMCONST_HDR = $(HEADER_BUILD)/modstm_const.h
 GEN_STMCONST_MPZ = $(HEADER_BUILD)/modstm_mpz.h
 CMSIS_MCU_HDR = $(STM32LIB_CMSIS_ABS)/Include/$(CMSIS_MCU_LOWER).h
@@ -681,6 +683,11 @@ $(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
 	$(Q)$(PYTHON) $(PLLVALUES) -c -m $(CMSIS_MCU_LOWER) file:$(BOARD_DIR)/stm32$(MCU_SERIES)xx_hal_conf.h > $@
 
+$(TOP)/extmod/machine_i2s.c: $(GEN_PLLI2STABLE_HDR)
+$(GEN_PLLI2STABLE_HDR): $(PLLI2SVALUES) | $(HEADER_BUILD)
+	$(ECHO) "GEN $@"
+	$(Q)$(PYTHON) $(PLLI2SVALUES) -c -m $(CMSIS_MCU_LOWER) hse:$(BOARD_DIR)/stm32$(MCU_SERIES)xx_hal_conf.h pllm:$(BOARD_DIR)/mpconfigboard.h > $@
+
 $(BUILD)/modstm.o: $(GEN_STMCONST_HDR)
 $(HEADER_BUILD)/modstm_const.h: $(CMSIS_MCU_HDR) make-stmconst.py | $(HEADER_BUILD)
 	$(ECHO) "GEN stmconst $@"
diff --git a/ports/stm32/boards/plli2svalues.py b/ports/stm32/boards/plli2svalues.py
new file mode 100644
index 0000000000..8ff7f0ff8f
--- /dev/null
+++ b/ports/stm32/boards/plli2svalues.py
@@ -0,0 +1,213 @@
+"""
+This program computes I2S PLL parameters for STM32
+processors supporting an I2S PLL in the clock tree.
+Those processors are listed below in the mcu_support_plli2s[] list.
+"""
+
+import re
+from collections import namedtuple
+
+
+class MCU:
+    def __init__(self, range_plli2sn, range_plli2sr):
+        self.range_plli2sn = range_plli2sn
+        self.range_plli2sr = range_plli2sr
+
+
+mcu_default = MCU(range_plli2sn=range(50, 432 + 1), range_plli2sr=range(2, 7 + 1))
+
+mcu_table = {"stm32f401xe": MCU(range_plli2sn=range(192, 432 + 1), range_plli2sr=range(2, 7 + 1))}
+
+# list of stm32 processors that support an I2S PLL in the clock tree
+mcu_support_plli2s = [
+    "stm32f405xx",
+    "stm32f401xe",
+    "stm32f407xx",
+    "stm32f411xe",
+    "stm32f412zx",
+    "stm32f413xx",
+    "stm32f427xx",
+    "stm32f429xx",
+    "stm32f439xx",
+    "stm32f446xx",
+    "stm32f722xx",
+    "stm32f733xx",
+    "stm32f746xx",
+    "stm32f756xx",
+    "stm32f767xx",
+    "stm32f769xx",
+]
+
+
+# The following function calculates the multiplier (plli2sn) and divider (plli2sr) parameters
+# for the I2S PLL that leads to the best possible accuracy for the I2S sampling clock.
+# This is done by creating a set of candidate parameters (plli2sn, plli2sr)
+# and then determining which candidate parameters lead to a sampling clock frequency (Fs)
+# that most closely matches the desired sampling clock frequency (I2S rate).
+#
+# A description of the clock tree helps to understand this function:
+# The clock tree on a STM32 device is complex.  A subset of the clock tree is used for I2S, as follows:
+# 1. HSE clock is divided by the PLLM divider and feeds the I2S PLL (called PLLI2S in the STM32 clock tree).
+# 2. The output frequency of the I2S PLL is controlled by two parameters, plli2sn and plli2sr.
+# 3. The clock output of the I2S PLL is called PLLI2SCLK
+# 4. PLLI2SCLK is gated into the I2S peripheral, where the name changes to I2SxCLK
+# 5. I2SxCLK is an input to the I2S clock generator.
+# 6. The output frequency of the I2S clock generator is controlled by
+#    two configuration parameters, I2SDIV and ODD.
+# 7. The output of the I2S clock generator is the audio sampling frequency (Fs),
+#    which is used to create the signal at the I2S WS output pin.
+#
+# Example references:
+#    RM0090 Reference manual STM32F405/415, STM32F407/417, STM32F427/437 and STM32F429/439
+#    - section 6.3.23 RCC PLLI2S configuration register (RCC_PLLI2SCFGR)
+#    - section 28.4.4 Clock generator
+#    RM0385 Reference manual STM32F75xxx and STM32F74xxx
+#    - section 5.3.23 RCC PLLI2S configuration register (RCC_PLLI2SCFGR)
+#    - section 32.7.5 Clock generator
+#
+# The calculations below mimic the fixed-point integer calculations in the STM32 I2S driver,
+# in the function HAL_I2S_Init().
+def compute_plli2s_table(hse, pllm):
+    plli2s = namedtuple("plli2s", "bits rate plli2sn plli2sr i2sdiv odd error")
+    plli2s_table = []
+    for bits in (16, 32):
+        for rate in (8_000, 11_025, 12_000, 16_000, 22_050, 24_000, 32_000, 44_100, 48_000):
+            plli2s_candidates = []
+            for plli2sn in mcu.range_plli2sn:
+                for plli2sr in mcu.range_plli2sr:
+                    I2SxCLK = hse // pllm * plli2sn // plli2sr
+                    if I2SxCLK < 192_000_000:
+                        # compute I2S clock generator parameters: i2sdiv, odd
+                        tmp = (((I2SxCLK // (bits * 2)) * 10) // rate) + 5
+                        tmp = tmp // 10
+                        odd = tmp & 1
+                        i2sdiv = (tmp - odd) // 2
+                        Fs = I2SxCLK / ((bits * 2) * ((2 * i2sdiv) + odd))
+                        error = (abs(Fs - rate) / rate) * 100
+                        plli2s_candidates.append(
+                            plli2s(
+                                bits=bits,
+                                rate=rate,
+                                plli2sn=plli2sn,
+                                plli2sr=plli2sr,
+                                i2sdiv=i2sdiv,
+                                odd=odd,
+                                error=error,
+                            )
+                        )
+            # sort based on error
+            plli2s_candidates_sorted = sorted(plli2s_candidates, key=lambda x: x.error)
+            # select the best candidate
+            plli2s_table.append(plli2s_candidates_sorted[0])
+    return plli2s_table
+
+
+def generate_c_table(plli2s_table, hse, pllm):
+    print("// MAKE generated file, created by plli2svalues.py: DO NOT EDIT")
+    print("// This table is used in machine_i2s.c")
+    print(f"// HSE_VALUE = {hse}")
+    print(f"// MICROPY_HW_CLK_PLLM = {pllm} \n")
+    print("#define PLLI2S_TABLE \\")
+    print("{ \\")
+
+    for plli2s in plli2s_table:
+        print(
+            f"    {{{plli2s.rate}, "
+            f"{plli2s.bits}, "
+            f"{plli2s.plli2sr}, "
+            f"{plli2s.plli2sn} }}, "
+            f"/* i2sdiv: {int(plli2s.i2sdiv)}, "
+            f"odd: {plli2s.odd}, "
+            f"rate error % (desired vs actual)%: {plli2s.error:.4f} */ \\"
+        )
+    print("}")
+
+
+def search_header(filename, re_include, re_define, lookup, val):
+    regex_include = re.compile(re_include)
+    regex_define = re.compile(re_define)
+    with open(filename) as f:
+        for line in f:
+            line = line.strip()
+            m = regex_include.match(line)
+            if m:
+                # Search included file
+                search_header(m.group(1), re_include, re_define, lookup, val)
+                continue
+            m = regex_define.match(line)
+            if m:
+                # found lookup value
+                if m.group(1) == lookup:
+                    val[0] = int(m.group(3))
+    return val
+
+
+def main():
+    global mcu
+
+    # parse input args
+    import sys
+
+    argv = sys.argv[1:]
+
+    c_table = False
+    mcu_series = "stm32f4"
+    hse = None
+    pllm = None
+
+    while True:
+        if argv[0] == "-c":
+            c_table = True
+            argv.pop(0)
+        elif argv[0] == "-m":
+            argv.pop(0)
+            mcu_series = argv.pop(0).lower()
+        else:
+            break
+
+    if mcu_series in mcu_support_plli2s:
+        if len(argv) != 2:
+            print("usage: pllvalues.py [-c] [-m <mcu_series>] <hse in MHz> <pllm in MHz>")
+            sys.exit(1)
+
+        if argv[0].startswith("hse:"):
+            # extract HSE_VALUE from header file
+            (hse,) = search_header(
+                argv[0][len("hse:") :],
+                r'#include "(boards/[A-Za-z0-9_./]+)"',
+                r"#define +(HSE_VALUE) +\((\(uint32_t\))?([0-9]+)\)",
+                "HSE_VALUE",
+                [None],
+            )
+            if hse is None:
+                raise ValueError("%s does not contain a definition of HSE_VALUE" % argv[0])
+            argv.pop(0)
+
+        if argv[0].startswith("pllm:"):
+            # extract MICROPY_HW_CLK_PLLM from header file
+            (pllm,) = search_header(
+                argv[0][len("pllm:") :],
+                r'#include "(boards/[A-Za-z0-9_./]+)"',
+                r"#define +(MICROPY_HW_CLK_PLLM) +\((\(uint32_t\))?([0-9]+)\)",
+                "MICROPY_HW_CLK_PLLM",
+                [None],
+            )
+            if pllm is None:
+                raise ValueError(
+                    "%s does not contain a definition of MICROPY_HW_CLK_PLLM" % argv[0]
+                )
+            argv.pop(0)
+
+        # Select MCU parameters
+        mcu = mcu_default
+        for m in mcu_table:
+            if mcu_series.startswith(m):
+                mcu = mcu_table[m]
+                break
+        plli2s_table = compute_plli2s_table(hse, pllm)
+        if c_table:
+            generate_c_table(plli2s_table, hse, pllm)
+
+
+if __name__ == "__main__":
+    main()
diff --git a/ports/stm32/machine_i2s.c b/ports/stm32/machine_i2s.c
index b3e1cee34f..dbee81bb39 100644
--- a/ports/stm32/machine_i2s.c
+++ b/ports/stm32/machine_i2s.c
@@ -33,6 +33,7 @@
 #include "py/mphal.h"
 #include "pin.h"
 #include "dma.h"
+#include "genhdr/plli2stable.h"
 
 // Notes on this port's specific implementation of I2S:
 // - the DMA callbacks (1/2 complete and complete) are used to implement the asynchronous background operations
@@ -61,6 +62,13 @@ typedef enum {
     BOTTOM_HALF
 } ping_pong_t;
 
+typedef struct _plli2s_config_t {
+    uint32_t rate;
+    uint8_t bits;
+    uint8_t plli2sr;
+    uint16_t plli2sn;
+} plli2s_config_t;
+
 typedef struct _machine_i2s_obj_t {
     mp_obj_base_t base;
     uint8_t i2s_id;
@@ -98,12 +106,26 @@ STATIC const int8_t i2s_frame_map[NUM_I2S_USER_FORMATS][I2S_RX_FRAME_SIZE_IN_BYT
     { 2,  3,  0,  1,  6,  7,  4,  5 },  // Stereo, 32-bits
 };
 
+STATIC const plli2s_config_t plli2s_config[] = PLLI2S_TABLE;
+
 void machine_i2s_init0() {
     for (uint8_t i = 0; i < MICROPY_HW_MAX_I2S; i++) {
         MP_STATE_PORT(machine_i2s_obj)[i] = NULL;
     }
 }
 
+STATIC bool lookup_plli2s_config(int8_t bits, int32_t rate, uint16_t *plli2sn, uint16_t *plli2sr) {
+    for (uint16_t i = 0; i < MP_ARRAY_SIZE(plli2s_config); i++) {
+        if ((plli2s_config[i].bits == bits) && (plli2s_config[i].rate == rate)) {
+            *plli2sn = plli2s_config[i].plli2sn;
+            *plli2sr = plli2s_config[i].plli2sr;
+            return true;
+        }
+    }
+
+    return false;
+}
+
 //  For 32-bit audio samples, the STM32 HAL API expects each 32-bit sample to be encoded
 //  in an unusual byte ordering:  Byte_2, Byte_3, Byte_0, Byte_1
 //      where:  Byte_0 is the least significant byte of the 32-bit sample
@@ -294,6 +316,29 @@ STATIC bool i2s_init(machine_i2s_obj_t *self) {
         HAL_GPIO_Init(self->sd->gpio, &GPIO_InitStructure);
     }
 
+    // configure I2S PLL
+    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
+
+    // lookup optimal PLL multiplier (PLLI2SN) and divisor (PLLI2SR) for a given sample size and sampling frequency
+    uint16_t plli2sn;
+    uint16_t plli2sr;
+
+    if (lookup_plli2s_config(self->mode == I2S_MODE_MASTER_RX ? 32 : self->bits, self->rate, &plli2sn, &plli2sr)) {
+        // match found
+        PeriphClkInitStruct.PLLI2S.PLLI2SN = plli2sn;
+        PeriphClkInitStruct.PLLI2S.PLLI2SR = plli2sr;
+    } else {
+        // no match for sample size and rate
+        // configure PLL to use power-on default values when a non-standard sampling frequency is used
+        PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
+        PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
+    }
+
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+        return false;
+    }
+
     if (HAL_I2S_Init(&self->hi2s) == HAL_OK) {
         // Reset and initialize Tx and Rx DMA channels
         if (self->mode == I2S_MODE_MASTER_RX) {
@@ -306,13 +351,10 @@ STATIC bool i2s_init(machine_i2s_obj_t *self) {
             self->hi2s.hdmatx = &self->hdma_tx;
         }
 
-        __HAL_RCC_PLLI2S_ENABLE();  // start I2S clock
-
         return true;
     } else {
         return false;
     }
-
 }
 
 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) {

From 9f620d28193709a5002a6f439b7495c9c3451792 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 29 Nov 2023 14:26:12 +1100
Subject: [PATCH 215/310] github/workflows: Cache ESP-IDF checkout and
 installation.

Cache is keyed on the ESP-IDF version used in CI, so there shouldn't be any
cache invalidation issues when ESP-IDF version changes.

Restoring from cache takes approx 15s, compared to 2-3m to perform these
steps (ESP-IDF tools install, ESP-IDF clone, ESP-IDF submodule clone) the
first time.

Cache size is approx 1.6GB, the git clone is tweaked as much as possible to
keep the size down.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 .github/workflows/ports_esp32.yml | 22 ++++++++++++++++++++--
 tools/ci.sh                       | 11 ++++++++---
 2 files changed, 28 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/ports_esp32.yml b/.github/workflows/ports_esp32.yml
index 9403aa656b..117ae897aa 100644
--- a/.github/workflows/ports_esp32.yml
+++ b/.github/workflows/ports_esp32.yml
@@ -22,7 +22,25 @@ jobs:
     runs-on: ubuntu-20.04
     steps:
     - uses: actions/checkout@v4
-    - name: Install packages
-      run: source tools/ci.sh && ci_esp32_idf50_setup
+
+    - id: idf_ver
+      name: Read the ESP-IDF version
+      run: source tools/ci.sh && echo "IDF_VER=$IDF_VER" | tee "$GITHUB_OUTPUT"
+
+    - name: Cached ESP-IDF install
+      id: cache_esp_idf
+      uses: actions/cache@v3
+      with:
+        path: |
+          ./esp-idf/
+          ~/.espressif/
+          !~/.espressif/dist/
+          ~/.cache/pip/
+        key: esp-idf-${{ steps.idf_ver.outputs.IDF_VER }}
+
+    - name: Install ESP-IDF packages
+      if: steps.cache_esp_idf.outputs.cache-hit != 'true'
+      run: source tools/ci.sh && ci_esp32_idf_setup
+
     - name: Build
       run: source tools/ci.sh && ci_esp32_build
diff --git a/tools/ci.sh b/tools/ci.sh
index 8dcbbf7765..34260334d8 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -118,10 +118,15 @@ function ci_cc3200_build {
 ########################################################################################
 # ports/esp32
 
-function ci_esp32_idf50_setup {
+# GitHub tag of ESP-IDF to use for CI (note: must be a tag or a branch)
+IDF_VER=v5.0.2
+
+function ci_esp32_idf_setup {
     pip3 install pyelftools
-    git clone https://github.com/espressif/esp-idf.git
-    git -C esp-idf checkout v5.0.2
+    git clone --depth 1 --branch $IDF_VER https://github.com/espressif/esp-idf.git
+    # doing a treeless clone isn't quite as good as --shallow-submodules, but it
+    # is smaller than full clones and works when the submodule commit isn't a head.
+    git -C esp-idf submodule update --init --recursive --filter=tree:0
     ./esp-idf/install.sh
 }
 

From b6df8f84526bc1d32b419c1e4f706a9ec699957f Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 29 Nov 2023 15:39:10 +1100
Subject: [PATCH 216/310] github/workflows: Use build matrix for esp32 port.

Allows splitting the esp32 job into multiple parts without too much
boilerplate.  The matrix is parameterised using the name of the function to
call in tools/ci.sh, to minimise the dependency on GitHub Actions.

This can get esp32 build times down around 3m if IDF is cached already.

If the cache is cold, the cache preparation step on each job can double up
against each other.  However, restructuring the workflow to not do this
seems either complex or requires copy-pasting the entire cache step.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 .github/workflows/ports_esp32.yml | 12 +++++++++---
 tools/ci.sh                       | 19 +++++++++++++++----
 2 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/ports_esp32.yml b/.github/workflows/ports_esp32.yml
index 117ae897aa..9c8a8998a2 100644
--- a/.github/workflows/ports_esp32.yml
+++ b/.github/workflows/ports_esp32.yml
@@ -18,7 +18,13 @@ concurrency:
   cancel-in-progress: true
 
 jobs:
-  build_idf50:
+  build_idf:
+    strategy:
+      fail-fast: false
+      matrix:
+        ci_func:  # names are functions in ci.sh
+          - esp32_build_cmod_s2
+          - esp32_build_s3_c3
     runs-on: ubuntu-20.04
     steps:
     - uses: actions/checkout@v4
@@ -42,5 +48,5 @@ jobs:
       if: steps.cache_esp_idf.outputs.cache-hit != 'true'
       run: source tools/ci.sh && ci_esp32_idf_setup
 
-    - name: Build
-      run: source tools/ci.sh && ci_esp32_build
+    - name: Build ci_${{matrix.ci_func }}
+      run: source tools/ci.sh && ci_${{ matrix.ci_func }}
diff --git a/tools/ci.sh b/tools/ci.sh
index 34260334d8..23fa389094 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -130,19 +130,30 @@ function ci_esp32_idf_setup {
     ./esp-idf/install.sh
 }
 
-function ci_esp32_build {
+function ci_esp32_build_common {
     source esp-idf/export.sh
     make ${MAKEOPTS} -C mpy-cross
     make ${MAKEOPTS} -C ports/esp32 submodules
+}
+
+function ci_esp32_build_cmod_s2 {
+    ci_esp32_build_common
+
     make ${MAKEOPTS} -C ports/esp32 \
         USER_C_MODULES=../../../examples/usercmodule/micropython.cmake \
         FROZEN_MANIFEST=$(pwd)/ports/esp32/boards/manifest_test.py
-    make ${MAKEOPTS} -C ports/esp32 BOARD=ESP32_GENERIC_C3
-    make ${MAKEOPTS} -C ports/esp32 BOARD=ESP32_GENERIC_S2
-    make ${MAKEOPTS} -C ports/esp32 BOARD=ESP32_GENERIC_S3
 
     # Test building native .mpy with xtensawin architecture.
     ci_native_mpy_modules_build xtensawin
+
+    make ${MAKEOPTS} -C ports/esp32 BOARD=ESP32_GENERIC_S2
+}
+
+function ci_esp32_build_s3_c3 {
+    ci_esp32_build_common
+
+    make ${MAKEOPTS} -C ports/esp32 BOARD=ESP32_GENERIC_S3
+    make ${MAKEOPTS} -C ports/esp32 BOARD=ESP32_GENERIC_C3
 }
 
 ########################################################################################

From 731a1f523374b392b4f7dae0dd6c8505c8a4ac58 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Tue, 5 Dec 2023 11:17:44 +1100
Subject: [PATCH 217/310] github/workflows: Enable build matrix for stm32 port.

This is for consistency with the previous commit that uses this approach
for esp32.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 .github/workflows/ports_stm32.yml | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)

diff --git a/.github/workflows/ports_stm32.yml b/.github/workflows/ports_stm32.yml
index 0b781a93c1..84d30b27f6 100644
--- a/.github/workflows/ports_stm32.yml
+++ b/.github/workflows/ports_stm32.yml
@@ -18,20 +18,18 @@ concurrency:
   cancel-in-progress: true
 
 jobs:
-  build_pyb:
+  build_stm32:
+    strategy:
+      fail-fast: false
+      matrix:
+        ci_func:  # names are functions in ci.sh
+          - stm32_pyb_build
+          - stm32_nucleo_build
     runs-on: ubuntu-20.04
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
       run: source tools/ci.sh && ci_stm32_setup
-    - name: Build
-      run: source tools/ci.sh && ci_stm32_pyb_build
+    - name: Build ci_${{matrix.ci_func }}
+      run: source tools/ci.sh && ci_${{ matrix.ci_func }}
 
-  build_nucleo:
-    runs-on: ubuntu-20.04
-    steps:
-    - uses: actions/checkout@v4
-    - name: Install packages
-      run: source tools/ci.sh && ci_stm32_setup
-    - name: Build
-      run: source tools/ci.sh && ci_stm32_nucleo_build

From 527c4b0497249f8716a0130ad729b3a833e64ec2 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Wed, 29 Nov 2023 16:43:28 +1100
Subject: [PATCH 218/310] github/workflows: Enable ccache for esp32 build.

CCaches are scoped per-job.

Uses https://github.com/hendrikmuhs/ccache-action to get desired behaviour
(updating the cache on each run).

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 .github/workflows/ports_esp32.yml | 5 +++++
 tools/ci.sh                       | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/.github/workflows/ports_esp32.yml b/.github/workflows/ports_esp32.yml
index 9c8a8998a2..c1eedf18a9 100644
--- a/.github/workflows/ports_esp32.yml
+++ b/.github/workflows/ports_esp32.yml
@@ -48,5 +48,10 @@ jobs:
       if: steps.cache_esp_idf.outputs.cache-hit != 'true'
       run: source tools/ci.sh && ci_esp32_idf_setup
 
+    - name: ccache
+      uses: hendrikmuhs/ccache-action@v1.2
+      with:
+        key: esp32-${{ matrix.ci_func }}
+
     - name: Build ci_${{matrix.ci_func }}
       run: source tools/ci.sh && ci_${{ matrix.ci_func }}
diff --git a/tools/ci.sh b/tools/ci.sh
index 23fa389094..60cd0be6c5 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -121,6 +121,8 @@ function ci_cc3200_build {
 # GitHub tag of ESP-IDF to use for CI (note: must be a tag or a branch)
 IDF_VER=v5.0.2
 
+export IDF_CCACHE_ENABLE=1
+
 function ci_esp32_idf_setup {
     pip3 install pyelftools
     git clone --depth 1 --branch $IDF_VER https://github.com/espressif/esp-idf.git

From 69089a532e7639fb25c429bfa7d89543277459b2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 5 Dec 2023 10:32:27 +1100
Subject: [PATCH 219/310] esp32/boards: Enable further IRAM saving opts to fit
 ESP32-SPIRAM fw.

The amount of free IRAM in ESP32 SPIRAM builds is very small and went over
the limit due to commit 30b0ee34d3a7cf6f967387e783268c8a939e04c8.  This
commit enables further optimisations to reduce IRAM usage.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp32/boards/sdkconfig.spiram | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ports/esp32/boards/sdkconfig.spiram b/ports/esp32/boards/sdkconfig.spiram
index 4dfc63624b..f5503d5541 100644
--- a/ports/esp32/boards/sdkconfig.spiram
+++ b/ports/esp32/boards/sdkconfig.spiram
@@ -12,4 +12,7 @@ CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=8192
 # SPIRAM increases the size of the firmware and overflows iram0_0_seg, due
 # to PSRAM bug workarounds.  Apply some options to reduce the firmware size.
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
+CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
+CONFIG_RINGBUF_PLACE_FUNCTIONS_INTO_FLASH=y
 CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
+CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y

From d3595fed2b9c6cb183425963e3181c193c53b7a4 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 5 Dec 2023 10:34:20 +1100
Subject: [PATCH 220/310] tools/ci.sh: Build ESP32_GENERIC-SPIRAM as part of
 esp32 CI.

Signed-off-by: Damien George <damien@micropython.org>
---
 .github/workflows/ports_esp32.yml | 2 +-
 tools/ci.sh                       | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/ports_esp32.yml b/.github/workflows/ports_esp32.yml
index c1eedf18a9..6872b9d12d 100644
--- a/.github/workflows/ports_esp32.yml
+++ b/.github/workflows/ports_esp32.yml
@@ -23,7 +23,7 @@ jobs:
       fail-fast: false
       matrix:
         ci_func:  # names are functions in ci.sh
-          - esp32_build_cmod_s2
+          - esp32_build_cmod_spiram_s2
           - esp32_build_s3_c3
     runs-on: ubuntu-20.04
     steps:
diff --git a/tools/ci.sh b/tools/ci.sh
index 60cd0be6c5..b71862273d 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -138,7 +138,7 @@ function ci_esp32_build_common {
     make ${MAKEOPTS} -C ports/esp32 submodules
 }
 
-function ci_esp32_build_cmod_s2 {
+function ci_esp32_build_cmod_spiram_s2 {
     ci_esp32_build_common
 
     make ${MAKEOPTS} -C ports/esp32 \
@@ -148,6 +148,7 @@ function ci_esp32_build_cmod_s2 {
     # Test building native .mpy with xtensawin architecture.
     ci_native_mpy_modules_build xtensawin
 
+    make ${MAKEOPTS} -C ports/esp32 BOARD=ESP32_GENERIC BOARD_VARIANT=SPIRAM
     make ${MAKEOPTS} -C ports/esp32 BOARD=ESP32_GENERIC_S2
 }
 

From 78b3fe56897d029f2786256d83dd2fecacb34637 Mon Sep 17 00:00:00 2001
From: Thomas Wenrich <twenrich@gmail.com>
Date: Sat, 22 May 2021 13:38:20 +0200
Subject: [PATCH 221/310] esp32/machine_rtc: Preserve RTC user memory over most
 reset causes.

The user memory area - accessible by machine.RTC.memory() -- will now
survive most reboot causes.  A power-on reset (also caused by the EN pin on
some boards) will clean the memory.  When this happens, the magic number
not found in the user memory will cause initialization.

After other resets (triggered by watchdogs, machine.reset(), ...), the user
is responsible to check and validate the contents of the user area.

This new behaviour can be changed by enabling
MICROPY_HW_RTC_MEM_INIT_ALWAYS: in that case the RTC memory is always
cleared on boot.

Signed-off-by: Thomas Wenrich <twenrich@gmail.com>
---
 ports/esp32/machine_rtc.c | 30 ++++++++++++++++++++----------
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/ports/esp32/machine_rtc.c b/ports/esp32/machine_rtc.c
index f7b3ae66f2..cbbfb4b84c 100644
--- a/ports/esp32/machine_rtc.c
+++ b/ports/esp32/machine_rtc.c
@@ -60,14 +60,24 @@ typedef struct _machine_rtc_obj_t {
 #define MICROPY_HW_RTC_USER_MEM_MAX     2048
 #endif
 
+// A board can enable MICROPY_HW_RTC_MEM_INIT_ALWAYS to always clear out RTC memory on boot.
+// Defaults to RTC_NOINIT_ATTR so the user memory survives WDT resets and the like.
+#if MICROPY_HW_RTC_MEM_INIT_ALWAYS
+#define _USER_MEM_ATTR RTC_DATA_ATTR
+#else
+#define _USER_MEM_ATTR RTC_NOINIT_ATTR
+#endif
+
 // Optionally compile user memory functionality if the size of memory is greater than 0
 #if MICROPY_HW_RTC_USER_MEM_MAX > 0
 #define MEM_MAGIC           0x75507921
-RTC_DATA_ATTR uint32_t rtc_user_mem_magic;
-RTC_DATA_ATTR uint16_t rtc_user_mem_len;
-RTC_DATA_ATTR uint8_t rtc_user_mem_data[MICROPY_HW_RTC_USER_MEM_MAX];
+_USER_MEM_ATTR uint32_t rtc_user_mem_magic;
+_USER_MEM_ATTR uint16_t rtc_user_mem_len;
+_USER_MEM_ATTR uint8_t rtc_user_mem_data[MICROPY_HW_RTC_USER_MEM_MAX];
 #endif
 
+#undef _USER_MEM_ATTR
+
 // singleton RTC object
 STATIC const machine_rtc_obj_t machine_rtc_obj = {{&machine_rtc_type}};
 
@@ -80,6 +90,13 @@ STATIC mp_obj_t machine_rtc_make_new(const mp_obj_type_t *type, size_t n_args, s
     // check arguments
     mp_arg_check_num(n_args, n_kw, 0, 0, false);
 
+    #if MICROPY_HW_RTC_USER_MEM_MAX > 0
+    if (rtc_user_mem_magic != MEM_MAGIC) {
+        rtc_user_mem_magic = MEM_MAGIC;
+        rtc_user_mem_len = 0;
+    }
+    #endif
+
     // return constant object
     return (mp_obj_t)&machine_rtc_obj;
 }
@@ -130,13 +147,6 @@ STATIC mp_obj_t machine_rtc_init(mp_obj_t self_in, mp_obj_t date) {
     mp_obj_t args[2] = {self_in, date};
     machine_rtc_datetime_helper(2, args);
 
-    #if MICROPY_HW_RTC_USER_MEM_MAX > 0
-    if (rtc_user_mem_magic != MEM_MAGIC) {
-        rtc_user_mem_magic = MEM_MAGIC;
-        rtc_user_mem_len = 0;
-    }
-    #endif
-
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_rtc_init_obj, machine_rtc_init);

From 1323a71823cbf54f02395252912df1377a61824e Mon Sep 17 00:00:00 2001
From: Scott Zhao <zhaomh1998@outlook.com>
Date: Tue, 5 Dec 2023 20:47:06 -0500
Subject: [PATCH 222/310] esp32/boards/UM_TINYPICO: Fix typo in baudrate
 instructions.

The installation instructions for ESP32 TinyPICO board contained a typo
that used a non-standard baud rate 912600 instead of 921600.  This made the
upload command fail on some Windows computers.

Signed-off-by: Scott Zhao <zhaomh1998@outlook.com>
---
 ports/esp32/boards/UM_TINYPICO/deploy.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/ports/esp32/boards/UM_TINYPICO/deploy.md b/ports/esp32/boards/UM_TINYPICO/deploy.md
index ed29478675..8c15d4d413 100644
--- a/ports/esp32/boards/UM_TINYPICO/deploy.md
+++ b/ports/esp32/boards/UM_TINYPICO/deploy.md
@@ -31,16 +31,16 @@ From then on program the firmware starting at address 0x1000:
 
 ### Linux
 ```bash
-esptool.py --chip esp32 --port /dev/ttyUSB0 --baud 912600 write_flash -z 0x1000 tinypico-micropython-firmware-version.bin
+esptool.py --chip esp32 --port /dev/ttyUSB0 --baud 921600 write_flash -z 0x1000 tinypico-micropython-firmware-version.bin
 ```
 
 ### Mac
 ```bash
-esptool.py --chip esp32 --port /dev/tty.SLAB_USBtoUART --baud 912600 write_flash -z 0x1000 tinypico-micropython-firmware-version.bin
+esptool.py --chip esp32 --port /dev/tty.SLAB_USBtoUART --baud 921600 write_flash -z 0x1000 tinypico-micropython-firmware-version.bin
 ```
 
 ### Windows
 Change (X) to whatever COM port is being used by the board
 ```bash
-esptool --chip esp32 --port COM(X) --baud 912600 write_flash -z 0x1000 tinypico-micropython-firmware-version.bin
+esptool --chip esp32 --port COM(X) --baud 921600 write_flash -z 0x1000 tinypico-micropython-firmware-version.bin
 ```

From 3f2c423686e735ae4c8529b1df018d9884f48ce2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 5 Dec 2023 16:38:44 +1100
Subject: [PATCH 223/310] rp2: Switch to locally provided math library.

This commit fixes all known floating-point bugs with the pico-sdk.  There
are two things going on here:
- Use a custom pico float component so that the pico-sdk doesn't include
  its math functions, and then provide our own from lib/libm.
- Provide a wrapper for __aeabi_fadd to fix the infinity addition bug.

Prior to this commit, the following tests failed on the rp2 port: cmath_fun
float_parse math_domain math_domain_special math_fun_special.  With this
commit, all these tests pass.

Thanks to @projectgus for how to approach this fix.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/CMakeLists.txt | 67 ++++++++++++++++++++++++++++++++++++++
 ports/rp2/libm_extra.c   | 69 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 136 insertions(+)
 create mode 100644 ports/rp2/libm_extra.c

diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index dcf1328724..c68c46cb69 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -196,6 +196,73 @@ set(PICO_SDK_COMPONENTS
     tinyusb_device
 )
 
+# Use our custom pico_float_micropython float implementation.  This is needed for two reasons:
+# - to fix inf handling in pico-sdk's __wrap___aeabi_fadd();
+# - so we can use our own libm functions, to fix inaccuracies in the pico-sdk versions.
+pico_set_float_implementation(${MICROPY_TARGET} micropython)
+
+# Define our custom pico_float_micropython component.
+pico_add_library(pico_float_micropython)
+
+# pico_float_micropython: add pico-sdk float and our libm source files.
+target_sources(pico_float_micropython INTERFACE
+    ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_aeabi.S
+    ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_init_rom.c
+    ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_v1_rom_shim.S
+    ${MICROPY_DIR}/lib/libm/math.c
+    ${MICROPY_DIR}/lib/libm/acoshf.c
+    ${MICROPY_DIR}/lib/libm/asinfacosf.c
+    ${MICROPY_DIR}/lib/libm/asinhf.c
+    ${MICROPY_DIR}/lib/libm/atan2f.c
+    ${MICROPY_DIR}/lib/libm/atanf.c
+    ${MICROPY_DIR}/lib/libm/atanhf.c
+    ${MICROPY_DIR}/lib/libm/ef_rem_pio2.c
+    ${MICROPY_DIR}/lib/libm/ef_sqrt.c
+    ${MICROPY_DIR}/lib/libm/erf_lgamma.c
+    ${MICROPY_DIR}/lib/libm/fmodf.c
+    ${MICROPY_DIR}/lib/libm/kf_cos.c
+    ${MICROPY_DIR}/lib/libm/kf_rem_pio2.c
+    ${MICROPY_DIR}/lib/libm/kf_sin.c
+    ${MICROPY_DIR}/lib/libm/kf_tan.c
+    ${MICROPY_DIR}/lib/libm/log1pf.c
+    ${MICROPY_DIR}/lib/libm/nearbyintf.c
+    ${MICROPY_DIR}/lib/libm/roundf.c
+    ${MICROPY_DIR}/lib/libm/sf_cos.c
+    ${MICROPY_DIR}/lib/libm/sf_erf.c
+    ${MICROPY_DIR}/lib/libm/sf_frexp.c
+    ${MICROPY_DIR}/lib/libm/sf_ldexp.c
+    ${MICROPY_DIR}/lib/libm/sf_modf.c
+    ${MICROPY_DIR}/lib/libm/sf_sin.c
+    ${MICROPY_DIR}/lib/libm/sf_tan.c
+    ${MICROPY_DIR}/lib/libm/wf_lgamma.c
+    ${MICROPY_DIR}/lib/libm/wf_tgamma.c
+    ${MICROPY_PORT_DIR}/libm_extra.c
+)
+
+# pico_float_micropython: wrap low-level floating-point ops, to call the pico-sdk versions.
+pico_wrap_function(pico_float_micropython __aeabi_fdiv)
+pico_wrap_function(pico_float_micropython __aeabi_fmul)
+pico_wrap_function(pico_float_micropython __aeabi_frsub)
+pico_wrap_function(pico_float_micropython __aeabi_fsub)
+pico_wrap_function(pico_float_micropython __aeabi_cfcmpeq)
+pico_wrap_function(pico_float_micropython __aeabi_cfrcmple)
+pico_wrap_function(pico_float_micropython __aeabi_cfcmple)
+pico_wrap_function(pico_float_micropython __aeabi_fcmpeq)
+pico_wrap_function(pico_float_micropython __aeabi_fcmplt)
+pico_wrap_function(pico_float_micropython __aeabi_fcmple)
+pico_wrap_function(pico_float_micropython __aeabi_fcmpge)
+pico_wrap_function(pico_float_micropython __aeabi_fcmpgt)
+pico_wrap_function(pico_float_micropython __aeabi_fcmpun)
+pico_wrap_function(pico_float_micropython __aeabi_i2f)
+pico_wrap_function(pico_float_micropython __aeabi_l2f)
+pico_wrap_function(pico_float_micropython __aeabi_ui2f)
+pico_wrap_function(pico_float_micropython __aeabi_ul2f)
+pico_wrap_function(pico_float_micropython __aeabi_f2iz)
+pico_wrap_function(pico_float_micropython __aeabi_f2lz)
+pico_wrap_function(pico_float_micropython __aeabi_f2uiz)
+pico_wrap_function(pico_float_micropython __aeabi_f2ulz)
+pico_wrap_function(pico_float_micropython __aeabi_f2d)
+
 if (MICROPY_PY_LWIP)
     target_link_libraries(${MICROPY_TARGET} micropy_lib_lwip)
 
diff --git a/ports/rp2/libm_extra.c b/ports/rp2/libm_extra.c
new file mode 100644
index 0000000000..4628fb0834
--- /dev/null
+++ b/ports/rp2/libm_extra.c
@@ -0,0 +1,69 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <math.h>
+#include <stdint.h>
+
+#define INF_POS (0x7f800000)
+#define INF_NEG (0xff800000)
+
+union float_int_t {
+    float f;
+    uint32_t i;
+};
+
+float __wrap___aeabi_fadd(float x, float y);
+
+// The pico-sdk wraps __aeabi_fadd() with __wrap___aeabi_fadd() in order to use the ROM
+// floating-point functions.  But __wrap___aeabi_fadd() does not handle inf+(-inf) or
+// (-inf)+inf correctly.  To fix this we provide our own __aeabi_fadd() that fixes the
+// inf calculation, and do not use the "--wrap=" linker command.  The compiler then
+// picks our __aeabi_fadd() instead of its built-in one.  And the pico-sdk function
+// still exists for us to call.
+float __aeabi_fadd(float x, float y) {
+    // Handle addition of inf/-inf.  This is optimised to reduce C stack usage, and
+    // only have one comparison/jump in the common case of x != inf.
+    union float_int_t xu = {.f = x};
+    union float_int_t yu = {.f = y};
+    if ((xu.i << 1) == (INF_POS << 1)) {
+        if (xu.i == INF_POS) {
+            if (yu.i == INF_POS) {
+                return INFINITY;
+            } else if (yu.i == INF_NEG) {
+                return NAN;
+            }
+        } else {
+            if (yu.i == INF_POS) {
+                return NAN;
+            } else if (yu.i == INF_NEG) {
+                return -INFINITY;
+            }
+        }
+    }
+
+    // Use the pico-sdk function for all other calculations.
+    return __wrap___aeabi_fadd(x, y);
+}

From b796f1e3f12f3c0a0a75b4b1b7f01f234a3f4dda Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 6 Dec 2023 14:05:14 +1100
Subject: [PATCH 224/310] tests/float/inf_nan_arith.py: Include -inf in
 argument combos.

This adds tests for, eg, -inf + inf which should be nan.

Signed-off-by: Damien George <damien@micropython.org>
---
 tests/float/inf_nan_arith.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/float/inf_nan_arith.py b/tests/float/inf_nan_arith.py
index d1a6b18872..33cadbf399 100644
--- a/tests/float/inf_nan_arith.py
+++ b/tests/float/inf_nan_arith.py
@@ -3,7 +3,7 @@
 inf = float("inf")
 nan = float("nan")
 
-values = (-2, -1, 0, 1, 2, inf, nan)
+values = (-2, -1, 0, 1, 2, inf, -inf, nan)
 
 for x in values:
     for y in values:

From d30d5c99afba705e8286e9177768e0e38db59fff Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 6 Dec 2023 16:05:37 +1100
Subject: [PATCH 225/310] tests/run-tests.py: Skip Thumb2 tests if target
 doesn't support them.

Signed-off-by: Damien George <damien@micropython.org>
---
 tests/feature_check/inlineasm_thumb2.py     | 10 ++++++++++
 tests/feature_check/inlineasm_thumb2.py.exp |  1 +
 tests/run-tests.py                          | 15 +++++++++++++++
 3 files changed, 26 insertions(+)
 create mode 100644 tests/feature_check/inlineasm_thumb2.py
 create mode 100644 tests/feature_check/inlineasm_thumb2.py.exp

diff --git a/tests/feature_check/inlineasm_thumb2.py b/tests/feature_check/inlineasm_thumb2.py
new file mode 100644
index 0000000000..bc4c128baf
--- /dev/null
+++ b/tests/feature_check/inlineasm_thumb2.py
@@ -0,0 +1,10 @@
+# check if Thumb2/ARMV7M instructions are supported
+
+
+@micropython.asm_thumb
+def f():
+    it(eq)
+    nop()
+
+
+print("thumb2")
diff --git a/tests/feature_check/inlineasm_thumb2.py.exp b/tests/feature_check/inlineasm_thumb2.py.exp
new file mode 100644
index 0000000000..05d125af9f
--- /dev/null
+++ b/tests/feature_check/inlineasm_thumb2.py.exp
@@ -0,0 +1 @@
+thumb2
diff --git a/tests/run-tests.py b/tests/run-tests.py
index 2d511c20ca..2dc387946c 100755
--- a/tests/run-tests.py
+++ b/tests/run-tests.py
@@ -465,6 +465,21 @@ def run_tests(pyb, tests, args, result_dir, num_threads=1):
         if output != b"a=1\n":
             skip_fstring = True
 
+        # Check if @micropython.asm_thumb supports Thumb2 instructions, and skip such tests if it doesn't
+        output = run_feature_check(pyb, args, base_path, "inlineasm_thumb2.py")
+        if output != b"thumb2\n":
+            skip_tests.add("inlineasm/asmbcc.py")
+            skip_tests.add("inlineasm/asmbitops.py")
+            skip_tests.add("inlineasm/asmconst.py")
+            skip_tests.add("inlineasm/asmdiv.py")
+            skip_tests.add("inlineasm/asmfpaddsub.py")
+            skip_tests.add("inlineasm/asmfpcmp.py")
+            skip_tests.add("inlineasm/asmfpldrstr.py")
+            skip_tests.add("inlineasm/asmfpmuldiv.py")
+            skip_tests.add("inlineasm/asmfpsqrt.py")
+            skip_tests.add("inlineasm/asmit.py")
+            skip_tests.add("inlineasm/asmspecialregs.py")
+
         # Check if emacs repl is supported, and skip such tests if it's not
         t = run_feature_check(pyb, args, base_path, "repl_emacs_check.py")
         if "True" not in str(t, "ascii"):

From 50f31cc902d284db9f6ddbd60101608cfdbdbe7b Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Thu, 2 Nov 2023 09:10:38 +0100
Subject: [PATCH 226/310] extmod/modnetwork: Add deinit function to NIC
 protocol.

This is usually called on soft-reboot, a NIC can implement this to do any
necessary cleaning up (such as invalidating root pointers).

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 extmod/modnetwork.c | 9 +++++++++
 extmod/modnetwork.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/extmod/modnetwork.c b/extmod/modnetwork.c
index f5734af9b5..527d1729e6 100644
--- a/extmod/modnetwork.c
+++ b/extmod/modnetwork.c
@@ -65,6 +65,15 @@ void mod_network_init(void) {
 }
 
 void mod_network_deinit(void) {
+    #if !MICROPY_PY_LWIP
+    for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) {
+        mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i];
+        const mod_network_nic_protocol_t *nic_protocol = MP_OBJ_TYPE_GET_SLOT(mp_obj_get_type(nic), protocol);
+        if (nic_protocol->deinit) {
+            nic_protocol->deinit();
+        }
+    }
+    #endif
 }
 
 void mod_network_register_nic(mp_obj_t nic) {
diff --git a/extmod/modnetwork.h b/extmod/modnetwork.h
index e3239c2a05..0a7897faaa 100644
--- a/extmod/modnetwork.h
+++ b/extmod/modnetwork.h
@@ -80,6 +80,7 @@ struct _mod_network_socket_obj_t;
 typedef struct _mod_network_nic_protocol_t {
     // API for non-socket operations
     int (*gethostbyname)(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *ip_out);
+    void (*deinit)(void);
 
     // API for socket operations; return -1 on error
     int (*socket)(struct _mod_network_socket_obj_t *socket, int *_errno);

From 0960d64d3b040b81524f0284d28854f3b929f381 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Thu, 2 Nov 2023 10:44:50 +0100
Subject: [PATCH 227/310] extmod/network_ninaw10: Switch to using soft-timer
 for polling.

This patch simplifies the connection and sockets polling code, by switching
to a soft-timer to schedule polling code, and by using one node for
scheduling.  This also fixes any issues that could result from using a heap
allocated machine_timer, and includes better handling of the sockets poll
list.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 extmod/network_ninaw10.c | 113 +++++++++++++++++++++++++--------------
 1 file changed, 74 insertions(+), 39 deletions(-)

diff --git a/extmod/network_ninaw10.c b/extmod/network_ninaw10.c
index 264eb1437e..1deb117e70 100644
--- a/extmod/network_ninaw10.c
+++ b/extmod/network_ninaw10.c
@@ -42,6 +42,7 @@
 #include "py/misc.h"
 #include "py/mperrno.h"
 #include "shared/netutils/netutils.h"
+#include "shared/runtime/softtimer.h"
 #include "extmod/modnetwork.h"
 #include "modmachine.h"
 
@@ -50,6 +51,7 @@
 typedef struct _nina_obj_t {
     mp_obj_base_t base;
     bool active;
+    bool poll_enable;
     uint32_t itf;
     mp_uint_t security;
     char ssid[NINA_MAX_SSID_LEN + 1];
@@ -71,6 +73,7 @@ typedef struct _nina_obj_t {
 #define SO_ERROR                (0x1007)
 #define SO_TYPE                 (0x1008)
 #define SO_NO_CHECK             (0x100a)
+#define NINAW10_POLL_INTERVAL   (100)
 
 #define is_nonblocking_error(errno) ((errno) == MP_EAGAIN || (errno) == MP_EWOULDBLOCK || (errno) == MP_EINPROGRESS)
 
@@ -78,23 +81,56 @@ typedef struct _nina_obj_t {
 
 static uint16_t bind_port = BIND_PORT_RANGE_MIN;
 const mp_obj_type_t mod_network_nic_type_nina;
-static nina_obj_t network_nina_wl_sta = {{(mp_obj_type_t *)&mod_network_nic_type_nina}, false, MOD_NETWORK_STA_IF};
-static nina_obj_t network_nina_wl_ap = {{(mp_obj_type_t *)&mod_network_nic_type_nina}, false, MOD_NETWORK_AP_IF};
-static mp_sched_node_t mp_wifi_sockpoll_node;
-static mp_sched_node_t mp_wifi_connpoll_node;
+static nina_obj_t network_nina_wl_sta = {{(mp_obj_type_t *)&mod_network_nic_type_nina}, false, false, MOD_NETWORK_STA_IF};
+static nina_obj_t network_nina_wl_ap = {{(mp_obj_type_t *)&mod_network_nic_type_nina}, false, false, MOD_NETWORK_AP_IF};
+static mp_sched_node_t mp_wifi_poll_node;
+static soft_timer_entry_t mp_wifi_poll_timer;
+STATIC void network_ninaw10_deinit(void);
+
+STATIC bool network_ninaw10_poll_list_is_empty(void) {
+    return MP_STATE_PORT(mp_wifi_poll_list) == NULL ||
+           MP_STATE_PORT(mp_wifi_poll_list)->len == 0;
+}
+
+STATIC void network_ninaw10_poll_list_insert(mp_obj_t socket) {
+    if (MP_STATE_PORT(mp_wifi_poll_list) == NULL) {
+        MP_STATE_PORT(mp_wifi_poll_list) = mp_obj_new_list(0, NULL);
+    }
+    mp_obj_list_append(MP_STATE_PORT(mp_wifi_poll_list), socket);
+}
+
+STATIC void network_ninaw10_poll_list_remove(mp_obj_t socket) {
+    if (MP_STATE_PORT(mp_wifi_poll_list) == NULL) {
+        return;
+    }
+    mp_obj_list_remove(MP_STATE_PORT(mp_wifi_poll_list), socket);
+    if (MP_STATE_PORT(mp_wifi_poll_list)->len == 0) {
+        MP_STATE_PORT(mp_wifi_poll_list) = NULL;
+    }
+}
 
 STATIC void network_ninaw10_poll_sockets(mp_sched_node_t *node) {
     (void)node;
-    for (mp_uint_t i = 0; i < MP_STATE_PORT(mp_wifi_sockpoll_list)->len; i++) {
-        mod_network_socket_obj_t *socket = MP_STATE_PORT(mp_wifi_sockpoll_list)->items[i];
+    for (mp_uint_t i = 0; MP_STATE_PORT(mp_wifi_poll_list) && i < MP_STATE_PORT(mp_wifi_poll_list)->len;) {
+        mod_network_socket_obj_t *socket = MP_STATE_PORT(mp_wifi_poll_list)->items[i];
         uint8_t flags = 0;
         if (socket->callback == MP_OBJ_NULL || nina_socket_poll(socket->fileno, &flags) < 0) {
-            // remove from poll list on error.
+            // Remove socket from poll list on error.
             socket->callback = MP_OBJ_NULL;
-            mp_obj_list_remove(MP_STATE_PORT(mp_wifi_sockpoll_list), socket);
-        } else if (flags & SOCKET_POLL_RD) {
+            network_ninaw10_poll_list_remove(socket);
+            // Check the same index on the next iteration.
+            continue;
+        }
+        if (flags & SOCKET_POLL_RD) {
             mp_call_function_1(socket->callback, MP_OBJ_FROM_PTR(socket));
         }
+        i++;
+        debug_printf("poll_sockets(%d) -> flags %d\n", socket->fileno, flags);
+    }
+
+    if (!network_ninaw10_poll_list_is_empty()) {
+        // Reschedule the sockets polling code.
+        soft_timer_reinsert(&mp_wifi_poll_timer, NINAW10_POLL_INTERVAL);
     }
 }
 
@@ -104,10 +140,8 @@ STATIC void network_ninaw10_poll_connect(mp_sched_node_t *node) {
     int status = nina_connection_status();
     if (status == NINA_STATUS_CONNECTED) {
         // Connected to AP, nothing else to do.
-        return;
-    }
-
-    if (status != NINA_STATUS_NO_SSID_AVAIL) {
+        self->poll_enable = false;
+    } else if (status != NINA_STATUS_NO_SSID_AVAIL) {
         // If not connected, and no connection in progress, the connection attempt has failed.
         // Read the ESP failure reason, reconnect and reschedule the connection polling code.
         int reason = nina_connection_reason();
@@ -124,21 +158,23 @@ STATIC void network_ninaw10_poll_connect(mp_sched_node_t *node) {
             }
         } else {
             // Will not attempt to reconnect if there's another error code set.
-            return;
+            self->poll_enable = false;
         }
     }
 
-    // Reschedule the connection polling code.
-    mp_sched_schedule_node(&mp_wifi_connpoll_node, network_ninaw10_poll_connect);
+    // Reinsert the timer to schedule the polling code.
+    soft_timer_reinsert(&mp_wifi_poll_timer, NINAW10_POLL_INTERVAL);
 }
 
-STATIC mp_obj_t network_ninaw10_timer_callback(mp_obj_t none_in) {
-    if (MP_STATE_PORT(mp_wifi_sockpoll_list) != MP_OBJ_NULL && MP_STATE_PORT(mp_wifi_sockpoll_list)->len) {
-        mp_sched_schedule_node(&mp_wifi_sockpoll_node, network_ninaw10_poll_sockets);
+STATIC void network_ninaw10_timer_callback(soft_timer_entry_t *self) {
+    debug_printf("timer_callback() poll status STA: %d AP: %d SOCKETS: %d\n",
+        network_nina_wl_sta.poll_enable, network_nina_wl_ap.poll_enable, !network_ninaw10_poll_list_is_empty());
+    if (network_nina_wl_sta.poll_enable) {
+        mp_sched_schedule_node(&mp_wifi_poll_node, network_ninaw10_poll_connect);
+    } else if (!network_ninaw10_poll_list_is_empty()) {
+        mp_sched_schedule_node(&mp_wifi_poll_node, network_ninaw10_poll_sockets);
     }
-    return mp_const_none;
 }
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(network_ninaw10_timer_callback_obj, network_ninaw10_timer_callback);
 
 STATIC mp_obj_t network_ninaw10_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 0, 1, false);
@@ -157,6 +193,7 @@ STATIC mp_obj_t network_ninaw10_active(size_t n_args, const mp_obj_t *args) {
     nina_obj_t *self = MP_OBJ_TO_PTR(args[0]);
     if (n_args == 2) {
         bool active = mp_obj_is_true(args[1]);
+        network_ninaw10_deinit();
         if (active) {
             int error = 0;
             if ((error = nina_init()) != 0) {
@@ -185,19 +222,9 @@ STATIC mp_obj_t network_ninaw10_active(size_t n_args, const mp_obj_t *args) {
                     NINA_FW_VER_MIN_MAJOR, NINA_FW_VER_MIN_MINOR, NINA_FW_VER_MIN_PATCH, semver[NINA_FW_VER_MAJOR_OFFS] - 48,
                     semver[NINA_FW_VER_MINOR_OFFS] - 48, semver[NINA_FW_VER_PATCH_OFFS] - 48);
             }
-            MP_STATE_PORT(mp_wifi_sockpoll_list) = mp_obj_new_list(0, NULL);
-            if (MP_STATE_PORT(mp_wifi_timer) == MP_OBJ_NULL) {
-                // Start sockets poll timer
-                mp_obj_t timer_args[] = {
-                    MP_OBJ_NEW_QSTR(MP_QSTR_freq), MP_OBJ_NEW_SMALL_INT(10),
-                    MP_OBJ_NEW_QSTR(MP_QSTR_callback), MP_OBJ_FROM_PTR(&network_ninaw10_timer_callback_obj),
-                };
-                MP_STATE_PORT(mp_wifi_timer) = MP_OBJ_TYPE_GET_SLOT(&machine_timer_type, make_new)((mp_obj_t)&machine_timer_type, 0, 2, timer_args);
-            }
+            soft_timer_static_init(&mp_wifi_poll_timer, SOFT_TIMER_MODE_ONE_SHOT, 0, network_ninaw10_timer_callback);
         } else {
             nina_deinit();
-            MP_STATE_PORT(mp_wifi_timer) = MP_OBJ_NULL;
-            MP_STATE_PORT(mp_wifi_sockpoll_list) = MP_OBJ_NULL;
         }
         self->active = active;
         return mp_const_none;
@@ -278,7 +305,8 @@ STATIC mp_obj_t network_ninaw10_connect(mp_uint_t n_args, const mp_obj_t *pos_ar
         self->security = security;
         strncpy(self->key, key, NINA_MAX_WPA_LEN);
         strncpy(self->ssid, ssid, NINA_MAX_SSID_LEN);
-        mp_sched_schedule_node(&mp_wifi_connpoll_node, network_ninaw10_poll_connect);
+        self->poll_enable = true;
+        soft_timer_reinsert(&mp_wifi_poll_timer, NINAW10_POLL_INTERVAL);
     } else {
         mp_uint_t channel = args[ARG_channel].u_int;
 
@@ -528,10 +556,8 @@ STATIC int network_ninaw10_socket_socket(mod_network_socket_obj_t *socket, int *
 STATIC void network_ninaw10_socket_close(mod_network_socket_obj_t *socket) {
     debug_printf("socket_close(%d)\n", socket->fileno);
     if (socket->callback != MP_OBJ_NULL) {
-        mp_sched_lock();
         socket->callback = MP_OBJ_NULL;
-        mp_obj_list_remove(MP_STATE_PORT(mp_wifi_sockpoll_list), socket);
-        mp_sched_unlock();
+        network_ninaw10_poll_list_remove(socket);
     }
     if (socket->fileno >= 0) {
         nina_socket_close(socket->fileno);
@@ -739,7 +765,8 @@ STATIC int network_ninaw10_socket_setsockopt(mod_network_socket_obj_t *socket, m
         mp_sched_lock();
         socket->callback = (void *)optval;
         if (socket->callback != MP_OBJ_NULL) {
-            mp_obj_list_append(MP_STATE_PORT(mp_wifi_sockpoll_list), socket);
+            network_ninaw10_poll_list_insert(socket);
+            soft_timer_reinsert(&mp_wifi_poll_timer, NINAW10_POLL_INTERVAL);
         }
         mp_sched_unlock();
         return 0;
@@ -803,6 +830,14 @@ STATIC int network_ninaw10_socket_ioctl(mod_network_socket_obj_t *socket, mp_uin
     return ret;
 }
 
+STATIC void network_ninaw10_deinit(void) {
+    // On soft-reboot, gc_sweep_all is called and all open sockets are closed
+    // and collected. Make sure that the driver is not keeping any references
+    // to collected sockets in the poll list.
+    soft_timer_remove(&mp_wifi_poll_timer);
+    MP_STATE_PORT(mp_wifi_poll_list) = NULL;
+}
+
 STATIC const mp_rom_map_elem_t nina_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_active),              MP_ROM_PTR(&network_ninaw10_active_obj) },
     { MP_ROM_QSTR(MP_QSTR_scan),                MP_ROM_PTR(&network_ninaw10_scan_obj) },
@@ -826,6 +861,7 @@ STATIC MP_DEFINE_CONST_DICT(nina_locals_dict, nina_locals_dict_table);
 
 STATIC const mod_network_nic_protocol_t mod_network_nic_protocol_nina = {
     .gethostbyname = network_ninaw10_gethostbyname,
+    .deinit = network_ninaw10_deinit,
     .socket = network_ninaw10_socket_socket,
     .close = network_ninaw10_socket_close,
     .bind = network_ninaw10_socket_bind,
@@ -851,7 +887,6 @@ MP_DEFINE_CONST_OBJ_TYPE(
     );
 
 MP_REGISTER_ROOT_POINTER(struct _machine_spi_obj_t *mp_wifi_spi);
-MP_REGISTER_ROOT_POINTER(struct _machine_timer_obj_t *mp_wifi_timer);
-MP_REGISTER_ROOT_POINTER(struct _mp_obj_list_t *mp_wifi_sockpoll_list);
+MP_REGISTER_ROOT_POINTER(struct _mp_obj_list_t *mp_wifi_poll_list);
 
 #endif // #if MICROPY_PY_BLUETOOTH && MICROPY_PY_NETWORK_NINAW10

From 66be82da7ce63e9c907d7d2ed00341dae80ee83f Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 7 Dec 2023 14:07:21 +1100
Subject: [PATCH 228/310] esp8266: Avoid including ep_mphal.h directly.

This header has no include guards and is apparently only supposed to be
included from py/mphal.h.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/esp8266/esp_init_data.c | 1 -
 ports/esp8266/esp_mphal.c     | 2 +-
 ports/esp8266/uart.c          | 2 +-
 3 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/ports/esp8266/esp_init_data.c b/ports/esp8266/esp_init_data.c
index eb4d99ebda..c369ed58f5 100644
--- a/ports/esp8266/esp_init_data.c
+++ b/ports/esp8266/esp_init_data.c
@@ -27,7 +27,6 @@
 #include <stdio.h>
 #include "ets_sys.h"
 #include "etshal.h"
-#include "esp_mphal.h"
 #include "user_interface.h"
 #include "extmod/misc.h"
 
diff --git a/ports/esp8266/esp_mphal.c b/ports/esp8266/esp_mphal.c
index 06502e85c4..afa934e00c 100644
--- a/ports/esp8266/esp_mphal.c
+++ b/ports/esp8266/esp_mphal.c
@@ -28,9 +28,9 @@
 #include "ets_sys.h"
 #include "etshal.h"
 #include "uart.h"
-#include "esp_mphal.h"
 #include "user_interface.h"
 #include "ets_alt_task.h"
+#include "py/mphal.h"
 #include "py/runtime.h"
 #include "py/stream.h"
 #include "extmod/misc.h"
diff --git a/ports/esp8266/uart.c b/ports/esp8266/uart.c
index f761ecfd70..c0a33acb57 100644
--- a/ports/esp8266/uart.c
+++ b/ports/esp8266/uart.c
@@ -17,7 +17,7 @@
 #include "etshal.h"
 #include "c_types.h"
 #include "user_interface.h"
-#include "esp_mphal.h"
+#include "py/mphal.h"
 
 // seems that this is missing in the Espressif SDK
 #define FUNC_U0RXD 0

From f5be0128e4da1417136495c20888f8291cd22386 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 30 Nov 2023 16:06:32 +1100
Subject: [PATCH 229/310] py: Add port-agnostic inline functions for event
 handling.

These are intended to replace MICROPY_EVENT_POLL_HOOK and
MICROPY_EVENT_POLL_HOOK_FAST, which are insufficient for tickless ports.

This implementation is along the lines suggested here:
https://github.com/micropython/micropython/issues/12925#issuecomment-1803038430

Currently any usage of these functions expands to use the existing hook
macros, but this can be switched over port by port.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 py/mphal.h     | 13 +++++++++++++
 py/runtime.h   | 17 +++++++++++++++++
 py/scheduler.c | 36 ++++++++++++++++++++++++++++++++++++
 3 files changed, 66 insertions(+)

diff --git a/py/mphal.h b/py/mphal.h
index 19fceef718..81cf50918e 100644
--- a/py/mphal.h
+++ b/py/mphal.h
@@ -98,4 +98,17 @@ uint64_t mp_hal_time_ns(void);
 #include "extmod/virtpin.h"
 #endif
 
+// Event handling and wait-for-event functions.
+
+#ifndef MICROPY_INTERNAL_WFE
+// Fallback definition for ports that don't need to suspend the CPU.
+#define MICROPY_INTERNAL_WFE(TIMEOUT_MS) (void)0
+#endif
+
+#ifndef MICROPY_INTERNAL_EVENT_HOOK
+// Fallback definition for ports that don't need any port-specific
+// non-blocking event processing.
+#define MICROPY_INTERNAL_EVENT_HOOK (void)0
+#endif
+
 #endif // MICROPY_INCLUDED_PY_MPHAL_H
diff --git a/py/runtime.h b/py/runtime.h
index 5fa072d7e9..a04d4584f8 100644
--- a/py/runtime.h
+++ b/py/runtime.h
@@ -109,6 +109,23 @@ bool mp_sched_schedule(mp_obj_t function, mp_obj_t arg);
 bool mp_sched_schedule_node(mp_sched_node_t *node, mp_sched_callback_t callback);
 #endif
 
+// Handles any pending MicroPython events without waiting for an interrupt or event.
+void mp_event_handle_nowait(void);
+
+// Handles any pending MicroPython events and then suspends execution until the
+// next interrupt or event.
+//
+// Note: on "tickless" ports this can suspend execution for a long time,
+// don't call unless you know an interrupt is coming to continue execution.
+// On "ticked" ports it may return early due to the tick interrupt.
+void mp_event_wait_indefinite(void);
+
+// Handle any pending MicroPython events and then suspends execution until the
+// next interrupt or event, or until timeout_ms milliseconds have elapsed.
+//
+// On "ticked" ports it may return early due to the tick interrupt.
+void mp_event_wait_ms(mp_uint_t timeout_ms);
+
 // extra printing method specifically for mp_obj_t's which are integral type
 int mp_print_mp_int(const mp_print_t *print, mp_obj_t x, int base, int base_char, int flags, char fill, int width, int prec);
 
diff --git a/py/scheduler.c b/py/scheduler.c
index b9a43bfbdb..3eae8b4fa3 100644
--- a/py/scheduler.c
+++ b/py/scheduler.c
@@ -241,3 +241,39 @@ void mp_handle_pending(bool raise_exc) {
     }
     #endif
 }
+
+// Handles any pending MicroPython events without waiting for an interrupt or event.
+void mp_event_handle_nowait(void) {
+    #if defined(MICROPY_EVENT_POLL_HOOK_FAST) && !MICROPY_PREVIEW_VERSION_2
+    // For ports still using the old macros.
+    MICROPY_EVENT_POLL_HOOK_FAST
+    #else
+    // Process any port layer (non-blocking) events.
+    MICROPY_INTERNAL_EVENT_HOOK;
+    mp_handle_pending(true);
+    #endif
+}
+
+// Handles any pending MicroPython events and then suspends execution until the
+// next interrupt or event.
+void mp_event_wait_indefinite(void) {
+    #if defined(MICROPY_EVENT_POLL_HOOK) && !MICROPY_PREVIEW_VERSION_2
+    // For ports still using the old macros.
+    MICROPY_EVENT_POLL_HOOK
+    #else
+    mp_event_handle_nowait();
+    MICROPY_INTERNAL_WFE(-1);
+    #endif
+}
+
+// Handle any pending MicroPython events and then suspends execution until the
+// next interrupt or event, or until timeout_ms milliseconds have elapsed.
+void mp_event_wait_ms(mp_uint_t timeout_ms) {
+    #if defined(MICROPY_EVENT_POLL_HOOK) && !MICROPY_PREVIEW_VERSION_2
+    // For ports still using the old macros.
+    MICROPY_EVENT_POLL_HOOK
+    #else
+    mp_event_handle_nowait();
+    MICROPY_INTERNAL_WFE(timeout_ms);
+    #endif
+}

From df3948d3c23e3572c49d18ede03bf3ac97ee601c Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 30 Nov 2023 14:32:41 +1100
Subject: [PATCH 230/310] extmod: Switch to use new event functions.

See previous commit for details of these functions.  As of this commit,
these still call the old hook macros on all ports.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 extmod/btstack/modbluetooth_btstack.c |  8 ++++----
 extmod/machine_i2c.c                  |  6 +-----
 extmod/modlwip.c                      |  6 +-----
 extmod/modselect.c                    | 16 +++++++++++-----
 extmod/modssl_mbedtls.c               |  4 +---
 extmod/network_cyw43.c                |  9 +++++++--
 extmod/nimble/modbluetooth_nimble.c   |  7 ++++---
 7 files changed, 29 insertions(+), 27 deletions(-)

diff --git a/extmod/btstack/modbluetooth_btstack.c b/extmod/btstack/modbluetooth_btstack.c
index 0c15e93431..211214768f 100644
--- a/extmod/btstack/modbluetooth_btstack.c
+++ b/extmod/btstack/modbluetooth_btstack.c
@@ -552,7 +552,7 @@ STATIC void set_random_address(void) {
         volatile bool ready = false;
         btstack_crypto_random_generate(&sm_crypto_random_request, static_addr, 6, &btstack_static_address_ready, (void *)&ready);
         while (!ready) {
-            MICROPY_EVENT_POLL_HOOK
+            mp_event_wait_indefinite();
         }
 
         #endif // MICROPY_BLUETOOTH_USE_MP_HAL_GET_MAC_STATIC_ADDRESS
@@ -574,7 +574,7 @@ STATIC void set_random_address(void) {
             break;
         }
 
-        MICROPY_EVENT_POLL_HOOK
+        mp_event_wait_indefinite();
     }
     DEBUG_printf("set_random_address: Address loaded by controller\n");
 }
@@ -654,7 +654,7 @@ int mp_bluetooth_init(void) {
     // Either the HCI event will set state to ACTIVE, or the timeout will set it to TIMEOUT.
     mp_bluetooth_btstack_port_start();
     while (mp_bluetooth_btstack_state == MP_BLUETOOTH_BTSTACK_STATE_STARTING) {
-        MICROPY_EVENT_POLL_HOOK
+        mp_event_wait_indefinite();
     }
     btstack_run_loop_remove_timer(&btstack_init_deinit_timeout);
 
@@ -727,7 +727,7 @@ void mp_bluetooth_deinit(void) {
     // either timeout or clean shutdown.
     mp_bluetooth_btstack_port_deinit();
     while (mp_bluetooth_btstack_state == MP_BLUETOOTH_BTSTACK_STATE_ACTIVE) {
-        MICROPY_EVENT_POLL_HOOK
+        mp_event_wait_indefinite();
     }
     btstack_run_loop_remove_timer(&btstack_init_deinit_timeout);
 
diff --git a/extmod/machine_i2c.c b/extmod/machine_i2c.c
index 6cc2aa5bbf..1964284ec8 100644
--- a/extmod/machine_i2c.c
+++ b/extmod/machine_i2c.c
@@ -331,11 +331,7 @@ STATIC mp_obj_t machine_i2c_scan(mp_obj_t self_in) {
         // This scan loop may run for some time, so process any pending events/exceptions,
         // or allow the port to run any necessary background tasks.  But do it as fast as
         // possible, in particular we are not waiting on any events.
-        #if defined(MICROPY_EVENT_POLL_HOOK_FAST)
-        MICROPY_EVENT_POLL_HOOK_FAST;
-        #elif defined(MICROPY_EVENT_POLL_HOOK)
-        MICROPY_EVENT_POLL_HOOK
-        #endif
+        mp_event_handle_nowait();
     }
     return list;
 }
diff --git a/extmod/modlwip.c b/extmod/modlwip.c
index 432b97e8fe..6f8703d5a7 100644
--- a/extmod/modlwip.c
+++ b/extmod/modlwip.c
@@ -318,11 +318,7 @@ typedef struct _lwip_socket_obj_t {
 } lwip_socket_obj_t;
 
 static inline void poll_sockets(void) {
-    #ifdef MICROPY_EVENT_POLL_HOOK
-    MICROPY_EVENT_POLL_HOOK;
-    #else
-    mp_hal_delay_ms(1);
-    #endif
+    mp_event_wait_ms(1);
 }
 
 STATIC struct tcp_pcb *volatile *lwip_socket_incoming_array(lwip_socket_obj_t *socket) {
diff --git a/extmod/modselect.c b/extmod/modselect.c
index d665a10827..07ef3d79c8 100644
--- a/extmod/modselect.c
+++ b/extmod/modselect.c
@@ -306,6 +306,7 @@ STATIC mp_uint_t poll_set_poll_once(poll_set_t *poll_set, size_t *rwx_num) {
 
 STATIC mp_uint_t poll_set_poll_until_ready_or_timeout(poll_set_t *poll_set, size_t *rwx_num, mp_uint_t timeout) {
     mp_uint_t start_ticks = mp_hal_ticks_ms();
+    bool has_timeout = timeout != (mp_uint_t)-1;
 
     #if MICROPY_PY_SELECT_POSIX_OPTIMISATIONS
 
@@ -350,12 +351,12 @@ STATIC mp_uint_t poll_set_poll_until_ready_or_timeout(poll_set_t *poll_set, size
         }
 
         // Return if an object is ready, or if the timeout expired.
-        if (n_ready > 0 || (timeout != (mp_uint_t)-1 && mp_hal_ticks_ms() - start_ticks >= timeout)) {
+        if (n_ready > 0 || (has_timeout && mp_hal_ticks_ms() - start_ticks >= timeout)) {
             return n_ready;
         }
 
-        // This would be MICROPY_EVENT_POLL_HOOK but the call to poll() above already includes a delay.
-        mp_handle_pending(true);
+        // This would be mp_event_wait_ms() but the call to poll() above already includes a delay.
+        mp_event_handle_nowait();
     }
 
     #else
@@ -363,10 +364,15 @@ STATIC mp_uint_t poll_set_poll_until_ready_or_timeout(poll_set_t *poll_set, size
     for (;;) {
         // poll the objects
         mp_uint_t n_ready = poll_set_poll_once(poll_set, rwx_num);
-        if (n_ready > 0 || (timeout != (mp_uint_t)-1 && mp_hal_ticks_ms() - start_ticks >= timeout)) {
+        uint32_t elapsed = mp_hal_ticks_ms() - start_ticks;
+        if (n_ready > 0 || (has_timeout && elapsed >= timeout)) {
             return n_ready;
         }
-        MICROPY_EVENT_POLL_HOOK
+        if (has_timeout) {
+            mp_event_wait_ms(timeout - elapsed);
+        } else {
+            mp_event_wait_indefinite();
+        }
     }
 
     #endif
diff --git a/extmod/modssl_mbedtls.c b/extmod/modssl_mbedtls.c
index 449952594c..1d7705c17f 100644
--- a/extmod/modssl_mbedtls.c
+++ b/extmod/modssl_mbedtls.c
@@ -391,9 +391,7 @@ STATIC mp_obj_t ssl_socket_make_new(mp_obj_ssl_context_t *ssl_context, mp_obj_t
             if (ret != MBEDTLS_ERR_SSL_WANT_READ && ret != MBEDTLS_ERR_SSL_WANT_WRITE) {
                 goto cleanup;
             }
-            #ifdef MICROPY_EVENT_POLL_HOOK
-            MICROPY_EVENT_POLL_HOOK
-            #endif
+            mp_event_wait_ms(1);
         }
     }
 
diff --git a/extmod/network_cyw43.c b/extmod/network_cyw43.c
index 834f09eae9..f8490d6b9a 100644
--- a/extmod/network_cyw43.c
+++ b/extmod/network_cyw43.c
@@ -222,8 +222,13 @@ STATIC mp_obj_t network_cyw43_scan(size_t n_args, const mp_obj_t *pos_args, mp_m
 
     // Wait for scan to finish, with a 10s timeout
     uint32_t start = mp_hal_ticks_ms();
-    while (cyw43_wifi_scan_active(self->cyw) && mp_hal_ticks_ms() - start < 10000) {
-        MICROPY_EVENT_POLL_HOOK
+    const uint32_t TIMEOUT = 10000;
+    while (cyw43_wifi_scan_active(self->cyw)) {
+        uint32_t elapsed = mp_hal_ticks_ms() - start;
+        if (elapsed >= TIMEOUT) {
+            break;
+        }
+        mp_event_wait_ms(TIMEOUT - elapsed);
     }
 
     return res;
diff --git a/extmod/nimble/modbluetooth_nimble.c b/extmod/nimble/modbluetooth_nimble.c
index 3cdf4d1a78..2e1faa9b10 100644
--- a/extmod/nimble/modbluetooth_nimble.c
+++ b/extmod/nimble/modbluetooth_nimble.c
@@ -570,7 +570,7 @@ void mp_bluetooth_nimble_port_shutdown(void) {
     ble_hs_stop(&ble_hs_shutdown_stop_listener, ble_hs_shutdown_stop_cb, NULL);
 
     while (mp_bluetooth_nimble_ble_state != MP_BLUETOOTH_NIMBLE_BLE_STATE_OFF) {
-        MICROPY_EVENT_POLL_HOOK
+        mp_event_wait_indefinite();
     }
 }
 
@@ -636,10 +636,11 @@ int mp_bluetooth_init(void) {
     // On non-ringbuffer builds (NimBLE on STM32/Unix) this will also poll the UART and run the event queue.
     mp_uint_t timeout_start_ticks_ms = mp_hal_ticks_ms();
     while (mp_bluetooth_nimble_ble_state != MP_BLUETOOTH_NIMBLE_BLE_STATE_ACTIVE) {
-        if (mp_hal_ticks_ms() - timeout_start_ticks_ms > NIMBLE_STARTUP_TIMEOUT) {
+        uint32_t elapsed = mp_hal_ticks_ms() - timeout_start_ticks_ms;
+        if (elapsed > NIMBLE_STARTUP_TIMEOUT) {
             break;
         }
-        MICROPY_EVENT_POLL_HOOK
+        mp_event_wait_ms(NIMBLE_STARTUP_TIMEOUT - elapsed);
     }
 
     if (mp_bluetooth_nimble_ble_state != MP_BLUETOOTH_NIMBLE_BLE_STATE_ACTIVE) {

From 28529351aebe45c24e982eaecdba2383d05d2dd4 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 30 Nov 2023 14:34:07 +1100
Subject: [PATCH 231/310] rp2: Switch rp2 and drivers to use new event
 functions.

This commit changes all uses in the rp2 port, and drivers that are
optionally supported by that port.

The old MICROPY_EVENT_POLL_HOOK and MICROPY_EVENT_POLL_HOOK_FAST macros are
no longer used for rp2 builds and are removed (C user code will need to be
changed to suit).

Also take the opportunity to change some timeouts that used 64-bit
arithmetic to 32-bit, to hopefully claw back a little code size.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 drivers/cyw43/cywbt.c         |  4 ++--
 drivers/ninaw10/nina_bt_hci.c |  5 +++--
 ports/rp2/cyw43_configport.h  |  3 ++-
 ports/rp2/machine_uart.c      | 34 +++++++++++++++++++++-------------
 ports/rp2/mpconfigport.h      | 21 +++++++++++----------
 ports/rp2/mphalport.c         | 29 +++++++++++++----------------
 ports/rp2/rp2_flash.c         | 11 +++++------
 ports/rp2/rp2_pio.c           |  4 ++--
 8 files changed, 59 insertions(+), 52 deletions(-)

diff --git a/drivers/cyw43/cywbt.c b/drivers/cyw43/cywbt.c
index d1b19382c5..3f454485ab 100644
--- a/drivers/cyw43/cywbt.c
+++ b/drivers/cyw43/cywbt.c
@@ -68,7 +68,7 @@ STATIC int cywbt_hci_cmd_raw(size_t len, uint8_t *buf) {
     mp_bluetooth_hci_uart_write((void *)buf, len);
     for (int c, i = 0; i < 6; ++i) {
         while ((c = mp_bluetooth_hci_uart_readchar()) == -1) {
-            MICROPY_EVENT_POLL_HOOK
+            mp_event_wait_indefinite();
         }
         buf[i] = c;
     }
@@ -88,7 +88,7 @@ STATIC int cywbt_hci_cmd_raw(size_t len, uint8_t *buf) {
     int sz = buf[2] - 3;
     for (int c, i = 0; i < sz; ++i) {
         while ((c = mp_bluetooth_hci_uart_readchar()) == -1) {
-            MICROPY_EVENT_POLL_HOOK
+            mp_event_wait_indefinite();
         }
         buf[i] = c;
     }
diff --git a/drivers/ninaw10/nina_bt_hci.c b/drivers/ninaw10/nina_bt_hci.c
index 754e99ed76..f0d1b9bc89 100644
--- a/drivers/ninaw10/nina_bt_hci.c
+++ b/drivers/ninaw10/nina_bt_hci.c
@@ -75,12 +75,13 @@ static int nina_hci_cmd(int ogf, int ocf, size_t param_len, const uint8_t *param
     // Receive HCI event packet, initially reading 3 bytes (HCI Event, Event code, Plen).
     for (mp_uint_t start = mp_hal_ticks_ms(), size = 3, i = 0; i < size;) {
         while (!mp_bluetooth_hci_uart_any()) {
-            MICROPY_EVENT_POLL_HOOK
+            mp_uint_t elapsed = mp_hal_ticks_ms() - start;
             // Timeout.
-            if ((mp_hal_ticks_ms() - start) > HCI_COMMAND_TIMEOUT) {
+            if (elapsed > HCI_COMMAND_TIMEOUT) {
                 error_printf("timeout waiting for HCI packet\n");
                 return -1;
             }
+            mp_event_wait_ms(HCI_COMMAND_TIMEOUT - elapsed);
         }
 
         buf[i] = mp_bluetooth_hci_uart_readchar();
diff --git a/ports/rp2/cyw43_configport.h b/ports/rp2/cyw43_configport.h
index 96324ee5ec..b69cfbc263 100644
--- a/ports/rp2/cyw43_configport.h
+++ b/ports/rp2/cyw43_configport.h
@@ -30,6 +30,7 @@
 #include "py/mpconfig.h"
 #include "py/mperrno.h"
 #include "py/mphal.h"
+#include "py/runtime.h"
 #include "extmod/modnetwork.h"
 #include "pendsv.h"
 
@@ -119,6 +120,6 @@ static inline void cyw43_delay_ms(uint32_t ms) {
     mp_hal_delay_ms(ms);
 }
 
-#define CYW43_EVENT_POLL_HOOK MICROPY_EVENT_POLL_HOOK_FAST
+#define CYW43_EVENT_POLL_HOOK mp_event_handle_nowait()
 
 #endif // MICROPY_INCLUDED_RP2_CYW43_CONFIGPORT_H
diff --git a/ports/rp2/machine_uart.c b/ports/rp2/machine_uart.c
index dae57012a8..e48924f09a 100644
--- a/ports/rp2/machine_uart.c
+++ b/ports/rp2/machine_uart.c
@@ -454,8 +454,8 @@ STATIC void mp_machine_uart_sendbreak(machine_uart_obj_t *self) {
 
 STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    uint64_t t = time_us_64() + (uint64_t)self->timeout * 1000;
-    uint64_t timeout_char_us = (uint64_t)self->timeout_char * 1000;
+    mp_uint_t start = mp_hal_ticks_ms();
+    mp_uint_t timeout = self->timeout;
     uint8_t *dest = buf_in;
 
     for (size_t i = 0; i < size; i++) {
@@ -466,7 +466,8 @@ STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t
                 uart_drain_rx_fifo(self);
                 break;
             }
-            if (time_us_64() > t) {  // timed out
+            mp_uint_t elapsed = mp_hal_ticks_ms() - start;
+            if (elapsed > timeout) {  // timed out
                 if (i <= 0) {
                     *errcode = MP_EAGAIN;
                     return MP_STREAM_ERROR;
@@ -474,18 +475,19 @@ STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t
                     return i;
                 }
             }
-            MICROPY_EVENT_POLL_HOOK
+            mp_event_wait_ms(timeout - elapsed);
         }
         *dest++ = ringbuf_get(&(self->read_buffer));
-        t = time_us_64() + timeout_char_us;
+        start = mp_hal_ticks_ms(); // Inter-character timeout
+        timeout = self->timeout_char;
     }
     return size;
 }
 
 STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    uint64_t t = time_us_64() + (uint64_t)self->timeout * 1000;
-    uint64_t timeout_char_us = (uint64_t)self->timeout_char * 1000;
+    mp_uint_t start = mp_hal_ticks_ms();
+    mp_uint_t timeout = self->timeout;
     const uint8_t *src = buf_in;
     size_t i = 0;
 
@@ -502,7 +504,8 @@ STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_
     while (i < size) {
         // Wait for the first/next character to be sent.
         while (ringbuf_free(&(self->write_buffer)) == 0) {
-            if (time_us_64() > t) {  // timed out
+            mp_uint_t elapsed = mp_hal_ticks_ms() - start;
+            if (elapsed > timeout) {  // timed out
                 if (i <= 0) {
                     *errcode = MP_EAGAIN;
                     return MP_STREAM_ERROR;
@@ -510,11 +513,12 @@ STATIC mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_
                     return i;
                 }
             }
-            MICROPY_EVENT_POLL_HOOK
+            mp_event_wait_ms(timeout - elapsed);
         }
         ringbuf_put(&(self->write_buffer), *src++);
         ++i;
-        t = time_us_64() + timeout_char_us;
+        start = mp_hal_ticks_ms(); // Inter-character timeout
+        timeout = self->timeout_char;
         uart_fill_tx_fifo(self);
     }
 
@@ -539,12 +543,16 @@ STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uint
         // Take the worst case assumptions at 13 bit symbol size times 2.
         uint64_t timeout = time_us_64() +
             (uint64_t)(33 + self->write_buffer.size) * 13000000ll * 2 / self->baudrate;
-        do {
+        while (1) {
             if (mp_machine_uart_txdone(self)) {
                 return 0;
             }
-            MICROPY_EVENT_POLL_HOOK
-        } while (time_us_64() < timeout);
+            uint64_t now = time_us_64();
+            if (now >= timeout) {
+                break;
+            }
+            mp_event_wait_ms((timeout - now) / 1000);
+        }
         *errcode = MP_ETIMEDOUT;
         ret = MP_STREAM_ERROR;
     } else {
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index 5ff384c923..b349e0d67b 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -249,18 +249,19 @@ extern const struct _mp_obj_type_t mod_network_nic_type_wiznet5k;
 #define MICROPY_PY_LWIP_REENTER lwip_lock_acquire();
 #define MICROPY_PY_LWIP_EXIT    lwip_lock_release();
 
-#define MICROPY_EVENT_POLL_HOOK_FAST \
-    do { \
-        extern void mp_handle_pending(bool); \
-        mp_handle_pending(true); \
+// Port level Wait-for-Event macro
+//
+// Do not use this macro directly, include py/runtime.h and
+// call mp_event_wait_indefinite() or mp_event_wait_ms(timeout)
+#define MICROPY_INTERNAL_WFE(TIMEOUT_MS) \
+    do {                                 \
+        if ((TIMEOUT_MS) < 0) { \
+            __wfe(); \
+        } else { \
+            best_effort_wfe_or_timeout(make_timeout_time_ms(TIMEOUT_MS)); \
+        } \
     } while (0)
 
-#define MICROPY_EVENT_POLL_HOOK \
-    do { \
-        MICROPY_EVENT_POLL_HOOK_FAST; \
-        __wfe(); \
-    } while (0);
-
 #define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((mp_uint_t)(p) | 1))
 
 #define MP_SSIZE_MAX (0x7fffffff)
diff --git a/ports/rp2/mphalport.c b/ports/rp2/mphalport.c
index 1fb833f2e5..1c784fd737 100644
--- a/ports/rp2/mphalport.c
+++ b/ports/rp2/mphalport.c
@@ -59,24 +59,17 @@ ringbuf_t stdin_ringbuf = { stdin_ringbuf_array, sizeof(stdin_ringbuf_array) };
 
 #endif
 
-#if MICROPY_HW_USB_CDC
-// Explicitly run the USB stack in case the scheduler is locked (eg we are in an
-// interrupt handler) and there is in/out data pending on the USB CDC interface.
-#define MICROPY_EVENT_POLL_HOOK_WITH_USB \
-    do { \
-        MICROPY_EVENT_POLL_HOOK; \
-        mp_usbd_task(); \
-    } while (0)
-
-#else
-#define MICROPY_EVENT_POLL_HOOK_WITH_USB MICROPY_EVENT_POLL_HOOK
-#endif
-
 #if MICROPY_HW_USB_CDC
 
 uint8_t cdc_itf_pending; // keep track of cdc interfaces which need attention to poll
 
 void poll_cdc_interfaces(void) {
+    if (!cdc_itf_pending) {
+        // Explicitly run the USB stack as the scheduler may be locked (eg we are in
+        // an interrupt handler) while there is data pending.
+        mp_usbd_task();
+    }
+
     // any CDC interfaces left to poll?
     if (cdc_itf_pending && ringbuf_free(&stdin_ringbuf)) {
         for (uint8_t itf = 0; itf < 8; ++itf) {
@@ -153,7 +146,7 @@ int mp_hal_stdin_rx_chr(void) {
             return dupterm_c;
         }
         #endif
-        MICROPY_EVENT_POLL_HOOK_WITH_USB;
+        mp_event_wait_indefinite();
     }
 }
 
@@ -173,7 +166,11 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
             int timeout = 0;
             // Wait with a max of USC_CDC_TIMEOUT ms
             while (n > tud_cdc_write_available() && timeout++ < MICROPY_HW_USB_CDC_TX_TIMEOUT) {
-                MICROPY_EVENT_POLL_HOOK_WITH_USB;
+                mp_event_wait_ms(1);
+
+                // Explicitly run the USB stack as the scheduler may be locked (eg we
+                // are in an interrupt handler), while there is data pending.
+                mp_usbd_task();
             }
             if (timeout >= MICROPY_HW_USB_CDC_TX_TIMEOUT) {
                 break;
@@ -193,7 +190,7 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
 void mp_hal_delay_ms(mp_uint_t ms) {
     absolute_time_t t = make_timeout_time_ms(ms);
     do {
-        MICROPY_EVENT_POLL_HOOK_FAST;
+        mp_event_handle_nowait();
     } while (!best_effort_wfe_or_timeout(t));
 }
 
diff --git a/ports/rp2/rp2_flash.c b/ports/rp2/rp2_flash.c
index bc284cd976..b1afe1cbd1 100644
--- a/ports/rp2/rp2_flash.c
+++ b/ports/rp2/rp2_flash.c
@@ -121,11 +121,10 @@ STATIC mp_obj_t rp2_flash_readblocks(size_t n_args, const mp_obj_t *args) {
         offset += mp_obj_get_int(args[3]);
     }
     memcpy(bufinfo.buf, (void *)(XIP_BASE + self->flash_base + offset), bufinfo.len);
-    // MICROPY_EVENT_POLL_HOOK_FAST is called here to avoid a fail in registering
+    // mp_event_handle_nowait() is called here to avoid a fail in registering
     // USB at boot time, if the board is busy loading files or scanning the file
-    // system. MICROPY_EVENT_POLL_HOOK_FAST calls tud_task(). As the alternative
-    // tud_task() should be called in the USB IRQ. See discussion in PR #10423.
-    MICROPY_EVENT_POLL_HOOK_FAST;
+    // system. mp_event_handle_nowait() will call the TinyUSB task if needed.
+    mp_event_handle_nowait();
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(rp2_flash_readblocks_obj, 3, 4, rp2_flash_readblocks);
@@ -140,7 +139,7 @@ STATIC mp_obj_t rp2_flash_writeblocks(size_t n_args, const mp_obj_t *args) {
         mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
         flash_range_erase(self->flash_base + offset, bufinfo.len);
         MICROPY_END_ATOMIC_SECTION(atomic_state);
-        MICROPY_EVENT_POLL_HOOK_FAST;
+        mp_event_handle_nowait();
         // TODO check return value
     } else {
         offset += mp_obj_get_int(args[3]);
@@ -149,7 +148,7 @@ STATIC mp_obj_t rp2_flash_writeblocks(size_t n_args, const mp_obj_t *args) {
     mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
     flash_range_program(self->flash_base + offset, bufinfo.buf, bufinfo.len);
     MICROPY_END_ATOMIC_SECTION(atomic_state);
-    MICROPY_EVENT_POLL_HOOK_FAST;
+    mp_event_handle_nowait();
     // TODO check return value
     return mp_const_none;
 }
diff --git a/ports/rp2/rp2_pio.c b/ports/rp2/rp2_pio.c
index 2e30475257..3a0ab844ea 100644
--- a/ports/rp2/rp2_pio.c
+++ b/ports/rp2/rp2_pio.c
@@ -729,7 +729,7 @@ STATIC mp_obj_t rp2_state_machine_get(size_t n_args, const mp_obj_t *args) {
     for (;;) {
         while (pio_sm_is_rx_fifo_empty(self->pio, self->sm)) {
             // This delay must be fast.
-            MICROPY_EVENT_POLL_HOOK_FAST;
+            mp_event_handle_nowait();
         }
         uint32_t value = pio_sm_get(self->pio, self->sm) >> shift;
         if (dest == NULL) {
@@ -787,7 +787,7 @@ STATIC mp_obj_t rp2_state_machine_put(size_t n_args, const mp_obj_t *args) {
         }
         while (pio_sm_is_tx_fifo_full(self->pio, self->sm)) {
             // This delay must be fast.
-            MICROPY_EVENT_POLL_HOOK_FAST;
+            mp_event_handle_nowait();
         }
         pio_sm_put(self->pio, self->sm, value << shift);
     }

From 393938b3e61ee34b47773766a91a45d3beea6294 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 30 Nov 2023 16:45:11 +1100
Subject: [PATCH 232/310] rp2/main: Enable SEVONPEND CPU interrupt bit.

Previously this was not set, so potential for race conditions in interrupt
handlers this didn't issue SEV.  (Which is currently all of them, as far as
I can see.)

Eventually we might be able to augment the interrupt handlers that wake the
main thread to call SEV, and leave the others as-is to suspend the CPU
slightly faster, but this will solve the issue for now.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/rp2/main.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ports/rp2/main.c b/ports/rp2/main.c
index 43680a46cd..8b41fac4ba 100644
--- a/ports/rp2/main.c
+++ b/ports/rp2/main.c
@@ -73,6 +73,9 @@ bi_decl(bi_program_feature_group_with_flags(BINARY_INFO_TAG_MICROPYTHON,
     BI_NAMED_GROUP_SEPARATE_COMMAS | BI_NAMED_GROUP_SORT_ALPHA));
 
 int main(int argc, char **argv) {
+    // This is a tickless port, interrupts should always trigger SEV.
+    SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
+
     #if MICROPY_HW_ENABLE_UART_REPL
     bi_decl(bi_program_feature("UART REPL"))
     setup_default_uart();

From c393f5c12321a80bea40af7ef2e42a077df5d806 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 30 Nov 2023 17:18:15 +1100
Subject: [PATCH 233/310] windows: Implement MICROPY_INTERNAL_WFE() macro.

This should be the equivalent of the previous event poll hook macro.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/windows/mpconfigport.h | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/ports/windows/mpconfigport.h b/ports/windows/mpconfigport.h
index 2e1521b9c7..e615fe8502 100644
--- a/ports/windows/mpconfigport.h
+++ b/ports/windows/mpconfigport.h
@@ -227,14 +227,11 @@ typedef long mp_off_t;
 #include "sleep.h"
 
 #if MICROPY_ENABLE_SCHEDULER
-// Use 1mSec sleep to make sure there is effectively a wait period:
+// Use minimum 1mSec sleep to make sure there is effectively a wait period:
 // something like usleep(500) truncates and ends up calling Sleep(0).
-#define MICROPY_EVENT_POLL_HOOK \
-    do { \
-        extern void mp_handle_pending(bool); \
-        mp_handle_pending(true); \
-        msec_sleep(1.0); \
-    } while (0);
+#define MICROPY_INTERNAL_WFE(TIMEOUT_MS) msec_sleep(MAX(1.0, (double)(TIMEOUT_MS)))
+#else
+#define MICROPY_INTERNAL_WFE(TIMEOUT_MS) /* No-op */
 #endif
 
 #ifdef __GNUC__

From 73879734d9954477607199e92fe945537c3c3745 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 7 Dec 2023 10:05:39 +1100
Subject: [PATCH 234/310] esp8266: Update port to use new event functions.

This is necessary to avoid watchdog timeout in long i2c.scan(), as
previously machine_i2c.c would call MICROPY_EVENT_POLL_HOOK if
MICROPY_EVENT_POLL_HOOK_FAST was not available.

Compared to previous implementation, this implementation removes the
ets_event_poll() function and calls the SDK function ets_loop_iter() from
MICROPY_INTERNAL_EVENT_HOOK instead.  This allows using the port-agnostic
functions in more places.

There is a small behaviour change, which is that the event loop gets
iterated in a few more places (i.e. anywhere that mp_event_handle_nowait()
is called).  However, this looks like maybe only modselect.c - and is
probably good to process Wi-Fi events in that polling loop.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/esp8266/esp_mphal.c    |  7 +------
 ports/esp8266/esp_mphal.h    |  3 ---
 ports/esp8266/machine_uart.c |  2 +-
 ports/esp8266/modespnow.c    |  2 +-
 ports/esp8266/modmachine.c   |  4 ++--
 ports/esp8266/mpconfigport.h | 20 +++++++++++++++++---
 ports/esp8266/uart.c         |  3 ++-
 7 files changed, 24 insertions(+), 17 deletions(-)

diff --git a/ports/esp8266/esp_mphal.c b/ports/esp8266/esp_mphal.c
index afa934e00c..956cb2e649 100644
--- a/ports/esp8266/esp_mphal.c
+++ b/ports/esp8266/esp_mphal.c
@@ -53,7 +53,7 @@ void mp_hal_init(void) {
 void MP_FASTCODE(mp_hal_delay_us)(uint32_t us) {
     uint32_t start = system_get_time();
     while (system_get_time() - start < us) {
-        ets_event_poll();
+        mp_event_handle_nowait();
     }
 }
 
@@ -122,11 +122,6 @@ uint64_t mp_hal_time_ns(void) {
     return pyb_rtc_get_us_since_epoch() * 1000ULL;
 }
 
-void ets_event_poll(void) {
-    ets_loop_iter();
-    mp_handle_pending(true);
-}
-
 void __assert_func(const char *file, int line, const char *func, const char *expr) {
     printf("assert:%s:%d:%s: %s\n", file, line, func, expr);
     mp_raise_msg(&mp_type_AssertionError, MP_ERROR_TEXT("C-level assert"));
diff --git a/ports/esp8266/esp_mphal.h b/ports/esp8266/esp_mphal.h
index 73a36a4b65..6fea6554b0 100644
--- a/ports/esp8266/esp_mphal.h
+++ b/ports/esp8266/esp_mphal.h
@@ -72,9 +72,6 @@ void dupterm_task_init();
 uint32_t esp_disable_irq(void);
 void esp_enable_irq(uint32_t state);
 
-void ets_event_poll(void);
-#define ETS_POLL_WHILE(cond) { while (cond) ets_event_poll(); }
-
 // needed for machine.I2C
 #include "osapi.h"
 #define mp_hal_delay_us_fast(us) os_delay_us(us)
diff --git a/ports/esp8266/machine_uart.c b/ports/esp8266/machine_uart.c
index f38858b0c2..eaaa8ac865 100644
--- a/ports/esp8266/machine_uart.c
+++ b/ports/esp8266/machine_uart.c
@@ -300,7 +300,7 @@ STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uint
             if (mp_machine_uart_txdone(self)) {
                 return 0;
             }
-            MICROPY_EVENT_POLL_HOOK
+            mp_event_wait_ms(1);
         } while (system_get_time() < timeout);
 
         *errcode = MP_ETIMEDOUT;
diff --git a/ports/esp8266/modespnow.c b/ports/esp8266/modespnow.c
index 9aa5fdf9d8..170e488c10 100644
--- a/ports/esp8266/modespnow.c
+++ b/ports/esp8266/modespnow.c
@@ -285,7 +285,7 @@ static int ringbuf_get_bytes_wait(ringbuf_t *r, uint8_t *data, size_t len, mp_in
     int status = 0;
     while (((status = ringbuf_get_bytes(r, data, len)) == -1)
            && (timeout_ms < 0 || (mp_uint_t)(mp_hal_ticks_ms() - start) < (mp_uint_t)timeout_ms)) {
-        MICROPY_EVENT_POLL_HOOK;
+        mp_event_wait_ms(1);
     }
     return status;
 }
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index f41c84e14d..3cf5e3dd3b 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -91,7 +91,7 @@ STATIC mp_obj_t mp_machine_unique_id(void) {
 
 STATIC void mp_machine_idle(void) {
     asm ("waiti 0");
-    ets_event_poll(); // handle any events after possibly a long wait (eg feed WDT)
+    mp_event_handle_nowait(); // handle any events after possibly a long wait (eg feed WDT)
 }
 
 STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
@@ -106,7 +106,7 @@ STATIC void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     uint32_t wifi_mode = wifi_get_opmode();
     uint32_t start = system_get_time();
     while (system_get_time() - start <= max_us) {
-        ets_event_poll();
+        mp_event_handle_nowait();
         if (wifi_mode == NULL_MODE) {
             // Can only idle if the wifi is off
             asm ("waiti 0");
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index 07586a0ea5..bbfab64fba 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -7,6 +7,7 @@
 // Board-specific definitions
 #include "mpconfigboard.h"
 
+#include <stdbool.h>
 #include <stdint.h>
 
 // Set the rom feature level.
@@ -116,13 +117,26 @@
 #define MICROPY_FATFS_LFN_CODE_PAGE    437 /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */
 #define MICROPY_ESP8266_APA102         (1)
 
-#define MICROPY_EVENT_POLL_HOOK {ets_event_poll();}
+// No blocking wait-for-event on ESP8266, only non-blocking pump of the "OS" event
+// loop
+//
+// TODO: When TIMEOUT_MS==-1, it may be possible to have MICROPY_INTERNAL_WFE() call the "waiti" instruction.
+// See mp_machine_idle() and mp_machine_lightsleep() in esp8266/modmachine.c
+//
+// Note: We have to scope the declaration of ets_loop_iter() here as there are multiple incompatible
+// definitions at compile time between the SDK and axTLS!
+#define MICROPY_INTERNAL_WFE(TIMEOUT_MS)
+#define MICROPY_INTERNAL_EVENT_HOOK \
+    do { \
+        extern bool ets_loop_iter(void); \
+        ets_loop_iter(); \
+    } while (0)
+
 #define MICROPY_VM_HOOK_COUNT (10)
 #define MICROPY_VM_HOOK_INIT static uint vm_hook_divisor = MICROPY_VM_HOOK_COUNT;
 #define MICROPY_VM_HOOK_POLL if (--vm_hook_divisor == 0) { \
         vm_hook_divisor = MICROPY_VM_HOOK_COUNT; \
-        extern void ets_loop_iter(void); \
-        ets_loop_iter(); \
+        MICROPY_INTERNAL_EVENT_HOOK; \
 }
 #define MICROPY_VM_HOOK_LOOP MICROPY_VM_HOOK_POLL
 #define MICROPY_VM_HOOK_RETURN MICROPY_VM_HOOK_POLL
diff --git a/ports/esp8266/uart.c b/ports/esp8266/uart.c
index c0a33acb57..80ae5e6171 100644
--- a/ports/esp8266/uart.c
+++ b/ports/esp8266/uart.c
@@ -18,6 +18,7 @@
 #include "c_types.h"
 #include "user_interface.h"
 #include "py/mphal.h"
+#include "py/runtime.h"
 
 // seems that this is missing in the Espressif SDK
 #define FUNC_U0RXD 0
@@ -218,7 +219,7 @@ bool ICACHE_FLASH_ATTR uart_rx_wait(uint32_t timeout_us) {
         if (system_get_time() - start >= timeout_us) {
             return false; // timeout
         }
-        ets_event_poll();
+        mp_event_handle_nowait();
     }
 }
 

From 2c828a88153dfdbd767fc0d8f2124cfbefdcbc81 Mon Sep 17 00:00:00 2001
From: Angus Gratton <angus@redyak.com.au>
Date: Thu, 7 Dec 2023 13:32:41 +1100
Subject: [PATCH 235/310] unix: Update port to use the new event functions.

Necessary to get coverage of the new event functions.

Deletes the case that called usleep(delay) for mp_hal_delay_ms(), it seems
like this wouldn't have ever happened anyhow (MICROPY_EVENT_POOL_HOOK is
always defined for the unix port).

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
---
 ports/unix/coverage.c     |  5 +++--
 ports/unix/mpconfigport.h | 12 ++++--------
 ports/unix/unix_mphal.c   |  9 +--------
 3 files changed, 8 insertions(+), 18 deletions(-)

diff --git a/ports/unix/coverage.c b/ports/unix/coverage.c
index 88dd48bfab..543af365c2 100644
--- a/ports/unix/coverage.c
+++ b/ports/unix/coverage.c
@@ -578,9 +578,10 @@ STATIC mp_obj_t extra_coverage(void) {
         mp_sched_unlock();
         mp_printf(&mp_plat_print, "unlocked\n");
 
-        // drain pending callbacks
+        // drain pending callbacks, and test mp_event_wait_indefinite(), mp_event_wait_ms()
+        mp_event_wait_indefinite(); // the unix port only waits 500us in this call
         while (mp_sched_num_pending()) {
-            mp_handle_pending(true);
+            mp_event_wait_ms(1);
         }
 
         // setting the keyboard interrupt and raising it during mp_handle_pending
diff --git a/ports/unix/mpconfigport.h b/ports/unix/mpconfigport.h
index e7ce534a71..c7e7347cbb 100644
--- a/ports/unix/mpconfigport.h
+++ b/ports/unix/mpconfigport.h
@@ -222,14 +222,10 @@ static inline unsigned long mp_random_seed_init(void) {
 #endif
 
 // In lieu of a WFI(), slow down polling from being a tight loop.
-#ifndef MICROPY_EVENT_POLL_HOOK
-#define MICROPY_EVENT_POLL_HOOK \
-    do { \
-        extern void mp_handle_pending(bool); \
-        mp_handle_pending(true); \
-        usleep(500); /* equivalent to mp_hal_delay_us(500) */ \
-    } while (0);
-#endif
+//
+// Note that we don't delay for the full TIMEOUT_MS, as execution
+// can't be woken from the delay.
+#define MICROPY_INTERNAL_WFE(TIMEOUT_MS) mp_hal_delay_us(500)
 
 // Configure the implementation of machine.idle().
 #include <sched.h>
diff --git a/ports/unix/unix_mphal.c b/ports/unix/unix_mphal.c
index eafc915ca4..8d6539c88e 100644
--- a/ports/unix/unix_mphal.c
+++ b/ports/unix/unix_mphal.c
@@ -237,17 +237,10 @@ uint64_t mp_hal_time_ns(void) {
 
 #ifndef mp_hal_delay_ms
 void mp_hal_delay_ms(mp_uint_t ms) {
-    #ifdef MICROPY_EVENT_POLL_HOOK
     mp_uint_t start = mp_hal_ticks_ms();
     while (mp_hal_ticks_ms() - start < ms) {
-        // MICROPY_EVENT_POLL_HOOK does usleep(500).
-        MICROPY_EVENT_POLL_HOOK
+        mp_event_wait_ms(1);
     }
-    #else
-    // TODO: POSIX et al. define usleep() as guaranteedly capable only of 1s sleep:
-    // "The useconds argument shall be less than one million."
-    usleep(ms * 1000);
-    #endif
 }
 #endif
 

From 241dbac9284433cbf8c9b665ab12e1c932e6ef04 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 8 Dec 2023 15:39:28 +1100
Subject: [PATCH 236/310] extmod: Add lists of libm/libm_dbl source files for
 ports to use.

So that ports don't need to specify each of these files, they can simply
refer to the appropriate make/cmake variable.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/extmod.cmake | 35 ++++++++++++++++++
 extmod/extmod.mk    | 90 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+)

diff --git a/extmod/extmod.cmake b/extmod/extmod.cmake
index b9a1d67034..ac10faa865 100644
--- a/extmod/extmod.cmake
+++ b/extmod/extmod.cmake
@@ -62,6 +62,41 @@ set(MICROPY_SOURCE_EXTMOD
     ${MICROPY_EXTMOD_DIR}/nimble/modbluetooth_nimble.c
 )
 
+# Single-precision libm math library.
+
+set(MICROPY_SOURCE_LIB_LIBM
+    ${MICROPY_DIR}/lib/libm/acoshf.c
+    ${MICROPY_DIR}/lib/libm/asinfacosf.c
+    ${MICROPY_DIR}/lib/libm/asinhf.c
+    ${MICROPY_DIR}/lib/libm/atan2f.c
+    ${MICROPY_DIR}/lib/libm/atanf.c
+    ${MICROPY_DIR}/lib/libm/atanhf.c
+    ${MICROPY_DIR}/lib/libm/ef_rem_pio2.c
+    ${MICROPY_DIR}/lib/libm/erf_lgamma.c
+    ${MICROPY_DIR}/lib/libm/fmodf.c
+    ${MICROPY_DIR}/lib/libm/kf_cos.c
+    ${MICROPY_DIR}/lib/libm/kf_rem_pio2.c
+    ${MICROPY_DIR}/lib/libm/kf_sin.c
+    ${MICROPY_DIR}/lib/libm/kf_tan.c
+    ${MICROPY_DIR}/lib/libm/log1pf.c
+    ${MICROPY_DIR}/lib/libm/math.c
+    ${MICROPY_DIR}/lib/libm/nearbyintf.c
+    ${MICROPY_DIR}/lib/libm/roundf.c
+    ${MICROPY_DIR}/lib/libm/sf_cos.c
+    ${MICROPY_DIR}/lib/libm/sf_erf.c
+    ${MICROPY_DIR}/lib/libm/sf_frexp.c
+    ${MICROPY_DIR}/lib/libm/sf_ldexp.c
+    ${MICROPY_DIR}/lib/libm/sf_modf.c
+    ${MICROPY_DIR}/lib/libm/sf_sin.c
+    ${MICROPY_DIR}/lib/libm/sf_tan.c
+    ${MICROPY_DIR}/lib/libm/wf_lgamma.c
+    ${MICROPY_DIR}/lib/libm/wf_tgamma.c
+)
+
+# Choose only one of these sqrt implementations, software or hardware.
+set(MICROPY_SOURCE_LIB_LIBM_SQRT_SW ${MICROPY_DIR}/lib/libm/ef_sqrt.c)
+set(MICROPY_SOURCE_LIB_LIBM_SQRT_HW ${MICROPY_DIR}/lib/libm/thumb_vfp_sqrtf.c)
+
 # Library for btree module and associated code
 
 if(MICROPY_PY_BTREE)
diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index 7aba7d93eb..9b1e51718e 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -70,6 +70,96 @@ SRC_QSTR += $(SRC_EXTMOD_C)
 CFLAGS += $(CFLAGS_EXTMOD) $(CFLAGS_THIRDPARTY)
 LDFLAGS += $(LDFLAGS_EXTMOD) $(LDFLAGS_THIRDPARTY)
 
+################################################################################
+# libm/libm_dbl math library
+
+# Single-precision math library.
+SRC_LIB_LIBM_C += $(addprefix lib/libm/,\
+	acoshf.c \
+	asinfacosf.c \
+	asinhf.c \
+	atan2f.c \
+	atanf.c \
+	atanhf.c \
+	ef_rem_pio2.c \
+	erf_lgamma.c \
+	fmodf.c \
+	kf_cos.c \
+	kf_rem_pio2.c \
+	kf_sin.c \
+	kf_tan.c \
+	log1pf.c \
+	math.c \
+	nearbyintf.c \
+	roundf.c \
+	sf_cos.c \
+	sf_erf.c \
+	sf_frexp.c \
+	sf_ldexp.c \
+	sf_modf.c \
+	sf_sin.c \
+	sf_tan.c \
+	wf_lgamma.c \
+	wf_tgamma.c \
+	)
+
+# Choose only one of these sqrt implementations, software or hardware.
+SRC_LIB_LIBM_SQRT_SW_C += lib/libm/ef_sqrt.c
+SRC_LIB_LIBM_SQRT_HW_C += lib/libm/thumb_vfp_sqrtf.c
+
+# Double-precision math library.
+SRC_LIB_LIBM_DBL_C += $(addprefix lib/libm_dbl/,\
+	__cos.c \
+	__expo2.c \
+	__fpclassify.c \
+	__rem_pio2.c \
+	__rem_pio2_large.c \
+	__signbit.c \
+	__sin.c \
+	__tan.c \
+	acos.c \
+	acosh.c \
+	asin.c \
+	asinh.c \
+	atan.c \
+	atan2.c \
+	atanh.c \
+	ceil.c \
+	cos.c \
+	cosh.c \
+	copysign.c \
+	erf.c \
+	exp.c \
+	expm1.c \
+	floor.c \
+	fmod.c \
+	frexp.c \
+	ldexp.c \
+	lgamma.c \
+	log.c \
+	log10.c \
+	log1p.c \
+	modf.c \
+	nearbyint.c \
+	pow.c \
+	rint.c \
+	round.c \
+	scalbn.c \
+	sin.c \
+	sinh.c \
+	tan.c \
+	tanh.c \
+	tgamma.c \
+	trunc.c \
+	)
+
+# Choose only one of these sqrt implementations, software or hardware.
+SRC_LIB_LIBM_DBL_SQRT_SW_C += lib/libm_dbl/sqrt.c
+SRC_LIB_LIBM_DBL_SQRT_HW_C += lib/libm_dbl/thumb_vfp_sqrt.c
+
+# Too many warnings in libm_dbl, disable for now.
+$(BUILD)/lib/libm_dbl/%.o: CFLAGS += -Wno-double-promotion -Wno-float-conversion
+
 ################################################################################
 # VFS FAT FS
 

From e1a7aa23fdbfbcf5eee0c37d4da223649129c040 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 8 Dec 2023 15:42:41 +1100
Subject: [PATCH 237/310] ports: Switch build to use common lib/libm list of
 source files.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp8266/Makefile    | 31 +------------
 ports/mimxrt/Makefile     | 27 +++---------
 ports/nrf/Makefile        | 62 ++------------------------
 ports/qemu-arm/Makefile   | 23 +---------
 ports/renesas-ra/Makefile | 91 +++------------------------------------
 ports/rp2/CMakeLists.txt  | 29 +------------
 ports/samd/Makefile       | 31 +------------
 ports/stm32/Makefile      | 91 +++------------------------------------
 8 files changed, 33 insertions(+), 352 deletions(-)

diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index 4f5c2c36e4..32eb39a203 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -127,35 +127,8 @@ SRC_C += \
 	modespnow.c
 endif
 
-LIB_SRC_C = $(addprefix lib/,\
-	libm/math.c \
-	libm/fmodf.c \
-	libm/nearbyintf.c \
-	libm/ef_sqrt.c \
-	libm/erf_lgamma.c \
-	libm/kf_rem_pio2.c \
-	libm/kf_sin.c \
-	libm/kf_cos.c \
-	libm/kf_tan.c \
-	libm/ef_rem_pio2.c \
-	libm/sf_erf.c \
-	libm/sf_sin.c \
-	libm/sf_cos.c \
-	libm/sf_tan.c \
-	libm/sf_frexp.c \
-	libm/sf_modf.c \
-	libm/sf_ldexp.c \
-	libm/acoshf.c \
-	libm/asinfacosf.c \
-	libm/asinhf.c \
-	libm/atanf.c \
-	libm/atanhf.c \
-	libm/atan2f.c \
-	libm/log1pf.c \
-	libm/roundf.c \
-	libm/wf_lgamma.c \
-	libm/wf_tgamma.c \
-	)
+LIB_SRC_C += $(SRC_LIB_LIBM_C)
+LIB_SRC_C += $(SRC_LIB_LIBM_SQRT_SW_C)
 
 SHARED_SRC_C = $(addprefix shared/,\
 	libc/__errno.c \
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index 542382b6fa..f514b773fd 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -269,26 +269,19 @@ endif
 
 # Math library source files
 ifeq ($(MICROPY_FLOAT_IMPL),double)
-    LIBM_SRC_C += $(addprefix lib/libm_dbl/,\
-        __cos.c __expo2.c __fpclassify.c __rem_pio2.c __rem_pio2_large.c __signbit.c __sin.c __tan.c acos.c acosh.c \
-        asin.c asinh.c atan.c atan2.c atanh.c ceil.c copysign.c cos.c cosh.c erf.c exp.c expm1.c floor.c fmod.c \
-        frexp.c ldexp.c lgamma.c log.c log10.c log1p.c modf.c nearbyint.c pow.c rint.c round.c scalbn.c sin.c \
-        sinh.c tan.c tanh.c tgamma.c trunc.c)
+    LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_C)
     #
     ifeq ($(SUPPORTS_HARDWARE_FP_DOUBLE),1)
-        LIBM_SRC_C += lib/libm_dbl/thumb_vfp_sqrt.c
+        LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_SQRT_HW_C)
     else
-        LIBM_SRC_C += lib/libm_dbl/sqrt.c
+        LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_SQRT_SW_C)
     endif
 else
-    LIBM_SRC_C += $(addprefix lib/libm/,\
-        acoshf.c asinfacosf.c asinhf.c atan2f.c atanf.c atanhf.c ef_rem_pio2.c erf_lgamma.c fmodf.c kf_cos.c \
-        kf_rem_pio2.c kf_sin.c kf_tan.c log1pf.c math.c nearbyintf.c roundf.c sf_cos.c sf_erf.c sf_frexp.c sf_ldexp.c \
-        sf_modf.c sf_sin.c sf_tan.c wf_lgamma.c wf_tgamma.c)
+    LIBM_SRC_C += $(SRC_LIB_LIBM_C)
     ifeq ($(SUPPORTS_HARDWARE_FP_SINGLE),1)
-        LIBM_SRC_C += lib/libm/thumb_vfp_sqrtf.c
+        LIBM_SRC_C += $(SRC_LIB_LIBM_SQRT_HW_C)
     else
-        LIBM_SRC_C += lib/libm/ef_sqrt.c
+        LIBM_SRC_C += $(SRC_LIB_LIBM_SQRT_SW_C)
     endif
 endif
 
@@ -439,15 +432,9 @@ endif
 # =============================================================================
 
 LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
-LIBM_O = $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
-
-# Too many warnings in libm_dbl, disable for now.
-ifeq ($(MICROPY_FLOAT_IMPL),double)
-$(LIBM_O): CFLAGS := $(filter-out -Wdouble-promotion -Wfloat-conversion, $(CFLAGS))
-endif
 
 OBJ += $(PY_O)
-OBJ += $(LIBM_O)
+OBJ += $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(SHARED_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index 45e44aed5a..7150aa6399 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -167,69 +167,15 @@ LIBS = \
 
 ifeq ($(MCU_VARIANT), nrf52)
 
-SRC_LIB_C += $(addprefix lib/,\
-        libm/math.c \
-        libm/fmodf.c \
-        libm/nearbyintf.c \
-        libm/ef_sqrt.c \
-        libm/kf_rem_pio2.c \
-        libm/kf_sin.c \
-        libm/kf_cos.c \
-        libm/kf_tan.c \
-        libm/ef_rem_pio2.c \
-        libm/sf_sin.c \
-        libm/sf_cos.c \
-        libm/sf_tan.c \
-        libm/sf_frexp.c \
-        libm/sf_modf.c \
-        libm/sf_ldexp.c \
-        libm/asinfacosf.c \
-        libm/acoshf.c \
-        libm/asinhf.c \
-        libm/atanf.c \
-        libm/atan2f.c \
-        libm/atanhf.c \
-        libm/log1pf.c \
-        libm/sf_erf.c \
-        libm/erf_lgamma.c \
-        libm/wf_lgamma.c \
-        libm/wf_tgamma.c \
-        libm/roundf.c \
-	)
+SRC_LIB_C += $(SRC_LIB_LIBM_C)
+SRC_LIB_C += $(SRC_LIB_LIBM_SQRT_SW_C)
 
 endif
 
 ifeq ($(MCU_VARIANT), nrf91)
 
-SRC_LIB_C += $(addprefix lib/,\
-        libm/math.c \
-        libm/fmodf.c \
-        libm/nearbyintf.c \
-        libm/ef_sqrt.c \
-        libm/kf_rem_pio2.c \
-        libm/kf_sin.c \
-        libm/kf_cos.c \
-        libm/kf_tan.c \
-        libm/ef_rem_pio2.c \
-        libm/sf_sin.c \
-        libm/sf_cos.c \
-        libm/sf_tan.c \
-        libm/sf_frexp.c \
-        libm/sf_modf.c \
-        libm/sf_ldexp.c \
-        libm/asinfacosf.c \
-        libm/acoshf.c \
-        libm/asinhf.c \
-        libm/atanf.c \
-        libm/atan2f.c \
-        libm/atanhf.c \
-        libm/log1pf.c \
-        libm/sf_erf.c \
-        libm/erf_lgamma.c \
-        libm/wf_lgamma.c \
-        libm/wf_tgamma.c \
-        libm/roundf.c \
-        )
+SRC_LIB_C += $(SRC_LIB_LIBM_C)
+SRC_LIB_C += $(SRC_LIB_LIBM_SQRT_SW_C)
 
 include drivers/secureboot/secureboot.mk
 
diff --git a/ports/qemu-arm/Makefile b/ports/qemu-arm/Makefile
index 9b5cfc4af0..f521a0c5ad 100644
--- a/ports/qemu-arm/Makefile
+++ b/ports/qemu-arm/Makefile
@@ -88,27 +88,8 @@ SRC_TEST_C = \
 	test_main.c \
 	lib/tinytest/tinytest.c \
 
-LIB_SRC_C += $(addprefix lib/,\
-	libm/math.c \
-	libm/fmodf.c \
-	libm/nearbyintf.c \
-	libm/ef_sqrt.c \
-	libm/kf_rem_pio2.c \
-	libm/kf_sin.c \
-	libm/kf_cos.c \
-	libm/kf_tan.c \
-	libm/ef_rem_pio2.c \
-	libm/sf_sin.c \
-	libm/sf_cos.c \
-	libm/sf_tan.c \
-	libm/sf_frexp.c \
-	libm/sf_modf.c \
-	libm/sf_ldexp.c \
-	libm/asinfacosf.c \
-	libm/atanf.c \
-	libm/atan2f.c \
-	libm/roundf.c \
-	)
+LIB_SRC_C += $(SRC_LIB_LIBM_C)
+LIB_SRC_C += $(SRC_LIB_LIBM_SQRT_SW_C)
 
 OBJ_COMMON =
 OBJ_COMMON += $(PY_O)
diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index 3512e4a94d..1e9cd2db5b 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -198,98 +198,21 @@ TINYUSB_SRC_C += $(addprefix lib/tinyusb/,\
 	)
 
 ifeq ($(MICROPY_FLOAT_IMPL),double)
-LIBM_SRC_C += $(addprefix lib/libm_dbl/,\
-	__cos.c \
-	__expo2.c \
-	__fpclassify.c \
-	__rem_pio2.c \
-	__rem_pio2_large.c \
-	__signbit.c \
-	__sin.c \
-	__tan.c \
-	acos.c \
-	acosh.c \
-	asin.c \
-	asinh.c \
-	atan.c \
-	atan2.c \
-	atanh.c \
-	ceil.c \
-	cos.c \
-	cosh.c \
-	copysign.c \
-	erf.c \
-	exp.c \
-	expm1.c \
-	floor.c \
-	fmod.c \
-	frexp.c \
-	ldexp.c \
-	lgamma.c \
-	log.c \
-	log10.c \
-	log1p.c \
-	modf.c \
-	nearbyint.c \
-	pow.c \
-	rint.c \
-	round.c \
-	scalbn.c \
-	sin.c \
-	sinh.c \
-	tan.c \
-	tanh.c \
-	tgamma.c \
-	trunc.c \
-	)
+LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_C)
 ifeq ($(SUPPORTS_HARDWARE_FP_DOUBLE),1)
-LIBM_SRC_C += lib/libm_dbl/thumb_vfp_sqrt.c
+LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_SQRT_HW_C)
 else
-LIBM_SRC_C += lib/libm_dbl/sqrt.c
+LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_SQRT_SW_C)
 endif
 else
-LIBM_SRC_C += $(addprefix lib/libm/,\
-	math.c \
-	acoshf.c \
-	asinfacosf.c \
-	asinhf.c \
-	atan2f.c \
-	atanf.c \
-	atanhf.c \
-	ef_rem_pio2.c \
-	erf_lgamma.c \
-	fmodf.c \
-	kf_cos.c \
-	kf_rem_pio2.c \
-	kf_sin.c \
-	kf_tan.c \
-	log1pf.c \
-	nearbyintf.c \
-	roundf.c \
-	sf_cos.c \
-	sf_erf.c \
-	sf_frexp.c \
-	sf_ldexp.c \
-	sf_modf.c \
-	sf_sin.c \
-	sf_tan.c \
-	wf_lgamma.c \
-	wf_tgamma.c \
-	)
+LIBM_SRC_C += $(SRC_LIB_LIBM_C)
 ifeq ($(SUPPORTS_HARDWARE_FP_SINGLE),1)
-LIBM_SRC_C += lib/libm/thumb_vfp_sqrtf.c
+LIBM_SRC_C += $(SRC_LIB_LIBM_SQRT_HW_C)
 else
-LIBM_SRC_C += lib/libm/ef_sqrt.c
+LIBM_SRC_C += $(SRC_LIB_LIBM_SQRT_SW_C)
 endif
 endif
 
-LIBM_O = $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
-
-# Too many warnings in libm_dbl, disable for now.
-ifeq ($(MICROPY_FLOAT_IMPL),double)
-$(LIBM_O): CFLAGS := $(filter-out -Wdouble-promotion -Wfloat-conversion, $(CFLAGS))
-endif
-
 DRIVERS_SRC_C += $(addprefix drivers/,\
 	bus/softspi.c \
 	bus/softqspi.c \
@@ -470,7 +393,7 @@ endif
 
 OBJ += $(PY_O)
 OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o))
-OBJ += $(LIBM_O)
+OBJ += $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(SHARED_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(HAL_SRC_C:.c=.o))
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index c68c46cb69..5da54dc1c9 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -209,33 +209,8 @@ target_sources(pico_float_micropython INTERFACE
     ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_aeabi.S
     ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_init_rom.c
     ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_v1_rom_shim.S
-    ${MICROPY_DIR}/lib/libm/math.c
-    ${MICROPY_DIR}/lib/libm/acoshf.c
-    ${MICROPY_DIR}/lib/libm/asinfacosf.c
-    ${MICROPY_DIR}/lib/libm/asinhf.c
-    ${MICROPY_DIR}/lib/libm/atan2f.c
-    ${MICROPY_DIR}/lib/libm/atanf.c
-    ${MICROPY_DIR}/lib/libm/atanhf.c
-    ${MICROPY_DIR}/lib/libm/ef_rem_pio2.c
-    ${MICROPY_DIR}/lib/libm/ef_sqrt.c
-    ${MICROPY_DIR}/lib/libm/erf_lgamma.c
-    ${MICROPY_DIR}/lib/libm/fmodf.c
-    ${MICROPY_DIR}/lib/libm/kf_cos.c
-    ${MICROPY_DIR}/lib/libm/kf_rem_pio2.c
-    ${MICROPY_DIR}/lib/libm/kf_sin.c
-    ${MICROPY_DIR}/lib/libm/kf_tan.c
-    ${MICROPY_DIR}/lib/libm/log1pf.c
-    ${MICROPY_DIR}/lib/libm/nearbyintf.c
-    ${MICROPY_DIR}/lib/libm/roundf.c
-    ${MICROPY_DIR}/lib/libm/sf_cos.c
-    ${MICROPY_DIR}/lib/libm/sf_erf.c
-    ${MICROPY_DIR}/lib/libm/sf_frexp.c
-    ${MICROPY_DIR}/lib/libm/sf_ldexp.c
-    ${MICROPY_DIR}/lib/libm/sf_modf.c
-    ${MICROPY_DIR}/lib/libm/sf_sin.c
-    ${MICROPY_DIR}/lib/libm/sf_tan.c
-    ${MICROPY_DIR}/lib/libm/wf_lgamma.c
-    ${MICROPY_DIR}/lib/libm/wf_tgamma.c
+    ${MICROPY_SOURCE_LIB_LIBM}
+    ${MICROPY_SOURCE_LIB_LIBM_SQRT_SW}
     ${MICROPY_PORT_DIR}/libm_extra.c
 )
 
diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index f6409d17e8..4f4c22c57d 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -142,35 +142,8 @@ ASF4_SRC_C += $(addprefix lib/asf4/$(MCU_SERIES_LOWER)/,\
 	hpl/nvmctrl/hpl_nvmctrl.c \
 	)
 
-LIBM_SRC_C += $(addprefix lib/libm/,\
-	acoshf.c \
-	asinfacosf.c \
-	asinhf.c \
-	atan2f.c \
-	atanf.c \
-	atanhf.c \
-	ef_rem_pio2.c \
-	ef_sqrt.c \
-	erf_lgamma.c \
-	fmodf.c \
-	kf_cos.c \
-	kf_rem_pio2.c \
-	kf_sin.c \
-	kf_tan.c \
-	log1pf.c \
-	math.c \
-	nearbyintf.c \
-	roundf.c \
-	sf_cos.c \
-	sf_erf.c \
-	sf_frexp.c \
-	sf_ldexp.c \
-	sf_modf.c \
-	sf_sin.c \
-	sf_tan.c \
-	wf_lgamma.c \
-	wf_tgamma.c \
-	)
+LIBM_SRC_C += $(SRC_LIB_LIBM_C)
+LIBM_SRC_C += $(SRC_LIB_LIBM_SQRT_SW_C)
 
 TINYUSB_SRC_C += $(addprefix lib/tinyusb/src/,\
 	class/cdc/cdc_device.c \
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index a1449e7181..e44a542395 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -189,98 +189,21 @@ SHARED_SRC_C += $(addprefix shared/,\
 	)
 
 ifeq ($(MICROPY_FLOAT_IMPL),double)
-LIBM_SRC_C += $(addprefix lib/libm_dbl/,\
-	__cos.c \
-	__expo2.c \
-	__fpclassify.c \
-	__rem_pio2.c \
-	__rem_pio2_large.c \
-	__signbit.c \
-	__sin.c \
-	__tan.c \
-	acos.c \
-	acosh.c \
-	asin.c \
-	asinh.c \
-	atan.c \
-	atan2.c \
-	atanh.c \
-	ceil.c \
-	cos.c \
-	cosh.c \
-	copysign.c \
-	erf.c \
-	exp.c \
-	expm1.c \
-	floor.c \
-	fmod.c \
-	frexp.c \
-	ldexp.c \
-	lgamma.c \
-	log.c \
-	log10.c \
-	log1p.c \
-	modf.c \
-	nearbyint.c \
-	pow.c \
-	rint.c \
-	round.c \
-	scalbn.c \
-	sin.c \
-	sinh.c \
-	tan.c \
-	tanh.c \
-	tgamma.c \
-	trunc.c \
-	)
+LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_C)
 ifeq ($(SUPPORTS_HARDWARE_FP_DOUBLE),1)
-LIBM_SRC_C += lib/libm_dbl/thumb_vfp_sqrt.c
+LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_SQRT_HW_C)
 else
-LIBM_SRC_C += lib/libm_dbl/sqrt.c
+LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_SQRT_SW_C)
 endif
 else
-LIBM_SRC_C += $(addprefix lib/libm/,\
-	math.c \
-	acoshf.c \
-	asinfacosf.c \
-	asinhf.c \
-	atan2f.c \
-	atanf.c \
-	atanhf.c \
-	ef_rem_pio2.c \
-	erf_lgamma.c \
-	fmodf.c \
-	kf_cos.c \
-	kf_rem_pio2.c \
-	kf_sin.c \
-	kf_tan.c \
-	log1pf.c \
-	nearbyintf.c \
-	roundf.c \
-	sf_cos.c \
-	sf_erf.c \
-	sf_frexp.c \
-	sf_ldexp.c \
-	sf_modf.c \
-	sf_sin.c \
-	sf_tan.c \
-	wf_lgamma.c \
-	wf_tgamma.c \
-	)
+LIBM_SRC_C += $(SRC_LIB_LIBM_C)
 ifeq ($(SUPPORTS_HARDWARE_FP_SINGLE),1)
-LIBM_SRC_C += lib/libm/thumb_vfp_sqrtf.c
+LIBM_SRC_C += $(SRC_LIB_LIBM_SQRT_HW_C)
 else
-LIBM_SRC_C += lib/libm/ef_sqrt.c
+LIBM_SRC_C += $(SRC_LIB_LIBM_SQRT_SW_C)
 endif
 endif
 
-LIBM_O = $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
-
-# Too many warnings in libm_dbl, disable for now.
-ifeq ($(MICROPY_FLOAT_IMPL),double)
-$(LIBM_O): CFLAGS := $(filter-out -Wdouble-promotion -Wfloat-conversion, $(CFLAGS))
-endif
-
 DRIVERS_SRC_C += $(addprefix drivers/,\
 	bus/softspi.c \
 	bus/softqspi.c \
@@ -499,7 +422,7 @@ endif # MICROPY_PY_BLUETOOTH
 OBJ += $(addprefix $(BUILD)/, $(SRC_O))
 OBJ += $(PY_O)
 OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o))
-OBJ += $(LIBM_O)
+OBJ += $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(SHARED_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
 OBJ += $(addprefix $(BUILD)/, $(HAL_SRC_C:.c=.o))

From c393cd7e48e1bfffe25a9d0131ceb23b6bad9b05 Mon Sep 17 00:00:00 2001
From: Carlosgg <carlosgilglez@gmail.com>
Date: Sat, 25 Nov 2023 16:24:30 +0000
Subject: [PATCH 238/310] esp32/boards/sdkconfig.base: Disable unused mbedtls
 options.

Disable unused EC curves and default certificate bundle which is not
implemented in MicroPython.  This reduces the firmware size significantly.

This follows commit 68f166dae9ad6dfd94038d5f4394defbb44238af.

Signed-off-by: Carlos Gil Gonzalez <carlosgilglez@gmail.com>
---
 ports/esp32/boards/sdkconfig.base | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/ports/esp32/boards/sdkconfig.base b/ports/esp32/boards/sdkconfig.base
index bfc8c6610e..05624f0d74 100644
--- a/ports/esp32/boards/sdkconfig.base
+++ b/ports/esp32/boards/sdkconfig.base
@@ -66,6 +66,16 @@ CONFIG_MBEDTLS_HAVE_TIME=y
 # Disable ALPN support as it's not implemented in MicroPython
 CONFIG_MBEDTLS_SSL_ALPN=n
 
+# Disable slow or unused EC curves
+CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=n
+CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=n
+CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=n
+CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=n
+
+# Disable certificate bundle as it's not implemented in MicroPython
+CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=n
+CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=n
+
 # Allow mbedTLS to allocate from PSRAM or internal memory
 #
 # (The ESP-IDF default is internal-only, partly for physical security to prevent

From 88778be73a522abea13a714a909c6e8e763f5a8c Mon Sep 17 00:00:00 2001
From: IhorNehrutsa <IhorNehrutsa@gmail.com>
Date: Sun, 12 Nov 2023 20:38:46 +0200
Subject: [PATCH 239/310] esp32/machine_i2c: Use APB_CLK_FREQ instead of
 I2C_APB_CLK_FREQ.

Signed-off-by: IhorNehrutsa <Ihor.Nehrutsa@gmail.com>
---
 ports/esp32/machine_i2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/esp32/machine_i2c.c b/ports/esp32/machine_i2c.c
index 50d5681514..eefdeaaf96 100644
--- a/ports/esp32/machine_i2c.c
+++ b/ports/esp32/machine_i2c.c
@@ -50,7 +50,7 @@
 #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
 #define I2C_SCLK_FREQ XTAL_CLK_FREQ
 #elif CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-#define I2C_SCLK_FREQ I2C_APB_CLK_FREQ
+#define I2C_SCLK_FREQ APB_CLK_FREQ
 #else
 #error "unsupported I2C for ESP32 SoC variant"
 #endif

From 3106ee48853b11befceebb7db4866a45b0b685bb Mon Sep 17 00:00:00 2001
From: IhorNehrutsa <IhorNehrutsa@gmail.com>
Date: Sun, 12 Nov 2023 20:43:52 +0200
Subject: [PATCH 240/310] esp32/modnetwork: Add WiFi AUTH_WPA3_ENT_192
 authenticate mode.

Available in newer versions of the IDF.

Signed-off-by: IhorNehrutsa <IhorNehrutsa@gmail.com>
---
 ports/esp32/modnetwork_globals.h | 3 +++
 ports/esp32/network_common.c     | 4 ++++
 2 files changed, 7 insertions(+)

diff --git a/ports/esp32/modnetwork_globals.h b/ports/esp32/modnetwork_globals.h
index 7326d453be..c6369ab9a7 100644
--- a/ports/esp32/modnetwork_globals.h
+++ b/ports/esp32/modnetwork_globals.h
@@ -29,6 +29,9 @@
 { MP_ROM_QSTR(MP_QSTR_AUTH_WPA2_WPA3_PSK), MP_ROM_INT(WIFI_AUTH_WPA2_WPA3_PSK) },
 { MP_ROM_QSTR(MP_QSTR_AUTH_WAPI_PSK), MP_ROM_INT(WIFI_AUTH_WAPI_PSK) },
 { MP_ROM_QSTR(MP_QSTR_AUTH_OWE), MP_ROM_INT(WIFI_AUTH_OWE) },
+#if ESP_IDF_VERSION > ESP_IDF_VERSION_VAL(5, 1, 1)
+{ MP_ROM_QSTR(MP_QSTR_AUTH_WPA3_ENT_192), MP_ROM_INT(WIFI_AUTH_WPA3_ENT_192) },
+#endif
 { MP_ROM_QSTR(MP_QSTR_AUTH_MAX), MP_ROM_INT(WIFI_AUTH_MAX) },
 #endif
 
diff --git a/ports/esp32/network_common.c b/ports/esp32/network_common.c
index ca07f3c06b..1c5979175d 100644
--- a/ports/esp32/network_common.c
+++ b/ports/esp32/network_common.c
@@ -168,4 +168,8 @@ STATIC mp_obj_t esp_phy_mode(size_t n_args, const mp_obj_t *args) {
 }
 MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_network_phy_mode_obj, 0, 1, esp_phy_mode);
 
+#if ESP_IDF_VERSION > ESP_IDF_VERSION_VAL(5, 1, 1)
+_Static_assert(WIFI_AUTH_MAX == 11, "Synchronize WIFI_AUTH_XXX constants with the ESP-IDF. Look at esp-idf/components/esp_wifi/include/esp_wifi_types.h");
+#else
 _Static_assert(WIFI_AUTH_MAX == 10, "Synchronize WIFI_AUTH_XXX constants with the ESP-IDF. Look at esp-idf/components/esp_wifi/include/esp_wifi_types.h");
+#endif

From 495be71d56337a7b162b4fe97d4407d97f87d9f0 Mon Sep 17 00:00:00 2001
From: IhorNehrutsa <IhorNehrutsa@gmail.com>
Date: Sun, 12 Nov 2023 20:46:26 +0200
Subject: [PATCH 241/310] esp32/machine_dac: Support one-shot mode of driver.

And simplify board configuration of DAC by using SOC_DAC_SUPPORTED.

Signed-off-by: IhorNehrutsa <Ihor.Nehrutsa@gmail.com>
---
 .../boards/ARDUINO_NANO_ESP32/mpconfigboard.h |  2 --
 .../boards/ESP32_GENERIC_C3/mpconfigboard.h   |  1 -
 .../boards/ESP32_GENERIC_S3/mpconfigboard.h   |  2 --
 .../boards/LOLIN_C3_MINI/mpconfigboard.h      |  1 -
 .../esp32/boards/UM_FEATHERS3/mpconfigboard.h |  2 --
 ports/esp32/boards/UM_NANOS3/mpconfigboard.h  |  2 --
 ports/esp32/boards/UM_PROS3/mpconfigboard.h   |  2 --
 ports/esp32/boards/UM_TINYS3/mpconfigboard.h  |  2 --
 .../boards/UM_TINYWATCHS3/mpconfigboard.h     |  2 --
 ports/esp32/machine_dac.c                     | 31 ++++++++++++++++---
 ports/esp32/mpconfigport.h                    |  2 +-
 11 files changed, 27 insertions(+), 22 deletions(-)

diff --git a/ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h b/ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h
index ec85a7bb36..873838352e 100644
--- a/ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h
+++ b/ports/esp32/boards/ARDUINO_NANO_ESP32/mpconfigboard.h
@@ -4,8 +4,6 @@
 // Network config
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-nano-esp32"
 
-#define MICROPY_PY_MACHINE_DAC              (0)
-
 #define MICROPY_HW_I2C0_SCL                 (12)
 #define MICROPY_HW_I2C0_SDA                 (11)
 
diff --git a/ports/esp32/boards/ESP32_GENERIC_C3/mpconfigboard.h b/ports/esp32/boards/ESP32_GENERIC_C3/mpconfigboard.h
index 42e77ecb1a..0dbfae03a3 100644
--- a/ports/esp32/boards/ESP32_GENERIC_C3/mpconfigboard.h
+++ b/ports/esp32/boards/ESP32_GENERIC_C3/mpconfigboard.h
@@ -4,7 +4,6 @@
 #define MICROPY_HW_MCU_NAME                 "ESP32C3"
 
 #define MICROPY_HW_ENABLE_SDCARD            (0)
-#define MICROPY_PY_MACHINE_DAC              (0)
 #define MICROPY_PY_MACHINE_I2S              (0)
 
 // Enable UART REPL for modules that have an external USB-UART and don't use native USB.
diff --git a/ports/esp32/boards/ESP32_GENERIC_S3/mpconfigboard.h b/ports/esp32/boards/ESP32_GENERIC_S3/mpconfigboard.h
index 8d369c7db0..c714fe2c22 100644
--- a/ports/esp32/boards/ESP32_GENERIC_S3/mpconfigboard.h
+++ b/ports/esp32/boards/ESP32_GENERIC_S3/mpconfigboard.h
@@ -4,8 +4,6 @@
 #endif
 #define MICROPY_HW_MCU_NAME                 "ESP32S3"
 
-#define MICROPY_PY_MACHINE_DAC              (0)
-
 // Enable UART REPL for modules that have an external USB-UART and don't use native USB.
 #define MICROPY_HW_ENABLE_UART_REPL         (1)
 
diff --git a/ports/esp32/boards/LOLIN_C3_MINI/mpconfigboard.h b/ports/esp32/boards/LOLIN_C3_MINI/mpconfigboard.h
index 12fd285da1..9b304b69f6 100644
--- a/ports/esp32/boards/LOLIN_C3_MINI/mpconfigboard.h
+++ b/ports/esp32/boards/LOLIN_C3_MINI/mpconfigboard.h
@@ -3,7 +3,6 @@
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-c3-mini"
 
 #define MICROPY_HW_ENABLE_SDCARD            (0)
-#define MICROPY_PY_MACHINE_DAC              (0)
 #define MICROPY_PY_MACHINE_I2S              (0)
 
 #define MICROPY_HW_I2C0_SCL                 (10)
diff --git a/ports/esp32/boards/UM_FEATHERS3/mpconfigboard.h b/ports/esp32/boards/UM_FEATHERS3/mpconfigboard.h
index 488a588442..f4abfb21bc 100644
--- a/ports/esp32/boards/UM_FEATHERS3/mpconfigboard.h
+++ b/ports/esp32/boards/UM_FEATHERS3/mpconfigboard.h
@@ -2,8 +2,6 @@
 #define MICROPY_HW_MCU_NAME                 "ESP32-S3"
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "FeatherS3"
 
-#define MICROPY_PY_MACHINE_DAC              (0)
-
 #define MICROPY_HW_I2C0_SCL                 (9)
 #define MICROPY_HW_I2C0_SDA                 (8)
 
diff --git a/ports/esp32/boards/UM_NANOS3/mpconfigboard.h b/ports/esp32/boards/UM_NANOS3/mpconfigboard.h
index 1c2782bfb7..44197be2a8 100644
--- a/ports/esp32/boards/UM_NANOS3/mpconfigboard.h
+++ b/ports/esp32/boards/UM_NANOS3/mpconfigboard.h
@@ -2,8 +2,6 @@
 #define MICROPY_HW_MCU_NAME                 "ESP32-S3-FN8"
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "NanoS3"
 
-#define MICROPY_PY_MACHINE_DAC              (0)
-
 #define MICROPY_HW_I2C0_SCL                 (9)
 #define MICROPY_HW_I2C0_SDA                 (8)
 
diff --git a/ports/esp32/boards/UM_PROS3/mpconfigboard.h b/ports/esp32/boards/UM_PROS3/mpconfigboard.h
index ecff1e6570..cc0ebbefa3 100644
--- a/ports/esp32/boards/UM_PROS3/mpconfigboard.h
+++ b/ports/esp32/boards/UM_PROS3/mpconfigboard.h
@@ -2,8 +2,6 @@
 #define MICROPY_HW_MCU_NAME                 "ESP32-S3"
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "ProS3"
 
-#define MICROPY_PY_MACHINE_DAC              (0)
-
 #define MICROPY_HW_I2C0_SCL                 (9)
 #define MICROPY_HW_I2C0_SDA                 (8)
 
diff --git a/ports/esp32/boards/UM_TINYS3/mpconfigboard.h b/ports/esp32/boards/UM_TINYS3/mpconfigboard.h
index c0f81f0c44..74c7622cb4 100644
--- a/ports/esp32/boards/UM_TINYS3/mpconfigboard.h
+++ b/ports/esp32/boards/UM_TINYS3/mpconfigboard.h
@@ -2,8 +2,6 @@
 #define MICROPY_HW_MCU_NAME                 "ESP32-S3-FN8"
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "TinyS3"
 
-#define MICROPY_PY_MACHINE_DAC              (0)
-
 #define MICROPY_HW_I2C0_SCL                 (9)
 #define MICROPY_HW_I2C0_SDA                 (8)
 
diff --git a/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.h b/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.h
index ce8de58a01..6cc1345413 100644
--- a/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.h
+++ b/ports/esp32/boards/UM_TINYWATCHS3/mpconfigboard.h
@@ -2,8 +2,6 @@
 #define MICROPY_HW_MCU_NAME                 "ESP32-S3-PICO-1-N8R2"
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "TinyWATCHS3"
 
-#define MICROPY_PY_MACHINE_DAC              (0)
-
 #define MICROPY_HW_I2C0_SCL                 (9)
 #define MICROPY_HW_I2C0_SDA                 (8)
 
diff --git a/ports/esp32/machine_dac.c b/ports/esp32/machine_dac.c
index 0e85dc9c9b..34f51cc521 100644
--- a/ports/esp32/machine_dac.c
+++ b/ports/esp32/machine_dac.c
@@ -34,21 +34,30 @@
 #if MICROPY_PY_MACHINE_DAC
 
 #include "driver/gpio.h"
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)
+#include "driver/dac_oneshot.h"
+#else
 #include "driver/dac.h"
+#define DAC_CHAN_0 DAC_CHANNEL_1
+#define DAC_CHAN_1 DAC_CHANNEL_2
+#endif
 
 typedef struct _mdac_obj_t {
     mp_obj_base_t base;
     gpio_num_t gpio_id;
     dac_channel_t dac_id;
+    #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)
+    dac_oneshot_handle_t dac_oneshot_handle;
+    #endif
 } mdac_obj_t;
 
-STATIC const mdac_obj_t mdac_obj[] = {
+STATIC mdac_obj_t mdac_obj[] = {
     #if CONFIG_IDF_TARGET_ESP32
-    {{&machine_dac_type}, GPIO_NUM_25, DAC_CHANNEL_1},
-    {{&machine_dac_type}, GPIO_NUM_26, DAC_CHANNEL_2},
+    {{&machine_dac_type}, GPIO_NUM_25, DAC_CHAN_0},
+    {{&machine_dac_type}, GPIO_NUM_26, DAC_CHAN_1},
     #else
-    {{&machine_dac_type}, GPIO_NUM_17, DAC_CHANNEL_1},
-    {{&machine_dac_type}, GPIO_NUM_18, DAC_CHANNEL_2},
+    {{&machine_dac_type}, GPIO_NUM_17, DAC_CHAN_0},
+    {{&machine_dac_type}, GPIO_NUM_18, DAC_CHAN_1},
     #endif
 };
 
@@ -68,6 +77,12 @@ STATIC mp_obj_t mdac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
         mp_raise_ValueError(MP_ERROR_TEXT("invalid Pin for DAC"));
     }
 
+    #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)
+    dac_oneshot_config_t dac_oneshot_config = {.chan_id = self->dac_id};
+    check_esp_err(dac_oneshot_new_channel(&dac_oneshot_config, (dac_oneshot_handle_t *)&self->dac_oneshot_handle));
+    check_esp_err(dac_oneshot_output_voltage(self->dac_oneshot_handle, 0));
+    return MP_OBJ_FROM_PTR(self);
+    #else
     esp_err_t err = dac_output_enable(self->dac_id);
     if (err == ESP_OK) {
         err = dac_output_voltage(self->dac_id, 0);
@@ -76,6 +91,7 @@ STATIC mp_obj_t mdac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
         return MP_OBJ_FROM_PTR(self);
     }
     mp_raise_ValueError(MP_ERROR_TEXT("parameter error"));
+    #endif
 }
 
 STATIC void mdac_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
@@ -90,11 +106,16 @@ STATIC mp_obj_t mdac_write(mp_obj_t self_in, mp_obj_t value_in) {
         mp_raise_ValueError(MP_ERROR_TEXT("value out of range"));
     }
 
+    #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)
+    check_esp_err(dac_oneshot_output_voltage(self->dac_oneshot_handle, value));
+    return mp_const_none;
+    #else
     esp_err_t err = dac_output_voltage(self->dac_id, value);
     if (err == ESP_OK) {
         return mp_const_none;
     }
     mp_raise_ValueError(MP_ERROR_TEXT("parameter error"));
+    #endif
 }
 MP_DEFINE_CONST_FUN_OBJ_2(mdac_write_obj, mdac_write);
 
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index ff6f6ab8d0..aeaff3e503 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -123,7 +123,7 @@
 #define MICROPY_PY_MACHINE_SPI_LSB          (1)
 #define MICROPY_PY_MACHINE_SOFTSPI          (1)
 #ifndef MICROPY_PY_MACHINE_DAC
-#define MICROPY_PY_MACHINE_DAC              (1)
+#define MICROPY_PY_MACHINE_DAC              (SOC_DAC_SUPPORTED)
 #endif
 #ifndef MICROPY_PY_MACHINE_I2S
 #define MICROPY_PY_MACHINE_I2S              (1)

From e423b3c0ba09d7f8b1b9081e2edb520455aaad33 Mon Sep 17 00:00:00 2001
From: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
Date: Mon, 13 Nov 2023 12:06:42 +0200
Subject: [PATCH 242/310] docs/esp32/quickref: Add DAC example.

Signed-off-by: IhorNehrutsa <Ihor.Nehrutsa@gmail.com>
---
 docs/esp32/quickref.rst | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/docs/esp32/quickref.rst b/docs/esp32/quickref.rst
index e03a5ffbc9..08df25b055 100644
--- a/docs/esp32/quickref.rst
+++ b/docs/esp32/quickref.rst
@@ -141,7 +141,7 @@ These are working configurations for LAN interfaces of popular boards::
     # Olimex ESP32-GATEWAY: power controlled by Pin(5)
     # Olimex ESP32 PoE and ESP32-PoE ISO: power controlled by Pin(12)
 
-    lan = network.LAN(mdc=machine.Pin(23), mdio=machine.Pin(18), power=machine.Pin(5), 
+    lan = network.LAN(mdc=machine.Pin(23), mdio=machine.Pin(18), power=machine.Pin(5),
                       phy_type=network.PHY_LAN8720, phy_addr=0,
                       ref_clk=machine.Pin(17), ref_clk_mode=machine.Pin.OUT)
 
@@ -330,6 +330,19 @@ possible at the same frequency.
 
 See more examples in the :ref:`esp32_pwm` tutorial.
 
+DAC (digital to analog conversion)
+----------------------------------
+
+On the ESP32, DAC functionality is available on pins 25, 26.
+On the ESP32S2, DAC functionality is available on pins 17, 18.
+
+Use the DAC::
+
+    from machine import DAC, Pin
+
+    dac = DAC(Pin(25))  # create an DAC object acting on a pin
+    dac.write(128)      # set a raw analog value in the range 0-255, 50% now
+
 ADC (analog to digital conversion)
 ----------------------------------
 

From a427117d0390f22e8cbb6d295a5800363a6733d5 Mon Sep 17 00:00:00 2001
From: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
Date: Mon, 13 Nov 2023 13:58:22 +0200
Subject: [PATCH 243/310] esp32/modmachine: Fix deprecated esp_pm_config_XXX_t.

Co-Authored-By: Trent Piepho <35062987+xyzzy42@users.noreply.github.com>

Signed-off-by: IhorNehrutsa <Ihor.Nehrutsa@gmail.com>
---
 ports/esp32/modmachine.c | 4 ++++
 1 file changed, 4 insertions(+)
 mode change 100644 => 100755 ports/esp32/modmachine.c

diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
old mode 100644
new mode 100755
index a3437f10c1..145ae9341c
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -111,6 +111,9 @@ STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
         mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 20MHz, 40MHz, 80Mhz, 160MHz or 240MHz"));
         #endif
     }
+    #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)
+    esp_pm_config_t pm;
+    #else
     #if CONFIG_IDF_TARGET_ESP32
     esp_pm_config_esp32_t pm;
     #elif CONFIG_IDF_TARGET_ESP32C3
@@ -120,6 +123,7 @@ STATIC void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
     #elif CONFIG_IDF_TARGET_ESP32S3
     esp_pm_config_esp32s3_t pm;
     #endif
+    #endif
     pm.max_freq_mhz = freq;
     pm.min_freq_mhz = freq;
     pm.light_sleep_enable = false;

From 3069fee3866190806fa8e258f07d8557e5842f5e Mon Sep 17 00:00:00 2001
From: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
Date: Mon, 13 Nov 2023 14:07:59 +0200
Subject: [PATCH 244/310] esp32/machine_i2s: Fix deprecated fields and
 constants.

Signed-off-by: IhorNehrutsa <Ihor.Nehrutsa@gmail.com>
---
 ports/esp32/machine_i2s.c  | 8 ++++----
 ports/esp32/mpconfigport.h | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c
index 89d460e452..8a9787c34e 100644
--- a/ports/esp32/machine_i2s.c
+++ b/ports/esp32/machine_i2s.c
@@ -354,14 +354,14 @@ STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, mp_arg_val_t *ar
     self->io_mode = BLOCKING;
 
     i2s_config_t i2s_config;
-    i2s_config.communication_format = I2S_COMM_FORMAT_I2S;
+    i2s_config.communication_format = I2S_COMM_FORMAT_STAND_I2S;
     i2s_config.mode = mode;
     i2s_config.bits_per_sample = get_dma_bits(mode, bits);
     i2s_config.channel_format = get_dma_format(mode, format);
     i2s_config.sample_rate = self->rate;
     i2s_config.intr_alloc_flags = ESP_INTR_FLAG_LOWMED;
-    i2s_config.dma_buf_count = get_dma_buf_count(mode, bits, format, self->ibuf);
-    i2s_config.dma_buf_len = DMA_BUF_LEN_IN_I2S_FRAMES;
+    i2s_config.dma_desc_num = get_dma_buf_count(mode, bits, format, self->ibuf);
+    i2s_config.dma_frame_num = DMA_BUF_LEN_IN_I2S_FRAMES;
     i2s_config.use_apll = false;
     i2s_config.tx_desc_auto_clear = true;
     i2s_config.fixed_mclk = 0;
@@ -369,7 +369,7 @@ STATIC void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, mp_arg_val_t *ar
     i2s_config.bits_per_chan = 0;
 
     // I2S queue size equals the number of DMA buffers
-    check_esp_err(i2s_driver_install(self->i2s_id, &i2s_config, i2s_config.dma_buf_count, &self->i2s_event_queue));
+    check_esp_err(i2s_driver_install(self->i2s_id, &i2s_config, i2s_config.dma_desc_num, &self->i2s_event_queue));
 
     // apply low-level workaround for bug in some ESP-IDF versions that swap
     // the left and right channels
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index aeaff3e503..fbed7706b9 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -126,7 +126,7 @@
 #define MICROPY_PY_MACHINE_DAC              (SOC_DAC_SUPPORTED)
 #endif
 #ifndef MICROPY_PY_MACHINE_I2S
-#define MICROPY_PY_MACHINE_I2S              (1)
+#define MICROPY_PY_MACHINE_I2S              (SOC_I2S_SUPPORTED)
 #endif
 #define MICROPY_PY_MACHINE_I2S_INCLUDEFILE  "ports/esp32/machine_i2s.c"
 #define MICROPY_PY_MACHINE_I2S_FINALISER    (1)

From b4b77c17b551e103e45bcfe55df819c636b8617c Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 11 Dec 2023 12:01:09 +1100
Subject: [PATCH 245/310] esp32/mpconfigport: Keep some funcs out of IRAM for
 ESP32-SPIRAM builds.

To make sure the build fits.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp32/mpconfigport.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index fbed7706b9..91ee3188ca 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -214,7 +214,11 @@ void *esp_native_code_commit(void *, size_t, void *);
 #endif
 
 // Functions that should go in IRAM
+// For ESP32 with SPIRAM workaround, firmware is larger and uses more static IRAM,
+// so in that configuration don't put too many functions in IRAM.
+#if !(CONFIG_IDF_TARGET_ESP32 && CONFIG_SPIRAM && CONFIG_SPIRAM_CACHE_WORKAROUND)
 #define MICROPY_WRAP_MP_BINARY_OP(f) IRAM_ATTR f
+#endif
 #define MICROPY_WRAP_MP_EXECUTE_BYTECODE(f) IRAM_ATTR f
 #define MICROPY_WRAP_MP_LOAD_GLOBAL(f) IRAM_ATTR f
 #define MICROPY_WRAP_MP_LOAD_NAME(f) IRAM_ATTR f

From d0758d8a33dfbe1778d2285315d80badd6e92836 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 11 Dec 2023 12:01:40 +1100
Subject: [PATCH 246/310] esp32/boards/ESP32_GENERIC: Disable network.LAN and
 VM-opt on D2WD.

To reduce firmware size, because IDF v5.0.4 has increased in size.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp32/boards/ESP32_GENERIC/mpconfigboard.cmake | 3 +++
 ports/esp32/mpconfigport.h                           | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/ports/esp32/boards/ESP32_GENERIC/mpconfigboard.cmake b/ports/esp32/boards/ESP32_GENERIC/mpconfigboard.cmake
index 74cb591c07..0e1945dd8c 100644
--- a/ports/esp32/boards/ESP32_GENERIC/mpconfigboard.cmake
+++ b/ports/esp32/boards/ESP32_GENERIC/mpconfigboard.cmake
@@ -11,6 +11,9 @@ if(MICROPY_BOARD_VARIANT STREQUAL "D2WD")
 
     list(APPEND MICROPY_DEF_BOARD
         MICROPY_HW_MCU_NAME="ESP32-D2WD"
+        # Disable some options to reduce firmware size.
+        MICROPY_OPT_COMPUTED_GOTO=0
+        MICROPY_PY_NETWORK_LAN=0
     )
 endif()
 
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 91ee3188ca..5f5cd795e1 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -40,7 +40,9 @@
 #define MICROPY_COMP_CONST_FOLDING_COMPILER_WORKAROUND (1)
 
 // optimisations
+#ifndef MICROPY_OPT_COMPUTED_GOTO
 #define MICROPY_OPT_COMPUTED_GOTO           (1)
+#endif
 
 // Python internal features
 #define MICROPY_READER_VFS                  (1)

From 4365edb810aa0e54eb91d201eb5bf0436c86c4b3 Mon Sep 17 00:00:00 2001
From: IhorNehrutsa <IhorNehrutsa@gmail.com>
Date: Sun, 12 Nov 2023 20:49:07 +0200
Subject: [PATCH 247/310] esp32: Change minimum supported IDF version to
 v5.0.4.

Also, IDF v5.1.2 is now supported, just not used by default.

IDF v5.0.2 still builds but we cannot guarantee continued support for this
version moving forward.

Signed-off-by: IhorNehrutsa <IhorNehrutsa@gmail.com>
---
 ports/esp32/README.md                      | 8 ++++----
 ports/esp32/main_esp32/idf_component.yml   | 2 +-
 ports/esp32/main_esp32c3/idf_component.yml | 2 +-
 ports/esp32/main_esp32s2/idf_component.yml | 2 +-
 ports/esp32/main_esp32s3/idf_component.yml | 2 +-
 tools/ci.sh                                | 2 +-
 6 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/ports/esp32/README.md b/ports/esp32/README.md
index 169de4073b..a7531b6eaa 100644
--- a/ports/esp32/README.md
+++ b/ports/esp32/README.md
@@ -28,7 +28,7 @@ manage the ESP32 microcontroller, as well as a way to manage the required
 build environment and toolchains needed to build the firmware.
 
 The ESP-IDF changes quickly and MicroPython only supports certain versions.
-Currently MicroPython supports only v5.0.2.
+Currently MicroPython supports v5.0.4, v5.1.2.
 
 To install the ESP-IDF the full instructions can be found at the
 [Espressif Getting Started guide](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html#installation-step-by-step).
@@ -46,10 +46,10 @@ The steps to take are summarised below.
 To check out a copy of the IDF use git clone:
 
 ```bash
-$ git clone -b v5.0.2 --recursive https://github.com/espressif/esp-idf.git
+$ git clone -b v5.0.4 --recursive https://github.com/espressif/esp-idf.git
 ```
 
-You can replace `v5.0.2` with any other supported version.
+You can replace `v5.0.4` with any other supported version.
 (You don't need a full recursive clone; see the `ci_esp32_setup` function in
 `tools/ci.sh` in this repository for more detailed set-up commands.)
 
@@ -58,7 +58,7 @@ MicroPython and update the submodules using:
 
 ```bash
 $ cd esp-idf
-$ git checkout v5.0.2
+$ git checkout v5.0.4
 $ git submodule update --init --recursive
 ```
 
diff --git a/ports/esp32/main_esp32/idf_component.yml b/ports/esp32/main_esp32/idf_component.yml
index 8be21ed2fb..5dabbc00ba 100644
--- a/ports/esp32/main_esp32/idf_component.yml
+++ b/ports/esp32/main_esp32/idf_component.yml
@@ -2,4 +2,4 @@
 dependencies:
   espressif/mdns: "~1.1.0"
   idf:
-    version: ">=5.0.2"
+    version: ">=5.0.4"
diff --git a/ports/esp32/main_esp32c3/idf_component.yml b/ports/esp32/main_esp32c3/idf_component.yml
index 8be21ed2fb..5dabbc00ba 100644
--- a/ports/esp32/main_esp32c3/idf_component.yml
+++ b/ports/esp32/main_esp32c3/idf_component.yml
@@ -2,4 +2,4 @@
 dependencies:
   espressif/mdns: "~1.1.0"
   idf:
-    version: ">=5.0.2"
+    version: ">=5.0.4"
diff --git a/ports/esp32/main_esp32s2/idf_component.yml b/ports/esp32/main_esp32s2/idf_component.yml
index 69e27bf8b5..05ab2f29a8 100644
--- a/ports/esp32/main_esp32s2/idf_component.yml
+++ b/ports/esp32/main_esp32s2/idf_component.yml
@@ -3,4 +3,4 @@ dependencies:
   espressif/mdns: "~1.1.0"
   espressif/esp_tinyusb: "~1.0.0"
   idf:
-    version: ">=5.0.2"
+    version: ">=5.0.4"
diff --git a/ports/esp32/main_esp32s3/idf_component.yml b/ports/esp32/main_esp32s3/idf_component.yml
index 69e27bf8b5..05ab2f29a8 100644
--- a/ports/esp32/main_esp32s3/idf_component.yml
+++ b/ports/esp32/main_esp32s3/idf_component.yml
@@ -3,4 +3,4 @@ dependencies:
   espressif/mdns: "~1.1.0"
   espressif/esp_tinyusb: "~1.0.0"
   idf:
-    version: ">=5.0.2"
+    version: ">=5.0.4"
diff --git a/tools/ci.sh b/tools/ci.sh
index b71862273d..d3ae411582 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -119,7 +119,7 @@ function ci_cc3200_build {
 # ports/esp32
 
 # GitHub tag of ESP-IDF to use for CI (note: must be a tag or a branch)
-IDF_VER=v5.0.2
+IDF_VER=v5.0.4
 
 export IDF_CCACHE_ENABLE=1
 

From f3f215e9bdf138fa6f94fb376ed72c25641aa298 Mon Sep 17 00:00:00 2001
From: Carlosgg <carlosgilglez@gmail.com>
Date: Tue, 27 Jun 2023 03:00:00 +0100
Subject: [PATCH 248/310] extmod/modssl_mbedtls: Add SSLContext certificate
 methods.

This commit adds:

1) Methods to SSLContext class that match CPython signature:

	- `SSLContext.load_cert_chain(certfile, keyfile)`
	- `SSLContext.load_verify_locations(cafile=, cadata=)`
	- `SSLContext.get_ciphers()` --> ["CIPHERSUITE"]
	- `SSLContext.set_ciphers(["CIPHERSUITE"])`

2) `sslsocket.cipher()` to get current ciphersuite and protocol
   version.

3) `ssl.MBEDTLS_VERSION` string constant.

4) Certificate verification errors info instead of
   `MBEDTLS_ERR_X509_CERT_VERIFY_FAILED`.

5) Tests in `net_inet` and `multi_net` to test these new methods.

`SSLContext.load_cert_chain` method allows loading key and cert from disk
passing a filepath in `certfile` or `keyfile` options.

`SSLContext.load_verify_locations`'s `cafile` option enables the same
functionality for ca files.

Signed-off-by: Carlos Gil <carlosgilglez@gmail.com>
---
 extmod/modssl_mbedtls.c                       | 164 ++++++++++++++++++
 tests/README.md                               |  18 ++
 tests/extmod/ssl_sslcontext_ciphers.py        |  29 ++++
 tests/extmod/ssl_sslcontext_ciphers.py.exp    |   6 +
 tests/multi_net/expired_cert.der              | Bin 0 -> 1331 bytes
 tests/multi_net/rsa_cert.der                  | Bin 0 -> 1421 bytes
 tests/multi_net/rsa_key.der                   | Bin 0 -> 2347 bytes
 tests/multi_net/ssl_cert_rsa.py               | 130 ++------------
 .../sslcontext_check_hostname_error.py        |  59 +++++++
 .../sslcontext_check_hostname_error.py.exp    |   4 +
 tests/multi_net/sslcontext_getpeercert.py     |  55 ++++++
 tests/multi_net/sslcontext_getpeercert.py.exp |   5 +
 tests/multi_net/sslcontext_server_client.py   |  60 +++++++
 .../multi_net/sslcontext_server_client.py.exp |   4 +
 .../sslcontext_server_client_ciphers.py       |  58 +++++++
 .../sslcontext_server_client_ciphers.py.exp   |   4 +
 .../sslcontext_server_client_files.py         |  54 ++++++
 .../sslcontext_server_client_files.py.exp     |   4 +
 tests/multi_net/sslcontext_verify_error.py    |  58 +++++++
 .../multi_net/sslcontext_verify_error.py.exp  |   6 +
 .../multi_net/sslcontext_verify_time_error.py |  58 +++++++
 .../sslcontext_verify_time_error.py.exp       |   6 +
 tests/net_inet/mpycert.der                    | Bin 0 -> 1306 bytes
 tests/net_inet/test_sslcontext_client.py      |  52 ++++++
 tests/net_inet/test_sslcontext_client.py.exp  |   1 +
 25 files changed, 722 insertions(+), 113 deletions(-)
 create mode 100644 tests/extmod/ssl_sslcontext_ciphers.py
 create mode 100644 tests/extmod/ssl_sslcontext_ciphers.py.exp
 create mode 100644 tests/multi_net/expired_cert.der
 create mode 100644 tests/multi_net/rsa_cert.der
 create mode 100644 tests/multi_net/rsa_key.der
 create mode 100644 tests/multi_net/sslcontext_check_hostname_error.py
 create mode 100644 tests/multi_net/sslcontext_check_hostname_error.py.exp
 create mode 100644 tests/multi_net/sslcontext_getpeercert.py
 create mode 100644 tests/multi_net/sslcontext_getpeercert.py.exp
 create mode 100644 tests/multi_net/sslcontext_server_client.py
 create mode 100644 tests/multi_net/sslcontext_server_client.py.exp
 create mode 100644 tests/multi_net/sslcontext_server_client_ciphers.py
 create mode 100644 tests/multi_net/sslcontext_server_client_ciphers.py.exp
 create mode 100644 tests/multi_net/sslcontext_server_client_files.py
 create mode 100644 tests/multi_net/sslcontext_server_client_files.py.exp
 create mode 100644 tests/multi_net/sslcontext_verify_error.py
 create mode 100644 tests/multi_net/sslcontext_verify_error.py.exp
 create mode 100644 tests/multi_net/sslcontext_verify_time_error.py
 create mode 100644 tests/multi_net/sslcontext_verify_time_error.py.exp
 create mode 100644 tests/net_inet/mpycert.der
 create mode 100644 tests/net_inet/test_sslcontext_client.py
 create mode 100644 tests/net_inet/test_sslcontext_client.py.exp

diff --git a/extmod/modssl_mbedtls.c b/extmod/modssl_mbedtls.c
index 1d7705c17f..3d420759da 100644
--- a/extmod/modssl_mbedtls.c
+++ b/extmod/modssl_mbedtls.c
@@ -36,6 +36,8 @@
 #include "py/runtime.h"
 #include "py/stream.h"
 #include "py/objstr.h"
+#include "py/reader.h"
+#include "extmod/vfs.h"
 
 // mbedtls_time_t
 #include "mbedtls/platform.h"
@@ -46,6 +48,11 @@
 #include "mbedtls/ctr_drbg.h"
 #include "mbedtls/debug.h"
 #include "mbedtls/error.h"
+#if MBEDTLS_VERSION_NUMBER >= 0x03000000
+#include "mbedtls/build_info.h"
+#else
+#include "mbedtls/version.h"
+#endif
 
 #define MP_STREAM_POLL_RDWR (MP_STREAM_POLL_RD | MP_STREAM_POLL_WR)
 
@@ -59,6 +66,7 @@ typedef struct _mp_obj_ssl_context_t {
     mbedtls_x509_crt cert;
     mbedtls_pk_context pkey;
     int authmode;
+    int *ciphersuites;
 } mp_obj_ssl_context_t;
 
 // This corresponds to an SSLSocket object.
@@ -75,12 +83,32 @@ typedef struct _mp_obj_ssl_socket_t {
 STATIC const mp_obj_type_t ssl_context_type;
 STATIC const mp_obj_type_t ssl_socket_type;
 
+STATIC const MP_DEFINE_STR_OBJ(mbedtls_version_obj, MBEDTLS_VERSION_STRING_FULL);
+
 STATIC mp_obj_t ssl_socket_make_new(mp_obj_ssl_context_t *ssl_context, mp_obj_t sock,
     bool server_side, bool do_handshake_on_connect, mp_obj_t server_hostname);
 
 /******************************************************************************/
 // Helper functions.
 
+STATIC mp_obj_t read_file(mp_obj_t self_in) {
+    // file = open(args[0], "rb")
+    mp_obj_t f_args[2] = {
+        self_in,
+        MP_OBJ_NEW_QSTR(MP_QSTR_rb),
+    };
+    mp_obj_t file = mp_vfs_open(2, &f_args[0], (mp_map_t *)&mp_const_empty_map);
+
+    // data = file.read()
+    mp_obj_t dest[2];
+    mp_load_method(file, MP_QSTR_read, dest);
+    mp_obj_t data = mp_call_method_n_kw(0, 0, dest);
+
+    // file.close()
+    mp_stream_close(file);
+    return data;
+}
+
 #ifdef MBEDTLS_DEBUG_C
 STATIC void mbedtls_debug(void *ctx, int level, const char *file, int line, const char *str) {
     (void)ctx;
@@ -162,6 +190,7 @@ STATIC mp_obj_t ssl_context_make_new(const mp_obj_type_t *type_in, size_t n_args
     mbedtls_x509_crt_init(&self->cacert);
     mbedtls_x509_crt_init(&self->cert);
     mbedtls_pk_init(&self->pkey);
+    self->ciphersuites = NULL;
 
     #ifdef MBEDTLS_DEBUG_C
     // Debug level (0-4) 1=warning, 2=info, 3=debug, 4=verbose
@@ -236,6 +265,54 @@ STATIC mp_obj_t ssl_context___del__(mp_obj_t self_in) {
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(ssl_context___del___obj, ssl_context___del__);
 #endif
 
+// SSLContext.get_ciphers()
+STATIC mp_obj_t ssl_context_get_ciphers(mp_obj_t self_in) {
+    mp_obj_t list = mp_obj_new_list(0, NULL);
+    for (const int *cipher_list = mbedtls_ssl_list_ciphersuites(); *cipher_list; ++cipher_list) {
+        const char *cipher_name = mbedtls_ssl_get_ciphersuite_name(*cipher_list);
+        mp_obj_list_append(list, MP_OBJ_FROM_PTR(mp_obj_new_str(cipher_name, strlen(cipher_name))));
+        cipher_list++;
+        if (!*cipher_list) {
+            break;
+        }
+    }
+    return list;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(ssl_context_get_ciphers_obj, ssl_context_get_ciphers);
+
+// SSLContext.set_ciphers(ciphersuite)
+STATIC mp_obj_t ssl_context_set_ciphers(mp_obj_t self_in, mp_obj_t ciphersuite) {
+    mp_obj_ssl_context_t *ssl_context = MP_OBJ_TO_PTR(self_in);
+
+    // Check that ciphersuite is a list or tuple.
+    size_t len = 0;
+    mp_obj_t *ciphers;
+    mp_obj_get_array(ciphersuite, &len, &ciphers);
+    if (len == 0) {
+        mbedtls_raise_error(MBEDTLS_ERR_SSL_BAD_CONFIG);
+    }
+
+    // Parse list of ciphers.
+    ssl_context->ciphersuites = m_new(int, len + 1);
+    for (int i = 0, n = len; i < n; i++) {
+        if (ciphers[i] != mp_const_none) {
+            const char *ciphername = mp_obj_str_get_str(ciphers[i]);
+            const int id = mbedtls_ssl_get_ciphersuite_id(ciphername);
+            ssl_context->ciphersuites[i] = id;
+            if (id == 0) {
+                mbedtls_raise_error(MBEDTLS_ERR_SSL_BAD_CONFIG);
+            }
+        }
+    }
+    ssl_context->ciphersuites[len + 1] = 0;
+
+    // Configure ciphersuite.
+    mbedtls_ssl_conf_ciphersuites(&ssl_context->conf, (const int *)ssl_context->ciphersuites);
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(ssl_context_set_ciphers_obj, ssl_context_set_ciphers);
+
 STATIC void ssl_context_load_key(mp_obj_ssl_context_t *self, mp_obj_t key_obj, mp_obj_t cert_obj) {
     size_t key_len;
     const byte *key = (const byte *)mp_obj_str_get_data(key_obj, &key_len);
@@ -264,6 +341,30 @@ STATIC void ssl_context_load_key(mp_obj_ssl_context_t *self, mp_obj_t key_obj, m
     }
 }
 
+// SSLContext.load_cert_chain(certfile, keyfile)
+STATIC mp_obj_t ssl_context_load_cert_chain(mp_obj_t self_in, mp_obj_t certfile, mp_obj_t keyfile) {
+    mp_obj_ssl_context_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_obj_t pkey;
+    mp_obj_t cert;
+    if (certfile != mp_const_none) {
+        // check if key is a string/path
+        if (!(mp_obj_is_type(keyfile, &mp_type_bytes))) {
+            pkey = read_file(keyfile);
+        } else {
+            pkey = keyfile;
+        }
+        // check if cert is a string/path
+        if (!(mp_obj_is_type(certfile, &mp_type_bytes))) {
+            cert = read_file(certfile);
+        } else {
+            cert = certfile;
+        }
+        ssl_context_load_key(self, pkey, cert);
+    }
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_3(ssl_context_load_cert_chain_obj, ssl_context_load_cert_chain);
+
 STATIC void ssl_context_load_cadata(mp_obj_ssl_context_t *self, mp_obj_t cadata_obj) {
     size_t cacert_len;
     const byte *cacert = (const byte *)mp_obj_str_get_data(cadata_obj, &cacert_len);
@@ -276,6 +377,30 @@ STATIC void ssl_context_load_cadata(mp_obj_ssl_context_t *self, mp_obj_t cadata_
     mbedtls_ssl_conf_ca_chain(&self->conf, &self->cacert, NULL);
 }
 
+// SSLContext.load_verify_locations(cafile=None, *, cadata=None)
+STATIC mp_obj_t ssl_context_load_verify_locations(size_t n_args, const mp_obj_t *pos_args,
+    mp_map_t *kw_args) {
+
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_cafile, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_cadata, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+    };
+
+    mp_obj_ssl_context_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+    // cafile
+    if (args[0].u_obj != mp_const_none) {
+        ssl_context_load_cadata(self, read_file(args[0].u_obj));
+    }
+    // cadata
+    if (args[1].u_obj != mp_const_none) {
+        ssl_context_load_cadata(self, args[1].u_obj);
+    }
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(ssl_context_load_verify_locations_obj, 1, ssl_context_load_verify_locations);
+
 STATIC mp_obj_t ssl_context_wrap_socket(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_server_side, ARG_do_handshake_on_connect, ARG_server_hostname };
     static const mp_arg_t allowed_args[] = {
@@ -300,6 +425,10 @@ STATIC const mp_rom_map_elem_t ssl_context_locals_dict_table[] = {
     #if MICROPY_PY_SSL_FINALISER
     { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&ssl_context___del___obj) },
     #endif
+    { MP_ROM_QSTR(MP_QSTR_get_ciphers), MP_ROM_PTR(&ssl_context_get_ciphers_obj)},
+    { MP_ROM_QSTR(MP_QSTR_set_ciphers), MP_ROM_PTR(&ssl_context_set_ciphers_obj)},
+    { MP_ROM_QSTR(MP_QSTR_load_cert_chain), MP_ROM_PTR(&ssl_context_load_cert_chain_obj)},
+    { MP_ROM_QSTR(MP_QSTR_load_verify_locations), MP_ROM_PTR(&ssl_context_load_verify_locations_obj)},
     { MP_ROM_QSTR(MP_QSTR_wrap_socket), MP_ROM_PTR(&ssl_context_wrap_socket_obj) },
 };
 STATIC MP_DEFINE_CONST_DICT(ssl_context_locals_dict, ssl_context_locals_dict_table);
@@ -369,6 +498,8 @@ STATIC mp_obj_t ssl_socket_make_new(mp_obj_ssl_context_t *ssl_context, mp_obj_t
     o->last_error = 0;
 
     int ret;
+    uint32_t flags = 0;
+
     mbedtls_ssl_init(&o->ssl);
 
     ret = mbedtls_ssl_setup(&o->ssl, &ssl_context->conf);
@@ -382,6 +513,11 @@ STATIC mp_obj_t ssl_socket_make_new(mp_obj_ssl_context_t *ssl_context, mp_obj_t
         if (ret != 0) {
             goto cleanup;
         }
+    } else if (ssl_context->authmode == MBEDTLS_SSL_VERIFY_REQUIRED && server_side == false) {
+
+        o->sock = MP_OBJ_NULL;
+        mbedtls_ssl_free(&o->ssl);
+        mp_raise_ValueError(MP_ERROR_TEXT("CERT_REQUIRED requires server_hostname"));
     }
 
     mbedtls_ssl_set_bio(&o->ssl, &o->sock, _mbedtls_ssl_send, _mbedtls_ssl_recv, NULL);
@@ -398,8 +534,23 @@ STATIC mp_obj_t ssl_socket_make_new(mp_obj_ssl_context_t *ssl_context, mp_obj_t
     return MP_OBJ_FROM_PTR(o);
 
 cleanup:
+    if (ret == MBEDTLS_ERR_X509_CERT_VERIFY_FAILED) {
+        flags = mbedtls_ssl_get_verify_result(&o->ssl);
+    }
+
     o->sock = MP_OBJ_NULL;
     mbedtls_ssl_free(&o->ssl);
+
+    if (ret == MBEDTLS_ERR_X509_CERT_VERIFY_FAILED) {
+        char xcbuf[256];
+        int ret_info = mbedtls_x509_crt_verify_info(xcbuf, sizeof(xcbuf), "\n", flags);
+        // The length of the string written (not including the terminated nul byte),
+        // or a negative err code.
+        if (ret_info > 0) {
+            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("%s"), xcbuf);
+        }
+    }
+
     mbedtls_raise_error(ret);
 }
 
@@ -416,6 +567,17 @@ STATIC mp_obj_t mod_ssl_getpeercert(mp_obj_t o_in, mp_obj_t binary_form) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_ssl_getpeercert_obj, mod_ssl_getpeercert);
 
+STATIC mp_obj_t mod_ssl_cipher(mp_obj_t o_in) {
+    mp_obj_ssl_socket_t *o = MP_OBJ_TO_PTR(o_in);
+    const char *cipher_suite = mbedtls_ssl_get_ciphersuite(&o->ssl);
+    const char *tls_version = mbedtls_ssl_get_version(&o->ssl);
+    mp_obj_t tuple[2] = {mp_obj_new_str(cipher_suite, strlen(cipher_suite)),
+                         mp_obj_new_str(tls_version, strlen(tls_version))};
+
+    return mp_obj_new_tuple(2, tuple);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_ssl_cipher_obj, mod_ssl_cipher);
+
 STATIC mp_uint_t socket_read(mp_obj_t o_in, void *buf, mp_uint_t size, int *errcode) {
     mp_obj_ssl_socket_t *o = MP_OBJ_TO_PTR(o_in);
     o->poll_mask = 0;
@@ -565,6 +727,7 @@ STATIC const mp_rom_map_elem_t ssl_socket_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&mp_stream_ioctl_obj) },
     #endif
     { MP_ROM_QSTR(MP_QSTR_getpeercert), MP_ROM_PTR(&mod_ssl_getpeercert_obj) },
+    { MP_ROM_QSTR(MP_QSTR_cipher), MP_ROM_PTR(&mod_ssl_cipher_obj) },
 };
 STATIC MP_DEFINE_CONST_DICT(ssl_socket_locals_dict, ssl_socket_locals_dict_table);
 
@@ -645,6 +808,7 @@ STATIC const mp_rom_map_elem_t mp_module_ssl_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SSLContext), MP_ROM_PTR(&ssl_context_type) },
 
     // Constants.
+    { MP_ROM_QSTR(MP_QSTR_MBEDTLS_VERSION), MP_ROM_PTR(&mbedtls_version_obj)},
     { MP_ROM_QSTR(MP_QSTR_PROTOCOL_TLS_CLIENT), MP_ROM_INT(MBEDTLS_SSL_IS_CLIENT) },
     { MP_ROM_QSTR(MP_QSTR_PROTOCOL_TLS_SERVER), MP_ROM_INT(MBEDTLS_SSL_IS_SERVER) },
     { MP_ROM_QSTR(MP_QSTR_CERT_NONE), MP_ROM_INT(MBEDTLS_SSL_VERIFY_NONE) },
diff --git a/tests/README.md b/tests/README.md
index c89930d0c0..083269d6e8 100644
--- a/tests/README.md
+++ b/tests/README.md
@@ -174,3 +174,21 @@ internal_bench/bytebuf:
     0.177s (+87.78%) internal_bench/bytebuf-3-bytarray_map.py
 1 tests performed (3 individual testcases)
 ```
+
+## Test key/certificates
+
+SSL/TLS tests in `multi_net` and `net_inet` use a 
+self-signed key/cert pair that is randomly generated and to be used for
+testing/demonstration only. You should always generate your own key/cert.
+
+To generate a new self-signed key/cert pair with openssl do:
+```
+$ openssl req -x509 -newkey rsa:4096 -keyout rsa_key.pem -out rsa_cert.pem -days 365 -nodes
+```
+In this case CN is: micropython.local
+
+Convert them to DER format:
+```
+$ openssl rsa -in rsa_key.pem -out rsa_key.der -outform DER
+$ openssl x509 -in rsa_cert.pem -out rsa_cert.der -outform DER
+```
diff --git a/tests/extmod/ssl_sslcontext_ciphers.py b/tests/extmod/ssl_sslcontext_ciphers.py
new file mode 100644
index 0000000000..d87e96afdf
--- /dev/null
+++ b/tests/extmod/ssl_sslcontext_ciphers.py
@@ -0,0 +1,29 @@
+# Basic test of ssl.SSLContext get_ciphers() and set_ciphers() methods.
+
+try:
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+
+ciphers = ctx.get_ciphers()
+
+for ci in ciphers:
+    print(ci)
+
+ctx.set_ciphers(ciphers[:1])
+
+# Test error cases.
+
+try:
+    ctx.set_ciphers(ciphers[0])
+except TypeError as e:
+    print(e)
+
+try:
+    ctx.set_ciphers(["BAR"])
+except OSError as e:
+    print(e)
diff --git a/tests/extmod/ssl_sslcontext_ciphers.py.exp b/tests/extmod/ssl_sslcontext_ciphers.py.exp
new file mode 100644
index 0000000000..4d243a7883
--- /dev/null
+++ b/tests/extmod/ssl_sslcontext_ciphers.py.exp
@@ -0,0 +1,6 @@
+TLS-ECDHE-ECDSA-WITH-AES-256-CBC-SHA384
+TLS-ECDHE-ECDSA-WITH-AES-128-CBC-SHA256
+TLS-RSA-WITH-AES-256-CBC-SHA256
+TLS-RSA-WITH-AES-128-CBC-SHA256
+object 'str' isn't a tuple or list
+(-24192, 'MBEDTLS_ERR_SSL_BAD_CONFIG')
diff --git a/tests/multi_net/expired_cert.der b/tests/multi_net/expired_cert.der
new file mode 100644
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diff --git a/tests/multi_net/ssl_cert_rsa.py b/tests/multi_net/ssl_cert_rsa.py
index 6454ad83aa..71c9a34797 100644
--- a/tests/multi_net/ssl_cert_rsa.py
+++ b/tests/multi_net/ssl_cert_rsa.py
@@ -2,127 +2,29 @@
 # This test won't run under CPython because CPython doesn't have key/cert
 
 try:
-    import binascii, socket, ssl
+    import binascii, os, socket, ssl
 except ImportError:
     print("SKIP")
     raise SystemExit
 
 PORT = 8000
 
+# These are test certificates. See tests/README.md for details.
+certfile = "multi_net/rsa_cert.der"
+keyfile = "multi_net/rsa_key.der"
 
-# This self-signed key/cert pair is randomly generated and to be used for
-# testing/demonstration only.  You should always generate your own key/cert.
+try:
+    os.stat(certfile)
+    os.stat(keyfile)
+except OSError:
+    print("SKIP")
+    raise SystemExit
 
-# To generate a new self-signed key/cert pair with openssl do:
-# $ openssl req -x509 -newkey rsa:4096 -keyout rsa_key.pem -out rsa_cert.pem -days 1825 -nodes
-#
-# Convert them to DER format:
-# $ openssl rsa -in rsa_key.pem -out rsa_key.der -outform DER
-# $ openssl x509 -in rsa_cert.pem -out rsa_cert.der -outform DER
-#
-# Then convert to hex format, eg using binascii.hexlify(data).
+with open(certfile, "rb") as cf:
+    cert = cadata = cf.read()
 
-cert = binascii.unhexlify(
-    b"308205b53082039da00302010202090090195a9382cbcbef300d06092a864886f70d01010b050030"
-    b"71310b3009060355040613024155310c300a06035504080c03466f6f310c300a06035504070c0342"
-    b"617231143012060355040a0c0b4d6963726f507974686f6e31143012060355040b0c0b4d6963726f"
-    b"507974686f6e311a301806035504030c116d6963726f707974686f6e2e6c6f63616c301e170d3233"
-    b"303731353136323034395a170d3238303731333136323034395a3071310b30090603550406130241"
-    b"55310c300a06035504080c03466f6f310c300a06035504070c0342617231143012060355040a0c0b"
-    b"4d6963726f507974686f6e31143012060355040b0c0b4d6963726f507974686f6e311a3018060355"
-    b"04030c116d6963726f707974686f6e2e6c6f63616c30820222300d06092a864886f70d0101010500"
-    b"0382020f003082020a0282020100944fdb40b587af0cf7e9696c355d24a70936874e6a3bd2598166"
-    b"ce2495aaf9b4af01b54471f7cbf3626ae0720bf0bfd520507f79ec553c62898bfd2598385f56061b"
-    b"0e8f452625c82d3c83e2a0d070ab9be2db21faf88c58e4a61d62f8ff43960aa1ffdadaad41f7cb2e"
-    b"b337070a39f08ff9fe20c09b19926cbbc4a5154b796ff7e7ce11334e090d360c81072af08758f6cd"
-    b"7bad75bc7b95b6dcc801c85de81d72806ca3ce0782bfcbdffce707f9fb1572a7db0d74445dc32d5f"
-    b"bea12a3ab1d47edf668ebfa60ed8b51e654e76292e3894ee574ea851064956906aa8afe00e67664e"
-    b"110b5a6ff7db51f7944463cdd626ff2ec7886c229f4ca5985168f20f8f210972b5ff9181d4f3beb8"
-    b"914ec5b24a0953253b3d42ab55e98bd70cb25e7a24c603b27ec83e1ce31c90b728b47a5f606ff2a1"
-    b"0ff784a016894c28f7e71f51a78b0a7601bbbc8c1b132b04e567394a327a7aa4674e8e4c0bfaec4b"
-    b"eeccf0ed09d1660933d718a2f34ff91d79d875a73fbac07182a9531ca52bd360e2678f95ff9b4ba2"
-    b"1490d7456548364b2eb335c207d6e1e48ccd7d8cb43868a334c095bd9673be7403f3b69b545ee904"
-    b"a3f513d2b2a2dd46f06820cd394819551dd05d9b34a8a3238a521f6c1c3592f76d5ef29e181c60ee"
-    b"bcaf4c63098794c15d4f82e7425e75ff8f5430247ecc0e7f2983b715506012f187d54a7b6729bc61"
-    b"fa4d10a9f22b0203010001a350304e301d0603551d0e041604147a6d126931b58fa1c3dff3c9215f"
-    b"6202e61fa8da301f0603551d230418301680147a6d126931b58fa1c3dff3c9215f6202e61fa8da30"
-    b"0c0603551d13040530030101ff300d06092a864886f70d01010b0500038202010051b3a4834d2bf1"
-    b"95ac645bca61e95289eff38d80ab2ee732c6ebd1370781b66955a7583c78831f9fb7d8b236a1b5ff"
-    b"c9183b4e17225951e1fb2c39f7218af30ec3fd8e4f697e0d10ecd05eb14208535dc55bc1e25d8a43"
-    b"050670d4de3e4cb8c884e6cbb6b884320d496b354acf5258bcb0ddaefd065ee8fccbddf3a2bfa10d"
-    b"bfeb8ab6b2580b50f0678760599269b612f81ba1310bfcd39427fec49211769c514cdd0305081d8a"
-    b"11ebe705496d4dcc31ac9fab96a2d298ee4423789baffbfa0fa82ee1b5113f9cf597647a36640cad"
-    b"abf535205c322e16153d6ab04b0817f57d8a9a6ca2db2ab10986ae9eab343547e52c78a641868bb5"
-    b"e2981182fcc55d86cdc6aa8478b226318a3be72fb726dd0b90f30df810c4d6c6b5a0ecb3c6cc375b"
-    b"8d3d244a07d8517ad390929be7b75f679beb63d8c1028905af2383144a4ed560e45907d301846acc"
-    b"9dbec86bcdd7fbf8a805b59f359c8bd997f5eb7b8aea6f7a538f9663ec2c12e07d4b37650e92b783"
-    b"74356daee4a501eeb27fef79b472b2fcce4363a9ff4d80f96a3b47dc4c4ef380ef231d193a517071"
-    b"b31078fa9f9a80cfd943f7e99e4ed8548c9ea80fd845ecc2c89726be273fa8b36680d645998fd1e6"
-    b"2367638f4953e9af68531aedb2ee49dffaaed07a4a5b97551712058219ac6f8da71710949f761271"
-    b"5273a348dcce40c556bdab00a4ae3a7b23a5934ac88b7640df"
-)
-
-key = binascii.unhexlify(
-    b"308209280201000282020100944fdb40b587af0cf7e9696c355d24a70936874e6a3bd2598166ce24"
-    b"95aaf9b4af01b54471f7cbf3626ae0720bf0bfd520507f79ec553c62898bfd2598385f56061b0e8f"
-    b"452625c82d3c83e2a0d070ab9be2db21faf88c58e4a61d62f8ff43960aa1ffdadaad41f7cb2eb337"
-    b"070a39f08ff9fe20c09b19926cbbc4a5154b796ff7e7ce11334e090d360c81072af08758f6cd7bad"
-    b"75bc7b95b6dcc801c85de81d72806ca3ce0782bfcbdffce707f9fb1572a7db0d74445dc32d5fbea1"
-    b"2a3ab1d47edf668ebfa60ed8b51e654e76292e3894ee574ea851064956906aa8afe00e67664e110b"
-    b"5a6ff7db51f7944463cdd626ff2ec7886c229f4ca5985168f20f8f210972b5ff9181d4f3beb8914e"
-    b"c5b24a0953253b3d42ab55e98bd70cb25e7a24c603b27ec83e1ce31c90b728b47a5f606ff2a10ff7"
-    b"84a016894c28f7e71f51a78b0a7601bbbc8c1b132b04e567394a327a7aa4674e8e4c0bfaec4beecc"
-    b"f0ed09d1660933d718a2f34ff91d79d875a73fbac07182a9531ca52bd360e2678f95ff9b4ba21490"
-    b"d7456548364b2eb335c207d6e1e48ccd7d8cb43868a334c095bd9673be7403f3b69b545ee904a3f5"
-    b"13d2b2a2dd46f06820cd394819551dd05d9b34a8a3238a521f6c1c3592f76d5ef29e181c60eebcaf"
-    b"4c63098794c15d4f82e7425e75ff8f5430247ecc0e7f2983b715506012f187d54a7b6729bc61fa4d"
-    b"10a9f22b0203010001028202000b41080520013cc242299f0b4bfd5663aa6a4dd8206d8ba7a90f11"
-    b"036babfea8bc42e7eb5aae8ff656f87f3188406b7e13a6a815ab5e4867bdc236a25caba26857ac43"
-    b"ed9134b4d73cbf83ce759f7b7d3a25fbb4d76376dae3f6caf210ace60703a58951a51852922803d2"
-    b"2b91c82fdf563d85101d2d67c259a7e1e318fb922a71e85015b40beed9e6c90a1d6e1fb45586dcce"
-    b"ceb9c964a356ade82b6275e5c01e492a753f940852df788eab454aadc7d1dc74ddcf7dc493a3e4c9"
-    b"0557bbfe747e701b4b27b5c518a29dbcd8385525a1bb835e72a489096e15387e2f70b112c6bbd79e"
-    b"a97ae2562f7947cd2367635e25b5656a54aac7f1c892243dc135e5025a44d724884b244e8fe4abb4"
-    b"c67bbd2e652d5fc5942b55c24b7f642f65b9b6d37110a955c63eb4f26435be056effbd777f14db8d"
-    b"3d8073f7583b24656edb19911e1307101443a50717c32dbb80b6212e6f0ee43f629b1e718a958a5c"
-    b"fdcd99762f5bff821ac49b0e77c9d1426f8bb31142df030549330dde5cc92fa20d09744ceac6ae02"
-    b"fb354e9b930173e08488375f7c795b3b934c72b58a3353332d5129d56151b57a793d99868885ebd4"
-    b"aac11ca03e09f5b6bd9dda5322a0ab81e468839ea373ecd2b5ac4ffc99740581b35add07f83ff18e"
-    b"c2111555ead17783294b2330ad874bd966c1d60b44e5f379650910a8a05eb92cb7550191c13251f5"
-    b"0a11afa7510282010100c5a4aa380f6bdd4b4524deb44425aa7ef61039a46ad0d09e2ca2cd7fb757"
-    b"ff325f81eaf3a2e790afb3ffb0d71f3ffa52db1a24d3149839f03d1acfe33ef721fe310895986c5a"
-    b"fe88ceb82318ed540456b8aa7e07dc7b982345c4f040b1544bd2ee1e4cb0315bd8db3794ea93d705"
-    b"f41cc1c06badf72de36d2b4a4399846d6c851260e5044e9495be8225307edb97071bdea08c99ccfe"
-    b"54219f6a785db47864e03cf2851abcb62941d3efeea7cdf136d9e23845cf9ea0323b156c686c6d30"
-    b"1cbb5a8c7f1db23a998bf549874b2c13685b20d200d2d91be92c40480a0cca18c28f654dd644c60d"
-    b"e8e03824c0ff83e7cbfc44b2aa16ad537a09565ed4afbe63b8930282010100c01a5e6108420c3d2e"
-    b"ccd0b559e08680f47b3e7271ee4ea9bf4740cc5c418a53225778eddb716447b02d234909f8291581"
-    b"a45be0591952bacda55e774338962502c1d73f2d5383259aaa69f2603fde216ca9557d8b4e629888"
-    b"c697fec1aaf9f99ebd223c06399cc13cd21bd01e3660acc148ba841e5c89b3f8f04efac07f8072a5"
-    b"bacb4f5cfece528496bb35e906361efdb89a17fe4999f47508d5e48914ac651172ddc994993b4672"
-    b"7ec62810d6c204af4b5fd52ba4f8cb3c8720fbd469b219868e28294e60276bc2483e78d96a0edf29"
-    b"e237fe6f1660705d5cd3590c476e37c5d367b19bfb0a1c29ef296dfd3e9fabf5b37e1fb7357a3032"
-    b"c8a641b467d7090282010100bc6d55bf66ac6e69017dba38e0b38c4dc8a8055c845d9a5702b51ff8"
-    b"4042cbd1298f0201cf70b7d75b634d247aed92e9056c72692f3c46188d190fd35647648824154c11"
-    b"ea54025149cbf1e224f9b1bd4007836a594117f5a0e1b62fe72037bddc38d4e231dc9fedb79ae8dd"
-    b"93e5602b3e6905fff02536aaf0d7b78517e4fece0b8c872ac9040d93781e9e92832604a80462ca49"
-    b"234fe1c3c0695061fdd9be4aaeb08447ce5c590f2250a01629586bf3e421c424c1d576ae2fa99010"
-    b"b7346460165ed61de8bac782d0928e4313bd59037051e6691e85e692c2a22bbaafbe555742bca7a8"
-    b"1fae4933e332df317b7f3551c7e91211d6a33c38c4b85a4b46d769b3028201003884497a00a4f5d6"
-    b"d63af9b830fe06744ff926512345ba2ce49280f4debb858799d5e4450e4798fa2251d54cbabb20d3"
-    b"2bf5fff5cc20d01f173b6cc467a9713ae849c11adc29f2ae90874c6e3b74eed42494d90afb7e0f31"
-    b"d323a23a181e4636f345af99bb371df01805b49b11186c6ec6daafcd08e5aeb99d268e05e5b65d42"
-    b"dd914c194841cacfaa24726594edf7e43c3f204ea8c85c9bf806a66efb097302b514773dc41324c6"
-    b"400f1e1b5180ed49d58cb6600fdc143a2ecf8e9ba84d8451502de890e6771181f981a9a782475aa2"
-    b"bb3ecbbc76503e0530e28b676a5e6585d114b63021b4c4afae82a74cadb1cbe61a7e393ff975a942"
-    b"1edebb531f51618902820100214d9f1efa774b9d4e0a996442c2744560c84b133045b1af9241d60f"
-    b"c2f82043ac169dc9496ebb5f26b5cb8a6636c57d44e06843bf1f082be42fe5933a7ab7a6878dccf3"
-    b"58606a9fd6984ea525fe34f9e86f7bae33e707be0dec8fbef2deed253c822f6b812e7bd8c64bc302"
-    b"5c9a9e58811d30981a329f7b130148b0eb2ac62cec516942f7530963edab832bd0bacf344b183b9d"
-    b"ba9d54535dceff640f94d79599edf8dd0c32029950ede63f2f579b0d3c9a13c04df73fec03c4bcbe"
-    b"ff7ecf69ba082445673a263685475b91390963e2d42705ba89ff107e96bbb7a887daa016f282f1e6"
-    b"bdd7b9bb14579166f8c13be876cdef07e13c6ef08ff49d4207c7c7ff"
-)
+with open(keyfile, "rb") as kf:
+    key = kf.read()
 
 
 # Server
@@ -146,7 +48,9 @@ def instance1():
     multitest.next()
     s = socket.socket()
     s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
-    s = ssl.wrap_socket(s, cert_reqs=ssl.CERT_REQUIRED, cadata=cert)
+    s = ssl.wrap_socket(
+        s, cert_reqs=ssl.CERT_REQUIRED, server_hostname="micropython.local", cadata=cadata
+    )
     s.write(b"client to server")
     print(s.read(16))
     s.close()
diff --git a/tests/multi_net/sslcontext_check_hostname_error.py b/tests/multi_net/sslcontext_check_hostname_error.py
new file mode 100644
index 0000000000..94bd472767
--- /dev/null
+++ b/tests/multi_net/sslcontext_check_hostname_error.py
@@ -0,0 +1,59 @@
+# Test creating an SSL connection when server_hostname is required but not specified.
+
+try:
+    import os
+    import socket
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+# Server
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    s = socket.socket()
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    s.listen(1)
+    multitest.next()
+    s2, _ = s.accept()
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    multitest.broadcast("ready")
+    try:
+        s2 = server_ctx.wrap_socket(s2, server_side=True)
+    except Exception as e:
+        print(e)
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket()
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    # The client will reject the SSL connection so wait until the server is ready
+    # so that it can see the rejection (otherwise it sees a closed socket).
+    multitest.wait("ready")
+    try:
+        s = client_ctx.wrap_socket(s)
+    except Exception as e:
+        print(e)
+    s.close()
diff --git a/tests/multi_net/sslcontext_check_hostname_error.py.exp b/tests/multi_net/sslcontext_check_hostname_error.py.exp
new file mode 100644
index 0000000000..d29279f860
--- /dev/null
+++ b/tests/multi_net/sslcontext_check_hostname_error.py.exp
@@ -0,0 +1,4 @@
+--- instance0 ---
+(-29312, 'MBEDTLS_ERR_SSL_CONN_EOF')
+--- instance1 ---
+CERT_REQUIRED requires server_hostname
diff --git a/tests/multi_net/sslcontext_getpeercert.py b/tests/multi_net/sslcontext_getpeercert.py
new file mode 100644
index 0000000000..b95b13f0fc
--- /dev/null
+++ b/tests/multi_net/sslcontext_getpeercert.py
@@ -0,0 +1,55 @@
+# Test creating an SSL connection and getting the peer certificate.
+
+try:
+    import os
+    import socket
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+# Server
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    s = socket.socket()
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    s.listen(1)
+    multitest.next()
+    s2, _ = s.accept()
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    s2 = server_ctx.wrap_socket(s2, server_side=True)
+    print(s2.read(16))
+    s2.write(b"server to client")
+    s2.close()
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket()
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    s = client_ctx.wrap_socket(s, server_hostname="micropython.local")
+    print(s.getpeercert(True))
+    s.write(b"client to server")
+    print(s.read(16))
+    s.close()
diff --git a/tests/multi_net/sslcontext_getpeercert.py.exp b/tests/multi_net/sslcontext_getpeercert.py.exp
new file mode 100644
index 0000000000..24ab0883e3
--- /dev/null
+++ b/tests/multi_net/sslcontext_getpeercert.py.exp
@@ -0,0 +1,5 @@
+--- instance0 ---
+b'client to server'
+--- instance1 ---
+None
+b'server to client'
diff --git a/tests/multi_net/sslcontext_server_client.py b/tests/multi_net/sslcontext_server_client.py
new file mode 100644
index 0000000000..4d2ac06c58
--- /dev/null
+++ b/tests/multi_net/sslcontext_server_client.py
@@ -0,0 +1,60 @@
+# Test creating an SSL connection with certificates as bytes objects.
+
+try:
+    import os
+    import socket
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+certfile = "multi_net/rsa_cert.der"
+keyfile = "multi_net/rsa_key.der"
+
+try:
+    os.stat(certfile)
+    os.stat(keyfile)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+with open(certfile, "rb") as cf:
+    cert = cadata = cf.read()
+
+with open(keyfile, "rb") as kf:
+    key = kf.read()
+
+
+# Server
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    s = socket.socket()
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    s.listen(1)
+    multitest.next()
+    s2, _ = s.accept()
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    s2 = server_ctx.wrap_socket(s2, server_side=True)
+    print(s2.read(16))
+    s2.write(b"server to client")
+    s2.close()
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket()
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cadata=cadata)
+    s = client_ctx.wrap_socket(s, server_hostname="micropython.local")
+    s.write(b"client to server")
+    print(s.read(16))
+    s.close()
diff --git a/tests/multi_net/sslcontext_server_client.py.exp b/tests/multi_net/sslcontext_server_client.py.exp
new file mode 100644
index 0000000000..909c496d01
--- /dev/null
+++ b/tests/multi_net/sslcontext_server_client.py.exp
@@ -0,0 +1,4 @@
+--- instance0 ---
+b'client to server'
+--- instance1 ---
+b'server to client'
diff --git a/tests/multi_net/sslcontext_server_client_ciphers.py b/tests/multi_net/sslcontext_server_client_ciphers.py
new file mode 100644
index 0000000000..e2de4e6ad4
--- /dev/null
+++ b/tests/multi_net/sslcontext_server_client_ciphers.py
@@ -0,0 +1,58 @@
+# Test creating an SSL connection with specified ciphers.
+
+try:
+    import os
+    import socket
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+# Server
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    s = socket.socket()
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    s.listen(1)
+    multitest.next()
+    s2, _ = s.accept()
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    s2 = server_ctx.wrap_socket(s2, server_side=True)
+    assert isinstance(s2.cipher(), tuple)
+    print(s2.read(16))
+    s2.write(b"server to client")
+    s2.close()
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket()
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    ciphers = client_ctx.get_ciphers()
+    assert "TLS-RSA-WITH-AES-256-CBC-SHA256" in ciphers
+    client_ctx.set_ciphers(["TLS-RSA-WITH-AES-256-CBC-SHA256"])
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    s = client_ctx.wrap_socket(s, server_hostname="micropython.local")
+    s.write(b"client to server")
+    print(s.read(16))
+    s.close()
diff --git a/tests/multi_net/sslcontext_server_client_ciphers.py.exp b/tests/multi_net/sslcontext_server_client_ciphers.py.exp
new file mode 100644
index 0000000000..909c496d01
--- /dev/null
+++ b/tests/multi_net/sslcontext_server_client_ciphers.py.exp
@@ -0,0 +1,4 @@
+--- instance0 ---
+b'client to server'
+--- instance1 ---
+b'server to client'
diff --git a/tests/multi_net/sslcontext_server_client_files.py b/tests/multi_net/sslcontext_server_client_files.py
new file mode 100644
index 0000000000..2c8af21d23
--- /dev/null
+++ b/tests/multi_net/sslcontext_server_client_files.py
@@ -0,0 +1,54 @@
+# Test creating an SSL connection with certificates from a file.
+
+try:
+    import os
+    import socket
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+# Server
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    s = socket.socket()
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    s.listen(1)
+    multitest.next()
+    s2, _ = s.accept()
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    s2 = server_ctx.wrap_socket(s2, server_side=True)
+    print(s2.read(16))
+    s2.write(b"server to client")
+    s2.close()
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket()
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    s = client_ctx.wrap_socket(s, server_hostname="micropython.local")
+    s.write(b"client to server")
+    print(s.read(16))
+    s.close()
diff --git a/tests/multi_net/sslcontext_server_client_files.py.exp b/tests/multi_net/sslcontext_server_client_files.py.exp
new file mode 100644
index 0000000000..909c496d01
--- /dev/null
+++ b/tests/multi_net/sslcontext_server_client_files.py.exp
@@ -0,0 +1,4 @@
+--- instance0 ---
+b'client to server'
+--- instance1 ---
+b'server to client'
diff --git a/tests/multi_net/sslcontext_verify_error.py b/tests/multi_net/sslcontext_verify_error.py
new file mode 100644
index 0000000000..4feb4ce983
--- /dev/null
+++ b/tests/multi_net/sslcontext_verify_error.py
@@ -0,0 +1,58 @@
+# Test creating an SSL connection with an invalid certificate.
+
+try:
+    import os
+    import socket
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+# Server
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    s = socket.socket()
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    s.listen(1)
+    multitest.next()
+    s2, _ = s.accept()
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    try:
+        s2 = server_ctx.wrap_socket(s2, server_side=True)
+    except Exception as e:
+        print(e)
+    multitest.broadcast("finished")
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket()
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    try:
+        s = client_ctx.wrap_socket(s, server_hostname="foobar.local")
+    except Exception as e:
+        print(e)
+    # Don't close the socket until the server has seen our SSL rejection.
+    multitest.wait("finished")
+    s.close()
diff --git a/tests/multi_net/sslcontext_verify_error.py.exp b/tests/multi_net/sslcontext_verify_error.py.exp
new file mode 100644
index 0000000000..900c7c2308
--- /dev/null
+++ b/tests/multi_net/sslcontext_verify_error.py.exp
@@ -0,0 +1,6 @@
+--- instance0 ---
+(-30592, 'MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE')
+--- instance1 ---
+
+The certificate Common Name (CN) does not match with the expected CN
+
diff --git a/tests/multi_net/sslcontext_verify_time_error.py b/tests/multi_net/sslcontext_verify_time_error.py
new file mode 100644
index 0000000000..36711acfc8
--- /dev/null
+++ b/tests/multi_net/sslcontext_verify_time_error.py
@@ -0,0 +1,58 @@
+# Test creating an SSL connection with an expired certificate.
+
+try:
+    import os
+    import socket
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/expired_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+# Server
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    s = socket.socket()
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    s.listen(1)
+    multitest.next()
+    s2, _ = s.accept()
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    try:
+        s2 = server_ctx.wrap_socket(s2, server_side=True)
+    except Exception as e:
+        print(e)
+    multitest.broadcast("finished")
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket()
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    try:
+        s = client_ctx.wrap_socket(s, server_hostname="micropython.local")
+    except Exception as e:
+        print(e)
+    # Don't close the socket until the server has seen our SSL rejection.
+    multitest.wait("finished")
+    s.close()
diff --git a/tests/multi_net/sslcontext_verify_time_error.py.exp b/tests/multi_net/sslcontext_verify_time_error.py.exp
new file mode 100644
index 0000000000..25f754c97e
--- /dev/null
+++ b/tests/multi_net/sslcontext_verify_time_error.py.exp
@@ -0,0 +1,6 @@
+--- instance0 ---
+(-30592, 'MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE')
+--- instance1 ---
+
+The certificate validity has expired
+
diff --git a/tests/net_inet/mpycert.der b/tests/net_inet/mpycert.der
new file mode 100644
index 0000000000000000000000000000000000000000..2d66ea723ea4f983874b3ffacdf612bd90e150d7
GIT binary patch
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zV*dIzaAEgtQ6^?a2FArrj2yraVKLwX2B<7QBjbM-7GNT1Gmr)GRarnG&7sZ4$jZvj
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z1SSt|px;;+o9+X>0^%a4a^@zWr&>?>x!W!N-s;l2=W2SzrWwg=OMT_0*&3%7h3Gae
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zak{(Ne|WiJ`+p7J45Mr5adMf9C-3+=w_Bh4Qjqhqe53GGU!%tR7QwBtb+KuhuXfyh
uGIi_Otzkk=XOH+DQ?+mj$bEB;AyneuOV5-mey66-*%E!Ac*W`+?uP)U>;Po|

literal 0
HcmV?d00001

diff --git a/tests/net_inet/test_sslcontext_client.py b/tests/net_inet/test_sslcontext_client.py
new file mode 100644
index 0000000000..860b053d5b
--- /dev/null
+++ b/tests/net_inet/test_sslcontext_client.py
@@ -0,0 +1,52 @@
+import os
+import socket
+import ssl
+
+# This certificate was obtained from micropython.org using openssl:
+# $ openssl s_client -showcerts -connect micropython.org:443 </dev/null 2>/dev/null
+# The certificate is from Let's Encrypt:
+# 1 s:/C=US/O=Let's Encrypt/CN=R3
+#   i:/C=US/O=Internet Security Research Group/CN=ISRG Root X1
+# Validity
+#            Not Before: Sep  4 00:00:00 2020 GMT
+#            Not After : Sep 15 16:00:00 2025 GMT
+# Copy PEM content to a file (certmpy.pem) and convert to DER e.g.
+# $ openssl x509 -in certmpy.pem -out certmpy.der -outform DER
+# Then convert to hex format, eg using binascii.hexlify(data).
+
+
+ca_cert_chain = "mpycert.der"
+try:
+    os.stat(ca_cert_chain)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+def main(use_stream=True):
+    context = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+
+    context.verify_mode = ssl.CERT_REQUIRED
+    assert context.verify_mode == ssl.CERT_REQUIRED
+
+    context.load_verify_locations(cafile=ca_cert_chain)
+
+    s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
+    addr = socket.getaddrinfo("micropython.org", 443)[0][-1]
+
+    # CPython can wrap the socket even if not connected yet.
+    # ssl_sock = context.wrap_socket(s, server_hostname='micropython.org')
+    # ssl_sock.connect(addr)
+
+    # MicroPython needs to connect first, CPython can do this too.
+    s.connect(addr)
+    # server_hostname must match CN (Common Name) in the certificate
+    # presented by the server
+    ssl_sock = context.wrap_socket(s, server_hostname="micropython.org")
+    ssl_sock.write(b"GET / HTTP/1.0\r\n\r\n")
+    print(ssl_sock.read(17))
+    assert isinstance(ssl_sock.cipher(), tuple)
+    ssl_sock.close()
+
+
+main()
diff --git a/tests/net_inet/test_sslcontext_client.py.exp b/tests/net_inet/test_sslcontext_client.py.exp
new file mode 100644
index 0000000000..fb69ecf1a6
--- /dev/null
+++ b/tests/net_inet/test_sslcontext_client.py.exp
@@ -0,0 +1 @@
+b'HTTP/1.1 200 OK\r\n'

From 58e75264c195438c14917485283b7b2f135067f1 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 12 Dec 2023 16:03:20 +1100
Subject: [PATCH 249/310] lib/mbedtls_errors: Update error list for latest
 esp32 mbedtls.

Running `./do-esp32.sh` now generates this esp32_mbedtls_errors.c file,
with IDF v5.0.4.

Signed-off-by: Damien George <damien@micropython.org>
---
 lib/mbedtls_errors/esp32_mbedtls_errors.c | 191 +++++++---------------
 1 file changed, 63 insertions(+), 128 deletions(-)

diff --git a/lib/mbedtls_errors/esp32_mbedtls_errors.c b/lib/mbedtls_errors/esp32_mbedtls_errors.c
index c56f8a19ff..5d89d15b4d 100644
--- a/lib/mbedtls_errors/esp32_mbedtls_errors.c
+++ b/lib/mbedtls_errors/esp32_mbedtls_errors.c
@@ -45,10 +45,6 @@
 #include "mbedtls/aes.h"
 #endif
 
-#if defined(MBEDTLS_ARC4_C)
-#include "mbedtls/arc4.h"
-#endif
-
 #if defined(MBEDTLS_ARIA_C)
 #include "mbedtls/aria.h"
 #endif
@@ -65,10 +61,6 @@
 #include "mbedtls/bignum.h"
 #endif
 
-#if defined(MBEDTLS_BLOWFISH_C)
-#include "mbedtls/blowfish.h"
-#endif
-
 #if defined(MBEDTLS_CAMELLIA_C)
 #include "mbedtls/camellia.h"
 #endif
@@ -89,10 +81,6 @@
 #include "mbedtls/cipher.h"
 #endif
 
-#if defined(MBEDTLS_CMAC_C)
-#include "mbedtls/cmac.h"
-#endif
-
 #if defined(MBEDTLS_CTR_DRBG_C)
 #include "mbedtls/ctr_drbg.h"
 #endif
@@ -113,6 +101,14 @@
 #include "mbedtls/entropy.h"
 #endif
 
+#if defined(MBEDTLS_ERROR_C)
+#include "mbedtls/error.h"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_C)
+#include "mbedtls/platform.h"
+#endif
+
 #if defined(MBEDTLS_GCM_C)
 #include "mbedtls/gcm.h"
 #endif
@@ -125,22 +121,14 @@
 #include "mbedtls/hmac_drbg.h"
 #endif
 
+#if defined(MBEDTLS_LMS_C)
+#include "mbedtls/lms.h"
+#endif
+
 #if defined(MBEDTLS_MD_C)
 #include "mbedtls/md.h"
 #endif
 
-#if defined(MBEDTLS_MD2_C)
-#include "mbedtls/md2.h"
-#endif
-
-#if defined(MBEDTLS_MD4_C)
-#include "mbedtls/md4.h"
-#endif
-
-#if defined(MBEDTLS_MD5_C)
-#include "mbedtls/md5.h"
-#endif
-
 #if defined(MBEDTLS_NET_C)
 #include "mbedtls/net_sockets.h"
 #endif
@@ -149,10 +137,6 @@
 #include "mbedtls/oid.h"
 #endif
 
-#if defined(MBEDTLS_PADLOCK_C)
-#include "mbedtls/padlock.h"
-#endif
-
 #if defined(MBEDTLS_PEM_PARSE_C) || defined(MBEDTLS_PEM_WRITE_C)
 #include "mbedtls/pem.h"
 #endif
@@ -169,18 +153,14 @@
 #include "mbedtls/pkcs5.h"
 #endif
 
-#if defined(MBEDTLS_PLATFORM_C)
-#include "mbedtls/platform.h"
+#if defined(MBEDTLS_PKCS7_C)
+#include "mbedtls/pkcs7.h"
 #endif
 
 #if defined(MBEDTLS_POLY1305_C)
 #include "mbedtls/poly1305.h"
 #endif
 
-#if defined(MBEDTLS_RIPEMD160_C)
-#include "mbedtls/ripemd160.h"
-#endif
-
 #if defined(MBEDTLS_RSA_C)
 #include "mbedtls/rsa.h"
 #endif
@@ -209,10 +189,6 @@
 #include "mbedtls/x509.h"
 #endif
 
-#if defined(MBEDTLS_XTEA_C)
-#include "mbedtls/xtea.h"
-#endif
-
 
 // Error code table type
 struct ssl_errs {
@@ -231,7 +207,6 @@ static const struct ssl_errs mbedtls_high_level_error_tab[] = {
         { -(MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED), "CIPHER_FULL_BLOCK_EXPECTED" },
         { -(MBEDTLS_ERR_CIPHER_AUTH_FAILED), "CIPHER_AUTH_FAILED" },
         { -(MBEDTLS_ERR_CIPHER_INVALID_CONTEXT), "CIPHER_INVALID_CONTEXT" },
-        { -(MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED), "CIPHER_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_CIPHER_C */
 
 #if defined(MBEDTLS_DHM_C)
@@ -244,7 +219,6 @@ static const struct ssl_errs mbedtls_high_level_error_tab[] = {
         { -(MBEDTLS_ERR_DHM_INVALID_FORMAT), "DHM_INVALID_FORMAT" },
         { -(MBEDTLS_ERR_DHM_ALLOC_FAILED), "DHM_ALLOC_FAILED" },
         { -(MBEDTLS_ERR_DHM_FILE_IO_ERROR), "DHM_FILE_IO_ERROR" },
-        { -(MBEDTLS_ERR_DHM_HW_ACCEL_FAILED), "DHM_HW_ACCEL_FAILED" },
         { -(MBEDTLS_ERR_DHM_SET_GROUP_FAILED), "DHM_SET_GROUP_FAILED" },
 #endif /* MBEDTLS_DHM_C */
 
@@ -257,7 +231,6 @@ static const struct ssl_errs mbedtls_high_level_error_tab[] = {
         { -(MBEDTLS_ERR_ECP_RANDOM_FAILED), "ECP_RANDOM_FAILED" },
         { -(MBEDTLS_ERR_ECP_INVALID_KEY), "ECP_INVALID_KEY" },
         { -(MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH), "ECP_SIG_LEN_MISMATCH" },
-        { -(MBEDTLS_ERR_ECP_HW_ACCEL_FAILED), "ECP_HW_ACCEL_FAILED" },
         { -(MBEDTLS_ERR_ECP_IN_PROGRESS), "ECP_IN_PROGRESS" },
 #endif /* MBEDTLS_ECP_C */
 
@@ -266,7 +239,6 @@ static const struct ssl_errs mbedtls_high_level_error_tab[] = {
         { -(MBEDTLS_ERR_MD_BAD_INPUT_DATA), "MD_BAD_INPUT_DATA" },
         { -(MBEDTLS_ERR_MD_ALLOC_FAILED), "MD_ALLOC_FAILED" },
         { -(MBEDTLS_ERR_MD_FILE_IO_ERROR), "MD_FILE_IO_ERROR" },
-        { -(MBEDTLS_ERR_MD_HW_ACCEL_FAILED), "MD_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_MD_C */
 
 #if defined(MBEDTLS_PEM_PARSE_C) || defined(MBEDTLS_PEM_WRITE_C)
@@ -296,7 +268,7 @@ static const struct ssl_errs mbedtls_high_level_error_tab[] = {
         { -(MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE), "PK_UNKNOWN_NAMED_CURVE" },
         { -(MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE), "PK_FEATURE_UNAVAILABLE" },
         { -(MBEDTLS_ERR_PK_SIG_LEN_MISMATCH), "PK_SIG_LEN_MISMATCH" },
-        { -(MBEDTLS_ERR_PK_HW_ACCEL_FAILED), "PK_HW_ACCEL_FAILED" },
+        { -(MBEDTLS_ERR_PK_BUFFER_TOO_SMALL), "PK_BUFFER_TOO_SMALL" },
 #endif /* MBEDTLS_PK_C */
 
 #if defined(MBEDTLS_PKCS12_C)
@@ -313,6 +285,21 @@ static const struct ssl_errs mbedtls_high_level_error_tab[] = {
         { -(MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH), "PKCS5_PASSWORD_MISMATCH" },
 #endif /* MBEDTLS_PKCS5_C */
 
+#if defined(MBEDTLS_PKCS7_C)
+        { -(MBEDTLS_ERR_PKCS7_INVALID_FORMAT), "PKCS7_INVALID_FORMAT" },
+        { -(MBEDTLS_ERR_PKCS7_FEATURE_UNAVAILABLE), "PKCS7_FEATURE_UNAVAILABLE" },
+        { -(MBEDTLS_ERR_PKCS7_INVALID_VERSION), "PKCS7_INVALID_VERSION" },
+        { -(MBEDTLS_ERR_PKCS7_INVALID_CONTENT_INFO), "PKCS7_INVALID_CONTENT_INFO" },
+        { -(MBEDTLS_ERR_PKCS7_INVALID_ALG), "PKCS7_INVALID_ALG" },
+        { -(MBEDTLS_ERR_PKCS7_INVALID_CERT), "PKCS7_INVALID_CERT" },
+        { -(MBEDTLS_ERR_PKCS7_INVALID_SIGNATURE), "PKCS7_INVALID_SIGNATURE" },
+        { -(MBEDTLS_ERR_PKCS7_INVALID_SIGNER_INFO), "PKCS7_INVALID_SIGNER_INFO" },
+        { -(MBEDTLS_ERR_PKCS7_BAD_INPUT_DATA), "PKCS7_BAD_INPUT_DATA" },
+        { -(MBEDTLS_ERR_PKCS7_ALLOC_FAILED), "PKCS7_ALLOC_FAILED" },
+        { -(MBEDTLS_ERR_PKCS7_VERIFY_FAIL), "PKCS7_VERIFY_FAIL" },
+        { -(MBEDTLS_ERR_PKCS7_CERT_DATE_INVALID), "PKCS7_CERT_DATE_INVALID" },
+#endif /* MBEDTLS_PKCS7_C */
+
 #if defined(MBEDTLS_RSA_C)
         { -(MBEDTLS_ERR_RSA_BAD_INPUT_DATA), "RSA_BAD_INPUT_DATA" },
         { -(MBEDTLS_ERR_RSA_INVALID_PADDING), "RSA_INVALID_PADDING" },
@@ -323,45 +310,34 @@ static const struct ssl_errs mbedtls_high_level_error_tab[] = {
         { -(MBEDTLS_ERR_RSA_VERIFY_FAILED), "RSA_VERIFY_FAILED" },
         { -(MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE), "RSA_OUTPUT_TOO_LARGE" },
         { -(MBEDTLS_ERR_RSA_RNG_FAILED), "RSA_RNG_FAILED" },
-        { -(MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION), "RSA_UNSUPPORTED_OPERATION" },
-        { -(MBEDTLS_ERR_RSA_HW_ACCEL_FAILED), "RSA_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_RSA_C */
 
 #if defined(MBEDTLS_SSL_TLS_C)
+        { -(MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS), "SSL_CRYPTO_IN_PROGRESS" },
         { -(MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE), "SSL_FEATURE_UNAVAILABLE" },
         { -(MBEDTLS_ERR_SSL_BAD_INPUT_DATA), "SSL_BAD_INPUT_DATA" },
         { -(MBEDTLS_ERR_SSL_INVALID_MAC), "SSL_INVALID_MAC" },
         { -(MBEDTLS_ERR_SSL_INVALID_RECORD), "SSL_INVALID_RECORD" },
         { -(MBEDTLS_ERR_SSL_CONN_EOF), "SSL_CONN_EOF" },
-        { -(MBEDTLS_ERR_SSL_UNKNOWN_CIPHER), "SSL_UNKNOWN_CIPHER" },
-        { -(MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN), "SSL_NO_CIPHER_CHOSEN" },
+        { -(MBEDTLS_ERR_SSL_DECODE_ERROR), "SSL_DECODE_ERROR" },
         { -(MBEDTLS_ERR_SSL_NO_RNG), "SSL_NO_RNG" },
         { -(MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE), "SSL_NO_CLIENT_CERTIFICATE" },
-        { -(MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE), "SSL_CERTIFICATE_TOO_LARGE" },
-        { -(MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED), "SSL_CERTIFICATE_REQUIRED" },
+        { -(MBEDTLS_ERR_SSL_UNSUPPORTED_EXTENSION), "SSL_UNSUPPORTED_EXTENSION" },
+        { -(MBEDTLS_ERR_SSL_NO_APPLICATION_PROTOCOL), "SSL_NO_APPLICATION_PROTOCOL" },
         { -(MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED), "SSL_PRIVATE_KEY_REQUIRED" },
         { -(MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED), "SSL_CA_CHAIN_REQUIRED" },
         { -(MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE), "SSL_UNEXPECTED_MESSAGE" },
-        { -(MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED), "SSL_PEER_VERIFY_FAILED" },
+        { -(MBEDTLS_ERR_SSL_UNRECOGNIZED_NAME), "SSL_UNRECOGNIZED_NAME" },
         { -(MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY), "SSL_PEER_CLOSE_NOTIFY" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO), "SSL_BAD_HS_CLIENT_HELLO" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO), "SSL_BAD_HS_SERVER_HELLO" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE), "SSL_BAD_HS_CERTIFICATE" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST), "SSL_BAD_HS_CERTIFICATE_REQUEST" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE), "SSL_BAD_HS_SERVER_KEY_EXCHANGE" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE), "SSL_BAD_HS_SERVER_HELLO_DONE" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE), "SSL_BAD_HS_CLIENT_KEY_EXCHANGE" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP), "SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS), "SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY), "SSL_BAD_HS_CERTIFICATE_VERIFY" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC), "SSL_BAD_HS_CHANGE_CIPHER_SPEC" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_FINISHED), "SSL_BAD_HS_FINISHED" },
+        { -(MBEDTLS_ERR_SSL_BAD_CERTIFICATE), "SSL_BAD_CERTIFICATE" },
+        { -(MBEDTLS_ERR_SSL_RECEIVED_NEW_SESSION_TICKET), "SSL_RECEIVED_NEW_SESSION_TICKET" },
+        { -(MBEDTLS_ERR_SSL_CANNOT_READ_EARLY_DATA), "SSL_CANNOT_READ_EARLY_DATA" },
+        { -(MBEDTLS_ERR_SSL_CANNOT_WRITE_EARLY_DATA), "SSL_CANNOT_WRITE_EARLY_DATA" },
         { -(MBEDTLS_ERR_SSL_ALLOC_FAILED), "SSL_ALLOC_FAILED" },
         { -(MBEDTLS_ERR_SSL_HW_ACCEL_FAILED), "SSL_HW_ACCEL_FAILED" },
         { -(MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH), "SSL_HW_ACCEL_FALLTHROUGH" },
-        { -(MBEDTLS_ERR_SSL_COMPRESSION_FAILED), "SSL_COMPRESSION_FAILED" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION), "SSL_BAD_HS_PROTOCOL_VERSION" },
-        { -(MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET), "SSL_BAD_HS_NEW_SESSION_TICKET" },
+        { -(MBEDTLS_ERR_SSL_BAD_PROTOCOL_VERSION), "SSL_BAD_PROTOCOL_VERSION" },
+        { -(MBEDTLS_ERR_SSL_HANDSHAKE_FAILURE), "SSL_HANDSHAKE_FAILURE" },
         { -(MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED), "SSL_SESSION_TICKET_EXPIRED" },
         { -(MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH), "SSL_PK_TYPE_MISMATCH" },
         { -(MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY), "SSL_UNKNOWN_IDENTITY" },
@@ -370,18 +346,18 @@ static const struct ssl_errs mbedtls_high_level_error_tab[] = {
         { -(MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO), "SSL_WAITING_SERVER_HELLO_RENEGO" },
         { -(MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED), "SSL_HELLO_VERIFY_REQUIRED" },
         { -(MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL), "SSL_BUFFER_TOO_SMALL" },
-        { -(MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE), "SSL_NO_USABLE_CIPHERSUITE" },
         { -(MBEDTLS_ERR_SSL_WANT_READ), "SSL_WANT_READ" },
         { -(MBEDTLS_ERR_SSL_WANT_WRITE), "SSL_WANT_WRITE" },
         { -(MBEDTLS_ERR_SSL_TIMEOUT), "SSL_TIMEOUT" },
         { -(MBEDTLS_ERR_SSL_CLIENT_RECONNECT), "SSL_CLIENT_RECONNECT" },
         { -(MBEDTLS_ERR_SSL_UNEXPECTED_RECORD), "SSL_UNEXPECTED_RECORD" },
         { -(MBEDTLS_ERR_SSL_NON_FATAL), "SSL_NON_FATAL" },
-        { -(MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH), "SSL_INVALID_VERIFY_HASH" },
+        { -(MBEDTLS_ERR_SSL_ILLEGAL_PARAMETER), "SSL_ILLEGAL_PARAMETER" },
         { -(MBEDTLS_ERR_SSL_CONTINUE_PROCESSING), "SSL_CONTINUE_PROCESSING" },
         { -(MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS), "SSL_ASYNC_IN_PROGRESS" },
         { -(MBEDTLS_ERR_SSL_EARLY_MESSAGE), "SSL_EARLY_MESSAGE" },
-        { -(MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS), "SSL_CRYPTO_IN_PROGRESS" },
+        { -(MBEDTLS_ERR_SSL_UNEXPECTED_CID), "SSL_UNEXPECTED_CID" },
+        { -(MBEDTLS_ERR_SSL_VERSION_MISMATCH), "SSL_VERSION_MISMATCH" },
         { -(MBEDTLS_ERR_SSL_BAD_CONFIG), "SSL_BAD_CONFIG" },
 #endif /* MBEDTLS_SSL_TLS_C */
 
@@ -418,19 +394,11 @@ static const struct ssl_errs mbedtls_low_level_error_tab[] = {
     { -(MBEDTLS_ERR_AES_INVALID_KEY_LENGTH), "AES_INVALID_KEY_LENGTH" },
     { -(MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH), "AES_INVALID_INPUT_LENGTH" },
     { -(MBEDTLS_ERR_AES_BAD_INPUT_DATA), "AES_BAD_INPUT_DATA" },
-    { -(MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE), "AES_FEATURE_UNAVAILABLE" },
-    { -(MBEDTLS_ERR_AES_HW_ACCEL_FAILED), "AES_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_AES_C */
 
-#if defined(MBEDTLS_ARC4_C)
-    { -(MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED), "ARC4_HW_ACCEL_FAILED" },
-#endif /* MBEDTLS_ARC4_C */
-
 #if defined(MBEDTLS_ARIA_C)
     { -(MBEDTLS_ERR_ARIA_BAD_INPUT_DATA), "ARIA_BAD_INPUT_DATA" },
     { -(MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH), "ARIA_INVALID_INPUT_LENGTH" },
-    { -(MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE), "ARIA_FEATURE_UNAVAILABLE" },
-    { -(MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED), "ARIA_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_ARIA_C */
 
 #if defined(MBEDTLS_ASN1_PARSE_C)
@@ -459,28 +427,18 @@ static const struct ssl_errs mbedtls_low_level_error_tab[] = {
     { -(MBEDTLS_ERR_MPI_ALLOC_FAILED), "MPI_ALLOC_FAILED" },
 #endif /* MBEDTLS_BIGNUM_C */
 
-#if defined(MBEDTLS_BLOWFISH_C)
-    { -(MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA), "BLOWFISH_BAD_INPUT_DATA" },
-    { -(MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH), "BLOWFISH_INVALID_INPUT_LENGTH" },
-    { -(MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED), "BLOWFISH_HW_ACCEL_FAILED" },
-#endif /* MBEDTLS_BLOWFISH_C */
-
 #if defined(MBEDTLS_CAMELLIA_C)
     { -(MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA), "CAMELLIA_BAD_INPUT_DATA" },
     { -(MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH), "CAMELLIA_INVALID_INPUT_LENGTH" },
-    { -(MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED), "CAMELLIA_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_CAMELLIA_C */
 
 #if defined(MBEDTLS_CCM_C)
     { -(MBEDTLS_ERR_CCM_BAD_INPUT), "CCM_BAD_INPUT" },
     { -(MBEDTLS_ERR_CCM_AUTH_FAILED), "CCM_AUTH_FAILED" },
-    { -(MBEDTLS_ERR_CCM_HW_ACCEL_FAILED), "CCM_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_CCM_C */
 
 #if defined(MBEDTLS_CHACHA20_C)
     { -(MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA), "CHACHA20_BAD_INPUT_DATA" },
-    { -(MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE), "CHACHA20_FEATURE_UNAVAILABLE" },
-    { -(MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED), "CHACHA20_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_CHACHA20_C */
 
 #if defined(MBEDTLS_CHACHAPOLY_C)
@@ -488,10 +446,6 @@ static const struct ssl_errs mbedtls_low_level_error_tab[] = {
     { -(MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED), "CHACHAPOLY_AUTH_FAILED" },
 #endif /* MBEDTLS_CHACHAPOLY_C */
 
-#if defined(MBEDTLS_CMAC_C)
-    { -(MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED), "CMAC_HW_ACCEL_FAILED" },
-#endif /* MBEDTLS_CMAC_C */
-
 #if defined(MBEDTLS_CTR_DRBG_C)
     { -(MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED), "CTR_DRBG_ENTROPY_SOURCE_FAILED" },
     { -(MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG), "CTR_DRBG_REQUEST_TOO_BIG" },
@@ -501,7 +455,6 @@ static const struct ssl_errs mbedtls_low_level_error_tab[] = {
 
 #if defined(MBEDTLS_DES_C)
     { -(MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH), "DES_INVALID_INPUT_LENGTH" },
-    { -(MBEDTLS_ERR_DES_HW_ACCEL_FAILED), "DES_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_DES_C */
 
 #if defined(MBEDTLS_ENTROPY_C)
@@ -512,10 +465,20 @@ static const struct ssl_errs mbedtls_low_level_error_tab[] = {
     { -(MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR), "ENTROPY_FILE_IO_ERROR" },
 #endif /* MBEDTLS_ENTROPY_C */
 
+#if defined(MBEDTLS_ERROR_C)
+    { -(MBEDTLS_ERR_ERROR_GENERIC_ERROR), "ERROR_GENERIC_ERROR" },
+    { -(MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED), "ERROR_CORRUPTION_DETECTED" },
+#endif /* MBEDTLS_ERROR_C */
+
+#if defined(MBEDTLS_PLATFORM_C)
+    { -(MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED), "PLATFORM_HW_ACCEL_FAILED" },
+    { -(MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED), "PLATFORM_FEATURE_UNSUPPORTED" },
+#endif /* MBEDTLS_PLATFORM_C */
+
 #if defined(MBEDTLS_GCM_C)
     { -(MBEDTLS_ERR_GCM_AUTH_FAILED), "GCM_AUTH_FAILED" },
-    { -(MBEDTLS_ERR_GCM_HW_ACCEL_FAILED), "GCM_HW_ACCEL_FAILED" },
     { -(MBEDTLS_ERR_GCM_BAD_INPUT), "GCM_BAD_INPUT" },
+    { -(MBEDTLS_ERR_GCM_BUFFER_TOO_SMALL), "GCM_BUFFER_TOO_SMALL" },
 #endif /* MBEDTLS_GCM_C */
 
 #if defined(MBEDTLS_HKDF_C)
@@ -529,17 +492,13 @@ static const struct ssl_errs mbedtls_low_level_error_tab[] = {
     { -(MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED), "HMAC_DRBG_ENTROPY_SOURCE_FAILED" },
 #endif /* MBEDTLS_HMAC_DRBG_C */
 
-#if defined(MBEDTLS_MD2_C)
-    { -(MBEDTLS_ERR_MD2_HW_ACCEL_FAILED), "MD2_HW_ACCEL_FAILED" },
-#endif /* MBEDTLS_MD2_C */
-
-#if defined(MBEDTLS_MD4_C)
-    { -(MBEDTLS_ERR_MD4_HW_ACCEL_FAILED), "MD4_HW_ACCEL_FAILED" },
-#endif /* MBEDTLS_MD4_C */
-
-#if defined(MBEDTLS_MD5_C)
-    { -(MBEDTLS_ERR_MD5_HW_ACCEL_FAILED), "MD5_HW_ACCEL_FAILED" },
-#endif /* MBEDTLS_MD5_C */
+#if defined(MBEDTLS_LMS_C)
+    { -(MBEDTLS_ERR_LMS_BAD_INPUT_DATA), "LMS_BAD_INPUT_DATA" },
+    { -(MBEDTLS_ERR_LMS_OUT_OF_PRIVATE_KEYS), "LMS_OUT_OF_PRIVATE_KEYS" },
+    { -(MBEDTLS_ERR_LMS_VERIFY_FAILED), "LMS_VERIFY_FAILED" },
+    { -(MBEDTLS_ERR_LMS_ALLOC_FAILED), "LMS_ALLOC_FAILED" },
+    { -(MBEDTLS_ERR_LMS_BUFFER_TOO_SMALL), "LMS_BUFFER_TOO_SMALL" },
+#endif /* MBEDTLS_LMS_C */
 
 #if defined(MBEDTLS_NET_C)
     { -(MBEDTLS_ERR_NET_SOCKET_FAILED), "NET_SOCKET_FAILED" },
@@ -562,50 +521,26 @@ static const struct ssl_errs mbedtls_low_level_error_tab[] = {
     { -(MBEDTLS_ERR_OID_BUF_TOO_SMALL), "OID_BUF_TOO_SMALL" },
 #endif /* MBEDTLS_OID_C */
 
-#if defined(MBEDTLS_PADLOCK_C)
-    { -(MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED), "PADLOCK_DATA_MISALIGNED" },
-#endif /* MBEDTLS_PADLOCK_C */
-
-#if defined(MBEDTLS_PLATFORM_C)
-    { -(MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED), "PLATFORM_HW_ACCEL_FAILED" },
-    { -(MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED), "PLATFORM_FEATURE_UNSUPPORTED" },
-#endif /* MBEDTLS_PLATFORM_C */
-
 #if defined(MBEDTLS_POLY1305_C)
     { -(MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA), "POLY1305_BAD_INPUT_DATA" },
-    { -(MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE), "POLY1305_FEATURE_UNAVAILABLE" },
-    { -(MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED), "POLY1305_HW_ACCEL_FAILED" },
 #endif /* MBEDTLS_POLY1305_C */
 
-#if defined(MBEDTLS_RIPEMD160_C)
-    { -(MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED), "RIPEMD160_HW_ACCEL_FAILED" },
-#endif /* MBEDTLS_RIPEMD160_C */
-
 #if defined(MBEDTLS_SHA1_C)
-    { -(MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED), "SHA1_HW_ACCEL_FAILED" },
     { -(MBEDTLS_ERR_SHA1_BAD_INPUT_DATA), "SHA1_BAD_INPUT_DATA" },
 #endif /* MBEDTLS_SHA1_C */
 
 #if defined(MBEDTLS_SHA256_C)
-    { -(MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED), "SHA256_HW_ACCEL_FAILED" },
     { -(MBEDTLS_ERR_SHA256_BAD_INPUT_DATA), "SHA256_BAD_INPUT_DATA" },
 #endif /* MBEDTLS_SHA256_C */
 
 #if defined(MBEDTLS_SHA512_C)
-    { -(MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED), "SHA512_HW_ACCEL_FAILED" },
     { -(MBEDTLS_ERR_SHA512_BAD_INPUT_DATA), "SHA512_BAD_INPUT_DATA" },
 #endif /* MBEDTLS_SHA512_C */
 
 #if defined(MBEDTLS_THREADING_C)
-    { -(MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE), "THREADING_FEATURE_UNAVAILABLE" },
     { -(MBEDTLS_ERR_THREADING_BAD_INPUT_DATA), "THREADING_BAD_INPUT_DATA" },
     { -(MBEDTLS_ERR_THREADING_MUTEX_ERROR), "THREADING_MUTEX_ERROR" },
 #endif /* MBEDTLS_THREADING_C */
-
-#if defined(MBEDTLS_XTEA_C)
-    { -(MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH), "XTEA_INVALID_INPUT_LENGTH" },
-    { -(MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED), "XTEA_HW_ACCEL_FAILED" },
-#endif /* MBEDTLS_XTEA_C */
 // END generated code
 };
 
@@ -655,7 +590,7 @@ void mbedtls_strerror(int ret, char *buf, size_t buflen) {
     if (got_hl) {
         use_ret = ret & 0xFF80;
 
-        // special case
+        // special case, don't try to translate low level code
 #if defined(MBEDTLS_SSL_TLS_C)
         if (use_ret == -(MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE)) {
             strncpy(buf, "MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE", buflen);

From c9eb6bc6016a7f13cc624b6a4160599ab6b166ff Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 12 Dec 2023 16:05:03 +1100
Subject: [PATCH 250/310] esp32: Re-enable custom mbedtls error string tables.

To match other ports that use mbedtls.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp32/esp32_common.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index 71b42a590d..a3637870f4 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -42,7 +42,7 @@ list(APPEND MICROPY_SOURCE_LIB
     ${MICROPY_DIR}/lib/littlefs/lfs1_util.c
     ${MICROPY_DIR}/lib/littlefs/lfs2.c
     ${MICROPY_DIR}/lib/littlefs/lfs2_util.c
-    #${MICROPY_DIR}/lib/mbedtls_errors/esp32_mbedtls_errors.c
+    ${MICROPY_DIR}/lib/mbedtls_errors/esp32_mbedtls_errors.c
     ${MICROPY_DIR}/lib/oofatfs/ff.c
     ${MICROPY_DIR}/lib/oofatfs/ffunicode.c
 )

From ef996d15b9cbadee591a185f27fb16e90a5d4f5d Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 12 Dec 2023 17:15:24 +1100
Subject: [PATCH 251/310] extmod/modssl_mbedtls: Make SSLSocket.getpeercert()
 optional.

And only enable this method when the relevant feature is available in
mbedtls.  Otherwise, if mbedtls doesn't support getting the peer
certificate, this method always returns None and it's confusing why it does
that.  It's better to remove the method altogether, so the error trying to
use it is more obvious.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modssl_mbedtls.c                       | 4 ++++
 tests/multi_net/sslcontext_getpeercert.py     | 9 ++++++++-
 tests/multi_net/sslcontext_getpeercert.py.exp | 2 +-
 tests/net_hosted/ssl_getpeercert.py           | 7 +++++++
 4 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/extmod/modssl_mbedtls.c b/extmod/modssl_mbedtls.c
index 3d420759da..cdb4f2b088 100644
--- a/extmod/modssl_mbedtls.c
+++ b/extmod/modssl_mbedtls.c
@@ -554,6 +554,7 @@ cleanup:
     mbedtls_raise_error(ret);
 }
 
+#if defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
 STATIC mp_obj_t mod_ssl_getpeercert(mp_obj_t o_in, mp_obj_t binary_form) {
     mp_obj_ssl_socket_t *o = MP_OBJ_TO_PTR(o_in);
     if (!mp_obj_is_true(binary_form)) {
@@ -566,6 +567,7 @@ STATIC mp_obj_t mod_ssl_getpeercert(mp_obj_t o_in, mp_obj_t binary_form) {
     return mp_obj_new_bytes(peer_cert->raw.p, peer_cert->raw.len);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_ssl_getpeercert_obj, mod_ssl_getpeercert);
+#endif
 
 STATIC mp_obj_t mod_ssl_cipher(mp_obj_t o_in) {
     mp_obj_ssl_socket_t *o = MP_OBJ_TO_PTR(o_in);
@@ -726,7 +728,9 @@ STATIC const mp_rom_map_elem_t ssl_socket_locals_dict_table[] = {
     #if MICROPY_UNIX_COVERAGE
     { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&mp_stream_ioctl_obj) },
     #endif
+    #if defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
     { MP_ROM_QSTR(MP_QSTR_getpeercert), MP_ROM_PTR(&mod_ssl_getpeercert_obj) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_cipher), MP_ROM_PTR(&mod_ssl_cipher_obj) },
 };
 STATIC MP_DEFINE_CONST_DICT(ssl_socket_locals_dict, ssl_socket_locals_dict_table);
diff --git a/tests/multi_net/sslcontext_getpeercert.py b/tests/multi_net/sslcontext_getpeercert.py
index b95b13f0fc..c75a37952e 100644
--- a/tests/multi_net/sslcontext_getpeercert.py
+++ b/tests/multi_net/sslcontext_getpeercert.py
@@ -1,6 +1,7 @@
 # Test creating an SSL connection and getting the peer certificate.
 
 try:
+    import io
     import os
     import socket
     import ssl
@@ -42,6 +43,12 @@ def instance0():
 
 # Client
 def instance1():
+    s_test = ssl.wrap_socket(io.BytesIO(), server_side=True, do_handshake=False)
+    s_test.close()
+    if not hasattr(s_test, "getpeercert"):
+        print("SKIP")
+        raise SystemExit
+
     multitest.next()
     s = socket.socket()
     s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
@@ -49,7 +56,7 @@ def instance1():
     client_ctx.verify_mode = ssl.CERT_REQUIRED
     client_ctx.load_verify_locations(cafile=cafile)
     s = client_ctx.wrap_socket(s, server_hostname="micropython.local")
-    print(s.getpeercert(True))
+    print(s.getpeercert(True).hex())
     s.write(b"client to server")
     print(s.read(16))
     s.close()
diff --git a/tests/multi_net/sslcontext_getpeercert.py.exp b/tests/multi_net/sslcontext_getpeercert.py.exp
index 24ab0883e3..7b0e9d40a6 100644
--- a/tests/multi_net/sslcontext_getpeercert.py.exp
+++ b/tests/multi_net/sslcontext_getpeercert.py.exp
@@ -1,5 +1,5 @@
 --- instance0 ---
 b'client to server'
 --- instance1 ---
-None
+3082058930820371a00302010202141b3da08b15005eea265d0b57b8ba99812ab274cb300d06092a864886f70d01010b05003054310b30090603550406130241553113301106035504080c0a536f6d652d537461746531143012060355040a0c0b4d6963726f507974686f6e311a301806035504030c116d6963726f707974686f6e2e6c6f63616c301e170d3233313131393032323932375a170d3238313131373032323932375a3054310b30090603550406130241553113301106035504080c0a536f6d652d537461746531143012060355040a0c0b4d6963726f507974686f6e311a301806035504030c116d6963726f707974686f6e2e6c6f63616c30820222300d06092a864886f70d01010105000382020f003082020a0282020100deee37780ebca47e0f414ba033ebe692d2bc374a0eb1f42556bf266ad704208116ee0d8b2fd0b518074ad0981c4fd1322de81696ccea838884b06f56d3ebe49cf0561050f6f8ced5f7f4f13d086b28779a9647bbfae6c3f3ad68a5b28ee8a1ceb260d87ea300316599c4dd9f6082f89164b590df8695add518339f6730dec4f05b1ef63548329b0a48823035b23737f3303b56aa251dd8dcf0c20e6c1d291374c185ae657b349c20721c7c01a1b393c96d4c5f2bc8e2dfca7dab896e2fa84dee53d2bb6dbd1056970fa1812315e8ee9d92b3cb93e0b563d274bf07dd79600ef403b91d4ce814418b28cfaeb2b7d8401e64f6d4f39283df3204f2fe01f2fd289f5d2078d9ee2f96b6de1fd4284d9274fa38b0ad9ffcce8ffe66673be2cf304ee1b27c7cacaaf4ca76f1e84419e6e80f540add3e91cd469903e9ceb6bd2b1c33caa59acb5516ce8ac00e73d7a551bb65d39bd6af04411e81c20e6bd474d797a0bcd498e26720bd60ae4f900bb1afa59c7ac7a336273c7734ca5874ea63fb8ec787ab702041442da11a922baf5fbeb9eeea4f9f49cb1f659b561806d2169dbed07c43558c908c94e16491fe1a22cd92b8f33c1184353bdc985c88722f65e48024910f723035c0d33b789928296fb193cec6350884243b00bf51422ad09fb7012bd9cad4716803422be0d111deace913fac8cb2be1e96fa8449068430e5424bd0bd10203010001a3533051301d0603551d0e041604147d392a82ab464936fd7d74226694556a2945fd8d301f0603551d230418301680147d392a82ab464936fd7d74226694556a2945fd8d300f0603551d130101ff040530030101ff300d06092a864886f70d01010b05000382020100ae40c015e3eade8dabc84ee357ac9d694e7cd69ce4a1b265880273d16257119aa72fb2aa8b841e2899bea3e8690146f24d963a37825c93bf745447dc6ab09b5f2947671dca13b1e71f5c3e43011d74cdc688ed1215b3016071ae7235d77f79d7bb81f097bb04a08ccf400717721b29e2ea913eb23614610597deee477ed716db7e8ebe11aed39c7035f48259dfa54d88871c1f67159d52ce11eb111fa00708a7d7081c07fd92d54abbaec7ff1b50ce2f6f358857d2f55d1c7b5aa6dd66b9c3c2e654397e2d5330aca9834ff8fd749ce968c706fe3bb1b8510a379ec1910d7ece0212c34d56a2073fb7f25c88fe298568e448d03ec30b348f7d9a8836390216a6da7a8efed50dfb8c21a8531efc158e7f4398f87af18d1bd2926d08d34364bf5d85e88040dff3d3f1da6268dbc0cafa64f544c065380fa695a8d015b385aed0a1fd9ff1d7c2b28a549e04c1132b421f85a85640acac11c69416859fb9b461eeddffa92ae303b35c7233537077068de558dd02715e25aee976a97879038d2952be0d327892ab2fc78716b0d7aab4b923d5d79905f7f8b6a18c42e466fec62f84b6e5957deae0964dab8436b0e0cd4e08012661bafb9588fbfd7068fd6c08ab79101a4bdfe21d95cd0ee0aad7dd8a3ed128071c0ec2d063dc6dfa63189e51bf5d9259e776d7623f745a73f4e12e5c2b90493de1c6436b339e1400891e3e35c31057
 b'server to client'
diff --git a/tests/net_hosted/ssl_getpeercert.py b/tests/net_hosted/ssl_getpeercert.py
index 0df895a654..e0a1350fa7 100644
--- a/tests/net_hosted/ssl_getpeercert.py
+++ b/tests/net_hosted/ssl_getpeercert.py
@@ -1,8 +1,15 @@
 # test ssl.getpeercert() method
 
+import io
 import socket
 import ssl
 
+s_test = ssl.wrap_socket(io.BytesIO(), server_side=True, do_handshake=False)
+s_test.close()
+if not hasattr(s_test, "getpeercert"):
+    print("SKIP")
+    raise SystemExit
+
 
 def test(peer_addr):
     s = socket.socket()

From bba8a673d5ed6ad4404502c32dac003ad9d59bde Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 12 Dec 2023 17:17:22 +1100
Subject: [PATCH 252/310] tests: Update SSL network tests to use SSLContext,
 and work on CPython.

Changes are:
- use ssl.SSLContext.wrap_socket instead of ssl.wrap_socket
- disable check_hostname and call load_default_certs() where appropriate,
  to get CPython to run the tests correctly
- pass socket.AF_INET to getaddrinfo and socket.socket(), to force IPv4
- change tests to use github.com instead of google.com, because certificate
  validation was failing with google.com

Signed-off-by: Damien George <damien@micropython.org>
---
 tests/net_hosted/connect_nonblock_xfer.py |  9 +++----
 tests/net_inet/ssl_errors.py              | 28 ++++++++++++----------
 tests/net_inet/test_tls_nonblock.py       | 26 +++++++++++---------
 tests/net_inet/test_tls_sites.py          | 29 +++++++++++++++--------
 tests/net_inet/test_tls_sites.py.exp      |  5 ----
 tests/net_inet/tls_text_errors.py         |  8 +++++--
 6 files changed, 61 insertions(+), 44 deletions(-)
 delete mode 100644 tests/net_inet/test_tls_sites.py.exp

diff --git a/tests/net_hosted/connect_nonblock_xfer.py b/tests/net_hosted/connect_nonblock_xfer.py
index e669a5766c..dc4693cea6 100644
--- a/tests/net_hosted/connect_nonblock_xfer.py
+++ b/tests/net_hosted/connect_nonblock_xfer.py
@@ -27,11 +27,12 @@ def do_connect(peer_addr, tls, handshake):
             print("  got", er.errno)
     # wrap with ssl/tls if desired
     if tls:
+        ssl_context = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+        if hasattr(ssl_context, "check_hostname"):
+            ssl_context.check_hostname = False
+
         try:
-            if sys.implementation.name == "micropython":
-                s = ssl.wrap_socket(s, do_handshake=handshake)
-            else:
-                s = ssl.wrap_socket(s, do_handshake_on_connect=handshake)
+            s = ssl_context.wrap_socket(s, do_handshake_on_connect=handshake)
             print("wrap: True")
         except Exception as e:
             dp(e)
diff --git a/tests/net_inet/ssl_errors.py b/tests/net_inet/ssl_errors.py
index 65f3637e9e..bc4e5910bc 100644
--- a/tests/net_inet/ssl_errors.py
+++ b/tests/net_inet/ssl_errors.py
@@ -1,12 +1,12 @@
 # test that socket.connect() on a non-blocking socket raises EINPROGRESS
 # and that an immediate write/send/read/recv does the right thing
 
-import sys, errno, socket, ssl
+import sys, errno, select, socket, ssl
 
 
 def test(addr, hostname, block=True):
-    print("---", hostname or addr)
-    s = socket.socket()
+    print("---", hostname)
+    s = socket.socket(socket.AF_INET)
     s.setblocking(block)
     try:
         s.connect(addr)
@@ -16,11 +16,15 @@ def test(addr, hostname, block=True):
             raise
         print("EINPROGRESS")
 
+    if sys.implementation.name != "micropython":
+        # in CPython we have to wait, otherwise wrap_socket is not happy
+        select.select([], [s], [])
+
+    ssl_context = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    ssl_context.verify_mode = ssl.CERT_REQUIRED
+
     try:
-        if sys.implementation.name == "micropython":
-            s = ssl.wrap_socket(s, do_handshake=block)
-        else:
-            s = ssl.wrap_socket(s, do_handshake_on_connect=block)
+        s = ssl_context.wrap_socket(s, do_handshake_on_connect=block, server_hostname=hostname)
         print("wrap: True")
     except OSError:
         print("wrap: error")
@@ -36,11 +40,11 @@ def test(addr, hostname, block=True):
 
 if __name__ == "__main__":
     # connect to plain HTTP port, oops!
-    addr = socket.getaddrinfo("micropython.org", 80)[0][-1]
-    test(addr, None)
+    addr = socket.getaddrinfo("micropython.org", 80, socket.AF_INET)[0][-1]
+    test(addr, "micropython.org")
     # connect to plain HTTP port, oops!
-    addr = socket.getaddrinfo("micropython.org", 80)[0][-1]
-    test(addr, None, False)
+    addr = socket.getaddrinfo("micropython.org", 80, socket.AF_INET)[0][-1]
+    test(addr, "micropython.org", False)
     # connect to server with self-signed cert, oops!
-    addr = socket.getaddrinfo("test.mosquitto.org", 8883)[0][-1]
+    addr = socket.getaddrinfo("test.mosquitto.org", 8883, socket.AF_INET)[0][-1]
     test(addr, "test.mosquitto.org")
diff --git a/tests/net_inet/test_tls_nonblock.py b/tests/net_inet/test_tls_nonblock.py
index 6378280a71..60af858b1f 100644
--- a/tests/net_inet/test_tls_nonblock.py
+++ b/tests/net_inet/test_tls_nonblock.py
@@ -2,12 +2,12 @@ import socket, ssl, errno, sys, time, select
 
 
 def test_one(site, opts):
-    ai = socket.getaddrinfo(site, 443)
+    ai = socket.getaddrinfo(site, 443, socket.AF_INET)
     addr = ai[0][-1]
-    print(addr)
+    print(site)
 
     # Connect the raw socket
-    s = socket.socket()
+    s = socket.socket(socket.AF_INET)
     s.setblocking(False)
     try:
         s.connect(addr)
@@ -16,17 +16,22 @@ def test_one(site, opts):
         if e.errno != errno.EINPROGRESS:
             raise
 
+    # Create SSLContext.
+    ssl_context = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+
+    # CPython compatibility:
+    # - disable check_hostname
+    # - load default system certificate chain
+    # - must wait for socket to be writable before calling wrap_socket
     if sys.implementation.name != "micropython":
-        # in CPython we have to wait, otherwise wrap_socket is not happy
+        ssl_context.check_hostname = False
+        ssl_context.load_default_certs()
         select.select([], [s], [])
 
     try:
         # Wrap with SSL
         try:
-            if sys.implementation.name == "micropython":
-                s = ssl.wrap_socket(s, do_handshake=False)
-            else:
-                s = ssl.wrap_socket(s, do_handshake_on_connect=False)
+            s = ssl_context.wrap_socket(s, do_handshake_on_connect=False)
         except OSError as e:
             if e.errno != errno.EINPROGRESS:
                 raise
@@ -87,8 +92,7 @@ def test_one(site, opts):
 
 
 SITES = [
-    "google.com",
-    {"host": "www.google.com"},
+    "www.github.com",
     "micropython.org",
     "pypi.org",
     {"host": "api.pushbullet.com", "sni": True},
@@ -105,7 +109,7 @@ def main():
             test_one(site, opts)
             print(site, "ok")
         except Exception as e:
-            print(site, "error")
+            print(site, "error", e)
     print("DONE")
 
 
diff --git a/tests/net_inet/test_tls_sites.py b/tests/net_inet/test_tls_sites.py
index 4f457b3abc..d60f4872b6 100644
--- a/tests/net_inet/test_tls_sites.py
+++ b/tests/net_inet/test_tls_sites.py
@@ -1,24 +1,34 @@
+import sys
+import select
 import socket
 import ssl
 
-# CPython only supports server_hostname with SSLContext
-if hasattr(ssl, "SSLContext"):
-    ssl = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
-
 
 def test_one(site, opts):
-    ai = socket.getaddrinfo(site, 443)
+    ai = socket.getaddrinfo(site, 443, socket.AF_INET)
     addr = ai[0][-1]
 
-    s = socket.socket()
+    s = socket.socket(socket.AF_INET)
+
+    # Create SSLContext.
+    ssl_context = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+
+    # CPython compatibility:
+    # - disable check_hostname
+    # - load default system certificate chain
+    # - must wait for socket to be writable before calling wrap_socket
+    if sys.implementation.name != "micropython":
+        ssl_context.check_hostname = False
+        ssl_context.load_default_certs()
+        select.select([], [s], [])
 
     try:
         s.connect(addr)
 
         if "sni" in opts:
-            s = ssl.wrap_socket(s, server_hostname=opts["host"])
+            s = ssl_context.wrap_socket(s, server_hostname=opts["host"])
         else:
-            s = ssl.wrap_socket(s)
+            s = ssl_context.wrap_socket(s)
 
         s.write(b"GET / HTTP/1.0\r\nHost: %s\r\n\r\n" % bytes(site, "latin"))
         resp = s.read(4096)
@@ -31,8 +41,7 @@ def test_one(site, opts):
 
 
 SITES = [
-    "google.com",
-    "www.google.com",
+    "www.github.com",
     "micropython.org",
     "pypi.org",
     {"host": "api.pushbullet.com", "sni": True},
diff --git a/tests/net_inet/test_tls_sites.py.exp b/tests/net_inet/test_tls_sites.py.exp
deleted file mode 100644
index 09faa336a7..0000000000
--- a/tests/net_inet/test_tls_sites.py.exp
+++ /dev/null
@@ -1,5 +0,0 @@
-google.com ok
-www.google.com ok
-micropython.org ok
-pypi.org ok
-api.pushbullet.com ok
diff --git a/tests/net_inet/tls_text_errors.py b/tests/net_inet/tls_text_errors.py
index 498593bba2..034cc8d36e 100644
--- a/tests/net_inet/tls_text_errors.py
+++ b/tests/net_inet/tls_text_errors.py
@@ -1,13 +1,17 @@
 # test that modtls produces a text error message
 
-import socket, ssl, sys
+import socket, ssl
 
 
 def test(addr):
     s = socket.socket()
     s.connect(addr)
     try:
-        s = ssl.wrap_socket(s)
+        ssl_context = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+        if hasattr(ssl_context, "check_hostname"):
+            # Disable hostname check on CPython.
+            ssl_context.check_hostname = False
+        s = ssl_context.wrap_socket(s)
         print("wrap: no exception")
     except OSError as e:
         # mbedtls produces "mbedtls -0x7200: SSL - An invalid SSL record was received"

From f33dfb966a1432281809e372b9d3803e7fd3cb2f Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 14 Dec 2023 12:03:36 +1100
Subject: [PATCH 253/310] extmod/modssl_mbedtls: Fix parsing of ciphers in
 set_ciphers method.

Fixes two issues:
- None should not be allowed in the list, otherwise the corresponding entry
  in ciphersuites[i] will have an undefined value.
- The terminating 0 needs to be put in ciphersuites[len].

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modssl_mbedtls.c | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/extmod/modssl_mbedtls.c b/extmod/modssl_mbedtls.c
index cdb4f2b088..f407d94cbf 100644
--- a/extmod/modssl_mbedtls.c
+++ b/extmod/modssl_mbedtls.c
@@ -294,17 +294,15 @@ STATIC mp_obj_t ssl_context_set_ciphers(mp_obj_t self_in, mp_obj_t ciphersuite)
 
     // Parse list of ciphers.
     ssl_context->ciphersuites = m_new(int, len + 1);
-    for (int i = 0, n = len; i < n; i++) {
-        if (ciphers[i] != mp_const_none) {
-            const char *ciphername = mp_obj_str_get_str(ciphers[i]);
-            const int id = mbedtls_ssl_get_ciphersuite_id(ciphername);
-            ssl_context->ciphersuites[i] = id;
-            if (id == 0) {
-                mbedtls_raise_error(MBEDTLS_ERR_SSL_BAD_CONFIG);
-            }
+    for (size_t i = 0; i < len; ++i) {
+        const char *ciphername = mp_obj_str_get_str(ciphers[i]);
+        const int id = mbedtls_ssl_get_ciphersuite_id(ciphername);
+        if (id == 0) {
+            mbedtls_raise_error(MBEDTLS_ERR_SSL_BAD_CONFIG);
         }
+        ssl_context->ciphersuites[i] = id;
     }
-    ssl_context->ciphersuites[len + 1] = 0;
+    ssl_context->ciphersuites[len] = 0;
 
     // Configure ciphersuite.
     mbedtls_ssl_conf_ciphersuites(&ssl_context->conf, (const int *)ssl_context->ciphersuites);

From bfd6ad94ff950a4b7e3a2125db1539c5e4ca333a Mon Sep 17 00:00:00 2001
From: Carlosgg <carlosgilglez@gmail.com>
Date: Thu, 30 Nov 2023 16:44:48 +0000
Subject: [PATCH 254/310] extmod/asyncio: Add ssl support with SSLContext.

This adds asyncio ssl support with SSLContext and the corresponding
tests in `tests/net_inet` and `tests/multi_net`.

Note that not doing the handshake on connect will delegate the handshake to
the following `mbedtls_ssl_read/write` calls.  However if the handshake
fails when a client certificate is required and not presented by the peer,
it needs to be notified of this handshake error (otherwise it will hang
until timeout if any).  Finally at MicroPython side raise the proper
mbedtls error code and message.

Signed-off-by: Carlos Gil <carlosgilglez@gmail.com>
---
 .gitattributes                                |   1 +
 extmod/asyncio/stream.py                      |  29 +++++--
 extmod/modssl_mbedtls.c                       |  42 ++++++++++
 tests/multi_net/asyncio_tls_server_client.py  |  73 +++++++++++++++++
 .../asyncio_tls_server_client.py.exp          |   8 ++
 ...o_tls_server_client_cert_required_error.py |  76 +++++++++++++++++
 ...s_server_client_cert_required_error.py.exp |  10 +++
 .../asyncio_tls_server_client_readline.py     |  77 ++++++++++++++++++
 .../asyncio_tls_server_client_readline.py.exp |  10 +++
 .../asyncio_tls_server_client_verify_error.py |  77 ++++++++++++++++++
 ...ncio_tls_server_client_verify_error.py.exp |  12 +++
 .../asyncio_tls_open_connection_readline.py   |  59 ++++++++++++++
 tests/net_inet/isrg.der                       | Bin 0 -> 1391 bytes
 13 files changed, 469 insertions(+), 5 deletions(-)
 create mode 100644 tests/multi_net/asyncio_tls_server_client.py
 create mode 100644 tests/multi_net/asyncio_tls_server_client.py.exp
 create mode 100644 tests/multi_net/asyncio_tls_server_client_cert_required_error.py
 create mode 100644 tests/multi_net/asyncio_tls_server_client_cert_required_error.py.exp
 create mode 100644 tests/multi_net/asyncio_tls_server_client_readline.py
 create mode 100644 tests/multi_net/asyncio_tls_server_client_readline.py.exp
 create mode 100644 tests/multi_net/asyncio_tls_server_client_verify_error.py
 create mode 100644 tests/multi_net/asyncio_tls_server_client_verify_error.py.exp
 create mode 100644 tests/net_inet/asyncio_tls_open_connection_readline.py
 create mode 100644 tests/net_inet/isrg.der

diff --git a/.gitattributes b/.gitattributes
index fe0c4b47e0..2d8496db50 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -13,6 +13,7 @@
 *.jpg binary
 *.dxf binary
 *.mpy binary
+*.der binary
 
 # These should also not be modified by git.
 tests/basics/string_cr_conversion.py -text
diff --git a/extmod/asyncio/stream.py b/extmod/asyncio/stream.py
index 5547bfbd51..bcc2a13a86 100644
--- a/extmod/asyncio/stream.py
+++ b/extmod/asyncio/stream.py
@@ -63,6 +63,8 @@ class Stream:
         while True:
             yield core._io_queue.queue_read(self.s)
             l2 = self.s.readline()  # may do multiple reads but won't block
+            if l2 is None:
+                continue
             l += l2
             if not l2 or l[-1] == 10:  # \n (check l in case l2 is str)
                 return l
@@ -100,19 +102,29 @@ StreamWriter = Stream
 # Create a TCP stream connection to a remote host
 #
 # async
-def open_connection(host, port):
+def open_connection(host, port, ssl=None, server_hostname=None):
     from errno import EINPROGRESS
     import socket
 
     ai = socket.getaddrinfo(host, port, 0, socket.SOCK_STREAM)[0]  # TODO this is blocking!
     s = socket.socket(ai[0], ai[1], ai[2])
     s.setblocking(False)
-    ss = Stream(s)
     try:
         s.connect(ai[-1])
     except OSError as er:
         if er.errno != EINPROGRESS:
             raise er
+    # wrap with SSL, if requested
+    if ssl:
+        if ssl is True:
+            import ssl as _ssl
+
+            ssl = _ssl.SSLContext(_ssl.PROTOCOL_TLS_CLIENT)
+        if not server_hostname:
+            server_hostname = host
+        s = ssl.wrap_socket(s, server_hostname=server_hostname, do_handshake_on_connect=False)
+        s.setblocking(False)
+    ss = Stream(s)
     yield core._io_queue.queue_write(s)
     return ss, ss
 
@@ -135,7 +147,7 @@ class Server:
     async def wait_closed(self):
         await self.task
 
-    async def _serve(self, s, cb):
+    async def _serve(self, s, cb, ssl):
         self.state = False
         # Accept incoming connections
         while True:
@@ -156,6 +168,13 @@ class Server:
             except:
                 # Ignore a failed accept
                 continue
+            if ssl:
+                try:
+                    s2 = ssl.wrap_socket(s2, server_side=True, do_handshake_on_connect=False)
+                except OSError as e:
+                    core.sys.print_exception(e)
+                    s2.close()
+                    continue
             s2.setblocking(False)
             s2s = Stream(s2, {"peername": addr})
             core.create_task(cb(s2s, s2s))
@@ -163,7 +182,7 @@ class Server:
 
 # Helper function to start a TCP stream server, running as a new task
 # TODO could use an accept-callback on socket read activity instead of creating a task
-async def start_server(cb, host, port, backlog=5):
+async def start_server(cb, host, port, backlog=5, ssl=None):
     import socket
 
     # Create and bind server socket.
@@ -176,7 +195,7 @@ async def start_server(cb, host, port, backlog=5):
 
     # Create and return server object and task.
     srv = Server()
-    srv.task = core.create_task(srv._serve(s, cb))
+    srv.task = core.create_task(srv._serve(s, cb, ssl))
     try:
         # Ensure that the _serve task has been scheduled so that it gets to
         # handle cancellation.
diff --git a/extmod/modssl_mbedtls.c b/extmod/modssl_mbedtls.c
index f407d94cbf..0190c96a9a 100644
--- a/extmod/modssl_mbedtls.c
+++ b/extmod/modssl_mbedtls.c
@@ -166,6 +166,46 @@ STATIC NORETURN void mbedtls_raise_error(int err) {
     #endif
 }
 
+STATIC void ssl_check_async_handshake_failure(mp_obj_ssl_socket_t *sslsock, int *errcode) {
+    if (
+        #if MBEDTLS_VERSION_NUMBER >= 0x03000000
+        (*errcode < 0) && (mbedtls_ssl_is_handshake_over(&sslsock->ssl) == 0) && (*errcode != MBEDTLS_ERR_SSL_CONN_EOF)
+        #else
+        (*errcode < 0) && (*errcode != MBEDTLS_ERR_SSL_CONN_EOF)
+        #endif
+        ) {
+        // Asynchronous handshake is done by mbdetls_ssl_read/write.  If the return code is
+        // MBEDTLS_ERR_XX (i.e < 0) and the handshake is not done due to a handshake failure,
+        // then notify peer with proper error code and raise local error with mbedtls_raise_error.
+
+        if (*errcode == MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE) {
+            // Check if TLSv1.3 and use proper alert for this case (to be implemented)
+            // uint8_t alert = MBEDTLS_SSL_ALERT_MSG_CERT_REQUIRED; tlsv1.3
+            // uint8_t alert = MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE; tlsv1.2
+            mbedtls_ssl_send_alert_message(&sslsock->ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL,
+                MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE);
+        }
+
+        if (*errcode == MBEDTLS_ERR_X509_CERT_VERIFY_FAILED) {
+            // The certificate may have been rejected for several reasons.
+            char xcbuf[256];
+            uint32_t flags = mbedtls_ssl_get_verify_result(&sslsock->ssl);
+            int ret = mbedtls_x509_crt_verify_info(xcbuf, sizeof(xcbuf), "\n", flags);
+            // The length of the string written (not including the terminated nul byte),
+            // or a negative err code.
+            if (ret > 0) {
+                sslsock->sock = MP_OBJ_NULL;
+                mbedtls_ssl_free(&sslsock->ssl);
+                mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("%s"), xcbuf);
+            }
+        }
+
+        sslsock->sock = MP_OBJ_NULL;
+        mbedtls_ssl_free(&sslsock->ssl);
+        mbedtls_raise_error(*errcode);
+    }
+}
+
 /******************************************************************************/
 // SSLContext type.
 
@@ -614,6 +654,7 @@ STATIC mp_uint_t socket_read(mp_obj_t o_in, void *buf, mp_uint_t size, int *errc
     } else {
         o->last_error = ret;
     }
+    ssl_check_async_handshake_failure(o, &ret);
     *errcode = ret;
     return MP_STREAM_ERROR;
 }
@@ -642,6 +683,7 @@ STATIC mp_uint_t socket_write(mp_obj_t o_in, const void *buf, mp_uint_t size, in
     } else {
         o->last_error = ret;
     }
+    ssl_check_async_handshake_failure(o, &ret);
     *errcode = ret;
     return MP_STREAM_ERROR;
 }
diff --git a/tests/multi_net/asyncio_tls_server_client.py b/tests/multi_net/asyncio_tls_server_client.py
new file mode 100644
index 0000000000..996cdb3e0d
--- /dev/null
+++ b/tests/multi_net/asyncio_tls_server_client.py
@@ -0,0 +1,73 @@
+# Test asyncio TCP server and client with TLS, transferring some data.
+
+try:
+    import os
+    import asyncio
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+async def handle_connection(reader, writer):
+    data = await reader.read(100)
+    print("echo:", data)
+    writer.write(data)
+    await writer.drain()
+
+    print("close")
+    writer.close()
+    await writer.wait_closed()
+
+    print("done")
+    ev.set()
+
+
+async def tcp_server():
+    global ev
+
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    ev = asyncio.Event()
+    server = await asyncio.start_server(handle_connection, "0.0.0.0", PORT, ssl=server_ctx)
+    print("server running")
+    multitest.next()
+    async with server:
+        await asyncio.wait_for(ev.wait(), 10)
+
+
+async def tcp_client(message):
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    reader, writer = await asyncio.open_connection(
+        IP, PORT, ssl=client_ctx, server_hostname="micropython.local"
+    )
+    print("write:", message)
+    writer.write(message)
+    await writer.drain()
+    data = await reader.read(100)
+    print("read:", data)
+
+
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    asyncio.run(tcp_server())
+
+
+def instance1():
+    multitest.next()
+    asyncio.run(tcp_client(b"client data"))
diff --git a/tests/multi_net/asyncio_tls_server_client.py.exp b/tests/multi_net/asyncio_tls_server_client.py.exp
new file mode 100644
index 0000000000..6dc6a9bbc7
--- /dev/null
+++ b/tests/multi_net/asyncio_tls_server_client.py.exp
@@ -0,0 +1,8 @@
+--- instance0 ---
+server running
+echo: b'client data'
+close
+done
+--- instance1 ---
+write: b'client data'
+read: b'client data'
diff --git a/tests/multi_net/asyncio_tls_server_client_cert_required_error.py b/tests/multi_net/asyncio_tls_server_client_cert_required_error.py
new file mode 100644
index 0000000000..bd4d7b82ea
--- /dev/null
+++ b/tests/multi_net/asyncio_tls_server_client_cert_required_error.py
@@ -0,0 +1,76 @@
+# Test asyncio TCP server and client with TLS, giving a cert required error.
+
+try:
+    import os
+    import asyncio
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+async def handle_connection(reader, writer):
+    print("handle connection")
+    try:
+        data = await reader.read(100)
+    except Exception as e:
+        print(e)
+    ev.set()
+
+
+async def tcp_server():
+    global ev
+
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    server_ctx.verify_mode = ssl.CERT_REQUIRED
+    server_ctx.load_verify_locations(cafile=cert)
+    ev = asyncio.Event()
+    server = await asyncio.start_server(handle_connection, "0.0.0.0", PORT, ssl=server_ctx)
+    print("server running")
+    multitest.next()
+    async with server:
+        await asyncio.wait_for(ev.wait(), 10)
+        multitest.wait("finished")
+        print("server done")
+
+
+async def tcp_client(message):
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    reader, writer = await asyncio.open_connection(
+        IP, PORT, ssl=client_ctx, server_hostname="micropython.local"
+    )
+    try:
+        print("write:", message)
+        writer.write(message)
+        print("drain")
+        await writer.drain()
+    except Exception as e:
+        print(e)
+    print("client done")
+    multitest.broadcast("finished")
+
+
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    asyncio.run(tcp_server())
+
+
+def instance1():
+    multitest.next()
+    asyncio.run(tcp_client(b"client data"))
diff --git a/tests/multi_net/asyncio_tls_server_client_cert_required_error.py.exp b/tests/multi_net/asyncio_tls_server_client_cert_required_error.py.exp
new file mode 100644
index 0000000000..0f905d0d23
--- /dev/null
+++ b/tests/multi_net/asyncio_tls_server_client_cert_required_error.py.exp
@@ -0,0 +1,10 @@
+--- instance0 ---
+server running
+handle connection
+(-29824, 'MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE')
+server done
+--- instance1 ---
+write: b'client data'
+drain
+(-30592, 'MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE')
+client done
diff --git a/tests/multi_net/asyncio_tls_server_client_readline.py b/tests/multi_net/asyncio_tls_server_client_readline.py
new file mode 100644
index 0000000000..28add38f5d
--- /dev/null
+++ b/tests/multi_net/asyncio_tls_server_client_readline.py
@@ -0,0 +1,77 @@
+# Test asyncio TCP server and client with TLS, using readline() to read data.
+
+try:
+    import os
+    import asyncio
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+async def handle_connection(reader, writer):
+    data = await reader.readline()
+    print("echo:", data)
+    data2 = await reader.readline()
+    print("echo:", data2)
+    writer.write(data + data2)
+    await writer.drain()
+
+    print("close")
+    writer.close()
+    await writer.wait_closed()
+
+    print("done")
+    ev.set()
+
+
+async def tcp_server():
+    global ev
+
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    ev = asyncio.Event()
+    server = await asyncio.start_server(handle_connection, "0.0.0.0", PORT, ssl=server_ctx)
+    print("server running")
+    multitest.next()
+    async with server:
+        await asyncio.wait_for(ev.wait(), 10)
+
+
+async def tcp_client(message):
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    reader, writer = await asyncio.open_connection(
+        IP, PORT, ssl=client_ctx, server_hostname="micropython.local"
+    )
+    print("write:", message)
+    writer.write(message)
+    await writer.drain()
+    data = await reader.readline()
+    print("read:", data)
+    data2 = await reader.readline()
+    print("read:", data2)
+
+
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    asyncio.run(tcp_server())
+
+
+def instance1():
+    multitest.next()
+    asyncio.run(tcp_client(b"client data\nclient data2\n"))
diff --git a/tests/multi_net/asyncio_tls_server_client_readline.py.exp b/tests/multi_net/asyncio_tls_server_client_readline.py.exp
new file mode 100644
index 0000000000..4c93c5729a
--- /dev/null
+++ b/tests/multi_net/asyncio_tls_server_client_readline.py.exp
@@ -0,0 +1,10 @@
+--- instance0 ---
+server running
+echo: b'client data\n'
+echo: b'client data2\n'
+close
+done
+--- instance1 ---
+write: b'client data\nclient data2\n'
+read: b'client data\n'
+read: b'client data2\n'
diff --git a/tests/multi_net/asyncio_tls_server_client_verify_error.py b/tests/multi_net/asyncio_tls_server_client_verify_error.py
new file mode 100644
index 0000000000..46a476addf
--- /dev/null
+++ b/tests/multi_net/asyncio_tls_server_client_verify_error.py
@@ -0,0 +1,77 @@
+# Test asyncio TCP server and client with TLS, and an incorrect server_hostname.
+
+try:
+    import os
+    import asyncio
+    import ssl
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+PORT = 8000
+
+# These are test certificates. See tests/README.md for details.
+cert = cafile = "multi_net/rsa_cert.der"
+key = "multi_net/rsa_key.der"
+
+try:
+    os.stat(cafile)
+    os.stat(key)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+
+async def handle_connection(reader, writer):
+    print("handle connection")
+    try:
+        data = await reader.read(100)
+    except Exception as e:
+        print(e)
+    ev.set()
+
+
+async def tcp_server():
+    global ev
+
+    server_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_SERVER)
+    server_ctx.load_cert_chain(cert, key)
+    ev = asyncio.Event()
+    server = await asyncio.start_server(handle_connection, "0.0.0.0", PORT, ssl=server_ctx)
+    print("server running")
+    multitest.next()
+    async with server:
+        await asyncio.wait_for(ev.wait(), 10)
+    print("server done")
+    multitest.broadcast("finished")
+
+
+async def tcp_client(message):
+    client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+    client_ctx.verify_mode = ssl.CERT_REQUIRED
+    client_ctx.load_verify_locations(cafile=cafile)
+    reader, writer = await asyncio.open_connection(
+        IP,
+        PORT,
+        ssl=client_ctx,
+        server_hostname="foobar.local",  # incorrect server_hostname
+    )
+    try:
+        print("write:", message)
+        writer.write(message)
+        print("drain")
+        await writer.drain()
+    except Exception as e:
+        print(e)
+    multitest.wait("finished")
+    print("client done")
+
+
+def instance0():
+    multitest.globals(IP=multitest.get_network_ip())
+    asyncio.run(tcp_server())
+
+
+def instance1():
+    multitest.next()
+    asyncio.run(tcp_client(b"client data"))
diff --git a/tests/multi_net/asyncio_tls_server_client_verify_error.py.exp b/tests/multi_net/asyncio_tls_server_client_verify_error.py.exp
new file mode 100644
index 0000000000..36d0ab00f4
--- /dev/null
+++ b/tests/multi_net/asyncio_tls_server_client_verify_error.py.exp
@@ -0,0 +1,12 @@
+--- instance0 ---
+server running
+handle connection
+(-30592, 'MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE')
+server done
+--- instance1 ---
+write: b'client data'
+drain
+
+The certificate Common Name (CN) does not match with the expected CN
+
+client done
diff --git a/tests/net_inet/asyncio_tls_open_connection_readline.py b/tests/net_inet/asyncio_tls_open_connection_readline.py
new file mode 100644
index 0000000000..70145d91a7
--- /dev/null
+++ b/tests/net_inet/asyncio_tls_open_connection_readline.py
@@ -0,0 +1,59 @@
+import ssl
+import os
+import asyncio
+
+# This certificate was obtained from micropython.org using openssl:
+# $ openssl s_client -showcerts -connect micropython.org:443 </dev/null 2>/dev/null
+# The certificate is from Let's Encrypt:
+# 1 s:/C=US/O=Let's Encrypt/CN=R3
+#   i:/C=US/O=Internet Security Research Group/CN=ISRG Root X1
+# Validity
+#            Not Before: Sep  4 00:00:00 2020 GMT
+#            Not After : Sep 15 16:00:00 2025 GMT
+# Copy PEM content to a file (certmpy.pem) and convert to DER e.g.
+# $ openssl x509 -in certmpy.pem -out certmpy.der -outform DER
+# Then convert to hex format, eg using binascii.hexlify(data).
+
+# Note that the instructions above is to obtain an intermediate
+# root CA cert that works for MicroPython. However CPython needs the ultimate root CA
+# cert from ISRG
+
+ca_cert_chain = "isrg.der"
+
+try:
+    os.stat(ca_cert_chain)
+except OSError:
+    print("SKIP")
+    raise SystemExit
+
+with open(ca_cert_chain, "rb") as ca:
+    cadata = ca.read()
+
+client_ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
+client_ctx.verify_mode = ssl.CERT_REQUIRED
+client_ctx.load_verify_locations(cadata=cadata)
+
+
+async def http_get(url, port, sslctx):
+    reader, writer = await asyncio.open_connection(url, port, ssl=sslctx)
+
+    print("write GET")
+    writer.write(b"GET / HTTP/1.0\r\n\r\n")
+    await writer.drain()
+
+    print("read response")
+    while True:
+        data = await reader.readline()
+        # avoid printing datetime which makes the test fail
+        if b"GMT" not in data:
+            print("read:", data)
+        if not data:
+            break
+
+    print("close")
+    writer.close()
+    await writer.wait_closed()
+    print("done")
+
+
+asyncio.run(http_get("micropython.org", 443, client_ctx))
diff --git a/tests/net_inet/isrg.der b/tests/net_inet/isrg.der
new file mode 100644
index 0000000000000000000000000000000000000000..9d2132e7f1e352fabac7eafb231488b5da91ffb2
GIT binary patch
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From 05d3b223011a88a10c806be866db8e0d29f1e348 Mon Sep 17 00:00:00 2001
From: Carlosgg <carlosgilglez@gmail.com>
Date: Thu, 7 Sep 2023 23:37:20 +0100
Subject: [PATCH 255/310] docs/library: Document SSLContext cert methods and
 asyncio support.

Add `load_cert_chain`, `load_verify_locations`, `get_ciphers` and
`set_ciphers` SSLContext methods in ssl library, and update asyncio
`open_connection` and `start_server` methods with ssl support.

Signed-off-by: Carlos Gil <carlosgilglez@gmail.com>
---
 docs/library/asyncio.rst |  8 ++++++--
 docs/library/ssl.rst     | 33 +++++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+), 2 deletions(-)

diff --git a/docs/library/asyncio.rst b/docs/library/asyncio.rst
index 9a2c14e7e0..b57f1ee04e 100644
--- a/docs/library/asyncio.rst
+++ b/docs/library/asyncio.rst
@@ -201,10 +201,12 @@ class Lock
 TCP stream connections
 ----------------------
 
-.. function:: open_connection(host, port)
+.. function:: open_connection(host, port, ssl=None)
 
     Open a TCP connection to the given *host* and *port*.  The *host* address will be
     resolved using `socket.getaddrinfo`, which is currently a blocking call.
+    If *ssl* is a `ssl.SSLContext` object, this context is used to create the transport;
+    if *ssl* is ``True``, a default context is used.
 
     Returns a pair of streams: a reader and a writer stream.
     Will raise a socket-specific ``OSError`` if the host could not be resolved or if
@@ -212,12 +214,14 @@ TCP stream connections
 
     This is a coroutine.
 
-.. function:: start_server(callback, host, port, backlog=5)
+.. function:: start_server(callback, host, port, backlog=5, ssl=None)
 
     Start a TCP server on the given *host* and *port*.  The *callback* will be
     called with incoming, accepted connections, and be passed 2 arguments: reader
     and writer streams for the connection.
 
+    If *ssl* is a `ssl.SSLContext` object, this context is used to create the transport.
+
     Returns a `Server` object.
 
     This is a coroutine.
diff --git a/docs/library/ssl.rst b/docs/library/ssl.rst
index e3dfa9d993..f9be277453 100644
--- a/docs/library/ssl.rst
+++ b/docs/library/ssl.rst
@@ -39,6 +39,33 @@ class SSLContext
     Create a new SSLContext instance.  The *protocol* argument must be one of the ``PROTOCOL_*``
     constants.
 
+.. method:: SSLContext.load_cert_chain(certfile, keyfile)
+
+   Load a private key and the corresponding certificate.  The *certfile* is a string
+   with the file path of the certificate.  The *keyfile* is a string with the file path
+   of the private key.
+
+   .. admonition:: Difference to CPython
+      :class: attention
+
+      MicroPython extension: *certfile* and *keyfile* can be bytes objects instead of
+      strings, in which case they are interpreted as the actual certificate/key data.
+
+.. method:: SSLContext.load_verify_locations(cafile=None, cadata=None)
+
+   Load the CA certificate chain that will validate the peer's certificate.
+   *cafile* is the file path of the CA certificates.  *cadata* is a bytes object
+   containing the CA certificates.  Only one of these arguments should be provided.
+
+.. method:: SSLContext.get_ciphers()
+
+   Get a list of enabled ciphers, returned as a list of strings.
+
+.. method:: SSLContext.set_ciphers(ciphers)
+
+   Set the available ciphers for sockets created with this context.  *ciphers* should be
+   a list of strings in the `IANA cipher suite format <https://wiki.mozilla.org/Security/Cipher_Suites>`_ .
+
 .. method:: SSLContext.wrap_socket(sock, *, server_side=False, do_handshake_on_connect=True, server_hostname=None)
 
    Takes a `stream` *sock* (usually socket.socket instance of ``SOCK_STREAM`` type),
@@ -77,6 +104,12 @@ class SSLContext
     Set or get the behaviour for verification of peer certificates.  Must be one of the
     ``CERT_*`` constants.
 
+.. note::
+
+   ``ssl.CERT_REQUIRED`` requires the device's date/time to be properly set, e.g. using
+   `mpremote rtc --set <mpremote_command_rtc>` or ``ntptime``, and ``server_hostname``
+   must be specified when on the client side.
+
 Exceptions
 ----------
 

From 85c02166cacb8c2a8bc82f9802814ca72cbf6017 Mon Sep 17 00:00:00 2001
From: stijn <stijn@ignitron.net>
Date: Mon, 4 Dec 2023 15:54:59 +0100
Subject: [PATCH 256/310] py/modsys: Implement optional sys.intern.

Signed-off-by: stijn <stijn@ignitron.net>
---
 py/modsys.c                      |  8 ++++++++
 py/mpconfig.h                    |  5 +++++
 tests/basics/sys1.py             | 15 +++++++++++++++
 tests/unix/extra_coverage.py.exp |  8 ++++----
 4 files changed, 32 insertions(+), 4 deletions(-)

diff --git a/py/modsys.c b/py/modsys.c
index 12fa1101b9..2af81046f4 100644
--- a/py/modsys.c
+++ b/py/modsys.c
@@ -147,6 +147,10 @@ STATIC const MP_DEFINE_STR_OBJ(mp_sys_platform_obj, MICROPY_PY_SYS_PLATFORM);
 MP_DEFINE_STR_OBJ(mp_sys_executable_obj, "");
 #endif
 
+#if MICROPY_PY_SYS_INTERN
+MP_DEFINE_CONST_FUN_OBJ_1(mp_sys_intern_obj, mp_obj_str_intern_checked);
+#endif
+
 // exit([retval]): raise SystemExit, with optional argument given to the exception
 STATIC mp_obj_t mp_sys_exit(size_t n_args, const mp_obj_t *args) {
     if (n_args == 0) {
@@ -293,6 +297,10 @@ STATIC const mp_rom_map_elem_t mp_module_sys_globals_table[] = {
     #endif
     #endif
 
+    #if MICROPY_PY_SYS_INTERN
+    { MP_ROM_QSTR(MP_QSTR_intern), MP_ROM_PTR(&mp_sys_intern_obj) },
+    #endif
+
     #if MICROPY_PY_SYS_EXIT
     { MP_ROM_QSTR(MP_QSTR_exit), MP_ROM_PTR(&mp_sys_exit_obj) },
     #endif
diff --git a/py/mpconfig.h b/py/mpconfig.h
index d14b1aa044..c025bca260 100644
--- a/py/mpconfig.h
+++ b/py/mpconfig.h
@@ -1434,6 +1434,11 @@ typedef double mp_float_t;
 #define MICROPY_PY_SYS_EXECUTABLE (0)
 #endif
 
+// Whether to provide "sys.intern"
+#ifndef MICROPY_PY_SYS_INTERN
+#define MICROPY_PY_SYS_INTERN (MICROPY_CONFIG_ROM_LEVEL_AT_LEAST_EVERYTHING)
+#endif
+
 // Whether to provide "sys.exit" function
 #ifndef MICROPY_PY_SYS_EXIT
 #define MICROPY_PY_SYS_EXIT (1)
diff --git a/tests/basics/sys1.py b/tests/basics/sys1.py
index 759b9a6eae..95d8905d13 100644
--- a/tests/basics/sys1.py
+++ b/tests/basics/sys1.py
@@ -23,3 +23,18 @@ if hasattr(sys.implementation, '_mpy'):
 else:
     # Effectively skip subtests
     print(int)
+
+try:
+    print(sys.intern('micropython') == 'micropython')
+    has_intern = True
+except AttributeError:
+    has_intern = False
+    print(True)
+
+if has_intern:
+    try:
+        print(sys.intern(0))
+    except TypeError:
+        print(True)
+else:
+    print(True)
diff --git a/tests/unix/extra_coverage.py.exp b/tests/unix/extra_coverage.py.exp
index ec39500746..b7e4c0d760 100644
--- a/tests/unix/extra_coverage.py.exp
+++ b/tests/unix/extra_coverage.py.exp
@@ -66,10 +66,10 @@ micropython     machine         math
 
 argv            atexit          byteorder       exc_info
 executable      exit            getsizeof       implementation
-maxsize         modules         path            platform
-print_exception                 ps1             ps2
-stderr          stdin           stdout          tracebacklimit
-version         version_info
+intern          maxsize         modules         path
+platform        print_exception                 ps1
+ps2             stderr          stdin           stdout
+tracebacklimit  version         version_info
 ementation
 # attrtuple
 (start=1, stop=2, step=3)

From 0d93392f10dc15cbd7e05931d0ddd7a5cc62c4b2 Mon Sep 17 00:00:00 2001
From: Trent Piepho <tpiepho@gmail.com>
Date: Tue, 28 Nov 2023 14:26:59 -0800
Subject: [PATCH 257/310] py/mkrules.mk: List hash files as byproducts.

These are produced by the "cat" command to makeqstrdefs.py, to allow it to
not update unchanged files.  cmake doesn't know about them and so they are
not removed on a "clean".

This triggered a bug in makeqstrdefs.py where it would not recreate a
deleted output file (which is removed by clean) if a stale hash file with a
valid hash still existed.

Listing them as byproducts will cause them to be deleted on clean.

Signed-off-by: Trent Piepho <tpiepho@gmail.com>
---
 py/mkrules.cmake | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/py/mkrules.cmake b/py/mkrules.cmake
index 743302aea9..bfc56abfe8 100644
--- a/py/mkrules.cmake
+++ b/py/mkrules.cmake
@@ -99,6 +99,7 @@ add_custom_command(
 add_custom_command(
     OUTPUT ${MICROPY_QSTRDEFS_COLLECTED}
     COMMAND ${Python3_EXECUTABLE} ${MICROPY_PY_DIR}/makeqstrdefs.py cat qstr _ ${MICROPY_GENHDR_DIR}/qstr ${MICROPY_QSTRDEFS_COLLECTED}
+    BYPRODUCTS "${MICROPY_QSTRDEFS_COLLECTED}.hash"
     DEPENDS ${MICROPY_QSTRDEFS_SPLIT}
     VERBATIM
     COMMAND_EXPAND_LISTS
@@ -136,6 +137,7 @@ add_custom_command(
 add_custom_command(
     OUTPUT ${MICROPY_MODULEDEFS_COLLECTED}
     COMMAND ${Python3_EXECUTABLE} ${MICROPY_PY_DIR}/makeqstrdefs.py cat module _ ${MICROPY_GENHDR_DIR}/module ${MICROPY_MODULEDEFS_COLLECTED}
+    BYPRODUCTS "${MICROPY_MODULEDEFS_COLLECTED}.hash"
     DEPENDS ${MICROPY_MODULEDEFS_SPLIT}
     VERBATIM
     COMMAND_EXPAND_LISTS
@@ -161,6 +163,7 @@ add_custom_command(
 add_custom_command(
     OUTPUT ${MICROPY_ROOT_POINTERS_COLLECTED}
     COMMAND ${Python3_EXECUTABLE} ${MICROPY_PY_DIR}/makeqstrdefs.py cat root_pointer _ ${MICROPY_GENHDR_DIR}/root_pointer ${MICROPY_ROOT_POINTERS_COLLECTED}
+    BYPRODUCTS "${MICROPY_ROOT_POINTERS_COLLECTED}.hash"
     DEPENDS ${MICROPY_ROOT_POINTERS_SPLIT}
     VERBATIM
     COMMAND_EXPAND_LISTS

From f22e88611dda2f713ce9b8ae004915ae006105ba Mon Sep 17 00:00:00 2001
From: Trent Piepho <tpiepho@gmail.com>
Date: Tue, 28 Nov 2023 14:21:03 -0800
Subject: [PATCH 258/310] py/makeqstrdefs.py: Don't skip output for stale hash
 file.

In "cat" mode a "$output_file.hash" file is checked to see if the hash of
the new output is the same as the existing, and if so the output file isn't
updated.

However, it's possible that the output file has been deleted but the hash
file has not.  In this case the output file is not created.

Change the logic so that a hash file is considered stale if there is no
output file and still create the output.

Signed-off-by: Trent Piepho <tpiepho@gmail.com>
---
 py/makeqstrdefs.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/py/makeqstrdefs.py b/py/makeqstrdefs.py
index 57200e069c..bdc432d7dd 100644
--- a/py/makeqstrdefs.py
+++ b/py/makeqstrdefs.py
@@ -163,7 +163,7 @@ def cat_together():
         mode_full = "Module registrations"
     elif args.mode == _MODE_ROOT_POINTER:
         mode_full = "Root pointer registrations"
-    if old_hash != new_hash:
+    if old_hash != new_hash or not os.path.exists(args.output_file):
         print(mode_full, "updated")
         try:
             # rename below might fail if file exists

From d506b5337704c0f6e6d78ef9cfa2ceb83e2a0474 Mon Sep 17 00:00:00 2001
From: "dependabot[bot]" <49699333+dependabot[bot]@users.noreply.github.com>
Date: Mon, 13 Nov 2023 19:27:04 +0000
Subject: [PATCH 259/310] github/workflows: Bump actions/github-script from 6
 to 7.

Bumps [actions/github-script](https://github.com/actions/github-script)
from 6 to 7.
- [Release notes](https://github.com/actions/github-script/releases)
- [Commits](https://github.com/actions/github-script/compare/v6...v7)

---
updated-dependencies:
- dependency-name: actions/github-script
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
---
 .github/workflows/code_size_comment.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/code_size_comment.yml b/.github/workflows/code_size_comment.yml
index 8baf76a47a..a394f7a14b 100644
--- a/.github/workflows/code_size_comment.yml
+++ b/.github/workflows/code_size_comment.yml
@@ -15,7 +15,7 @@ jobs:
     steps:
       - name: 'Download artifact'
         id: download-artifact
-        uses: actions/github-script@v6
+        uses: actions/github-script@v7
         with:
           result-encoding: string
           script: |
@@ -56,7 +56,7 @@ jobs:
         run: unzip code-size-report.zip
       - name: Post comment to pull request
         if: steps.download-artifact.outputs.result == 'ok'
-        uses: actions/github-script@v6
+        uses: actions/github-script@v7
         with:
           github-token: ${{secrets.GITHUB_TOKEN}}
           script: |

From be6464121072e827eefa19d7ae12746612a8cb79 Mon Sep 17 00:00:00 2001
From: "dependabot[bot]" <49699333+dependabot[bot]@users.noreply.github.com>
Date: Wed, 6 Dec 2023 19:50:28 +0000
Subject: [PATCH 260/310] github/workflows: Bump actions/setup-python from 4 to
 5.

Bumps [actions/setup-python](https://github.com/actions/setup-python) from
4 to 5.
- [Release notes](https://github.com/actions/setup-python/releases)
- [Commits](https://github.com/actions/setup-python/compare/v4...v5)

---
updated-dependencies:
- dependency-name: actions/setup-python
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
---
 .github/workflows/code_formatting.yml   | 4 ++--
 .github/workflows/commit_formatting.yml | 2 +-
 .github/workflows/docs.yml              | 2 +-
 .github/workflows/mpremote.yml          | 2 +-
 .github/workflows/ports_unix.yml        | 2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/code_formatting.yml b/.github/workflows/code_formatting.yml
index 53055a8441..5cd7984f7a 100644
--- a/.github/workflows/code_formatting.yml
+++ b/.github/workflows/code_formatting.yml
@@ -11,7 +11,7 @@ jobs:
     runs-on: ubuntu-22.04
     steps:
     - uses: actions/checkout@v4
-    - uses: actions/setup-python@v4
+    - uses: actions/setup-python@v5
     - name: Install packages
       run: source tools/ci.sh && ci_c_code_formatting_setup
     - name: Run code formatting
@@ -23,7 +23,7 @@ jobs:
     runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
-    - uses: actions/setup-python@v4
+    - uses: actions/setup-python@v5
     - name: Install packages
       run: source tools/ci.sh && ci_code_spell_setup
     - name: Run spell checker
diff --git a/.github/workflows/commit_formatting.yml b/.github/workflows/commit_formatting.yml
index a651f8a13a..3fdcabc4ca 100644
--- a/.github/workflows/commit_formatting.yml
+++ b/.github/workflows/commit_formatting.yml
@@ -13,6 +13,6 @@ jobs:
     - uses: actions/checkout@v4
       with:
         fetch-depth: '100'
-    - uses: actions/setup-python@v4
+    - uses: actions/setup-python@v5
     - name: Check commit message formatting
       run: source tools/ci.sh && ci_commit_formatting_run
diff --git a/.github/workflows/docs.yml b/.github/workflows/docs.yml
index e0b6fdaba0..d01a4b50c9 100644
--- a/.github/workflows/docs.yml
+++ b/.github/workflows/docs.yml
@@ -16,7 +16,7 @@ jobs:
 
     steps:
     - uses: actions/checkout@v4
-    - uses: actions/setup-python@v4
+    - uses: actions/setup-python@v5
     - name: Install Python packages
       run: pip install -r docs/requirements.txt
     - name: Build docs
diff --git a/.github/workflows/mpremote.yml b/.github/workflows/mpremote.yml
index 5b9465d7fe..668567bd42 100644
--- a/.github/workflows/mpremote.yml
+++ b/.github/workflows/mpremote.yml
@@ -16,7 +16,7 @@ jobs:
         # Setting this to zero means fetch all history and tags,
         # which hatch-vcs can use to discover the version tag.
         fetch-depth: 0
-    - uses: actions/setup-python@v4
+    - uses: actions/setup-python@v5
     - name: Install build tools
       run: pip install build
     - name: Build mpremote wheel
diff --git a/.github/workflows/ports_unix.yml b/.github/workflows/ports_unix.yml
index 25dd52f31d..2367eddbe6 100644
--- a/.github/workflows/ports_unix.yml
+++ b/.github/workflows/ports_unix.yml
@@ -196,7 +196,7 @@ jobs:
     runs-on: macos-11.0
     steps:
     - uses: actions/checkout@v4
-    - uses: actions/setup-python@v4
+    - uses: actions/setup-python@v5
       with:
         python-version: '3.8'
     - name: Build

From de3e83aa4d9b671e6c5581ce19f98aa06f96e255 Mon Sep 17 00:00:00 2001
From: "dependabot[bot]" <49699333+dependabot[bot]@users.noreply.github.com>
Date: Thu, 14 Dec 2023 19:37:54 +0000
Subject: [PATCH 261/310] github/workflows: Bump actions/upload-artifact from 3
 to 4.

Bumps [actions/upload-artifact](https://github.com/actions/upload-artifact)
from 3 to 4.
- [Release notes](https://github.com/actions/upload-artifact/releases)
- [Commits](https://github.com/actions/upload-artifact/compare/v3...v4)

---
updated-dependencies:
- dependency-name: actions/upload-artifact
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
---
 .github/workflows/code_size.yml | 2 +-
 .github/workflows/mpremote.yml  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/code_size.yml b/.github/workflows/code_size.yml
index 56097a6d3e..a65a00201a 100644
--- a/.github/workflows/code_size.yml
+++ b/.github/workflows/code_size.yml
@@ -36,7 +36,7 @@ jobs:
       run: echo $PR_NUMBER > pr_number
     - name: Upload diff
       if: github.event_name == 'pull_request'
-      uses: actions/upload-artifact@v3
+      uses: actions/upload-artifact@v4
       with:
         name: code-size-report
         path: |
diff --git a/.github/workflows/mpremote.yml b/.github/workflows/mpremote.yml
index 668567bd42..ee91b6360b 100644
--- a/.github/workflows/mpremote.yml
+++ b/.github/workflows/mpremote.yml
@@ -22,7 +22,7 @@ jobs:
     - name: Build mpremote wheel
       run: cd tools/mpremote && python -m build --wheel
     - name: Archive mpremote wheel
-      uses: actions/upload-artifact@v3
+      uses: actions/upload-artifact@v4
       with:
         name: mpremote
         path: |

From 06df3b29256e4e90abc61505a28852268cf64af7 Mon Sep 17 00:00:00 2001
From: Patrick Van Oosterwijck <patrick@silicognition.com>
Date: Wed, 17 Mar 2021 23:15:20 -0600
Subject: [PATCH 262/310] extmod/modonewire: Adopt Maxim recommended read
 timings.

The timing of the onewire module was way too fast when reading.  This
commit adopts read timings as recommended in Maxim application note 126:
6 us (pulse) / 9 us (sample) / 55 us (bit slot).  See also:
https://www.analog.com/en/technical-articles/1wire-communication-through-software.html

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modonewire.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/extmod/modonewire.c b/extmod/modonewire.c
index f440f75a82..dbd519776e 100644
--- a/extmod/modonewire.c
+++ b/extmod/modonewire.c
@@ -38,9 +38,9 @@
 #define TIMING_RESET1 (480)
 #define TIMING_RESET2 (70)
 #define TIMING_RESET3 (410)
-#define TIMING_READ1 (5)
-#define TIMING_READ2 (5)
-#define TIMING_READ3 (40)
+#define TIMING_READ1  (6)
+#define TIMING_READ2  (9)
+#define TIMING_READ3  (55)
 #define TIMING_WRITE1 (10)
 #define TIMING_WRITE2 (50)
 #define TIMING_WRITE3 (10)

From 2e101a8e44b7f1bff75cc06a0597c572a8d8d152 Mon Sep 17 00:00:00 2001
From: Elias Wimmer <elias.wimmer@tuwien.ac.at>
Date: Sun, 10 Dec 2023 23:25:14 +0100
Subject: [PATCH 263/310] extmod/modonewire: Improve write timings for better
 reliability.

When using long cables for sensors on onewire e.g. ds18b20, the current
default timings are too optimistic, leading to bus failures and CRC errors.

Stable results are achieved with the timings given by
https://www.analog.com/en/technical-articles/1wire-communication-through-software.html
---
 extmod/modonewire.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/extmod/modonewire.c b/extmod/modonewire.c
index dbd519776e..8444181810 100644
--- a/extmod/modonewire.c
+++ b/extmod/modonewire.c
@@ -41,8 +41,8 @@
 #define TIMING_READ1  (6)
 #define TIMING_READ2  (9)
 #define TIMING_READ3  (55)
-#define TIMING_WRITE1 (10)
-#define TIMING_WRITE2 (50)
+#define TIMING_WRITE1 (6)
+#define TIMING_WRITE2 (54)
 #define TIMING_WRITE3 (10)
 
 STATIC int onewire_bus_reset(mp_hal_pin_obj_t pin) {

From 0e706a62b168b7c2818f99d8785fe4dd31af9169 Mon Sep 17 00:00:00 2001
From: Trent Piepho <tpiepho@gmail.com>
Date: Thu, 14 Dec 2023 22:51:45 -0800
Subject: [PATCH 264/310] py/makeqstrdefs.py: Stop generating temporary
 intermediate file.

In "cat" mode, output was written to a file named "out", then moved to the
location of the real output file.  There was no reason for this.

While makeqstrdefs.py does make an effort to not update the timestamp on an
existing output file that has not changed, the intermediate "out" file
isn't part of the that process.

Signed-off-by: Trent Piepho <tpiepho@gmail.com>
---
 py/makeqstrdefs.py | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/py/makeqstrdefs.py b/py/makeqstrdefs.py
index bdc432d7dd..8e930ef506 100644
--- a/py/makeqstrdefs.py
+++ b/py/makeqstrdefs.py
@@ -138,15 +138,12 @@ def cat_together():
 
     hasher = hashlib.md5()
     all_lines = []
-    outf = open(args.output_dir + "/out", "wb")
     for fname in glob.glob(args.output_dir + "/*." + args.mode):
         with open(fname, "rb") as f:
             lines = f.readlines()
             all_lines += lines
     all_lines.sort()
     all_lines = b"\n".join(all_lines)
-    outf.write(all_lines)
-    outf.close()
     hasher.update(all_lines)
     new_hash = hasher.hexdigest()
     # print(new_hash)
@@ -165,12 +162,9 @@ def cat_together():
         mode_full = "Root pointer registrations"
     if old_hash != new_hash or not os.path.exists(args.output_file):
         print(mode_full, "updated")
-        try:
-            # rename below might fail if file exists
-            os.remove(args.output_file)
-        except:
-            pass
-        os.rename(args.output_dir + "/out", args.output_file)
+
+        with open(args.output_file, "wb") as outf:
+            outf.write(all_lines)
         with open(args.output_file + ".hash", "w") as f:
             f.write(new_hash)
     else:

From 395886caa3406a25790bd27e74ec63a96d8e5b4d Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 14 Dec 2023 17:06:56 +1100
Subject: [PATCH 265/310] extmod/modos: Factor os.dupterm_notify() function to
 common extmod code.

esp8266 doesn't need ets task because the notify is now scheduled (see
commits 7d57037906cf0274af08bd2eccbfffabe0ea66e3 and
c60caf19951c8326be9c3b6f3b016a4d21f69276 for relevant history).

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modos.c            | 16 ++++++++++++++++
 ports/esp32/modos.c       | 18 +++---------------
 ports/esp8266/esp_mphal.c | 27 ---------------------------
 ports/esp8266/esp_mphal.h |  4 ----
 ports/esp8266/main.c      |  1 -
 ports/esp8266/modos.c     | 17 ++---------------
 ports/mimxrt/modos.c      | 18 +++---------------
 ports/samd/modos.c        | 18 +++---------------
 8 files changed, 27 insertions(+), 92 deletions(-)

diff --git a/extmod/modos.c b/extmod/modos.c
index da14fd81f8..5a088b5202 100644
--- a/extmod/modos.c
+++ b/extmod/modos.c
@@ -24,6 +24,7 @@
  * THE SOFTWARE.
  */
 
+#include "py/mphal.h"
 #include "py/objstr.h"
 #include "py/runtime.h"
 
@@ -128,6 +129,21 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_0(mp_os_uname_obj, mp_os_uname);
 
 #endif
 
+#if MICROPY_PY_OS_DUPTERM_NOTIFY
+STATIC mp_obj_t mp_os_dupterm_notify(mp_obj_t obj_in) {
+    (void)obj_in;
+    for (;;) {
+        int c = mp_os_dupterm_rx_chr();
+        if (c < 0) {
+            break;
+        }
+        ringbuf_put(&stdin_ringbuf, c);
+    }
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_dupterm_notify_obj, mp_os_dupterm_notify);
+#endif
+
 STATIC const mp_rom_map_elem_t os_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_os) },
 
diff --git a/ports/esp32/modos.c b/ports/esp32/modos.c
index 287f1d9900..5b055eb979 100644
--- a/ports/esp32/modos.c
+++ b/ports/esp32/modos.c
@@ -27,6 +27,9 @@
  * THE SOFTWARE.
  */
 
+// This file is never compiled standalone, it's included directly from
+// extmod/modos.c via MICROPY_PY_OS_INCLUDEFILE.
+
 #include "esp_system.h"
 
 #include "py/runtime.h"
@@ -48,18 +51,3 @@ STATIC mp_obj_t mp_os_urandom(mp_obj_t num) {
     return mp_obj_new_bytes_from_vstr(&vstr);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_urandom_obj, mp_os_urandom);
-
-#if MICROPY_PY_OS_DUPTERM_NOTIFY
-STATIC mp_obj_t mp_os_dupterm_notify(mp_obj_t obj_in) {
-    (void)obj_in;
-    for (;;) {
-        int c = mp_os_dupterm_rx_chr();
-        if (c < 0) {
-            break;
-        }
-        ringbuf_put(&stdin_ringbuf, c);
-    }
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_dupterm_notify_obj, mp_os_dupterm_notify);
-#endif
diff --git a/ports/esp8266/esp_mphal.c b/ports/esp8266/esp_mphal.c
index 956cb2e649..394c9796c8 100644
--- a/ports/esp8266/esp_mphal.c
+++ b/ports/esp8266/esp_mphal.c
@@ -134,33 +134,6 @@ void MP_FASTCODE(mp_hal_signal_input)(void) {
     #endif
 }
 
-STATIC void dupterm_task_handler(os_event_t *evt) {
-    static byte lock;
-    if (lock) {
-        return;
-    }
-    lock = 1;
-    while (1) {
-        int c = mp_os_dupterm_rx_chr();
-        if (c < 0) {
-            break;
-        }
-        ringbuf_put(&stdin_ringbuf, c);
-    }
-    mp_hal_signal_input();
-    lock = 0;
-}
-
-STATIC os_event_t dupterm_evt_queue[4];
-
-void dupterm_task_init() {
-    system_os_task(dupterm_task_handler, DUPTERM_TASK_ID, dupterm_evt_queue, MP_ARRAY_SIZE(dupterm_evt_queue));
-}
-
-void mp_hal_signal_dupterm_input(void) {
-    system_os_post(DUPTERM_TASK_ID, 0, 0);
-}
-
 // this bit is unused in the Xtensa PS register
 #define ETS_LOOP_ITER_BIT (12)
 
diff --git a/ports/esp8266/esp_mphal.h b/ports/esp8266/esp_mphal.h
index 6fea6554b0..e677fa450d 100644
--- a/ports/esp8266/esp_mphal.h
+++ b/ports/esp8266/esp_mphal.h
@@ -41,8 +41,6 @@ extern const struct _mp_print_t mp_debug_print;
 extern ringbuf_t stdin_ringbuf;
 // Call this after putting data to stdin_ringbuf
 void mp_hal_signal_input(void);
-// Call this when data is available in dupterm object
-void mp_hal_signal_dupterm_input(void);
 
 // This variable counts how many times the UART is attached to dupterm
 extern int uart_attached_to_dupterm;
@@ -65,9 +63,7 @@ void mp_hal_set_interrupt_char(int c);
 uint32_t mp_hal_get_cpu_freq(void);
 
 #define UART_TASK_ID 0
-#define DUPTERM_TASK_ID 1
 void uart_task_init();
-void dupterm_task_init();
 
 uint32_t esp_disable_irq(void);
 void esp_enable_irq(uint32_t state);
diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c
index d0f52ed566..d774bbd35a 100644
--- a/ports/esp8266/main.c
+++ b/ports/esp8266/main.c
@@ -63,7 +63,6 @@ STATIC void mp_reset(void) {
     #endif
     pin_init0();
     readline_init0();
-    dupterm_task_init();
 
     // Activate UART(0) on dupterm slot 1 for the REPL
     {
diff --git a/ports/esp8266/modos.c b/ports/esp8266/modos.c
index 0ddcba2a32..32c6a06676 100644
--- a/ports/esp8266/modos.c
+++ b/ports/esp8266/modos.c
@@ -25,16 +25,10 @@
  * THE SOFTWARE.
  */
 
-#include <string.h>
+// This file is never compiled standalone, it's included directly from
+// extmod/modos.c via MICROPY_PY_OS_INCLUDEFILE.
 
-#include "py/objtuple.h"
-#include "py/objstr.h"
-#include "extmod/misc.h"
 #include "extmod/modmachine.h"
-#include "extmod/vfs.h"
-#include "extmod/vfs_fat.h"
-#include "extmod/vfs_lfs.h"
-#include "genhdr/mpversion.h"
 #include "user_interface.h"
 
 STATIC const char *mp_os_uname_release(void) {
@@ -60,10 +54,3 @@ void mp_os_dupterm_stream_detached_attached(mp_obj_t stream_detached, mp_obj_t s
         --uart_attached_to_dupterm;
     }
 }
-
-STATIC mp_obj_t mp_os_dupterm_notify(mp_obj_t obj_in) {
-    (void)obj_in;
-    mp_hal_signal_dupterm_input();
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_dupterm_notify_obj, mp_os_dupterm_notify);
diff --git a/ports/mimxrt/modos.c b/ports/mimxrt/modos.c
index ecfc3712d7..2ee8418152 100644
--- a/ports/mimxrt/modos.c
+++ b/ports/mimxrt/modos.c
@@ -28,6 +28,9 @@
  * THE SOFTWARE.
  */
 
+// This file is never compiled standalone, it's included directly from
+// extmod/modos.c via MICROPY_PY_OS_INCLUDEFILE.
+
 #include "py/runtime.h"
 #include "py/mphal.h"
 
@@ -108,18 +111,3 @@ STATIC mp_obj_t mp_os_urandom(mp_obj_t num) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_urandom_obj, mp_os_urandom);
 #endif
-
-#if MICROPY_PY_OS_DUPTERM_NOTIFY
-STATIC mp_obj_t mp_os_dupterm_notify(mp_obj_t obj_in) {
-    (void)obj_in;
-    for (;;) {
-        int c = mp_os_dupterm_rx_chr();
-        if (c < 0) {
-            break;
-        }
-        ringbuf_put(&stdin_ringbuf, c);
-    }
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_dupterm_notify_obj, mp_os_dupterm_notify);
-#endif
diff --git a/ports/samd/modos.c b/ports/samd/modos.c
index f9df0cd996..16b9eb0841 100644
--- a/ports/samd/modos.c
+++ b/ports/samd/modos.c
@@ -29,6 +29,9 @@
  * THE SOFTWARE.
  */
 
+// This file is never compiled standalone, it's included directly from
+// extmod/modos.c via MICROPY_PY_OS_INCLUDEFILE.
+
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "modmachine.h"
@@ -96,18 +99,3 @@ bool mp_os_dupterm_is_builtin_stream(mp_const_obj_t stream) {
     return type == &machine_uart_type;
 }
 #endif
-
-#if MICROPY_PY_OS_DUPTERM_NOTIFY
-STATIC mp_obj_t mp_os_dupterm_notify(mp_obj_t obj_in) {
-    (void)obj_in;
-    for (;;) {
-        int c = mp_os_dupterm_rx_chr();
-        if (c < 0) {
-            break;
-        }
-        ringbuf_put(&stdin_ringbuf, c);
-    }
-    return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_os_dupterm_notify_obj, mp_os_dupterm_notify);
-#endif

From 1f2ec4583d9095b49c0f775db74b2ceb49f12946 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 14 Dec 2023 17:08:04 +1100
Subject: [PATCH 266/310] extmod/os_dupterm: Prevent recursive execution of
 mp_os_dupterm_rx_chr.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/os_dupterm.c | 33 +++++++++++++++++++++++++++------
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/extmod/os_dupterm.c b/extmod/os_dupterm.c
index cfd1c62616..298983e9c9 100644
--- a/extmod/os_dupterm.c
+++ b/extmod/os_dupterm.c
@@ -94,6 +94,22 @@ uintptr_t mp_os_dupterm_poll(uintptr_t poll_flags) {
 }
 
 int mp_os_dupterm_rx_chr(void) {
+    #if MICROPY_PY_OS_DUPTERM_NOTIFY
+    // When os.dupterm_notify() is enabled it is usually called from a scheduled
+    // function, via mp_os_dupterm_notify().  That can lead to recursive calls of
+    // this function when this function is called from mp_hal_stdin_rx_chr():
+    // - mp_hal_stdin_rx_chr()
+    //  - mp_os_dupterm_rx_chr()
+    //   - <Python code>
+    //    - os.dupterm_notify() is scheduled via interrupt/event
+    //     - <Python code> runs scheduled code (eg WebREPL -> rp2.Flash().writeblocks())
+    //      - mp_os_dupterm_notify()
+    //       - mp_os_dupterm_rx_chr()
+    // Break that cycle by locking the scheduler during this function's duration.
+    mp_sched_lock();
+    #endif
+
+    int ret = -1; // no chars available
     for (size_t idx = 0; idx < MICROPY_PY_OS_DUPTERM; ++idx) {
         if (MP_STATE_VM(dupterm_objs[idx]) == MP_OBJ_NULL) {
             continue;
@@ -106,7 +122,8 @@ int mp_os_dupterm_rx_chr(void) {
             const mp_stream_p_t *stream_p = mp_get_stream(MP_STATE_VM(dupterm_objs[idx]));
             mp_uint_t out_sz = stream_p->read(MP_STATE_VM(dupterm_objs[idx]), buf, 1, &errcode);
             if (errcode == 0 && out_sz != 0) {
-                return buf[0];
+                ret = buf[0];
+                break;
             } else {
                 continue;
             }
@@ -132,20 +149,24 @@ int mp_os_dupterm_rx_chr(void) {
             } else {
                 // read 1 byte
                 nlr_pop();
-                if (buf[0] == mp_interrupt_char) {
+                ret = buf[0];
+                if (ret == mp_interrupt_char) {
                     // Signal keyboard interrupt to be raised as soon as the VM resumes
                     mp_sched_keyboard_interrupt();
-                    return -2;
+                    ret = -2;
                 }
-                return buf[0];
+                break;
             }
         } else {
             mp_os_deactivate(idx, "dupterm: Exception in read() method, deactivating: ", MP_OBJ_FROM_PTR(nlr.ret_val));
         }
     }
 
-    // No chars available
-    return -1;
+    #if MICROPY_PY_OS_DUPTERM_NOTIFY
+    mp_sched_unlock();
+    #endif
+
+    return ret;
 }
 
 void mp_os_dupterm_tx_strn(const char *str, size_t len) {

From a78ec4ef7b1fed5faa7fad9cc8d4c0b46af6d3c4 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 14 Dec 2023 19:21:27 +1100
Subject: [PATCH 267/310] rp2/mpconfigport: Enable
 MICROPY_PY_OS_DUPTERM_NOTIFY.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/mpconfigport.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index b349e0d67b..1cc9b96160 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -98,6 +98,7 @@
 #define MICROPY_PY_OS_INCLUDEFILE               "ports/rp2/modos.c"
 #ifndef MICROPY_PY_OS_DUPTERM
 #define MICROPY_PY_OS_DUPTERM                   (1)
+#define MICROPY_PY_OS_DUPTERM_NOTIFY            (1)
 #endif
 #define MICROPY_PY_OS_SYNC                      (1)
 #define MICROPY_PY_OS_UNAME                     (1)

From fbf079d7731c6402f7a852dd9fdc83a7106df910 Mon Sep 17 00:00:00 2001
From: Paul Grayson <paul@pololu.com>
Date: Tue, 4 Apr 2023 09:23:22 -0700
Subject: [PATCH 268/310] rp2: Add new NO_DEFAULT_PINS config options for i2c,
 spi, and uart.

Some boards have multiple options for these pins, and they don't want to
allow users to initialize a port without explicitly specifying pin numbers.

Signed-off-by: Paul Grayson <paul@pololu.com>
---
 ports/rp2/machine_i2c.c  | 19 +++++++++++++++++--
 ports/rp2/machine_spi.c  | 24 +++++++++++++++++++++---
 ports/rp2/machine_uart.c | 12 ++++++++++--
 3 files changed, 48 insertions(+), 7 deletions(-)

diff --git a/ports/rp2/machine_i2c.c b/ports/rp2/machine_i2c.c
index 570f05aaaf..9bea4be2ca 100644
--- a/ports/rp2/machine_i2c.c
+++ b/ports/rp2/machine_i2c.c
@@ -34,6 +34,20 @@
 #define DEFAULT_I2C_FREQ (400000)
 #define DEFAULT_I2C_TIMEOUT (50000)
 
+#ifdef MICROPY_HW_I2C_NO_DEFAULT_PINS
+
+// With no default I2C, need to require the pin args.
+#define MICROPY_HW_I2C0_SCL (0)
+#define MICROPY_HW_I2C0_SDA (0)
+#define MICROPY_HW_I2C1_SCL (0)
+#define MICROPY_HW_I2C1_SDA (0)
+#define MICROPY_I2C_PINS_ARG_OPTS MP_ARG_REQUIRED
+
+#else
+
+// Most boards do not require pin args.
+#define MICROPY_I2C_PINS_ARG_OPTS 0
+
 #ifndef MICROPY_HW_I2C0_SCL
 #if PICO_DEFAULT_I2C == 0
 #define MICROPY_HW_I2C0_SCL (PICO_DEFAULT_I2C_SCL_PIN)
@@ -53,6 +67,7 @@
 #define MICROPY_HW_I2C1_SDA (6)
 #endif
 #endif
+#endif
 
 // SDA/SCL on even/odd pins, I2C0/I2C1 on even/odd pairs of pins.
 #define IS_VALID_SCL(i2c, pin) (((pin) & 1) == 1 && (((pin) & 2) >> 1) == (i2c))
@@ -84,8 +99,8 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
     static const mp_arg_t allowed_args[] = {
         { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ },
         { MP_QSTR_freq, MP_ARG_INT, {.u_int = DEFAULT_I2C_FREQ} },
-        { MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
-        { MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_scl, MICROPY_I2C_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_sda, MICROPY_I2C_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_I2C_TIMEOUT} },
     };
 
diff --git a/ports/rp2/machine_spi.c b/ports/rp2/machine_spi.c
index a3b82a0bc4..fb8e9f56ca 100644
--- a/ports/rp2/machine_spi.c
+++ b/ports/rp2/machine_spi.c
@@ -38,6 +38,22 @@
 #define DEFAULT_SPI_BITS        (8)
 #define DEFAULT_SPI_FIRSTBIT    (SPI_MSB_FIRST)
 
+#ifdef MICROPY_HW_SPI_NO_DEFAULT_PINS
+
+// With no default SPI, need to require the pin args.
+#define MICROPY_HW_SPI0_SCK     (0)
+#define MICROPY_HW_SPI0_MOSI    (0)
+#define MICROPY_HW_SPI0_MISO    (0)
+#define MICROPY_HW_SPI1_SCK     (0)
+#define MICROPY_HW_SPI1_MOSI    (0)
+#define MICROPY_HW_SPI1_MISO    (0)
+#define MICROPY_SPI_PINS_ARG_OPTS MP_ARG_REQUIRED
+
+#else
+
+// Most boards do not require pin args.
+#define MICROPY_SPI_PINS_ARG_OPTS 0
+
 #ifndef MICROPY_HW_SPI0_SCK
 #if PICO_DEFAULT_SPI == 0
 #define MICROPY_HW_SPI0_SCK     (PICO_DEFAULT_SPI_SCK_PIN)
@@ -62,6 +78,8 @@
 #endif
 #endif
 
+#endif
+
 // SPI0 can be GP{0..7,16..23}, SPI1 can be GP{8..15,24..29}.
 #define IS_VALID_PERIPH(spi, pin)   ((((pin) & 8) >> 3) == (spi))
 // GP{2,6,10,14,...}
@@ -116,9 +134,9 @@ mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
         { MP_QSTR_phase,    MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SPI_PHASE} },
         { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SPI_BITS} },
         { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SPI_FIRSTBIT} },
-        { MP_QSTR_sck,      MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
-        { MP_QSTR_mosi,     MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
-        { MP_QSTR_miso,     MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_sck,      MICROPY_SPI_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_mosi,     MICROPY_SPI_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_miso,     MICROPY_SPI_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
     };
 
     // Parse the arguments.
diff --git a/ports/rp2/machine_uart.c b/ports/rp2/machine_uart.c
index e48924f09a..d751b7af07 100644
--- a/ports/rp2/machine_uart.c
+++ b/ports/rp2/machine_uart.c
@@ -40,6 +40,14 @@
 #define DEFAULT_UART_BITS (8)
 #define DEFAULT_UART_STOP (1)
 
+#ifdef MICROPY_HW_UART_NO_DEFAULT_PINS
+// With no default I2C, need to require the pin args.
+#define MICROPY_UART_PINS_ARG_OPTS MP_ARG_REQUIRED
+#else
+// Most boards do not require pin args.
+#define MICROPY_UART_PINS_ARG_OPTS 0
+#endif
+
 // UART 0 default pins
 #if !defined(MICROPY_HW_UART0_TX)
 #define MICROPY_HW_UART0_TX (0)
@@ -225,8 +233,8 @@ STATIC void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         { MP_QSTR_bits, MP_ARG_INT, {.u_int = -1} },
         { MP_QSTR_parity, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_INT(-1)} },
         { MP_QSTR_stop, MP_ARG_INT, {.u_int = -1} },
-        { MP_QSTR_tx, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
-        { MP_QSTR_rx, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_tx, MICROPY_UART_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_rx, MICROPY_UART_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_cts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_rts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },

From c51081c604f0dd0747d592d3d4952aac890f2c68 Mon Sep 17 00:00:00 2001
From: Paul Grayson <paul@pololu.com>
Date: Wed, 11 Oct 2023 11:28:47 -0700
Subject: [PATCH 269/310] rp2/boards: Add support for Pololu 3pi+ and Zumo
 robots.

Signed-off-by: Paul Grayson <paul@pololu.com>
---
 .../boards/POLOLU_3PI_2040_ROBOT/board.json   | 22 +++++++++++++
 .../POLOLU_3PI_2040_ROBOT/mpconfigboard.cmake |  1 +
 .../POLOLU_3PI_2040_ROBOT/mpconfigboard.h     | 18 +++++++++++
 .../rp2/boards/POLOLU_3PI_2040_ROBOT/pins.csv | 31 +++++++++++++++++++
 .../boards/POLOLU_ZUMO_2040_ROBOT/board.json  | 23 ++++++++++++++
 .../mpconfigboard.cmake                       |  5 +++
 .../POLOLU_ZUMO_2040_ROBOT/mpconfigboard.h    | 18 +++++++++++
 .../boards/POLOLU_ZUMO_2040_ROBOT/pins.csv    | 31 +++++++++++++++++++
 .../pololu_zumo_2040_robot.h                  | 26 ++++++++++++++++
 9 files changed, 175 insertions(+)
 create mode 100644 ports/rp2/boards/POLOLU_3PI_2040_ROBOT/board.json
 create mode 100644 ports/rp2/boards/POLOLU_3PI_2040_ROBOT/mpconfigboard.cmake
 create mode 100644 ports/rp2/boards/POLOLU_3PI_2040_ROBOT/mpconfigboard.h
 create mode 100644 ports/rp2/boards/POLOLU_3PI_2040_ROBOT/pins.csv
 create mode 100644 ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/board.json
 create mode 100644 ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/mpconfigboard.cmake
 create mode 100644 ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/mpconfigboard.h
 create mode 100644 ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/pins.csv
 create mode 100644 ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/pololu_zumo_2040_robot.h

diff --git a/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/board.json b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/board.json
new file mode 100644
index 0000000000..5358db627e
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/board.json
@@ -0,0 +1,22 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "USB-C",
+        "IMU",
+        "RGB LED",
+        "Display",
+        "Dual-core",
+        "External Flash"
+    ],
+    "images": [
+        "pololu_3pi_2040_robot.jpg"
+    ],
+    "mcu": "rp2040",
+    "product": "Pololu 3pi+ 2040 Robot",
+    "thumbnail": "",
+    "url": "https://www.pololu.com/3pi",
+    "vendor": "Pololu"
+}
diff --git a/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/mpconfigboard.cmake b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/mpconfigboard.cmake
new file mode 100644
index 0000000000..79273343d5
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/mpconfigboard.cmake
@@ -0,0 +1 @@
+# cmake file for Pololu 3pi+ 2040 Robot
diff --git a/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/mpconfigboard.h b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/mpconfigboard.h
new file mode 100644
index 0000000000..917f828e58
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/mpconfigboard.h
@@ -0,0 +1,18 @@
+#pragma once
+
+// Board and hardware specific configuration
+#define MICROPY_HW_BOARD_NAME                   "Pololu 3pi+ 2040 Robot"
+#define MICROPY_HW_FLASH_STORAGE_BYTES          (15 * 1024 * 1024)
+
+#define MICROPY_HW_USB_MSC (1)
+#define MICROPY_HW_USB_VID (0x1FFB)
+#define MICROPY_HW_USB_PID (0x2043)
+#define MICROPY_HW_USB_DESC_STR_MAX (40)
+#define MICROPY_HW_USB_MANUFACTURER_STRING "Pololu Corporation"
+#define MICROPY_HW_USB_PRODUCT_FS_STRING MICROPY_HW_BOARD_NAME " MicroPython"
+
+#define MICROPY_BANNER_MACHINE MICROPY_HW_BOARD_NAME
+
+#define MICROPY_HW_I2C_NO_DEFAULT_PINS (1)
+#define MICROPY_HW_SPI_NO_DEFAULT_PINS (1)
+#define MICROPY_HW_UART_NO_DEFAULT_PINS (1)
diff --git a/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/pins.csv b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/pins.csv
new file mode 100644
index 0000000000..11dc5ec8e4
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/pins.csv
@@ -0,0 +1,31 @@
+GP0,GPIO0
+GP1,GPIO1
+GP2,GPIO2
+GP3,GPIO3
+GP4,GPIO4
+GP5,GPIO5
+GP6,GPIO6
+GP7,GPIO7
+GP8,GPIO8
+GP9,GPIO9
+GP10,GPIO10
+GP11,GPIO11
+GP12,GPIO12
+GP13,GPIO13
+GP14,GPIO14
+GP15,GPIO15
+GP16,GPIO16
+GP17,GPIO17
+GP18,GPIO18
+GP19,GPIO19
+GP20,GPIO20
+GP21,GPIO21
+GP22,GPIO22
+GP23,GPIO23
+GP24,GPIO24
+GP25,GPIO25
+GP26,GPIO26
+GP27,GPIO27
+GP28,GPIO28
+GP29,GPIO29
+LED,GPIO25
diff --git a/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/board.json b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/board.json
new file mode 100644
index 0000000000..7ef383a9c4
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/board.json
@@ -0,0 +1,23 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "USB-C",
+        "JST-SH",
+        "IMU",
+        "RGB LED",
+        "Display",
+        "Dual-core",
+        "External Flash"
+    ],
+    "images": [
+        "pololu_zumo_2040_robot.jpg"
+    ],
+    "mcu": "rp2040",
+    "product": "Pololu Zumo 2040 Robot",
+    "thumbnail": "",
+    "url": "https://www.pololu.com/zumo",
+    "vendor": "Pololu"
+}
diff --git a/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/mpconfigboard.cmake b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/mpconfigboard.cmake
new file mode 100644
index 0000000000..4ed9173207
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/mpconfigboard.cmake
@@ -0,0 +1,5 @@
+# cmake file for Pololu Zumo 2040 Robot
+
+# This board is not yet in upstream pico-sdk, so define it here
+# See also: https://github.com/raspberrypi/pico-sdk/tree/master/src/boards/include/boards
+list(APPEND PICO_BOARD_HEADER_DIRS ${MICROPY_BOARD_DIR})
diff --git a/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/mpconfigboard.h b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/mpconfigboard.h
new file mode 100644
index 0000000000..c910014622
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/mpconfigboard.h
@@ -0,0 +1,18 @@
+#pragma once
+
+// Board and hardware specific configuration
+#define MICROPY_HW_BOARD_NAME                   "Pololu Zumo 2040 Robot"
+#define MICROPY_HW_FLASH_STORAGE_BYTES          (15 * 1024 * 1024)
+
+#define MICROPY_HW_USB_MSC (1)
+#define MICROPY_HW_USB_VID (0x1FFB)
+#define MICROPY_HW_USB_PID (0x2044)
+#define MICROPY_HW_USB_DESC_STR_MAX (40)
+#define MICROPY_HW_USB_MANUFACTURER_STRING "Pololu Corporation"
+#define MICROPY_HW_USB_PRODUCT_FS_STRING MICROPY_HW_BOARD_NAME " MicroPython"
+
+#define MICROPY_BANNER_MACHINE MICROPY_HW_BOARD_NAME
+
+#define MICROPY_HW_I2C_NO_DEFAULT_PINS (1)
+#define MICROPY_HW_SPI_NO_DEFAULT_PINS (1)
+#define MICROPY_HW_UART_NO_DEFAULT_PINS (1)
diff --git a/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/pins.csv b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/pins.csv
new file mode 100644
index 0000000000..11dc5ec8e4
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/pins.csv
@@ -0,0 +1,31 @@
+GP0,GPIO0
+GP1,GPIO1
+GP2,GPIO2
+GP3,GPIO3
+GP4,GPIO4
+GP5,GPIO5
+GP6,GPIO6
+GP7,GPIO7
+GP8,GPIO8
+GP9,GPIO9
+GP10,GPIO10
+GP11,GPIO11
+GP12,GPIO12
+GP13,GPIO13
+GP14,GPIO14
+GP15,GPIO15
+GP16,GPIO16
+GP17,GPIO17
+GP18,GPIO18
+GP19,GPIO19
+GP20,GPIO20
+GP21,GPIO21
+GP22,GPIO22
+GP23,GPIO23
+GP24,GPIO24
+GP25,GPIO25
+GP26,GPIO26
+GP27,GPIO27
+GP28,GPIO28
+GP29,GPIO29
+LED,GPIO25
diff --git a/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/pololu_zumo_2040_robot.h b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/pololu_zumo_2040_robot.h
new file mode 100644
index 0000000000..252cea981b
--- /dev/null
+++ b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/pololu_zumo_2040_robot.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+// -----------------------------------------------------
+// NOTE: THIS HEADER IS ALSO INCLUDED BY ASSEMBLER SO
+//       SHOULD ONLY CONSIST OF PREPROCESSOR DIRECTIVES
+// -----------------------------------------------------
+
+#ifndef _POLOLU_ZUMO_2040_ROBOT_H
+#define _POLOLU_ZUMO_2040_ROBOT_H
+
+// For board detection
+#define POLOLU_ZUMO_2040_ROBOT
+
+#define PICO_DEFAULT_LED_PIN 25
+#define PICO_BOOT_STAGE2_CHOOSE_W25Q080 1
+#define PICO_FLASH_SPI_CLKDIV 2
+#define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024)
+
+// All boards have at least the B1 revision
+#define PICO_RP2040_B0_SUPPORTED 0
+
+#endif

From 3270d856fda58585d44dd05aefa7a95551fa76cc Mon Sep 17 00:00:00 2001
From: Patrick Van Oosterwijck <patrick@silicognition.com>
Date: Sun, 30 Jul 2023 20:37:03 -0600
Subject: [PATCH 270/310] rp2/boards: Add SIL_RP2040_SHIM board by
 Silicognition LLC.

Add new board Silicognition RP2040-Shim, RP2040 with 4 MB of flash
and W5500 drivers included and configured by default for use with
the Silicognition PoE-FeatherWing.

Co-authored-by: Matt Trentini <matt.trentini@gmail.com>

Signed-off-by: Patrick Van Oosterwijck <patrick@silicognition.com>
---
 ports/rp2/boards/SIL_RP2040_SHIM/board.json   | 21 +++++++++
 ports/rp2/boards/SIL_RP2040_SHIM/deploy.md    |  7 +++
 ports/rp2/boards/SIL_RP2040_SHIM/manifest.py  |  3 ++
 .../SIL_RP2040_SHIM/mpconfigboard.cmake       |  5 +++
 .../boards/SIL_RP2040_SHIM/mpconfigboard.h    | 43 +++++++++++++++++++
 ports/rp2/boards/SIL_RP2040_SHIM/pins.csv     | 23 ++++++++++
 6 files changed, 102 insertions(+)
 create mode 100644 ports/rp2/boards/SIL_RP2040_SHIM/board.json
 create mode 100644 ports/rp2/boards/SIL_RP2040_SHIM/deploy.md
 create mode 100644 ports/rp2/boards/SIL_RP2040_SHIM/manifest.py
 create mode 100644 ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.cmake
 create mode 100644 ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.h
 create mode 100644 ports/rp2/boards/SIL_RP2040_SHIM/pins.csv

diff --git a/ports/rp2/boards/SIL_RP2040_SHIM/board.json b/ports/rp2/boards/SIL_RP2040_SHIM/board.json
new file mode 100644
index 0000000000..924957e1c3
--- /dev/null
+++ b/ports/rp2/boards/SIL_RP2040_SHIM/board.json
@@ -0,0 +1,21 @@
+{
+    "deploy": [
+        "deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "Dual-core",
+        "RGB LED",
+        "External Flash",
+        "USB"
+    ],
+    "images": [
+        "rp2040-shim-product.jpg",
+        "RP2040-Shim-pinout.png"
+    ],
+    "mcu": "rp2040",
+    "product": "RP2040-Shim",
+    "thumbnail": "",
+    "url": "https://silicognition.com/Products/rp2040-shim/",
+    "vendor": "Silicognition LLC"
+}
diff --git a/ports/rp2/boards/SIL_RP2040_SHIM/deploy.md b/ports/rp2/boards/SIL_RP2040_SHIM/deploy.md
new file mode 100644
index 0000000000..59dd27a75c
--- /dev/null
+++ b/ports/rp2/boards/SIL_RP2040_SHIM/deploy.md
@@ -0,0 +1,7 @@
+### Flashing via UF2 bootloader
+
+To get the board in bootloader mode ready for the firmware update, execute
+`machine.bootloader()` at the MicroPython REPL.  Alternatively, double press
+the reset button SW1.  The uf2 file below should then be copied to the USB mass
+storage device that appears.  Once programming of the new firmware is complete
+the device will automatically reset and be ready for use.
diff --git a/ports/rp2/boards/SIL_RP2040_SHIM/manifest.py b/ports/rp2/boards/SIL_RP2040_SHIM/manifest.py
new file mode 100644
index 0000000000..02d1874b52
--- /dev/null
+++ b/ports/rp2/boards/SIL_RP2040_SHIM/manifest.py
@@ -0,0 +1,3 @@
+include("$(PORT_DIR)/boards/manifest.py")
+
+require("bundle-networking")
diff --git a/ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.cmake b/ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.cmake
new file mode 100644
index 0000000000..62e5385b00
--- /dev/null
+++ b/ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.cmake
@@ -0,0 +1,5 @@
+# cmake file for Silicognition RP2040-Shim
+set(PICO_BOARD none)
+set(MICROPY_PY_NETWORK_WIZNET5K W5500)
+set(MICROPY_PY_LWIP 1)
+set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
diff --git a/ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.h b/ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.h
new file mode 100644
index 0000000000..ae2b35e96a
--- /dev/null
+++ b/ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.h
@@ -0,0 +1,43 @@
+// Board config for Silicognition RP2040-Shim
+
+#define MICROPY_HW_BOARD_NAME               "Silicognition RP2040-Shim"
+#define PICO_BOOT_STAGE2_CHOOSE_GENERIC_03H 1
+#ifndef PICO_FLASH_SIZE_BYTES
+#define PICO_FLASH_SIZE_BYTES               (4 * 1024 * 1024)
+#endif
+#define MICROPY_HW_FLASH_STORAGE_BYTES      (3 * 1024 * 1024)
+
+#define MICROPY_HW_USB_VID                  (0x1209)
+#define MICROPY_HW_USB_PID                  (0xF502)
+#undef  PICO_RP2040_B0_SUPPORTED
+#define PICO_RP2040_B0_SUPPORTED            0
+
+// Bus configuration
+#define MICROPY_HW_I2C0_SCL                 (17)
+#define MICROPY_HW_I2C0_SDA                 (16)
+
+#define MICROPY_HW_SPI0_SCK                 (18)
+#define MICROPY_HW_SPI0_MOSI                (19)
+#define MICROPY_HW_SPI0_MISO                (20)
+
+#define MICROPY_HW_SPI1_SCK                 (10)
+#define MICROPY_HW_SPI1_MOSI                (11)
+#define MICROPY_HW_SPI1_MISO                (12)
+
+// Enable networking
+#define MICROPY_PY_NETWORK                  (1)
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "RP2040-Shim"
+
+// Wiznet HW config
+#define MICROPY_HW_WIZNET_SPI_ID            (1)
+#define MICROPY_HW_WIZNET_SPI_BAUDRATE      (20 * 1000 * 1000)
+#define MICROPY_HW_WIZNET_SPI_SCK           (10)
+#define MICROPY_HW_WIZNET_SPI_MOSI          (11)
+#define MICROPY_HW_WIZNET_SPI_MISO          (12)
+#define MICROPY_HW_WIZNET_PIN_CS            (21)
+// Since the PoE-FeatherWing doesn't connect RST, map RST by
+// default to an unused pin
+#define MICROPY_HW_WIZNET_PIN_RST           (9)
+
+// NeoPixel GPIO23, power not toggleable
+// Red user LED GPIO22
diff --git a/ports/rp2/boards/SIL_RP2040_SHIM/pins.csv b/ports/rp2/boards/SIL_RP2040_SHIM/pins.csv
new file mode 100644
index 0000000000..3f2d293757
--- /dev/null
+++ b/ports/rp2/boards/SIL_RP2040_SHIM/pins.csv
@@ -0,0 +1,23 @@
+A0,GPIO29
+A1,GPIO28
+A2,GPIO27
+A3,GPIO26
+D24,GPIO24
+D25,GPIO25
+SCK,GPIO10
+MOSI,GPIO11
+MISO,GPIO12
+D0,GPIO1
+D1,GPIO0
+D4,GPIO6
+SDA,GPIO16
+SCL,GPIO17
+D5,GPIO18
+D6,GPIO19
+D9,GPIO20
+D10,GPIO21
+D11,GPIO15
+D12,GPIO14
+D13,GPIO22
+LED,GPIO22
+NEOPIXEL,GPIO23

From 97b13132b129963a48d8b7d2e44c932cc73f7db3 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 18 Dec 2023 13:32:36 +1100
Subject: [PATCH 271/310] py/gc: Improve calculation of new heap size in
 split-heap-auto mode.

There are two main changes here to improve the calculation of the size of
the next heap area when automatically expanding the heap:
- Compute the existing total size by counting the total number of GC
  blocks, and then using that to compute the corresponding number of bytes.
- Round the bytes value up to the nearest multiple of BYTES_PER_BLOCK.

This makes the calculation slightly simpler and more accurate, and makes
sure that, in the case of growing from one area to two areas, the number
of bytes allocated from the system for the second area is the same as the
first.  For example on esp32 with an initial area size of 65536 bytes, the
subsequent allocation is also 65536 bytes.  Previously it was a number that
was not even a multiple of 2.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/gc.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/py/gc.c b/py/gc.c
index 80e5f80360..b6969dfd42 100644
--- a/py/gc.c
+++ b/py/gc.c
@@ -282,14 +282,28 @@ STATIC bool gc_try_add_heap(size_t failed_alloc) {
     // - If the new heap won't fit in the available free space, add the largest
     //   new heap that will fit (this may lead to failed system heap allocations
     //   elsewhere, but some allocation will likely fail in this circumstance!)
-    size_t total_heap = 0;
+
+    // Compute total number of blocks in the current heap.
+    size_t total_blocks = 0;
     for (mp_state_mem_area_t *area = &MP_STATE_MEM(area);
          area != NULL;
          area = NEXT_AREA(area)) {
-        total_heap += area->gc_pool_end - area->gc_alloc_table_start;
-        total_heap += ALLOC_TABLE_GAP_BYTE + sizeof(mp_state_mem_area_t);
+        total_blocks += area->gc_alloc_table_byte_len * BLOCKS_PER_ATB;
     }
 
+    // Compute bytes needed to build a heap with total_blocks blocks.
+    size_t total_heap =
+        total_blocks / BLOCKS_PER_ATB
+        #if MICROPY_ENABLE_FINALISER
+        + total_blocks / BLOCKS_PER_FTB
+        #endif
+        + total_blocks * BYTES_PER_BLOCK
+        + ALLOC_TABLE_GAP_BYTE
+        + sizeof(mp_state_mem_area_t);
+
+    // Round up size to the nearest multiple of BYTES_PER_BLOCK.
+    total_heap = (total_heap + BYTES_PER_BLOCK - 1) & (~(BYTES_PER_BLOCK - 1));
+
     DEBUG_printf("total_heap " UINT_FMT " bytes\n", total_heap);
 
     size_t to_alloc = MIN(avail, MAX(total_heap, needed));

From f6d630877c3b31a5091dff2fd615ddb92189a46c Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 18 Dec 2023 13:38:16 +1100
Subject: [PATCH 272/310] esp32: Add MICROPY_GC_INITIAL_HEAP_SIZE option and
 tune it.

This gets back the old heap-size behaviour on ESP32, before auto-split-heap
was introduced: after the heap is grown one time the size is 111936 bytes,
with about 40k left for the IDF.  That's enough to start WiFi and do a
HTTPS request.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp32/main.c         |  8 ++------
 ports/esp32/mpconfigport.h | 14 ++++++++++++++
 2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/ports/esp32/main.c b/ports/esp32/main.c
index 8e5675c941..6f51b7236b 100644
--- a/ports/esp32/main.c
+++ b/ports/esp32/main.c
@@ -79,10 +79,6 @@
 #define MP_TASK_STACK_LIMIT_MARGIN (1024)
 #endif
 
-// Initial Python heap size. This starts small but adds new heap areas on
-// demand due to settings MICROPY_GC_SPLIT_HEAP & MICROPY_GC_SPLIT_HEAP_AUTO
-#define MP_TASK_HEAP_SIZE (64 * 1024)
-
 int vprintf_null(const char *format, va_list ap) {
     // do nothing: this is used as a log target during raw repl mode
     return 0;
@@ -120,13 +116,13 @@ void mp_task(void *pvParameter) {
         ESP_LOGE("esp_init", "can't create event loop: 0x%x\n", err);
     }
 
-    void *mp_task_heap = MP_PLAT_ALLOC_HEAP(MP_TASK_HEAP_SIZE);
+    void *mp_task_heap = MP_PLAT_ALLOC_HEAP(MICROPY_GC_INITIAL_HEAP_SIZE);
 
 soft_reset:
     // initialise the stack pointer for the main thread
     mp_stack_set_top((void *)sp);
     mp_stack_set_limit(MICROPY_TASK_STACK_SIZE - MP_TASK_STACK_LIMIT_MARGIN);
-    gc_init(mp_task_heap, mp_task_heap + MP_TASK_HEAP_SIZE);
+    gc_init(mp_task_heap, mp_task_heap + MICROPY_GC_INITIAL_HEAP_SIZE);
     mp_init();
     mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_lib));
     readline_init0();
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 5f5cd795e1..8937455992 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -26,6 +26,20 @@
 // memory allocation policies
 #define MICROPY_ALLOC_PATH_MAX              (128)
 
+// Initial Python heap size.  This starts small but adds new heap areas on demand due to
+// the settings MICROPY_GC_SPLIT_HEAP and MICROPY_GC_SPLIT_HEAP_AUTO.  The value is
+// different for different MCUs and is chosen so they can grow the heap once (double it)
+// and still have enough internal RAM to start WiFi and make a HTTPS request.
+#ifndef MICROPY_GC_INITIAL_HEAP_SIZE
+#if CONFIG_IDF_TARGET_ESP32
+#define MICROPY_GC_INITIAL_HEAP_SIZE        (56 * 1024)
+#elif CONFIG_IDF_TARGET_ESP32S2 && !CONFIG_SPIRAM
+#define MICROPY_GC_INITIAL_HEAP_SIZE        (36 * 1024)
+#else
+#define MICROPY_GC_INITIAL_HEAP_SIZE        (64 * 1024)
+#endif
+#endif
+
 // emitters
 #define MICROPY_PERSISTENT_CODE_LOAD        (1)
 #if !CONFIG_IDF_TARGET_ESP32C3

From f46269a1d16a5d0890bbc97d1141af7173050013 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 20 Dec 2023 15:54:05 +1100
Subject: [PATCH 273/310] extmod/asyncio: Remove non-working Stream
 __aenter__/__aexit__ methods.

It looks like these never worked and there are no tests for this
functionality.  Furthermore, CPython doesn't support this.

Fixes #12995.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/asyncio/stream.py | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/extmod/asyncio/stream.py b/extmod/asyncio/stream.py
index bcc2a13a86..cb0a804b5e 100644
--- a/extmod/asyncio/stream.py
+++ b/extmod/asyncio/stream.py
@@ -13,12 +13,6 @@ class Stream:
     def get_extra_info(self, v):
         return self.e[v]
 
-    async def __aenter__(self):
-        return self
-
-    async def __aexit__(self, exc_type, exc, tb):
-        await self.close()
-
     def close(self):
         pass
 

From 7cf1118831e71670dc237b5256a54856f6fdf0c2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 20 Sep 2023 19:07:45 +1000
Subject: [PATCH 274/310] stm32/usbdev: Optionally pass through vendor requests
 to Setup function.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/usbd_conf.h                   | 5 +++++
 ports/stm32/usbdev/core/src/usbd_ctlreq.c | 8 ++++++++
 2 files changed, 13 insertions(+)

diff --git a/ports/stm32/usbd_conf.h b/ports/stm32/usbd_conf.h
index 83805a6e4d..e61e7ce7ef 100644
--- a/ports/stm32/usbd_conf.h
+++ b/ports/stm32/usbd_conf.h
@@ -49,6 +49,11 @@
 #endif
 #define USBD_DEBUG_LEVEL                      0
 
+// Whether the core USBD driver passes through vendor device requests to the class implementation.
+#ifndef USBD_ENABLE_VENDOR_DEVICE_REQUESTS
+#define USBD_ENABLE_VENDOR_DEVICE_REQUESTS    (0)
+#endif
+
 // For MCUs with a device-only USB peripheral
 #define USBD_PMA_RESERVE                      (64)
 #define USBD_PMA_NUM_FIFO                     (16) // Maximum 8 endpoints, 2 FIFOs each
diff --git a/ports/stm32/usbdev/core/src/usbd_ctlreq.c b/ports/stm32/usbdev/core/src/usbd_ctlreq.c
index f25f252d64..97888918a8 100644
--- a/ports/stm32/usbdev/core/src/usbd_ctlreq.c
+++ b/ports/stm32/usbdev/core/src/usbd_ctlreq.c
@@ -120,6 +120,14 @@ USBD_StatusTypeDef  USBD_StdDevReq (USBD_HandleTypeDef *pdev , USBD_SetupReqType
 {
   USBD_StatusTypeDef ret = USBD_OK;
 
+  #if USBD_ENABLE_VENDOR_DEVICE_REQUESTS
+  // Pass through vendor device requests directly to the implementation.
+  // It must call `USBD_CtlError(pdev, req);` if it does not respond to the request.
+  if ((req->bmRequest & 0xe0) == 0xc0) {
+    return pdev->pClass->Setup (pdev, req);
+  }
+  #endif
+
   switch (req->bRequest)
   {
   case USB_REQ_GET_DESCRIPTOR:

From 859f219690db5a1b91865e0a70c2b71d19be42a6 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 20 Sep 2023 19:12:51 +1000
Subject: [PATCH 275/310] stm32/mboot: Guard use of tx_pending with
 USE_USB_POLLING option.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/mboot/main.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/ports/stm32/mboot/main.c b/ports/stm32/mboot/main.c
index afd4a2f1ce..40bcd23edc 100644
--- a/ports/stm32/mboot/main.c
+++ b/ports/stm32/mboot/main.c
@@ -966,7 +966,9 @@ static int dfu_handle_tx(int cmd, int arg, int len, uint8_t *buf, int max_len) {
 
 typedef struct _pyb_usbdd_obj_t {
     bool started;
+    #if USE_USB_POLLING
     bool tx_pending;
+    #endif
     USBD_HandleTypeDef hUSBDDevice;
 
     uint8_t bRequest;
@@ -1160,7 +1162,9 @@ static uint8_t pyb_usbdd_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *r
         // device-to-host request
         int len = dfu_handle_tx(self->bRequest, self->wValue, self->wLength, self->tx_buf, USB_XFER_SIZE);
         if (len >= 0) {
+            #if USE_USB_POLLING
             self->tx_pending = true;
+            #endif
             USBD_CtlSendData(&self->hUSBDDevice, self->tx_buf, len);
         }
     }
@@ -1168,9 +1172,10 @@ static uint8_t pyb_usbdd_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *r
 }
 
 static uint8_t pyb_usbdd_EP0_TxSent(USBD_HandleTypeDef *pdev) {
+    #if USE_USB_POLLING
     pyb_usbdd_obj_t *self = (pyb_usbdd_obj_t *)pdev->pClassData;
     self->tx_pending = false;
-    #if !USE_USB_POLLING
+    #else
     // Process now that we have sent a response
     dfu_process();
     #endif
@@ -1243,7 +1248,9 @@ static int pyb_usbdd_detect_port(void) {
 
 static void pyb_usbdd_init(pyb_usbdd_obj_t *self, int phy_id) {
     self->started = false;
+    #if USE_USB_POLLING
     self->tx_pending = false;
+    #endif
     USBD_HandleTypeDef *usbd = &self->hUSBDDevice;
     usbd->id = phy_id;
     usbd->dev_state = USBD_STATE_DEFAULT;

From 49d0c22b11732da3be622d7c550ecb4249bf17ac Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 20 Sep 2023 19:14:22 +1000
Subject: [PATCH 276/310] stm32/mboot: Expand device descriptor to make it
 easier to understand.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/mboot/main.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/ports/stm32/mboot/main.c b/ports/stm32/mboot/main.c
index 40bcd23edc..ed5ed1e3ff 100644
--- a/ports/stm32/mboot/main.c
+++ b/ports/stm32/mboot/main.c
@@ -1024,10 +1024,20 @@ __ALIGN_BEGIN static const uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __AL
 };
 
 static const uint8_t dev_descr[0x12] = {
-    0x12, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x40,
+    0x12, // bLength
+    0x01, // bDescriptorType: Device
+    0x00, 0x01, // USB version: 1.00
+    0x00, // bDeviceClass
+    0x00, // bDeviceSubClass
+    0x00, // bDeviceProtocol
+    0x40, // bMaxPacketSize
     LOBYTE(MBOOT_USB_VID), HIBYTE(MBOOT_USB_VID),
     LOBYTE(MBOOT_USB_PID), HIBYTE(MBOOT_USB_PID),
-    0x00, 0x22, 0x01, 0x02, 0x03, 0x01
+    0x00, 0x22, // bcdDevice: 22.00
+    0x01, // iManufacturer
+    0x02, // iProduct
+    0x03, // iSerialNumber
+    0x01, // bNumConfigurations: 1
 };
 
 // This may be modified by USBD_GetDescriptor

From e9bcd49b3ef7bcf69026c747411408061b3a46be Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 20 Sep 2023 19:15:05 +1000
Subject: [PATCH 277/310] stm32/mboot: Add support for Microsoft WCID.

This adds support to stm32's mboot for the Microsoft WCID USB 0xee string
and Compatible ID Feature Descriptor.  This allows the USB device to
automatically set the default USB driver, so that when the device is
plugged in Windows will assign the winusb driver to it.  This means that
USB DFU mode can be used without installing any drivers.

For example this page will work (allow the board to be updated over DFU)
with zero install: https://devanlai.github.io/webdfu/dfu-util/

Tested on Windows 10, Windows can read the 0xee string correctly, and
requests the second special descriptor, which then configures the USB
device to use the winusb driver.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/mboot/Makefile |  1 +
 ports/stm32/mboot/main.c   | 68 +++++++++++++++++++++++++++++++++++---
 2 files changed, 64 insertions(+), 5 deletions(-)

diff --git a/ports/stm32/mboot/Makefile b/ports/stm32/mboot/Makefile
index 7be5cca69d..389f9f5d0f 100755
--- a/ports/stm32/mboot/Makefile
+++ b/ports/stm32/mboot/Makefile
@@ -76,6 +76,7 @@ CFLAGS += -DLFS1_NO_MALLOC -DLFS1_NO_DEBUG -DLFS1_NO_WARN -DLFS1_NO_ERROR -DLFS1
 CFLAGS += -DLFS2_NO_MALLOC -DLFS2_NO_DEBUG -DLFS2_NO_WARN -DLFS2_NO_ERROR -DLFS2_NO_ASSERT -DLFS2_READONLY
 CFLAGS += -DBUILDING_MBOOT=$(BUILDING_MBOOT)
 CFLAGS += -DMICROPY_HW_STM32WB_FLASH_SYNCRONISATION=0
+CFLAGS += -DUSBD_ENABLE_VENDOR_DEVICE_REQUESTS=1
 CFLAGS += -DBOOTLOADER_DFU_USB_VID=$(BOOTLOADER_DFU_USB_VID) -DBOOTLOADER_DFU_USB_PID=$(BOOTLOADER_DFU_USB_PID)
 
 MBOOT_LD_FILES ?= stm32_memory.ld stm32_sections.ld
diff --git a/ports/stm32/mboot/main.c b/ports/stm32/mboot/main.c
index ed5ed1e3ff..d034996afb 100644
--- a/ports/stm32/mboot/main.c
+++ b/ports/stm32/mboot/main.c
@@ -1002,6 +1002,18 @@ typedef struct _pyb_usbdd_obj_t {
 #define MBOOT_USB_PID BOOTLOADER_DFU_USB_PID
 #endif
 
+// Special string descriptor value for Microsoft WCID support.
+// If the USB device responds to this string with the correct data (see msft100_str_desc)
+// then the Windows host will request further information about the configuration of
+// the device (see msft100_id).  This allows the device to set a Windows USB driver.
+// For more details about WCID see:
+// - https://github.com/pbatard/libwdi/wiki/WCID-Devices
+// - https://github.com/newaetech/naeusb/blob/main/wcid.md
+#define MSFT_WCID_STR_DESC_VALUE (0xee)
+
+// Vendor code, can be anything.
+#define MSFT100_VENDOR_CODE (0x42)
+
 #if !MICROPY_HW_USB_IS_MULTI_OTG
 STATIC const uint8_t usbd_fifo_size[USBD_PMA_NUM_FIFO] = {
     32, 32, // EP0(out), EP0(in)
@@ -1026,14 +1038,14 @@ __ALIGN_BEGIN static const uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __AL
 static const uint8_t dev_descr[0x12] = {
     0x12, // bLength
     0x01, // bDescriptorType: Device
-    0x00, 0x01, // USB version: 1.00
+    0x00, 0x02, // USB version: 2.00
     0x00, // bDeviceClass
     0x00, // bDeviceSubClass
     0x00, // bDeviceProtocol
     0x40, // bMaxPacketSize
     LOBYTE(MBOOT_USB_VID), HIBYTE(MBOOT_USB_VID),
     LOBYTE(MBOOT_USB_PID), HIBYTE(MBOOT_USB_PID),
-    0x00, 0x22, // bcdDevice: 22.00
+    0x00, 0x03, // bcdDevice: 3.00
     0x01, // iManufacturer
     0x02, // iProduct
     0x03, // iSerialNumber
@@ -1047,6 +1059,32 @@ static uint8_t cfg_descr[9 + 9 + 9] =
     "\x09\x21\x0b\xff\x00\x00\x08\x1a\x01" // \x00\x08 goes with USB_XFER_SIZE
 ;
 
+__ALIGN_BEGIN static const uint8_t msft100_str_desc[18] __ALIGN_END = {
+    0x12, 0x03,
+    'M', 0x00,
+    'S', 0x00,
+    'F', 0x00,
+    'T', 0x00,
+    '1', 0x00,
+    '0', 0x00,
+    '0', 0x00,
+    MSFT100_VENDOR_CODE,
+    0x00,
+};
+
+__ALIGN_BEGIN static const uint8_t msft100_id[40] __ALIGN_END = {
+    0x28, 0x00, 0x00, 0x00,
+    0x00, 0x01, // 1.00
+    0x04, 0x00,
+    0x01,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00,
+    0x01,
+    'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
 static uint8_t *pyb_usbdd_DeviceDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) {
     *length = USB_LEN_DEV_DESC;
     return (uint8_t *)dev_descr;
@@ -1131,6 +1169,10 @@ static uint8_t *pyb_usbdd_StrDescriptor(USBD_HandleTypeDef *pdev, uint8_t idx, u
             return str_desc;
         #endif
 
+        case MSFT_WCID_STR_DESC_VALUE:
+            *length = sizeof(msft100_str_desc);
+            return (uint8_t *)msft100_str_desc; // the data should only be read from this buf
+
         default:
             return NULL;
     }
@@ -1159,8 +1201,24 @@ static uint8_t pyb_usbdd_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *r
     self->bRequest = req->bRequest;
     self->wValue = req->wValue;
     self->wLength = req->wLength;
-    if (req->bmRequest == 0x21) {
-        // host-to-device request
+
+    if ((req->bmRequest & 0xe0) == 0xc0) {
+        // device-to-host vendor request
+        if (req->wIndex == 0x04 && req->bRequest == MSFT100_VENDOR_CODE) {
+            // WCID: Compatible ID Feature Descriptor
+            #if USE_USB_POLLING
+            self->tx_pending = true;
+            #endif
+            int len = MIN(req->wLength, 40);
+            memcpy(self->tx_buf, msft100_id, len);
+            USBD_CtlSendData(&self->hUSBDDevice, self->tx_buf, len);
+            return USBD_OK;
+        } else {
+            USBD_CtlError(pdev, req);
+            return USBD_OK;
+        }
+    } else if (req->bmRequest == 0x21) {
+        // host-to-device class request
         if (req->wLength == 0) {
             // no data, process command straight away
             dfu_handle_rx(self->bRequest, self->wValue, 0, NULL);
@@ -1169,7 +1227,7 @@ static uint8_t pyb_usbdd_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *r
             USBD_CtlPrepareRx(pdev, self->rx_buf, req->wLength);
         }
     } else if (req->bmRequest == 0xa1) {
-        // device-to-host request
+        // device-to-host class request
         int len = dfu_handle_tx(self->bRequest, self->wValue, self->wLength, self->tx_buf, USB_XFER_SIZE);
         if (len >= 0) {
             #if USE_USB_POLLING

From 8b24aa36ba978eafc6114b6798b47b7bfecdca26 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Mon, 6 Nov 2023 16:36:15 +1100
Subject: [PATCH 278/310] extmod/modselect: Handle growing the pollfds
 allocation correctly.

The poll_obj_t instances have their pollfd field point into this
allocation.  So if re-allocating results in a move, we need to update the
existing poll_obj_t's.

Update the test to cover this case.

Fixes issue #12887.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 extmod/modselect.c             | 38 ++++++++++++++++++++++++++++++++--
 tests/extmod/select_poll_fd.py | 13 +++++++++++-
 2 files changed, 48 insertions(+), 3 deletions(-)

diff --git a/extmod/modselect.c b/extmod/modselect.c
index 07ef3d79c8..9b81ba509f 100644
--- a/extmod/modselect.c
+++ b/extmod/modselect.c
@@ -41,6 +41,7 @@
 
 #if MICROPY_PY_SELECT_POSIX_OPTIMISATIONS
 
+#include <string.h>
 #include <poll.h>
 
 #if !((MP_STREAM_POLL_RD) == (POLLIN) && \
@@ -142,14 +143,47 @@ STATIC void poll_obj_set_revents(poll_obj_t *poll_obj, mp_uint_t revents) {
     }
 }
 
+// How much (in pollfds) to grow the allocation for poll_set->pollfds by.
+#define POLL_SET_ALLOC_INCREMENT (4)
+
 STATIC struct pollfd *poll_set_add_fd(poll_set_t *poll_set, int fd) {
     struct pollfd *free_slot = NULL;
 
     if (poll_set->used == poll_set->max_used) {
         // No free slots below max_used, so expand max_used (and possibly allocate).
         if (poll_set->max_used >= poll_set->alloc) {
-            poll_set->pollfds = m_renew(struct pollfd, poll_set->pollfds, poll_set->alloc, poll_set->alloc + 4);
-            poll_set->alloc += 4;
+            size_t new_alloc = poll_set->alloc + POLL_SET_ALLOC_INCREMENT;
+            // Try to grow in-place.
+            struct pollfd *new_fds = m_renew_maybe(struct pollfd, poll_set->pollfds, poll_set->alloc, new_alloc, false);
+            if (!new_fds) {
+                // Failed to grow in-place. Do a new allocation and copy over the pollfd values.
+                new_fds = m_new(struct pollfd, new_alloc);
+                memcpy(new_fds, poll_set->pollfds, sizeof(struct pollfd) * poll_set->alloc);
+
+                // Update existing poll_obj_t to update their pollfd field to
+                // point to the same offset inside the new allocation.
+                for (mp_uint_t i = 0; i < poll_set->map.alloc; ++i) {
+                    if (!mp_map_slot_is_filled(&poll_set->map, i)) {
+                        continue;
+                    }
+
+                    poll_obj_t *poll_obj = MP_OBJ_TO_PTR(poll_set->map.table[i].value);
+                    if (!poll_obj) {
+                        // This is the one we're currently adding,
+                        // poll_set_add_obj doesn't assign elem->value until
+                        // afterwards.
+                        continue;
+                    }
+
+                    poll_obj->pollfd = new_fds + (poll_obj->pollfd - poll_set->pollfds);
+                }
+
+                // Delete the old allocation.
+                m_del(struct pollfd, poll_set->pollfds, poll_set->alloc);
+            }
+
+            poll_set->pollfds = new_fds;
+            poll_set->alloc = new_alloc;
         }
         free_slot = &poll_set->pollfds[poll_set->max_used++];
     } else {
diff --git a/tests/extmod/select_poll_fd.py b/tests/extmod/select_poll_fd.py
index fab9c0e0e9..3677ab5712 100644
--- a/tests/extmod/select_poll_fd.py
+++ b/tests/extmod/select_poll_fd.py
@@ -34,11 +34,22 @@ poller.register(1, select.POLLIN)
 # Poll for input, should return an empty list.
 print(poller.poll(0))
 
-# Test registering a very large number of file descriptors.
+# Test registering a very large number of file descriptors (will trigger
+# EINVAL due to more than OPEN_MAX fds).
 poller = select.poll()
 for fd in range(6000):
     poller.register(fd)
 try:
     poller.poll()
+    assert False
 except OSError as er:
     print(er.errno == errno.EINVAL)
+
+# Register stdout/stderr, plus many extra ones to trigger the fd vector
+# resizing. Then unregister the excess ones and verify poll still works.
+poller = select.poll()
+for fd in range(1, 1000):
+    poller.register(fd)
+for i in range(3, 1000):
+    poller.unregister(i)
+print(sorted(poller.poll()))

From 74fd7b3d32e19a0c15ec1202cf03c31aa353a9f7 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Thu, 9 Nov 2023 17:36:09 +1100
Subject: [PATCH 279/310] tools/ci.sh: Set `ulimit -n` for unix CI.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 tests/extmod/select_poll_fd.py | 3 ++-
 tools/ci.sh                    | 3 +++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/tests/extmod/select_poll_fd.py b/tests/extmod/select_poll_fd.py
index 3677ab5712..3f7b5aa738 100644
--- a/tests/extmod/select_poll_fd.py
+++ b/tests/extmod/select_poll_fd.py
@@ -35,7 +35,8 @@ poller.register(1, select.POLLIN)
 print(poller.poll(0))
 
 # Test registering a very large number of file descriptors (will trigger
-# EINVAL due to more than OPEN_MAX fds).
+# EINVAL due to more than OPEN_MAX fds). Typically it's 1024 (and on GitHub CI
+# we force this via `ulimit -n 1024`).
 poller = select.poll()
 for fd in range(6000):
     poller.register(fd)
diff --git a/tools/ci.sh b/tools/ci.sh
index d3ae411582..95b1f19ffc 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -6,6 +6,9 @@ else
     MAKEOPTS="-j$(sysctl -n hw.ncpu)"
 fi
 
+# Ensure known OPEN_MAX (NO_FILES) limit.
+ulimit -n 1024
+
 ########################################################################################
 # general helper functions
 

From b31eef609497cd7e3c50841e1cf45f1610d39c73 Mon Sep 17 00:00:00 2001
From: IhorNehrutsa <IhorNehrutsa@gmail.com>
Date: Tue, 19 Dec 2023 16:28:06 +0200
Subject: [PATCH 280/310] extmod/modhashlib: Support MD5 with mbedtls 3.x.

This change was missd in e7ae3ad92d7540cbe349cc05f5d62e0f63fce59b.

Signed-off-by: IhorNehrutsa <Ihor.Nehrutsa@gmail.com>
---
 extmod/modhashlib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/extmod/modhashlib.c b/extmod/modhashlib.c
index 4cdc23fddc..263144a5c9 100644
--- a/extmod/modhashlib.c
+++ b/extmod/modhashlib.c
@@ -297,7 +297,7 @@ STATIC mp_obj_t hashlib_md5_digest(mp_obj_t self_in) {
 
 #if MICROPY_SSL_MBEDTLS
 
-#if MBEDTLS_VERSION_NUMBER < 0x02070000
+#if MBEDTLS_VERSION_NUMBER < 0x02070000 || MBEDTLS_VERSION_NUMBER >= 0x03000000
 #define mbedtls_md5_starts_ret mbedtls_md5_starts
 #define mbedtls_md5_update_ret mbedtls_md5_update
 #define mbedtls_md5_finish_ret mbedtls_md5_finish

From 5552896ca8064a71446030bd9524cff7558a0f83 Mon Sep 17 00:00:00 2001
From: IhorNehrutsa <IhorNehrutsa@gmail.com>
Date: Tue, 19 Dec 2023 16:28:06 +0200
Subject: [PATCH 281/310] esp32/mpconfigport: Enable MICROPY_PY_HASHLIB_MD5.

Signed-off-by: IhorNehrutsa <Ihor.Nehrutsa@gmail.com>
---
 ports/esp32/mpconfigport.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 8937455992..5dc4a9c758 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -101,6 +101,7 @@
 #define MICROPY_BLUETOOTH_NIMBLE            (1)
 #define MICROPY_BLUETOOTH_NIMBLE_BINDINGS_ONLY (1)
 #endif
+#define MICROPY_PY_HASHLIB_MD5              (1)
 #define MICROPY_PY_HASHLIB_SHA1             (1)
 #define MICROPY_PY_HASHLIB_SHA256           (1)
 #define MICROPY_PY_CRYPTOLIB                (1)

From 5d28bb4adb24094917038a506248ff7fb351ac44 Mon Sep 17 00:00:00 2001
From: Jim Mussared <jim.mussared@gmail.com>
Date: Tue, 19 Dec 2023 16:13:50 +1100
Subject: [PATCH 282/310] tools/manifestfile.py: Add support for external
 libraries.

This adds a `add_library(name, path)` method for use in manifest.py that
allows registering an external path (e.g. to another repo) by name.

This name can then be passed to `require("package", library="name")` to
reference packages in that repo/library rather than micropython-lib.

Within the external library, `require()` continues to work as normal
(referencing micropython-lib) by default, but they can also specify the
library name to require another package from that repo/library.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
---
 tools/manifestfile.py | 53 +++++++++++++++++++++++++++++++++++--------
 1 file changed, 43 insertions(+), 10 deletions(-)

diff --git a/tools/manifestfile.py b/tools/manifestfile.py
index 295170c34c..aa85c4650f 100644
--- a/tools/manifestfile.py
+++ b/tools/manifestfile.py
@@ -194,6 +194,8 @@ class ManifestFile:
         self._visited = set()
         # Stack of metadata for each level.
         self._metadata = [ManifestPackageMetadata()]
+        # Registered external libraries.
+        self._libraries = {}
 
     def _resolve_path(self, path):
         # Convert path to an absolute path, applying variable substitutions.
@@ -208,6 +210,7 @@ class ManifestFile:
             "metadata": self.metadata,
             "include": self.include,
             "require": self.require,
+            "add_library": self.add_library,
             "package": self.package,
             "module": self.module,
             "options": IncludeOptions(**kwargs),
@@ -388,14 +391,25 @@ class ManifestFile:
             if is_require:
                 self._metadata.pop()
 
-    def require(self, name, version=None, unix_ffi=False, pypi=None, **kwargs):
+    def _require_from_path(self, library_path, name, version, extra_kwargs):
+        for root, dirnames, filenames in os.walk(library_path):
+            if os.path.basename(root) == name and "manifest.py" in filenames:
+                self.include(root, is_require=True, **extra_kwargs)
+                return True
+        return False
+
+    def require(self, name, version=None, unix_ffi=False, pypi=None, library=None, **kwargs):
         """
-        Require a module by name from micropython-lib.
+        Require a package by name from micropython-lib.
 
         Optionally specify unix_ffi=True to use a module from the unix-ffi directory.
 
         Optionally specify pipy="package-name" to indicate that this should
         use the named package from PyPI when building for CPython.
+
+        Optionally specify library="name" to reference a package from a
+        library that has been previously registered with add_library(). Otherwise
+        micropython-lib will be used.
         """
         self._metadata[-1].check_initialised(self._mode)
 
@@ -406,27 +420,46 @@ class ManifestFile:
             self._pypi_dependencies.append(pypi)
             return
 
-        if self._path_vars["MPY_LIB_DIR"]:
+        if library is not None:
+            # Find package in external library.
+            if library not in self._libraries:
+                raise ValueError("Unknown library '{}' for require('{}').".format(library, name))
+            library_path = self._libraries[library]
+            # Search for {library_path}/**/{name}/manifest.py.
+            if not self._require_from_path(library_path, name, version, kwargs):
+                raise ValueError(
+                    "Package '{}' not found in external library '{}' ({}).".format(
+                        name, library, library_path
+                    )
+                )
+        elif self._path_vars["MPY_LIB_DIR"]:
+            # Find package in micropython-lib, in one of the three top-level directories.
             lib_dirs = ["micropython", "python-stdlib", "python-ecosys"]
             if unix_ffi:
-                # Search unix-ffi only if unix_ffi=True, and make unix-ffi modules
+                # Additionally search unix-ffi only if unix_ffi=True, and make unix-ffi modules
                 # take precedence.
                 lib_dirs = ["unix-ffi"] + lib_dirs
 
             for lib_dir in lib_dirs:
                 # Search for {lib_dir}/**/{name}/manifest.py.
-                for root, dirnames, filenames in os.walk(
-                    os.path.join(self._path_vars["MPY_LIB_DIR"], lib_dir)
+                if self._require_from_path(
+                    os.path.join(self._path_vars["MPY_LIB_DIR"], lib_dir), name, version, kwargs
                 ):
-                    if os.path.basename(root) == name and "manifest.py" in filenames:
-                        self.include(root, is_require=True, **kwargs)
-                        return
+                    return
 
-            raise ValueError("Library not found in local micropython-lib: {}".format(name))
+            raise ValueError("Package '{}' not found in local micropython-lib.".format(name))
         else:
             # TODO: HTTP request to obtain URLs from manifest.json.
             raise ValueError("micropython-lib not available for require('{}').", name)
 
+    def add_library(self, library, library_path):
+        """
+        Register the path to an external named library.
+
+        This allows require("name", library="library") to find packages in that library.
+        """
+        self._libraries[library] = self._resolve_path(library_path)
+
     def package(self, package_path, files=None, base_path=".", opt=None):
         """
         Define a package, optionally restricting to a set of files.

From 91ee8ac89405b7d063f334100b7ed0394d69fe02 Mon Sep 17 00:00:00 2001
From: Maarten van der Schrieck <maarten@thingsconnected.nl>
Date: Tue, 24 Oct 2023 23:10:45 +0200
Subject: [PATCH 283/310] extmod/os_dupterm: Let mp_os_dupterm_tx_strn() return
 num bytes written.

In case of multiple outputs, the minimum successful write length is
returned.  In line with this, in case any output has a write error, zero is
returned.

In case of no outputs, -1 is returned.

The return value can be used to assess whether writes were attempted, and
if so, whether they succeeded.

Signed-off-by: Maarten van der Schrieck <maarten@thingsconnected.nl>
---
 extmod/misc.h       |  6 ++++--
 extmod/os_dupterm.c | 20 +++++++++++++++++---
 2 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/extmod/misc.h b/extmod/misc.h
index 80e5b59a08..8ea51a981e 100644
--- a/extmod/misc.h
+++ b/extmod/misc.h
@@ -39,10 +39,12 @@ bool mp_os_dupterm_is_builtin_stream(mp_const_obj_t stream);
 void mp_os_dupterm_stream_detached_attached(mp_obj_t stream_detached, mp_obj_t stream_attached);
 uintptr_t mp_os_dupterm_poll(uintptr_t poll_flags);
 int mp_os_dupterm_rx_chr(void);
-void mp_os_dupterm_tx_strn(const char *str, size_t len);
+int mp_os_dupterm_tx_strn(const char *str, size_t len);
 void mp_os_deactivate(size_t dupterm_idx, const char *msg, mp_obj_t exc);
 #else
-#define mp_os_dupterm_tx_strn(s, l)
+static inline int mp_os_dupterm_tx_strn(const char *s, size_t l) {
+    return -1;
+}
 #endif
 
 #endif // MICROPY_INCLUDED_EXTMOD_MISC_H
diff --git a/extmod/os_dupterm.c b/extmod/os_dupterm.c
index 298983e9c9..dcd9c54b99 100644
--- a/extmod/os_dupterm.c
+++ b/extmod/os_dupterm.c
@@ -169,29 +169,43 @@ int mp_os_dupterm_rx_chr(void) {
     return ret;
 }
 
-void mp_os_dupterm_tx_strn(const char *str, size_t len) {
+int mp_os_dupterm_tx_strn(const char *str, size_t len) {
+    // Returns the minimum successful write length, or -1 if no write is attempted.
+    int ret = len;
+    bool did_write = false;
     for (size_t idx = 0; idx < MICROPY_PY_OS_DUPTERM; ++idx) {
         if (MP_STATE_VM(dupterm_objs[idx]) == MP_OBJ_NULL) {
             continue;
         }
+        did_write = true;
 
         #if MICROPY_PY_OS_DUPTERM_BUILTIN_STREAM
         if (mp_os_dupterm_is_builtin_stream(MP_STATE_VM(dupterm_objs[idx]))) {
             int errcode = 0;
             const mp_stream_p_t *stream_p = mp_get_stream(MP_STATE_VM(dupterm_objs[idx]));
-            stream_p->write(MP_STATE_VM(dupterm_objs[idx]), str, len, &errcode);
+            mp_uint_t written = stream_p->write(MP_STATE_VM(dupterm_objs[idx]), str, len, &errcode);
+            int write_res = MAX(0, written);
+            ret = MIN(write_res, ret);
             continue;
         }
         #endif
 
         nlr_buf_t nlr;
         if (nlr_push(&nlr) == 0) {
-            mp_stream_write(MP_STATE_VM(dupterm_objs[idx]), str, len, MP_STREAM_RW_WRITE);
+            mp_obj_t written = mp_stream_write(MP_STATE_VM(dupterm_objs[idx]), str, len, MP_STREAM_RW_WRITE);
+            if (written == mp_const_none) {
+                ret = 0;
+            } else if (mp_obj_is_small_int(written)) {
+                int written_int = MAX(0, MP_OBJ_SMALL_INT_VALUE(written));
+                ret = MIN(written_int, ret);
+            }
             nlr_pop();
         } else {
             mp_os_deactivate(idx, "dupterm: Exception in write() method, deactivating: ", MP_OBJ_FROM_PTR(nlr.ret_val));
+            ret = 0;
         }
     }
+    return did_write ? ret : -1;
 }
 
 STATIC mp_obj_t mp_os_dupterm(size_t n_args, const mp_obj_t *args) {

From 3bca93b2d00dec37b3770c3e4fac15f07e0b9f15 Mon Sep 17 00:00:00 2001
From: Maarten van der Schrieck <maarten@thingsconnected.nl>
Date: Sun, 18 Jun 2023 11:46:25 +0200
Subject: [PATCH 284/310] ports: Fix sys.stdout.buffer.write() return value.

MicroPython code may rely on the return value of sys.stdout.buffer.write()
to reflect the number of bytes actually written. While in most scenarios a
write() operation is successful, there are cases where it fails, leading to
data loss. This problem arises because, currently, write() merely returns
the number of bytes it was supposed to write, without indication of
failure.

One scenario where write() might fail, is where USB is used and the
receiving end doesn't read quickly enough to empty the receive buffer. In
that case, write() on the MicroPython side can timeout, resulting in the
loss of data without any indication, a behavior observed notably in
communication between a Pi Pico as a client and a Linux host using the ACM
driver.

A complex issue arises with mp_hal_stdout_tx_strn() when it involves
multiple outputs, such as USB, dupterm and hardware UART. The challenge is
in handling cases where writing to one output is successful, but another
fails, either fully or partially. This patch implements the following
solution:

mp_hal_stdout_tx_strn() attempts to write len bytes to all of the possible
destinations for that data, and returns the minimum successful write
length.

The implementation of this is complicated by several factors:
- multiple outputs may be enabled or disabled at compiled time
- multiple outputs may be enabled or disabled at runtime
- mp_os_dupterm_tx_strn() is one such output, optionally containing
  multiple additional outputs
- each of these outputs may or may not be able to report success
- each of these outputs may or may not be able to report partial writes

As a result, there's no single strategy that fits all ports, necessitating
unique logic for each instance of mp_hal_stdout_tx_strn().

Note that addressing sys.stdout.write() is more complex due to its data
modification process ("cooked" output), and it remains unchanged in this
patch. Developers who are concerned about accurate return values from
write operations should use sys.stdout.buffer.write().

This patch might disrupt some existing code, but it's also expected to
resolve issues, considering that the peculiar return value behavior of
sys.stdout.buffer.write() is not well-documented and likely not widely
known. Therefore, it's improbable that much existing code relies on the
previous behavior.

Signed-off-by: Maarten van der Schrieck <maarten@thingsconnected.nl>
---
 ports/cc3200/hal/cc3200_hal.c          |  9 +++++++--
 ports/esp32/mphalport.c                | 14 ++++++++++++--
 ports/esp8266/esp_mphal.c              | 10 ++++++++--
 ports/mimxrt/mphalport.c               | 17 ++++++++++++++---
 ports/minimal/uart_core.c              |  9 +++++++--
 ports/nrf/drivers/bluetooth/ble_uart.c |  6 ++++--
 ports/nrf/drivers/usb/usb_cdc.c        |  4 ++--
 ports/nrf/mphalport.c                  |  4 +++-
 ports/pic16bit/pic16bit_mphal.c        |  4 +++-
 ports/powerpc/uart_lpc_serial.c        |  3 ++-
 ports/powerpc/uart_potato.c            |  3 ++-
 ports/renesas-ra/mphalport.c           | 18 +++++++++++++++---
 ports/rp2/mphalport.c                  | 18 +++++++++++++++---
 ports/samd/mphalport.c                 | 17 ++++++++++++++---
 ports/stm32/mphalport.c                | 12 ++++++++++--
 ports/unix/unix_mphal.c                |  9 +++++++--
 ports/webassembly/mphalport.c          |  3 ++-
 ports/webassembly/mphalport.h          |  2 +-
 ports/windows/windows_mphal.c          |  5 +++--
 ports/zephyr/uart_core.c               |  4 +++-
 py/mphal.h                             |  2 +-
 shared/runtime/sys_stdio_mphal.c       |  3 +--
 22 files changed, 136 insertions(+), 40 deletions(-)

diff --git a/ports/cc3200/hal/cc3200_hal.c b/ports/cc3200/hal/cc3200_hal.c
index 56dd2b2b82..8bfd2fda1c 100644
--- a/ports/cc3200/hal/cc3200_hal.c
+++ b/ports/cc3200/hal/cc3200_hal.c
@@ -140,10 +140,15 @@ void mp_hal_delay_ms(mp_uint_t delay) {
     }
 }
 
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
-    mp_os_dupterm_tx_strn(str, len);
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
+    mp_uint_t ret = len;
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        ret = dupterm_res;
+    }
     // and also to telnet
     telnet_tx_strn(str, len);
+    return ret;
 }
 
 int mp_hal_stdin_rx_chr(void) {
diff --git a/ports/esp32/mphalport.c b/ports/esp32/mphalport.c
index 8e14bda595..fb322dff6d 100644
--- a/ports/esp32/mphalport.c
+++ b/ports/esp32/mphalport.c
@@ -125,24 +125,34 @@ int mp_hal_stdin_rx_chr(void) {
     }
 }
 
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
     // Only release the GIL if many characters are being sent
+    mp_uint_t ret = len;
+    bool did_write = false;
     bool release_gil = len > 20;
     if (release_gil) {
         MP_THREAD_GIL_EXIT();
     }
     #if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
     usb_serial_jtag_tx_strn(str, len);
+    did_write = true;
     #elif CONFIG_USB_OTG_SUPPORTED
     usb_tx_strn(str, len);
+    did_write = true;
     #endif
     #if MICROPY_HW_ENABLE_UART_REPL
     uart_stdout_tx_strn(str, len);
+    did_write = true;
     #endif
     if (release_gil) {
         MP_THREAD_GIL_ENTER();
     }
-    mp_os_dupterm_tx_strn(str, len);
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        did_write = true;
+        ret = MIN((mp_uint_t)dupterm_res, ret);
+    }
+    return did_write ? ret : 0;
 }
 
 uint32_t mp_hal_ticks_ms(void) {
diff --git a/ports/esp8266/esp_mphal.c b/ports/esp8266/esp_mphal.c
index 394c9796c8..6f158058d9 100644
--- a/ports/esp8266/esp_mphal.c
+++ b/ports/esp8266/esp_mphal.c
@@ -94,8 +94,14 @@ void mp_hal_debug_str(const char *str) {
 }
 #endif
 
-void mp_hal_stdout_tx_strn(const char *str, uint32_t len) {
-    mp_os_dupterm_tx_strn(str, len);
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, uint32_t len) {
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res < 0) {
+        // no outputs, nothing was written
+        return 0;
+    } else {
+        return dupterm_res;
+    }
 }
 
 void mp_hal_debug_tx_strn_cooked(void *env, const char *str, uint32_t len) {
diff --git a/ports/mimxrt/mphalport.c b/ports/mimxrt/mphalport.c
index 2114baaae4..be4b1d8b5c 100644
--- a/ports/mimxrt/mphalport.c
+++ b/ports/mimxrt/mphalport.c
@@ -112,9 +112,12 @@ int mp_hal_stdin_rx_chr(void) {
     }
 }
 
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+    mp_uint_t ret = len;
+    bool did_write = false;
     if (tud_cdc_connected()) {
-        for (size_t i = 0; i < len;) {
+        size_t i = 0;
+        while (i < len) {
             uint32_t n = len - i;
             if (n > CFG_TUD_CDC_EP_BUFSIZE) {
                 n = CFG_TUD_CDC_EP_BUFSIZE;
@@ -125,6 +128,7 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
                 MICROPY_EVENT_POLL_HOOK
             }
             if (ticks_us64() >= timeout) {
+                ret = i;
                 break;
             }
 
@@ -132,10 +136,17 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
             tud_cdc_write_flush();
             i += n2;
         }
+        did_write = true;
+        ret = MIN(i, ret);
     }
     #if MICROPY_PY_OS_DUPTERM
-    mp_os_dupterm_tx_strn(str, len);
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        did_write = true;
+        ret = MIN((mp_uint_t)dupterm_res, ret);
+    }
     #endif
+    return did_write ? ret : 0;
 }
 
 uint64_t mp_hal_time_ns(void) {
diff --git a/ports/minimal/uart_core.c b/ports/minimal/uart_core.c
index c7af24404b..a3dfe697e3 100644
--- a/ports/minimal/uart_core.c
+++ b/ports/minimal/uart_core.c
@@ -29,10 +29,14 @@ int mp_hal_stdin_rx_chr(void) {
 }
 
 // Send string of given length
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+    mp_uint_t ret = len;
     #if MICROPY_MIN_USE_STDOUT
     int r = write(STDOUT_FILENO, str, len);
-    (void)r;
+    if (r >= 0) {
+        // in case of an error in the syscall, report no bytes written
+        ret = 0;
+    }
     #elif MICROPY_MIN_USE_STM32_MCU
     while (len--) {
         // wait for TXE
@@ -41,4 +45,5 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
         USART1->DR = *str++;
     }
     #endif
+    return ret;
 }
diff --git a/ports/nrf/drivers/bluetooth/ble_uart.c b/ports/nrf/drivers/bluetooth/ble_uart.c
index 3206573703..4ea8115725 100644
--- a/ports/nrf/drivers/bluetooth/ble_uart.c
+++ b/ports/nrf/drivers/bluetooth/ble_uart.c
@@ -110,10 +110,11 @@ int mp_hal_stdin_rx_chr(void) {
     return (int)byte;
 }
 
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
     // Not connected: drop output
-    if (!ble_uart_enabled()) return;
+    if (!ble_uart_enabled()) return 0;
 
+    mp_uint_t ret = len;
     uint8_t *buf = (uint8_t *)str;
     size_t send_len;
 
@@ -134,6 +135,7 @@ void mp_hal_stdout_tx_strn(const char *str, size_t len) {
         len -= send_len;
         buf += send_len;
     }
+    return ret;
 }
 
 void ble_uart_tx_char(char c) {
diff --git a/ports/nrf/drivers/usb/usb_cdc.c b/ports/nrf/drivers/usb/usb_cdc.c
index e33a425482..3ca2acbf3d 100644
--- a/ports/nrf/drivers/usb/usb_cdc.c
+++ b/ports/nrf/drivers/usb/usb_cdc.c
@@ -231,12 +231,12 @@ int mp_hal_stdin_rx_chr(void) {
     return 0;
 }
 
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
-
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
     for (const char *top = str + len; str < top; str++) {
         ringbuf_put((ringbuf_t*)&tx_ringbuf, *str);
         usb_cdc_loop();
     }
+    return len;
 }
 
 void mp_hal_stdout_tx_strn_cooked(const char *str, mp_uint_t len) {
diff --git a/ports/nrf/mphalport.c b/ports/nrf/mphalport.c
index f6c934a8b5..c964a26c2e 100644
--- a/ports/nrf/mphalport.c
+++ b/ports/nrf/mphalport.c
@@ -196,10 +196,12 @@ int mp_hal_stdin_rx_chr(void) {
     return 0;
 }
 
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
     if (MP_STATE_VM(dupterm_objs[0]) != MP_OBJ_NULL) {
         uart_tx_strn(MP_STATE_VM(dupterm_objs[0]), str, len);
+        return len;
     }
+    return 0;
 }
 
 void mp_hal_stdout_tx_strn_cooked(const char *str, mp_uint_t len) {
diff --git a/ports/pic16bit/pic16bit_mphal.c b/ports/pic16bit/pic16bit_mphal.c
index b2c80ba1be..f58abf7831 100644
--- a/ports/pic16bit/pic16bit_mphal.c
+++ b/ports/pic16bit/pic16bit_mphal.c
@@ -75,10 +75,12 @@ void mp_hal_stdout_tx_str(const char *str) {
     mp_hal_stdout_tx_strn(str, strlen(str));
 }
 
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
+    mp_uint_t ret = len;
     for (; len > 0; --len) {
         uart_tx_char(*str++);
     }
+    return ret;
 }
 
 void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) {
diff --git a/ports/powerpc/uart_lpc_serial.c b/ports/powerpc/uart_lpc_serial.c
index 760615041c..405bf2d1e3 100644
--- a/ports/powerpc/uart_lpc_serial.c
+++ b/ports/powerpc/uart_lpc_serial.c
@@ -108,7 +108,7 @@ int mp_hal_stdin_rx_chr(void) {
 }
 
 
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
     int i;
     for (i = 0; i < len; i++) {
         while (lpc_uart_tx_full()) {
@@ -116,4 +116,5 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
         }
         lpc_uart_reg_write(REG_RBR, str[i]);
     }
+    return len;
 }
diff --git a/ports/powerpc/uart_potato.c b/ports/powerpc/uart_potato.c
index 29f21934dd..089e4e2be1 100644
--- a/ports/powerpc/uart_potato.c
+++ b/ports/powerpc/uart_potato.c
@@ -118,7 +118,7 @@ int mp_hal_stdin_rx_chr(void) {
     return (char)(val & 0x000000ff);
 }
 
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
     int i;
 
     for (i = 0; i < len; i++) {
@@ -129,4 +129,5 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
         }
         potato_uart_reg_write(POTATO_CONSOLE_TX, val);
     }
+    return len;
 }
diff --git a/ports/renesas-ra/mphalport.c b/ports/renesas-ra/mphalport.c
index 91705129cf..8a8bfd8dc7 100644
--- a/ports/renesas-ra/mphalport.c
+++ b/ports/renesas-ra/mphalport.c
@@ -154,16 +154,20 @@ int mp_hal_stdin_rx_chr(void) {
 }
 
 // Send string of given length
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+    mp_uint_t ret = len;
+    bool did_write = false;
     #if MICROPY_HW_ENABLE_UART_REPL
     if (MP_STATE_PORT(pyb_stdio_uart) != NULL) {
         uart_tx_strn(MP_STATE_PORT(pyb_stdio_uart), str, len);
+        did_write = true;
     }
     #endif
 
     #if MICROPY_HW_USB_CDC
     if (tud_cdc_connected()) {
-        for (size_t i = 0; i < len;) {
+        size_t i = 0;
+        while (i < len) {
             uint32_t n = len - i;
             if (n > CFG_TUD_CDC_EP_BUFSIZE) {
                 n = CFG_TUD_CDC_EP_BUFSIZE;
@@ -180,12 +184,20 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
             tud_cdc_write_flush();
             i += n2;
         }
+        ret = MIN(i, ret);
+        did_write = true;
     }
     #endif
 
     #if MICROPY_PY_OS_DUPTERM
-    mp_os_dupterm_tx_strn(str, len);
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        did_write = true;
+        ret = MIN((mp_uint_t)dupterm_res, ret);
+    }
     #endif
+
+    return did_write ? ret : 0;
 }
 
 void mp_hal_ticks_cpu_enable(void) {
diff --git a/ports/rp2/mphalport.c b/ports/rp2/mphalport.c
index 1c784fd737..c5ae221e98 100644
--- a/ports/rp2/mphalport.c
+++ b/ports/rp2/mphalport.c
@@ -151,14 +151,18 @@ int mp_hal_stdin_rx_chr(void) {
 }
 
 // Send string of given length
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+    mp_uint_t ret = len;
+    bool did_write = false;
     #if MICROPY_HW_ENABLE_UART_REPL
     mp_uart_write_strn(str, len);
+    did_write = true;
     #endif
 
     #if MICROPY_HW_USB_CDC
     if (tud_cdc_connected()) {
-        for (size_t i = 0; i < len;) {
+        size_t i = 0;
+        while (i < len) {
             uint32_t n = len - i;
             if (n > CFG_TUD_CDC_EP_BUFSIZE) {
                 n = CFG_TUD_CDC_EP_BUFSIZE;
@@ -173,18 +177,26 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
                 mp_usbd_task();
             }
             if (timeout >= MICROPY_HW_USB_CDC_TX_TIMEOUT) {
+                ret = i;
                 break;
             }
             uint32_t n2 = tud_cdc_write(str + i, n);
             tud_cdc_write_flush();
             i += n2;
         }
+        ret = MIN(i, ret);
+        did_write = true;
     }
     #endif
 
     #if MICROPY_PY_OS_DUPTERM
-    mp_os_dupterm_tx_strn(str, len);
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        did_write = true;
+        ret = MIN((mp_uint_t)dupterm_res, ret);
+    }
     #endif
+    return did_write ? ret : 0;
 }
 
 void mp_hal_delay_ms(mp_uint_t ms) {
diff --git a/ports/samd/mphalport.c b/ports/samd/mphalport.c
index 3c803403f2..de1650c991 100644
--- a/ports/samd/mphalport.c
+++ b/ports/samd/mphalport.c
@@ -200,9 +200,12 @@ int mp_hal_stdin_rx_chr(void) {
     }
 }
 
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+    mp_uint_t ret = len;
+    bool did_write = false;
     if (tud_cdc_connected()) {
-        for (size_t i = 0; i < len;) {
+        size_t i = 0;
+        while (i < len) {
             uint32_t n = len - i;
             if (n > CFG_TUD_CDC_EP_BUFSIZE) {
                 n = CFG_TUD_CDC_EP_BUFSIZE;
@@ -213,14 +216,22 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
                 MICROPY_EVENT_POLL_HOOK_WITH_USB;
             }
             if (timeout >= MICROPY_HW_USB_CDC_TX_TIMEOUT) {
+                ret = i;
                 break;
             }
             uint32_t n2 = tud_cdc_write(str + i, n);
             tud_cdc_write_flush();
             i += n2;
         }
+        ret = MIN(i, ret);
+        did_write = true;
     }
     #if MICROPY_PY_OS_DUPTERM
-    mp_os_dupterm_tx_strn(str, len);
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        did_write = true;
+        ret = MIN((mp_uint_t)dupterm_res, ret);
+    }
     #endif
+    return did_write ? ret : 0;
 }
diff --git a/ports/stm32/mphalport.c b/ports/stm32/mphalport.c
index f8a5d66fc9..dfd50cebd3 100644
--- a/ports/stm32/mphalport.c
+++ b/ports/stm32/mphalport.c
@@ -57,14 +57,22 @@ MP_WEAK int mp_hal_stdin_rx_chr(void) {
     }
 }
 
-MP_WEAK void mp_hal_stdout_tx_strn(const char *str, size_t len) {
+MP_WEAK mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
+    mp_uint_t ret = len;
+    bool did_write = false;
     if (MP_STATE_PORT(pyb_stdio_uart) != NULL) {
         uart_tx_strn(MP_STATE_PORT(pyb_stdio_uart), str, len);
+        did_write = true;
     }
     #if 0 && defined(USE_HOST_MODE) && MICROPY_HW_HAS_LCD
     lcd_print_strn(str, len);
     #endif
-    mp_os_dupterm_tx_strn(str, len);
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        did_write = true;
+        ret = MIN((mp_uint_t)dupterm_res, ret);
+    }
+    return did_write ? ret : 0;
 }
 
 #if __CORTEX_M >= 0x03
diff --git a/ports/unix/unix_mphal.c b/ports/unix/unix_mphal.c
index 8d6539c88e..24c0fa3cda 100644
--- a/ports/unix/unix_mphal.c
+++ b/ports/unix/unix_mphal.c
@@ -184,10 +184,15 @@ main_term:;
     return c;
 }
 
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
     ssize_t ret;
     MP_HAL_RETRY_SYSCALL(ret, write(STDOUT_FILENO, str, len), {});
-    mp_os_dupterm_tx_strn(str, len);
+    mp_uint_t written = ret < 0 ? 0 : ret;
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        written = MIN((mp_uint_t)dupterm_res, written);
+    }
+    return written;
 }
 
 // cooked is same as uncooked because the terminal does some postprocessing
diff --git a/ports/webassembly/mphalport.c b/ports/webassembly/mphalport.c
index c938a63928..f91a509013 100644
--- a/ports/webassembly/mphalport.c
+++ b/ports/webassembly/mphalport.c
@@ -27,8 +27,9 @@
 #include "library.h"
 #include "mphalport.h"
 
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
     mp_js_write(str, len);
+    return len;
 }
 
 void mp_hal_delay_ms(mp_uint_t ms) {
diff --git a/ports/webassembly/mphalport.h b/ports/webassembly/mphalport.h
index 89efee6974..1b31796986 100644
--- a/ports/webassembly/mphalport.h
+++ b/ports/webassembly/mphalport.h
@@ -28,7 +28,7 @@
 #include "shared/runtime/interrupt_char.h"
 
 #define mp_hal_stdin_rx_chr() (0)
-void mp_hal_stdout_tx_strn(const char *str, size_t len);
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len);
 
 void mp_hal_delay_ms(mp_uint_t ms);
 void mp_hal_delay_us(mp_uint_t us);
diff --git a/ports/windows/windows_mphal.c b/ports/windows/windows_mphal.c
index d1bbb931af..f88491707f 100644
--- a/ports/windows/windows_mphal.c
+++ b/ports/windows/windows_mphal.c
@@ -221,10 +221,11 @@ int mp_hal_stdin_rx_chr(void) {
     }
 }
 
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
     MP_THREAD_GIL_EXIT();
-    write(STDOUT_FILENO, str, len);
+    int ret = write(STDOUT_FILENO, str, len);
     MP_THREAD_GIL_ENTER();
+    return ret < 0 ? 0 : ret; // return the number of bytes written, so in case of an error in the syscall, return 0
 }
 
 void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) {
diff --git a/ports/zephyr/uart_core.c b/ports/zephyr/uart_core.c
index 1d37f22093..3f70cc0a17 100644
--- a/ports/zephyr/uart_core.c
+++ b/ports/zephyr/uart_core.c
@@ -44,7 +44,8 @@ int mp_hal_stdin_rx_chr(void) {
 }
 
 // Send string of given length
-void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
+    mp_uint_t ret = len;
     #ifdef CONFIG_CONSOLE_SUBSYS
     while (len--) {
         char c = *str++;
@@ -60,4 +61,5 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
         uart_poll_out(uart_console_dev, *str++);
     }
     #endif
+    return ret;
 }
diff --git a/py/mphal.h b/py/mphal.h
index 81cf50918e..a4f222d0b1 100644
--- a/py/mphal.h
+++ b/py/mphal.h
@@ -56,7 +56,7 @@ void mp_hal_stdout_tx_str(const char *str);
 #endif
 
 #ifndef mp_hal_stdout_tx_strn
-void mp_hal_stdout_tx_strn(const char *str, size_t len);
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len);
 #endif
 
 #ifndef mp_hal_stdout_tx_strn_cooked
diff --git a/shared/runtime/sys_stdio_mphal.c b/shared/runtime/sys_stdio_mphal.c
index 84ce5828ef..b7a35a5cba 100644
--- a/shared/runtime/sys_stdio_mphal.c
+++ b/shared/runtime/sys_stdio_mphal.c
@@ -142,8 +142,7 @@ STATIC mp_uint_t stdio_buffer_read(mp_obj_t self_in, void *buf, mp_uint_t size,
 }
 
 STATIC mp_uint_t stdio_buffer_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) {
-    mp_hal_stdout_tx_strn(buf, size);
-    return size;
+    return mp_hal_stdout_tx_strn(buf, size);
 }
 
 STATIC const mp_stream_p_t stdio_buffer_obj_stream_p = {

From ce42c9ee1659ff86337a7f528332b4eaed6df0fc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Peter=20Z=C3=BCger?= <zueger.peter@icloud.com>
Date: Thu, 21 Dec 2023 00:17:15 +0100
Subject: [PATCH 285/310] extmod/vfs_lfs: Fix lfs cache_size calculation.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The calculation of the lfs2 cache_size was incorrect, the maximum allowed
size is block_size.

The cache size must be: "a multiple of the read and program sizes, and a
factor of the block size".

Signed-off-by: Peter Züger <zueger.peter@icloud.com>
---
 extmod/vfs_lfsx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/extmod/vfs_lfsx.c b/extmod/vfs_lfsx.c
index fe0731eced..e78c154d1f 100644
--- a/extmod/vfs_lfsx.c
+++ b/extmod/vfs_lfsx.c
@@ -99,7 +99,7 @@ STATIC void MP_VFS_LFSx(init_config)(MP_OBJ_VFS_LFSx * self, mp_obj_t bdev, size
     config->lookahead_buffer = m_new(uint8_t, config->lookahead / 8);
     #else
     config->block_cycles = 100;
-    config->cache_size = 4 * MAX(read_size, prog_size);
+    config->cache_size = MIN(config->block_size, (4 * MAX(read_size, prog_size)));
     config->lookahead_size = lookahead;
     config->read_buffer = m_new(uint8_t, config->cache_size);
     config->prog_buffer = m_new(uint8_t, config->cache_size);

From d69e69adb689de91f97bc184c9ebc1022d0e4fc1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Peter=20Z=C3=BCger?= <zueger.peter@icloud.com>
Date: Thu, 21 Dec 2023 00:23:50 +0100
Subject: [PATCH 286/310] py/mkrules.mk: Fix dependency file generation for
 compiler wrappers.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

When compiling with distcc, it does not understand the -MD flag on its own.
This fixes the interaction by explicitly adding the -MF option.

The error in distcc is described here under "Problems with gcc -MD":
https://www.distcc.org/faq.html

Signed-off-by: Peter Züger <zueger.peter@icloud.com>
---
 py/mkrules.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/py/mkrules.mk b/py/mkrules.mk
index 7ecb2a5f66..30483feb5c 100644
--- a/py/mkrules.mk
+++ b/py/mkrules.mk
@@ -63,7 +63,7 @@ $(BUILD)/%.o: %.s
 
 define compile_c
 $(ECHO) "CC $<"
-$(Q)$(CC) $(CFLAGS) -c -MD -o $@ $< || (echo -e $(HELP_BUILD_ERROR); false)
+$(Q)$(CC) $(CFLAGS) -c -MD -MF $(@:.o=.d) -o $@ $< || (echo -e $(HELP_BUILD_ERROR); false)
 @# The following fixes the dependency file.
 @# See http://make.paulandlesley.org/autodep.html for details.
 @# Regex adjusted from the above to play better with Windows paths, etc.
@@ -75,7 +75,7 @@ endef
 
 define compile_cxx
 $(ECHO) "CXX $<"
-$(Q)$(CXX) $(CXXFLAGS) -c -MD -o $@ $< || (echo -e $(HELP_BUILD_ERROR); false)
+$(Q)$(CXX) $(CXXFLAGS) -c -MD -MF $(@:.o=.d) -o $@ $< || (echo -e $(HELP_BUILD_ERROR); false)
 @# The following fixes the dependency file.
 @# See http://make.paulandlesley.org/autodep.html for details.
 @# Regex adjusted from the above to play better with Windows paths, etc.

From e4d3ab33045274c8e31ca559afea20753dbb6b82 Mon Sep 17 00:00:00 2001
From: Sebastian Romero <s.romero@arduino.cc>
Date: Thu, 21 Dec 2023 17:42:19 +0100
Subject: [PATCH 287/310] nrf/main: Add /flash and /flash/lib to sys.path.

This allows to follow good practice and have libraries live in the lib
folder which means they will be found by the runtime without adding this
path manually at runtime.

Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
---
 ports/nrf/main.c         | 3 +++
 ports/nrf/qstrdefsport.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/ports/nrf/main.c b/ports/nrf/main.c
index bcd0bb9d71..0e5a26c487 100644
--- a/ports/nrf/main.c
+++ b/ports/nrf/main.c
@@ -191,6 +191,9 @@ soft_reset:
 
     if (ret != 0) {
         printf("MPY: can't mount flash\n");
+    } else {
+        mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash));
+        mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash_slash_lib));
     }
     #endif
 
diff --git a/ports/nrf/qstrdefsport.h b/ports/nrf/qstrdefsport.h
index f12cf40efa..273beb04e1 100644
--- a/ports/nrf/qstrdefsport.h
+++ b/ports/nrf/qstrdefsport.h
@@ -29,6 +29,7 @@
 
 // Entries for sys.path
 Q(/flash)
+Q(/flash/lib)
 
 // For os.sep
 Q(/)

From cfc212b10810863b7dee4f9228ce824ceca837c6 Mon Sep 17 00:00:00 2001
From: Nicko van Someren <nicko@nicko.org>
Date: Sat, 30 Sep 2023 16:54:47 -0600
Subject: [PATCH 288/310] rp2/rp2_dma: Introduce a new rp2.DMA class for
 control over DMA xfers.

This commit implements fairly complete support for the DMA controller in
the rp2 series of microcontrollers.  It provides a class for accessing the
DMA channels through a high-level, Pythonic interface, and functions for
setting and manipulating the DMA channel configurations.

Creating an instance of the rp2.DMA class claims one of the processor's DMA
channels.  A sensible, per-channel default value for the ctrl register can
be fetched from the DMA.pack_ctrl() function, and the components of this
register can be set via keyword arguments to pack_ctrl().

The read, write, count and ctrl attributes of the DMA class provide
read/write access to the respective registers of the DMA controller.  The
config() method allows any or all of these values to be set simultaneously
and adds a trigger keyword argument to allow the setup to immediately be
triggered.  The read and write attributes (or keywords in config()) accept
either actual addresses or any object that supports the buffer interface.
The active() method provides read/write control of the channel's activity,
allowing the user to start and stop the channel and test if it is running.

Standard MicroPython interrupt handlers are supported through the irq()
method and the channel can be released either by deleting it and allowing
it to be garbage-collected or with the explicit close() method.

Direct, unfettered access to the DMA controllers registers is provided
through a proxy memoryview() object returned by the DMA.registers attribute
that maps directly onto the memory-mapped registers.  This is necessary for
more fine-grained control and is helpful for allowing chaining of DMA
channels.

As a simple example, using DMA to do a fast memory copy just needs:

    src = bytearray(32*1024)
    dest = bytearray(32*1024)
    dma = rp2.DMA()
    dma.config(read=src, write=dest, count=len(src) // 4,
        ctrl=dma.pack_ctrl(), trigger=True)

    # Wait for completion
    while dma.active():
        pass

This API aims to strike a balance between simplicity and comprehensiveness.

Signed-off-by: Nicko van Someren <nicko@nicko.org>
Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/CMakeLists.txt |   2 +
 ports/rp2/main.c         |   2 +
 ports/rp2/modrp2.c       |   1 +
 ports/rp2/modrp2.h       |   4 +
 ports/rp2/rp2_dma.c      | 469 +++++++++++++++++++++++++++++++++++++++
 5 files changed, 478 insertions(+)
 create mode 100644 ports/rp2/rp2_dma.c

diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 5da54dc1c9..559ae23f52 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -132,6 +132,7 @@ set(MICROPY_SOURCE_PORT
     pendsv.c
     rp2_flash.c
     rp2_pio.c
+    rp2_dma.c
     uart.c
     usbd.c
     msc_disk.c
@@ -156,6 +157,7 @@ set(MICROPY_SOURCE_QSTR
     ${MICROPY_PORT_DIR}/modos.c
     ${MICROPY_PORT_DIR}/rp2_flash.c
     ${MICROPY_PORT_DIR}/rp2_pio.c
+    ${MICROPY_PORT_DIR}/rp2_dma.c
     ${CMAKE_BINARY_DIR}/pins_${MICROPY_BOARD}.c
 )
 
diff --git a/ports/rp2/main.c b/ports/rp2/main.c
index 8b41fac4ba..e63b8c03f0 100644
--- a/ports/rp2/main.c
+++ b/ports/rp2/main.c
@@ -159,6 +159,7 @@ int main(int argc, char **argv) {
         readline_init0();
         machine_pin_init();
         rp2_pio_init();
+        rp2_dma_init();
         machine_i2s_init0();
 
         #if MICROPY_PY_BLUETOOTH
@@ -207,6 +208,7 @@ int main(int argc, char **argv) {
         #if MICROPY_PY_NETWORK
         mod_network_deinit();
         #endif
+        rp2_dma_deinit();
         rp2_pio_deinit();
         #if MICROPY_PY_BLUETOOTH
         mp_bluetooth_deinit();
diff --git a/ports/rp2/modrp2.c b/ports/rp2/modrp2.c
index 7ccbcb40cb..bd00eaf40c 100644
--- a/ports/rp2/modrp2.c
+++ b/ports/rp2/modrp2.c
@@ -88,6 +88,7 @@ STATIC const mp_rom_map_elem_t rp2_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_Flash),               MP_ROM_PTR(&rp2_flash_type) },
     { MP_ROM_QSTR(MP_QSTR_PIO),                 MP_ROM_PTR(&rp2_pio_type) },
     { MP_ROM_QSTR(MP_QSTR_StateMachine),        MP_ROM_PTR(&rp2_state_machine_type) },
+    { MP_ROM_QSTR(MP_QSTR_DMA),                 MP_ROM_PTR(&rp2_dma_type) },
     { MP_ROM_QSTR(MP_QSTR_bootsel_button),      MP_ROM_PTR(&rp2_bootsel_button_obj) },
 
     #if MICROPY_PY_NETWORK_CYW43
diff --git a/ports/rp2/modrp2.h b/ports/rp2/modrp2.h
index 805c785f2d..9360acb4fb 100644
--- a/ports/rp2/modrp2.h
+++ b/ports/rp2/modrp2.h
@@ -31,8 +31,12 @@
 extern const mp_obj_type_t rp2_flash_type;
 extern const mp_obj_type_t rp2_pio_type;
 extern const mp_obj_type_t rp2_state_machine_type;
+extern const mp_obj_type_t rp2_dma_type;
 
 void rp2_pio_init(void);
 void rp2_pio_deinit(void);
 
+void rp2_dma_init(void);
+void rp2_dma_deinit(void);
+
 #endif // MICROPY_INCLUDED_RP2_MODRP2_H
diff --git a/ports/rp2/rp2_dma.c b/ports/rp2/rp2_dma.c
new file mode 100644
index 0000000000..acc18d08c5
--- /dev/null
+++ b/ports/rp2/rp2_dma.c
@@ -0,0 +1,469 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Nicko van Someren
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <string.h>
+
+#include "py/runtime.h"
+#include "py/mperrno.h"
+#include "py/objarray.h"
+#include "shared/runtime/mpirq.h"
+#include "modrp2.h"
+
+#include "hardware/irq.h"
+#include "hardware/dma.h"
+
+#define CHANNEL_CLOSED 0xff
+
+typedef struct _rp2_dma_ctrl_obj_t {
+    mp_obj_base_t base;
+    uint32_t value;
+} rp2_dma_config_obj_t;
+
+typedef struct _rp2_dma_obj_t {
+    mp_obj_base_t base;
+    uint8_t channel;
+    uint8_t irq_flag : 1;
+    uint8_t irq_trigger : 1;
+} rp2_dma_obj_t;
+
+typedef struct _rp2_dma_ctrl_field_t {
+    qstr name;
+    uint8_t shift : 5;
+    uint8_t length : 3;
+    uint8_t read_only : 1;
+} rp2_dma_ctrl_field_t;
+
+STATIC rp2_dma_ctrl_field_t rp2_dma_ctrl_fields_table[] = {
+    { MP_QSTR_enable,        0, 1, 0 },
+    { MP_QSTR_high_pri,      1, 1, 0 },
+    { MP_QSTR_size,          2, 2, 0 },
+    { MP_QSTR_inc_read,      4, 1, 0 },
+    { MP_QSTR_inc_write,     5, 1, 0 },
+    { MP_QSTR_ring_size,     6, 4, 0 },
+    { MP_QSTR_ring_sel,     10, 1, 0 },
+    { MP_QSTR_chain_to,     11, 4, 0 },
+    { MP_QSTR_treq_sel,     15, 6, 0 },
+    { MP_QSTR_irq_quiet,    21, 1, 0 },
+    { MP_QSTR_bswap,        22, 1, 0 },
+    { MP_QSTR_sniff_en,     23, 1, 0 },
+    { MP_QSTR_busy,         24, 1, 1 },
+    // bits 25 through 28 are reserved
+    { MP_QSTR_write_err,    29, 1, 0 },
+    { MP_QSTR_read_err,     30, 1, 0 },
+    { MP_QSTR_ahb_err,      31, 1, 1 },
+};
+
+STATIC const uint32_t rp2_dma_ctrl_field_count = MP_ARRAY_SIZE(rp2_dma_ctrl_fields_table);
+
+#define REG_TYPE_COUNT       0  // Accept just integers
+#define REG_TYPE_CONF        1  // Accept integers or ctrl values
+#define REG_TYPE_ADDR_READ   2  // Accept integers, buffers or objects that can be read from
+#define REG_TYPE_ADDR_WRITE  3  // Accept integers, buffers or objects that can be written to
+
+STATIC uint32_t rp2_dma_register_value_from_obj(mp_obj_t o, int reg_type) {
+    if (reg_type == REG_TYPE_ADDR_READ || reg_type == REG_TYPE_ADDR_WRITE) {
+        mp_buffer_info_t buf_info;
+        mp_uint_t flags = MP_BUFFER_READ;
+        if (mp_get_buffer(o, &buf_info, flags)) {
+            return (uint32_t)buf_info.buf;
+        }
+    }
+
+    return mp_obj_get_int_truncated(o);
+}
+
+STATIC void rp2_dma_irq_handler(void) {
+    // Main IRQ handler
+    uint32_t irq_bits = dma_hw->ints0;
+    dma_hw->ints0 = 0xffff;
+
+    for (int i = 0; i < NUM_DMA_CHANNELS; i++) {
+        if (irq_bits & (1u << i)) {
+            mp_irq_obj_t *handler = MP_STATE_PORT(rp2_dma_irq_obj[i]);
+            if (handler) {
+                rp2_dma_obj_t *self = (rp2_dma_obj_t *)handler->parent;
+                self->irq_flag = 1;
+                mp_irq_handler(handler);
+            } else {
+                // We got an interrupt with no handler. Disable the channel
+                dma_channel_set_irq0_enabled(i, false);
+            }
+        }
+    }
+}
+
+STATIC mp_uint_t rp2_dma_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) {
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    irq_set_enabled(DMA_IRQ_0, false);
+    self->irq_flag = 0;
+    dma_channel_set_irq0_enabled(self->channel, (new_trigger != 0));
+    irq_set_enabled(DMA_IRQ_0, true);
+    return 0;
+}
+
+STATIC mp_uint_t rp2_dma_irq_info(mp_obj_t self_in, mp_uint_t info_type) {
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (info_type == MP_IRQ_INFO_FLAGS) {
+        return self->irq_flag;
+    } else if (info_type == MP_IRQ_INFO_TRIGGERS) {
+        return (dma_hw->ints0 & (1u << self->channel)) != 0;
+    }
+    return 0;
+}
+
+STATIC const mp_irq_methods_t rp2_dma_irq_methods = {
+    .trigger = rp2_dma_irq_trigger,
+    .info = rp2_dma_irq_info,
+};
+
+STATIC mp_obj_t rp2_dma_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+    mp_arg_check_num(n_args, n_kw, 0, 0, false);
+
+    int dma_channel = dma_claim_unused_channel(false);
+    if (dma_channel < 0) {
+        mp_raise_OSError(MP_EBUSY);
+    }
+
+    rp2_dma_obj_t *self = m_new_obj_with_finaliser(rp2_dma_obj_t);
+    self->base.type = &rp2_dma_type;
+    self->channel = dma_channel;
+
+    // Return the DMA object.
+    return MP_OBJ_FROM_PTR(self);
+}
+
+STATIC void rp2_dma_error_if_closed(rp2_dma_obj_t *self) {
+    if (self->channel == CHANNEL_CLOSED) {
+        mp_raise_ValueError(MP_ERROR_TEXT("channel closed"));
+    }
+}
+
+STATIC void rp2_dma_attr(mp_obj_t self_in, qstr attr_in, mp_obj_t *dest) {
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(self_in);
+
+    if (dest[0] == MP_OBJ_NULL) {
+        // Load attribute
+        dma_channel_hw_t *reg_block = dma_channel_hw_addr(self->channel);
+        if (attr_in == MP_QSTR_read) {
+            rp2_dma_error_if_closed(self);
+            dest[0] = mp_obj_new_int_from_uint((mp_uint_t)reg_block->read_addr);
+        } else if (attr_in == MP_QSTR_write) {
+            rp2_dma_error_if_closed(self);
+            dest[0] = mp_obj_new_int_from_uint((mp_uint_t)reg_block->write_addr);
+        } else if (attr_in == MP_QSTR_count) {
+            rp2_dma_error_if_closed(self);
+            dest[0] = mp_obj_new_int_from_uint((mp_uint_t)reg_block->transfer_count);
+        } else if (attr_in == MP_QSTR_ctrl) {
+            rp2_dma_error_if_closed(self);
+            dest[0] = mp_obj_new_int_from_uint((mp_uint_t)reg_block->al1_ctrl);
+        } else if (attr_in == MP_QSTR_channel) {
+            dest[0] = mp_obj_new_int_from_uint(self->channel);
+        } else if (attr_in == MP_QSTR_registers) {
+            mp_obj_array_t *reg_view = m_new_obj(mp_obj_array_t);
+            mp_obj_memoryview_init(reg_view, 'I' | MP_OBJ_ARRAY_TYPECODE_FLAG_RW, 0, 16, dma_channel_hw_addr(self->channel));
+            dest[0] = reg_view;
+        } else {
+            // Continue attribute search in locals dict.
+            dest[1] = MP_OBJ_SENTINEL;
+        }
+    } else {
+        // Set or delete attribute
+        if (dest[1] == MP_OBJ_NULL) {
+            // We don't support deleting attributes.
+            return;
+        }
+
+        rp2_dma_error_if_closed(self);
+
+        if (attr_in == MP_QSTR_read) {
+            uint32_t value = rp2_dma_register_value_from_obj(dest[1], REG_TYPE_ADDR_READ);
+            dma_channel_set_read_addr(self->channel, (volatile void *)value, false);
+            dest[0] = MP_OBJ_NULL; // indicate success
+        } else if (attr_in == MP_QSTR_write) {
+            uint32_t value = rp2_dma_register_value_from_obj(dest[1], REG_TYPE_ADDR_WRITE);
+            dma_channel_set_write_addr(self->channel, (volatile void *)value, false);
+            dest[0] = MP_OBJ_NULL; // indicate success
+        } else if (attr_in == MP_QSTR_count) {
+            uint32_t value = rp2_dma_register_value_from_obj(dest[1], REG_TYPE_COUNT);
+            dma_channel_set_trans_count(self->channel, value, false);
+            dest[0] = MP_OBJ_NULL; // indicate success
+        } else if (attr_in == MP_QSTR_ctrl) {
+            uint32_t value = rp2_dma_register_value_from_obj(dest[1], REG_TYPE_CONF);
+            dma_channel_set_config(self->channel, (dma_channel_config *)&value, false);
+            dest[0] = MP_OBJ_NULL; // indicate success
+        }
+    }
+}
+
+STATIC void rp2_dma_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_printf(print, "DMA(%u)", self->channel);
+}
+
+// DMA.config(*, read, write, count, ctrl, trigger)
+STATIC mp_obj_t rp2_dma_config(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(*pos_args);
+
+    rp2_dma_error_if_closed(self);
+
+    enum {
+        ARG_read,
+        ARG_write,
+        ARG_count,
+        ARG_ctrl,
+        ARG_trigger,
+    };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_read,         MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_write,        MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_count,        MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_ctrl,         MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_trigger,      MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
+    };
+
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    // Don't include self in arg parsing
+    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+    // We only do anything if there was at least one argument
+    if (kw_args->used) {
+        bool trigger = args[ARG_trigger].u_bool;
+        mp_int_t value_count = trigger ? kw_args->used - 1 : kw_args->used;
+        if (trigger && (value_count == 0)) {
+            // Only a "true" trigger was passed; just start a transfer
+            dma_channel_start(self->channel);
+        } else {
+            if (args[ARG_read].u_obj != MP_OBJ_NULL) {
+                uint32_t value = rp2_dma_register_value_from_obj(args[ARG_read].u_obj, REG_TYPE_ADDR_READ);
+                value_count--;
+                dma_channel_set_read_addr(self->channel, (volatile void *)value, trigger && (value_count == 0));
+            }
+            if (args[ARG_write].u_obj != MP_OBJ_NULL) {
+                uint32_t value = rp2_dma_register_value_from_obj(args[ARG_write].u_obj, REG_TYPE_ADDR_WRITE);
+                value_count--;
+                dma_channel_set_write_addr(self->channel, (volatile void *)value, trigger && (value_count == 0));
+            }
+            if (args[ARG_count].u_obj != MP_OBJ_NULL) {
+                uint32_t value = rp2_dma_register_value_from_obj(args[ARG_count].u_obj, REG_TYPE_COUNT);
+                value_count--;
+                dma_channel_set_trans_count(self->channel, value, trigger && (value_count == 0));
+            }
+            if (args[ARG_ctrl].u_obj != MP_OBJ_NULL) {
+                uint32_t value = rp2_dma_register_value_from_obj(args[ARG_ctrl].u_obj, REG_TYPE_CONF);
+                value_count--;
+                dma_channel_set_config(self->channel, (dma_channel_config *)&value, trigger && (value_count == 0));
+            }
+        }
+    }
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(rp2_dma_config_obj, 1, rp2_dma_config);
+
+// DMA.active([value])
+STATIC mp_obj_t rp2_dma_active(size_t n_args, const mp_obj_t *args) {
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+    rp2_dma_error_if_closed(self);
+
+    if (n_args > 1) {
+        if (mp_obj_is_true(args[1])) {
+            dma_channel_start(self->channel);
+        } else {
+            dma_channel_abort(self->channel);
+        }
+    }
+
+    uint32_t busy = dma_channel_is_busy(self->channel);
+    return mp_obj_new_bool((mp_int_t)busy);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(rp2_dma_active_obj, 1, 2, rp2_dma_active);
+
+// Default is quiet, unpaced, read and write incrementing, word transfers, enabled
+#define DEFAULT_DMA_CONFIG (1 << 21) | (0x3f << 15) | (1 << 5) | (1 << 4) | (2 << 2) | (1 << 0)
+
+// DMA.pack_ctrl(...)
+STATIC mp_obj_t rp2_dma_pack_ctrl(size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    // Pack keyword settings into a control register value, using either the default for this
+    // DMA channel or the provided defaults
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+    mp_uint_t value = DEFAULT_DMA_CONFIG | ((self->channel & 0xf) << 11);
+
+    if (n_pos_args > 1) {
+        mp_raise_TypeError(MP_ERROR_TEXT("pack_ctrl only takes keyword arguments"));
+    }
+    mp_uint_t remaining = kw_args->used;
+
+    mp_map_elem_t *default_entry = mp_map_lookup(kw_args, MP_OBJ_NEW_QSTR(MP_QSTR_default), MP_MAP_LOOKUP);
+    if (default_entry) {
+        remaining--;
+        value = mp_obj_get_int_truncated(default_entry->value);
+    }
+
+    for (mp_uint_t i = 0; i < rp2_dma_ctrl_field_count; i++) {
+        mp_map_elem_t *field_entry = mp_map_lookup(
+            kw_args,
+            MP_OBJ_NEW_QSTR(rp2_dma_ctrl_fields_table[i].name),
+            MP_MAP_LOOKUP
+            );
+        if (field_entry) {
+            remaining--;
+            // Silently ignore read-only fields, to allow the passing of a modified unpack_ctrl() results
+            if (!rp2_dma_ctrl_fields_table[i].read_only) {
+                mp_uint_t field_value = mp_obj_get_int_truncated(field_entry->value);
+                mp_uint_t mask = ((1 << rp2_dma_ctrl_fields_table[i].length) - 1);
+                mp_uint_t masked_value = field_value & mask;
+                if (field_value != masked_value) {
+                    mp_raise_ValueError(MP_ERROR_TEXT("bad field value"));
+                }
+                value &= ~(mask << rp2_dma_ctrl_fields_table[i].shift);
+                value |= masked_value << rp2_dma_ctrl_fields_table[i].shift;
+            }
+        }
+    }
+
+    if (remaining) {
+        mp_raise_TypeError(NULL);
+    }
+
+    return mp_obj_new_int_from_uint(value);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(rp2_dma_pack_ctrl_obj, 1, rp2_dma_pack_ctrl);
+
+// DMA.unpack_ctrl(value)
+STATIC mp_obj_t rp2_dma_unpack_ctrl(mp_obj_t value_obj) {
+    // Return a dict representing the unpacked fields of a control register value
+    mp_obj_t result_dict[rp2_dma_ctrl_field_count * 2];
+
+    mp_uint_t value = mp_obj_get_int_truncated(value_obj);
+
+    for (mp_uint_t i = 0; i < rp2_dma_ctrl_field_count; i++) {
+        result_dict[i * 2] = MP_OBJ_NEW_QSTR(rp2_dma_ctrl_fields_table[i].name);
+        mp_uint_t field_value =
+            (value >> rp2_dma_ctrl_fields_table[i].shift) & ((1 << rp2_dma_ctrl_fields_table[i].length) - 1);
+        result_dict[i * 2 + 1] = MP_OBJ_NEW_SMALL_INT(field_value);
+    }
+
+    return mp_obj_dict_make_new(&mp_type_dict, 0, rp2_dma_ctrl_field_count, result_dict);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(rp2_dma_unpack_ctrl_fun_obj, rp2_dma_unpack_ctrl);
+STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(rp2_dma_unpack_ctrl_obj, MP_ROM_PTR(&rp2_dma_unpack_ctrl_fun_obj));
+
+STATIC mp_obj_t rp2_dma_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    enum { ARG_handler, ARG_hard };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_handler, MP_ARG_OBJ, {.u_rom_obj = mp_const_none} },
+        { MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} },
+    };
+
+    // Parse the arguments.
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // Get the IRQ object.
+    mp_irq_obj_t *irq = MP_STATE_PORT(rp2_dma_irq_obj[self->channel]);
+
+    // Allocate the IRQ object if it doesn't already exist.
+    if (irq == NULL) {
+        irq = mp_irq_new(&rp2_dma_irq_methods, MP_OBJ_FROM_PTR(self));
+        MP_STATE_PORT(rp2_dma_irq_obj[self->channel]) = irq;
+    }
+
+    if (n_args > 1 || kw_args->used != 0) {
+        // Disable all IRQs while data is updated.
+        irq_set_enabled(DMA_IRQ_0, false);
+
+        // Update IRQ data.
+        irq->handler = args[ARG_handler].u_obj;
+        irq->ishard = args[ARG_hard].u_bool;
+        self->irq_flag = 0;
+
+        // Enable IRQ if a handler is given.
+        bool enable = (args[ARG_handler].u_obj != mp_const_none);
+        dma_channel_set_irq0_enabled(self->channel, enable);
+
+        irq_set_enabled(DMA_IRQ_0, true);
+    }
+
+    return MP_OBJ_FROM_PTR(irq);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(rp2_dma_irq_obj, 1, rp2_dma_irq);
+
+// DMA.close()
+STATIC mp_obj_t rp2_dma_close(mp_obj_t self_in) {
+    rp2_dma_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    uint8_t channel = self->channel;
+
+    if (channel != CHANNEL_CLOSED) {
+        // Clean up interrupt handler to ensure garbage collection
+        mp_irq_obj_t *irq = MP_STATE_PORT(rp2_dma_irq_obj[channel]);
+        MP_STATE_PORT(rp2_dma_irq_obj[channel]) = MP_OBJ_NULL;
+        if (irq) {
+            irq->parent = MP_OBJ_NULL;
+            irq->handler = MP_OBJ_NULL;
+            dma_channel_set_irq0_enabled(channel, false);
+        }
+        dma_channel_unclaim(channel);
+        self->channel = CHANNEL_CLOSED;
+    }
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(rp2_dma_close_obj, rp2_dma_close);
+
+STATIC const mp_rom_map_elem_t rp2_dma_locals_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_config), MP_ROM_PTR(&rp2_dma_config_obj) },
+    { MP_ROM_QSTR(MP_QSTR_active), MP_ROM_PTR(&rp2_dma_active_obj) },
+    { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&rp2_dma_irq_obj) },
+    { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&rp2_dma_close_obj) },
+    { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&rp2_dma_close_obj) },
+    { MP_ROM_QSTR(MP_QSTR_pack_ctrl), MP_ROM_PTR(&rp2_dma_pack_ctrl_obj) },
+    { MP_ROM_QSTR(MP_QSTR_unpack_ctrl), MP_ROM_PTR(&rp2_dma_unpack_ctrl_obj) },
+};
+STATIC MP_DEFINE_CONST_DICT(rp2_dma_locals_dict, rp2_dma_locals_dict_table);
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    rp2_dma_type,
+    MP_QSTR_DMA,
+    MP_TYPE_FLAG_NONE,
+    make_new, rp2_dma_make_new,
+    print, rp2_dma_print,
+    attr, rp2_dma_attr,
+    locals_dict, &rp2_dma_locals_dict
+    );
+
+void rp2_dma_init(void) {
+    // Set up interrupts.
+    memset(MP_STATE_PORT(rp2_dma_irq_obj), 0, sizeof(MP_STATE_PORT(rp2_dma_irq_obj)));
+    irq_set_exclusive_handler(DMA_IRQ_0, rp2_dma_irq_handler);
+}
+
+void rp2_dma_deinit(void) {
+    // Disable and clear interrupts.
+    irq_set_mask_enabled(1u << DMA_IRQ_0, false);
+    irq_remove_handler(DMA_IRQ_0, rp2_dma_irq_handler);
+}
+
+MP_REGISTER_ROOT_POINTER(void *rp2_dma_irq_obj[NUM_DMA_CHANNELS]);

From 0b2676db5cc77ac1f19d3bfaaee713c22c5761a2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 22 Dec 2023 14:18:09 +1100
Subject: [PATCH 289/310] lib/micropython-lib: Update submodule to latest.

Signed-off-by: Damien George <damien@micropython.org>
---
 lib/micropython-lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/micropython-lib b/lib/micropython-lib
index e025c843b6..7cdf708815 160000
--- a/lib/micropython-lib
+++ b/lib/micropython-lib
@@ -1 +1 @@
-Subproject commit e025c843b60e93689f0f991d753010bb5bd6a722
+Subproject commit 7cdf70881519c73667efbc4a61a04d9c1a49babb

From d014c8282652d0e2643a9ba088445c542ad43450 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dani=C3=ABl=20van=20de=20Giessen?= <daniel@dvdgiessen.nl>
Date: Tue, 12 Sep 2023 14:38:30 +0200
Subject: [PATCH 290/310] extmod/nimble: Do not set GAP device name after sync.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Instead, configure the default once at compile-time. This means the GAP
name will no longer be set to default after re-initializing Bluetooth.

Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
---
 extmod/nimble/modbluetooth_nimble.c | 7 -------
 extmod/nimble/syscfg/syscfg.h       | 6 +++++-
 ports/esp32/boards/sdkconfig.ble    | 2 ++
 3 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/extmod/nimble/modbluetooth_nimble.c b/extmod/nimble/modbluetooth_nimble.c
index 2e1faa9b10..c053ac56cf 100644
--- a/extmod/nimble/modbluetooth_nimble.c
+++ b/extmod/nimble/modbluetooth_nimble.c
@@ -53,10 +53,6 @@
 #include "nimble/host/src/ble_hs_hci_priv.h"
 #endif
 
-#ifndef MICROPY_PY_BLUETOOTH_DEFAULT_GAP_NAME
-#define MICROPY_PY_BLUETOOTH_DEFAULT_GAP_NAME "MPY NIMBLE"
-#endif
-
 #define DEBUG_printf(...) // printf("nimble: " __VA_ARGS__)
 
 #define ERRNO_BLUETOOTH_NOT_ACTIVE MP_ENODEV
@@ -350,9 +346,6 @@ STATIC void sync_cb(void) {
         assert(rc == 0);
     }
 
-    DEBUG_printf("sync_cb: Setting device name\n");
-    ble_svc_gap_device_name_set(MICROPY_PY_BLUETOOTH_DEFAULT_GAP_NAME);
-
     mp_bluetooth_nimble_ble_state = MP_BLUETOOTH_NIMBLE_BLE_STATE_ACTIVE;
 }
 
diff --git a/extmod/nimble/syscfg/syscfg.h b/extmod/nimble/syscfg/syscfg.h
index a051a8fefd..f26f8db9ec 100644
--- a/extmod/nimble/syscfg/syscfg.h
+++ b/extmod/nimble/syscfg/syscfg.h
@@ -134,7 +134,11 @@ int nimble_sprintf(char *str, const char *fmt, ...);
 #define MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE (0)
 #define MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE_WRITE_PERM (-1)
 #define MYNEWT_VAL_BLE_SVC_GAP_CENTRAL_ADDRESS_RESOLUTION (-1)
-#define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME ("pybd")
+#ifdef MICROPY_PY_BLUETOOTH_DEFAULT_GAP_NAME
+#define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME (MICROPY_PY_BLUETOOTH_DEFAULT_GAP_NAME)
+#else
+#define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME ("MPY NIMBLE")
+#endif
 #define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_MAX_LENGTH (31)
 #define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_WRITE_PERM (-1)
 #define MYNEWT_VAL_BLE_SVC_GAP_PPCP_MAX_CONN_INTERVAL (0)
diff --git a/ports/esp32/boards/sdkconfig.ble b/ports/esp32/boards/sdkconfig.ble
index 91ac3240eb..7fa08fe286 100644
--- a/ports/esp32/boards/sdkconfig.ble
+++ b/ports/esp32/boards/sdkconfig.ble
@@ -3,6 +3,8 @@ CONFIG_BT_ENABLED=y
 CONFIG_BT_NIMBLE_ENABLED=y
 CONFIG_BT_CONTROLLER_ENABLED=y
 
+CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME="MPY ESP32"
+
 CONFIG_BT_NIMBLE_MAX_CONNECTIONS=4
 
 # Put NimBLE on core 1, and for synchronisation

From 9feb0689eeaca5ce88aedcc680f997a3b4d0221c Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 27 Dec 2023 15:35:31 +1100
Subject: [PATCH 291/310] all: Bump version to 1.22.0.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/mpconfig.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/py/mpconfig.h b/py/mpconfig.h
index c025bca260..66a083da45 100644
--- a/py/mpconfig.h
+++ b/py/mpconfig.h
@@ -32,7 +32,7 @@
 #define MICROPY_VERSION_MAJOR 1
 #define MICROPY_VERSION_MINOR 22
 #define MICROPY_VERSION_MICRO 0
-#define MICROPY_VERSION_PRERELEASE 1
+#define MICROPY_VERSION_PRERELEASE 0
 
 // Combined version as a 32-bit number for convenience to allow version
 // comparison. Doesn't include prerelease state.

From 4b4f6011e8d1b87a86c8b680b2aa0702fe8e1829 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 2 Jan 2024 01:03:13 +1100
Subject: [PATCH 292/310] rp2/rp2_flash: Lockout second core only when doing
 flash erase/write.

Using the multicore lockout feature in the general atomic section makes it
much more difficult to get correct.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/mpthreadport.c |  4 ----
 ports/rp2/rp2_flash.c    | 31 ++++++++++++++++++++++---------
 2 files changed, 22 insertions(+), 13 deletions(-)

diff --git a/ports/rp2/mpthreadport.c b/ports/rp2/mpthreadport.c
index 968de1f782..7bffabb335 100644
--- a/ports/rp2/mpthreadport.c
+++ b/ports/rp2/mpthreadport.c
@@ -52,9 +52,6 @@ uint32_t mp_thread_begin_atomic_section(void) {
         // When both cores are executing, we also need to provide
         // full mutual exclusion.
         mp_thread_mutex_lock(&atomic_mutex, 1);
-        // In case this atomic section is for flash access, then
-        // suspend the other core.
-        multicore_lockout_start_blocking();
     }
 
     return save_and_disable_interrupts();
@@ -64,7 +61,6 @@ void mp_thread_end_atomic_section(uint32_t state) {
     restore_interrupts(state);
 
     if (core1_entry) {
-        multicore_lockout_end_blocking();
         mp_thread_mutex_unlock(&atomic_mutex);
     }
 }
diff --git a/ports/rp2/rp2_flash.c b/ports/rp2/rp2_flash.c
index b1afe1cbd1..35c5164169 100644
--- a/ports/rp2/rp2_flash.c
+++ b/ports/rp2/rp2_flash.c
@@ -70,6 +70,22 @@ bi_decl(bi_block_device(
     BINARY_INFO_BLOCK_DEV_FLAG_WRITE |
     BINARY_INFO_BLOCK_DEV_FLAG_PT_UNKNOWN));
 
+// Flash erase and write must run with interrupts disabled and the other core suspended,
+// because the XIP bit gets disabled.
+static uint32_t begin_critical_flash_section(void) {
+    if (multicore_lockout_victim_is_initialized(1 - get_core_num())) {
+        multicore_lockout_start_blocking();
+    }
+    return save_and_disable_interrupts();
+}
+
+static void end_critical_flash_section(uint32_t state) {
+    restore_interrupts(state);
+    if (multicore_lockout_victim_is_initialized(1 - get_core_num())) {
+        multicore_lockout_end_blocking();
+    }
+}
+
 STATIC mp_obj_t rp2_flash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     // Parse arguments
     enum { ARG_start, ARG_len };
@@ -135,19 +151,17 @@ STATIC mp_obj_t rp2_flash_writeblocks(size_t n_args, const mp_obj_t *args) {
     mp_buffer_info_t bufinfo;
     mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_READ);
     if (n_args == 3) {
-        // Flash erase/program must run in an atomic section because the XIP bit gets disabled.
-        mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
+        mp_uint_t atomic_state = begin_critical_flash_section();
         flash_range_erase(self->flash_base + offset, bufinfo.len);
-        MICROPY_END_ATOMIC_SECTION(atomic_state);
+        end_critical_flash_section(atomic_state);
         mp_event_handle_nowait();
         // TODO check return value
     } else {
         offset += mp_obj_get_int(args[3]);
     }
-    // Flash erase/program must run in an atomic section because the XIP bit gets disabled.
-    mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
+    mp_uint_t atomic_state = begin_critical_flash_section();
     flash_range_program(self->flash_base + offset, bufinfo.buf, bufinfo.len);
-    MICROPY_END_ATOMIC_SECTION(atomic_state);
+    end_critical_flash_section(atomic_state);
     mp_event_handle_nowait();
     // TODO check return value
     return mp_const_none;
@@ -170,10 +184,9 @@ STATIC mp_obj_t rp2_flash_ioctl(mp_obj_t self_in, mp_obj_t cmd_in, mp_obj_t arg_
             return MP_OBJ_NEW_SMALL_INT(BLOCK_SIZE_BYTES);
         case MP_BLOCKDEV_IOCTL_BLOCK_ERASE: {
             uint32_t offset = mp_obj_get_int(arg_in) * BLOCK_SIZE_BYTES;
-            // Flash erase/program must run in an atomic section because the XIP bit gets disabled.
-            mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
+            mp_uint_t atomic_state = begin_critical_flash_section();
             flash_range_erase(self->flash_base + offset, BLOCK_SIZE_BYTES);
-            MICROPY_END_ATOMIC_SECTION(atomic_state);
+            end_critical_flash_section(atomic_state);
             // TODO check return value
             return MP_OBJ_NEW_SMALL_INT(0);
         }

From 61b8361f5f98eba0e0ebd747ca7ef6259d3790d9 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 2 Jan 2024 14:45:44 +1100
Subject: [PATCH 293/310] rp2/mutex_extra: Implement additional mutex
 functions.

These allow entering/exiting a mutex and also disabling/restoring
interrupts, in an atomic way.

Signed-off-by: Damien George <damien@micropython.org>
---
 LICENSE                  |  2 ++
 ports/rp2/CMakeLists.txt |  1 +
 ports/rp2/mutex_extra.c  | 30 ++++++++++++++++++++++++++++++
 ports/rp2/mutex_extra.h  | 34 ++++++++++++++++++++++++++++++++++
 4 files changed, 67 insertions(+)
 create mode 100644 ports/rp2/mutex_extra.c
 create mode 100644 ports/rp2/mutex_extra.h

diff --git a/LICENSE b/LICENSE
index 9bd457b42a..b85f31808a 100644
--- a/LICENSE
+++ b/LICENSE
@@ -69,6 +69,8 @@ used during the build process and is not part of the compiled source code.
             /FreeRTOS (GPL-2.0 with FreeRTOS exception)
         /esp32
             /ppp_set_auth.* (Apache-2.0)
+        /rp2
+            /mutex_extra.c (BSD-3-clause)
         /stm32
             /usbd*.c (MCD-ST Liberty SW License Agreement V2)
             /stm32_it.* (MIT + BSD-3-clause)
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 559ae23f52..281b0c3bc2 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -129,6 +129,7 @@ set(MICROPY_SOURCE_PORT
     mphalport.c
     mpnetworkport.c
     mpthreadport.c
+    mutex_extra.c
     pendsv.c
     rp2_flash.c
     rp2_pio.c
diff --git a/ports/rp2/mutex_extra.c b/ports/rp2/mutex_extra.c
new file mode 100644
index 0000000000..6df57e64ce
--- /dev/null
+++ b/ports/rp2/mutex_extra.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "mutex_extra.h"
+
+// These functions are taken from lib/pico-sdk/src/common/pico_sync/mutex.c and modified
+// so that they atomically obtain the mutex and disable interrupts.
+
+uint32_t __time_critical_func(mutex_enter_blocking_and_disable_interrupts)(mutex_t * mtx) {
+    lock_owner_id_t caller = lock_get_caller_owner_id();
+    do {
+        uint32_t save = spin_lock_blocking(mtx->core.spin_lock);
+        if (!lock_is_owner_id_valid(mtx->owner)) {
+            mtx->owner = caller;
+            spin_unlock_unsafe(mtx->core.spin_lock);
+            return save;
+        }
+        lock_internal_spin_unlock_with_wait(&mtx->core, save);
+    } while (true);
+}
+
+void __time_critical_func(mutex_exit_and_restore_interrupts)(mutex_t * mtx, uint32_t save) {
+    spin_lock_unsafe_blocking(mtx->core.spin_lock);
+    assert(lock_is_owner_id_valid(mtx->owner));
+    mtx->owner = LOCK_INVALID_OWNER_ID;
+    lock_internal_spin_unlock_with_notify(&mtx->core, save);
+}
diff --git a/ports/rp2/mutex_extra.h b/ports/rp2/mutex_extra.h
new file mode 100644
index 0000000000..be7cb96dcc
--- /dev/null
+++ b/ports/rp2/mutex_extra.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_RP2_MUTEX_EXTRA_H
+#define MICROPY_INCLUDED_RP2_MUTEX_EXTRA_H
+
+#include "pico/mutex.h"
+
+uint32_t mutex_enter_blocking_and_disable_interrupts(mutex_t *mtx);
+void mutex_exit_and_restore_interrupts(mutex_t *mtx, uint32_t save);
+
+#endif // MICROPY_INCLUDED_RP2_MUTEX_EXTRA_H

From ac5e0b9f62a27eb0e8904f554e9050066180a4c2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 2 Jan 2024 01:04:03 +1100
Subject: [PATCH 294/310] rp2/mpthreadport: Fix race with IRQ when entering
 atomic section.

Prior to this commit there is a potential deadlock in
mp_thread_begin_atomic_section(), when obtaining the atomic_mutex, in the
following situation:
- main thread calls mp_thread_begin_atomic_section() (for whatever reason,
  doesn't matter)
- the second core is running so the main thread grabs the mutex via the
  call mp_thread_mutex_lock(&atomic_mutex, 1), and this succeeds
- before the main thread has a chance to run save_and_disable_interrupts()
  a USB IRQ comes in and the main thread jumps off to process this IRQ
- that USB processing triggers a call to the dcd_event_handler() wrapper
  from commit bcbdee235719d459a4cd60d51021454fba54cd0f
- that then calls mp_sched_schedule_node()
- that then attempts to obtain the atomic section, calling
  mp_thread_begin_atomic_section()
- that call then blocks trying to obtain atomic_mutex
- core0 is now deadlocked on itself, because the main thread has the mutex
  but the IRQ handler (which preempted the main thread) is blocked waiting
  for the mutex, which will never be free

The solution in this commit is to use mutex enter/exit functions that also
atomically disable/restore interrupts.

Fixes issues #12980 and #13288.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/mpthreadport.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/ports/rp2/mpthreadport.c b/ports/rp2/mpthreadport.c
index 7bffabb335..fd868329c3 100644
--- a/ports/rp2/mpthreadport.c
+++ b/ports/rp2/mpthreadport.c
@@ -30,6 +30,7 @@
 #include "py/mpthread.h"
 #include "pico/stdlib.h"
 #include "pico/multicore.h"
+#include "mutex_extra.h"
 
 #if MICROPY_PY_THREAD
 
@@ -45,23 +46,23 @@ STATIC uint32_t *core1_stack = NULL;
 STATIC size_t core1_stack_num_words = 0;
 
 // Thread mutex.
-STATIC mp_thread_mutex_t atomic_mutex;
+STATIC mutex_t atomic_mutex;
 
 uint32_t mp_thread_begin_atomic_section(void) {
     if (core1_entry) {
         // When both cores are executing, we also need to provide
         // full mutual exclusion.
-        mp_thread_mutex_lock(&atomic_mutex, 1);
+        return mutex_enter_blocking_and_disable_interrupts(&atomic_mutex);
+    } else {
+        return save_and_disable_interrupts();
     }
-
-    return save_and_disable_interrupts();
 }
 
 void mp_thread_end_atomic_section(uint32_t state) {
-    restore_interrupts(state);
-
-    if (core1_entry) {
-        mp_thread_mutex_unlock(&atomic_mutex);
+    if (atomic_mutex.owner != LOCK_INVALID_OWNER_ID) {
+        mutex_exit_and_restore_interrupts(&atomic_mutex, state);
+    } else {
+        restore_interrupts(state);
     }
 }
 
@@ -69,7 +70,7 @@ void mp_thread_end_atomic_section(uint32_t state) {
 void mp_thread_init(void) {
     assert(get_core_num() == 0);
 
-    mp_thread_mutex_init(&atomic_mutex);
+    mutex_init(&atomic_mutex);
 
     // Allow MICROPY_BEGIN_ATOMIC_SECTION to be invoked from core1.
     multicore_lockout_victim_init();

From 9b8c64c9cee8203be167e6bffc74e186ae2fc958 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 5 Jan 2024 12:33:34 +1100
Subject: [PATCH 295/310] all: Bump version to 1.22.1.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/mpconfig.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/py/mpconfig.h b/py/mpconfig.h
index 66a083da45..e0d1ad44eb 100644
--- a/py/mpconfig.h
+++ b/py/mpconfig.h
@@ -31,7 +31,7 @@
 // are unavailable.
 #define MICROPY_VERSION_MAJOR 1
 #define MICROPY_VERSION_MINOR 22
-#define MICROPY_VERSION_MICRO 0
+#define MICROPY_VERSION_MICRO 1
 #define MICROPY_VERSION_PRERELEASE 0
 
 // Combined version as a 32-bit number for convenience to allow version

From d5f3fcd935f778d89918449b123f1c7bd6398cdf Mon Sep 17 00:00:00 2001
From: Nicko van Someren <nicko@nicko.org>
Date: Sat, 6 Jan 2024 16:33:12 -0700
Subject: [PATCH 296/310] rp2/rp2_dma: Fix fetching 'write' buffers for writing
 not reading.

Signed-off-by: Nicko van Someren <nicko@nicko.org>
---
 ports/rp2/rp2_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/rp2/rp2_dma.c b/ports/rp2/rp2_dma.c
index acc18d08c5..893498265a 100644
--- a/ports/rp2/rp2_dma.c
+++ b/ports/rp2/rp2_dma.c
@@ -86,7 +86,7 @@ STATIC const uint32_t rp2_dma_ctrl_field_count = MP_ARRAY_SIZE(rp2_dma_ctrl_fiel
 STATIC uint32_t rp2_dma_register_value_from_obj(mp_obj_t o, int reg_type) {
     if (reg_type == REG_TYPE_ADDR_READ || reg_type == REG_TYPE_ADDR_WRITE) {
         mp_buffer_info_t buf_info;
-        mp_uint_t flags = MP_BUFFER_READ;
+        mp_uint_t flags = (reg_type == REG_TYPE_ADDR_READ) ? MP_BUFFER_READ : MP_BUFFER_WRITE;
         if (mp_get_buffer(o, &buf_info, flags)) {
             return (uint32_t)buf_info.buf;
         }

From 068aa28fc51fff6c90f410d8a917fcb5a9dc0b34 Mon Sep 17 00:00:00 2001
From: robert-hh <robert@hammelrath.com>
Date: Sun, 7 Jan 2024 17:53:53 +0100
Subject: [PATCH 297/310] rp2/machine_uart: Fix event wait in uart.flush() and
 uart.read().

Do not wait in the worst case up to the timeout.

Fixes issue #13377.

Signed-off-by: robert-hh <robert@hammelrath.com>
---
 ports/rp2/machine_uart.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ports/rp2/machine_uart.c b/ports/rp2/machine_uart.c
index d751b7af07..bca07cebfc 100644
--- a/ports/rp2/machine_uart.c
+++ b/ports/rp2/machine_uart.c
@@ -483,7 +483,7 @@ STATIC mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t
                     return i;
                 }
             }
-            mp_event_wait_ms(timeout - elapsed);
+            mp_event_handle_nowait();
         }
         *dest++ = ringbuf_get(&(self->read_buffer));
         start = mp_hal_ticks_ms(); // Inter-character timeout
@@ -559,7 +559,7 @@ STATIC mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uint
             if (now >= timeout) {
                 break;
             }
-            mp_event_wait_ms((timeout - now) / 1000);
+            mp_event_handle_nowait();
         }
         *errcode = MP_ETIMEDOUT;
         ret = MP_STREAM_ERROR;

From 4c7d955a62f35818f73ca8a569d8fd70920023be Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Fri, 12 Jan 2024 14:17:44 +0200
Subject: [PATCH 298/310] renesas-ra/ra: Fix SysTick clock source.

The SysTick_Config function must use the system/CPU clock to configure the
ticks.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/renesas-ra/ra/ra_config.h | 1 +
 ports/renesas-ra/ra/ra_init.c   | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/ports/renesas-ra/ra/ra_config.h b/ports/renesas-ra/ra/ra_config.h
index a2df775c89..a9d4bb803d 100644
--- a/ports/renesas-ra/ra/ra_config.h
+++ b/ports/renesas-ra/ra/ra_config.h
@@ -26,6 +26,7 @@
 #define RA_RA_CONFIG_H_
 
 #include <stdint.h>
+#include "py/mpconfig.h"
 
 #if defined(RA4M1) | defined(RA4W1)
 #define SCI_CH_MAX      10
diff --git a/ports/renesas-ra/ra/ra_init.c b/ports/renesas-ra/ra/ra_init.c
index c9b78e0dd1..a784aec707 100644
--- a/ports/renesas-ra/ra/ra_init.c
+++ b/ports/renesas-ra/ra/ra_init.c
@@ -30,7 +30,7 @@
 
 void ra_init(void) {
     ra_int_init();
-    SysTick_Config(PCLK / 1000);
+    SysTick_Config(MICROPY_HW_MCU_SYSCLK / 1000);
     internal_flash_init();
 }
 

From 1e8cc6c5034f161bfed29002e5bd70eb4aeccbd6 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Wed, 17 Jan 2024 12:05:57 +0200
Subject: [PATCH 299/310] renesas-ra/boards/ARDUINO_PORTENTA_C33: Fix the RTC
 clock source.

Switch the RTC clock source to Sub-clock (XCIN). This board has an
accurate LSE crystal, and it should be used for the RTC clock
source.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
---
 ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h b/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
index 52346dedc4..f28deb0ceb 100644
--- a/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
+++ b/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/mpconfigboard.h
@@ -28,7 +28,7 @@
 // peripheral config
 #define MICROPY_HW_ENABLE_RNG       (1)
 #define MICROPY_HW_ENABLE_RTC       (1)
-#define MICROPY_HW_RTC_SOURCE       (1)
+#define MICROPY_HW_RTC_SOURCE       (0)
 #define MICROPY_HW_ENABLE_ADC       (1)
 #define MICROPY_HW_HAS_FLASH        (1)
 #define MICROPY_HW_ENABLE_USBDEV    (1)

From a2e9ab362bec09fa9411391c89efec569a64c61c Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Fri, 19 Jan 2024 10:07:51 +1100
Subject: [PATCH 300/310] extmod/asyncio: Support gather of tasks that finish
 early.

Adds support to asyncio.gather() for the case that one or more (or all)
sub-tasks finish and/or raise an exception before the gather starts.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/asyncio/core.py                        |  5 ++
 extmod/asyncio/funcs.py                       | 49 +++++++++-----
 tests/extmod/asyncio_gather_finished_early.py | 65 +++++++++++++++++++
 3 files changed, 102 insertions(+), 17 deletions(-)
 create mode 100644 tests/extmod/asyncio_gather_finished_early.py

diff --git a/extmod/asyncio/core.py b/extmod/asyncio/core.py
index 214cc52f45..e5af3038f7 100644
--- a/extmod/asyncio/core.py
+++ b/extmod/asyncio/core.py
@@ -219,6 +219,11 @@ def run_until_complete(main_task=None):
             elif t.state is None:
                 # Task is already finished and nothing await'ed on the task,
                 # so call the exception handler.
+
+                # Save exception raised by the coro for later use.
+                t.data = exc
+
+                # Create exception context and call the exception handler.
                 _exc_context["exception"] = exc
                 _exc_context["future"] = t
                 Loop.call_exception_handler(_exc_context)
diff --git a/extmod/asyncio/funcs.py b/extmod/asyncio/funcs.py
index 599091dfbd..3ef8a76b1d 100644
--- a/extmod/asyncio/funcs.py
+++ b/extmod/asyncio/funcs.py
@@ -63,9 +63,6 @@ class _Remove:
 
 # async
 def gather(*aws, return_exceptions=False):
-    if not aws:
-        return []
-
     def done(t, er):
         # Sub-task "t" has finished, with exception "er".
         nonlocal state
@@ -86,26 +83,39 @@ def gather(*aws, return_exceptions=False):
         # Gather waiting is done, schedule the main gather task.
         core._task_queue.push(gather_task)
 
+    # Prepare the sub-tasks for the gather.
+    # The `state` variable counts the number of tasks to wait for, and can be negative
+    # if the gather should not run at all (because a task already had an exception).
     ts = [core._promote_to_task(aw) for aw in aws]
+    state = 0
     for i in range(len(ts)):
-        if ts[i].state is not True:
-            # Task is not running, gather not currently supported for this case.
+        if ts[i].state is True:
+            # Task is running, register the callback to call when the task is done.
+            ts[i].state = done
+            state += 1
+        elif not ts[i].state:
+            # Task finished already.
+            if not isinstance(ts[i].data, StopIteration):
+                # Task finished by raising an exception.
+                if not return_exceptions:
+                    # Do not run this gather at all.
+                    state = -len(ts)
+        else:
+            # Task being waited on, gather not currently supported for this case.
             raise RuntimeError("can't gather")
-        # Register the callback to call when the task is done.
-        ts[i].state = done
 
     # Set the state for execution of the gather.
     gather_task = core.cur_task
-    state = len(ts)
     cancel_all = False
 
-    # Wait for the a sub-task to need attention.
-    gather_task.data = _Remove
-    try:
-        yield
-    except core.CancelledError as er:
-        cancel_all = True
-        state = er
+    # Wait for a sub-task to need attention (if there are any to wait for).
+    if state > 0:
+        gather_task.data = _Remove
+        try:
+            yield
+        except core.CancelledError as er:
+            cancel_all = True
+            state = er
 
     # Clean up tasks.
     for i in range(len(ts)):
@@ -118,8 +128,13 @@ def gather(*aws, return_exceptions=False):
             # Sub-task ran to completion, get its return value.
             ts[i] = ts[i].data.value
         else:
-            # Sub-task had an exception with return_exceptions==True, so get its exception.
-            ts[i] = ts[i].data
+            # Sub-task had an exception.
+            if return_exceptions:
+                # Get the sub-task exception to return in the list of return values.
+                ts[i] = ts[i].data
+            elif isinstance(state, int):
+                # Raise the sub-task exception, if there is not already an exception to raise.
+                state = ts[i].data
 
     # Either this gather was cancelled, or one of the sub-tasks raised an exception with
     # return_exceptions==False, so reraise the exception here.
diff --git a/tests/extmod/asyncio_gather_finished_early.py b/tests/extmod/asyncio_gather_finished_early.py
new file mode 100644
index 0000000000..030e79e357
--- /dev/null
+++ b/tests/extmod/asyncio_gather_finished_early.py
@@ -0,0 +1,65 @@
+# Test asyncio.gather() when a task is already finished before the gather starts.
+
+try:
+    import asyncio
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+# CPython and MicroPython differ in when they signal (and print) that a task raised an
+# uncaught exception.  So define an empty custom_handler() to suppress this output.
+def custom_handler(loop, context):
+    pass
+
+
+async def task_that_finishes_early(id, event, fail):
+    print("task_that_finishes_early", id)
+    event.set()
+    if fail:
+        raise ValueError("intentional exception", id)
+
+
+async def task_that_runs():
+    for i in range(5):
+        print("task_that_runs", i)
+        await asyncio.sleep(0)
+
+
+async def main(start_task_that_runs, task_fail, return_exceptions):
+    print("== start", start_task_that_runs, task_fail, return_exceptions)
+
+    # Set exception handler to suppress exception output.
+    loop = asyncio.get_event_loop()
+    loop.set_exception_handler(custom_handler)
+
+    # Create tasks.
+    event_a = asyncio.Event()
+    event_b = asyncio.Event()
+    tasks = []
+    if start_task_that_runs:
+        tasks.append(asyncio.create_task(task_that_runs()))
+    tasks.append(asyncio.create_task(task_that_finishes_early("a", event_a, task_fail)))
+    tasks.append(asyncio.create_task(task_that_finishes_early("b", event_b, task_fail)))
+
+    # Make sure task_that_finishes_early() are both done, before calling gather().
+    await event_a.wait()
+    await event_b.wait()
+
+    # Gather the tasks.
+    try:
+        result = "complete", await asyncio.gather(*tasks, return_exceptions=return_exceptions)
+    except Exception as er:
+        result = "exception", er, start_task_that_runs and tasks[0].done()
+
+    # Wait for the final task to finish (if it was started).
+    if start_task_that_runs:
+        await tasks[0]
+
+    # Print results.
+    print(result)
+
+
+# Run the test in the 8 different combinations of its arguments.
+for i in range(8):
+    asyncio.run(main(bool(i & 4), bool(i & 2), bool(i & 1)))

From 8b6e89a8ca87a4ae045f9f1a6a0fdff08984bde0 Mon Sep 17 00:00:00 2001
From: "Kwabena W. Agyeman" <kwagyeman@live.com>
Date: Mon, 22 Jan 2024 14:01:02 -0800
Subject: [PATCH 301/310] mimxrt/modmachine: Fix deepsleep wakeup pin ifdef.

Signed-off-by: Kwabena W. Agyeman <kwagyeman@live.com>
---
 ports/mimxrt/modmachine.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index b87747b409..e01703af8c 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -139,10 +139,10 @@ NORETURN STATIC void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
         }
     }
 
-    #ifdef MIMXRT117x_SERIES
+    #if defined(MIMXRT117x_SERIES)
     machine_pin_config(pin_WAKEUP_DIG, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5);
     GPC_CM_EnableIrqWakeup(GPC_CPU_MODE_CTRL_0, GPIO13_Combined_0_31_IRQn, true);
-    #elif defined IOMUXC_SNVS_WAKEUP_GPIO5_IO00
+    #elif defined(pin_WAKEUP)
     machine_pin_config(pin_WAKEUP, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5);
     GPC_EnableIRQ(GPC, GPIO5_Combined_0_15_IRQn);
     #endif

From 2531a15200cab1bd1c3d9bfbb4f5ce95fc561f3f Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 29 Jan 2024 15:11:46 +1100
Subject: [PATCH 302/310] extmod/modssl_mbedtls: Fix cipher iteration in
 SSLContext.get_ciphers.

Prior to this commit it would skip every second cipher returned from
mbedtls.

The corresponding test is also updated and now passes on esp32, rp2, stm32
and unix.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modssl_mbedtls.c                    | 4 ----
 tests/extmod/ssl_sslcontext_ciphers.py     | 4 +++-
 tests/extmod/ssl_sslcontext_ciphers.py.exp | 4 ++++
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/extmod/modssl_mbedtls.c b/extmod/modssl_mbedtls.c
index 0190c96a9a..b6275d8d88 100644
--- a/extmod/modssl_mbedtls.c
+++ b/extmod/modssl_mbedtls.c
@@ -311,10 +311,6 @@ STATIC mp_obj_t ssl_context_get_ciphers(mp_obj_t self_in) {
     for (const int *cipher_list = mbedtls_ssl_list_ciphersuites(); *cipher_list; ++cipher_list) {
         const char *cipher_name = mbedtls_ssl_get_ciphersuite_name(*cipher_list);
         mp_obj_list_append(list, MP_OBJ_FROM_PTR(mp_obj_new_str(cipher_name, strlen(cipher_name))));
-        cipher_list++;
-        if (!*cipher_list) {
-            break;
-        }
     }
     return list;
 }
diff --git a/tests/extmod/ssl_sslcontext_ciphers.py b/tests/extmod/ssl_sslcontext_ciphers.py
index d87e96afdf..20c00b9176 100644
--- a/tests/extmod/ssl_sslcontext_ciphers.py
+++ b/tests/extmod/ssl_sslcontext_ciphers.py
@@ -12,7 +12,9 @@ ctx = ssl.SSLContext(ssl.PROTOCOL_TLS_CLIENT)
 ciphers = ctx.get_ciphers()
 
 for ci in ciphers:
-    print(ci)
+    # Only print those ciphers know to exist on all ports.
+    if ("TLS-ECDHE-ECDSA-WITH-AES" in ci or "TLS-RSA-WITH-AES" in ci) and "CBC" in ci:
+        print(ci)
 
 ctx.set_ciphers(ciphers[:1])
 
diff --git a/tests/extmod/ssl_sslcontext_ciphers.py.exp b/tests/extmod/ssl_sslcontext_ciphers.py.exp
index 4d243a7883..0d21a3bd25 100644
--- a/tests/extmod/ssl_sslcontext_ciphers.py.exp
+++ b/tests/extmod/ssl_sslcontext_ciphers.py.exp
@@ -1,6 +1,10 @@
 TLS-ECDHE-ECDSA-WITH-AES-256-CBC-SHA384
+TLS-ECDHE-ECDSA-WITH-AES-256-CBC-SHA
 TLS-ECDHE-ECDSA-WITH-AES-128-CBC-SHA256
+TLS-ECDHE-ECDSA-WITH-AES-128-CBC-SHA
 TLS-RSA-WITH-AES-256-CBC-SHA256
+TLS-RSA-WITH-AES-256-CBC-SHA
 TLS-RSA-WITH-AES-128-CBC-SHA256
+TLS-RSA-WITH-AES-128-CBC-SHA
 object 'str' isn't a tuple or list
 (-24192, 'MBEDTLS_ERR_SSL_BAD_CONFIG')

From f53ee9f12b20ab98df37b71ae0cbcc89d0fd5268 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 30 Jan 2024 12:28:30 +1100
Subject: [PATCH 303/310] rp2: Change machine.I2S and rp2.DMA to use shared DMA
 IRQ handlers.

These separate drivers must share the DMA resource with each other.

Fixes issue #13380.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/rp2/CMakeLists.txt |  1 +
 ports/rp2/machine_i2s.c  |  6 ++----
 ports/rp2/rp2_dma.c      | 14 +++++++-------
 3 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 281b0c3bc2..3a46fdaa7f 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -474,6 +474,7 @@ target_compile_definitions(${MICROPY_TARGET} PRIVATE
     PICO_FLOAT_PROPAGATE_NANS=1
     PICO_STACK_SIZE=0x2000
     PICO_CORE1_STACK_SIZE=0
+    PICO_MAX_SHARED_IRQ_HANDLERS=8 # we need more than the default
     PICO_PROGRAM_NAME="MicroPython"
     PICO_NO_PROGRAM_VERSION_STRING=1 # do it ourselves in main.c
     MICROPY_BUILD_TYPE="${CMAKE_C_COMPILER_ID} ${CMAKE_C_COMPILER_VERSION} ${CMAKE_BUILD_TYPE}"
diff --git a/ports/rp2/machine_i2s.c b/ports/rp2/machine_i2s.c
index 68a0f296a0..ae8026a4af 100644
--- a/ports/rp2/machine_i2s.c
+++ b/ports/rp2/machine_i2s.c
@@ -232,20 +232,18 @@ STATIC void feed_dma(machine_i2s_obj_t *self, uint8_t *dma_buffer_p) {
 
 STATIC void irq_configure(machine_i2s_obj_t *self) {
     if (self->i2s_id == 0) {
-        irq_set_exclusive_handler(DMA_IRQ_0, dma_irq0_handler);
+        irq_add_shared_handler(DMA_IRQ_0, dma_irq0_handler, PICO_SHARED_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY);
         irq_set_enabled(DMA_IRQ_0, true);
     } else {
-        irq_set_exclusive_handler(DMA_IRQ_1, dma_irq1_handler);
+        irq_add_shared_handler(DMA_IRQ_1, dma_irq1_handler, PICO_SHARED_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY);
         irq_set_enabled(DMA_IRQ_1, true);
     }
 }
 
 STATIC void irq_deinit(machine_i2s_obj_t *self) {
     if (self->i2s_id == 0) {
-        irq_set_enabled(DMA_IRQ_0, false);
         irq_remove_handler(DMA_IRQ_0, dma_irq0_handler);
     } else {
-        irq_set_enabled(DMA_IRQ_1, false);
         irq_remove_handler(DMA_IRQ_1, dma_irq1_handler);
     }
 }
diff --git a/ports/rp2/rp2_dma.c b/ports/rp2/rp2_dma.c
index 893498265a..425fb417fa 100644
--- a/ports/rp2/rp2_dma.c
+++ b/ports/rp2/rp2_dma.c
@@ -98,18 +98,16 @@ STATIC uint32_t rp2_dma_register_value_from_obj(mp_obj_t o, int reg_type) {
 STATIC void rp2_dma_irq_handler(void) {
     // Main IRQ handler
     uint32_t irq_bits = dma_hw->ints0;
-    dma_hw->ints0 = 0xffff;
 
     for (int i = 0; i < NUM_DMA_CHANNELS; i++) {
         if (irq_bits & (1u << i)) {
             mp_irq_obj_t *handler = MP_STATE_PORT(rp2_dma_irq_obj[i]);
             if (handler) {
+                // An rp2.DMA IRQ handler is registered for this channel, so handle it.
+                dma_channel_acknowledge_irq0(i);
                 rp2_dma_obj_t *self = (rp2_dma_obj_t *)handler->parent;
                 self->irq_flag = 1;
                 mp_irq_handler(handler);
-            } else {
-                // We got an interrupt with no handler. Disable the channel
-                dma_channel_set_irq0_enabled(i, false);
             }
         }
     }
@@ -389,6 +387,9 @@ STATIC mp_obj_t rp2_dma_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *k
     if (irq == NULL) {
         irq = mp_irq_new(&rp2_dma_irq_methods, MP_OBJ_FROM_PTR(self));
         MP_STATE_PORT(rp2_dma_irq_obj[self->channel]) = irq;
+
+        // Clear any existing IRQs on this DMA channel, they are not for us.
+        dma_channel_acknowledge_irq0(self->channel);
     }
 
     if (n_args > 1 || kw_args->used != 0) {
@@ -457,12 +458,11 @@ MP_DEFINE_CONST_OBJ_TYPE(
 void rp2_dma_init(void) {
     // Set up interrupts.
     memset(MP_STATE_PORT(rp2_dma_irq_obj), 0, sizeof(MP_STATE_PORT(rp2_dma_irq_obj)));
-    irq_set_exclusive_handler(DMA_IRQ_0, rp2_dma_irq_handler);
+    irq_add_shared_handler(DMA_IRQ_0, rp2_dma_irq_handler, PICO_SHARED_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY);
 }
 
 void rp2_dma_deinit(void) {
-    // Disable and clear interrupts.
-    irq_set_mask_enabled(1u << DMA_IRQ_0, false);
+    // Remove our interrupt handler.
     irq_remove_handler(DMA_IRQ_0, rp2_dma_irq_handler);
 }
 

From b979c5a92af5d23bc89c5cc9c6ebb97a36179a53 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 31 Jan 2024 12:56:29 +1100
Subject: [PATCH 304/310] py/compile: Fix potential Py-stack overflow in
 try-finally with return.

If a return is executed within the try block of a try-finally then the
return value is stored on the top of the Python stack during the execution
of the finally block.  In this case the Python stack is one larger than it
normally would be in the finally block.

Prior to this commit, the compiler was not taking this case into account
and could have a Python stack overflow if the Python stack used by the
finally block was more than that used elsewhere in the function.  In such
a scenario the last argument of the function would be clobbered by the
top-most temporary value used in the deepest Python expression/statement.

This commit fixes that case by making sure enough Python stack is allocated
to the function.

Fixes issue #13562.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/compile.c                       | 11 +++++++++++
 tests/basics/try_finally_return.py | 10 ++++++++++
 2 files changed, 21 insertions(+)

diff --git a/py/compile.c b/py/compile.c
index 4f91ca49b9..a9b34ce5d9 100644
--- a/py/compile.c
+++ b/py/compile.c
@@ -1650,9 +1650,11 @@ STATIC void compile_try_except(compiler_t *comp, mp_parse_node_t pn_body, int n_
         if (qstr_exception_local != 0) {
             EMIT_ARG(load_const_tok, MP_TOKEN_KW_NONE);
             EMIT_ARG(label_assign, l3);
+            EMIT_ARG(adjust_stack_size, 1); // stack adjust for possible return value
             EMIT_ARG(load_const_tok, MP_TOKEN_KW_NONE);
             compile_store_id(comp, qstr_exception_local);
             compile_delete_id(comp, qstr_exception_local);
+            EMIT_ARG(adjust_stack_size, -1);
             compile_decrease_except_level(comp);
         }
 
@@ -1682,9 +1684,18 @@ STATIC void compile_try_finally(compiler_t *comp, mp_parse_node_t pn_body, int n
     } else {
         compile_try_except(comp, pn_body, n_except, pn_except, pn_else);
     }
+
+    // If the code reaches this point then the try part of the try-finally exited normally.
+    // This is indicated to the runtime by None sitting on the stack.
     EMIT_ARG(load_const_tok, MP_TOKEN_KW_NONE);
+
+    // Compile the finally block.
+    // The stack needs to be adjusted by 1 to account for the possibility that the finally is
+    // being executed as part of a return, and the return value is on the top of the stack.
     EMIT_ARG(label_assign, l_finally_block);
+    EMIT_ARG(adjust_stack_size, 1);
     compile_node(comp, pn_finally);
+    EMIT_ARG(adjust_stack_size, -1);
 
     compile_decrease_except_level(comp);
 }
diff --git a/tests/basics/try_finally_return.py b/tests/basics/try_finally_return.py
index 31a507e8d0..21e01ea21b 100644
--- a/tests/basics/try_finally_return.py
+++ b/tests/basics/try_finally_return.py
@@ -70,3 +70,13 @@ def f():
     finally:
         print('finally 1')
 print(f())
+
+# the finally block uses a lot of Python stack and then a local is accessed
+# (tests that the use of the stack doesn't clobber the local)
+def f(x):
+    try:
+        return x
+    finally:
+        print(2, 3, 4, 5, 6)
+        print(x)
+print(f(1))

From cc7cfc7e8d5508a3b3adf34f5c626643aae79e8d Mon Sep 17 00:00:00 2001
From: Takeo Takahashi <takeo.takahashi.xv@renesas.com>
Date: Mon, 29 Jan 2024 23:52:11 +0900
Subject: [PATCH 305/310] renesas-ra/ra/ra_i2c: Fix 1 byte and 2 bytes read
 issue.

Tested on Portenta C33 with AT24256B (addrsize=16) and SSD1306.

Fixes issue #13280.

Signed-off-by: Takeo Takahashi <takeo.takahashi.xv@renesas.com>
---
 ports/renesas-ra/ra/ra_i2c.c | 36 +++++++++++++++++++++++++++++++++++-
 ports/renesas-ra/ra/ra_i2c.h |  9 +++++----
 2 files changed, 40 insertions(+), 5 deletions(-)

diff --git a/ports/renesas-ra/ra/ra_i2c.c b/ports/renesas-ra/ra/ra_i2c.c
index 783c0c9215..701f4d6aa8 100644
--- a/ports/renesas-ra/ra/ra_i2c.c
+++ b/ports/renesas-ra/ra/ra_i2c.c
@@ -426,7 +426,7 @@ void ra_i2c_init(R_IIC0_Type *i2c_inst, uint32_t scl, uint32_t sda, uint32_t bau
     i2c_inst->ICCR1_b.ICE = 1;     // I2C enable
     ra_i2c_set_baudrate(i2c_inst, baudrate);
     i2c_inst->ICSER = 0x00;         // I2C reset bus status enable register
-    i2c_inst->ICMR3_b.ACKWP = 0x01; // I2C allow to write ACKBT (transfer acknowledge bit)
+    i2c_inst->ICMR3_b.ACKWP = 0x00; // I2C not allow to write ACKBT (transfer acknowledge bit)
     i2c_inst->ICIER = 0xFF;         // Enable all interrupts
     i2c_inst->ICCR1_b.IICRST = 0;   // I2C internal reset
     ra_i2c_irq_enable(i2c_inst);
@@ -480,6 +480,7 @@ void ra_i2c_xunit_read_byte(R_IIC0_Type *i2c_inst, xaction_unit_t *unit) {
 void ra_i2c_xunit_init(xaction_unit_t *unit, uint8_t *buf, uint32_t size, bool fread, void *next) {
     unit->m_bytes_transferred = 0;
     unit->m_bytes_transfer = size;
+    unit->m_bytes_total = size;
     unit->m_fread = fread;
     unit->buf = buf;
     unit->next = (void *)next;
@@ -531,6 +532,37 @@ static void ra_i2c_iceri_isr(R_IIC0_Type *i2c_inst) {
 static void ra_i2c_icrxi_isr(R_IIC0_Type *i2c_inst) {
     xaction_unit_t *unit = current_xaction_unit;
     xaction_t *action = current_xaction;
+    // 1 byte or 2 bytes
+    if (unit->m_bytes_total <= 2) {
+        if (action->m_status == RA_I2C_STATUS_AddrWriteCompleted) {
+            action->m_status = RA_I2C_STATUS_FirstReceiveCompleted;
+            i2c_inst->ICMR3_b.WAIT = 1;
+            // need dummy read processes for 1 byte and 2 bytes receive
+            if (unit->m_bytes_total == 2) {
+                (void)i2c_inst->ICDRR; // dummy read for 2 bytes receive
+            } else {  // m_bytes_total == 1
+                i2c_inst->ICMR3_b.ACKWP = 0x01; // enable write ACKBT (transfer acknowledge bit)
+                i2c_inst->ICMR3_b.ACKBT = 1;
+                i2c_inst->ICMR3_b.ACKWP = 0x00; // disable write ACKBT (transfer acknowledge bit)
+                (void)i2c_inst->ICDRR; // dummy read for 1 byte receive
+            }
+            return;
+        }
+        if (unit->m_bytes_transfer == 2) {      // last two data
+            i2c_inst->ICMR3_b.ACKWP = 0x01; // enable write ACKBT (transfer acknowledge bit)
+            i2c_inst->ICMR3_b.ACKBT = 1;
+            i2c_inst->ICMR3_b.ACKWP = 0x00; // disable write ACKBT (transfer acknowledge bit)
+            ra_i2c_xunit_read_byte(i2c_inst, unit);
+        } else { // last data
+            action->m_status = RA_I2C_STATUS_LastReceiveCompleted;
+            if (action->m_stop == true) {
+                i2c_inst->ICCR2_b.SP = 1; // request top condition
+            }
+            ra_i2c_xunit_read_byte(i2c_inst, unit);
+        }
+        return;
+    }
+    // 3 bytes or more
     if (action->m_status == RA_I2C_STATUS_AddrWriteCompleted) {
         (void)i2c_inst->ICDRR; // dummy read
         action->m_status = RA_I2C_STATUS_FirstReceiveCompleted;
@@ -542,7 +574,9 @@ static void ra_i2c_icrxi_isr(R_IIC0_Type *i2c_inst) {
         }
         ra_i2c_xunit_read_byte(i2c_inst, unit);
     } else if (unit->m_bytes_transfer == 2) {
+        i2c_inst->ICMR3_b.ACKWP = 0x01; // enable write ACKBT (transfer acknowledge bit)
         i2c_inst->ICMR3_b.ACKBT = 1;
+        i2c_inst->ICMR3_b.ACKWP = 0x00; // disable write ACKBT (transfer acknowledge bit)
         ra_i2c_xunit_read_byte(i2c_inst, unit);
     } else {
         // last data
diff --git a/ports/renesas-ra/ra/ra_i2c.h b/ports/renesas-ra/ra/ra_i2c.h
index e2432675a0..fc172a3e95 100644
--- a/ports/renesas-ra/ra/ra_i2c.h
+++ b/ports/renesas-ra/ra/ra_i2c.h
@@ -47,9 +47,9 @@ typedef enum
     RA_I2C_STATUS_AddrWriteCompleted = 3,
     RA_I2C_STATUS_DataWriteCompleted = 4,
     RA_I2C_STATUS_DataSendCompleted = 5,
-    RA_I2C_STATUS_FirstReceiveCompleted = 5,
-    RA_I2C_STATUS_LastReceiveCompleted = 6,
-    RA_I2C_STATUS_Stopped = 7,
+    RA_I2C_STATUS_FirstReceiveCompleted = 6,
+    RA_I2C_STATUS_LastReceiveCompleted = 7,
+    RA_I2C_STATUS_Stopped = 8,
 } xaction_status_t;
 
 typedef enum
@@ -64,6 +64,7 @@ typedef enum
 typedef struct {
     volatile uint32_t m_bytes_transferred;
     volatile uint32_t m_bytes_transfer;
+    uint32_t m_bytes_total;
     bool m_fread;
     uint8_t *buf;
     void *next;
@@ -75,7 +76,7 @@ typedef struct {
     uint32_t m_current;
     uint32_t m_address;
     volatile xaction_status_t m_status;
-    xaction_error_t m_error;
+    volatile xaction_error_t m_error;
     bool m_stop;
 } xaction_t;
 

From e7ff724a87395637f8580b39ee640ffda05d576a Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 8 Feb 2024 16:52:01 +1100
Subject: [PATCH 306/310] extmod/btstack: Reset pending_value_handle before
 calling write-done cb.

The pending_value_handle needs to be freed and reset before calling
mp_bluetooth_gattc_on_read_write_status(), which will call the Python IRQ
handler, which may in turn call back into BTstack to perform an action like
a write.  In that case the pending_value_handle will need to be available
for the write/read/etc to proceed.

Fixes issue #13611.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/btstack/modbluetooth_btstack.c      |   3 +-
 tests/multi_bluetooth/ble_irq_calls.py     | 200 +++++++++++++++++++++
 tests/multi_bluetooth/ble_irq_calls.py.exp |  31 ++++
 3 files changed, 233 insertions(+), 1 deletion(-)
 create mode 100644 tests/multi_bluetooth/ble_irq_calls.py
 create mode 100644 tests/multi_bluetooth/ble_irq_calls.py.exp

diff --git a/extmod/btstack/modbluetooth_btstack.c b/extmod/btstack/modbluetooth_btstack.c
index 211214768f..08d64ab012 100644
--- a/extmod/btstack/modbluetooth_btstack.c
+++ b/extmod/btstack/modbluetooth_btstack.c
@@ -490,11 +490,12 @@ STATIC void btstack_packet_handler_write_with_response(uint8_t packet_type, uint
         if (!conn) {
             return;
         }
-        mp_bluetooth_gattc_on_read_write_status(MP_BLUETOOTH_IRQ_GATTC_WRITE_DONE, conn_handle, conn->pending_value_handle, status);
+        uint16_t value_handle = conn->pending_value_handle;
         conn->pending_value_handle = 0xffff;
         m_del(uint8_t, conn->pending_write_value, conn->pending_write_value_len);
         conn->pending_write_value = NULL;
         conn->pending_write_value_len = 0;
+        mp_bluetooth_gattc_on_read_write_status(MP_BLUETOOTH_IRQ_GATTC_WRITE_DONE, conn_handle, value_handle, status);
     }
 }
 #endif // MICROPY_PY_BLUETOOTH_ENABLE_GATT_CLIENT
diff --git a/tests/multi_bluetooth/ble_irq_calls.py b/tests/multi_bluetooth/ble_irq_calls.py
new file mode 100644
index 0000000000..131ea90929
--- /dev/null
+++ b/tests/multi_bluetooth/ble_irq_calls.py
@@ -0,0 +1,200 @@
+# Test calling BLE methods from within the BLE.irq event handler.
+
+from micropython import const
+import struct
+import time
+import bluetooth
+
+_IRQ_CENTRAL_CONNECT = const(1)
+_IRQ_CENTRAL_DISCONNECT = const(2)
+_IRQ_PERIPHERAL_CONNECT = const(7)
+_IRQ_PERIPHERAL_DISCONNECT = const(8)
+_IRQ_GATTC_SERVICE_RESULT = const(9)
+_IRQ_GATTC_SERVICE_DONE = const(10)
+_IRQ_GATTC_CHARACTERISTIC_RESULT = const(11)
+_IRQ_GATTC_CHARACTERISTIC_DONE = const(12)
+_IRQ_GATTC_DESCRIPTOR_RESULT = const(13)
+_IRQ_GATTC_DESCRIPTOR_DONE = const(14)
+_IRQ_GATTC_READ_RESULT = const(15)
+_IRQ_GATTC_READ_DONE = const(16)
+_IRQ_GATTC_WRITE_DONE = const(17)
+_IRQ_MTU_EXCHANGED = const(21)
+_IRQ_GET_SECRET = const(29)
+_IRQ_SET_SECRET = const(30)
+
+EVENT_NAMES = {
+    1: "_IRQ_CENTRAL_CONNECT",
+    2: "_IRQ_CENTRAL_DISCONNECT",
+    3: "_IRQ_GATTS_WRITE",
+    4: "_IRQ_GATTS_READ_REQUEST",
+    7: "_IRQ_PERIPHERAL_CONNECT",
+    8: "_IRQ_PERIPHERAL_DISCONNECT",
+    9: "_IRQ_GATTC_SERVICE_RESULT",
+    10: "_IRQ_GATTC_SERVICE_DONE",
+    11: "_IRQ_GATTC_CHARACTERISTIC_RESULT",
+    12: "_IRQ_GATTC_CHARACTERISTIC_DONE",
+    13: "_IRQ_GATTC_DESCRIPTOR_RESULT",
+    14: "_IRQ_GATTC_DESCRIPTOR_DONE",
+    15: "_IRQ_GATTC_READ_RESULT",
+    16: "_IRQ_GATTC_READ_DONE",
+    17: "_IRQ_GATTC_WRITE_DONE",
+    18: "_IRQ_GATTC_NOTIFY",
+    21: "_IRQ_MTU_EXCHANGED",
+}
+
+_ADV_TYPE_FLAGS = const(0x01)
+_ADV_TYPE_NAME = const(0x09)
+_ADV_TYPE_UUID128_COMPLETE = const(0x7)
+
+_NOTIFY_ENABLE = const(1)
+
+ACCESSORY_UUID = bluetooth.UUID("a5a5a5a5-ffff-9999-1111-5a5a5a5a5a5a")
+STATE_UUID = bluetooth.UUID("a5a5a5a5-eeee-9999-1111-5a5a5a5a5a5a")
+CCC_UUID = bluetooth.UUID(0x2902)
+
+STATE_CHARACTERISTIC = (
+    STATE_UUID,
+    bluetooth.FLAG_READ | bluetooth.FLAG_NOTIFY,
+)
+
+ACCESSORY_SERVICE = (ACCESSORY_UUID, (STATE_CHARACTERISTIC,))
+
+
+class Central:
+    def __init__(self):
+        self.done = False
+        self._conn_handle = None
+        self._service = None
+        self._characteristic = None
+        self._cccd_handle = None
+        ble.active(1)
+        ble.irq(self._ble_event_handler)
+        ble.gap_connect(*BDADDR)
+
+    def _ble_event_handler(self, event, data):
+        print(EVENT_NAMES[event])
+
+        if event == _IRQ_PERIPHERAL_CONNECT:
+            conn_handle, _, _ = data
+            self._conn_handle = conn_handle
+            ble.gattc_discover_services(self._conn_handle, ACCESSORY_UUID)
+
+        elif event == _IRQ_PERIPHERAL_DISCONNECT:
+            conn_handle, _, addr = data
+            assert self._conn_handle == conn_handle
+            self._conn_handle = None
+            print("connection closed")
+
+        elif event == _IRQ_GATTC_SERVICE_RESULT:
+            _, first_handle, last_handle, uuid = data
+            print("service found:", last_handle - first_handle, uuid)
+            if uuid == ACCESSORY_UUID:
+                assert self._service is None
+                self._service = (first_handle, last_handle)
+
+        elif event == _IRQ_GATTC_SERVICE_DONE:
+            print("service handle range:", self._service[1] - self._service[0])
+            start_handle, end_handle = self._service
+            ble.gattc_discover_characteristics(self._conn_handle, start_handle, end_handle)
+
+        elif event == _IRQ_GATTC_CHARACTERISTIC_RESULT:
+            _, end_handle, value_handle, properties, uuid = data
+            assert uuid == STATE_UUID
+            print("characteristic found:", uuid)
+            self._characteristic = (end_handle, value_handle, properties)
+
+        elif event == _IRQ_GATTC_CHARACTERISTIC_DONE:
+            start_handle, end_handle = self._service
+            ble.gattc_discover_descriptors(self._conn_handle, start_handle, end_handle)
+
+        elif event == _IRQ_GATTC_DESCRIPTOR_RESULT:
+            _, dsc_handle, uuid = data
+            if uuid == CCC_UUID:
+                print("CCCD found:", uuid)
+                assert self._cccd_handle is None
+                self._cccd_handle = dsc_handle
+
+        elif event == _IRQ_GATTC_DESCRIPTOR_DONE:
+            # Discovery complete, proceed to MTU exchange.
+            ble.gattc_exchange_mtu(self._conn_handle)
+
+        elif event == _IRQ_MTU_EXCHANGED:
+            # MTU exchanged, proceed to enable CCCD.
+            print("CCCD write")
+            ble.gattc_write(
+                self._conn_handle, self._cccd_handle, struct.pack("<h", _NOTIFY_ENABLE), 1
+            )
+
+        elif event == _IRQ_GATTC_WRITE_DONE:
+            conn_handle, _, result = data
+            print("CCCD write result:", result)
+            _, state_handle, _ = self._characteristic
+            print("issue gattc_read")
+            ble.gattc_read(self._conn_handle, state_handle)
+
+        elif event == _IRQ_GATTC_READ_RESULT:
+            _, _, char_data = data
+            print("gattc_read result:", bytes(char_data))
+
+        elif event == _IRQ_GATTC_READ_DONE:
+            self.done = True
+            ble.gap_disconnect(self._conn_handle)
+
+
+class Peripheral:
+    def __init__(self):
+        self.done = False
+        ble.active(1)
+        ble.irq(self._ble_event_handler)
+        ble.gatts_register_services((ACCESSORY_SERVICE,))
+        add_payload = self.advertising_payload("acc", (ACCESSORY_UUID,))
+        ble.gap_advertise(500000, add_payload)
+
+    def advertising_payload(self, name, services):
+        payload = bytearray()
+
+        def _append(adv_type, value):
+            nonlocal payload
+            payload.extend(struct.pack("BB", len(value) + 1, adv_type) + value)
+
+        _append(_ADV_TYPE_FLAGS, struct.pack("B", 0x02 + 0x04))
+        _append(_ADV_TYPE_NAME, name)
+
+        for uuid in services:
+            b = bytes(uuid)
+            assert len(b) == 16
+            _append(_ADV_TYPE_UUID128_COMPLETE, b)
+
+        return payload
+
+    def _ble_event_handler(self, event, data):
+        if event not in (_IRQ_GET_SECRET, _IRQ_SET_SECRET):
+            print(EVENT_NAMES[event])
+        if event == _IRQ_CENTRAL_DISCONNECT:
+            self.done = True
+
+
+# Acting in peripheral role.
+def instance0():
+    print("peripheral start")
+    peripheral = Peripheral()
+    multitest.globals(BDADDR=ble.config("mac"))
+    multitest.next()
+    while not peripheral.done:
+        time.sleep_ms(100)
+    multitest.broadcast("finished")
+    ble.active(0)
+
+
+# Acting in central role.
+def instance1():
+    print("central start")
+    multitest.next()
+    central = Central()
+    while not central.done:
+        time.sleep_ms(100)
+    multitest.wait("finished")
+    ble.active(0)
+
+
+ble = bluetooth.BLE()
diff --git a/tests/multi_bluetooth/ble_irq_calls.py.exp b/tests/multi_bluetooth/ble_irq_calls.py.exp
new file mode 100644
index 0000000000..85d2f585ad
--- /dev/null
+++ b/tests/multi_bluetooth/ble_irq_calls.py.exp
@@ -0,0 +1,31 @@
+--- instance0 ---
+peripheral start
+_IRQ_CENTRAL_CONNECT
+_IRQ_MTU_EXCHANGED
+_IRQ_GATTS_READ_REQUEST
+_IRQ_CENTRAL_DISCONNECT
+--- instance1 ---
+central start
+_IRQ_PERIPHERAL_CONNECT
+_IRQ_GATTC_SERVICE_RESULT
+service found: 3 UUID('a5a5a5a5-ffff-9999-1111-5a5a5a5a5a5a')
+_IRQ_GATTC_SERVICE_DONE
+service handle range: 3
+_IRQ_GATTC_CHARACTERISTIC_RESULT
+characteristic found: UUID('a5a5a5a5-eeee-9999-1111-5a5a5a5a5a5a')
+_IRQ_GATTC_CHARACTERISTIC_DONE
+_IRQ_GATTC_DESCRIPTOR_RESULT
+_IRQ_GATTC_DESCRIPTOR_RESULT
+_IRQ_GATTC_DESCRIPTOR_RESULT
+CCCD found: UUID(0x2902)
+_IRQ_GATTC_DESCRIPTOR_DONE
+_IRQ_MTU_EXCHANGED
+CCCD write
+_IRQ_GATTC_WRITE_DONE
+CCCD write result: 0
+issue gattc_read
+_IRQ_GATTC_READ_RESULT
+gattc_read result: b''
+_IRQ_GATTC_READ_DONE
+_IRQ_PERIPHERAL_DISCONNECT
+connection closed

From 02df2b09d4c2793ca97ad48a46640eea7945b9a1 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Sun, 11 Feb 2024 15:08:08 +1100
Subject: [PATCH 307/310] extmod/btstack: Reset pending_value_handle before
 calling read-done cb.

Similar to the previous commit but for MP_BLUETOOTH_IRQ_GATTC_READ_DONE:
the pending_value_handle needs to be reset before calling
mp_bluetooth_gattc_on_read_write_status(), which will call the Python IRQ
handler, which may in turn call back into BTstack to perform an action like
a write.  In that case the pending_value_handle will need to be available
for the write/read/etc to proceed.

Fixes issue #13634.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/btstack/modbluetooth_btstack.c      |  3 ++-
 tests/multi_bluetooth/ble_irq_calls.py     | 18 ++++++++++++------
 tests/multi_bluetooth/ble_irq_calls.py.exp |  4 ++++
 3 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/extmod/btstack/modbluetooth_btstack.c b/extmod/btstack/modbluetooth_btstack.c
index 08d64ab012..b3d349c2dc 100644
--- a/extmod/btstack/modbluetooth_btstack.c
+++ b/extmod/btstack/modbluetooth_btstack.c
@@ -462,8 +462,9 @@ STATIC void btstack_packet_handler_read(uint8_t packet_type, uint16_t channel, u
         if (!conn) {
             return;
         }
-        mp_bluetooth_gattc_on_read_write_status(MP_BLUETOOTH_IRQ_GATTC_READ_DONE, conn_handle, conn->pending_value_handle, status);
+        uint16_t value_handle = conn->pending_value_handle;
         conn->pending_value_handle = 0xffff;
+        mp_bluetooth_gattc_on_read_write_status(MP_BLUETOOTH_IRQ_GATTC_READ_DONE, conn_handle, value_handle, status);
     } else if (event_type == GATT_EVENT_CHARACTERISTIC_VALUE_QUERY_RESULT) {
         DEBUG_printf("  --> gatt characteristic value query result\n");
         uint16_t conn_handle = gatt_event_characteristic_value_query_result_get_handle(packet);
diff --git a/tests/multi_bluetooth/ble_irq_calls.py b/tests/multi_bluetooth/ble_irq_calls.py
index 131ea90929..c8c673daab 100644
--- a/tests/multi_bluetooth/ble_irq_calls.py
+++ b/tests/multi_bluetooth/ble_irq_calls.py
@@ -65,8 +65,9 @@ class Central:
         self.done = False
         self._conn_handle = None
         self._service = None
-        self._characteristic = None
+        self._characteristic_handle = None
         self._cccd_handle = None
+        self._reads_remaining = None
         ble.active(1)
         ble.irq(self._ble_event_handler)
         ble.gap_connect(*BDADDR)
@@ -101,7 +102,8 @@ class Central:
             _, end_handle, value_handle, properties, uuid = data
             assert uuid == STATE_UUID
             print("characteristic found:", uuid)
-            self._characteristic = (end_handle, value_handle, properties)
+            assert self._characteristic_handle is None
+            self._characteristic_handle = value_handle
 
         elif event == _IRQ_GATTC_CHARACTERISTIC_DONE:
             start_handle, end_handle = self._service
@@ -128,17 +130,21 @@ class Central:
         elif event == _IRQ_GATTC_WRITE_DONE:
             conn_handle, _, result = data
             print("CCCD write result:", result)
-            _, state_handle, _ = self._characteristic
             print("issue gattc_read")
-            ble.gattc_read(self._conn_handle, state_handle)
+            self._reads_remaining = 2
+            ble.gattc_read(self._conn_handle, self._characteristic_handle)
 
         elif event == _IRQ_GATTC_READ_RESULT:
             _, _, char_data = data
             print("gattc_read result:", bytes(char_data))
 
         elif event == _IRQ_GATTC_READ_DONE:
-            self.done = True
-            ble.gap_disconnect(self._conn_handle)
+            self._reads_remaining -= 1
+            if self._reads_remaining > 0:
+                ble.gattc_read(self._conn_handle, self._characteristic_handle)
+            else:
+                self.done = True
+                ble.gap_disconnect(self._conn_handle)
 
 
 class Peripheral:
diff --git a/tests/multi_bluetooth/ble_irq_calls.py.exp b/tests/multi_bluetooth/ble_irq_calls.py.exp
index 85d2f585ad..d655c507d3 100644
--- a/tests/multi_bluetooth/ble_irq_calls.py.exp
+++ b/tests/multi_bluetooth/ble_irq_calls.py.exp
@@ -3,6 +3,7 @@ peripheral start
 _IRQ_CENTRAL_CONNECT
 _IRQ_MTU_EXCHANGED
 _IRQ_GATTS_READ_REQUEST
+_IRQ_GATTS_READ_REQUEST
 _IRQ_CENTRAL_DISCONNECT
 --- instance1 ---
 central start
@@ -27,5 +28,8 @@ issue gattc_read
 _IRQ_GATTC_READ_RESULT
 gattc_read result: b''
 _IRQ_GATTC_READ_DONE
+_IRQ_GATTC_READ_RESULT
+gattc_read result: b''
+_IRQ_GATTC_READ_DONE
 _IRQ_PERIPHERAL_DISCONNECT
 connection closed

From e72d03855efe4917c555a083c0fdd63819ca890f Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Wed, 14 Feb 2024 12:39:27 +1100
Subject: [PATCH 308/310] esp32/mpnimbleport: Release the GIL while doing
 NimBLE port deinit.

In case callbacks must run (eg a disconnect event happens during the
deinit) and the GIL must be obtained to run the callback.

Fixes part of issue #12349.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/esp32/mpnimbleport.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/ports/esp32/mpnimbleport.c b/ports/esp32/mpnimbleport.c
index 8235275be6..5b57edf3c1 100644
--- a/ports/esp32/mpnimbleport.c
+++ b/ports/esp32/mpnimbleport.c
@@ -63,6 +63,11 @@ void mp_bluetooth_nimble_port_start(void) {
 void mp_bluetooth_nimble_port_shutdown(void) {
     DEBUG_printf("mp_bluetooth_nimble_port_shutdown\n");
 
+    #if MICROPY_PY_BLUETOOTH_USE_SYNC_EVENTS_WITH_INTERLOCK
+    // Release the GIL so any callbacks can run during the shutdown calls below.
+    MP_THREAD_GIL_EXIT();
+    #endif
+
     // Despite the name, these is an ESP32-specific (no other NimBLE ports have these functions).
     // Calls ble_hs_stop() and waits for stack shutdown.
     nimble_port_stop();
@@ -70,6 +75,10 @@ void mp_bluetooth_nimble_port_shutdown(void) {
     // Shuts down the event queue.
     nimble_port_deinit();
 
+    #if MICROPY_PY_BLUETOOTH_USE_SYNC_EVENTS_WITH_INTERLOCK
+    MP_THREAD_GIL_ENTER();
+    #endif
+
     // Mark stack as shutdown.
     mp_bluetooth_nimble_ble_state = MP_BLUETOOTH_NIMBLE_BLE_STATE_OFF;
 }

From ee3c9ccb541732ae57de490dd914225ddce8f8a2 Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Thu, 15 Feb 2024 23:03:29 +1100
Subject: [PATCH 309/310] esp32: Increase NimBLE task stack size and overflow
 detection headroom.

The Python BLE IRQ handler will most likely run on the NimBLE task, so its
C stack must be large enough to accommodate reasonably complicated Python
code (eg a few call depths).  So increase this stack size.

Also increase the headroom from 1024 to 2048 bytes.  This is needed because
(1) the esp32 architecture uses a fair amount of stack in general; and (2)
by the time execution gets to setting the Python stack top via
`mp_stack_set_top()` in this interlock code, about 600 bytes of stack are
already used, which reduces the amount available for Python.

Fixes issue #12349.

Signed-off-by: Damien George <damien@micropython.org>
---
 extmod/modbluetooth.c            | 2 +-
 ports/esp32/boards/sdkconfig.ble | 4 ++++
 ports/esp32/mpconfigport.h       | 2 +-
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/extmod/modbluetooth.c b/extmod/modbluetooth.c
index cef5151cc9..32a15bf511 100644
--- a/extmod/modbluetooth.c
+++ b/extmod/modbluetooth.c
@@ -1274,7 +1274,7 @@ STATIC mp_obj_t invoke_irq_handler(uint16_t event,
     if (ts_orig == NULL) {
         mp_thread_set_state(&ts);
         mp_stack_set_top(&ts + 1); // need to include ts in root-pointer scan
-        mp_stack_set_limit(MICROPY_PY_BLUETOOTH_SYNC_EVENT_STACK_SIZE - 1024);
+        mp_stack_set_limit(MICROPY_PY_BLUETOOTH_SYNC_EVENT_STACK_SIZE);
         ts.gc_lock_depth = 0;
         ts.nlr_jump_callback_top = NULL;
         ts.mp_pending_exception = MP_OBJ_NULL;
diff --git a/ports/esp32/boards/sdkconfig.ble b/ports/esp32/boards/sdkconfig.ble
index 7fa08fe286..af2d4b133e 100644
--- a/ports/esp32/boards/sdkconfig.ble
+++ b/ports/esp32/boards/sdkconfig.ble
@@ -14,3 +14,7 @@ CONFIG_BT_NIMBLE_MAX_CONNECTIONS=4
 CONFIG_BT_NIMBLE_PINNED_TO_CORE_0=n
 CONFIG_BT_NIMBLE_PINNED_TO_CORE_1=y
 CONFIG_BT_NIMBLE_PINNED_TO_CORE=1
+
+# Increase NimBLE task stack size from the default, because Python code
+# (BLE IRQ handlers) will most likely run on this task.
+CONFIG_BT_NIMBLE_TASK_STACK_SIZE=6144
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 5dc4a9c758..acf065384b 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -95,7 +95,7 @@
 #define MICROPY_PY_BLUETOOTH                (1)
 #define MICROPY_PY_BLUETOOTH_USE_SYNC_EVENTS (1)
 #define MICROPY_PY_BLUETOOTH_USE_SYNC_EVENTS_WITH_INTERLOCK (1)
-#define MICROPY_PY_BLUETOOTH_SYNC_EVENT_STACK_SIZE (CONFIG_BT_NIMBLE_TASK_STACK_SIZE)
+#define MICROPY_PY_BLUETOOTH_SYNC_EVENT_STACK_SIZE (CONFIG_BT_NIMBLE_TASK_STACK_SIZE - 2048)
 #define MICROPY_PY_BLUETOOTH_ENABLE_CENTRAL_MODE (1)
 #define MICROPY_PY_BLUETOOTH_ENABLE_PAIRING_BONDING (1)
 #define MICROPY_BLUETOOTH_NIMBLE            (1)

From 8cd15829e293f01dae91b6a2d4a995bfaeca887b Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Tue, 20 Feb 2024 22:59:55 +1100
Subject: [PATCH 310/310] all: Bump version to 1.22.2.

Signed-off-by: Damien George <damien@micropython.org>
---
 py/mpconfig.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/py/mpconfig.h b/py/mpconfig.h
index e0d1ad44eb..627388c670 100644
--- a/py/mpconfig.h
+++ b/py/mpconfig.h
@@ -31,7 +31,7 @@
 // are unavailable.
 #define MICROPY_VERSION_MAJOR 1
 #define MICROPY_VERSION_MINOR 22
-#define MICROPY_VERSION_MICRO 1
+#define MICROPY_VERSION_MICRO 2
 #define MICROPY_VERSION_PRERELEASE 0
 
 // Combined version as a 32-bit number for convenience to allow version