102 lines
1.9 KiB
ArmAsm
102 lines
1.9 KiB
ArmAsm
// This file is part of the CircuitPython project: https://circuitpython.org
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//
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// SPDX-FileCopyrightText: Copyright (c) 2025 Scott Shawcroft for Adafruit Industries
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//
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// SPDX-License-Identifier: MIT
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#include "supervisor/shared/cpu_regs.h"
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#ifdef __arm__
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.syntax unified
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.thumb
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.text
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.align 2
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@ uint cpu_get_regs_and_sp(r0=uint regs[SAVED_REGISTER_COUNT])
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.global cpu_get_regs_and_sp
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.thumb
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.thumb_func
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.type cpu_get_regs_and_sp, %function
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cpu_get_regs_and_sp:
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#if __ARM_ARCH_ISA_THUMB == 2
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@ store registers into given array
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#ifdef __arm__
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stmia r0!, {r4-r11}
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#endif
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#if defined(__aarch64__) && __aarch64__ == 1
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#error "aarch64 not supported"
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stmia r0!, {x19-x28}
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#endif
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#ifdef __ARM_FP
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#ifdef __arm__
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vstmia r0!, {s16-s31}
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#endif
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#if defined(__aarch64__) && __aarch64__ == 1
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vst1.64 {d8-d15}, [r0], #16
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#endif
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#endif
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#endif
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// Thumb 1 can only store directly from R0-R7. This is M0 and M23 mostly.
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#if __ARM_ARCH_ISA_THUMB == 1
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str r4, [r0, #0]
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str r5, [r0, #4]
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str r6, [r0, #8]
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str r7, [r0, #12]
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push {r1}
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mov r1, r8
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str r1, [r0, #16]
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mov r1, r9
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str r1, [r0, #20]
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mov r1, r10
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str r1, [r0, #24]
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mov r1, r11
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str r1, [r0, #28]
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mov r1, r12
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str r1, [r0, #32]
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mov r1, r13
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str r1, [r0, #36]
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pop {r1}
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#endif
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@ return the sp
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mov r0, sp
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bx lr
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#endif
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#ifdef __riscv
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#if __riscv_xlen == 32
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.global cpu_get_regs_and_sp
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.type cpu_get_regs_and_sp, %function
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cpu_get_regs_and_sp:
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sw s0, 0(a0)
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sw s1, 4(a0)
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sw s2, 8(a0)
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sw s3, 12(a0)
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sw s4, 16(a0)
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sw s5, 20(a0)
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sw s6, 24(a0)
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sw s7, 28(a0)
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sw s8, 32(a0)
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sw s9, 36(a0)
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sw s10, 40(a0)
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sw s11, 44(a0)
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#ifdef __riscv_vector
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sw fs0, 48(a0)
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sw fs1, 52(a0)
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sw fs2, 56(a0)
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sw fs3, 60(a0)
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sw fs4, 64(a0)
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sw fs5, 68(a0)
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sw fs6, 72(a0)
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sw fs7, 76(a0)
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sw fs8, 80(a0)
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sw fs9, 84(a0)
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sw fs10, 88(a0)
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sw fs11, 92(a0)
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#endif
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move a0, sp
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ret
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#else
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#error "Unsupported RISC-V bit length"
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#endif
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#endif
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