From 16b2392e6fc68254d29c8fed71cb4b87bc044526 Mon Sep 17 00:00:00 2001 From: Sola85 Date: Thu, 30 May 2024 09:40:28 +0200 Subject: [PATCH 1/3] Update Kconfig in ulp module such that fsm and riscv are no longer mutually exclusive at compile time --- components/ulp/Kconfig | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/components/ulp/Kconfig b/components/ulp/Kconfig index 9ed9c43006..2a72ecd2b2 100644 --- a/components/ulp/Kconfig +++ b/components/ulp/Kconfig @@ -8,23 +8,15 @@ menu "Ultra Low Power (ULP) Co-processor" Enable this feature if you plan to use the ULP Co-processor. Once this option is enabled, further ULP co-processor configuration will appear in the menu. - choice ULP_COPROC_TYPE - prompt "ULP Co-processor type" - depends on ULP_COPROC_ENABLED - default ULP_COPROC_TYPE_RISCV if (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3) - help - Choose the ULP Coprocessor type: ULP FSM (Finite State Machine) or ULP RISC-V. - - config ULP_COPROC_TYPE_FSM - bool "ULP FSM (Finite State Machine)" - depends on SOC_ULP_FSM_SUPPORTED - config ULP_COPROC_TYPE_RISCV - bool "ULP RISC-V" - depends on SOC_RISCV_COPROC_SUPPORTED - config ULP_COPROC_TYPE_LP_CORE - bool "LP core RISC-V" - depends on SOC_LP_CORE_SUPPORTED - endchoice + config ULP_COPROC_TYPE_FSM + bool "Enable ULP FSM (Finite State Machine)" + depends on (SOC_ULP_FSM_SUPPORTED && ULP_COPROC_ENABLED) + config ULP_COPROC_TYPE_RISCV + bool "Enable ULP RISC-V" + depends on (SOC_RISCV_COPROC_SUPPORTED && ULP_COPROC_ENABLED) + config ULP_COPROC_TYPE_LP_CORE + bool "Enable LP core RISC-V" + depends on (SOC_LP_CORE_SUPPORTED && ULP_COPROC_ENABLED) config ULP_COPROC_RESERVE_MEM int From e85c8db580794754125d705f125c6ed3774813a7 Mon Sep 17 00:00:00 2001 From: Sola85 Date: Thu, 30 May 2024 09:41:49 +0200 Subject: [PATCH 2/3] Update CMakeLists.txt in ulp module such that fsm and riscv ulps are no longer mutually exclusive at compile time --- components/ulp/CMakeLists.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/components/ulp/CMakeLists.txt b/components/ulp/CMakeLists.txt index 42b55d7b43..779b9cd87d 100644 --- a/components/ulp/CMakeLists.txt +++ b/components/ulp/CMakeLists.txt @@ -42,7 +42,9 @@ if(CONFIG_ULP_COPROC_TYPE_FSM OR CONFIG_ULP_COPROC_TYPE_RISCV) "ulp_fsm/ulp.c" "ulp_fsm/ulp_macro.c") - elseif(CONFIG_ULP_COPROC_TYPE_RISCV) + endif() + + if(CONFIG_ULP_COPROC_TYPE_RISCV) list(APPEND srcs "ulp_riscv/ulp_riscv.c" "ulp_riscv/ulp_riscv_lock.c" From 977f0117096ac493343a9f73a8685d2a2e78c35a Mon Sep 17 00:00:00 2001 From: Sola85 Date: Thu, 30 May 2024 15:45:13 +0200 Subject: [PATCH 3/3] add help message to Kconfig for ulp --- components/ulp/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/components/ulp/Kconfig b/components/ulp/Kconfig index 2a72ecd2b2..a1f072f798 100644 --- a/components/ulp/Kconfig +++ b/components/ulp/Kconfig @@ -11,9 +11,15 @@ menu "Ultra Low Power (ULP) Co-processor" config ULP_COPROC_TYPE_FSM bool "Enable ULP FSM (Finite State Machine)" depends on (SOC_ULP_FSM_SUPPORTED && ULP_COPROC_ENABLED) + help + Note: On devices with both ULP FSM and ULP RISC-V, both ULPs can be enabled simultaneously at compile-time, + but may not be used simultaneously at run-time. config ULP_COPROC_TYPE_RISCV bool "Enable ULP RISC-V" depends on (SOC_RISCV_COPROC_SUPPORTED && ULP_COPROC_ENABLED) + help + Note: On devices with both ULP FSM and ULP RISC-V, both ULPs can be enabled simultaneously at compile-time, + but may not be used simultaneously at run-time. config ULP_COPROC_TYPE_LP_CORE bool "Enable LP core RISC-V" depends on (SOC_LP_CORE_SUPPORTED && ULP_COPROC_ENABLED)