Update Kconfig in ulp module
such that fsm and riscv are no longer mutually exclusive at compile time
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1 changed files with 14 additions and 16 deletions
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@ -8,23 +8,21 @@ menu "Ultra Low Power (ULP) Co-processor"
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Enable this feature if you plan to use the ULP Co-processor.
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Once this option is enabled, further ULP co-processor configuration will appear in the menu.
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choice ULP_COPROC_TYPE
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prompt "ULP Co-processor type"
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depends on ULP_COPROC_ENABLED
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default ULP_COPROC_TYPE_RISCV if (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3)
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config ULP_COPROC_TYPE_FSM
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bool "Enable ULP FSM (Finite State Machine)"
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depends on (SOC_ULP_FSM_SUPPORTED && ULP_COPROC_ENABLED)
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help
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Choose the ULP Coprocessor type: ULP FSM (Finite State Machine) or ULP RISC-V.
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config ULP_COPROC_TYPE_FSM
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bool "ULP FSM (Finite State Machine)"
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depends on SOC_ULP_FSM_SUPPORTED
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config ULP_COPROC_TYPE_RISCV
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bool "ULP RISC-V"
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depends on SOC_RISCV_COPROC_SUPPORTED
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config ULP_COPROC_TYPE_LP_CORE
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bool "LP core RISC-V"
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depends on SOC_LP_CORE_SUPPORTED
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endchoice
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Note: On devices with both ULP FSM and ULP RISC-V, both ULPs can be enabled simultaneously at compile-time,
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but may not be used simultaneously at run-time.
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config ULP_COPROC_TYPE_RISCV
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bool "Enable ULP RISC-V"
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depends on (SOC_RISCV_COPROC_SUPPORTED && ULP_COPROC_ENABLED)
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help
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Note: On devices with both ULP FSM and ULP RISC-V, both ULPs can be enabled simultaneously at compile-time,
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but may not be used simultaneously at run-time.
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config ULP_COPROC_TYPE_LP_CORE
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bool "Enable LP core RISC-V"
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depends on (SOC_LP_CORE_SUPPORTED && ULP_COPROC_ENABLED)
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config ULP_COPROC_RESERVE_MEM
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int
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