Merge pull request #4 from hathach/v2

upgrade nrfx to v2
2019-12-18 00:32:15 -08:00 · 2019-12-18 00:32:15 -08:00 · 3f55e49eb1
commit 3f55e49eb1
parent 8935519a68 8efb27e97a
308 changed files with 308889 additions and 15435 deletions
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@ -1,6 +1,80 @@
 # Changelog
 All notable changes to this project are documented in this file.
 ## [2.0.0] - 2019-11-06
 ### Added
 - Added support for nRF5340.
 - Added HALs for: CACHE, FPU, MUTEX, and RESET.
 - Added driver and HAL for IPC.
 - Added possibility to configure in UART and UARTE the number of stop bits and the type of parity, when a given SoC allows it.
 - Added function in the GPIO HAL for selecting the MCU to control the specified pin.
 - Added support for ONESHOT register in the TIMER HAL.
 - Added support for LIST feature in HALs for SPIS and TWIS.
 - Added possibility to choose TIMER instance used for workarounds in the NFCT driver.
 ### Changed
 - Updated MDK to 8.29.0.
 - Enhanced PWM driver API: added the "p_context" parameter to the event handler.
 - Updated address and task getters in all HALs to return values as uint32_t type.
 - Updated all HAL functions to take the pointer to the structure of registers of the peripheral as their first argument.
 - Changed __STATIC_INLINE symbol to NRF_STATIC_INLINE for HALs and NRFX_STATIC_INLINE for drivers.
 - Refactored the SAADC driver and HAL.
 - Refactored the WDT driver and HAL to support multiple instances.
 - Changed nrfx_gpiote_init() function to take the interrupt priority as its parameter. Previously this priority was an nrfx_config option.
 - Changed nrf_usbd_ep_all_disable() function to disable really all endpoints. Use nrf_usbd_ep_default_config() to restore the default endpoint configuration.
 - Updated nrfx_gpiote_out_init() and nrfx_gpiote_in_init() return codes. Now NRFX_ERROR_INVALID_STATE is changed to NRFX_ERROR_BUSY.
 - Replaced the SWI/EGU driver with one for EGU only.
 - Aligned symbol names for default IRQ priority in nrfx_config. These symbols are now adhering to the following standard: NRFX_xxx_DEFAULT_CONFIG_IRQ_PRIORITY.
 - Changed the way of configuring the MISO pin pull setting in SPI and SPIM drivers. Now it can be set separately for each instance.
 ### Removed
 - Removed deprecated functions from drivers: TWI and TWIM. See migration guide for details.
 - Removed deprecated functions from HALs: ECB, NVMC, and TEMP. See migration guide for details.
 - Removed redundant bariers in the nrfx_usbd driver.
 - Removed the default configuration values for drivers from the nrfx_config header files.
 ## [1.8.1] - 2019-10-21
 ### Added
 - Added functions in the GPIOTE driver for getting task or event for the specified GPIO pin.
 ### Changed
 - Updated MDK to version 8.27.1.
 - Moved the nrfx_gppi helper from helpers/nrfx_gppi/ to helpers/.
 - Changed the interrupt initialization in the GPIOTE driver, so that mapping of the GPIOTEx_IRQn enumeration values is no longer needed for nRF9160.
 ## [1.8.0] - 2019-08-27
 ### Added
 - Added support for nRF52833.
 - Added bus recovery feature in the TWI and TWIM drivers.
 - Added the nrfx_gppi helper layer to facilitate developing generic code that can utilize PPI or DPPI, depending on which interface is available in a given SoC.
 ### Changed
 - Updated MDK to version 8.27.0.
 ### Fixed
 - Fixed an issue in the TWIM driver that would make the driver stuck when a premature STOP condition was generated by a slave device. The driver now handles this situation properly and signals that a bus error occurred.
 - Fixed a frame timing bug in the NFCT driver. Previously, the timing of the SENS_RES response could be violated after the NFCT peripheral was put to the Sleep state with the SLP_REQ command.
 ## [1.7.2] - 2019-07-25
 ### Added
 - Added functions in the DPPI, GPIOTE, PPI, RTC, and TIMER HALs for getting tasks and events specified by index.
 - Added the possibility of suspending transfers in the TWI driver. This allows combining several transfers into one continuous TWI transaction.
 - Added termination of transfers at deinitialization of the UARTE driver.
 - Added buffer alignment checks in the QSPI driver.
 - Introduced the NRFX_OFFSETOF macro that duplicates the functionality of the built-in offsetof() mechanism, but can be used without issues also with non-constant expressions.
 - Added an alternative way of ending the DMA transfer loop in the USBD driver.
 - Added the CTSTARTED and CTSTOPPED events to the CLOCK HAL.
 ### Changed
 - Removed an assertion that prevented setting the data payload size of isochronous endpoints to zero, to fulfill requirements of the USB 2.0 specification, paragraph 5.6.3.
 - Declared the tx_buffer_length field in the UART driver's control block as volatile to prevent issues in case of compilation with high optimization level.
 ### Fixed
 - Fixed an incorrect conversion of frequency values in the RADIO HAL.
 - Fixed an incorrectly enabled interrupt in the QSPI driver.
 - Corrected the LFCLK source selection values in the template configuration file for nRF9160.
 - Fixed support for external LFCLK sources for nRF52811.
 ## [1.7.1] - 2019-04-08
 ### Added
 - Added functions in the NVMC driver for getting the flash page size, the count of pages and the total flash size.
--- a/README.md
+++ b/README.md
@ -16,7 +16,9 @@ SoCs, as well as startup and initialization files for them.
 * nRF52810
 * nRF52811
 * nRF52832
 * nRF52833
 * nRF52840
 * nRF5340
 * nRF9160
 ## Directories
@ -24,12 +26,13 @@ SoCs, as well as startup and initialization files for them.
 ```
 .
 ├── doc             # Project documentation files
- ├── drivers         # nrfx drivers files
+ ├── drivers         # nrfx driver files
- │   └── include     # nrfx drivers headers
+ │   └── include     # nrfx driver headers
- │   └── src         # nrfx drivers sources
+ │   └── src         # nrfx driver sources
 ├── hal             # Hardware Access Layer files
- ├── mdk             # Nordic MDK files
+ ├── helpers         # nrfx driver helper files
- ├── soc             # Nordic SoC related files
+ ├── mdk             # nRF MDK files
 ├── soc             # SoC specific files
 └── templates       # Templates of nrfx integration files
 ```
--- a/doc/config_dox/nrfx_adc_dox_config.h
+++ b/doc/config_dox/nrfx_adc_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_ADC_ENABLED
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -30,6 +31,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_ADC_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_clock_dox_config.h
+++ b/doc/config_dox/nrfx_clock_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_CLOCK_ENABLED
 /** @brief LF Clock Source
 *
 *  Following options are available:
@ -53,6 +54,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_CLOCK_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_comp_dox_config.h
+++ b/doc/config_dox/nrfx_comp_dox_config.h
@ -11,77 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_COMP_ENABLED
 /** @brief Reference voltage
 *
 *  Following options are available:
 * - 0 - Internal 1.2V
 * - 1 - Internal 1.8V
 * - 2 - Internal 2.4V
 * - 4 - VDD
 * - 7 - ARef
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_COMP_CONFIG_REF
 /** @brief Main mode
 *
 *  Following options are available:
 * - 0 - Single ended
 * - 1 - Differential
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_COMP_CONFIG_MAIN_MODE
 /** @brief Speed mode
 *
 *  Following options are available:
 * - 0 - Low power
 * - 1 - Normal
 * - 2 - High speed
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_COMP_CONFIG_SPEED_MODE
 /** @brief Hystheresis
 *
 *  Following options are available:
 * - 0 - No
 * - 1 - 50mV
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_COMP_CONFIG_HYST
 /** @brief Current Source
 *
 *  Following options are available:
 * - 0 - Off
 * - 1 - 2.5 uA
 * - 2 - 5 uA
 * - 3 - 10 uA
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_COMP_CONFIG_ISOURCE
 /** @brief Analog input
 *
 *  Following options are available:
 * - 0
 * - 1
 * - 2
 * - 3
 * - 4
 * - 5
 * - 6
 * - 7
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_COMP_CONFIG_INPUT
 /** @brief Interrupt priority
 *
@ -106,6 +35,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_COMP_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_gpiote_dox_config.h
+++ b/doc/config_dox/nrfx_gpiote_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_GPIOTE_ENABLED
 /** @brief Number of lower power input pins
 *
 *
@ -41,6 +42,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_GPIOTE_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_i2s_dox_config.h
+++ b/doc/config_dox/nrfx_i2s_dox_config.h
@ -11,144 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_ENABLED
 /** @brief SCK pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_SCK_PIN
 /** @brief LRCK pin
 *
 *  Minimum value: 1
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_LRCK_PIN
 /** @brief MCK pin
 *
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_MCK_PIN
 /** @brief SDOUT pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_SDOUT_PIN
 /** @brief SDIN pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_SDIN_PIN
 /** @brief Mode
 *
 *  Following options are available:
 * - 0 - Master
 * - 1 - Slave
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_MASTER
 /** @brief Format
 *
 *  Following options are available:
 * - 0 - I2S
 * - 1 - Aligned
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_FORMAT
 /** @brief Alignment
 *
 *  Following options are available:
 * - 0 - Left
 * - 1 - Right
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_ALIGN
 /** @brief Sample width (bits)
 *
 *  Following options are available:
 * - 0 - 8
 * - 1 - 16
 * - 2 - 24
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_SWIDTH
 /** @brief Channels
 *
 *  Following options are available:
 * - 0 - Stereo
 * - 1 - Left
 * - 2 - Right
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_CHANNELS
 /** @brief MCK behavior
 *
 *  Following options are available:
 * - 0 - Disabled
 * - 2147483648 - 32MHz/2
 * - 1342177280 - 32MHz/3
 * - 1073741824 - 32MHz/4
 * - 805306368 - 32MHz/5
 * - 671088640 - 32MHz/6
 * - 536870912 - 32MHz/8
 * - 402653184 - 32MHz/10
 * - 369098752 - 32MHz/11
 * - 285212672 - 32MHz/15
 * - 268435456 - 32MHz/16
 * - 201326592 - 32MHz/21
 * - 184549376 - 32MHz/23
 * - 142606336 - 32MHz/30
 * - 138412032 - 32MHz/31
 * - 134217728 - 32MHz/32
 * - 100663296 - 32MHz/42
 * - 68157440 - 32MHz/63
 * - 34340864 - 32MHz/125
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_MCK_SETUP
 /** @brief MCK/LRCK ratio
 *
 *  Following options are available:
 * - 0 - 32x
 * - 1 - 48x
 * - 2 - 64x
 * - 3 - 96x
 * - 4 - 128x
 * - 5 - 192x
 * - 6 - 256x
 * - 7 - 384x
 * - 8 - 512x
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_RATIO
 /** @brief Interrupt priority
 *
@ -173,6 +35,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_I2S_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_lpcomp_dox_config.h
+++ b/doc/config_dox/nrfx_lpcomp_dox_config.h
@ -11,65 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_LPCOMP_ENABLED
 /** @brief Reference voltage
 *
 *  Following options are available:
 * - 0 - Supply 1/8
 * - 1 - Supply 2/8
 * - 2 - Supply 3/8
 * - 3 - Supply 4/8
 * - 4 - Supply 5/8
 * - 5 - Supply 6/8
 * - 6 - Supply 7/8
 * - 8 - Supply 1/16 (nRF52)
 * - 9 - Supply 3/16 (nRF52)
 * - 10 - Supply 5/16 (nRF52)
 * - 11 - Supply 7/16 (nRF52)
 * - 12 - Supply 9/16 (nRF52)
 * - 13 - Supply 11/16 (nRF52)
 * - 14 - Supply 13/16 (nRF52)
 * - 15 - Supply 15/16 (nRF52)
 * - 7 - External Ref 0
 * - 65543 - External Ref 1
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_LPCOMP_CONFIG_REFERENCE
 /** @brief Detection
 *
 *  Following options are available:
 * - 0 - Crossing
 * - 1 - Up
 * - 2 - Down
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_LPCOMP_CONFIG_DETECTION
 /** @brief Analog input
 *
 *  Following options are available:
 * - 0
 * - 1
 * - 2
 * - 3
 * - 4
 * - 5
 * - 6
 * - 7
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_LPCOMP_CONFIG_INPUT
 /** @brief Hysteresis
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_LPCOMP_CONFIG_HYST
 /** @brief Interrupt priority
 *
@ -94,6 +35,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_LPCOMP_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_pdm_dox_config.h
+++ b/doc/config_dox/nrfx_pdm_dox_config.h
@ -11,36 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PDM_ENABLED
 /** @brief Mode
 *
 *  Following options are available:
 * - 0 - Stereo
 * - 1 - Mono
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PDM_CONFIG_MODE
 /** @brief Edge
 *
 *  Following options are available:
 * - 0 - Left falling
 * - 1 - Left rising
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PDM_CONFIG_EDGE
 /** @brief Clock frequency
 *
 *  Following options are available:
 * - 134217728 - 1000k
 * - 138412032 - 1032k (default)
 * - 142606336 - 1067k
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PDM_CONFIG_CLOCK_FREQ
 /** @brief Interrupt priority
 *
@ -65,6 +35,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PDM_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_power_dox_config.h
+++ b/doc/config_dox/nrfx_power_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_POWER_ENABLED
 /** @brief Interrupt priority
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_ppi_dox_config.h
+++ b/doc/config_dox/nrfx_ppi_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PPI_ENABLED
 /** @brief Enables logging in the module.
 *
 *  Set to 1 to activate.
@ -18,6 +19,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PPI_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_prs_dox_config.h
+++ b/doc/config_dox/nrfx_prs_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PRS_ENABLED
 /** @brief Enables box 0 in the module.
 *
 *  Set to 1 to activate.
@ -58,6 +59,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PRS_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_pwm_dox_config.h
+++ b/doc/config_dox/nrfx_pwm_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_ENABLED
 /** @brief Enable PWM0 instance
 *
 *  Set to 1 to activate.
@ -43,97 +44,6 @@
 */
 #define NRFX_PWM3_ENABLED
 /** @brief Out0 pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN
 /** @brief Out1 pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN
 /** @brief Out2 pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN
 /** @brief Out3 pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN
 /** @brief Base clock
 *
 *  Following options are available:
 * - 0 - 16 MHz
 * - 1 - 8 MHz
 * - 2 - 4 MHz
 * - 3 - 2 MHz
 * - 4 - 1 MHz
 * - 5 - 500 kHz
 * - 6 - 250 kHz
 * - 7 - 125 kHz
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK
 /** @brief Count mode
 *
 *  Following options are available:
 * - 0 - Up
 * - 1 - Up and Down
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE
 /** @brief Top value
 *
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE
 /** @brief Load mode
 *
 *  Following options are available:
 * - 0 - Common
 * - 1 - Grouped
 * - 2 - Individual
 * - 3 - Waveform
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE
 /** @brief Step mode
 *
 *  Following options are available:
 * - 0 - Auto
 * - 1 - Triggered
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -157,6 +67,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
@ -204,7 +115,6 @@
 */
 #define NRFX_PWM_CONFIG_DEBUG_COLOR
 /** @brief Enables nRF52 Anomaly 109 workaround for PWM.
 *
 * The workaround uses interrupts to wake up the CPU and ensure
@ -220,6 +130,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
 /** @brief EGU instance used by the nRF52 Anomaly 109 workaround for PWM.
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_qdec_dox_config.h
+++ b/doc/config_dox/nrfx_qdec_dox_config.h
@ -11,97 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_ENABLED
 /** @brief Report period
 *
 *  Following options are available:
 * - 0 - 10 Samples
 * - 1 - 40 Samples
 * - 2 - 80 Samples
 * - 3 - 120 Samples
 * - 4 - 160 Samples
 * - 5 - 200 Samples
 * - 6 - 240 Samples
 * - 7 - 280 Samples
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_REPORTPER
 /** @brief Sample period
 *
 *  Following options are available:
 * - 0 - 128 us
 * - 1 - 256 us
 * - 2 - 512 us
 * - 3 - 1024 us
 * - 4 - 2048 us
 * - 5 - 4096 us
 * - 6 - 8192 us
 * - 7 - 16384 us
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_SAMPLEPER
 /** @brief A pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_PIO_A
 /** @brief B pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_PIO_B
 /** @brief LED pin
 *
 *  Minimum value: 0
 *  Maximum value: 31
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_PIO_LED
 /** @brief LED pre
 *
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_LEDPRE
 /** @brief LED polarity
 *
 *  Following options are available:
 * - 0 - Active low
 * - 1 - Active high
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_LEDPOL
 /** @brief Debouncing enable
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_DBFEN
 /** @brief Sample ready interrupt enable
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_SAMPLE_INTEN
 /** @brief Interrupt priority
 *
@ -126,6 +35,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QDEC_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_qspi_dox_config.h
+++ b/doc/config_dox/nrfx_qspi_dox_config.h
@ -11,144 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_ENABLED
 /** @brief tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns).
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_CONFIG_SCK_DELAY
 /** @brief Address offset in the external memory for Execute in Place operation.
 *
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_CONFIG_XIP_OFFSET
 /** @brief Number of data lines and opcode used for reading.
 *
 *  Following options are available:
 * - 0 - FastRead
 * - 1 - Read2O
 * - 2 - Read2IO
 * - 3 - Read4O
 * - 4 - Read4IO
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_CONFIG_READOC
 /** @brief Number of data lines and opcode used for writing.
 *
 *  Following options are available:
 * - 0 - PP
 * - 1 - PP2O
 * - 2 - PP4O
 * - 3 - PP4IO
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_CONFIG_WRITEOC
 /** @brief Addressing mode.
 *
 *  Following options are available:
 * - 0 - 24bit
 * - 1 - 32bit
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_CONFIG_ADDRMODE
 /** @brief SPI mode.
 *
 *  Following options are available:
 * - 0 - Mode 0
 * - 1 - Mode 1
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_CONFIG_MODE
 /** @brief Frequency divider.
 *
 *  Following options are available:
 * - 0 - 32MHz/1
 * - 1 - 32MHz/2
 * - 2 - 32MHz/3
 * - 3 - 32MHz/4
 * - 4 - 32MHz/5
 * - 5 - 32MHz/6
 * - 6 - 32MHz/7
 * - 7 - 32MHz/8
 * - 8 - 32MHz/9
 * - 9 - 32MHz/10
 * - 10 - 32MHz/11
 * - 11 - 32MHz/12
 * - 12 - 32MHz/13
 * - 13 - 32MHz/14
 * - 14 - 32MHz/15
 * - 15 - 32MHz/16
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_CONFIG_FREQUENCY
 /** @brief SCK pin value.
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_PIN_SCK
 /** @brief CSN pin value.
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_PIN_CSN
 /** @brief IO0 pin value.
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_PIN_IO0
 /** @brief IO1 pin value.
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_PIN_IO1
 /** @brief IO2 pin value.
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_PIN_IO2
 /** @brief IO3 pin value.
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_QSPI_PIN_IO3
 /** @brief Interrupt priority
 *
--- a/doc/config_dox/nrfx_rng_dox_config.h
+++ b/doc/config_dox/nrfx_rng_dox_config.h
@ -11,13 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_RNG_ENABLED
 /** @brief Error correction
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_RNG_CONFIG_ERROR_CORRECTION
 /** @brief Interrupt priority
 *
--- a/doc/config_dox/nrfx_rtc_dox_config.h
+++ b/doc/config_dox/nrfx_rtc_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_RTC_ENABLED
 /** @brief Enable RTC0 instance
 *
 *  Set to 1 to activate.
@ -35,30 +36,6 @@
 */
 #define NRFX_RTC2_ENABLED
 /** @brief Maximum possible time[us] in highest priority interrupt
 *
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_RTC_MAXIMUM_LATENCY_US
 /** @brief Frequency
 *
 *  Minimum value: 16
 *  Maximum value: 32768
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY
 /** @brief Ensures safe compare event triggering
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_RTC_DEFAULT_CONFIG_RELIABLE
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -82,6 +59,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_RTC_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_saadc_dox_config.h
+++ b/doc/config_dox/nrfx_saadc_dox_config.h
@ -11,42 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SAADC_ENABLED
 /** @brief Resolution
 *
 *  Following options are available:
 * - 0 - 8 bit
 * - 1 - 10 bit
 * - 2 - 12 bit
 * - 3 - 14 bit
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SAADC_CONFIG_RESOLUTION
 /** @brief Sample period
 *
 *  Following options are available:
 * - 0 - Disabled
 * - 1 - 2x
 * - 2 - 4x
 * - 3 - 8x
 * - 4 - 16x
 * - 5 - 32x
 * - 6 - 64x
 * - 7 - 128x
 * - 8 - 256x
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SAADC_CONFIG_OVERSAMPLE
 /** @brief Enabling low power mode
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SAADC_CONFIG_LP_MODE
 /** @brief Interrupt priority
 *
@ -71,6 +35,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SAADC_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_spi_dox_config.h
+++ b/doc/config_dox/nrfx_spi_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPI_ENABLED
 /** @brief Enable SPI0 instance
 *
 *  Set to 1 to activate.
@ -35,17 +36,6 @@
 */
 #define NRFX_SPI2_ENABLED
 /** @brief MISO pin pull configuration.
 *
 *  Following options are available:
 * - 0 - NRF_GPIO_PIN_NOPULL
 * - 1 - NRF_GPIO_PIN_PULLDOWN
 * - 3 - NRF_GPIO_PIN_PULLUP
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPI_MISO_PULL_CFG
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -69,6 +59,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPI_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_spim_dox_config.h
+++ b/doc/config_dox/nrfx_spim_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPIM_ENABLED
 /** @brief Enable SPIM0 instance
 *
 *  Set to 1 to activate.
@ -51,17 +52,6 @@
 */
 #define NRFX_SPIM_EXTENDED_ENABLED
 /** @brief MISO pin pull configuration.
 *
 *  Following options are available:
 * - 0 - NRF_GPIO_PIN_NOPULL
 * - 1 - NRF_GPIO_PIN_PULLDOWN
 * - 3 - NRF_GPIO_PIN_PULLUP
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPIM_MISO_PULL_CFG
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -85,6 +75,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPIM_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_spis_dox_config.h
+++ b/doc/config_dox/nrfx_spis_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPIS_ENABLED
 /** @brief Enable SPIS0 instance
 *
 *  Set to 1 to activate.
@ -51,24 +52,6 @@
 */
 #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
 /** @brief SPIS default DEF character
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPIS_DEFAULT_DEF
 /** @brief SPIS default ORC character
 *
 *  Minimum value: 0
 *  Maximum value: 255
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPIS_DEFAULT_ORC
 /** @brief Enables logging in the module.
 *
 *  Set to 1 to activate.
@ -76,6 +59,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SPIS_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_swi_dox_config.h
+++ b/doc/config_dox/nrfx_swi_dox_config.h
@ -1,126 +0,0 @@
 /**
 *
 * @defgroup nrfx_swi_config SWI/EGU peripheral allocator configuration
 * @{
 * @ingroup nrfx_swi
 */
 /** @brief Enable SWI/EGU allocator
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI_ENABLED
 /** @brief Enable EGU support
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_EGU_ENABLED
 /** @brief Exclude SWI0 from being utilized by the driver
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI0_DISABLED
 /** @brief Exclude SWI1 from being utilized by the driver
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI1_DISABLED
 /** @brief Exclude SWI2 from being utilized by the driver
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI2_DISABLED
 /** @brief Exclude SWI3 from being utilized by the driver
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI3_DISABLED
 /** @brief Exclude SWI4 from being utilized by the driver
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI4_DISABLED
 /** @brief Exclude SWI5 from being utilized by the driver
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI5_DISABLED
 /** @brief Enables logging in the module.
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
 * - 0 - Off
 * - 1 - Error
 * - 2 - Warning
 * - 3 - Info
 * - 4 - Debug
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI_CONFIG_LOG_LEVEL
 /** @brief ANSI escape code prefix.
 *
 *  Following options are available:
 * - 0 - Default
 * - 1 - Black
 * - 2 - Red
 * - 3 - Green
 * - 4 - Yellow
 * - 5 - Blue
 * - 6 - Magenta
 * - 7 - Cyan
 * - 8 - White
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI_CONFIG_INFO_COLOR
 /** @brief ANSI escape code prefix.
 *
 *  Following options are available:
 * - 0 - Default
 * - 1 - Black
 * - 2 - Red
 * - 3 - Green
 * - 4 - Yellow
 * - 5 - Blue
 * - 6 - Magenta
 * - 7 - Cyan
 * - 8 - White
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_SWI_CONFIG_DEBUG_COLOR
 /** @} */
--- a/doc/config_dox/nrfx_timer_dox_config.h
+++ b/doc/config_dox/nrfx_timer_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TIMER_ENABLED
 /** @brief Enable TIMER0 instance
 *
 *  Set to 1 to activate.
@ -51,46 +52,6 @@
 */
 #define NRFX_TIMER4_ENABLED
 /** @brief Timer frequency if in Timer mode
 *
 *  Following options are available:
 * - 0 - 16 MHz
 * - 1 - 8 MHz
 * - 2 - 4 MHz
 * - 3 - 2 MHz
 * - 4 - 1 MHz
 * - 5 - 500 kHz
 * - 6 - 250 kHz
 * - 7 - 125 kHz
 * - 8 - 62.5 kHz
 * - 9 - 31.25 kHz
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY
 /** @brief Timer mode or operation
 *
 *  Following options are available:
 * - 0 - Timer
 * - 1 - Counter
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TIMER_DEFAULT_CONFIG_MODE
 /** @brief Timer counter bit width
 *
 *  Following options are available:
 * - 0 - 16 bit
 * - 1 - 8 bit
 * - 2 - 24 bit
 * - 3 - 32 bit
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -114,6 +75,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TIMER_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_twi_dox_config.h
+++ b/doc/config_dox/nrfx_twi_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWI_ENABLED
 /** @brief Enable TWI0 instance
 *
 *  Set to 1 to activate.
@ -27,25 +28,6 @@
 */
 #define NRFX_TWI1_ENABLED
 /** @brief Frequency
 *
 *  Following options are available:
 * - 26738688 - 100k
 * - 67108864 - 250k
 * - 104857600 - 400k
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY
 /** @brief Enables bus holding after uninit
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -69,6 +51,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWI_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_twim_dox_config.h
+++ b/doc/config_dox/nrfx_twim_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIM_ENABLED
 /** @brief Enable TWIM0 instance
 *
 *  Set to 1 to activate.
@ -27,25 +28,6 @@
 */
 #define NRFX_TWIM1_ENABLED
 /** @brief Frequency
 *
 *  Following options are available:
 * - 26738688 - 100k
 * - 67108864 - 250k
 * - 104857600 - 400k
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY
 /** @brief Enables bus holding after uninit
 *
 *  Set to 1 to activate.
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -69,6 +51,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIM_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_twis_dox_config.h
+++ b/doc/config_dox/nrfx_twis_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIS_ENABLED
 /** @brief Enable TWIS0 instance
 *
 *  Set to 1 to activate.
@ -47,42 +48,6 @@
 */
 #define NRFX_TWIS_NO_SYNC_MODE
 /** @brief Address0
 *
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIS_DEFAULT_CONFIG_ADDR0
 /** @brief Address1
 *
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIS_DEFAULT_CONFIG_ADDR1
 /** @brief SCL pin pull configuration
 *
 *  Following options are available:
 * - 0 - Disabled
 * - 1 - Pull down
 * - 3 - Pull up
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL
 /** @brief SDA pin pull configuration
 *
 *  Following options are available:
 * - 0 - Disabled
 * - 1 - Pull down
 * - 3 - Pull up
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL
 /** @brief Interrupt priority
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_uart_dox_config.h
+++ b/doc/config_dox/nrfx_uart_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UART_ENABLED
 /** @brief Enable UART0 instance
 *
 *
@ -18,52 +19,6 @@
 */
 #define NRFX_UART0_ENABLED
 /** @brief Hardware Flow Control
 *
 *  Following options are available:
 * - 0 - Disabled
 * - 1 - Enabled
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UART_DEFAULT_CONFIG_HWFC
 /** @brief Parity
 *
 *  Following options are available:
 * - 0 - Excluded
 * - 14 - Included
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UART_DEFAULT_CONFIG_PARITY
 /** @brief Default Baudrate
 *
 *  Following options are available:
 * - 323584 - 1200 baud
 * - 643072 - 2400 baud
 * - 1290240 - 4800 baud
 * - 2576384 - 9600 baud
 * - 3866624 - 14400 baud
 * - 5152768 - 19200 baud
 * - 7729152 - 28800 baud
 * - 8388608 - 31250 baud
 * - 10309632 - 38400 baud
 * - 15007744 - 56000 baud
 * - 15462400 - 57600 baud
 * - 20615168 - 76800 baud
 * - 30924800 - 115200 baud
 * - 61845504 - 230400 baud
 * - 67108864 - 250000 baud
 * - 123695104 - 460800 baud
 * - 247386112 - 921600 baud
 * - 268435456 - 1000000 baud
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UART_DEFAULT_CONFIG_BAUDRATE
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -87,6 +42,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UART_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_uarte_dox_config.h
+++ b/doc/config_dox/nrfx_uarte_dox_config.h
@ -11,6 +11,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UARTE_ENABLED
 /** @brief Enable UARTE0 instance
 *
 *
@ -25,52 +26,6 @@
 */
 #define NRFX_UARTE1_ENABLED
 /** @brief Hardware Flow Control
 *
 *  Following options are available:
 * - 0 - Disabled
 * - 1 - Enabled
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UARTE_DEFAULT_CONFIG_HWFC
 /** @brief Parity
 *
 *  Following options are available:
 * - 0 - Excluded
 * - 14 - Included
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UARTE_DEFAULT_CONFIG_PARITY
 /** @brief Default Baudrate
 *
 *  Following options are available:
 * - 323584 - 1200 baud
 * - 643072 - 2400 baud
 * - 1290240 - 4800 baud
 * - 2576384 - 9600 baud
 * - 3862528 - 14400 baud
 * - 5152768 - 19200 baud
 * - 7716864 - 28800 baud
 * - 8388608 - 31250 baud
 * - 10289152 - 38400 baud
 * - 15007744 - 56000 baud
 * - 15400960 - 57600 baud
 * - 20615168 - 76800 baud
 * - 30801920 - 115200 baud
 * - 61865984 - 230400 baud
 * - 67108864 - 250000 baud
 * - 121634816 - 460800 baud
 * - 251658240 - 921600 baud
 * - 268435456 - 1000000 baud
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE
 /** @brief Interrupt priority
 *
 *  Following options are available:
@ -94,6 +49,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_UARTE_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/config_dox/nrfx_wdt_dox_config.h
+++ b/doc/config_dox/nrfx_wdt_dox_config.h
@ -11,26 +11,6 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_WDT_ENABLED
 /** @brief WDT behavior in CPU SLEEP or HALT mode
 *
 *  Following options are available:
 * - 1 - Run in SLEEP, Pause in HALT
 * - 8 - Pause in SLEEP, Run in HALT
 * - 9 - Run in SLEEP and HALT
 * - 0 - Pause in SLEEP and HALT
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_WDT_CONFIG_BEHAVIOUR
 /** @brief Reload value
 *
 *  Minimum value: 15
 *  Maximum value: 4294967295
 *
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_WDT_CONFIG_RELOAD_VALUE
 /** @brief Remove WDT IRQ handling from WDT driver
 *
@ -65,6 +45,7 @@
 * @note This is an NRF_CONFIG macro.
 */
 #define NRFX_WDT_CONFIG_LOG_ENABLED
 /** @brief Default Severity level
 *
 *  Following options are available:
--- a/doc/drv_supp_matrix.dox
+++ b/doc/drv_supp_matrix.dox
@ -3,53 +3,58 @@
 The following matrix shows which drivers are supported by specific Nordic SoCs.
@{
-Driver           | nRF51 Series | nRF52810/nRF52811 | nRF52832     | nRF52840     | nRF9160      |
+Driver           | nRF51 Series | nRF52810/nRF52811 | nRF52832     | nRF52833     | nRF52840     | nRF5340      | nRF9160      |
-----------------|--------------|-------------------|--------------|--------------|--------------|
+-----------------|--------------|-------------------| -------------| -------------| -------------| -------------| -------------|
-@ref nrf_aar     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_aar     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_adc     |@tagGreenTick |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |
+@ref nrf_acl     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_acl     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagGreenTick |@tagRedCross  |
+@ref nrf_adc     |@tagGreenTick |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagRedCross  |
-@ref nrf_bprot   |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagRedCross  |@tagRedCross  |
+@ref nrf_bprot   |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagRedCross  |
-@ref nrf_ccm     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_cache   |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagRedCross  |
-@ref nrf_clock   |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_ccm     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_comp    |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_clock   |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_dppi    |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagGreenTick |
+@ref nrf_comp    |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_ecb     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_systick |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_ficr    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_dppi    |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagGreenTick |
-@ref nrf_gpio    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_ecb     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_gpiote  |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_egu     |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_i2s     |@tagRedCross  |@tagRedCross       |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_ficr    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_kmu     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagGreenTick |
+@ref nrf_fpu     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagRedCross  |
-@ref nrf_lpcomp  |@tagGreenTick |@tagRedCross       |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_gpio    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_mpu     |@tagGreenTick |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |
+@ref nrf_gpiote  |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_mwu     |@tagRedCross  |@tagRedCross       |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_i2s     |@tagRedCross  |@tagRedCross       |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_nfct    |@tagRedCross  |@tagRedCross       |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_ipc     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagGreenTick |
-@ref nrf_nvmc    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_kmu     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagGreenTick |
-@ref nrf_pdm     |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_lpcomp  |@tagGreenTick |@tagRedCross       |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_power   |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_mpu     |@tagGreenTick |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagRedCross  |
-@ref nrf_ppi     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_mutex   |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagRedCross  |
-@ref nrf_pwm     |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_mwu     |@tagRedCross  |@tagRedCross       |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |@tagRedCross  |
-@ref nrf_qdec    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_nfct    |@tagRedCross  |@tagRedCross       |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_qspi    |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagGreenTick |@tagRedCross  |
+@ref nrf_nvmc    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_radio   |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_pdm     |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_rng     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_power   |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_rtc     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_ppi     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |@tagRedCross  |
-@ref nrf_saadc   |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_pwm     |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_spi     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_qdec    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_spim    |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_qspi    |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_spis    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_radio   |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_spu     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagGreenTick |
+@ref nrf_reset   |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagRedCross  |
-@ref nrf_systick |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_rng     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_swi_egu |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_rtc     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_temp    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_saadc   |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_timer   |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_spi     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |@tagRedCross  |
-@ref nrf_twi     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_spim    |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_twim    |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_spis    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_twis    |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_spu     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagGreenTick |
-@ref nrf_uart    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagRedCross  |
+@ref nrf_temp    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |
-@ref nrf_uarte   |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_timer   |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_usbd    |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagGreenTick |@tagRedCross  |
+@ref nrf_twi     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |@tagRedCross  |
-@ref nrf_vmc     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagGreenTick |
+@ref nrf_twim    |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_wdt     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_twis    |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
@ref nrf_uart    |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross  |@tagRedCross  |
@ref nrf_uarte   |@tagRedCross  |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
@ref nrf_usbd    |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagGreenTick |@tagGreenTick |@tagRedCross  |@tagRedCross  |
@ref nrf_vmc     |@tagRedCross  |@tagRedCross       |@tagRedCross  |@tagRedCross  |@tagRedCross  |@tagGreenTick |@tagGreenTick |
@ref nrf_wdt     |@tagGreenTick |@tagGreenTick      |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
@}
 */
--- a/doc/nrf51_series.dox
+++ b/doc/nrf51_series.dox
@ -40,8 +40,6 @@
@ref nrf_spis
@ref nrf_swi_egu
@ref nrf_temp
@ref nrf_timer
--- a/doc/nrf52810.dox
+++ b/doc/nrf52810.dox
@ -12,8 +12,12 @@
@ref nrf_comp
@ref nrf_systick
@ref nrf_ecb
@ref nrf_egu
@ref nrf_ficr
@ref nrf_gpio
@ -46,10 +50,6 @@
@ref nrf_spis
@ref nrf_systick
@ref nrf_swi_egu
@ref nrf_temp
@ref nrf_timer
--- a/doc/nrf52832.dox
+++ b/doc/nrf52832.dox
@ -12,8 +12,12 @@
@ref nrf_comp
@ref nrf_systick
@ref nrf_ecb
@ref nrf_egu
@ref nrf_ficr
@ref nrf_gpio
@ -54,10 +58,6 @@
@ref nrf_spis
@ref nrf_systick
@ref nrf_swi_egu
@ref nrf_temp
@ref nrf_timer
--- a/doc/nrf52833.dox
+++ b/doc/nrf52833.dox
@ -0,0 +1,80 @@
 /**
@page nrf52833_drivers nRF52833 Drivers
@{
@ref nrf_aar
@ref nrf_acl
@ref nrf_ccm
@ref nrf_clock
@ref nrf_comp
@ref nrf_systick
@ref nrf_ecb
@ref nrf_egu
@ref nrf_ficr
@ref nrf_gpio
@ref nrf_gpiote
@ref nrf_i2s
@ref nrf_lpcomp
@ref nrf_mwu
@ref nrf_nfct
@ref nrf_nvmc
@ref nrf_pdm
@ref nrf_power
@ref nrf_ppi
@ref nrf_pwm
@ref nrf_qdec
@ref nrf_radio
@ref nrf_rng
@ref nrf_rtc
@ref nrf_saadc
@ref nrf_spi
@ref nrf_spim
@ref nrf_spis
@ref nrf_temp
@ref nrf_timer
@ref nrf_twi
@ref nrf_twim
@ref nrf_twis
@ref nrf_uart
@ref nrf_uarte
@ref nrf_usbd
@ref nrf_wdt
@}
 */
--- a/doc/nrf52840.dox
+++ b/doc/nrf52840.dox
@ -12,8 +12,12 @@
@ref nrf_comp
@ref nrf_systick
@ref nrf_ecb
@ref nrf_egu
@ref nrf_ficr
@ref nrf_gpio
@ -56,10 +60,6 @@
@ref nrf_spis
@ref nrf_systick
@ref nrf_swi_egu
@ref nrf_temp
@ref nrf_timer
--- a/doc/nrf5340.dox
+++ b/doc/nrf5340.dox
@ -0,0 +1,86 @@
 /**
@page nrf5340_drivers nRF5340 drivers
@{
@ref nrf_aar
@ref nrf_acl
@ref nrf_ccm
@ref nrf_cache
@ref nrf_clock
@ref nrf_comp
@ref nrf_systick
@ref nrf_dppi
@ref nrf_ecb
@ref nrf_egu
@ref nrf_ficr
@ref nrf_fpu
@ref nrf_gpio
@ref nrf_gpiote
@ref nrf_i2s
@ref nrf_ipc
@ref nrf_kmu
@ref nrf_mutex
@ref nrf_nfct
@ref nrf_nvmc
@ref nrf_pdm
@ref nrf_power
@ref nrf_pwm
@ref nrf_qdec
@ref nrf_qspi
@ref nrf_radio
@ref nrf_reset
@ref nrf_rng
@ref nrf_rtc
@ref nrf_saadc
@ref nrf_spim
@ref nrf_spis
@ref nrf_spu
@ref nrf_temp
@ref nrf_timer
@ref nrf_twim
@ref nrf_twis
@ref nrf_uarte
@ref nrf_vmc
@ref nrf_wdt
@}
 */
--- a/doc/nrf9160.dox
+++ b/doc/nrf9160.dox
@ -8,6 +8,8 @@
@ref nrf_dppi
@ref nrf_egu
@ref nrf_ficr
@ref nrf_gpio
@ -16,6 +18,8 @@
@ref nrf_i2s
@ref nrf_ipc
@ref nrf_kmu
@ref nrf_nvmc
@ -36,8 +40,6 @@
@ref nrf_spu
@ref nrf_swi_egu
@ref nrf_timer
@ref nrf_twim
--- a/doc/nrfx.doxyfile
+++ b/doc/nrfx.doxyfile
@ -40,7 +40,7 @@ PROJECT_NAME           = "nrfx"
 ### EDIT THIS ###
-PROJECT_NUMBER         = "1.7"
+PROJECT_NUMBER         = "2.0"
 # Using the PROJECT_BRIEF tag one can provide an optional one line description
 # for a project that appears at the top of each page and should give viewer a
@ -755,7 +755,7 @@ WARN_IF_DOC_ERROR      = YES
 # parameter documentation, but not about the absence of documentation.
 # The default value is: NO.
-WARN_NO_PARAMDOC       = NO
+WARN_NO_PARAMDOC       = YES
 # If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when
 # a warning is encountered.
@ -791,7 +791,8 @@ WARN_LOGFILE           = warnings_nrfx.txt
 ### EDIT THIS ###
-INPUT                  = ../drivers \
+INPUT                  = ../helpers \
                         ../drivers \
                         ../hal \
                         ../soc \
                         ../templates \
--- a/doc/nrfx_api.dox
+++ b/doc/nrfx_api.dox
@ -5,36 +5,48 @@
@defgroup nrf_aar AAR
@defgroup nrf_adc ADC
@defgroup nrf_acl ACL
@defgroup nrf_adc ADC
@defgroup nrf_bprot BPROT
@defgroup nrf_cache CACHE
@defgroup nrf_ccm CCM
@defgroup nrf_clock CLOCK
@defgroup nrf_comp COMP
@defgroup nrf_systick Cortex-M Systick
@defgroup nrf_dppi DPPI
@defgroup nrf_ecb ECB
@defgroup nrf_egu EGU
@defgroup nrf_ficr FICR
@defgroup nrf_fpu FPU
@defgroup nrf_gpio GPIO
@defgroup nrf_gpiote GPIOTE
@defgroup nrf_i2s I2S
@defgroup nrf_ipc IPC
@defgroup nrf_kmu KMU
@defgroup nrf_lpcomp LPCOMP
@defgroup nrf_mpu MPU
@defgroup nrf_mutex MUTEX
@defgroup nrf_mwu MWU
@defgroup nrf_nfct NFCT
@ -55,6 +67,8 @@
@defgroup nrf_radio RADIO
@defgroup nrf_reset RESET
@defgroup nrf_rng RNG
@defgroup nrf_rtc RTC
@ -69,10 +83,6 @@
@defgroup nrf_spu SPU
@defgroup nrf_systick Cortex-M Systick
@defgroup nrf_swi_egu SWI/EGU
@defgroup nrf_temp TEMP
@defgroup nrf_timer TIMER
--- a/drivers/include/nrf_bitmask.h
+++ b/drivers/include/nrf_bitmask.h
@ -57,21 +57,22 @@ extern "C" {
 * @param[in] bit    Bit index.
 * @param[in] p_mask Pointer to mask with bit fields.
 *
- * @return 0 if bit is not set, positive value otherwise.
+ * @retval true  If the specified bit is set.
 * @retval false If the specified bit is cleared.
 */
-__STATIC_INLINE uint32_t nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask)
+__STATIC_INLINE bool nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask)
 {
    uint8_t const * p_mask8 = (uint8_t const *)p_mask;
    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
    bit = BITMASK_RELBIT_GET(bit);
-    return (1 << bit) & p_mask8[byte_idx];
+    return ((1U << bit) & p_mask8[byte_idx]) != 0U;
 }
 /**
 * @brief Function for setting a bit in the multi-byte bit mask.
 *
 * @param[in]     bit    Bit index.
- * @param[in] p_mask Pointer to mask with bit fields.
+ * @param[in,out] p_mask Pointer to mask with bit fields.
 */
 __STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
 {
@ -85,7 +86,7 @@ __STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
 * @brief Function for clearing a bit in the multi-byte bit mask.
 *
 * @param[in]     bit    Bit index.
- * @param[in] p_mask Pointer to mask with bit fields.
+ * @param[in,out] p_mask Pointer to mask with bit fields.
 */
 __STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
 {
@ -100,19 +101,18 @@ __STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
 *
 * @param[in]  p_mask1    Pointer to the first bit mask.
 * @param[in]  p_mask2    Pointer to the second bit mask.
- * @param[in] p_out_mask Pointer to the output bit mask.
+ * @param[out] p_out_mask Pointer to the output bit mask.
 * @param[in]  length     Length of output mask in bytes.
 */
 __STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1,
                                          void const * p_mask2,
                                          void *       p_out_mask,
-                                          uint32_t       length)
+                                          size_t       length)
 {
    uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1;
    uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2;
    uint8_t * p_mask8_out = (uint8_t *)p_out_mask;
-    uint32_t i;
+    for (size_t i = 0; i < length; i++)
    for (i = 0; i < length; i++)
    {
        p_mask8_out[i] = p_mask8_1[i] | p_mask8_2[i];
    }
@ -123,19 +123,18 @@ __STATIC_INLINE void nrf_bitmask_masks_or(void const *   p_mask1,
 *
 * @param[in]  p_mask1    Pointer to the first bit mask.
 * @param[in]  p_mask2    Pointer to the second bit mask.
- * @param[in] p_out_mask Pointer to the output bit mask.
+ * @param[out] p_out_mask Pointer to the output bit mask.
 * @param[in]  length     Length of output mask in bytes.
 */
 __STATIC_INLINE void nrf_bitmask_masks_and(void const * p_mask1,
                                           void const * p_mask2,
                                           void *       p_out_mask,
-                                           uint32_t       length)
+                                           size_t       length)
 {
    uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1;
    uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2;
    uint8_t * p_mask8_out = (uint8_t *)p_out_mask;
-    uint32_t i;
+    for (size_t i = 0; i < length; i++)
    for (i = 0; i < length; i++)
    {
        p_mask8_out[i] = p_mask8_1[i] & p_mask8_2[i];
    }
--- a/drivers/include/nrfx_adc.h
+++ b/drivers/include/nrfx_adc.h
@ -77,7 +77,17 @@ typedef struct
    } data;                           ///< Union to store event data.
 } nrfx_adc_evt_t;
-/** @brief Macro for initializing the ADC channel with the default configuration. */
+/**
 * @brief ADC channel default configuration.
 *
 * This configuration sets up ADC channel with the following options:
 * - 10 bits resolution
 * - full scale input
 * - reference voltage: 1.2 V
 * - external reference input disabled
 *
 * @param[in] analog_input Analog input.
 */
 #define NRFX_ADC_DEFAULT_CHANNEL(analog_input)                 \
 {                                                              \
    NULL,                                                      \
@ -85,7 +95,7 @@ typedef struct
        .resolution = NRF_ADC_CONFIG_RES_10BIT,                \
        .scaling    = NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE, \
        .reference  = NRF_ADC_CONFIG_REF_VBG,                  \
-        .input      = (analog_input),                          \
+        .input      = (nrf_adc_config_input_t)analog_input,    \
        .extref     = NRF_ADC_CONFIG_EXTREFSEL_NONE            \
    }                                                          \
 }
@ -114,7 +124,7 @@ typedef struct
 /** @brief ADC default configuration. */
 #define NRFX_ADC_DEFAULT_CONFIG                                \
 {                                                              \
-    .interrupt_priority = NRFX_ADC_CONFIG_IRQ_PRIORITY \
+    .interrupt_priority = NRFX_ADC_DEFAULT_CONFIG_IRQ_PRIORITY \
 }
 /**
@ -206,7 +216,7 @@ void nrfx_adc_sample(void);
 * @retval NRFX_SUCCESS    Conversion was successful.
 * @retval NRFX_ERROR_BUSY The ADC driver is busy.
 */
-nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
+nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * p_channel,
                                   nrf_adc_value_t *          p_value);
 /**
@ -256,16 +266,14 @@ bool nrfx_adc_is_busy(void);
 *
 * @return Start task address.
 */
-__STATIC_INLINE uint32_t nrfx_adc_start_task_get(void);
+NRFX_STATIC_INLINE uint32_t nrfx_adc_start_task_get(void);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-
+NRFX_STATIC_INLINE uint32_t nrfx_adc_start_task_get(void)
 __STATIC_INLINE uint32_t nrfx_adc_start_task_get(void)
 {
-    return nrf_adc_task_address_get(NRF_ADC_TASK_START);
+    return nrf_adc_task_address_get(NRF_ADC, NRF_ADC_TASK_START);
 }
-
+#endif // NRFX_DECLARE_ONLY
 #endif
 /** @} */
--- a/drivers/include/nrfx_clock.h
+++ b/drivers/include/nrfx_clock.h
@ -97,7 +97,7 @@ void nrfx_clock_lfclk_stop(void);
 * @retval true  The LFCLK is running.
 * @retval false The LFCLK is not running.
 */
-__STATIC_INLINE bool nrfx_clock_lfclk_is_running(void);
+NRFX_STATIC_INLINE bool nrfx_clock_lfclk_is_running(void);
 /** @brief Function for starting the high-accuracy source HFCLK. */
 void nrfx_clock_hfclk_start(void);
@ -111,7 +111,7 @@ void nrfx_clock_hfclk_stop(void);
 * @retval true  The HFCLK is running (XTAL source).
 * @retval false The HFCLK is not running.
 */
-__STATIC_INLINE bool nrfx_clock_hfclk_is_running(void);
+NRFX_STATIC_INLINE bool nrfx_clock_hfclk_is_running(void);
 /**
 * @brief Function for starting the calibration of internal LFCLK.
@ -151,7 +151,7 @@ void nrfx_clock_calibration_timer_stop(void);
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task);
+NRFX_STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task);
 /**@brief Function for returning a requested event address for the clock driver module.
 *
@ -159,30 +159,30 @@ __STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task);
 *
 * @return Event address.
 */
-__STATIC_INLINE uint32_t nrfx_clock_ppi_event_addr(nrf_clock_event_t event);
+NRFX_STATIC_INLINE uint32_t nrfx_clock_ppi_event_addr(nrf_clock_event_t event);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-__STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task)
+NRFX_STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task)
 {
-    return nrf_clock_task_address_get(task);
+    return nrf_clock_task_address_get(NRF_CLOCK, task);
 }
-__STATIC_INLINE uint32_t nrfx_clock_ppi_event_addr(nrf_clock_event_t event)
+NRFX_STATIC_INLINE uint32_t nrfx_clock_ppi_event_addr(nrf_clock_event_t event)
 {
-    return nrf_clock_event_address_get(event);
+    return nrf_clock_event_address_get(NRF_CLOCK, event);
 }
-__STATIC_INLINE bool nrfx_clock_hfclk_is_running(void)
+NRFX_STATIC_INLINE bool nrfx_clock_hfclk_is_running(void)
 {
-    return nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY);
+    return nrf_clock_hf_is_running(NRF_CLOCK, NRF_CLOCK_HFCLK_HIGH_ACCURACY);
 }
-__STATIC_INLINE bool nrfx_clock_lfclk_is_running(void)
+NRFX_STATIC_INLINE bool nrfx_clock_lfclk_is_running(void)
 {
-    return nrf_clock_lf_is_running();
+    return nrf_clock_lf_is_running(NRF_CLOCK);
 }
-#endif //SUPPRESS_INLINE_IMPLEMENTATION
+#endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_comp.h
+++ b/drivers/include/nrfx_comp.h
@ -104,31 +104,42 @@ typedef struct
    .th_up   = NRFX_VOLTAGE_THRESHOLD_TO_INT(1.5, 1.8)  \
 }
-/** @brief COMP driver default configuration including the COMP HAL configuration. */
+/**
 * @brief COMP driver default configuration.
 *
 * This configuration sets up COMP with the following options:
 * - single-ended mode
 * - reference voltage: internal 1.8 V
 * - lower threshold: 0.5 V
 * - upper threshold: 1.5 V
 * - high speed mode
 * - hysteresis disabled
 * - current source disabled
 *
 * @param[in] _input Analog input.
 */
 #if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__)
 #define NRFX_COMP_DEFAULT_CONFIG(_input)                         \
 {                                                                \
-    .reference          = (nrf_comp_ref_t)NRFX_COMP_CONFIG_REF,             \
+    .reference          = NRF_COMP_REF_Int1V8,                   \
-    .ext_ref            = NRF_COMP_EXT_REF_0,                               \
+    .main_mode          = NRF_COMP_MAIN_MODE_SE,                 \
    .main_mode          = (nrf_comp_main_mode_t)NRFX_COMP_CONFIG_MAIN_MODE, \
    .threshold          = NRFX_COMP_CONFIG_TH,                   \
-    .speed_mode         = (nrf_comp_sp_mode_t)NRFX_COMP_CONFIG_SPEED_MODE,  \
+    .speed_mode         = NRF_COMP_SP_MODE_High,                 \
-    .hyst               = (nrf_comp_hyst_t)NRFX_COMP_CONFIG_HYST,           \
+    .hyst               = NRF_COMP_HYST_NoHyst,                  \
-    .isource            = (nrf_isource_t)NRFX_COMP_CONFIG_ISOURCE,          \
+    .isource            = NRF_COMP_ISOURCE_Off,                  \
    .input              = (nrf_comp_input_t)_input,              \
-    .interrupt_priority = NRFX_COMP_CONFIG_IRQ_PRIORITY                     \
+    .interrupt_priority = NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }
 #else
 #define NRFX_COMP_DEFAULT_CONFIG(_input)                         \
 {                                                                \
-    .reference          = (nrf_comp_ref_t)NRFX_COMP_CONFIG_REF,             \
+    .reference          = NRF_COMP_REF_Int1V8,                   \
-    .ext_ref            = NRF_COMP_EXT_REF_0,                               \
+    .main_mode          = NRF_COMP_MAIN_MODE_SE,                 \
    .main_mode          = (nrf_comp_main_mode_t)NRFX_COMP_CONFIG_MAIN_MODE, \
    .threshold          = NRFX_COMP_CONFIG_TH,                   \
-    .speed_mode         = (nrf_comp_sp_mode_t)NRFX_COMP_CONFIG_SPEED_MODE,  \
+    .speed_mode         = NRF_COMP_SP_MODE_High,                 \
-    .hyst               = (nrf_comp_hyst_t)NRFX_COMP_CONFIG_HYST,           \
+    .hyst               = NRF_COMP_HYST_NoHyst,                  \
    .input              = (nrf_comp_input_t)_input,              \
-    .interrupt_priority = NRFX_COMP_CONFIG_IRQ_PRIORITY                     \
+    .interrupt_priority = NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }
 #endif
@ -209,10 +220,7 @@ uint32_t nrfx_comp_sample(void);
 *
 * @return Address of the given COMP task.
 */
-__STATIC_INLINE uint32_t nrfx_comp_task_address_get(nrf_comp_task_t task)
+NRFX_STATIC_INLINE uint32_t nrfx_comp_task_address_get(nrf_comp_task_t task);
 {
    return (uint32_t)nrf_comp_task_address_get(task);
 }
 /**
 * @brief Function for getting the address of a COMP event.
@ -221,11 +229,20 @@ __STATIC_INLINE uint32_t nrfx_comp_task_address_get(nrf_comp_task_t task)
 *
 * @return Address of the given COMP event.
 */
-__STATIC_INLINE uint32_t nrfx_comp_event_address_get(nrf_comp_event_t event)
+NRFX_STATIC_INLINE uint32_t nrfx_comp_event_address_get(nrf_comp_event_t event);
 #ifndef NRFX_DECLARE_ONLY
 NRFX_STATIC_INLINE uint32_t nrfx_comp_task_address_get(nrf_comp_task_t task)
 {
-    return (uint32_t)nrf_comp_event_address_get(event);
+    return nrf_comp_task_address_get(NRF_COMP, task);
 }
 NRFX_STATIC_INLINE uint32_t nrfx_comp_event_address_get(nrf_comp_event_t event)
 {
    return nrf_comp_event_address_get(NRF_COMP, event);
 }
 #endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_egu.h
+++ b/drivers/include/nrfx_egu.h
@ -0,0 +1,157 @@
 /*
 * Copyright (c) 2019, Nordic Semiconductor ASA
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 #ifndef NRFX_EGU_H__
 #define NRFX_EGU_H__
 #include <nrfx.h>
 #include <hal/nrf_egu.h>
 #ifdef __cplusplus
 extern "C" {
 #endif
 /**
 * @defgroup nrfx_egu EGU driver
 * @{
 * @ingroup  nrf_egu
 *
 * @brief    Event Generator Unit (EGU) peripheral driver.
 */
 /** @brief Structure for the EGU driver instance. */
 typedef struct
 {
    NRF_EGU_Type * p_reg;        ///< Pointer to a structure with EGU registers.
    uint8_t        drv_inst_idx; ///< Index of the driver instance. For internal use only.
 } nrfx_egu_t;
 #ifndef __NRFX_DOXYGEN__
 enum {
 #if NRFX_CHECK(NRFX_EGU0_ENABLED)
    NRFX_EGU0_INST_IDX,
 #endif
 #if NRFX_CHECK(NRFX_EGU1_ENABLED)
    NRFX_EGU1_INST_IDX,
 #endif
 #if NRFX_CHECK(NRFX_EGU2_ENABLED)
    NRFX_EGU2_INST_IDX,
 #endif
 #if NRFX_CHECK(NRFX_EGU3_ENABLED)
    NRFX_EGU3_INST_IDX,
 #endif
 #if NRFX_CHECK(NRFX_EGU4_ENABLED)
    NRFX_EGU4_INST_IDX,
 #endif
 #if NRFX_CHECK(NRFX_EGU5_ENABLED)
    NRFX_EGU5_INST_IDX,
 #endif
    NRFX_EGU_ENABLED_COUNT
 };
 #endif
 /** @brief Macro for creating an EGU driver instance. */
 #define NRFX_EGU_INSTANCE(id)                                 \
 {                                                             \
    .p_reg        = NRFX_CONCAT_2(NRF_EGU, id),               \
    .drv_inst_idx = NRFX_CONCAT_3(NRFX_EGU, id, _INST_IDX),   \
 }
 /**
 * @brief EGU driver event handler.
 *
 * @param[in] event_idx Index of the event that generated the interrupt.
 * @param[in] p_context Context passed to the event handler. Set on initialization.
 */
 typedef void (*nrfx_egu_event_handler_t)(uint8_t event_idx, void * p_context);
 /**
 * @brief Function for initializing the EGU driver instance.
 *
 * @param[in] p_instance         Pointer to the driver instance structure.
 * @param[in] interrupt_priority Interrupt priority.
 * @param[in] event_handler      Event handler provided by the user. In case of providing NULL,
 *                               event notifications are not done and EGU interrupts are disabled.
 * @param[in] p_context          Context passed to the event handler.
 *
 * @retval NRFX_SUCCESS             Initialization was successful.
 * @retval NRFX_ERROR_INVALID_STATE Driver is already initialized.
 */
 nrfx_err_t nrfx_egu_init(nrfx_egu_t const *       p_instance,
                         uint8_t                  interrupt_priority,
                         nrfx_egu_event_handler_t event_handler,
                         void *                   p_context);
 /**
 * @brief Function for enabling interrupts on specified events of a given EGU driver instance.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] mask       Mask of events with interrupts to be enabled.
 */
 void nrfx_egu_int_enable(nrfx_egu_t const * p_instance, uint32_t mask);
 /**
 * @brief Function for disabling interrupts on specified events of a given EGU driver instance.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] mask       Mask of events with interrupts to be disabled.
 */
 void nrfx_egu_int_disable(nrfx_egu_t const * p_instance, uint32_t mask);
 /**
 * @brief Function for triggering an event specified by @c event_idx of a given EGU driver instance.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] event_idx  Index of the event to be triggered.
 */
 void nrfx_egu_trigger(nrfx_egu_t const * p_instance, uint8_t event_idx);
 /**
 * @brief Function for uninitializing the EGU driver instance.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
 void nrfx_egu_uninit(nrfx_egu_t const * p_instance);
 /** @} */
 void nrfx_egu_0_irq_handler(void);
 void nrfx_egu_1_irq_handler(void);
 void nrfx_egu_2_irq_handler(void);
 void nrfx_egu_3_irq_handler(void);
 void nrfx_egu_4_irq_handler(void);
 void nrfx_egu_5_irq_handler(void);
 #ifdef __cplusplus
 }
 #endif
 #endif // NRFX_EGU_H__
--- a/drivers/include/nrfx_gpiote.h
+++ b/drivers/include/nrfx_gpiote.h
@ -205,10 +205,12 @@ typedef void (*nrfx_gpiote_evt_handler_t)(nrfx_gpiote_pin_t pin, nrf_gpiote_pola
 * @details Only static configuration is supported to prevent the shared
 * resource being customized by the initiator.
 *
 * @param[in] interrupt_priority Interrupt priority.
 *
 * @retval NRFX_SUCCESS             Initialization was successful.
 * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
 */
-nrfx_err_t nrfx_gpiote_init(void);
+nrfx_err_t nrfx_gpiote_init(uint8_t interrupt_priority);
 /**
 * @brief Function for checking if the GPIOTE module is initialized.
@ -235,7 +237,7 @@ void nrfx_gpiote_uninit(void);
 * @param[in] p_config Initial configuration.
 *
 * @retval NRFX_SUCCESS      Initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE The driver is not initialized or the pin is already used.
+ * @retval NRFX_ERROR_BUSY   The pin is already used.
 * @retval NRFX_ERROR_NO_MEM No GPIOTE channel is available.
 */
 nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t                pin,
@ -285,7 +287,19 @@ void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin);
 void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin);
 /**
- * @brief Function for getting the address of a configurable GPIOTE task.
+ * @brief Function for getting the OUT task for the specified output pin.
 *
 * @details The returned task identifier can be used within @ref nrf_gpiote_hal,
 *          for example, to configure a DPPI channel.
 *
 * @param[in] pin Pin.
 *
 * @return OUT task associated with the specified output pin.
 */
 nrf_gpiote_task_t nrfx_gpiote_out_task_get(nrfx_gpiote_pin_t pin);
 /**
 * @brief Function for getting the address of the OUT task for the specified output pin.
 *
 * @param[in] pin Pin.
 *
@ -295,7 +309,19 @@ uint32_t nrfx_gpiote_out_task_addr_get(nrfx_gpiote_pin_t pin);
 #if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
 /**
- * @brief Function for getting the address of a configurable GPIOTE task.
+ * @brief Function for getting the SET task for the specified output pin.
 *
 * @details The returned task identifier can be used within @ref nrf_gpiote_hal,
 *          for example, to configure a DPPI channel.
 *
 * @param[in] pin Pin.
 *
 * @return SET task associated with the specified output pin.
 */
 nrf_gpiote_task_t nrfx_gpiote_set_task_get(nrfx_gpiote_pin_t pin);
 /**
 * @brief Function for getting the address of the SET task for the specified output pin.
 *
 * @param[in] pin Pin.
 *
@ -306,7 +332,19 @@ uint32_t nrfx_gpiote_set_task_addr_get(nrfx_gpiote_pin_t pin);
 #if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
 /**
- * @brief Function for getting the address of a configurable GPIOTE task.
+ * @brief Function for getting the CLR task for the specified output pin.
 *
 * @details The returned task identifier can be used within @ref nrf_gpiote_hal,
 *          for example, to configure a DPPI channel.
 *
 * @param[in] pin Pin.
 *
 * @return CLR task associated with the specified output pin.
 */
 nrf_gpiote_task_t nrfx_gpiote_clr_task_get(nrfx_gpiote_pin_t pin);
 /**
 * @brief Function for getting the address of the SET task for the specified output pin.
 *
 * @param[in] pin Pin.
 *
@ -335,7 +373,7 @@ uint32_t nrfx_gpiote_clr_task_addr_get(nrfx_gpiote_pin_t pin);
 * @param[in] evt_handler User function to be called when the configured transition occurs.
 *
 * @retval NRFX_SUCCESS      Initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE The driver is not initialized or the pin is already used.
+ * @retval NRFX_ERROR_BUSY   The pin is already used.
 * @retval NRFX_ERROR_NO_MEM No GPIOTE channel is available.
 */
 nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t               pin,
@ -379,6 +417,20 @@ void nrfx_gpiote_in_event_disable(nrfx_gpiote_pin_t pin);
 */
 bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin);
 /**
 * @brief Function for getting the GPIOTE event for the specified input pin.
 *
 * @details The returned event identifier can be used within @ref nrf_gpiote_hal,
 *          for example, to configure a DPPI channel.
 *          If the pin is configured to use low-accuracy mode, the PORT event
 *          is returned.
 *
 * @param[in] pin Pin.
 *
 * @return Event associated with the specified input pin.
 */
 nrf_gpiote_event_t nrfx_gpiote_in_event_get(nrfx_gpiote_pin_t pin);
 /**
 * @brief Function for getting the address of a GPIOTE input pin event.
 * @details If the pin is configured to use low-accuracy mode, the address of the PORT event is returned.
--- a/drivers/include/nrfx_i2s.h
+++ b/drivers/include/nrfx_i2s.h
@ -46,7 +46,6 @@ extern "C" {
 * @brief   Inter-IC Sound (I2S) peripheral driver.
 */
 /**
 * @brief This value can be provided instead of a pin number for the signals
 *        SDOUT, SDIN, and MCK to specify that a given signal is not used
@ -86,25 +85,41 @@ typedef struct
    uint32_t const * p_tx_buffer; ///< Pointer to the buffer with data to be sent.
 } nrfx_i2s_buffers_t;
-/** @brief I2S driver default configuration. */
+/**
-#define NRFX_I2S_DEFAULT_CONFIG                                   \
+ * @brief I2S driver default configuration.
 *
 * This configuration sets up I2S with the following options:
 * - master mode
 * - i2s data format
 * - left alignment
 * - sample width 16 bit
 * - left channel enabled
 * - MCK frequency 4 MHz
 * - LRCK frequency 125 kHz
 *
 * @param[in] _pin_sck   SCK pin number.
 * @param[in] _pin_lrck  LRCK pin number.
 * @param[in] _pin_mck   MCK pin number.
 * @param[in] _pin_sdout SDOUT pin number.
 * @param[in] _pin_sdin  SDIN pin number.
 */
 #define NRFX_I2S_DEFAULT_CONFIG(_pin_sck, _pin_lrck, _pin_mck, _pin_sdout, _pin_sdin)   \
 {                                                                                       \
-    .sck_pin      = NRFX_I2S_CONFIG_SCK_PIN,                      \
+    .sck_pin      = _pin_sck,                                                           \
-    .lrck_pin     = NRFX_I2S_CONFIG_LRCK_PIN,                     \
+    .lrck_pin     = _pin_lrck,                                                          \
-    .mck_pin      = NRFX_I2S_CONFIG_MCK_PIN,                      \
+    .mck_pin      = _pin_mck,                                                           \
-    .sdout_pin    = NRFX_I2S_CONFIG_SDOUT_PIN,                    \
+    .sdout_pin    = _pin_sdout,                                                         \
-    .sdin_pin     = NRFX_I2S_CONFIG_SDIN_PIN,                     \
+    .sdin_pin     = _pin_sdin,                                                          \
-    .irq_priority = NRFX_I2S_CONFIG_IRQ_PRIORITY,                 \
+    .irq_priority = NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY,                               \
-    .mode         = (nrf_i2s_mode_t)NRFX_I2S_CONFIG_MASTER,       \
+    .mode         = NRF_I2S_MODE_MASTER,                                                \
-    .format       = (nrf_i2s_format_t)NRFX_I2S_CONFIG_FORMAT,     \
+    .format       = NRF_I2S_FORMAT_I2S,                                                 \
-    .alignment    = (nrf_i2s_align_t)NRFX_I2S_CONFIG_ALIGN,       \
+    .alignment    = NRF_I2S_ALIGN_LEFT,                                                 \
-    .sample_width = (nrf_i2s_swidth_t)NRFX_I2S_CONFIG_SWIDTH,     \
+    .sample_width = NRF_I2S_SWIDTH_16BIT,                                               \
-    .channels     = (nrf_i2s_channels_t)NRFX_I2S_CONFIG_CHANNELS, \
+    .channels     = NRF_I2S_CHANNELS_LEFT,                                              \
-    .mck_setup    = (nrf_i2s_mck_t)NRFX_I2S_CONFIG_MCK_SETUP,     \
+    .mck_setup    = NRF_I2S_MCK_32MDIV8,                                                \
-    .ratio        = (nrf_i2s_ratio_t)NRFX_I2S_CONFIG_RATIO,       \
+    .ratio        = NRF_I2S_RATIO_32X,                                                  \
 }
 #define NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED  (1UL << 0)
    /**< The application must provide buffers that are to be used in the next
     *   part of the transfer. A call to @ref nrfx_i2s_next_buffers_set must
@ -152,7 +167,6 @@ typedef struct
 typedef void (* nrfx_i2s_data_handler_t)(nrfx_i2s_buffers_t const * p_released,
                                         uint32_t                   status);
 /**
 * @brief Function for initializing the I2S driver.
 *
@ -219,11 +233,14 @@ nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers,
 * but it has to be done before the I2S peripheral finishes processing the
 * buffers supplied previously. Otherwise, data corruption will occur.
 *
- * @sa nrfx_i2s_data_handler_t
+ * @param[in] p_buffers Pointer to a structure specifying the buffers
 *                      to be used in the upcoming part of the transfer.
 *
 * @retval NRFX_SUCCESS             If the operation was successful.
 * @retval NRFX_ERROR_INVALID_STATE If the buffers were already supplied or
 *                                  the peripheral is currently being stopped.
 *
 * @sa nrfx_i2s_data_handler_t
 */
 nrfx_err_t nrfx_i2s_next_buffers_set(nrfx_i2s_buffers_t const * p_buffers);
--- a/drivers/include/nrfx_ipc.h
+++ b/drivers/include/nrfx_ipc.h
@ -0,0 +1,218 @@
 /*
 * Copyright (c) 2019, Nordic Semiconductor ASA
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 #ifndef NRFX_IPC_H__
 #define NRFX_IPC_H__
 #include <nrfx.h>
 #include <hal/nrf_ipc.h>
 #ifdef __cplusplus
 extern "C" {
 #endif
 /**
 * @defgroup nrfx_ipc IPC driver
 * @{
 * @ingroup nrf_ipc
 * @brief   Interprocessor Communication (IPC) peripheral driver.
 */
 /**
 * @brief IPC driver handler type.
 *
 * @param[in] event_mask Bitmask with events that triggered the interrupt.
 * @param[in] p_context  Context passed to the interrupt handler, set on initialization.
 */
 typedef void (*nrfx_ipc_handler_t)(uint32_t event_mask, void * p_context);
 /** @brief IPC configuration structure. */
 typedef struct
 {
    uint32_t send_task_config[IPC_CONF_NUM];     ///< Configuration of the connection between signals and IPC channels.
    uint32_t receive_event_config[IPC_CONF_NUM]; ///< Configuration of the connection between events and IPC channels.
    uint32_t receive_events_enabled;             ///< Bitmask with events to be enabled to generate interrupt.
 } nrfx_ipc_config_t;
 /**
 * @brief Function for initializing the IPC driver.
 *
 * @param irq_priority Interrupt priority.
 * @param handler      Event handler provided by the user. Cannot be NULL.
 * @param p_context    Context passed to event handler.
 *
 * @retval NRFX_SUCCESS             Initialization was successful.
 * @retval NRFX_ERROR_INVALID_STATE Driver is already initialized.
 */
 nrfx_err_t nrfx_ipc_init(uint8_t irq_priority, nrfx_ipc_handler_t handler, void * p_context);
 /**
 * @brief Function for loading configuration directly into IPC peripheral.
 *
 * @param p_config Pointer to the structure with the initial configuration.
 */
 void nrfx_ipc_config_load(nrfx_ipc_config_t const * p_config);
 /**
 * @brief Function for convey signal on configured channels.
 *
 * Events connected to the IPC channels configured within this signal will
 * be set and can generate interrupts when configured.
 *
 * @param send_index Index of the SEND task to trigger.
 */
 NRFX_STATIC_INLINE void nrfx_ipc_signal(uint8_t send_index);
 /**
 * @brief Function for storing data in GPMEM register in the IPC peripheral.
 *
 * @param mem_index Index of the memory cell.
 * @param data      Data to be saved.
 */
 NRFX_STATIC_INLINE void nrfx_ipc_gpmem_set(uint8_t mem_index, uint32_t data);
 /**
 * @brief Function for getting data from the GPMEM register in the IPC peripheral.
 *
 * @param mem_index Index of the memory cell.
 *
 * @return Saved data.
 */
 NRFX_STATIC_INLINE uint32_t nrfx_ipc_mem_get(uint8_t mem_index);
 /** @brief Function for uninitializing the IPC module. */
 void nrfx_ipc_uninit(void);
 /**
 * @brief Function for enabling events to generate interrupt.
 *
 * @param event_index Index of event to be enabled.
 */
 void nrfx_ipc_receive_event_enable(uint8_t event_index);
 /**
 * @brief Function for disabling events from generate interrupt.
 *
 * @param event_index Index of event to be disabled.
 */
 void nrfx_ipc_receive_event_disable(uint8_t event_index);
 /**
 * @brief Function for enabling set of events to generate interrupt.
 *
 * @param event_bitmask Bitmask with events to be enabled.
 */
 void nrfx_ipc_receive_event_group_enable(uint32_t event_bitmask);
 /**
 * @brief Function for disabling set of events from generate interrupt.
 *
 * @param event_bitmask Bitmask with events to be disabled.
 */
 void nrfx_ipc_receive_event_group_disable(uint32_t event_bitmask);
 /**
 * @brief Function for assigning event to the IPC channel.
 *
 * @param event_index   Index of the event to be configured.
 * @param channel_index Index of the channel to which event will be connected.
 */
 void nrfx_ipc_receive_event_channel_assign(uint8_t event_index, uint8_t channel_index);
 /**
 * @brief Function for assigning signal to the IPC channel.
 *
 * @param send_index    Index of the signal to be configured.
 * @param channel_index Index of the instance of channel.
 */
 void nrfx_ipc_send_task_channel_assign(uint8_t send_index, uint8_t channel_index);
 /**
 * @brief Function for assigning event to the IPC channels.
 *
 * @param event_index     Index of the event to be configured.
 * @param channel_bitmask Bitmask with channels to which event will be connected.
 */
 NRFX_STATIC_INLINE void nrfx_ipc_receive_config_set(uint8_t event_index, uint32_t channel_bitmask);
 /**
 * @brief Function for assigning signal to the IPC channels.
 *
 * @param send_index      Index of the signal to be configured.
 * @param channel_bitmask Bitmask with channels to which signal will be connected.
 */
 NRFX_STATIC_INLINE void nrfx_ipc_send_config_set(uint8_t send_index, uint32_t channel_bitmask);
 /** @} */
 #ifndef NRFX_DECLARE_ONLY
 NRFX_STATIC_INLINE void nrfx_ipc_gpmem_set(uint8_t mem_index, uint32_t data)
 {
    NRFX_ASSERT(mem_index < NRFX_ARRAY_SIZE(NRF_IPC->GPMEM));
    nrf_ipc_gpmem_set(NRF_IPC, mem_index, data);
 }
 NRFX_STATIC_INLINE uint32_t nrfx_ipc_mem_get(uint8_t mem_index)
 {
    NRFX_ASSERT(mem_index < NRFX_ARRAY_SIZE(NRF_IPC->GPMEM));
    return nrf_ipc_gpmem_get(NRF_IPC, mem_index);
 }
 NRFX_STATIC_INLINE void nrfx_ipc_signal(uint8_t send_index)
 {
    NRFX_ASSERT(send_index < IPC_CONF_NUM);
    nrf_ipc_task_trigger(NRF_IPC, nrf_ipc_send_task_get(send_index));
 }
 NRFX_STATIC_INLINE void nrfx_ipc_receive_config_set(uint8_t event_index, uint32_t channel_bitmask)
 {
    NRFX_ASSERT(event_index < IPC_CONF_NUM);
    nrf_ipc_receive_config_set(NRF_IPC, event_index, channel_bitmask);
 }
 NRFX_STATIC_INLINE void nrfx_ipc_send_config_set(uint8_t send_index, uint32_t channel_bitmask)
 {
    NRFX_ASSERT(send_index < IPC_CONF_NUM);
    nrf_ipc_send_config_set(NRF_IPC, send_index, channel_bitmask);
 }
 #endif // NRFX_DECLARE_ONLY
 void nrfx_ipc_irq_handler(void);
 #ifdef __cplusplus
 }
 #endif
 #endif // NRFX_IPC_H__
--- a/drivers/include/nrfx_lpcomp.h
+++ b/drivers/include/nrfx_lpcomp.h
@ -60,23 +60,32 @@ typedef struct
    uint8_t             interrupt_priority; /**< LPCOMP interrupt priority. */
 } nrfx_lpcomp_config_t;
-/** @brief LPCOMP driver default configuration, including the LPCOMP HAL configuration. */
+/**
 * @brief LPCOMP driver default configuration.
 *
 * This configuration sets up LPCOMP with the following options:
 * - reference voltage: 4/8 of supply voltage
 * - detection of both up and down crossings
 * - hysteresis disabled
 *
 * @param[in] _input Comparator input pin.
 */
 #ifdef NRF52_SERIES
-#define NRFX_LPCOMP_DEFAULT_CONFIG                                  \
+#define NRFX_LPCOMP_DEFAULT_CONFIG(_input)                         \
 {                                                                  \
-    .hal    = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE ,    \
+    .hal    = {  NRF_LPCOMP_REF_SUPPLY_4_8,                        \
-                (nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION,  \
+                 NRF_LPCOMP_DETECT_CROSS,                          \
-                (nrf_lpcomp_hysteresis_t)NRFX_LPCOMP_CONFIG_HYST }, \
+                 NRF_LPCOMP_HYST_NOHYST },                         \
-    .input  = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT,         \
+    .input  = _input,                                              \
-    .interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY           \
+    .interrupt_priority = NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }
 #else
-#define NRFX_LPCOMP_DEFAULT_CONFIG                                   \
+#define NRFX_LPCOMP_DEFAULT_CONFIG(_input)                         \
 {                                                                  \
-    .hal    = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE ,     \
+    .hal    = {  NRF_LPCOMP_REF_SUPPLY_4_8,                        \
-                (nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION }, \
+                 NRF_LPCOMP_DETECT_CROSS },                        \
-    .input  = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT,          \
+    .input  = _input,                                              \
-    .interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY            \
+    .interrupt_priority = NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }
 #endif
--- a/drivers/include/nrfx_nfct.h
+++ b/drivers/include/nrfx_nfct.h
@ -116,9 +116,9 @@ typedef struct
    nrfx_nfct_param_id_t   id;               ///< Type of parameter.
    union
    {
-        uint32_t           fdt;              ///< NFC-A Frame Delay Time. Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_FDT.
+        uint32_t           fdt;              ///< NFC-A Frame Delay Time. Filled when nrfx_nfct_param_t.id is @ref NRFX_NFCT_PARAM_ID_FDT.
-        uint8_t            sel_res_protocol; ///< NFC-A value of the 'Protocol' field in the SEL_RES frame. Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_SEL_RES.
+        uint8_t            sel_res_protocol; ///< NFC-A value of the 'Protocol' field in the SEL_RES frame. Filled when nrfx_nfct_param_t.id is @ref NRFX_NFCT_PARAM_ID_SEL_RES.
-        nrfx_nfct_nfcid1_t nfcid1;           ///< NFC-A NFCID1 value (tag identifier). Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_NFCID1.
+        nrfx_nfct_nfcid1_t nfcid1;           ///< NFC-A NFCID1 value (tag identifier). Filled when nrfx_nfct_param_t.id is @ref NRFX_NFCT_PARAM_ID_NFCID1.
    } data;                                  ///< Union to store parameter data.
 } nrfx_nfct_param_t;
@ -154,9 +154,9 @@ typedef struct
    nrfx_nfct_evt_id_t evt_id;                       ///< Type of event.
    union
    {
-        nrfx_nfct_evt_rx_frameend_t   rx_frameend;   ///< End of the RX frame data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_RX_FRAMEEND.
+        nrfx_nfct_evt_rx_frameend_t   rx_frameend;   ///< End of the RX frame data. Filled when nrfx_nfct_evt_t.evt_id is @ref NRFX_NFCT_EVT_RX_FRAMEEND.
-        nrfx_nfct_evt_tx_framestart_t tx_framestart; ///< Start of the TX frame data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_TX_FRAMESTART.
+        nrfx_nfct_evt_tx_framestart_t tx_framestart; ///< Start of the TX frame data. Filled when nrfx_nfct_evt_t.evt_id is @ref NRFX_NFCT_EVT_TX_FRAMESTART.
-        nrfx_nfct_evt_error_t         error;         ///< Error data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_ERROR.
+        nrfx_nfct_evt_error_t         error;         ///< Error data. Filled when nrfx_nfct_evt_t.evt_id is @ref NRFX_NFCT_EVT_ERROR.
    } params;                                        ///< Union to store event data.
 } nrfx_nfct_evt_t;
@ -320,22 +320,13 @@ void nrfx_nfct_irq_handler(void);
 * To implement the second workaround, power reset is used to release the clock acquired by NFCT
 * after the field is turned off. Note that the NFCT register configuration is restored to defaults.
 *
- * If you are using the nRF52840 chip, rev. Engineering A, the workarounds for the following anomalies
+ * If you are using the nRF52833, nRF52840 or nRF5340 chips, the workarounds for the following
 * are applied:
 * - 98. NFCT: The NFCT is not able to communicate with the peer.
 * - 116. NFCT does not release HFCLK when switching from ACTIVATED to SENSE mode.
 * - 144. NFCT: Not optimal NFC performance
 *
 * If you are using the nRF52840 chip, rev. 1, or rev. Engineering B or C, the workarounds for the following
 * anomalies are applied:
 * - 190. NFCT: Event FIELDDETECTED can be generated too early.
 * To implement this workaround, an instance of NRF_TIMER is used. After the NFC field is detected,
 * the timing module measures the necessary waiting period after which NFCT can be activated.
 * This debouncing technique is used to filter possible field instabilities.
 *
 * The application of the implemented workarounds for the nRF52840 chip is determined at runtime and depends
 * on the chip variant.
 *
 * The current code contains a patch for the anomaly 25 (NFCT: Reset value of
 * SENSRES register is incorrect), so that the module now works on Windows Phone.
 * @}
--- a/drivers/include/nrfx_nvmc.h
+++ b/drivers/include/nrfx_nvmc.h
@ -102,9 +102,14 @@ nrfx_err_t nrfx_nvmc_page_partial_erase_init(uint32_t address, uint32_t duration
 /**
 * @brief Function for performing a part of the complete page erase (also known as partial erase).
 *
 * Each part takes the amount of time specified during the initialization.
 * This function must be called several times to erase the whole page, once for each erase part.
 *
 * @note The actual time needed to perform each part of the page erase is longer than the partial
 *       erase duration specified in the call to @ref nrfx_nvmc_page_partial_erase_init,
 *       since the NVMC peripheral needs certain additional amount of time to handle the process.
 *       For details regarding this additional time, see the "Electrical specification" section
 *       for the NVMC peripheral in the Product Specification.
 *
 * @note Using a page that was not completely erased leads to undefined behavior.
 *       Depending on the source of the code being executed,
 *       the CPU may be halted during the operation.
@ -237,40 +242,40 @@ uint32_t nrfx_nvmc_flash_page_count_get(void);
 * @retval true  Last write completed successfully.
 * @retval false Last write is still in progress.
 */
-__STATIC_INLINE bool nrfx_nvmc_write_done_check(void);
+NRFX_STATIC_INLINE bool nrfx_nvmc_write_done_check(void);
-#if defined(NRF_NVMC_ICACHE_PRESENT)
+#if defined(NVMC_FEATURE_CACHE_PRESENT)
 /**
 * @brief Function for enabling the Instruction Cache (ICache).
 *
 * Enabling ICache reduces the amount of accesses to flash memory,
 * which can boost performance and lower power consumption.
 */
-__STATIC_INLINE void nrfx_nvmc_icache_enable(void);
+NRFX_STATIC_INLINE void nrfx_nvmc_icache_enable(void);
 /** @brief Function for disabling ICache. */
-__STATIC_INLINE void nrfx_nvmc_icache_disable(void);
+NRFX_STATIC_INLINE void nrfx_nvmc_icache_disable(void);
-#endif // defined(NRF_NVMC_ICACHE_PRESENT)
+#endif // defined(NVMC_FEATURE_CACHE_PRESENT)
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-__STATIC_INLINE bool nrfx_nvmc_write_done_check(void)
+NRFX_STATIC_INLINE bool nrfx_nvmc_write_done_check(void)
 {
    return nrf_nvmc_ready_check(NRF_NVMC);
 }
-#if defined(NRF_NVMC_ICACHE_PRESENT)
+#if defined(NVMC_FEATURE_CACHE_PRESENT)
-__STATIC_INLINE void nrfx_nvmc_icache_enable(void)
+NRFX_STATIC_INLINE void nrfx_nvmc_icache_enable(void)
 {
    nrf_nvmc_icache_config_set(NRF_NVMC, NRF_NVMC_ICACHE_ENABLE_WITH_PROFILING);
 }
-__STATIC_INLINE void nrfx_nvmc_icache_disable(void)
+NRFX_STATIC_INLINE void nrfx_nvmc_icache_disable(void)
 {
    nrf_nvmc_icache_config_set(NRF_NVMC, NRF_NVMC_ICACHE_DISABLE);
 }
-#endif // defined(NRF_NVMC_ICACHE_PRESENT)
+#endif // defined(NVMC_FEATURE_CACHE_PRESENT)
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
+#endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_pdm.h
+++ b/drivers/include/nrfx_pdm.h
@ -78,22 +78,27 @@ typedef struct
 } nrfx_pdm_config_t;
 /**
- * @brief Macro for setting @ref nrfx_pdm_config_t to default settings
+ * @brief PDM driver default configuration.
 *        in the single-ended mode.
 *
- * @param _pin_clk  CLK output pin.
+ * This configuration sets up PDM with the following options:
- * @param _pin_din  DIN input pin.
+ * - mono mode
 * - data sampled on the clock falling edge
 * - frequency: 1.032 MHz
 * - standard gain
 *
 * @param[in] _pin_clk CLK output pin.
 * @param[in] _pin_din DIN input pin.
 */
 #define NRFX_PDM_DEFAULT_CONFIG(_pin_clk, _pin_din)             \
 {                                                               \
-    .mode               = (nrf_pdm_mode_t)NRFX_PDM_CONFIG_MODE,       \
+    .mode               = NRF_PDM_MODE_MONO,                    \
-    .edge               = (nrf_pdm_edge_t)NRFX_PDM_CONFIG_EDGE,       \
+    .edge               = NRF_PDM_EDGE_LEFTFALLING,             \
    .pin_clk            = _pin_clk,                             \
    .pin_din            = _pin_din,                             \
-    .clock_freq         = (nrf_pdm_freq_t)NRFX_PDM_CONFIG_CLOCK_FREQ, \
+    .clock_freq         = NRF_PDM_FREQ_1032K,                   \
    .gain_l             = NRF_PDM_GAIN_DEFAULT,                 \
    .gain_r             = NRF_PDM_GAIN_DEFAULT,                 \
-    .interrupt_priority = NRFX_PDM_CONFIG_IRQ_PRIORITY                \
+    .interrupt_priority = NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }
 /**
@ -104,7 +109,7 @@ typedef struct
 *
 * @param[in] p_evt Pointer to the PDM event structure.
 */
-typedef void (*nrfx_pdm_event_handler_t)(nrfx_pdm_evt_t const * const p_evt);
+typedef void (*nrfx_pdm_event_handler_t)(nrfx_pdm_evt_t const * p_evt);
 /**
@ -134,10 +139,7 @@ void nrfx_pdm_uninit(void);
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_pdm_task_address_get(nrf_pdm_task_t task)
+NRFX_STATIC_INLINE uint32_t nrfx_pdm_task_address_get(nrf_pdm_task_t task);
 {
    return nrf_pdm_task_address_get(task);
 }
 /**
 * @brief Function for getting the state of the PDM interface.
@ -145,10 +147,7 @@ __STATIC_INLINE uint32_t nrfx_pdm_task_address_get(nrf_pdm_task_t task)
 * @retval true  The PDM interface is enabled.
 * @retval false The PDM interface is disabled.
 */
-__STATIC_INLINE bool nrfx_pdm_enable_check(void)
+NRFX_STATIC_INLINE bool nrfx_pdm_enable_check(void);
 {
    return nrf_pdm_enable_check();
 }
 /**
 * @brief Function for starting the PDM sampling.
@ -185,6 +184,18 @@ nrfx_err_t nrfx_pdm_stop(void);
 */
 nrfx_err_t nrfx_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length);
 #ifndef NRFX_DECLARE_ONLY
 NRFX_STATIC_INLINE uint32_t nrfx_pdm_task_address_get(nrf_pdm_task_t task)
 {
    return nrf_pdm_task_address_get(NRF_PDM, task);
 }
 NRFX_STATIC_INLINE bool nrfx_pdm_enable_check(void)
 {
    return nrf_pdm_enable_check(NRF_PDM);
 }
 #endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_power.h
+++ b/drivers/include/nrfx_power.h
@ -334,16 +334,15 @@ void nrfx_power_usbevt_uninit(void);
 *
 * @return Current USB power status.
 */
-__STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void);
+NRFX_STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void);
 #endif /* NRF_POWER_HAS_USBREG */
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
 #if NRF_POWER_HAS_USBREG
-__STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void)
+NRFX_STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void)
 {
-    uint32_t status = nrf_power_usbregstatus_get();
+    uint32_t status = nrf_power_usbregstatus_get(NRF_POWER);
    if(0 == (status & NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK))
    {
        return NRFX_POWER_USB_STATE_DISCONNECTED;
@ -355,8 +354,7 @@ __STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void)
    return NRFX_POWER_USB_STATE_READY;
 }
 #endif /* NRF_POWER_HAS_USBREG */
-
+#endif /* NRFX_DECLARE_ONLY */
 #endif /* SUPPRESS_INLINE_IMPLEMENTATION */
 /** @} */
--- a/drivers/include/nrfx_power_clock.h
+++ b/drivers/include/nrfx_power_clock.h
@ -39,21 +39,18 @@ extern "C" {
 #endif
 __STATIC_INLINE void nrfx_power_clock_irq_init(void);
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 __STATIC_INLINE void nrfx_power_clock_irq_init(void)
 {
    uint8_t priority;
 #if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED)
-    #if NRFX_POWER_CONFIG_IRQ_PRIORITY != NRFX_CLOCK_CONFIG_IRQ_PRIORITY
+    #if NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY != NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
    #error "IRQ priorities for POWER and CLOCK must be the same. Check <nrfx_config.h>."
    #endif
-    priority = NRFX_POWER_CONFIG_IRQ_PRIORITY;
+    priority = NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY;
 #elif NRFX_CHECK(NRFX_POWER_ENABLED)
-    priority = NRFX_POWER_CONFIG_IRQ_PRIORITY;
+    priority = NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY;
 #elif NRFX_CHECK(NRFX_CLOCK_ENABLED)
-    priority = NRFX_CLOCK_CONFIG_IRQ_PRIORITY;
+    priority = NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY;
 #else
    #error "This code is not supposed to be compiled when neither POWER nor CLOCK is enabled."
 #endif
@ -64,8 +61,6 @@ __STATIC_INLINE void nrfx_power_clock_irq_init(void)
        NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_CLOCK));
    }
 }
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 #if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED)
 void nrfx_power_clock_irq_handler(void);
--- a/drivers/include/nrfx_ppi.h
+++ b/drivers/include/nrfx_ppi.h
@ -174,10 +174,7 @@ nrfx_err_t nrfx_ppi_group_free(nrf_ppi_channel_group_t group);
 *
 * @return Channel mask.
 */
-__STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel)
+NRFX_STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel);
 {
    return (1uL << (uint32_t) channel);
 }
 /**
 * @brief Function for including multiple PPI channels in a channel group.
@ -204,11 +201,8 @@ nrfx_err_t nrfx_ppi_channels_include_in_group(uint32_t                channel_ma
 *                                  application channel.
 * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
 */
-__STATIC_INLINE nrfx_err_t nrfx_ppi_channel_include_in_group(nrf_ppi_channel_t       channel,
+NRFX_STATIC_INLINE nrfx_err_t nrfx_ppi_channel_include_in_group(nrf_ppi_channel_t       channel,
-                                                             nrf_ppi_channel_group_t group)
+                                                                nrf_ppi_channel_group_t group);
 {
    return nrfx_ppi_channels_include_in_group(nrfx_ppi_channel_to_mask(channel), group);
 }
 /**
 * @brief Function for removing multiple PPI channels from a channel group.
@ -235,11 +229,8 @@ nrfx_err_t nrfx_ppi_channels_remove_from_group(uint32_t                channel_m
 *                                  application channel.
 * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
 */
-__STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t       channel,
+NRFX_STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t       channel,
-                                                              nrf_ppi_channel_group_t group)
+                                                                 nrf_ppi_channel_group_t group);
 {
    return nrfx_ppi_channels_remove_from_group(nrfx_ppi_channel_to_mask(channel), group);
 }
 /**
 * @brief Function for clearing a PPI channel group.
@ -250,10 +241,7 @@ __STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t
 * @retval NRFX_ERROR_INVALID_PARAM Group is not an application group.
 * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
 */
-__STATIC_INLINE nrfx_err_t nrfx_ppi_group_clear(nrf_ppi_channel_group_t group)
+NRFX_STATIC_INLINE nrfx_err_t nrfx_ppi_group_clear(nrf_ppi_channel_group_t group);
 {
    return nrfx_ppi_channels_remove_from_group(NRFX_PPI_ALL_APP_CHANNELS_MASK, group);
 }
 /**
 * @brief Function for enabling a PPI channel group.
@ -284,10 +272,7 @@ nrfx_err_t nrfx_ppi_group_disable(nrf_ppi_channel_group_t group);
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_ppi_task_addr_get(nrf_ppi_task_t task)
+NRFX_STATIC_INLINE uint32_t nrfx_ppi_task_addr_get(nrf_ppi_task_t task);
 {
    return (uint32_t) nrf_ppi_task_address_get(task);
 }
 /**
 * @brief Function for getting the address of the enable task of a PPI group.
@ -296,10 +281,7 @@ __STATIC_INLINE uint32_t nrfx_ppi_task_addr_get(nrf_ppi_task_t task)
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_enable_get(nrf_ppi_channel_group_t group)
+NRFX_STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_enable_get(nrf_ppi_channel_group_t group);
 {
    return (uint32_t) nrf_ppi_task_group_enable_address_get(group);
 }
 /**
 * @brief Function for getting the address of the enable task of a PPI group.
@ -308,11 +290,47 @@ __STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_enable_get(nrf_ppi_channel_gro
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_disable_get(nrf_ppi_channel_group_t group)
+NRFX_STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_disable_get(nrf_ppi_channel_group_t group);
 #ifndef NRFX_DECLARE_ONLY
 NRFX_STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel)
 {
-    return (uint32_t) nrf_ppi_task_group_disable_address_get(group);
+    return (1uL << (uint32_t) channel);
 }
 NRFX_STATIC_INLINE nrfx_err_t nrfx_ppi_channel_include_in_group(nrf_ppi_channel_t       channel,
                                                                nrf_ppi_channel_group_t group)
 {
    return nrfx_ppi_channels_include_in_group(nrfx_ppi_channel_to_mask(channel), group);
 }
 NRFX_STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t       channel,
                                                                 nrf_ppi_channel_group_t group)
 {
    return nrfx_ppi_channels_remove_from_group(nrfx_ppi_channel_to_mask(channel), group);
 }
 NRFX_STATIC_INLINE nrfx_err_t nrfx_ppi_group_clear(nrf_ppi_channel_group_t group)
 {
    return nrfx_ppi_channels_remove_from_group(NRFX_PPI_ALL_APP_CHANNELS_MASK, group);
 }
 NRFX_STATIC_INLINE uint32_t nrfx_ppi_task_addr_get(nrf_ppi_task_t task)
 {
    return nrf_ppi_task_address_get(NRF_PPI, task);
 }
 NRFX_STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_enable_get(nrf_ppi_channel_group_t group)
 {
    return nrf_ppi_task_group_enable_address_get(NRF_PPI, group);
 }
 NRFX_STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_disable_get(nrf_ppi_channel_group_t group)
 {
    return nrf_ppi_task_group_disable_address_get(NRF_PPI, group);
 }
 #endif // NRFX_DECLARE_ONLY
 /** @} */
 #ifdef __cplusplus
--- a/drivers/include/nrfx_pwm.h
+++ b/drivers/include/nrfx_pwm.h
@ -102,22 +102,37 @@ typedef struct
    nrf_pwm_dec_step_t step_mode;    ///< Mode of advancing the active sequence.
 } nrfx_pwm_config_t;
-/** @brief PWM driver default configuration. */
+/**
-#define NRFX_PWM_DEFAULT_CONFIG                                            \
+ * @brief PWM driver default configuration.
 *
 * This configuration sets up PWM with the following options:
 * - clock frequency: 1 MHz
 * - count up
 * - top value: 1000 clock ticks
 * - load mode: common
 * - step mode: auto
 *
 * @param[in] _out_0 PWM output 0 pin.
 * @param[in] _out_1 PWM output 1 pin.
 * @param[in] _out_2 PWM output 2 pin.
 * @param[in] _out_3 PWM output 3 pin.
 */
 #define NRFX_PWM_DEFAULT_CONFIG(_out_0, _out_1, _out_2, _out_3)  \
 {                                                                \
-    .output_pins  = { NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN,                    \
+    .output_pins  = { _out_0,                                    \
-                      NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN,                    \
+                      _out_1,                                    \
-                      NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN,                    \
+                      _out_2,                                    \
-                      NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN },                  \
+                      _out_3                                     \
                    },                                           \
    .irq_priority = NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY,        \
-    .base_clock   = (nrf_pwm_clk_t)NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK,     \
+    .base_clock   = NRF_PWM_CLK_1MHz,                            \
-    .count_mode   = (nrf_pwm_mode_t)NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE,    \
+    .count_mode   = NRF_PWM_MODE_UP,                             \
-    .top_value    = NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE,                     \
+    .top_value    = 1000,                                        \
-    .load_mode    = (nrf_pwm_dec_load_t)NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE, \
+    .load_mode    = NRF_PWM_LOAD_COMMON,                         \
-    .step_mode    = (nrf_pwm_dec_step_t)NRFX_PWM_DEFAULT_CONFIG_STEP_MODE, \
+    .step_mode    = NRF_PWM_STEP_AUTO,                           \
 }
-/** @brief PWM flags that provide additional playback options. */
+/** @brief PWM flags providing additional playback options. */
 typedef enum
 {
    NRFX_PWM_FLAG_STOP = 0x01, /**< When the requested playback is finished,
@ -175,7 +190,7 @@ typedef enum
 } nrfx_pwm_evt_type_t;
 /** @brief PWM driver event handler type. */
-typedef void (* nrfx_pwm_handler_t)(nrfx_pwm_evt_type_t event_type);
+typedef void (* nrfx_pwm_handler_t)(nrfx_pwm_evt_type_t event_type, void * p_context);
 /**
 * @brief Function for initializing the PWM driver.
@ -185,13 +200,15 @@ typedef void (* nrfx_pwm_handler_t)(nrfx_pwm_evt_type_t event_type);
 * @param[in] handler    Event handler provided by the user. If NULL is passed
 *                       instead, event notifications are not done and PWM
 *                       interrupts are disabled.
 * @param[in] p_context  Context passed to the event handler.
 *
 * @retval NRFX_SUCCESS             Initialization was successful.
 * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
 */
-nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const  p_instance,
+nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const *        p_instance,
                         nrfx_pwm_config_t const * p_config,
-                         nrfx_pwm_handler_t        handler);
+                         nrfx_pwm_handler_t        handler,
                         void *                    p_context);
 /**
 * @brief Function for uninitializing the PWM driver.
@ -200,7 +217,7 @@ nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const  p_instance,
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_pwm_uninit(nrfx_pwm_t const * const p_instance);
+void nrfx_pwm_uninit(nrfx_pwm_t const * p_instance);
 /**
 * @brief Function for starting a single sequence playback.
@ -234,7 +251,7 @@ void nrfx_pwm_uninit(nrfx_pwm_t const * const p_instance);
 * @return Address of the task to be triggered to start the playback if the @ref
 *         NRFX_PWM_FLAG_START_VIA_TASK flag was used, 0 otherwise.
 */
-uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * const   p_instance,
+uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const *         p_instance,
                                  nrf_pwm_sequence_t const * p_sequence,
                                  uint16_t                   playback_count,
                                  uint32_t                   flags);
@ -262,7 +279,7 @@ uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * const   p_instance,
 * @return Address of the task to be triggered to start the playback if the @ref
 *         NRFX_PWM_FLAG_START_VIA_TASK flag was used, 0 otherwise.
 */
-uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * const   p_instance,
+uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const *         p_instance,
                                   nrf_pwm_sequence_t const * p_sequence_0,
                                   nrf_pwm_sequence_t const * p_sequence_1,
                                   uint16_t                   playback_count,
@ -275,7 +292,7 @@ uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * const   p_instance,
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-__STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance);
+NRFX_STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * p_instance);
 /**
 * @brief Function for stopping the sequence playback.
@ -300,7 +317,7 @@ __STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance);
 * @retval true  The PWM peripheral is stopped.
 * @retval false The PWM peripheral is not stopped.
 */
-bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance, bool wait_until_stopped);
+bool nrfx_pwm_stop(nrfx_pwm_t const * p_instance, bool wait_until_stopped);
 /**
 * @brief Function for checking the status of the PWM peripheral.
@ -310,7 +327,7 @@ bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance, bool wait_until_stopped)
 * @retval true  The PWM peripheral is stopped.
 * @retval false The PWM peripheral is not stopped.
 */
-bool nrfx_pwm_is_stopped(nrfx_pwm_t const * const p_instance);
+bool nrfx_pwm_is_stopped(nrfx_pwm_t const * p_instance);
 /**
 * @brief Function for updating the sequence data during playback.
@ -319,7 +336,7 @@ bool nrfx_pwm_is_stopped(nrfx_pwm_t const * const p_instance);
 * @param[in] seq_id     Identifier of the sequence (0 or 1).
 * @param[in] p_sequence Pointer to the new sequence definition.
 */
-__STATIC_INLINE void nrfx_pwm_sequence_update(nrfx_pwm_t const * const   p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_update(nrfx_pwm_t const *         p_instance,
                                                 uint8_t                    seq_id,
                                                 nrf_pwm_sequence_t const * p_sequence);
@ -331,7 +348,7 @@ __STATIC_INLINE void nrfx_pwm_sequence_update(nrfx_pwm_t const * const   p_insta
 * @param[in] seq_id     Identifier of the sequence (0 or 1).
 * @param[in] values     New pointer to the duty cycle values.
 */
-__STATIC_INLINE void nrfx_pwm_sequence_values_update(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_values_update(nrfx_pwm_t const * p_instance,
                                                        uint8_t            seq_id,
                                                        nrf_pwm_values_t   values);
@ -343,7 +360,7 @@ __STATIC_INLINE void nrfx_pwm_sequence_values_update(nrfx_pwm_t const * const p_
 * @param[in] seq_id     Identifier of the sequence (0 or 1).
 * @param[in] length     New number of the duty cycle values.
 */
-__STATIC_INLINE void nrfx_pwm_sequence_length_update(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_length_update(nrfx_pwm_t const * p_instance,
                                                        uint8_t            seq_id,
                                                        uint16_t           length);
@ -355,7 +372,7 @@ __STATIC_INLINE void nrfx_pwm_sequence_length_update(nrfx_pwm_t const * const p_
 * @param[in] seq_id     Identifier of the sequence (0 or 1).
 * @param[in] repeats    New number of repeats.
 */
-__STATIC_INLINE void nrfx_pwm_sequence_repeats_update(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_repeats_update(nrfx_pwm_t const * p_instance,
                                                         uint8_t            seq_id,
                                                         uint32_t           repeats);
@ -367,7 +384,7 @@ __STATIC_INLINE void nrfx_pwm_sequence_repeats_update(nrfx_pwm_t const * const p
 * @param[in] seq_id     Identifier of the sequence (0 or 1).
 * @param[in] end_delay  New end delay value (in PWM periods).
 */
-__STATIC_INLINE void nrfx_pwm_sequence_end_delay_update(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_end_delay_update(nrfx_pwm_t const * p_instance,
                                                           uint8_t            seq_id,
                                                           uint32_t           end_delay);
@ -380,7 +397,7 @@ __STATIC_INLINE void nrfx_pwm_sequence_end_delay_update(nrfx_pwm_t const * const
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * p_instance,
                                                      nrf_pwm_task_t     task);
 /**
@ -392,64 +409,62 @@ __STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * const p_in
 *
 * @return Event address.
 */
-__STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * p_instance,
                                                       nrf_pwm_event_t    event);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-
+NRFX_STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * p_instance)
 __STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance)
 {
    nrf_pwm_task_trigger(p_instance->p_registers, NRF_PWM_TASK_NEXTSTEP);
 }
-__STATIC_INLINE void nrfx_pwm_sequence_update(nrfx_pwm_t const * const   p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_update(nrfx_pwm_t const *         p_instance,
                                                 uint8_t                    seq_id,
                                                 nrf_pwm_sequence_t const * p_sequence)
 {
    nrf_pwm_sequence_set(p_instance->p_registers, seq_id, p_sequence);
 }
-__STATIC_INLINE void nrfx_pwm_sequence_values_update(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_values_update(nrfx_pwm_t const * p_instance,
                                                        uint8_t            seq_id,
                                                        nrf_pwm_values_t   values)
 {
    nrf_pwm_seq_ptr_set(p_instance->p_registers, seq_id, values.p_raw);
 }
-__STATIC_INLINE void nrfx_pwm_sequence_length_update(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_length_update(nrfx_pwm_t const * p_instance,
                                                        uint8_t            seq_id,
                                                        uint16_t           length)
 {
    nrf_pwm_seq_cnt_set(p_instance->p_registers, seq_id, length);
 }
-__STATIC_INLINE void nrfx_pwm_sequence_repeats_update(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_repeats_update(nrfx_pwm_t const * p_instance,
                                                         uint8_t            seq_id,
                                                         uint32_t           repeats)
 {
    nrf_pwm_seq_refresh_set(p_instance->p_registers, seq_id, repeats);
 }
-__STATIC_INLINE void nrfx_pwm_sequence_end_delay_update(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_pwm_sequence_end_delay_update(nrfx_pwm_t const * p_instance,
                                                           uint8_t            seq_id,
                                                           uint32_t           end_delay)
 {
    nrf_pwm_seq_end_delay_set(p_instance->p_registers, seq_id, end_delay);
 }
-__STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * p_instance,
                                                      nrf_pwm_task_t     task)
 {
    return nrf_pwm_task_address_get(p_instance->p_registers, task);
 }
-__STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * p_instance,
                                                       nrf_pwm_event_t    event)
 {
    return nrf_pwm_event_address_get(p_instance->p_registers, event);
 }
-
+#endif // NRFX_DECLARE_ONLY
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 /** @} */
--- a/drivers/include/nrfx_qdec.h
+++ b/drivers/include/nrfx_qdec.h
@ -61,19 +61,33 @@ typedef struct
    uint8_t              interrupt_priority; /**< QDEC interrupt priority. */
 } nrfx_qdec_config_t;
-/**@brief QDEC default configuration. */
+/**
-#define NRFX_QDEC_DEFAULT_CONFIG                                            \
+ * @brief QDEC driver default configuration.
 *
 * This configuration sets up QDEC with the following options:
 * - report period: 10 samples
 * - sampling period: 16384 us
 * - LED enabled for 500 us before sampling
 * - LED polarity: active high
 * - debouncing filter disabled
 * - sample ready interrupt disabled
 *
 * @param[in] _pin_a   Pin for A encoder channel input.
 * @param[in] _pin_b   Pin for B encoder channel input.
 * @param[in] _pin_led Pin for LED output.
 */
 #define NRFX_QDEC_DEFAULT_CONFIG(_pin_a, _pin_b, _pin_led)           \
    {                                                                \
-    .reportper          = (nrf_qdec_reportper_t)NRFX_QDEC_CONFIG_REPORTPER, \
+        .reportper          = NRF_QDEC_REPORTPER_10,                 \
-    .sampleper          = (nrf_qdec_sampleper_t)NRFX_QDEC_CONFIG_SAMPLEPER, \
+        .sampleper          = NRF_QDEC_SAMPLEPER_16384us,            \
-    .psela              = NRFX_QDEC_CONFIG_PIO_A,                           \
+        .psela              = _pin_a,                                \
-    .pselb              = NRFX_QDEC_CONFIG_PIO_B,                           \
+        .pselb              = _pin_b,                                \
-    .pselled            = NRFX_QDEC_CONFIG_PIO_LED,                         \
+        .pselled            = _pin_led,                              \
-    .ledpre             = NRFX_QDEC_CONFIG_LEDPRE,                          \
+        .ledpre             = 500,                                   \
-    .ledpol             = (nrf_qdec_ledpol_t)NRFX_QDEC_CONFIG_LEDPOL,       \
+        .ledpol             = NRF_QDEC_LEPOL_ACTIVE_HIGH,            \
-    .dbfen              = NRFX_QDEC_CONFIG_DBFEN,                           \
+        .dbfen              = NRF_QDEC_DBFEN_DISABLE,                \
-    .sample_inten       = NRFX_QDEC_CONFIG_SAMPLE_INTEN,                    \
+        .sample_inten       = false,                                 \
-    .interrupt_priority = NRFX_QDEC_CONFIG_IRQ_PRIORITY,                    \
+        .interrupt_priority = NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY  \
    }
 /** @brief QDEC sample event data. */
@ -159,10 +173,7 @@ void nrfx_qdec_accumulators_read(int16_t * p_acc, int16_t * p_accdbl);
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_qdec_task_address_get(nrf_qdec_task_t task)
+NRFX_STATIC_INLINE uint32_t nrfx_qdec_task_address_get(nrf_qdec_task_t task);
 {
    return (uint32_t)nrf_qdec_task_address_get(task);
 }
 /**
 * @brief Function for returning the address of the specified QDEC event.
@ -171,11 +182,20 @@ __STATIC_INLINE uint32_t nrfx_qdec_task_address_get(nrf_qdec_task_t task)
 *
 * @return Event address.
 */
-__STATIC_INLINE uint32_t nrfx_qdec_event_address_get(nrf_qdec_event_t event)
+NRFX_STATIC_INLINE uint32_t nrfx_qdec_event_address_get(nrf_qdec_event_t event);
 #ifndef NRFX_DECLARE_ONLY
 NRFX_STATIC_INLINE uint32_t nrfx_qdec_task_address_get(nrf_qdec_task_t task)
 {
-    return (uint32_t)nrf_qdec_event_address_get(event);
+    return nrf_qdec_task_address_get(NRF_QDEC, task);
 }
 NRFX_STATIC_INLINE uint32_t nrfx_qdec_event_address_get(nrf_qdec_event_t event)
 {
    return nrf_qdec_event_address_get(NRF_QDEC, event);
 }
 #endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_qspi.h
+++ b/drivers/include/nrfx_qspi.h
@ -56,31 +56,52 @@ typedef struct
    uint8_t              irq_priority; /**< Interrupt priority. */
 } nrfx_qspi_config_t;
-/** @brief QSPI instance default configuration. */
+/**
-#define NRFX_QSPI_DEFAULT_CONFIG                                        \
+ * @brief QSPI instance default configuration.
 *
 * This configuration sets up QSPI with the following options:
 * - no offset for address in the external memory for Execute in Place operation
 * - single data line
 * - FAST_READ opcode for reading
 * - PP opcode for writing
 * - 24 bit addressing mode
 * - Deep Power-down disabled
 * - clock frequency 2 MHz
 * - SCK delay 5 clock ticks
 * - mode 0 (data captured on the clock rising edge and transmitted on a falling edge. Clock base level is '0')
 *
 * @param[in] _pin_sck Pin for clock signal.
 * @param[in] _pin_csn Pin for chip select signal.
 * @param[in] _pin_io0 Pin 0 for I/O data.
 * @param[in] _pin_io1 Pin 1 for I/O data.
 * @param[in] _pin_io2 Pin 2 for I/O data.
 * @param[in] _pin_io3 Pin 3 for I/O data.
 */
 #define NRFX_QSPI_DEFAULT_CONFIG(_pin_sck, _pin_csn, _pin_io0,         \
                                 _pin_io1, _pin_io2, _pin_io3)         \
 {                                                                      \
-    .xip_offset  = NRFX_QSPI_CONFIG_XIP_OFFSET,                         \
+    .xip_offset    = 0,                                                \
    .pins = {                                                          \
-       .sck_pin     = NRFX_QSPI_PIN_SCK,                                \
+       .sck_pin    = _pin_sck,                                         \
-       .csn_pin     = NRFX_QSPI_PIN_CSN,                                \
+       .csn_pin    = _pin_csn,                                         \
-       .io0_pin     = NRFX_QSPI_PIN_IO0,                                \
+       .io0_pin    = _pin_io0,                                         \
-       .io1_pin     = NRFX_QSPI_PIN_IO1,                                \
+       .io1_pin    = _pin_io1,                                         \
-       .io2_pin     = NRFX_QSPI_PIN_IO2,                                \
+       .io2_pin    = _pin_io2,                                         \
-       .io3_pin     = NRFX_QSPI_PIN_IO3,                                \
+       .io3_pin    = _pin_io3                                          \
    },                                                                 \
    .prot_if = {                                                       \
-        .readoc     = (nrf_qspi_readoc_t)NRFX_QSPI_CONFIG_READOC,       \
+        .readoc    = NRF_QSPI_READOC_FASTREAD,                         \
-        .writeoc    = (nrf_qspi_writeoc_t)NRFX_QSPI_CONFIG_WRITEOC,     \
+        .writeoc   = NRF_QSPI_WRITEOC_PP,                              \
-        .addrmode   = (nrf_qspi_addrmode_t)NRFX_QSPI_CONFIG_ADDRMODE,   \
+        .addrmode  = NRF_QSPI_ADDRMODE_24BIT,                          \
        .dpmconfig = false,                                            \
    },                                                                 \
    .phy_if = {                                                        \
-        .sck_delay  = (uint8_t)NRFX_QSPI_CONFIG_SCK_DELAY,              \
+        .sck_delay = 0x05,                                             \
        .dpmen     = false,                                            \
-        .spi_mode   = (nrf_qspi_spi_mode_t)NRFX_QSPI_CONFIG_MODE,       \
+        .spi_mode  = NRF_QSPI_MODE_0,                                  \
-        .sck_freq   = (nrf_qspi_frequency_t)NRFX_QSPI_CONFIG_FREQUENCY, \
+        .sck_freq  = NRF_QSPI_FREQ_32MDIV16,                           \
    },                                                                 \
-    .irq_priority   = (uint8_t)NRFX_QSPI_CONFIG_IRQ_PRIORITY,           \
+    .irq_priority  = (uint8_t)NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY,   \
 }
 /** @brief QSPI custom instruction helper with the default configuration. */
@ -155,7 +176,8 @@ void nrfx_qspi_uninit(void);
 * @retval NRFX_SUCCESS            The operation was successful (blocking mode) or operation
 *                                 was commissioned (handler mode).
 * @retval NRFX_ERROR_BUSY         The driver currently handles another operation.
- * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region
 *                                 or its address is not aligned to a 32-bit word.
 */
 nrfx_err_t nrfx_qspi_read(void *   p_rx_buffer,
                          size_t   rx_buffer_length,
@ -182,7 +204,8 @@ nrfx_err_t nrfx_qspi_read(void *   p_rx_buffer,
 * @retval NRFX_SUCCESS            The operation was successful (blocking mode) or operation
 *                                 was commissioned (handler mode).
 * @retval NRFX_ERROR_BUSY         The driver currently handles other operation.
- * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region
 *                                 or its address is not aligned to a 32-bit word.
 */
 nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
                           size_t       tx_buffer_length,
@ -208,6 +231,7 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
 *
 * @retval NRFX_SUCCESS            The operation was successful (blocking mode) or operation
 *                                 was commissioned (handler mode).
 * @retval NRFX_ERROR_INVALID_ADDR The provided start address is not aligned to a 32-bit word.
 * @retval NRFX_ERROR_BUSY         The driver currently handles another operation.
 */
 nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
--- a/drivers/include/nrfx_rng.h
+++ b/drivers/include/nrfx_rng.h
@ -60,11 +60,14 @@ typedef struct
 *            if (nrfx_rng_init(&config, handler)
 *            { ...
 *        @endcode
 *
 * This configuration sets up randon number generator with the following options:
 * - error correction enabled
 */
 #define NRFX_RNG_DEFAULT_CONFIG                                  \
 {                                                                \
-    .error_correction   = NRFX_RNG_CONFIG_ERROR_CORRECTION, \
+    .error_correction   = true,                                  \
-    .interrupt_priority = NRFX_RNG_CONFIG_IRQ_PRIORITY,     \
+    .interrupt_priority = NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY,  \
 }
 /** @brief RNG driver event handler type. */
--- a/drivers/include/nrfx_rtc.h
+++ b/drivers/include/nrfx_rtc.h
@ -102,14 +102,20 @@ typedef struct
    bool     reliable;           /**< Reliable mode flag. */
 } nrfx_rtc_config_t;
-/** @brief RTC instance default configuration. */
+/**
 * @brief RTC driver default configuration.
 *
 * This configuration sets up RTC with the following options:
 * - frequency 32.768 kHz
 * - maximum latency 2000 us
 * - reliability checks disabled
 */
 #define NRFX_RTC_DEFAULT_CONFIG                                  \
 {                                                                \
-    .prescaler          = RTC_FREQ_TO_PRESCALER(NRFX_RTC_DEFAULT_CONFIG_FREQUENCY), \
+    .prescaler          = RTC_FREQ_TO_PRESCALER(32768),          \
    .interrupt_priority = NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY,  \
-    .tick_latency       = NRFX_RTC_US_TO_TICKS(NRFX_RTC_MAXIMUM_LATENCY_US,         \
+    .tick_latency       = NRFX_RTC_US_TO_TICKS(2000, 32768),     \
-                                               NRFX_RTC_DEFAULT_CONFIG_FREQUENCY),  \
+    .reliable           = false,                                 \
    .reliable           = NRFX_RTC_DEFAULT_CONFIG_RELIABLE,                         \
 }
 /** @brief RTC driver instance handler type. */
@ -128,7 +134,7 @@ typedef void (*nrfx_rtc_handler_t)(nrfx_rtc_int_type_t int_type);
 * @retval NRFX_SUCCESS             Successfully initialized.
 * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
 */
-nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const  p_instance,
+nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const *        p_instance,
                         nrfx_rtc_config_t const * p_config,
                         nrfx_rtc_handler_t        handler);
@ -140,21 +146,21 @@ nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const  p_instance,
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_rtc_uninit(nrfx_rtc_t const * const p_instance);
+void nrfx_rtc_uninit(nrfx_rtc_t const * p_instance);
 /**
 * @brief Function for enabling the RTC driver instance.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_rtc_enable(nrfx_rtc_t const * const p_instance);
+void nrfx_rtc_enable(nrfx_rtc_t const * p_instance);
 /**
 * @brief Function for disabling the RTC driver instance.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance);
+void nrfx_rtc_disable(nrfx_rtc_t const * p_instance);
 /**
 * @brief Function for setting a compare channel.
@ -182,7 +188,7 @@ void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance);
 *                            current counter value. This error can only be reported
 *                            if the reliable mode is enabled.
 */
-nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance,
+nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * p_instance,
                           uint32_t           channel,
                           uint32_t           val,
                           bool               enable_irq);
@ -198,7 +204,7 @@ nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance,
 * @retval NRFX_SUCCESS       The procedure is successful.
 * @retval NRFX_ERROR_TIMEOUT Interrupt is pending on the requested channel.
 */
-nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t channel);
+nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * p_instance, uint32_t channel);
 /**
 * @brief Function for enabling the TICK event.
@ -208,7 +214,7 @@ nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t cha
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
 */
-void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq);
+void nrfx_rtc_tick_enable(nrfx_rtc_t const * p_instance, bool enable_irq);
 /**
 * @brief Function for disabling the TICK event.
@ -217,7 +223,7 @@ void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq);
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance);
+void nrfx_rtc_tick_disable(nrfx_rtc_t const * p_instance);
 /**
 * @brief Function for enabling overflow.
@ -227,7 +233,7 @@ void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance);
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
 */
-void nrfx_rtc_overflow_enable(nrfx_rtc_t const * const p_instance, bool enable_irq);
+void nrfx_rtc_overflow_enable(nrfx_rtc_t const * p_instance, bool enable_irq);
 /**
 * @brief Function for disabling overflow.
@ -236,7 +242,7 @@ void nrfx_rtc_overflow_enable(nrfx_rtc_t const * const p_instance, bool enable_i
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_rtc_overflow_disable(nrfx_rtc_t const * const p_instance);
+void nrfx_rtc_overflow_disable(nrfx_rtc_t const * p_instance);
 /**
 * @brief Function for getting the maximum relative tick value that can be set in the compare channel.
@ -251,7 +257,7 @@ void nrfx_rtc_overflow_disable(nrfx_rtc_t const * const p_instance);
 *
 * @return Maximum ticks value.
 */
-uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * const p_instance);
+uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * p_instance);
 /**
 * @brief Function for disabling all instance interrupts.
@ -259,7 +265,7 @@ uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * const p_instance);
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] p_mask     Pointer to the location where the mask is filled.
 */
-__STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * const p_instance,
+NRFX_STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * p_instance,
                                             uint32_t *         p_mask);
 /**
@ -268,7 +274,7 @@ __STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * const p_instance,
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] mask       Mask of interrupts to enable.
 */
-__STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * const p_instance, uint32_t mask);
+NRFX_STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * p_instance, uint32_t mask);
 /**
 * @brief Function for retrieving the current counter value.
@ -277,14 +283,14 @@ __STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * const p_instance, ui
 *
 * @return Counter value.
 */
-__STATIC_INLINE uint32_t nrfx_rtc_counter_get(nrfx_rtc_t const * const p_instance);
+NRFX_STATIC_INLINE uint32_t nrfx_rtc_counter_get(nrfx_rtc_t const * p_instance);
 /**
 * @brief Function for clearing the counter value.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-__STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * const p_instance);
+NRFX_STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * p_instance);
 /**
 * @brief Function for returning a requested task address for the RTC driver instance.
@ -296,7 +302,7 @@ __STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * const p_instance)
 *
 * @return Address of task register.
 */
-__STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * p_instance,
                                                      nrf_rtc_task_t     task);
 /**
@ -309,15 +315,14 @@ __STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * const p_in
 *
 * @return Address of event register.
 */
-__STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * p_instance,
                                                       nrf_rtc_event_t    event);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-
+NRFX_STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * p_instance,
 __STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * const p_instance,
                                             uint32_t *         p_mask)
 {
-    *p_mask = nrf_rtc_int_get(p_instance->p_reg);
+    *p_mask = nrf_rtc_int_enable_check(p_instance->p_reg, ~0uL);
    nrf_rtc_int_disable(p_instance->p_reg, NRF_RTC_INT_TICK_MASK |
                                           NRF_RTC_INT_OVERFLOW_MASK |
                                           NRF_RTC_INT_COMPARE0_MASK |
@ -326,33 +331,33 @@ __STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * const p_instance,
                                           NRF_RTC_INT_COMPARE3_MASK);
 }
-__STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * const p_instance, uint32_t mask)
+NRFX_STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * p_instance, uint32_t mask)
 {
    nrf_rtc_int_enable(p_instance->p_reg, mask);
 }
-__STATIC_INLINE uint32_t nrfx_rtc_counter_get(nrfx_rtc_t const * const p_instance)
+NRFX_STATIC_INLINE uint32_t nrfx_rtc_counter_get(nrfx_rtc_t const * p_instance)
 {
    return nrf_rtc_counter_get(p_instance->p_reg);
 }
-__STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * const p_instance)
+NRFX_STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * p_instance)
 {
    nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_CLEAR);
 }
-__STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * p_instance,
                                                      nrf_rtc_task_t     task)
 {
    return nrf_rtc_task_address_get(p_instance->p_reg, task);
 }
-__STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * p_instance,
                                                       nrf_rtc_event_t    event)
 {
    return nrf_rtc_event_address_get(p_instance->p_reg, event);
 }
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
+#endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_saadc.h
+++ b/drivers/include/nrfx_saadc.h
@ -46,27 +46,25 @@ extern "C" {
 * @brief   Successive Approximation Analog-to-Digital Converter (SAADC) peripheral driver.
 */
 /** @brief Value to be set as high limit to disable limit detection. */
 #define NRFX_SAADC_LIMITH_DISABLED (2047)
 /** @brief Value to be set as low limit to disable limit detection. */
 #define NRFX_SAADC_LIMITL_DISABLED (-2048)
 /** @brief Macro for setting @ref nrfx_saadc_config_t to default settings. */
 #define NRFX_SAADC_DEFAULT_CONFIG                                               \
 {                                                                               \
    .resolution         = (nrf_saadc_resolution_t)NRFX_SAADC_CONFIG_RESOLUTION, \
    .oversample         = (nrf_saadc_oversample_t)NRFX_SAADC_CONFIG_OVERSAMPLE, \
    .interrupt_priority = NRFX_SAADC_CONFIG_IRQ_PRIORITY,                       \
    .low_power_mode     = NRFX_SAADC_CONFIG_LP_MODE                             \
 }
 /**
- * @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings
+ * @brief SAADC channel default configuration for the single-ended mode.
 *        in single-ended mode.
 *
- * @param PIN_P Analog input.
+ * This configuration sets up single-ended SAADC channel with the following options:
 * - resistor ladder disabled
 * - gain: 1/6
 * - reference voltage: internal 0.6 V
 * - sample acquisition time: 10 us
 * - burst disabled
 *
 * @param[in] _pin_p Positive input analog pin.
 * @param[in] _index Channel index.
 *
 * @sa nrfx_saadc_channel_t
 */
-#define NRFX_SAADC_DEFAULT_CHANNEL_CONFIG_SE(PIN_P) \
+#define NRFX_SAADC_DEFAULT_CHANNEL_SE(_pin_p, _index)       \
 {                                                           \
    .channel_config =                                       \
    {                                                       \
        .resistor_p = NRF_SAADC_RESISTOR_DISABLED,          \
        .resistor_n = NRF_SAADC_RESISTOR_DISABLED,          \
@ -75,18 +73,31 @@ extern "C" {
        .acq_time   = NRF_SAADC_ACQTIME_10US,               \
        .mode       = NRF_SAADC_MODE_SINGLE_ENDED,          \
        .burst      = NRF_SAADC_BURST_DISABLED,             \
-    .pin_p      = (nrf_saadc_input_t)(PIN_P),       \
+    },                                                      \
-    .pin_n      = NRF_SAADC_INPUT_DISABLED          \
+    .pin_p          = (nrf_saadc_input_t)_pin_p,            \
    .pin_n          = NRF_SAADC_INPUT_DISABLED,             \
    .channel_index  = _index,                               \
 }
 /**
- * @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings
+ * @brief SAADC channel default configuration for the differential mode.
 *        in differential mode.
 *
- * @param PIN_P Positive analog input.
+ * This configuration sets up differential SAADC channel with the following options:
- * @param PIN_N Negative analog input.
+ * - resistor ladder disabled
 * - gain: 1/6
 * - reference voltage: internal 0.6 V
 * - sample acquisition time: 10 us
 * - burst disabled
 *
 * @param[in] _pin_p Positive input analog pin.
 * @param[in] _pin_n Negative input analog pin.
 * @param[in] _index Channel index.
 *
 * @sa nrfx_saadc_channel_t
 */
-#define NRFX_SAADC_DEFAULT_CHANNEL_CONFIG_DIFFERENTIAL(PIN_P, PIN_N) \
+#define NRFX_SAADC_DEFAULT_CHANNEL_DIFFERENTIAL(_pin_p, _pin_n, _index) \
 {                                                                       \
    .channel_config =                                                   \
    {                                                                   \
        .resistor_p = NRF_SAADC_RESISTOR_DISABLED,                      \
        .resistor_n = NRF_SAADC_RESISTOR_DISABLED,                      \
@ -95,31 +106,68 @@ extern "C" {
        .acq_time   = NRF_SAADC_ACQTIME_10US,                           \
        .mode       = NRF_SAADC_MODE_DIFFERENTIAL,                      \
        .burst      = NRF_SAADC_BURST_DISABLED,                         \
-    .pin_p      = (nrf_saadc_input_t)(PIN_P),                        \
+    },                                                                  \
-    .pin_n      = (nrf_saadc_input_t)(PIN_N)                         \
+    .pin_p          = (nrf_saadc_input_t)_pin_p,                        \
    .pin_n          = (nrf_saadc_input_t)_pin_n,                        \
    .channel_index  = _index,                                           \
 }
-/** @brief SAADC driver configuration structure. */
+/**
 * @brief SAADC driver advanced mode default configuration.
 *
 * This configuration sets up advanced mode of the SAADC driver with the following options:
 * - oversampling disabled
 * - burst disabled
 * - internal sampling timer disabled
 * - triggering of the START task on the END event disabled
 *
 * @param[in] _pin_p Positive input analog pin.
 * @param[in] _pin_n Negative input analog pin.
 * @param[in] _index Channel index.
 *
 * @sa nrfx_saadc_adv_config_t
 */
 #define NRFX_SAADC_DEFAULT_ADV_CONFIG                                           \
 {                                                                               \
    .oversampling      = NRF_SAADC_OVERSAMPLE_DISABLED,                         \
    .burst             = NRF_SAADC_BURST_DISABLED,                              \
    .internal_timer_cc = 0,                                                     \
    .start_on_end      = false,                                                 \
 }
 /** @brief SAADC channel configuration structure. */
 typedef struct
 {
-    nrf_saadc_resolution_t resolution;         ///< Resolution configuration.
+    nrf_saadc_channel_config_t channel_config; ///< Channel hardware configuration.
-    nrf_saadc_oversample_t oversample;         ///< Oversampling configuration.
+    nrf_saadc_input_t          pin_p;          ///< Input positive pin selection.
-    uint8_t                interrupt_priority; ///< Interrupt priority.
+    nrf_saadc_input_t          pin_n;          ///< Input negative pin selection.
-    bool                   low_power_mode;     ///< Indicates if low power mode is active.
+    uint8_t                    channel_index;  ///< Channel index.
-} nrfx_saadc_config_t;
+} nrfx_saadc_channel_t;
 /** @brief SAADC driver advanced mode configuration structure. */
 typedef struct
 {
    nrf_saadc_oversample_t oversampling;      ///< Oversampling configuration.
    nrf_saadc_burst_t      burst;             ///< Burst configuration.
    uint16_t               internal_timer_cc; ///< Internal timer capture and compare value.
    bool                   start_on_end;      ///< Flag indicating if the START task is to be triggered on the END event.
 } nrfx_saadc_adv_config_t;
 /** @brief SAADC driver event types. */
 typedef enum
 {
    NRFX_SAADC_EVT_DONE,          ///< Event generated when the buffer is filled with samples.
-    NRFX_SAADC_EVT_LIMIT,        ///< Event generated after one of the limits is reached.
+    NRFX_SAADC_EVT_LIMIT,         ///< Event generated when one of the limits is reached.
-    NRFX_SAADC_EVT_CALIBRATEDONE ///< Event generated when the calibration is complete.
+    NRFX_SAADC_EVT_CALIBRATEDONE, ///< Event generated when the calibration is complete.
    NRFX_SAADC_EVT_BUF_REQ,       ///< Event generated when the next buffer for continuous conversion is requested.
    NRFX_SAADC_EVT_READY,         ///< Event generated when the first buffer is acquired by the peripheral and sampling can be started.
    NRFX_SAADC_EVT_FINISHED,      ///< Event generated when all supplied buffers are filled with results.
 } nrfx_saadc_evt_type_t;
 /** @brief SAADC driver done event data. */
 typedef struct
 {
-    nrf_saadc_value_t * p_buffer; ///< Pointer to buffer with converted samples.
+    nrf_saadc_value_t * p_buffer; ///< Pointer to the buffer with converted samples.
    uint16_t            size;     ///< Number of samples in the buffer.
 } nrfx_saadc_done_evt_t;
@ -144,129 +192,137 @@ typedef struct
 /**
 * @brief SAADC driver event handler.
 *
 * When operating in the advanced mode:
 * - when the sampling is performed by the external timer, the external timer can be safely started
 *   on @ref NRFX_SAADC_EVT_READY and stopped on @ref NRFX_SAADC_EVT_FINISHED.
 * - call the @ref nrfx_saadc_buffer_set() on @ref NRFX_SAADC_EVT_BUF_REQ to achieve the continuous conversion.
 *
 * @param[in] p_event Pointer to an SAADC driver event. The event structure is allocated on
 *                    the stack, so it is valid only within the context of the event handler.
 */
 typedef void (* nrfx_saadc_event_handler_t)(nrfx_saadc_evt_t const * p_event);
 /**
- * @brief Function for initializing the SAADC.
+ * @brief Function for initializing the SAADC driver.
 *
- * @param[in] p_config      Pointer to the structure with initial configuration.
+ * @param[in] interrupt_priority Interrupt priority.
 * @param[in] event_handler Event handler provided by the user.
 *                          Must not be NULL.
 *
 * @retval NRFX_SUCCESS             Initialization was successful.
 * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
 */
-nrfx_err_t nrfx_saadc_init(nrfx_saadc_config_t const * p_config,
+nrfx_err_t nrfx_saadc_init(uint8_t interrupt_priority);
                           nrfx_saadc_event_handler_t  event_handler);
 /**
- * @brief Function for uninitializing the SAADC.
+ * @brief Function for uninitializing the SAADC driver.
 *
 * This function stops all ongoing conversions and disables all channels.
 */
 void nrfx_saadc_uninit(void);
 /**
- * @brief Function for getting the address of a SAMPLE SAADC task.
+ * @brief Function for configuring the SAADC channels.
 *
- * @return Task address.
+ * @note The values of the @ref nrf_saadc_channel_config_t.burst fields in channel configurations
 *       are ignored. They will be overridden with the value suitable for the selected driver
 *       operation mode.
 * @note The desired mode (simple or advanced) must be set after the channels are configured.
 *
 * @param[in] p_channels    Pointer to the array of channel configuration structures.
 * @param[in] channel_count Number of channels to be configured.
 *
 * @retval NRFX_SUCCESS             Configuration was successful.
 * @retval NRFX_ERROR_BUSY          There is a conversion or calibration ongoing.
 * @retval NRFX_ERROR_INVALID_PARAM Attempt to configure the same channel more than once.
 */
-uint32_t nrfx_saadc_sample_task_get(void);
+nrfx_err_t nrfx_saadc_channels_config(nrfx_saadc_channel_t const * p_channels,
                                      uint32_t                     channel_count);
 /**
- * @brief Function for initializing an SAADC channel.
+ * @brief Function for setting the SAADC driver in the simple mode.
 *
- * This function configures and enables the channel.
+ * The simple mode allows obtaining a single sample from each requested channel.
 * The conversion can be done in a blocking or non-blocking manner.
 * Sampling is initiated by calling @ref nrfx_saadc_mode_trigger() once.
 *
- * @param[in] channel  Channel index.
+ * @param[in] channel_mask  Bitmask of channels to be used in the simple mode.
- * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] resolution    Resolution configuration.
 * @param[in] oversampling  Oversampling configuration.
 * @param[in] event_handler Event handler provided by the user. In case of providing NULL,
 *                          the conversion will be performed in the blocking manner.
 *
 * @retval NRFX_SUCCESS             Initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE The SAADC was not initialized.
+ * @retval NRFX_ERROR_BUSY          There is a conversion or calibration ongoing.
- * @retval NRFX_ERROR_NO_MEM        The specified channel was already allocated.
+ * @retval NRFX_ERROR_INVALID_PARAM Attempt to activate channel that is not configured.
 */
-nrfx_err_t nrfx_saadc_channel_init(uint8_t                                  channel,
+nrfx_err_t nrfx_saadc_simple_mode_set(uint32_t                   channel_mask,
-                                   nrf_saadc_channel_config_t const * const p_config);
+                                      nrf_saadc_resolution_t     resolution,
                                      nrf_saadc_oversample_t     oversampling,
                                      nrfx_saadc_event_handler_t event_handler);
 /**
- * @brief Function for uninitializing an SAADC channel.
+ * @brief Function for setting the SAADC driver in the advanced mode.
 *
- * @param[in] channel Channel index.
+ * The advanced mode allows performing double-buffered conversions of arbitrary length.
 * The conversions can be done in a blocking or non-blocking manner. When performing conversions
 * in the non-blocking manner and @ref nrfx_saadc_adv_config_t.internal_timer_cc is set to 0,
 * sampling needs to be done by triggering @ref NRF_SAADC_TASK_SAMPLE externally
 * (for example by using the TIMER and/or the PPI/DPPI).
 * When performing conversions in the non-blocking manner and @ref nrfx_saadc_adv_config_t.start_on_end
 * is false, the @ref NRF_SAADC_TASK_START needs to be triggered on @ref NRF_SAADC_EVENT_END
 * externally (for example by using the PPI/DPPI).
 * Sampling is initiated by calling @ref nrfx_saadc_mode_trigger(). In case of performing
 * conversions in the blocking manner, @ref nrfx_saadc_mode_trigger() may need to be called several
 * times as each call sample each requested channel once.
 *
- * @retval NRFX_SUCCESS    Uninitialization was successful.
+ * @note The internal timer can only be used when a single input channel is enabled.
- * @retval NRFX_ERROR_BUSY The SAADC is busy.
+ * @note The internal timer can only be used in the non-blocking mode.
 *
 * @param[in] channel_mask  Bitmask of channels to be used in the advanced mode.
 * @param[in] resolution    Resolution configuration.
 * @param[in] p_config      Pointer to the structure with the advanced mode configuration.
 * @param[in] event_handler Event handler provided by the user. In case of providing NULL,
 *                          the conversion will be performed in the blocking manner.
 *
 * @retval NRFX_SUCCESS             Initialization was successful.
 * @retval NRFX_ERROR_BUSY          There is a conversion or calibration ongoing.
 * @retval NRFX_ERROR_INVALID_PARAM Attempt to activate channel that is not configured.
 * @retval NRFX_ERROR_NOT_SUPPORTED Attempt to activate internal timer or oversampling without burst
 *                                  with multiple channels enabled.
 */
-nrfx_err_t nrfx_saadc_channel_uninit(uint8_t channel);
+nrfx_err_t nrfx_saadc_advanced_mode_set(uint32_t                        channel_mask,
                                        nrf_saadc_resolution_t          resolution,
                                        nrfx_saadc_adv_config_t const * p_config,
                                        nrfx_saadc_event_handler_t      event_handler);
 /**
- * @brief Function for starting the SAADC sampling.
+ * @brief Function for supplying the buffer to be used in the next part of
 *        the conversion.
 *
- * @retval NRFX_SUCCESS             The SAADC sampling was triggered.
+ * @param[in] p_buffer Pointer to the buffer to be filled with conversion results.
- * @retval NRFX_ERROR_INVALID_STATE The SAADC is in idle state.
+ * @param[in] size     Number of @ref nrf_saadc_value_t samples in buffer.
 *
 * @retval NRFX_SUCCESS                   Buffer was supplied successfully.
 * @retval NRFX_ERROR_INVALID_ADDR        The provided buffer is not in the Data RAM region.
 * @retval NRFX_ERROR_INVALID_LENGTH      The provided buffer is not aligned to the number of activated channels
 *                                        or is too long for the EasyDMA to handle.
 * @retval NRFX_ERROR_INVALID_STATE       The driver is in the idle mode.
 * @retval NRFX_ERROR_ALREADY_INITIALIZED Both buffers for double-buffered conversions are already set.
 */
-nrfx_err_t nrfx_saadc_sample(void);
+nrfx_err_t nrfx_saadc_buffer_set(nrf_saadc_value_t * p_buffer, uint16_t size);
 /**
- * @brief Blocking function for executing a single SAADC conversion.
+ * @brief Function for triggering the conversion in the configured mode.
 *
- * This function selects the desired input, starts a single conversion,
+ * @retval NRFX_SUCCESS             Operation finished successfully in the blocking manner or started
- * waits for it to finish, and returns the result.
+ *                                  successfully in the non-blocking manner.
- *
+ * @retval NRFX_ERROR_BUSY          The driver is performing the conversion in the advanced blocking mode.
- * The function fails if the SAADC is busy.
+ *                                  Call the function again to continue the conversion.
- *
+ * @retval NRFX_ERROR_NO_MEM        There is no buffer provided.
- * @param[in]  channel Channel.
+ *                                  Supply the buffer using @ref nrfx_saadc_buffer_set() and try again.
- * @param[out] p_value Pointer to the location where the result is to be placed.
+ * @retval NRFX_ERROR_INVALID_STATE There is an ongoing conversion being performed in the non-blocking manner
- *
+ *                                  or the driver is in the idle mode.
 * @retval NRFX_SUCCESS    The conversion was successful.
 * @retval NRFX_ERROR_BUSY The SAADC driver is busy.
 */
-nrfx_err_t nrfx_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value);
+nrfx_err_t nrfx_saadc_mode_trigger(void);
 /**
 * @brief Function for issuing conversion of data to the buffer.
 *
 * This function is non-blocking. The application is notified about filling the buffer by the event
 * handler. Conversion will be done on all enabled channels. If the SAADC is in idle state, the
 * function will set up EasyDMA for the conversion. The SAADC will be ready for sampling and wait
 * for the SAMPLE task. It can be triggered manually by the @ref nrfx_saadc_sample function
 * or by PPI using the @ref NRF_SAADC_TASK_SAMPLE task. If one buffer is already set and the
 * conversion is ongoing, calling this function will result in queuing the given buffer.
 * The driver will start filling the issued buffer when the first one is completed.
 * If the function is called again before the first buffer is filled or calibration
 * is in progress, it will return with error.
 *
 * @param[in] buffer Result buffer.
 * @param[in] size   Buffer size in words.
 *
 * @retval NRFX_SUCCESS    The conversion was successful.
 * @retval NRFX_ERROR_BUSY The driver already has two buffers set or the calibration is in progress.
 */
 nrfx_err_t nrfx_saadc_buffer_convert(nrf_saadc_value_t * buffer, uint16_t size);
 /**
 * @brief Function for triggering the SAADC offset calibration.
 *
 * This function is non-blocking. The application is notified about completion by the event handler.
 * Calibration will also trigger DONE and RESULTDONE events.
 *
 * The function will fail if the SAADC is busy or calibration is already in progress.
 *
 * @retval NRFX_SUCCESS    The calibration was started successfully.
 * @retval NRFX_ERROR_BUSY The SAADC driver is busy.
 */
 nrfx_err_t nrfx_saadc_calibrate_offset(void);
 /**
 * @brief Function for retrieving the SAADC state.
 *
 * @retval true  The SAADC is busy.
 * @retval false The SAADC is ready.
 */
 bool nrfx_saadc_is_busy(void);
 /**
 * @brief Function for aborting the ongoing and buffered conversions.
@ -278,27 +334,47 @@ void nrfx_saadc_abort(void);
 /**
 * @brief Function for setting the SAADC channel limits.
 *        When limits are enabled and the result exceeds the defined bounds, the limit handler
 *        function is called.
 *
- * @param[in] channel    SAADC channel number.
+ * When limits are enabled and the conversion result exceeds the defined bounds,
- * @param[in] limit_low  Lower limit (valid values from @ref NRFX_SAADC_LIMITL_DISABLED to
+ * the handler function is called with the corresponding event as parameter.
- *                       @ref NRFX_SAADC_LIMITH_DISABLED). Conversion results below this value will
+ *
- *                       trigger the handler function. Set to @ref NRFX_SAADC_LIMITL_DISABLED
+ * @note Before the limits are set, the driver operation mode (simple or advanced) has
- *                       to disable this limit.
+ *       to be configured. Only non-blocking conversions can be monitored.
- * @param[in] limit_high Upper limit (valid values from @ref NRFX_SAADC_LIMITL_DISABLED to
+ *
- *                       @ref NRFX_SAADC_LIMITH_DISABLED). Conversion results above this value will
+ * @note Changing of the driver operation mode disables all configured limits.
- *                       trigger the handler function. Set to @ref NRFX_SAADC_LIMITH_DISABLED
+ *
- *                       to disable this limit.
+ * @param[in] channel    Channel index.
 * @param[in] limit_low  Limit low value to generate interrupt. Use @c INT16_MIN
 *                       to disable interrupt generation.
 * @param[in] limit_high Limit high value to generate interrupt. Use @c INT16_MAX
 *                       to disable interrupt generation.
 *
 * @retval NRFX_SUCCESS             Requested channel limits were set.
 * @retval NRFX_ERROR_INVALID_PARAM Attempt to activate the limits on disabled channel.
 * @retval NRFX_ERROR_FORBIDDEN     Attempt to activate the limits for blocking conversions.
 * @retval NRFX_ERROR_INVALID_STATE Attempt to activate the limits without configured mode.
 */
-void nrfx_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high);
+nrfx_err_t nrfx_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high);
 /**
 * @brief Function for starting the SAADC offset calibration.
 *
 * @note This function cancels the currently selected driver operation mode, if any.
 *       The desired mode (simple or advanced) must be set after the calibration process completes.
 *
 * @param[in] event_handler Event handler provided by the user. In case of providing NULL,
 *                          the calibration will be performed in the blocking manner.
 *
 * @retval NRFX_SUCCESS    Calibration finished successfully in the blocking manner
 *                         or started successfully in the non-blocking manner.
 * @retval NRFX_ERROR_BUSY There is a conversion or calibration ongoing.
 */
 nrfx_err_t nrfx_saadc_offset_calibrate(nrfx_saadc_event_handler_t event_handler);
 /** @} */
 void nrfx_saadc_irq_handler(void);
 #ifdef __cplusplus
 }
 #endif
--- a/drivers/include/nrfx_spi.h
+++ b/drivers/include/nrfx_spi.h
@ -34,6 +34,7 @@
 #include <nrfx.h>
 #include <hal/nrf_spi.h>
 #include <hal/nrf_gpio.h>
 #ifdef __cplusplus
 extern "C" {
@ -53,6 +54,7 @@ typedef struct
    uint8_t        drv_inst_idx; ///< Index of the driver instance. For internal use only.
 } nrfx_spi_t;
 #ifndef __NRFX_DOXYGEN__
 enum {
 #if NRFX_CHECK(NRFX_SPI0_ENABLED)
    NRFX_SPI0_INST_IDX,
@ -65,6 +67,7 @@ enum {
 #endif
    NRFX_SPI_ENABLED_COUNT
 };
 #endif
 /** @brief Macro for creating an instance of the SPI master driver. */
 #define NRFX_SPI_INSTANCE(id)                               \
@ -103,15 +106,28 @@ typedef struct
    nrf_spi_frequency_t frequency;  ///< SPI frequency.
    nrf_spi_mode_t      mode;       ///< SPI mode.
    nrf_spi_bit_order_t bit_order;  ///< SPI bit order.
    nrf_gpio_pin_pull_t miso_pull;  ///< MISO pull up configuration.
 } nrfx_spi_config_t;
-/** @brief SPI master instance default configuration. */
+/**
-#define NRFX_SPI_DEFAULT_CONFIG                           \
+ * @brief SPI master instance default configuration.
 * This configuration sets up SPI with the following options:
 * - over-run character set to 0xFF
 * - clock frequency 4 MHz
 * - mode 0 enabled (SCK active high, sample on leading edge of clock)
 * - MSB shifted out first
 *
 * @param[in] _pin_sck  SCK pin.
 * @param[in] _pin_mosi MOSI pin.
 * @param[in] _pin_miso MISO pin.
 * @param[in] _pin_ss   SS pin.
 */
 #define NRFX_SPI_DEFAULT_CONFIG(_pin_sck, _pin_mosi, _pin_miso, _pin_ss)    \
 {                                                                           \
-    .sck_pin      = NRFX_SPI_PIN_NOT_USED,                \
+    .sck_pin      = _pin_sck,                                               \
-    .mosi_pin     = NRFX_SPI_PIN_NOT_USED,                \
+    .mosi_pin     = _pin_mosi,                                              \
-    .miso_pin     = NRFX_SPI_PIN_NOT_USED,                \
+    .miso_pin     = _pin_miso,                                              \
-    .ss_pin       = NRFX_SPI_PIN_NOT_USED,                \
+    .ss_pin       = _pin_ss,                                                \
    .irq_priority = NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY,                   \
    .orc          = 0xFF,                                                   \
    .frequency    = NRF_SPI_FREQ_4M,                                        \
@ -191,7 +207,7 @@ typedef void (* nrfx_spi_evt_handler_t)(nrfx_spi_evt_t const * p_event,
 *                                  possible only if @ref nrfx_prs module
 *                                  is enabled.
 */
-nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const  p_instance,
+nrfx_err_t nrfx_spi_init(nrfx_spi_t const *        p_instance,
                         nrfx_spi_config_t const * p_config,
                         nrfx_spi_evt_handler_t    handler,
                         void *                    p_context);
@ -201,7 +217,7 @@ nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const  p_instance,
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_spi_uninit(nrfx_spi_t const * const p_instance);
+void nrfx_spi_uninit(nrfx_spi_t const * p_instance);
 /**
 * @brief Function for starting the SPI data transfer.
@ -220,7 +236,7 @@ void nrfx_spi_uninit(nrfx_spi_t const * const p_instance);
 * @retval NRFX_ERROR_BUSY          The driver is not ready for a new transfer.
 * @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
 */
-nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const * const     p_instance,
+nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const *           p_instance,
                         nrfx_spi_xfer_desc_t const * p_xfer_desc,
                         uint32_t                     flags);
--- a/drivers/include/nrfx_spim.h
+++ b/drivers/include/nrfx_spim.h
@ -34,6 +34,7 @@
 #include <nrfx.h>
 #include <hal/nrf_spim.h>
 #include <hal/nrf_gpio.h>
 #ifdef __cplusplus
 extern "C" {
@ -106,6 +107,7 @@ typedef struct
    nrf_spim_frequency_t frequency;       ///< SPIM frequency.
    nrf_spim_mode_t      mode;            ///< SPIM mode.
    nrf_spim_bit_order_t bit_order;       ///< SPIM bit order.
    nrf_gpio_pin_pull_t  miso_pull;       ///< MISO pull up configuration.
 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
    uint8_t              dcx_pin;         ///< D/CX pin number (optional).
    uint8_t              rx_delay;        ///< Sample delay for input serial data on MISO.
@ -115,8 +117,8 @@ typedef struct
                                           *   the input serial data is sampled. */
    bool                 use_hw_ss;       ///< Indication to use software or hardware controlled Slave Select pin.
    uint8_t              ss_duration;     ///< Slave Select duration before and after transmission.
-                                      /**< Minimum duration between the edge of CSN and the edge of SCK and minimum
+                                          /**< Minimum duration between the edge of CSN and the edge of SCK.
-                                       *   duration of CSN must stay inactive between transactions.
+                                           *   Also, minimum duration of CSN inactivity between transactions.
                                           *   The value is specified in number of 64 MHz clock cycles (15.625 ns).
                                           *   Supported only for hardware-controlled Slave Select. */
 #endif
@ -124,7 +126,13 @@ typedef struct
 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
 /**
- * @brief Extended default configuration of the SPIM instance.
+ * @brief SPIM driver extended default configuration.
 *
 * This configuration sets up SPIM additional options with the following values:
 * - DCX pin disabled
 * - RX sampling delay: 2 clock cycles
 * - hardware SS disabled
 * - hardware SS duration before and after transmission: 2 clock cycles
 */
 #define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG   \
    .dcx_pin      = NRFX_SPIM_PIN_NOT_USED, \
@ -135,19 +143,35 @@ typedef struct
    #define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG
 #endif
-/** @brief The default configuration of the SPIM master instance. */
+/**
-#define NRFX_SPIM_DEFAULT_CONFIG                             \
+ * @brief SPIM driver default configuration.
 *
 * This configuration sets up SPIM with the following options:
 * - SS pin active low
 * - over-run character set to 0xFF
 * - clock frequency: 4 MHz
 * - mode: 0 (SCK active high, sample on leading edge of the clock signa;)
 * - MSB shifted out first
 * - MISO pull-up disabled
 *
 * @param[in] _pin_sck  SCK pin.
 * @param[in] _pin_mosi MOSI pin.
 * @param[in] _pin_miso MISO pin.
 * @param[in] _pin_ss   SS pin.
 */
 #define NRFX_SPIM_DEFAULT_CONFIG(_pin_sck, _pin_mosi, _pin_miso, _pin_ss)   \
 {                                                                           \
-    .sck_pin        = NRFX_SPIM_PIN_NOT_USED,                \
+    .sck_pin        = _pin_sck,                                             \
-    .mosi_pin       = NRFX_SPIM_PIN_NOT_USED,                \
+    .mosi_pin       = _pin_mosi,                                            \
-    .miso_pin       = NRFX_SPIM_PIN_NOT_USED,                \
+    .miso_pin       = _pin_miso,                                            \
-    .ss_pin         = NRFX_SPIM_PIN_NOT_USED,                \
+    .ss_pin         = _pin_ss,                                              \
    .ss_active_high = false,                                                \
    .irq_priority   = NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY,                \
    .orc            = 0xFF,                                                 \
    .frequency      = NRF_SPIM_FREQ_4M,                                     \
    .mode           = NRF_SPIM_MODE_0,                                      \
    .bit_order      = NRF_SPIM_BIT_ORDER_MSB_FIRST,                         \
    .miso_pull      = NRF_GPIO_PIN_NOPULL,                                  \
    NRFX_SPIM_DEFAULT_EXTENDED_CONFIG                                       \
 }
@ -236,7 +260,7 @@ typedef void (* nrfx_spim_evt_handler_t)(nrfx_spim_evt_t const * p_event,
 * @retval NRFX_ERROR_NOT_SUPPORTED Requested configuration is not supported
 *                                  by the SPIM instance.
 */
-nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const  p_instance,
+nrfx_err_t nrfx_spim_init(nrfx_spim_t const *        p_instance,
                          nrfx_spim_config_t const * p_config,
                          nrfx_spim_evt_handler_t    handler,
                          void *                     p_context);
@ -246,7 +270,7 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const  p_instance,
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void       nrfx_spim_uninit(nrfx_spim_t const * const p_instance);
+void nrfx_spim_uninit(nrfx_spim_t const * p_instance);
 /**
 * @brief Function for starting the SPIM data transfer.
@ -290,7 +314,7 @@ void       nrfx_spim_uninit(nrfx_spim_t const * const p_instance);
 * @retval NRFX_ERROR_INVALID_ADDR  The provided buffers are not placed in the Data
 *                                  RAM region.
 */
-nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const     p_instance,
+nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const *           p_instance,
                          nrfx_spim_xfer_desc_t const * p_xfer_desc,
                          uint32_t                      flags);
@ -323,7 +347,7 @@ nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const     p_instance,
 * @retval NRFX_ERROR_INVALID_ADDR  The provided buffers are not placed in the Data
 *                                  RAM region.
 */
-nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const     p_instance,
+nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const *           p_instance,
                              nrfx_spim_xfer_desc_t const * p_xfer_desc,
                              uint32_t                      flags,
                              uint8_t                       cmd_length);
--- a/drivers/include/nrfx_spis.h
+++ b/drivers/include/nrfx_spis.h
@ -86,11 +86,6 @@ enum {
 */
 #define NRFX_SPIS_PIN_NOT_USED  0xFF
 /** @brief Default pull-up configuration of the SPI CS. */
 #define NRFX_SPIS_DEFAULT_CSN_PULLUP  NRF_GPIO_PIN_NOPULL
 /** @brief Default drive configuration of the SPI MISO. */
 #define NRFX_SPIS_DEFAULT_MISO_DRIVE  NRF_GPIO_PIN_S0S1
 /** @brief SPI slave driver event types. */
 typedef enum
 {
@ -107,19 +102,34 @@ typedef struct
    size_t               tx_amount; //!< Number of bytes transmitted in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
 } nrfx_spis_evt_t;
-/** @brief The default configuration of the SPI slave instance. */
+/**
-#define NRFX_SPIS_DEFAULT_CONFIG                           \
+ * @brief SPIS driver default configuration.
 *
 * This configuration sets up SPIS with the following options:
 * - mode: 0 (SCK active high, sample on leading edge of the clock signal)
 * - MSB shifted out first
 * - CSN pull-up disabled
 * - MISO pin drive set to standard '0' and standard '1'
 * - default character set to 0xFF
 * - over-read character set to 0xFE
 *
 * @param[in] _pin_sck  SCK pin.
 * @param[in] _pin_mosi MOSI pin.
 * @param[in] _pin_miso MISO pin.
 * @param[in] _pin_csn  CSN pin.
 */
 #define NRFX_SPIS_DEFAULT_CONFIG(_pin_sck, _pin_mosi, _pin_miso, _pin_csn)  \
 {                                                                           \
-    .miso_pin     = NRFX_SPIS_PIN_NOT_USED,                \
+    .miso_pin     = _pin_miso,                                              \
-    .mosi_pin     = NRFX_SPIS_PIN_NOT_USED,                \
+    .mosi_pin     = _pin_mosi,                                              \
-    .sck_pin      = NRFX_SPIS_PIN_NOT_USED,                \
+    .sck_pin      = _pin_sck,                                               \
-    .csn_pin      = NRFX_SPIS_PIN_NOT_USED,                \
+    .csn_pin      = _pin_csn,                                               \
    .mode         = NRF_SPIS_MODE_0,                                        \
    .bit_order    = NRF_SPIS_BIT_ORDER_MSB_FIRST,                           \
-    .csn_pullup   = NRFX_SPIS_DEFAULT_CSN_PULLUP,          \
+    .csn_pullup   = NRF_GPIO_PIN_NOPULL,                                    \
-    .miso_drive   = NRFX_SPIS_DEFAULT_MISO_DRIVE,          \
+    .miso_drive   = NRF_GPIO_PIN_S0S1,                                      \
-    .def          = NRFX_SPIS_DEFAULT_DEF,                 \
+    .def          = 0xFF,                                                   \
-    .orc          = NRFX_SPIS_DEFAULT_ORC,                 \
+    .orc          = 0xFE,                                                   \
    .irq_priority = NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY,                  \
 }
@ -179,7 +189,7 @@ typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_evt_t const * p_event,
 *                                  on CSN pin cannot be initialized. Possible
 *                                  only when using nRF52 Anomaly 109 workaround.
 */
-nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const  p_instance,
+nrfx_err_t nrfx_spis_init(nrfx_spis_t const *        p_instance,
                          nrfx_spis_config_t const * p_config,
                          nrfx_spis_event_handler_t  event_handler,
                          void *                     p_context);
@ -189,7 +199,7 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const  p_instance,
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_spis_uninit(nrfx_spis_t const * const p_instance);
+void nrfx_spis_uninit(nrfx_spis_t const * p_instance);
 /**
 * @brief Function for preparing the SPI slave instance for a single SPI transaction.
@ -224,7 +234,7 @@ void nrfx_spis_uninit(nrfx_spis_t const * const p_instance);
 * @retval NRFX_ERROR_INVALID_LENGTH Provided lengths exceed the EasyDMA limits for the peripheral.
 * @retval NRFX_ERROR_INTERNAL       The operation failed because of an internal error.
 */
-nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance,
+nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * p_instance,
                                 uint8_t const *     p_tx_buffer,
                                 size_t              tx_buffer_length,
                                 uint8_t *           p_rx_buffer,
--- a/drivers/include/nrfx_swi.h
+++ b/drivers/include/nrfx_swi.h
@ -1,236 +0,0 @@
 /*
 * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 #ifndef NRFX_SWI_H__
 #define NRFX_SWI_H__
 #include <nrfx.h>
 #if NRFX_CHECK(NRFX_EGU_ENABLED)
 #include <hal/nrf_egu.h>
 #endif
 #ifndef SWI_COUNT
 #define SWI_COUNT EGU_COUNT
 #endif
 #ifdef __cplusplus
 extern "C" {
 #endif
 /**
 * @defgroup nrfx_swi SWI driver
 * @{
 * @ingroup  nrf_swi_egu
 *
 * @brief    Driver for managing software interrupts (SWI).
 */
 /** @brief SWI instance. */
 typedef uint8_t nrfx_swi_t;
 /**
 * @brief SWI user flags.
 *
 * User flags are set during the SWI trigger and passed to the callback function as an argument.
 */
 typedef uint16_t nrfx_swi_flags_t;
 /** @brief Unallocated instance value. */
 #define NRFX_SWI_UNALLOCATED  ((nrfx_swi_t)0xFFuL)
 /** @brief Default SWI priority. */
 #define NRFX_SWI_DEFAULT_PRIORITY  APP_IRQ_PRIORITY_LOWEST
 /**
 * @brief SWI handler function.
 *
 * @param swi   SWI instance.
 * @param flags User flags.
 */
 typedef void (*nrfx_swi_handler_t)(nrfx_swi_t swi, nrfx_swi_flags_t flags);
 /**
 * @brief Function for allocating the first unused SWI instance and setting a handler.
 *
 * If provided handler is not NULL, an allocated SWI has its interrupt enabled by default.
 * The interrupt can be disabled by @ref nrfx_swi_int_disable.
 *
 * @param[out] p_swi         Points to a place where the allocated SWI instance
 *                           number is to be stored.
 * @param[in]  event_handler Event handler function.
 *                           If NULL, no interrupt will be enabled.
 *                           It can be NULL only if the EGU driver is enabled.
 *                           For classic SWI, it must be a valid handler pointer.
 * @param[in]  irq_priority  Interrupt priority.
 *
 * @retval NRFX_SUCCESS      The SWI was successfully allocated.
 * @retval NRFX_ERROR_NO_MEM There is no available SWI to be used.
 */
 nrfx_err_t nrfx_swi_alloc(nrfx_swi_t *       p_swi,
                          nrfx_swi_handler_t event_handler,
                          uint32_t           irq_priority);
 /**
 * @brief Function for disabling an allocated SWI interrupt.
 *
 * Use @ref nrfx_swi_int_enable to re-enable the interrupt.
 *
 * @param[in] swi SWI instance.
 */
 void nrfx_swi_int_disable(nrfx_swi_t swi);
 /**
 * @brief Function for enabling an allocated SWI interrupt.
 *
 * @param[in] swi SWI instance.
 */
 void nrfx_swi_int_enable(nrfx_swi_t swi);
 /**
 * @brief Function for freeing a previously allocated SWI.
 *
 * @param[in,out] p_swi SWI instance to free. The value is changed to
 *                      @ref NRFX_SWI_UNALLOCATED on success.
 */
 void nrfx_swi_free(nrfx_swi_t * p_swi);
 /** @brief Function for freeing all allocated SWIs. */
 void nrfx_swi_all_free(void);
 /**
 * @brief Function for triggering the SWI.
 *
 * @param[in] swi         SWI to trigger.
 * @param[in] flag_number Number of user flag to trigger.
 */
 void nrfx_swi_trigger(nrfx_swi_t swi,
                      uint8_t    flag_number);
 /**
 * @brief Function for checking if the specified SWI is currently allocated.
 *
 * @param[in] swi SWI instance.
 *
 * @retval true  The SWI instance is allocated.
 * @retval false The SWI instance is not allocated.
 */
 bool nrfx_swi_is_allocated(nrfx_swi_t swi);
 #if NRFX_CHECK(NRFX_EGU_ENABLED) || defined(__NRFX_DOXYGEN__)
 /**
 * @brief Function for returning the base address of the EGU peripheral
 *        associated with the specified SWI instance.
 *
 * @param[in] swi SWI instance.
 *
 * @return EGU base address or NULL if the specified SWI instance number
 *         is too high.
 */
 __STATIC_INLINE NRF_EGU_Type * nrfx_swi_egu_instance_get(nrfx_swi_t swi)
 {
 #if (EGU_COUNT < SWI_COUNT)
    if (swi >= EGU_COUNT)
    {
        return NULL;
    }
 #endif
    uint32_t offset = ((uint32_t)swi) * ((uint32_t)NRF_EGU1 - (uint32_t)NRF_EGU0);
    return (NRF_EGU_Type *)((uint32_t)NRF_EGU0 + offset);
 }
 /**
 * @brief Function for returning the EGU trigger task address.
 *
 * @param[in] swi     SWI instance.
 * @param[in] channel Number of the EGU channel.
 *
 * @return Address of the EGU trigger task.
 */
 __STATIC_INLINE uint32_t nrfx_swi_task_trigger_address_get(nrfx_swi_t swi,
                                                           uint8_t    channel)
 {
    NRFX_ASSERT(nrfx_swi_is_allocated(swi));
    NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi);
 #if (EGU_COUNT < SWI_COUNT)
    if (p_egu == NULL)
    {
        return 0;
    }
 #endif
    return (uint32_t)nrf_egu_task_trigger_address_get(p_egu, channel);
 }
 /**
 * @brief Function for returning the EGU-triggered event address.
 *
 * @param[in] swi     SWI instance.
 * @param[in] channel Number of the EGU channel.
 *
 * @return Address of the EGU-triggered event.
 */
 __STATIC_INLINE uint32_t nrfx_swi_event_triggered_address_get(nrfx_swi_t swi,
                                                              uint8_t    channel)
 {
    NRFX_ASSERT(nrfx_swi_is_allocated(swi));
    NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi);
 #if (EGU_COUNT < SWI_COUNT)
    if (p_egu == NULL)
    {
        return 0;
    }
 #endif
    return (uint32_t)nrf_egu_event_triggered_address_get(p_egu, channel);
 }
 #endif // NRFX_CHECK(NRFX_EGU_ENABLED) || defined(__NRFX_DOXYGEN__)
 /** @} */
 void nrfx_swi_0_irq_handler(void);
 void nrfx_swi_1_irq_handler(void);
 void nrfx_swi_2_irq_handler(void);
 void nrfx_swi_3_irq_handler(void);
 void nrfx_swi_4_irq_handler(void);
 void nrfx_swi_5_irq_handler(void);
 #ifdef __cplusplus
 }
 #endif
 #endif // NRFX_SWI_H__
--- a/drivers/include/nrfx_temp.h
+++ b/drivers/include/nrfx_temp.h
@ -94,7 +94,7 @@ void nrfx_temp_uninit(void);
 * @return Temperature measurement result in a 2's complement signed value
 *         representation.
 */
-__STATIC_INLINE int32_t nrfx_temp_result_get(void);
+NRFX_STATIC_INLINE int32_t nrfx_temp_result_get(void);
 /**
 * @brief Function for calculating the temperature value in Celsius scale from raw data.
@ -133,14 +133,12 @@ int32_t nrfx_temp_calculate(int32_t raw_measurement);
 */
 nrfx_err_t nrfx_temp_measure(void);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-
+NRFX_STATIC_INLINE int32_t nrfx_temp_result_get(void)
 __STATIC_INLINE int32_t nrfx_temp_result_get(void)
 {
    return nrf_temp_result_get(NRF_TEMP);
 }
-
+#endif // NRFX_DECLARE_ONLY
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 /** @} */
--- a/drivers/include/nrfx_timer.h
+++ b/drivers/include/nrfx_timer.h
@ -95,12 +95,19 @@ typedef struct
    void *                p_context;          ///< Context passed to interrupt handler.
 } nrfx_timer_config_t;
-/** @brief Timer driver instance default configuration. */
+/**
 * @brief TIMER driver default configuration.
 *
 * This configuration sets up TIMER with the following options:
 * - frequency: 16 MHz
 * - works as timer
 * - width: 16 bit
 */
 #define NRFX_TIMER_DEFAULT_CONFIG                                 \
 {                                                                 \
-    .frequency          = (nrf_timer_frequency_t)NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY,\
+    .frequency          = NRF_TIMER_FREQ_16MHz,                   \
-    .mode               = (nrf_timer_mode_t)NRFX_TIMER_DEFAULT_CONFIG_MODE,          \
+    .mode               = NRF_TIMER_MODE_TIMER,                   \
-    .bit_width          = (nrf_timer_bit_width_t)NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH,\
+    .bit_width          = NRF_TIMER_BIT_WIDTH_16,                 \
    .interrupt_priority = NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY, \
    .p_context          = NULL                                    \
 }
@ -128,7 +135,7 @@ typedef void (* nrfx_timer_event_handler_t)(nrf_timer_event_t event_type,
 * @retval NRFX_SUCCESS             Initialization was successful.
 * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
 */
-nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const  p_instance,
+nrfx_err_t nrfx_timer_init(nrfx_timer_t const *        p_instance,
                           nrfx_timer_config_t const * p_config,
                           nrfx_timer_event_handler_t  timer_event_handler);
@ -137,14 +144,14 @@ nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const  p_instance,
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_timer_uninit(nrfx_timer_t const * const p_instance);
+void nrfx_timer_uninit(nrfx_timer_t const * p_instance);
 /**
 * @brief Function for turning on the timer.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_timer_enable(nrfx_timer_t const * const p_instance);
+void nrfx_timer_enable(nrfx_timer_t const * p_instance);
 /**
 * @brief Function for turning off the timer.
@ -154,7 +161,7 @@ void nrfx_timer_enable(nrfx_timer_t const * const p_instance);
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_timer_disable(nrfx_timer_t const * const p_instance);
+void nrfx_timer_disable(nrfx_timer_t const * p_instance);
 /**
 * @brief Function for checking the timer state.
@ -164,35 +171,35 @@ void nrfx_timer_disable(nrfx_timer_t const * const p_instance);
 * @retval true  Timer is enabled.
 * @retval false Timer is not enabled.
 */
-bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance);
+bool nrfx_timer_is_enabled(nrfx_timer_t const * p_instance);
 /**
 * @brief Function for pausing the timer.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_timer_pause(nrfx_timer_t const * const p_instance);
+void nrfx_timer_pause(nrfx_timer_t const * p_instance);
 /**
 * @brief Function for resuming the timer.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_timer_resume(nrfx_timer_t const * const p_instance);
+void nrfx_timer_resume(nrfx_timer_t const * p_instance);
 /**
 * @brief Function for clearing the timer.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_timer_clear(nrfx_timer_t const * const p_instance);
+void nrfx_timer_clear(nrfx_timer_t const * p_instance);
 /**
 * @brief Function for incrementing the timer.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_timer_increment(nrfx_timer_t const * const p_instance);
+void nrfx_timer_increment(nrfx_timer_t const * p_instance);
 /**
 * @brief Function for returning the address of the specified timer task.
@ -202,7 +209,7 @@ void nrfx_timer_increment(nrfx_timer_t const * const p_instance);
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * p_instance,
                                                        nrf_timer_task_t     timer_task);
 /**
@ -213,7 +220,7 @@ __STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * const
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t const * p_instance,
                                                                uint32_t             channel);
 /**
@ -224,7 +231,7 @@ __STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t const
 *
 * @return Event address.
 */
-__STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * p_instance,
                                                         nrf_timer_event_t    timer_event);
 /**
@ -235,7 +242,7 @@ __STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * const
 *
 * @return Event address.
 */
-__STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t const * p_instance,
                                                                 uint32_t             channel);
 /**
@ -246,7 +253,7 @@ __STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t const
 *
 * @return Captured value.
 */
-uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance,
+uint32_t nrfx_timer_capture(nrfx_timer_t const *   p_instance,
                            nrf_timer_cc_channel_t cc_channel);
 /**
@ -259,7 +266,7 @@ uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance,
 *
 * @return Captured value.
 */
-__STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const *   p_instance,
                                                   nrf_timer_cc_channel_t cc_channel);
 /**
@ -270,7 +277,7 @@ __STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const * const p_ins
 * @param[in] cc_value   Compare value.
 * @param[in] enable_int Enable or disable the interrupt for the compare channel.
 */
-void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
+void nrfx_timer_compare(nrfx_timer_t const *   p_instance,
                        nrf_timer_cc_channel_t cc_channel,
                        uint32_t               cc_value,
                        bool                   enable_int);
@ -285,7 +292,7 @@ void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
 *                             and the timer task (STOP or CLEAR).
 * @param[in] enable_int       Enable or disable the interrupt for the compare channel.
 */
-void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
+void nrfx_timer_extended_compare(nrfx_timer_t const *   p_instance,
                                 nrf_timer_cc_channel_t cc_channel,
                                 uint32_t               cc_value,
                                 nrf_timer_short_mask_t timer_short_mask,
@ -299,7 +306,7 @@ void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
 *
 * @return Number of ticks.
 */
-__STATIC_INLINE uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * p_instance,
                                                   uint32_t             time_us);
 /**
@ -310,7 +317,7 @@ __STATIC_INLINE uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * const p_ins
 *
 * @return Number of ticks.
 */
-__STATIC_INLINE uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * p_instance,
                                                   uint32_t             time_ms);
 /**
@ -319,7 +326,7 @@ __STATIC_INLINE uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * const p_ins
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] channel    Compare channel.
 */
-void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,
+void nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance,
                                   uint32_t             channel);
 /**
@ -328,59 +335,54 @@ void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] channel    Compare channel.
 */
-void nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance,
+void nrfx_timer_compare_int_disable(nrfx_timer_t const * p_instance,
                                    uint32_t             channel);
-
+#ifndef NRFX_DECLARE_ONLY
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+NRFX_STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * p_instance,
 __STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * const p_instance,
                                                        nrf_timer_task_t     timer_task)
 {
-    return (uint32_t)nrf_timer_task_address_get(p_instance->p_reg, timer_task);
+    return nrf_timer_task_address_get(p_instance->p_reg, timer_task);
 }
-__STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t const * p_instance,
                                                                uint32_t             channel)
 {
    NRFX_ASSERT(channel < p_instance->cc_channel_count);
-    return (uint32_t)nrf_timer_task_address_get(p_instance->p_reg,
+    return nrf_timer_task_address_get(p_instance->p_reg, nrf_timer_capture_task_get(channel));
                         nrf_timer_capture_task_get(channel));
 }
-__STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * p_instance,
                                                         nrf_timer_event_t    timer_event)
 {
-    return (uint32_t)nrf_timer_event_address_get(p_instance->p_reg, timer_event);
+    return nrf_timer_event_address_get(p_instance->p_reg, timer_event);
 }
-__STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t const * p_instance,
                                                                 uint32_t             channel)
 {
    NRFX_ASSERT(channel < p_instance->cc_channel_count);
-    return (uint32_t)nrf_timer_event_address_get(p_instance->p_reg,
+    return nrf_timer_event_address_get(p_instance->p_reg, nrf_timer_compare_event_get(channel));
                         nrf_timer_compare_event_get(channel));
 }
-__STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const *   p_instance,
                                                   nrf_timer_cc_channel_t cc_channel)
 {
-    return nrf_timer_cc_read(p_instance->p_reg, cc_channel);
+    return nrf_timer_cc_get(p_instance->p_reg, cc_channel);
 }
-__STATIC_INLINE uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * p_instance,
                                                   uint32_t             timer_us)
 {
    return nrf_timer_us_to_ticks(timer_us, nrf_timer_frequency_get(p_instance->p_reg));
 }
-__STATIC_INLINE uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * const p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * p_instance,
                                                   uint32_t             timer_ms)
 {
    return nrf_timer_ms_to_ticks(timer_ms, nrf_timer_frequency_get(p_instance->p_reg));
 }
-
+#endif // NRFX_DECLARE_ONLY
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 /** @} */
--- a/drivers/include/nrfx_twi.h
+++ b/drivers/include/nrfx_twi.h
@ -33,6 +33,7 @@
 #define NRFX_TWI_H__
 #include <nrfx.h>
 #include <nrfx_twi_twim.h>
 #include <hal/nrf_twi.h>
 #ifdef __cplusplus
@ -84,27 +85,39 @@ typedef struct
    bool                hold_bus_uninit;    ///< Hold pull up state on GPIO pins after uninit.
 } nrfx_twi_config_t;
-/** @brief The default configuration of the TWI master driver instance. */
+/**
-#define NRFX_TWI_DEFAULT_CONFIG                                                   \
+ * @brief TWI master driver instance default configuration.
 *
 * This configuration sets up TWI with the following options:
 * - clock frequency: 100 kHz
 * - disable bus holding after uninit
 *
 * @param[in] _pin_scl SCL pin.
 * @param[in] _pin_sda SDA pin.
 */
 #define NRFX_TWI_DEFAULT_CONFIG(_pin_scl, _pin_sda)              \
 {                                                                \
-    .frequency          = (nrf_twi_frequency_t)NRFX_TWI_DEFAULT_CONFIG_FREQUENCY, \
+    .scl                = _pin_scl,                              \
-    .scl                = 31,                                                     \
+    .sda                = _pin_sda,                              \
-    .sda                = 31,                                                     \
+    .frequency          = NRF_TWI_FREQ_100K,                     \
    .interrupt_priority = NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY,  \
-    .hold_bus_uninit    = NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT,                \
+    .hold_bus_uninit    = false,                                 \
 }
 /** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
 #define NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
 /** @brief Flag indicating that the TX transfer will not end with a stop condition. */
 #define NRFX_TWI_FLAG_TX_NO_STOP          (1UL << 5)
 /** @brief Flag indicating that the transfer will be suspended. */
 #define NRFX_TWI_FLAG_SUSPEND             (1UL << 6)
 /** @brief TWI master driver event types. */
 typedef enum
 {
    NRFX_TWI_EVT_DONE,         ///< Transfer completed event.
    NRFX_TWI_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address.
-    NRFX_TWI_EVT_DATA_NACK     ///< Error event: NACK received after sending a data byte.
+    NRFX_TWI_EVT_DATA_NACK,    ///< Error event: NACK received after sending a data byte.
    NRFX_TWI_EVT_OVERRUN       ///< Error event: The unread data is replaced by new data.
 } nrfx_twi_evt_type_t;
 /** @brief TWI master driver transfer types. */
@ -132,10 +145,10 @@ typedef struct
 #define NRFX_TWI_XFER_DESC_TX(addr, p_data, length) \
 {                                                   \
    .type             = NRFX_TWI_XFER_TX,           \
-    .address = addr,                                \
+    .address          = (addr),                     \
-    .primary_length = length,                       \
+    .primary_length   = (length),                   \
    .secondary_length = 0,                          \
-    .p_primary_buf  = p_data,                       \
+    .p_primary_buf    = (p_data),                   \
    .p_secondary_buf  = NULL,                       \
 }
@ -143,10 +156,10 @@ typedef struct
 #define NRFX_TWI_XFER_DESC_RX(addr, p_data, length) \
 {                                                   \
    .type             = NRFX_TWI_XFER_RX,           \
-    .address = addr,                                \
+    .address          = (addr),                     \
-    .primary_length = length,                       \
+    .primary_length   = (length),                   \
    .secondary_length = 0,                          \
-    .p_primary_buf  = p_data,                       \
+    .p_primary_buf    = (p_data),                   \
    .p_secondary_buf  = NULL,                       \
 }
@ -154,22 +167,22 @@ typedef struct
 #define NRFX_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
 {                                                                 \
    .type             = NRFX_TWI_XFER_TXRX,                       \
-    .address = addr,                                              \
+    .address          = (addr),                                   \
-    .primary_length   = tx_len,                                   \
+    .primary_length   = (tx_len),                                 \
-    .secondary_length = rx_len,                                   \
+    .secondary_length = (rx_len),                                 \
-    .p_primary_buf    = p_tx,                                     \
+    .p_primary_buf    = (p_tx),                                   \
-    .p_secondary_buf  = p_rx,                                     \
+    .p_secondary_buf  = (p_rx),                                   \
 }
 /** @brief Macro for setting the TX-TX transfer descriptor. */
 #define NRFX_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \
 {                                                                   \
    .type             = NRFX_TWI_XFER_TXTX,                         \
-    .address = addr,                                                \
+    .address          = (addr),                                     \
-    .primary_length   = tx_len,                                     \
+    .primary_length   = (tx_len),                                   \
-    .secondary_length = tx_len2,                                    \
+    .secondary_length = (tx_len2),                                  \
-    .p_primary_buf    = p_tx,                                       \
+    .p_primary_buf    = (p_tx),                                     \
-    .p_secondary_buf  = p_tx2,                                      \
+    .p_secondary_buf  = (p_tx2),                                    \
 }
 /** @brief Structure for a TWI event. */
@ -225,58 +238,9 @@ void nrfx_twi_enable(nrfx_twi_t const * p_instance);
 void nrfx_twi_disable(nrfx_twi_t const * p_instance);
 /**
- * @brief Function for sending data to a TWI slave.
+ * @brief Function for performing a TWI transfer.
 *
- * The transmission will be stopped when an error occurs. If a transfer is ongoing,
+ * The following transfer types can be configured (@ref nrfx_twi_xfer_desc_t.type):
 * the function returns the error code @ref NRFX_ERROR_BUSY.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] address    Address of a specific slave device (only 7 LSB).
 * @param[in] p_data     Pointer to a transmit buffer.
 * @param[in] length     Number of bytes to send.
 * @param[in] no_stop    If set, the stop condition is not generated on the bus
 *                       after the transfer has completed successfully (allowing
 *                       for a repeated start in the next transfer).
 *
 * @retval NRFX_SUCCESS                 The procedure is successful.
 * @retval NRFX_ERROR_BUSY              The driver is not ready for a new transfer.
 * @retval NRFX_ERROR_INTERNAL          An error is detected by hardware.
 * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
 * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
 */
 nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance,
                       uint8_t            address,
                       uint8_t const *    p_data,
                       size_t             length,
                       bool               no_stop);
 /**
 * @brief Function for reading data from a TWI slave.
 *
 * The transmission will be stopped when an error occurs. If a transfer is ongoing,
 * the function returns the error code @ref NRFX_ERROR_BUSY.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] address    Address of a specific slave device (only 7 LSB).
 * @param[in] p_data     Pointer to a receive buffer.
 * @param[in] length     Number of bytes to be received.
 *
 * @retval NRFX_SUCCESS                   The procedure is successful.
 * @retval NRFX_ERROR_BUSY                The driver is not ready for a new transfer.
 * @retval NRFX_ERROR_INTERNAL            An error is detected by hardware.
 * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data.
 * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK   NACK is received after sending the address in polling mode.
 * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK   NACK is received after sending a data byte in polling mode.
 */
 nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
                       uint8_t            address,
                       uint8_t *          p_data,
                       size_t             length);
 /**
 * @brief Function for preparing a TWI transfer.
 *
 * The following transfer types can be configured (@ref nrfx_twi_xfer_desc_t::type):
 * - @ref NRFX_TWI_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between).
 * - @ref NRFX_TWI_XFER_TXTX - Write operation followed by a write operation (without STOP condition in between).
 * - @ref NRFX_TWI_XFER_TX - Write operation (with or without STOP condition).
@ -287,10 +251,12 @@ nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
 * Additional options are provided using the flags parameter:
 * - @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER - No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer.
 * - @ref NRFX_TWI_FLAG_TX_NO_STOP - No stop condition after TX transfer.
 * - @ref NRFX_TWI_FLAG_SUSPEND - Transfer will be suspended. This allows for combining multiple transfers into one transaction.
 *                                Only transactions with the same direction can be combined. To finish the transaction, call the function without this flag.
 *
 * @note
 * Some flag combinations are invalid:
- * - @ref NRFX_TWI_FLAG_TX_NO_STOP with @ref nrfx_twi_xfer_desc_t::type different than @ref NRFX_TWI_XFER_TX
+ * - @ref NRFX_TWI_FLAG_TX_NO_STOP with @ref nrfx_twi_xfer_desc_t.type different than @ref NRFX_TWI_XFER_TX
 *
 * @param[in] p_instance  Pointer to the driver instance structure.
 * @param[in] p_xfer_desc Pointer to the transfer descriptor.
@ -300,9 +266,12 @@ nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
 * @retval NRFX_ERROR_BUSY                The driver is not ready for a new transfer.
 * @retval NRFX_ERROR_NOT_SUPPORTED       The provided parameters are not supported.
 * @retval NRFX_ERROR_INTERNAL            An error is detected by hardware.
 * @retval NRFX_ERROR_INVALID_STATE       Other direction of transaction is suspended on the bus.
 * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data (TXRX and RX)
- * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK   NACK is received after sending the address.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK   Negative acknowledgement (NACK) is received after sending
- * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK   NACK is received after sending a data byte.
+ *                                        the address in polling mode.
 * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK   Negative acknowledgement (NACK) is received after sending
 *                                        a data byte in polling mode.
 */
 nrfx_err_t nrfx_twi_xfer(nrfx_twi_t           const * p_instance,
                         nrfx_twi_xfer_desc_t const * p_xfer_desc,
@ -325,7 +294,7 @@ bool nrfx_twi_is_busy(nrfx_twi_t const * p_instance);
 *
 * @return Data count.
 */
-size_t nrfx_twi_data_count_get(nrfx_twi_t const * const p_instance);
+size_t nrfx_twi_data_count_get(nrfx_twi_t const * p_instance);
 /**
 * @brief Function for returning the address of a STOPPED TWI event.
@ -339,6 +308,30 @@ size_t nrfx_twi_data_count_get(nrfx_twi_t const * const p_instance);
 */
 uint32_t nrfx_twi_stopped_event_get(nrfx_twi_t const * p_instance);
 /**
 * @brief Function for recovering the bus.
 *
 * This function checks if the bus is not stuck because of a slave holding the SDA line in the low state,
 * and if needed it performs required number of pulses on the SCL line to make the slave release the SDA line.
 * Finally, the function generates a STOP condition on the bus to put it into a known state.
 *
 * @note This function can be used only if the TWI driver is uninitialized.
 *
 * @param[in] scl_pin SCL pin number.
 * @param[in] sda_pin SDA pin number.
 *
 * @retval NRFX_SUCCESS        Bus recovery was successful.
 * @retval NRFX_ERROR_INTERNAL Bus recovery failed.
 */
 NRFX_STATIC_INLINE nrfx_err_t nrfx_twi_bus_recover(uint32_t scl_pin, uint32_t sda_pin);
 #ifndef NRFX_DECLARE_ONLY
 NRFX_STATIC_INLINE nrfx_err_t nrfx_twi_bus_recover(uint32_t scl_pin, uint32_t sda_pin)
 {
    return nrfx_twi_twim_bus_recover(scl_pin, sda_pin);
 }
 #endif
 /** @} */
--- a/drivers/include/nrfx_twi_twim.h
+++ b/drivers/include/nrfx_twi_twim.h
@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012 - 2019, Nordic Semiconductor ASA
+ * Copyright (c) 2019, Nordic Semiconductor ASA
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
@ -29,54 +29,19 @@
 * POSSIBILITY OF SUCH DAMAGE.
 */
 #ifndef NRFX_TWI_TWIM_H
 #define NRFX_TWI_TWIM_H
 #include <nrfx.h>
 #include "nrf_ecb.h"
 #include <string.h>
-static uint8_t  ecb_data[48];   ///< ECB data structure for RNG peripheral to access.
+#ifdef __cplusplus
-static uint8_t* ecb_key;        ///< Key:        Starts at ecb_data
+extern "C" {
-static uint8_t* ecb_cleartext;  ///< Cleartext:  Starts at ecb_data + 16 bytes.
+#endif
 static uint8_t* ecb_ciphertext; ///< Ciphertext: Starts at ecb_data + 32 bytes.
-bool nrf_ecb_init(void)
+nrfx_err_t nrfx_twi_twim_bus_recover(uint32_t scl_pin, uint32_t sda_pin);
 {
  ecb_key = ecb_data;
  ecb_cleartext  = ecb_data + 16;
  ecb_ciphertext = ecb_data + 32;
-  NRF_ECB->ECBDATAPTR = (uint32_t)ecb_data;
+#ifdef __cplusplus
  return true;
 }
 #endif
-
+#endif // NRFX_TWI_TWIM_H
 bool nrf_ecb_crypt(uint8_t * dest_buf, const uint8_t * src_buf)
 {
   uint32_t counter = 0x1000000;
   if (src_buf != ecb_cleartext)
   {
     memcpy(ecb_cleartext,src_buf,16);
   }
   NRF_ECB->EVENTS_ENDECB = 0;
   NRF_ECB->TASKS_STARTECB = 1;
   while (NRF_ECB->EVENTS_ENDECB == 0)
   {
    counter--;
    if (counter == 0)
    {
      return false;
    }
   }
   NRF_ECB->EVENTS_ENDECB = 0;
   if (dest_buf != ecb_ciphertext)
   {
     memcpy(dest_buf,ecb_ciphertext,16);
   }
   return true;
 }
 void nrf_ecb_set_key(const uint8_t * key)
 {
  memcpy(ecb_key,key,16);
 }
--- a/drivers/include/nrfx_twim.h
+++ b/drivers/include/nrfx_twim.h
@ -33,6 +33,7 @@
 #define NRFX_TWIM_H__
 #include <nrfx.h>
 #include <nrfx_twi_twim.h>
 #include <hal/nrf_twim.h>
 #ifdef __cplusplus
@ -88,14 +89,23 @@ typedef struct
    bool                 hold_bus_uninit;    ///< Hold pull up state on GPIO pins after uninit.
 } nrfx_twim_config_t;
-/** @brief TWI master driver instance default configuration. */
+/**
-#define NRFX_TWIM_DEFAULT_CONFIG                                                    \
+ * @brief TWIM driver default configuration.
 *
 * This configuration sets up TWIM with the following options:
 * - clock frequency: 100 kHz
 * - disable bus holding after uninit
 *
 * @param[in] _pin_scl SCL pin.
 * @param[in] _pin_sda SDA pin.
 */
 #define NRFX_TWIM_DEFAULT_CONFIG(_pin_scl, _pin_sda)              \
 {                                                                 \
-    .scl                = 31,                                                       \
+    .scl                = _pin_scl,                               \
-    .sda                = 31,                                                       \
+    .sda                = _pin_sda,                               \
-    .frequency          = (nrf_twim_frequency_t)NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY, \
+    .frequency          = NRF_TWIM_FREQ_100K,                     \
    .interrupt_priority = NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY,  \
-    .hold_bus_uninit    = NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT,                 \
+    .hold_bus_uninit    = false,                                  \
 }
 /** @brief Flag indicating that TX buffer address will be incremented after the transfer. */
@ -116,7 +126,9 @@ typedef enum
 {
    NRFX_TWIM_EVT_DONE,         ///< Transfer completed event.
    NRFX_TWIM_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address.
-    NRFX_TWIM_EVT_DATA_NACK     ///< Error event: NACK received after sending a data byte.
+    NRFX_TWIM_EVT_DATA_NACK,    ///< Error event: NACK received after sending a data byte.
    NRFX_TWIM_EVT_OVERRUN,      ///< Error event: The unread data is replaced by new data.
    NRFX_TWIM_EVT_BUS_ERROR     ///< Error event: An unexpected transition occurred on the bus.
 } nrfx_twim_evt_type_t;
 /** @brief TWI master driver transfer types. */
@ -144,10 +156,10 @@ typedef struct
 #define NRFX_TWIM_XFER_DESC_TX(addr, p_data, length) \
 {                                                    \
    .type             = NRFX_TWIM_XFER_TX,           \
-    .address          = addr,                        \
+    .address          = (addr),                      \
-    .primary_length   = length,                      \
+    .primary_length   = (length),                    \
    .secondary_length = 0,                           \
-    .p_primary_buf    = p_data,                      \
+    .p_primary_buf    = (p_data),                    \
    .p_secondary_buf  = NULL,                        \
 }
@ -155,10 +167,10 @@ typedef struct
 #define NRFX_TWIM_XFER_DESC_RX(addr, p_data, length) \
 {                                                    \
    .type             = NRFX_TWIM_XFER_RX,           \
-    .address          = addr,                        \
+    .address          = (addr),                      \
-    .primary_length   = length,                      \
+    .primary_length   = (length),                    \
    .secondary_length = 0,                           \
-    .p_primary_buf    = p_data,                      \
+    .p_primary_buf    = (p_data),                    \
    .p_secondary_buf  = NULL,                        \
 }
@ -166,22 +178,22 @@ typedef struct
 #define NRFX_TWIM_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
 {                                                                  \
    .type             = NRFX_TWIM_XFER_TXRX,                       \
-    .address          = addr,                                      \
+    .address          = (addr),                                    \
-    .primary_length   = tx_len,                                    \
+    .primary_length   = (tx_len),                                  \
-    .secondary_length = rx_len,                                    \
+    .secondary_length = (rx_len),                                  \
-    .p_primary_buf    = p_tx,                                      \
+    .p_primary_buf    = (p_tx),                                    \
-    .p_secondary_buf  = p_rx,                                      \
+    .p_secondary_buf  = (p_rx),                                    \
 }
 /** @brief Macro for setting the TX-TX transfer descriptor. */
 #define NRFX_TWIM_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \
 {                                                                    \
    .type             = NRFX_TWIM_XFER_TXTX,                         \
-    .address          = addr,                                        \
+    .address          = (addr),                                      \
-    .primary_length   = tx_len,                                      \
+    .primary_length   = (tx_len),                                    \
-    .secondary_length = tx_len2,                                     \
+    .secondary_length = (tx_len2),                                   \
-    .p_primary_buf    = p_tx,                                        \
+    .p_primary_buf    = (p_tx),                                      \
-    .p_secondary_buf  = p_tx2,                                       \
+    .p_secondary_buf  = (p_tx2),                                     \
 }
 /** @brief Structure for a TWI event. */
@ -237,68 +249,9 @@ void nrfx_twim_enable(nrfx_twim_t const * p_instance);
 void nrfx_twim_disable(nrfx_twim_t const * p_instance);
 /**
- * @brief Function for sending data to a TWI slave.
+ * @brief Function for performing a TWI transfer.
 *
- * The transmission will be stopped when an error occurs. If a transfer is ongoing,
+ * The following transfer types can be configured (@ref nrfx_twim_xfer_desc_t.type):
 * the function returns the error code @ref NRFX_ERROR_BUSY.
 *
 * @note Peripherals using EasyDMA (including TWIM) require the transfer buffers
 *       to be placed in the Data RAM region. If this condition is not met,
 *       this function fails with the error code NRFX_ERROR_INVALID_ADDR.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] address    Address of a specific slave device (only 7 LSB).
 * @param[in] p_data     Pointer to a transmit buffer.
 * @param[in] length     Number of bytes to send. Maximum possible length is
 *                       dependent on the used SoC (see the MAXCNT register
 *                       description in the Product Specification). The driver
 *                       checks it with assertion.
 * @param[in] no_stop    If set, the stop condition is not generated on the bus
 *                       after the transfer has completed successfully (allowing
 *                       for a repeated start in the next transfer).
 *
 * @retval NRFX_SUCCESS                 The procedure is successful.
 * @retval NRFX_ERROR_BUSY              The driver is not ready for a new transfer.
 * @retval NRFX_ERROR_INTERNAL          Error is detected by hardware.
 * @retval NRFX_ERROR_INVALID_ADDR      The provided buffer is not placed in the Data RAM region.
 * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
 * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
 */
 nrfx_err_t nrfx_twim_tx(nrfx_twim_t const * p_instance,
                        uint8_t             address,
                        uint8_t const *     p_data,
                        size_t              length,
                        bool                no_stop);
 /**
 * @brief Function for reading data from a TWI slave.
 *
 * The transmission will be stopped when an error occurs. If a transfer is ongoing,
 * the function returns the error code @ref NRFX_ERROR_BUSY.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] address    Address of a specific slave device (only 7 LSB).
 * @param[in] p_data     Pointer to a receive buffer.
 * @param[in] length     Number of bytes to be received. Maximum possible length
 *                       is dependent on the used SoC (see the MAXCNT register
 *                       description in the Product Specification). The driver
 *                       checks it with assertion.
 *
 * @retval NRFX_SUCCESS                 The procedure is successful.
 * @retval NRFX_ERROR_BUSY              The driver is not ready for a new transfer.
 * @retval NRFX_ERROR_INTERNAL          Error is detected by hardware.
 * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
 * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
 */
 nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance,
                        uint8_t             address,
                        uint8_t *           p_data,
                        size_t              length);
 /**
 * @brief Function for preparing a TWI transfer.
 *
 * The following transfer types can be configured (@ref nrfx_twim_xfer_desc_t::type):
 * - @ref NRFX_TWIM_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between).
 * - @ref NRFX_TWIM_XFER_TXTX - Write operation followed by a write operation (without STOP condition in between).
 * - @ref NRFX_TWIM_XFER_TX - Write operation (with or without STOP condition).
@ -322,10 +275,10 @@ nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance,
 *
 * @note
 * Some flag combinations are invalid:
- * - @ref NRFX_TWIM_FLAG_TX_NO_STOP with @ref nrfx_twim_xfer_desc_t::type different than @ref NRFX_TWIM_XFER_TX
+ * - @ref NRFX_TWIM_FLAG_TX_NO_STOP with @ref nrfx_twim_xfer_desc_t.type different than @ref NRFX_TWIM_XFER_TX
- * - @ref NRFX_TWIM_FLAG_REPEATED_XFER with @ref nrfx_twim_xfer_desc_t::type set to @ref NRFX_TWIM_XFER_TXTX
+ * - @ref NRFX_TWIM_FLAG_REPEATED_XFER with @ref nrfx_twim_xfer_desc_t.type set to @ref NRFX_TWIM_XFER_TXTX
 *
- * If @ref nrfx_twim_xfer_desc_t::type is set to @ref NRFX_TWIM_XFER_TX and the @ref NRFX_TWIM_FLAG_TX_NO_STOP and @ref NRFX_TWIM_FLAG_REPEATED_XFER
+ * If @ref nrfx_twim_xfer_desc_t.type is set to @ref NRFX_TWIM_XFER_TX and the @ref NRFX_TWIM_FLAG_TX_NO_STOP and @ref NRFX_TWIM_FLAG_REPEATED_XFER
 * flags are set, two tasks must be used to trigger a transfer: TASKS_RESUME followed by TASKS_STARTTX. If no stop condition is generated,
 * TWIM is in SUSPENDED state. Therefore, it must be resumed before the transfer can be started.
 *
@ -340,8 +293,9 @@ nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance,
 * @retval NRFX_SUCCESS                   The procedure is successful.
 * @retval NRFX_ERROR_BUSY                The driver is not ready for a new transfer.
 * @retval NRFX_ERROR_NOT_SUPPORTED       The provided parameters are not supported.
- * @retval NRFX_ERROR_INTERNAL          Error is detected by hardware.
+ * @retval NRFX_ERROR_INTERNAL            An unexpected transition occurred on the bus.
 * @retval NRFX_ERROR_INVALID_ADDR        The provided buffers are not placed in the Data RAM region.
 * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data.
 * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK   NACK is received after sending the address.
 * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK   NACK is received after sending a data byte.
 */
@ -385,6 +339,30 @@ uint32_t nrfx_twim_start_task_get(nrfx_twim_t const * p_instance, nrfx_twim_xfer
 */
 uint32_t nrfx_twim_stopped_event_get(nrfx_twim_t const * p_instance);
 /**
 * @brief Function for recovering the bus.
 *
 * This function checks if the bus is not stuck because of a slave holding the SDA line in the low state,
 * and if needed it performs required number of pulses on the SCL line to make the slave release the SDA line.
 * Finally, the function generates a STOP condition on the bus to put it into a known state.
 *
 * @note This function can be used only if the TWIM driver is uninitialized.
 *
 * @param[in] scl_pin SCL pin number.
 * @param[in] sda_pin SDA pin number.
 *
 * @retval NRFX_SUCCESS        Bus recovery was successful.
 * @retval NRFX_ERROR_INTERNAL Bus recovery failed.
 */
 NRFX_STATIC_INLINE nrfx_err_t nrfx_twim_bus_recover(uint32_t scl_pin, uint32_t sda_pin);
 #ifndef NRFX_DECLARE_ONLY
 NRFX_STATIC_INLINE nrfx_err_t nrfx_twim_bus_recover(uint32_t scl_pin, uint32_t sda_pin)
 {
    return nrfx_twi_twim_bus_recover(scl_pin, sda_pin);
 }
 #endif
 /** @} */
 void nrfx_twim_0_irq_handler(void);
--- a/drivers/include/nrfx_twis.h
+++ b/drivers/include/nrfx_twis.h
@ -145,15 +145,25 @@ typedef struct
    uint8_t             interrupt_priority; //!< The priority of interrupt for the module to be set.
 } nrfx_twis_config_t;
-/** @brief Generate the default configuration for the TWIS driver instance. */
+/**
-#define NRFX_TWIS_DEFAULT_CONFIG                                                  \
+ * @brief TWIS driver default configuration.
 *
 * This configuration sets up TWIS with the following options:
 * - second slave address disabled
 * - SCL pull-up disabled
 * - SDA pull-up disabled
 *
 * @param[in] _pin_scl SCL pin.
 * @param[in] _pin_sda SDA pin.
 * @param[in] _addr    Slave address on TWI bus.
 */
 #define NRFX_TWIS_DEFAULT_CONFIG(_pin_scl, _pin_sda, _addr)      \
 {                                                                \
-    .addr               = { NRFX_TWIS_DEFAULT_CONFIG_ADDR0,                       \
+    .addr               = { _addr, 0x00 },                       \
-                            NRFX_TWIS_DEFAULT_CONFIG_ADDR1 },                     \
+    .scl                = _pin_scl,                              \
-    .scl                = 31,                                                     \
+    .scl_pull           = NRF_GPIO_PIN_NOPULL,                   \
-    .sda                = 31,                                                     \
+    .sda                = _pin_sda,                              \
-    .scl_pull           = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL, \
+    .sda_pull           = NRF_GPIO_PIN_NOPULL,                   \
    .sda_pull           = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL, \
    .interrupt_priority = NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }
@ -267,7 +277,7 @@ nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance,
 *
 * @return Number of bytes sent.
 */
-__STATIC_INLINE size_t nrfx_twis_tx_amount(nrfx_twis_t const * p_instance);
+NRFX_STATIC_INLINE size_t nrfx_twis_tx_amount(nrfx_twis_t const * p_instance);
 /**
 * @brief Function for preparing the data for receiving.
@ -301,7 +311,7 @@ nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance,
 *
 * @return Number of bytes received.
 */
-__STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance);
+NRFX_STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance);
 /**
 * @brief Function for checking if the driver is busy right now.
@ -366,17 +376,17 @@ bool nrfx_twis_is_pending_tx(nrfx_twis_t const * p_instance);
 */
 bool nrfx_twis_is_pending_rx(nrfx_twis_t const * p_instance);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-__STATIC_INLINE size_t nrfx_twis_tx_amount(nrfx_twis_t const * p_instance)
+NRFX_STATIC_INLINE size_t nrfx_twis_tx_amount(nrfx_twis_t const * p_instance)
 {
    return nrf_twis_tx_amount_get(p_instance->p_reg);
 }
-__STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance)
+NRFX_STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance)
 {
    return nrf_twis_rx_amount_get(p_instance->p_reg);
 }
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
+#endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_uart.h
+++ b/drivers/include/nrfx_uart.h
@ -85,24 +85,54 @@ typedef struct
    uint32_t            pselcts;            ///< CTS pin number.
    uint32_t            pselrts;            ///< RTS pin number.
    void *              p_context;          ///< Context passed to interrupt handler.
    nrf_uart_hwfc_t     hwfc;               ///< Flow control configuration.
    nrf_uart_parity_t   parity;             ///< Parity configuration.
    nrf_uart_baudrate_t baudrate;           ///< Baud rate.
    uint8_t             interrupt_priority; ///< Interrupt priority.
    nrf_uart_config_t   hal_cfg;            ///< Parity, flow control and stop bits settings.
 } nrfx_uart_config_t;
-/** @brief UART default configuration. */
+#if defined(UART_CONFIG_STOP_Msk) || defined(__NRFX_DOXYGEN__)
-#define NRFX_UART_DEFAULT_CONFIG                                                  \
+    /** @brief UART additional stop bits configuration. */
    #define NRFX_UART_DEFAULT_EXTENDED_STOP_CONFIG   \
        .stop = NRF_UART_STOP_ONE,
 #else
    #define NRFX_UART_DEFAULT_EXTENDED_STOP_CONFIG
 #endif
 #if defined(UART_CONFIG_PARITYTYPE_Msk) || defined(__NRFX_DOXYGEN__)
    /**  @brief UART additional parity type configuration. */
    #define NRFX_UART_DEFAULT_EXTENDED_PARITYTYPE_CONFIG   \
        .paritytype = NRF_UART_PARITYTYPE_EVEN,
 #else
    #define NRFX_UART_DEFAULT_EXTENDED_PARITYTYPE_CONFIG
 #endif
 /**
 * @brief UART driver default configuration.
 *
 * This configuration sets up UART with the following options:
 * - hardware flow control disabled
 * - no parity bit
 * - one stop bit
 * - baudrate: 115200
 *
 * @param[in] _pin_tx TX pin.
 * @param[in] _pin_rx RX pin.
 */
 #define NRFX_UART_DEFAULT_CONFIG(_pin_tx, _pin_rx)                                \
 {                                                                                 \
-    .pseltxd            = NRF_UART_PSEL_DISCONNECTED,                             \
+    .pseltxd            = _pin_tx,                                                \
-    .pselrxd            = NRF_UART_PSEL_DISCONNECTED,                             \
+    .pselrxd            = _pin_rx,                                                \
    .pselcts            = NRF_UART_PSEL_DISCONNECTED,                             \
    .pselrts            = NRF_UART_PSEL_DISCONNECTED,                             \
    .p_context          = NULL,                                                   \
-    .hwfc               = (nrf_uart_hwfc_t)NRFX_UART_DEFAULT_CONFIG_HWFC,         \
+    .baudrate           = NRF_UART_BAUDRATE_115200,                               \
    .parity             = (nrf_uart_parity_t)NRFX_UART_DEFAULT_CONFIG_PARITY,     \
    .baudrate           = (nrf_uart_baudrate_t)NRFX_UART_DEFAULT_CONFIG_BAUDRATE, \
    .interrupt_priority = NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY,                  \
    .hal_cfg            = {                                                       \
        .hwfc           = NRF_UART_HWFC_DISABLED,                                 \
        .parity         = NRF_UART_PARITY_EXCLUDED,                               \
        NRFX_UART_DEFAULT_EXTENDED_STOP_CONFIG                                    \
        NRFX_UART_DEFAULT_EXTENDED_PARITYTYPE_CONFIG                              \
    }                                                                             \
 }
 /** @brief Structure for the UART transfer completion event. */
@ -176,7 +206,7 @@ void nrfx_uart_uninit(nrfx_uart_t const * p_instance);
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instance,
                                                       nrf_uart_task_t     task);
 /**
@ -187,7 +217,7 @@ __STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instan
 *
 * @return Event address.
 */
-__STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_instance,
                                                        nrf_uart_event_t    event);
 /**
@ -324,19 +354,19 @@ void nrfx_uart_rx_abort(nrfx_uart_t const * p_instance);
 uint32_t nrfx_uart_errorsrc_get(nrfx_uart_t const * p_instance);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-__STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instance,
                                                       nrf_uart_task_t     task)
 {
    return nrf_uart_task_address_get(p_instance->p_reg, task);
 }
-__STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_instance,
                                                        nrf_uart_event_t    event)
 {
    return nrf_uart_event_address_get(p_instance->p_reg, event);
 }
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
+#endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_uarte.h
+++ b/drivers/include/nrfx_uarte.h
@ -94,24 +94,54 @@ typedef struct
    uint32_t             pselcts;            ///< CTS pin number.
    uint32_t             pselrts;            ///< RTS pin number.
    void *               p_context;          ///< Context passed to interrupt handler.
    nrf_uarte_hwfc_t     hwfc;               ///< Flow control configuration.
    nrf_uarte_parity_t   parity;             ///< Parity configuration.
    nrf_uarte_baudrate_t baudrate;           ///< Baud rate.
    uint8_t              interrupt_priority; ///< Interrupt priority.
    nrf_uarte_config_t   hal_cfg;            ///< Parity, flow control and stop bits settings.
 } nrfx_uarte_config_t;
-/** @brief UARTE default configuration. */
+#if defined(UARTE_CONFIG_STOP_Msk) || defined(__NRFX_DOXYGEN__)
-#define NRFX_UARTE_DEFAULT_CONFIG                                                   \
+    /** @brief UARTE additional stop bits configuration. */
    #define NRFX_UARTE_DEFAULT_EXTENDED_STOP_CONFIG   \
        .stop = (nrf_uarte_stop_t)NRF_UARTE_STOP_ONE,
 #else
    #define NRFX_UARTE_DEFAULT_EXTENDED_STOP_CONFIG
 #endif
 #if defined(UARTE_CONFIG_PARITYTYPE_Msk) || defined(__NRFX_DOXYGEN__)
    /** @brief UARTE additional parity type configuration. */
    #define NRFX_UARTE_DEFAULT_EXTENDED_PARITYTYPE_CONFIG   \
        .paritytype = NRF_UARTE_PARITYTYPE_EVEN,
 #else
    #define NRFX_UARTE_DEFAULT_EXTENDED_PARITYTYPE_CONFIG
 #endif
 /**
 * @brief UARTE driver default configuration.
 *
 * This configuration sets up UARTE with the following options:
 * - hardware flow control disabled
 * - no parity bit
 * - one stop bit
 * - baudrate: 115200
 *
 * @param[in] _pin_tx TX pin.
 * @param[in] _pin_rx RX pin.
 */
 #define NRFX_UARTE_DEFAULT_CONFIG(_pin_tx, _pin_rx)                                 \
 {                                                                                   \
-    .pseltxd            = NRF_UARTE_PSEL_DISCONNECTED,                              \
+    .pseltxd            = _pin_tx,                                                  \
-    .pselrxd            = NRF_UARTE_PSEL_DISCONNECTED,                              \
+    .pselrxd            = _pin_rx,                                                  \
    .pselcts            = NRF_UARTE_PSEL_DISCONNECTED,                              \
    .pselrts            = NRF_UARTE_PSEL_DISCONNECTED,                              \
    .p_context          = NULL,                                                     \
-    .hwfc               = (nrf_uarte_hwfc_t)NRFX_UARTE_DEFAULT_CONFIG_HWFC,         \
+    .baudrate           = NRF_UARTE_BAUDRATE_115200,                                \
    .parity             = (nrf_uarte_parity_t)NRFX_UARTE_DEFAULT_CONFIG_PARITY,     \
    .baudrate           = (nrf_uarte_baudrate_t)NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE, \
    .interrupt_priority = NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY,                   \
    .hal_cfg            = {                                                         \
        .hwfc           = NRF_UARTE_HWFC_DISABLED,                                  \
        .parity         = NRF_UARTE_PARITY_EXCLUDED,                                \
        NRFX_UARTE_DEFAULT_EXTENDED_STOP_CONFIG                                     \
        NRFX_UARTE_DEFAULT_EXTENDED_PARITYTYPE_CONFIG                               \
    }                                                                               \
 }
 /** @brief Structure for the UARTE transfer completion event. */
@ -185,7 +215,7 @@ void nrfx_uarte_uninit(nrfx_uarte_t const * p_instance);
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance,
                                                        nrf_uarte_task_t     task);
 /**
@ -196,7 +226,7 @@ __STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_inst
 *
 * @return Event address.
 */
-__STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_instance,
                                                         nrf_uarte_event_t    event);
 /**
@ -320,19 +350,19 @@ void nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance);
 uint32_t nrfx_uarte_errorsrc_get(nrfx_uarte_t const * p_instance);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRFX_DECLARE_ONLY
-__STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance,
                                                        nrf_uarte_task_t     task)
 {
    return nrf_uarte_task_address_get(p_instance->p_reg, task);
 }
-__STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_instance,
+NRFX_STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_instance,
                                                         nrf_uarte_event_t    event)
 {
    return nrf_uarte_event_address_get(p_instance->p_reg, event);
 }
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
+#endif // NRFX_DECLARE_ONLY
 /** @} */
--- a/drivers/include/nrfx_usbd.h
+++ b/drivers/include/nrfx_usbd.h
@ -187,11 +187,11 @@ typedef struct
        } sof;                            /**< Data available for @ref NRFX_USBD_EVT_SOF. */
        struct {
            nrfx_usbd_ep_t        ep;     /**< Endpoint number. */
-        } isocrc;
+        } isocrc;                         /**< Isochronouns channel endpoint number. */
        struct {
            nrfx_usbd_ep_t        ep;     /**< Endpoint number. */
            nrfx_usbd_ep_status_t status; /**< Status for the endpoint. */
-        } eptransfer;
+        } eptransfer;                     /**< Endpoint transfer status. */
    } data;                               /**< Union to store event data. */
 } nrfx_usbd_evt_t;
--- a/drivers/include/nrfx_wdt.h
+++ b/drivers/include/nrfx_wdt.h
@ -39,6 +39,10 @@
 extern "C" {
 #endif
 #ifndef NRF_WDT0
 #define NRF_WDT0 NRF_WDT
 #endif
 /**
 * @defgroup nrfx_wdt WDT driver
 * @{
@ -48,11 +52,43 @@ extern "C" {
 #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) || defined(__NRFX_DOXYGEN__)
 /** @brief WDT instance interrupt priority configuration. */
-    #define NRFX_WDT_IRQ_CONFIG .interrupt_priority = NRFX_WDT_CONFIG_IRQ_PRIORITY
+    #define NRFX_WDT_IRQ_CONFIG .interrupt_priority = NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY
 #else
    #define NRFX_WDT_IRQ_CONFIG
 #endif
 /** @brief WDT event handler function type. */
 typedef void (*nrfx_wdt_event_handler_t)(void);
 /** @brief WDT channel ID type. */
 typedef nrf_wdt_rr_register_t nrfx_wdt_channel_id;
 /** @brief Data structure of the Watchdog (WDT) driver instance. */
 typedef struct
 {
    NRF_WDT_Type * p_reg;        ///< Pointer to a structure with WDT registers.
    uint8_t        drv_inst_idx; ///< Index of the driver instance. For internal use only.
 } nrfx_wdt_t;
 #ifndef __NRFX_DOXYGEN__
 enum {
 #if NRFX_CHECK(NRFX_WDT0_ENABLED)
    NRFX_WDT0_INST_IDX,
 #endif
 #if NRFX_CHECK(NRFX_WDT1_ENABLED)
    NRFX_WDT1_INST_IDX,
 #endif
    NRFX_WDT_ENABLED_COUNT
 };
 #endif
 /** @brief Macro for creating an instance of the WDT driver. */
 #define NRFX_WDT_INSTANCE(id)                               \
 {                                                           \
    .p_reg        = NRF_WDT##id,                            \
    .drv_inst_idx = NRFX_CONCAT_3(NRFX_WDT, id, _INST_IDX), \
 }
 /**@brief Struct for WDT initialization. */
 typedef struct
 {
@ -63,92 +99,119 @@ typedef struct
 #endif
 } nrfx_wdt_config_t;
-/** @brief WDT event handler function type. */
+/**
-typedef void (*nrfx_wdt_event_handler_t)(void);
+ * @brief WDT driver default configuration.
-
+ *
-/** @brief WDT channel ID type. */
+ * This configuration sets up WDT with the following options:
-typedef nrf_wdt_rr_register_t nrfx_wdt_channel_id;
+ * - run when CPU is in SLEEP mode, pause when in HALT mode
-
+ * - reload value: 2000 ms
-/** @brief WDT driver default configuration. */
+ */
-#define NRFX_WDT_DEAFULT_CONFIG                                               \
+#define NRFX_WDT_DEFAULT_CONFIG                          \
 {                                                        \
-        .behaviour          = (nrf_wdt_behaviour_t)NRFX_WDT_CONFIG_BEHAVIOUR, \
+    .behaviour          = NRF_WDT_BEHAVIOUR_RUN_SLEEP,   \
-        .reload_value       = NRFX_WDT_CONFIG_RELOAD_VALUE,                   \
+    .reload_value       = 2000,                          \
    NRFX_WDT_IRQ_CONFIG                                  \
 }
 /**
- * @brief This function initializes the watchdog.
+ * @brief Function for initializing the WDT driver instance.
 *
 * @param[in] p_instance        Pointer to the driver instance structure.
 * @param[in] p_config          Pointer to the structure with the initial configuration.
 * @param[in] wdt_event_handler Event handler provided by the user. Ignored when
 *                              @ref NRFX_WDT_CONFIG_NO_IRQ option is enabled.
 *
- * @return NRFX_SUCCESS on success, otherwise an error code.
+ * @retval NRFX_SUCCESS             Initialization was successful.
 * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
 */
-nrfx_err_t nrfx_wdt_init(nrfx_wdt_config_t const * p_config,
+nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const *        p_instance,
                         nrfx_wdt_config_t const * p_config,
                         nrfx_wdt_event_handler_t  wdt_event_handler);
 /**
 * @brief Function for allocating a watchdog channel.
 *
- * @note This function can not be called after nrfx_wdt_start(void).
+ * @note This function can not be called after nrfx_wdt_start().
 *
 * @param[in]  p_instance   Pointer to the driver instance structure.
 * @param[out] p_channel_id ID of granted channel.
 *
- * @return NRFX_SUCCESS on success, otherwise an error code.
+ * @retval NRFX_SUCCESS      The channel was successfully allocated.
 * @retval NRFX_ERROR_NO_MEM There is no available channel to be used.
 */
-nrfx_err_t nrfx_wdt_channel_alloc(nrfx_wdt_channel_id * p_channel_id);
+nrfx_err_t nrfx_wdt_channel_alloc(nrfx_wdt_t const *    p_instance,
                                  nrfx_wdt_channel_id * p_channel_id);
 /**
 * @brief Function for starting the watchdog.
 *
- * @note After calling this function the watchdog is started, so the user needs to feed all allocated
+ * @note After calling this function the watchdog is started, so the user needs to feed
- *       watchdog channels to avoid reset. At least one watchdog channel must be allocated.
+ *       all allocated watchdog channels to avoid reset. At least one watchdog channel
 *       must be allocated.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_wdt_enable(void);
+void nrfx_wdt_enable(nrfx_wdt_t const * p_instance);
 /**
 * @brief Function for feeding the watchdog.
 *
 * @details Function feeds all allocated watchdog channels.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 */
-void nrfx_wdt_feed(void);
+void nrfx_wdt_feed(nrfx_wdt_t const * p_instance);
 /**
 * @brief Function for feeding an invidual watchdog channel.
 *
 * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] channel_id ID of watchdog channel.
 */
-void nrfx_wdt_channel_feed(nrfx_wdt_channel_id channel_id);
+void nrfx_wdt_channel_feed(nrfx_wdt_t const * p_instance, nrfx_wdt_channel_id channel_id);
 /**
 * @brief Function for returning a requested task address for the WDT driver module.
 *
- * @param[in] task One of the peripheral tasks.
+ * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] task       One of the WDT tasks.
 *
 * @return Task address.
 */
-__STATIC_INLINE uint32_t nrfx_wdt_ppi_task_addr(nrf_wdt_task_t task)
+NRFX_STATIC_INLINE uint32_t nrfx_wdt_task_address_get(nrfx_wdt_t const * p_instance,
-{
+                                                      nrf_wdt_task_t     task);
    return nrf_wdt_task_address_get(task);
 }
 /**
- * @brief Function for returning a requested event address for the wdt driver module.
+ * @brief Function for returning a requested event address for the WDT driver module.
 *
- * @param[in] event One of the peripheral events.
+ * @param[in] p_instance Pointer to the driver instance structure.
 * @param[in] event      One of the WDT events.
 *
 * @return Event address.
 */
-__STATIC_INLINE uint32_t nrfx_wdt_ppi_event_addr(nrf_wdt_event_t event)
+NRFX_STATIC_INLINE uint32_t nrfx_wdt_event_address_get(nrfx_wdt_t const * p_instance,
                                                       nrf_wdt_event_t    event);
 #ifndef NRFX_DECLARE_ONLY
 NRFX_STATIC_INLINE uint32_t nrfx_wdt_task_address_get(nrfx_wdt_t const * p_instance,
                                                      nrf_wdt_task_t     task)
 {
-    return nrf_wdt_event_address_get(event);
+    return nrf_wdt_task_address_get(p_instance->p_reg, task);
 }
 NRFX_STATIC_INLINE uint32_t nrfx_wdt_event_address_get(nrfx_wdt_t const * p_instance,
                                                       nrf_wdt_event_t    event)
 {
    return nrf_wdt_event_address_get(p_instance->p_reg, event);
 }
 #endif // NRFX_DECLARE_ONLY
 /** @} */
-void nrfx_wdt_irq_handler(void);
+void nrfx_wdt_0_irq_handler(void);
 void nrfx_wdt_1_irq_handler(void);
 #ifdef __cplusplus
@ -156,4 +219,3 @@ void nrfx_wdt_irq_handler(void);
 #endif
 #endif
--- a/drivers/nrfx_common.h
+++ b/drivers/nrfx_common.h
@ -43,6 +43,22 @@
 extern "C" {
 #endif
 #ifndef NRFX_STATIC_INLINE
 #ifdef NRFX_DECLARE_ONLY
 #define NRFX_STATIC_INLINE
 #else
 #define NRFX_STATIC_INLINE __STATIC_INLINE
 #endif
 #endif // NRFX_STATIC_INLINE
 #ifndef NRF_STATIC_INLINE
 #ifdef NRF_DECLARE_ONLY
 #define NRF_STATIC_INLINE
 #else
 #define NRF_STATIC_INLINE __STATIC_INLINE
 #endif
 #endif // NRF_STATIC_INLINE
 /**
 * @defgroup nrfx_common Common module
 * @{
@ -136,6 +152,17 @@ extern "C" {
 */
 #define NRFX_ARRAY_SIZE(array) (sizeof(array) / sizeof((array)[0]))
 /**
 * @brief Macro for getting the offset (in bytes) from the beginning of a structure
 *        of the specified type to its specified member.
 *
 * @param[in] type   Structure type.
 * @param[in] member Structure member whose offset is searched for.
 *
 * @return Member offset in bytes.
 */
 #define NRFX_OFFSETOF(type, member)  ((size_t)&(((type *)0)->member))
 /**@brief Macro for checking if given lengths of EasyDMA transfers do not exceed
 *        the limit of the specified peripheral.
 *
@ -224,7 +251,7 @@ typedef enum
 * @retval true  The pointed object is located in the Data RAM region.
 * @retval false The pointed object is not located in the Data RAM region.
 */
-__STATIC_INLINE bool nrfx_is_in_ram(void const * p_object);
+NRF_STATIC_INLINE bool nrfx_is_in_ram(void const * p_object);
 /**
 * @brief Function for checking if an object is aligned to a 32-bit word
@ -238,7 +265,7 @@ __STATIC_INLINE bool nrfx_is_in_ram(void const * p_object);
 * @retval true  The pointed object is aligned to a 32-bit word.
 * @retval false The pointed object is not aligned to a 32-bit word.
 */
-__STATIC_INLINE bool nrfx_is_word_aligned(void const * p_object);
+NRF_STATIC_INLINE bool nrfx_is_word_aligned(void const * p_object);
 /**
 * @brief Function for getting the interrupt number for the specified peripheral.
@ -247,7 +274,7 @@ __STATIC_INLINE bool nrfx_is_word_aligned(void const * p_object);
 *
 * @return Interrupt number associated with the pointed peripheral.
 */
-__STATIC_INLINE IRQn_Type nrfx_get_irq_number(void const * p_reg);
+NRF_STATIC_INLINE IRQn_Type nrfx_get_irq_number(void const * p_reg);
 /**
 * @brief Function for converting an INTEN register bit position to the
@ -263,7 +290,7 @@ __STATIC_INLINE IRQn_Type nrfx_get_irq_number(void const * p_reg);
 *
 * @sa nrfx_event_to_bitpos
 */
-__STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit);
+NRF_STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit);
 /**
 * @brief Function for converting an event identifier to the corresponding
@ -279,39 +306,39 @@ __STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit);
 *
 * @sa nrfx_bitpos_to_event
 */
-__STATIC_INLINE uint32_t nrfx_event_to_bitpos(uint32_t event);
+NRF_STATIC_INLINE uint32_t nrfx_event_to_bitpos(uint32_t event);
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+#ifndef NRF_DECLARE_ONLY
-__STATIC_INLINE bool nrfx_is_in_ram(void const * p_object)
+NRF_STATIC_INLINE bool nrfx_is_in_ram(void const * p_object)
 {
    return ((((uint32_t)p_object) & 0xE0000000u) == 0x20000000u);
 }
-__STATIC_INLINE bool nrfx_is_word_aligned(void const * p_object)
+NRF_STATIC_INLINE bool nrfx_is_word_aligned(void const * p_object)
 {
    return ((((uint32_t)p_object) & 0x3u) == 0u);
 }
-__STATIC_INLINE IRQn_Type nrfx_get_irq_number(void const * p_reg)
+NRF_STATIC_INLINE IRQn_Type nrfx_get_irq_number(void const * p_reg)
 {
    return (IRQn_Type)NRFX_IRQ_NUMBER_GET(p_reg);
 }
-__STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit)
+NRF_STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit)
 {
    static const uint32_t event_reg_offset = 0x100u;
    return event_reg_offset + (bit * sizeof(uint32_t));
 }
-__STATIC_INLINE uint32_t nrfx_event_to_bitpos(uint32_t event)
+NRF_STATIC_INLINE uint32_t nrfx_event_to_bitpos(uint32_t event)
 {
    static const uint32_t event_reg_offset = 0x100u;
    return (event - event_reg_offset) / sizeof(uint32_t);
 }
-#endif
+#endif // NRF_DECLARE_ONLY
 /** @} */
--- a/drivers/src/nrfx_adc.c
+++ b/drivers/src/nrfx_adc.c
@ -68,7 +68,7 @@ nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config,
        return err_code;
    }
-    nrf_adc_event_clear(NRF_ADC_EVENT_END);
+    nrf_adc_event_clear(NRF_ADC, NRF_ADC_EVENT_END);
    if (event_handler)
    {
        NRFX_IRQ_PRIORITY_SET(ADC_IRQn, p_config->interrupt_priority);
@ -85,8 +85,8 @@ nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config,
 void nrfx_adc_uninit(void)
 {
    NRFX_IRQ_DISABLE(ADC_IRQn);
-    nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
+    nrf_adc_int_disable(NRF_ADC, NRF_ADC_INT_END_MASK);
-    nrf_adc_task_trigger(NRF_ADC_TASK_STOP);
+    nrf_adc_task_trigger(NRF_ADC, NRF_ADC_TASK_STOP);
    // Disable all channels. This must be done after the interrupt is disabled
    // because adc_sample_process() dereferences this pointer when it needs to
@ -158,11 +158,11 @@ void nrfx_adc_sample(void)
    {
        return;
    }
-    NRFX_ASSERT(!nrf_adc_busy_check());
+    NRFX_ASSERT(!nrf_adc_busy_check(NRF_ADC));
-    nrf_adc_task_trigger(NRF_ADC_TASK_START);
+    nrf_adc_task_trigger(NRF_ADC, NRF_ADC_TASK_START);
 }
-nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
+nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * p_channel,
                                   nrf_adc_value_t *          p_value)
 {
    nrfx_err_t err_code;
@ -180,16 +180,16 @@ nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
    {
        m_cb.state = NRFX_DRV_STATE_POWERED_ON;
-        nrf_adc_init(&p_channel->config);
+        nrf_adc_init(NRF_ADC, &p_channel->config);
-        nrf_adc_enable();
+        nrf_adc_enable(NRF_ADC);
-        nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
+        nrf_adc_int_disable(NRF_ADC, NRF_ADC_INT_END_MASK);
-        nrf_adc_task_trigger(NRF_ADC_TASK_START);
+        nrf_adc_task_trigger(NRF_ADC, NRF_ADC_TASK_START);
        if (p_value)
        {
-            while (!nrf_adc_event_check(NRF_ADC_EVENT_END)) {}
+            while (!nrf_adc_event_check(NRF_ADC, NRF_ADC_EVENT_END)) {}
-            nrf_adc_event_clear(NRF_ADC_EVENT_END);
+            nrf_adc_event_clear(NRF_ADC, NRF_ADC_EVENT_END);
-            *p_value = (nrf_adc_value_t)nrf_adc_result_get();
+            *p_value = (nrf_adc_value_t)nrf_adc_result_get(NRF_ADC);
-            nrf_adc_disable();
+            nrf_adc_disable(NRF_ADC);
            m_cb.state = NRFX_DRV_STATE_INITIALIZED;
        }
@ -197,7 +197,7 @@ nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
        {
            NRFX_ASSERT(m_cb.event_handler);
            m_cb.p_buffer = NULL;
-            nrf_adc_int_enable(NRF_ADC_INT_END_MASK);
+            nrf_adc_int_enable(NRF_ADC, NRF_ADC_INT_END_MASK);
        }
        err_code = NRFX_SUCCESS;
        NRFX_LOG_INFO("Function: %s, error code: %s.",
@ -209,9 +209,9 @@ nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
 static bool adc_sample_process()
 {
-    nrf_adc_event_clear(NRF_ADC_EVENT_END);
+    nrf_adc_event_clear(NRF_ADC, NRF_ADC_EVENT_END);
-    nrf_adc_disable();
+    nrf_adc_disable(NRF_ADC);
-    m_cb.p_buffer[m_cb.idx] = (nrf_adc_value_t)nrf_adc_result_get();
+    m_cb.p_buffer[m_cb.idx] = (nrf_adc_value_t)nrf_adc_result_get(NRF_ADC);
    m_cb.idx++;
    if (m_cb.idx < m_cb.size)
    {
@ -229,11 +229,11 @@ static bool adc_sample_process()
            m_cb.p_current_conv = m_cb.p_current_conv->p_next;
            task_trigger = true;
        }
-        nrf_adc_init(&m_cb.p_current_conv->config);
+        nrf_adc_init(NRF_ADC, &m_cb.p_current_conv->config);
-        nrf_adc_enable();
+        nrf_adc_enable(NRF_ADC);
        if (task_trigger)
        {
-            nrf_adc_task_trigger(NRF_ADC_TASK_START);
+            nrf_adc_task_trigger(NRF_ADC, NRF_ADC_TASK_START);
        }
        return false;
    }
@ -266,18 +266,18 @@ nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size)
        m_cb.size           = size;
        m_cb.idx            = 0;
        m_cb.p_buffer       = buffer;
-        nrf_adc_init(&m_cb.p_current_conv->config);
+        nrf_adc_init(NRF_ADC, &m_cb.p_current_conv->config);
-        nrf_adc_event_clear(NRF_ADC_EVENT_END);
+        nrf_adc_event_clear(NRF_ADC, NRF_ADC_EVENT_END);
-        nrf_adc_enable();
+        nrf_adc_enable(NRF_ADC);
        if (m_cb.event_handler)
        {
-            nrf_adc_int_enable(NRF_ADC_INT_END_MASK);
+            nrf_adc_int_enable(NRF_ADC, NRF_ADC_INT_END_MASK);
        }
        else
        {
            while (1)
            {
-                while (!nrf_adc_event_check(NRF_ADC_EVENT_END)){}
+                while (!nrf_adc_event_check(NRF_ADC, NRF_ADC_EVENT_END)){}
                if (adc_sample_process())
                {
@ -304,13 +304,13 @@ void nrfx_adc_irq_handler(void)
 {
    if (m_cb.p_buffer == NULL)
    {
-        nrf_adc_event_clear(NRF_ADC_EVENT_END);
+        nrf_adc_event_clear(NRF_ADC, NRF_ADC_EVENT_END);
        NRFX_LOG_DEBUG("Event: %s.",NRFX_LOG_ERROR_STRING_GET(NRF_ADC_EVENT_END));
-        nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
+        nrf_adc_int_disable(NRF_ADC, NRF_ADC_INT_END_MASK);
-        nrf_adc_disable();
+        nrf_adc_disable(NRF_ADC);
        nrfx_adc_evt_t evt;
        evt.type = NRFX_ADC_EVT_SAMPLE;
-        evt.data.sample.sample = (nrf_adc_value_t)nrf_adc_result_get();
+        evt.data.sample.sample = (nrf_adc_value_t)nrf_adc_result_get(NRF_ADC);
        NRFX_LOG_DEBUG("ADC data:");
        NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)(&evt.data.sample.sample), sizeof(nrf_adc_value_t));
        m_cb.state = NRFX_DRV_STATE_INITIALIZED;
@ -319,7 +319,7 @@ void nrfx_adc_irq_handler(void)
    else if (adc_sample_process())
    {
        NRFX_LOG_DEBUG("Event: %s.", NRFX_LOG_ERROR_STRING_GET(NRF_ADC_EVENT_END));
-        nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
+        nrf_adc_int_disable(NRF_ADC, NRF_ADC_INT_END_MASK);
        nrfx_adc_evt_t evt;
        evt.type = NRFX_ADC_EVT_DONE;
        evt.data.done.p_buffer = m_cb.p_buffer;
--- a/drivers/src/nrfx_clock.c
+++ b/drivers/src/nrfx_clock.c
@ -179,7 +179,7 @@ void nrfx_clock_enable(void)
 {
    NRFX_ASSERT(m_clock_cb.module_initialized);
    nrfx_power_clock_irq_init();
-    nrf_clock_lf_src_set((nrf_clock_lfclk_t)NRFX_CLOCK_CONFIG_LF_SRC);
+    nrf_clock_lf_src_set(NRF_CLOCK, (nrf_clock_lfclk_t)NRFX_CLOCK_CONFIG_LF_SRC);
 #if NRFX_CHECK(NRFX_POWER_ENABLED)
    nrfx_clock_irq_enabled = true;
@ -198,7 +198,7 @@ void nrfx_clock_disable(void)
    {
        NRFX_IRQ_DISABLE(nrfx_get_irq_number(NRF_CLOCK));
    }
-    nrf_clock_int_disable(CLOCK_INTENSET_HFCLKSTARTED_Msk |
+    nrf_clock_int_disable(NRF_CLOCK, CLOCK_INTENSET_HFCLKSTARTED_Msk |
                                     CLOCK_INTENSET_LFCLKSTARTED_Msk |
 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
                                     CLOCK_INTENSET_DONE_Msk |
@ -226,37 +226,37 @@ void nrfx_clock_uninit(void)
 void nrfx_clock_lfclk_start(void)
 {
    NRFX_ASSERT(m_clock_cb.module_initialized);
-    nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED);
+    nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED);
-    nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK);
+    nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK);
 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
    nrfx_clock_anomaly_132();
 #endif
-    nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART);
+    nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTART);
 }
 void nrfx_clock_lfclk_stop(void)
 {
    NRFX_ASSERT(m_clock_cb.module_initialized);
-    nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTOP);
+    nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTOP);
-    while (nrf_clock_lf_is_running())
+    while (nrf_clock_lf_is_running(NRF_CLOCK))
    {}
 }
 void nrfx_clock_hfclk_start(void)
 {
    NRFX_ASSERT(m_clock_cb.module_initialized);
-    nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED);
+    nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED);
-    nrf_clock_int_enable(NRF_CLOCK_INT_HF_STARTED_MASK);
+    nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK);
-    nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTART);
+    nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKSTART);
 }
 void nrfx_clock_hfclk_stop(void)
 {
    NRFX_ASSERT(m_clock_cb.module_initialized);
-    nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTOP);
+    nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKSTOP);
-    while (nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY))
+    while (nrf_clock_hf_is_running(NRF_CLOCK, NRF_CLOCK_HFCLK_HIGH_ACCURACY))
    {}
 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
    m_clock_cb.hfclk_started = false;
@ -280,13 +280,13 @@ nrfx_err_t nrfx_clock_calibration_start(void)
    if (m_clock_cb.cal_state == CAL_STATE_IDLE)
    {
-        nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);
+        nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_DONE);
-        nrf_clock_int_enable(NRF_CLOCK_INT_DONE_MASK);
+        nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_DONE_MASK);
        m_clock_cb.cal_state = CAL_STATE_CAL;
 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192)
        *(volatile uint32_t *)0x40000C34 = 0x00000002;
 #endif
-        nrf_clock_task_trigger(NRF_CLOCK_TASK_CAL);
+        nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CAL);
    }
    else
    {
@ -314,28 +314,28 @@ nrfx_err_t nrfx_clock_is_calibrating(void)
 void nrfx_clock_calibration_timer_start(uint8_t interval)
 {
 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
-    nrf_clock_cal_timer_timeout_set(interval);
+    nrf_clock_cal_timer_timeout_set(NRF_CLOCK, interval);
-    nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO);
+    nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO);
-    nrf_clock_int_enable(NRF_CLOCK_INT_CTTO_MASK);
+    nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK);
-    nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTART);
+    nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTART);
 #endif
 }
 void nrfx_clock_calibration_timer_stop(void)
 {
 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
-    nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK);
+    nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK);
-    nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTOP);
+    nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTOP);
 #endif
 }
 void nrfx_clock_irq_handler(void)
 {
-    if (nrf_clock_event_check(NRF_CLOCK_EVENT_HFCLKSTARTED))
+    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED))
    {
-        nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED);
+        nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_HFCLKSTARTED));
-        nrf_clock_int_disable(NRF_CLOCK_INT_HF_STARTED_MASK);
+        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK);
 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
        if (!m_clock_cb.hfclk_started)
@ -347,33 +347,33 @@ void nrfx_clock_irq_handler(void)
        m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
 #endif
    }
-    if (nrf_clock_event_check(NRF_CLOCK_EVENT_LFCLKSTARTED))
+    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED))
    {
-        nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED);
+        nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_LFCLKSTARTED));
-        nrf_clock_int_disable(NRF_CLOCK_INT_LF_STARTED_MASK);
+        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK);
        m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED);
    }
 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
-    if (nrf_clock_event_check(NRF_CLOCK_EVENT_CTTO))
+    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO))
    {
-        nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO);
+        nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_CTTO));
-        nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK);
+        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK);
        m_clock_cb.event_handler(NRFX_CLOCK_EVT_CTTO);
    }
-    if (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE))
+    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_DONE))
    {
 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192)
        *(volatile uint32_t *)0x40000C34 = 0x00000000;
 #endif
-        nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);
+        nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_DONE);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_DONE));
-        nrf_clock_int_disable(NRF_CLOCK_INT_DONE_MASK);
+        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_DONE_MASK);
        m_clock_cb.cal_state = CAL_STATE_IDLE;
        m_clock_cb.event_handler(NRFX_CLOCK_EVT_CAL_DONE);
    }
--- a/drivers/src/nrfx_comp.c
+++ b/drivers/src/nrfx_comp.c
@ -52,9 +52,9 @@ static nrfx_drv_state_t             m_state = NRFX_DRV_STATE_UNINITIALIZED;
 static void comp_execute_handler(nrf_comp_event_t event, uint32_t event_mask)
 {
-    if (nrf_comp_event_check(event) && nrf_comp_int_enable_check(event_mask))
+    if (nrf_comp_event_check(NRF_COMP, event) && nrf_comp_int_enable_check(NRF_COMP, event_mask))
    {
-        nrf_comp_event_clear(event);
+        nrf_comp_event_clear(NRF_COMP, event);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(event));
        m_comp_event_handler(event);
@ -99,39 +99,39 @@ nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config,
    }
 #endif
-    nrf_comp_task_trigger(NRF_COMP_TASK_STOP);
+    nrf_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_STOP);
-    nrf_comp_enable();
+    nrf_comp_enable(NRF_COMP);
    // Clear events to be sure there are no leftovers.
-    nrf_comp_event_clear(NRF_COMP_EVENT_READY);
+    nrf_comp_event_clear(NRF_COMP, NRF_COMP_EVENT_READY);
-    nrf_comp_event_clear(NRF_COMP_EVENT_DOWN);
+    nrf_comp_event_clear(NRF_COMP, NRF_COMP_EVENT_DOWN);
-    nrf_comp_event_clear(NRF_COMP_EVENT_UP);
+    nrf_comp_event_clear(NRF_COMP, NRF_COMP_EVENT_UP);
-    nrf_comp_event_clear(NRF_COMP_EVENT_CROSS);
+    nrf_comp_event_clear(NRF_COMP, NRF_COMP_EVENT_CROSS);
-    nrf_comp_ref_set(p_config->reference);
+    nrf_comp_ref_set(NRF_COMP, p_config->reference);
    //If external source is chosen, write to appropriate register.
    if (p_config->reference == COMP_REFSEL_REFSEL_ARef)
    {
-        nrf_comp_ext_ref_set(p_config->ext_ref);
+        nrf_comp_ext_ref_set(NRF_COMP, p_config->ext_ref);
    }
-    nrf_comp_th_set(p_config->threshold);
+    nrf_comp_th_set(NRF_COMP, p_config->threshold);
-    nrf_comp_main_mode_set(p_config->main_mode);
+    nrf_comp_main_mode_set(NRF_COMP, p_config->main_mode);
-    nrf_comp_speed_mode_set(p_config->speed_mode);
+    nrf_comp_speed_mode_set(NRF_COMP, p_config->speed_mode);
-    nrf_comp_hysteresis_set(p_config->hyst);
+    nrf_comp_hysteresis_set(NRF_COMP, p_config->hyst);
 #if defined (COMP_ISOURCE_ISOURCE_Msk)
-    nrf_comp_isource_set(p_config->isource);
+    nrf_comp_isource_set(NRF_COMP, p_config->isource);
 #endif
-    nrf_comp_shorts_disable(NRFX_COMP_SHORT_STOP_AFTER_CROSS_EVT |
+    nrf_comp_shorts_disable(NRF_COMP, NRFX_COMP_SHORT_STOP_AFTER_CROSS_EVT |
                            NRFX_COMP_SHORT_STOP_AFTER_UP_EVT |
                            NRFX_COMP_SHORT_STOP_AFTER_DOWN_EVT);
-    nrf_comp_int_disable(COMP_INTENCLR_CROSS_Msk |
+    nrf_comp_int_disable(NRF_COMP, COMP_INTENCLR_CROSS_Msk |
                         COMP_INTENCLR_UP_Msk |
                         COMP_INTENCLR_DOWN_Msk |
                         COMP_INTENCLR_READY_Msk);
-    nrf_comp_input_select(p_config->input);
+    nrf_comp_input_select(NRF_COMP, p_config->input);
    NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_COMP), p_config->interrupt_priority);
    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_COMP));
@ -150,7 +150,7 @@ void nrfx_comp_uninit(void)
        return;
    }
    NRFX_IRQ_DISABLE(nrfx_get_irq_number(NRF_COMP));
-    nrf_comp_disable();
+    nrf_comp_disable(NRF_COMP);
 #if NRFX_CHECK(NRFX_PRS_ENABLED)
    nrfx_prs_release(NRF_COMP);
 #endif
@ -161,26 +161,26 @@ void nrfx_comp_uninit(void)
 void nrfx_comp_pin_select(nrf_comp_input_t psel)
 {
-    bool comp_enable_state = nrf_comp_enable_check();
+    bool comp_enable_state = nrf_comp_enable_check(NRF_COMP);
-    nrf_comp_task_trigger(NRF_COMP_TASK_STOP);
+    nrf_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_STOP);
    if (m_state == NRFX_DRV_STATE_POWERED_ON)
    {
        m_state = NRFX_DRV_STATE_INITIALIZED;
    }
-    nrf_comp_disable();
+    nrf_comp_disable(NRF_COMP);
-    nrf_comp_input_select(psel);
+    nrf_comp_input_select(NRF_COMP, psel);
    if (comp_enable_state == true)
    {
-        nrf_comp_enable();
+        nrf_comp_enable(NRF_COMP);
    }
 }
 void nrfx_comp_start(uint32_t comp_int_mask, uint32_t comp_shorts_mask)
 {
    NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED);
-    nrf_comp_int_enable(comp_int_mask);
+    nrf_comp_int_enable(NRF_COMP, comp_int_mask);
-    nrf_comp_shorts_enable(comp_shorts_mask);
+    nrf_comp_shorts_enable(NRF_COMP, comp_shorts_mask);
-    nrf_comp_task_trigger(NRF_COMP_TASK_START);
+    nrf_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_START);
    m_state = NRFX_DRV_STATE_POWERED_ON;
    NRFX_LOG_INFO("Enabled.");
 }
@ -188,9 +188,9 @@ void nrfx_comp_start(uint32_t comp_int_mask, uint32_t comp_shorts_mask)
 void nrfx_comp_stop(void)
 {
    NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON);
-    nrf_comp_shorts_disable(UINT32_MAX);
+    nrf_comp_shorts_disable(NRF_COMP, UINT32_MAX);
-    nrf_comp_int_disable(UINT32_MAX);
+    nrf_comp_int_disable(NRF_COMP, UINT32_MAX);
-    nrf_comp_task_trigger(NRF_COMP_TASK_STOP);
+    nrf_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_STOP);
    m_state = NRFX_DRV_STATE_INITIALIZED;
    NRFX_LOG_INFO("Disabled.");
 }
@ -198,8 +198,8 @@ void nrfx_comp_stop(void)
 uint32_t nrfx_comp_sample()
 {
    NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON);
-    nrf_comp_task_trigger(NRF_COMP_TASK_SAMPLE);
+    nrf_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_SAMPLE);
-    return nrf_comp_result_get();
+    return nrf_comp_result_get(NRF_COMP);
 }
 #endif // NRFX_CHECK(NRFX_COMP_ENABLED)
--- a/drivers/src/nrfx_dppi.c
+++ b/drivers/src/nrfx_dppi.c
@ -49,7 +49,7 @@
 #endif
 #define DPPI_AVAILABLE_CHANNELS_MASK \
-    (((1UL << DPPI_CH_NUM) - 1) & (~NRFX_DPPI_CHANNELS_USED))
+    ((uint32_t)(((1ULL << DPPI_CH_NUM) - 1) & (~NRFX_DPPI_CHANNELS_USED)))
 #define DPPI_AVAILABLE_GROUPS_MASK   \
    (((1UL << DPPI_GROUP_NUM) - 1)   & (~NRFX_DPPI_GROUPS_USED))
@ -61,12 +61,12 @@ static uint32_t m_allocated_channels;
 static uint8_t  m_allocated_groups;
-__STATIC_INLINE bool channel_is_allocated(uint8_t channel)
+static bool channel_is_allocated(uint8_t channel)
 {
    return ((m_allocated_channels & DPPI_BIT_SET(channel)) != 0);
 }
-__STATIC_INLINE bool group_is_allocated(nrf_dppi_channel_group_t group)
+static bool group_is_allocated(nrf_dppi_channel_group_t group)
 {
    return ((m_allocated_groups & DPPI_BIT_SET(group)) != 0);
 }
--- a/drivers/src/nrfx_egu.c
+++ b/drivers/src/nrfx_egu.c
@ -0,0 +1,215 @@
 /*
 * Copyright (c) 2019, Nordic Semiconductor ASA
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 #include <nrfx.h>
 #if NRFX_CHECK(NRFX_EGU_ENABLED)
 #if !(NRFX_CHECK(NRFX_EGU0_ENABLED) || \
      NRFX_CHECK(NRFX_EGU1_ENABLED) || \
      NRFX_CHECK(NRFX_EGU2_ENABLED) || \
      NRFX_CHECK(NRFX_EGU3_ENABLED) || \
      NRFX_CHECK(NRFX_EGU4_ENABLED) || \
      NRFX_CHECK(NRFX_EGU5_ENABLED))
 #error "No enabled EGU instances. Check <nrfx_config.h>."
 #endif
 #if NRFX_CHECK(NRFX_EGU0_ENABLED) && ((1 << 0) & NRFX_EGUS_USED)
    #error "EGU instance 0 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_EGU1_ENABLED) && ((1 << 1) & NRFX_EGUS_USED)
    #error "EGU instance 1 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_EGU2_ENABLED) && ((1 << 2) & NRFX_EGUS_USED)
    #error "EGU instance 2 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_EGU3_ENABLED) && ((1 << 3) & NRFX_EGUS_USED)
    #error "EGU instance 3 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_EGU4_ENABLED) && ((1 << 4) & NRFX_EGUS_USED)
    #error "EGU instance 4 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_EGU5_ENABLED) && ((1 << 5) & NRFX_EGUS_USED)
    #error "EGU instance 5 is reserved for use outside of nrfx."
 #endif
 #include <nrfx_egu.h>
 typedef struct
 {
    nrfx_egu_event_handler_t handler;
    void *                   p_context;
    nrfx_drv_state_t         state;
 } egu_control_block_t;
 static egu_control_block_t m_cb[NRFX_EGU_ENABLED_COUNT];
 static uint32_t egu_event_mask_get_and_clear(NRF_EGU_Type * p_reg, uint32_t int_mask)
 {
    uint32_t event_mask = 0;
    while (int_mask)
    {
        uint8_t event_idx = __CLZ(__RBIT(int_mask));
        int_mask &= ~(1uL << event_idx);
        nrf_egu_event_t event = nrf_egu_triggered_event_get(event_idx);
        if (nrf_egu_event_check(p_reg, event))
        {
            nrf_egu_event_clear(p_reg, event);
            event_mask |= (1uL << event_idx);
        }
    }
    return event_mask;
 }
 nrfx_err_t nrfx_egu_init(nrfx_egu_t const *       p_instance,
                         uint8_t                  interrupt_priority,
                         nrfx_egu_event_handler_t event_handler,
                         void *                   p_context)
 {
    NRFX_ASSERT(p_instance);
    egu_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED)
    {
        return NRFX_ERROR_INVALID_STATE;
    }
    p_cb->state     = NRFX_DRV_STATE_INITIALIZED;
    p_cb->p_context = p_context;
    p_cb->handler   = event_handler;
    if (event_handler)
    {
        NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg));
        NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg), interrupt_priority);
    }
    return NRFX_SUCCESS;
 }
 void nrfx_egu_int_enable(nrfx_egu_t const * p_instance, uint32_t mask)
 {
    NRFX_ASSERT(p_instance);
    NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED);
    NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].handler);
    (void)egu_event_mask_get_and_clear(p_instance->p_reg, mask);
    nrf_egu_int_enable(p_instance->p_reg, mask);
 }
 void nrfx_egu_int_disable(nrfx_egu_t const * p_instance, uint32_t mask)
 {
    NRFX_ASSERT(p_instance);
    NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED);
    nrf_egu_int_disable(p_instance->p_reg, mask);
 }
 void nrfx_egu_trigger(nrfx_egu_t const * p_instance, uint8_t event_idx)
 {
    NRFX_ASSERT(p_instance);
    NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED);
    NRFX_ASSERT(event_idx < nrf_egu_channel_count(p_instance->p_reg));
    nrf_egu_task_trigger(p_instance->p_reg, nrf_egu_trigger_task_get(event_idx));
 }
 void nrfx_egu_uninit(nrfx_egu_t const * p_instance)
 {
    NRFX_ASSERT(p_instance);
    egu_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    nrf_egu_int_disable(p_instance->p_reg, ~0uL);
    NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg));
    p_cb->state = NRFX_DRV_STATE_UNINITIALIZED;
 }
 static void egu_irq_handler(NRF_EGU_Type * p_reg, egu_control_block_t * p_cb)
 {
    uint32_t int_mask = nrf_egu_int_enable_check(p_reg, ~0uL);
    /* Check (and clear) only the events that are set to generate interrupts.
       Leave the other ones untouched. */
    uint32_t event_mask = egu_event_mask_get_and_clear(p_reg, int_mask);
    while (event_mask)
    {
        uint8_t event_idx = __CLZ(__RBIT(event_mask));
        event_mask &= ~(1uL << event_idx);
        p_cb->handler(event_idx, p_cb->p_context);
    }
 }
 #if NRFX_CHECK(NRFX_EGU0_ENABLED)
 void nrfx_egu_0_irq_handler(void)
 {
    egu_irq_handler(NRF_EGU0, &m_cb[NRFX_EGU0_INST_IDX]);
 }
 #endif
 #if NRFX_CHECK(NRFX_EGU1_ENABLED)
 void nrfx_egu_1_irq_handler(void)
 {
    egu_irq_handler(NRF_EGU1, &m_cb[NRFX_EGU1_INST_IDX]);
 }
 #endif
 #if NRFX_CHECK(NRFX_EGU2_ENABLED)
 void nrfx_egu_2_irq_handler(void)
 {
    egu_irq_handler(NRF_EGU2, &m_cb[NRFX_EGU2_INST_IDX]);
 }
 #endif
 #if NRFX_CHECK(NRFX_EGU3_ENABLED)
 void nrfx_egu_3_irq_handler(void)
 {
    egu_irq_handler(NRF_EGU3, &m_cb[NRFX_EGU3_INST_IDX]);
 }
 #endif
 #if NRFX_CHECK(NRFX_EGU4_ENABLED)
 void nrfx_egu_4_irq_handler(void)
 {
    egu_irq_handler(NRF_EGU4, &m_cb[NRFX_EGU4_INST_IDX]);
 }
 #endif
 #if NRFX_CHECK(NRFX_EGU5_ENABLED)
 void nrfx_egu_5_irq_handler(void)
 {
    egu_irq_handler(NRF_EGU5, &m_cb[NRFX_EGU5_INST_IDX]);
 }
 #endif
 #endif // NRFX_CHECK(NRFX_EGU_ENABLED)
--- a/drivers/src/nrfx_gpiote.c
+++ b/drivers/src/nrfx_gpiote.c
@ -50,44 +50,6 @@
 /* Check if every pin can be encoded on provided number of bits. */
 NRFX_STATIC_ASSERT(NUMBER_OF_PINS <= (1 << SENSE_FIELD_POS));
 /**
 * @brief Macro for converting task-event index to an address of an event register.
 *
 * Macro utilizes the fact that registers are grouped together in ascending order.
 */
 #define TE_IDX_TO_EVENT_ADDR(idx)    (nrf_gpiote_events_t)((uint32_t)NRF_GPIOTE_EVENTS_IN_0 + \
                                                           (sizeof(uint32_t) * (idx)))
 /**
 * @brief Macro for converting task-event index of OUT task to an address of a task register.
 *
 * Macro utilizes the fact that registers are grouped together in ascending order.
 */
 #define TE_OUT_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_OUT_0 + \
                                                          (sizeof(uint32_t) * (idx)))
 #if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
 /**
 * @brief Macro for converting task-event index of SET task to an address of a task register.
 *
 * Macro utilizes the fact that registers are grouped together in ascending order.
 */
 #define TE_SET_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_SET_0 + \
                                                          (sizeof(uint32_t) * (idx)))
 #endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
 #if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
 /**
 * @brief Macro for converting task-event index of CLR task to an address of a task register.
 *
 * Macro utilizes the fact that registers are grouped together in ascending order.
 */
 #define TE_CLR_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_CLR_0 + \
                                                          (sizeof(uint32_t) * (idx)))
 #endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
 /*lint -save -e571*/ /* Suppress "Warning 571: Suspicious cast" */
 typedef struct
 {
@ -100,38 +62,38 @@ typedef struct
 static gpiote_control_block_t m_cb;
-__STATIC_INLINE bool pin_in_use(uint32_t pin)
+static bool pin_in_use(uint32_t pin)
 {
    return (m_cb.pin_assignments[pin] != PIN_NOT_USED);
 }
-__STATIC_INLINE bool pin_in_use_as_non_task_out(uint32_t pin)
+static bool pin_in_use_as_non_task_out(uint32_t pin)
 {
    return (m_cb.pin_assignments[pin] == PIN_USED);
 }
-__STATIC_INLINE bool pin_in_use_by_te(uint32_t pin)
+static bool pin_in_use_by_te(uint32_t pin)
 {
    return (m_cb.pin_assignments[pin] >= 0 && m_cb.pin_assignments[pin] < GPIOTE_CH_NUM) ?
            true : false;
 }
-__STATIC_INLINE bool pin_in_use_by_port(uint32_t pin)
+static bool pin_in_use_by_port(uint32_t pin)
 {
    return (m_cb.pin_assignments[pin] >= GPIOTE_CH_NUM);
 }
-__STATIC_INLINE bool pin_in_use_by_gpiote(uint32_t pin)
+static bool pin_in_use_by_gpiote(uint32_t pin)
 {
    return (m_cb.pin_assignments[pin] >= 0);
 }
-__STATIC_INLINE void pin_in_use_by_te_set(uint32_t                  pin,
+static void pin_in_use_by_te_set(uint32_t                  pin,
                                 uint32_t                  channel_id,
                                 nrfx_gpiote_evt_handler_t handler,
                                 bool                      is_channel)
@ -145,40 +107,40 @@ __STATIC_INLINE void pin_in_use_by_te_set(uint32_t                  pin,
 }
-__STATIC_INLINE void pin_in_use_set(uint32_t pin)
+static void pin_in_use_set(uint32_t pin)
 {
    m_cb.pin_assignments[pin] = PIN_USED;
 }
-__STATIC_INLINE void pin_in_use_clear(uint32_t pin)
+static void pin_in_use_clear(uint32_t pin)
 {
    m_cb.pin_assignments[pin] = PIN_NOT_USED;
 }
-__STATIC_INLINE void pin_configured_set(uint32_t pin)
+static void pin_configured_set(uint32_t pin)
 {
    nrf_bitmask_bit_set(pin, m_cb.configured_pins);
 }
-__STATIC_INLINE void pin_configured_clear(uint32_t pin)
+static void pin_configured_clear(uint32_t pin)
 {
    nrf_bitmask_bit_clear(pin, m_cb.configured_pins);
 }
-__STATIC_INLINE bool pin_configured_check(uint32_t pin)
+static bool pin_configured_check(uint32_t pin)
 {
    return 0 != nrf_bitmask_bit_is_set(pin, m_cb.configured_pins);
 }
-__STATIC_INLINE int8_t channel_port_get(uint32_t pin)
+static int8_t channel_port_get(uint32_t pin)
 {
    return m_cb.pin_assignments[pin];
 }
-__STATIC_INLINE nrfx_gpiote_evt_handler_t channel_handler_get(uint32_t channel)
+static nrfx_gpiote_evt_handler_t channel_handler_get(uint32_t channel)
 {
    return m_cb.handlers[channel];
 }
@ -219,7 +181,7 @@ static void channel_free(uint8_t channel_id)
 }
-nrfx_err_t nrfx_gpiote_init(void)
+nrfx_err_t nrfx_gpiote_init(uint8_t interrupt_priority)
 {
    nrfx_err_t err_code;
@ -246,10 +208,10 @@ nrfx_err_t nrfx_gpiote_init(void)
    memset(m_cb.configured_pins, 0, sizeof(m_cb.configured_pins));
-    NRFX_IRQ_PRIORITY_SET(GPIOTE_IRQn, NRFX_GPIOTE_CONFIG_IRQ_PRIORITY);
+    NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_GPIOTE), interrupt_priority);
-    NRFX_IRQ_ENABLE(GPIOTE_IRQn);
+    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_GPIOTE));
-    nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT);
+    nrf_gpiote_event_clear(NRF_GPIOTE, NRF_GPIOTE_EVENT_PORT);
-    nrf_gpiote_int_enable(GPIOTE_INTENSET_PORT_Msk);
+    nrf_gpiote_int_enable(NRF_GPIOTE, GPIOTE_INTENSET_PORT_Msk);
    m_cb.state = NRFX_DRV_STATE_INITIALIZED;
    err_code = NRFX_SUCCESS;
@ -303,7 +265,7 @@ nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t                pin,
    if (pin_in_use(pin))
    {
-        err_code = NRFX_ERROR_INVALID_STATE;
+        err_code = NRFX_ERROR_BUSY;
    }
    else
    {
@ -313,7 +275,8 @@ nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t                pin,
            if (channel != NO_CHANNELS)
            {
-                nrf_gpiote_task_configure((uint32_t)channel,
+                nrf_gpiote_task_configure(NRF_GPIOTE,
                                          (uint32_t)channel,
                                          pin,
                                          p_config->action,
                                          p_config->init_state);
@ -357,7 +320,7 @@ void nrfx_gpiote_out_uninit(nrfx_gpiote_pin_t pin)
    if (pin_in_use_by_te(pin))
    {
        channel_free((uint8_t)channel_port_get(pin));
-        nrf_gpiote_te_default((uint32_t)channel_port_get(pin));
+        nrf_gpiote_te_default(NRF_GPIOTE, (uint32_t)channel_port_get(pin));
    }
    pin_in_use_clear(pin);
@ -405,7 +368,7 @@ void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin)
    NRFX_ASSERT(pin_in_use(pin));
    NRFX_ASSERT(pin_in_use_by_te(pin));
-    nrf_gpiote_task_enable((uint32_t)m_cb.pin_assignments[pin]);
+    nrf_gpiote_task_enable(NRF_GPIOTE, (uint32_t)m_cb.pin_assignments[pin]);
 }
@ -415,46 +378,62 @@ void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin)
    NRFX_ASSERT(pin_in_use(pin));
    NRFX_ASSERT(pin_in_use_by_te(pin));
-    nrf_gpiote_task_disable((uint32_t)m_cb.pin_assignments[pin]);
+    nrf_gpiote_task_disable(NRF_GPIOTE, (uint32_t)m_cb.pin_assignments[pin]);
 }
 nrf_gpiote_task_t nrfx_gpiote_out_task_get(nrfx_gpiote_pin_t pin)
 {
    NRFX_ASSERT(pin < NUMBER_OF_PINS);
    NRFX_ASSERT(pin_in_use_by_te(pin));
    return  nrf_gpiote_out_task_get((uint8_t)channel_port_get(pin));
 }
 uint32_t nrfx_gpiote_out_task_addr_get(nrfx_gpiote_pin_t pin)
 {
-    NRFX_ASSERT(pin < NUMBER_OF_PINS);
+    nrf_gpiote_task_t task = nrfx_gpiote_out_task_get(pin);
-    NRFX_ASSERT(pin_in_use_by_te(pin));
+    return nrf_gpiote_task_address_get(NRF_GPIOTE, task);
    nrf_gpiote_tasks_t task = TE_OUT_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin));
    return nrf_gpiote_task_addr_get(task);
 }
 #if defined(GPIOTE_FEATURE_SET_PRESENT)
 nrf_gpiote_task_t nrfx_gpiote_set_task_get(nrfx_gpiote_pin_t pin)
 {
    NRFX_ASSERT(pin < NUMBER_OF_PINS);
    NRFX_ASSERT(pin_in_use_by_te(pin));
    return nrf_gpiote_set_task_get((uint8_t)channel_port_get(pin));
 }
 uint32_t nrfx_gpiote_set_task_addr_get(nrfx_gpiote_pin_t pin)
 {
-    NRFX_ASSERT(pin < NUMBER_OF_PINS);
+    nrf_gpiote_task_t task = nrfx_gpiote_set_task_get(pin);
-    NRFX_ASSERT(pin_in_use_by_te(pin));
+    return nrf_gpiote_task_address_get(NRF_GPIOTE, task);
    nrf_gpiote_tasks_t task = TE_SET_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin));
    return nrf_gpiote_task_addr_get(task);
 }
 #endif // defined(GPIOTE_FEATURE_SET_PRESENT)
 #if defined(GPIOTE_FEATURE_CLR_PRESENT)
-uint32_t nrfx_gpiote_clr_task_addr_get(nrfx_gpiote_pin_t pin)
+nrf_gpiote_task_t nrfx_gpiote_clr_task_get(nrfx_gpiote_pin_t pin)
 {
    NRFX_ASSERT(pin < NUMBER_OF_PINS);
    NRFX_ASSERT(pin_in_use_by_te(pin));
-    nrf_gpiote_tasks_t task = TE_CLR_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin));
+    return nrf_gpiote_clr_task_get((uint8_t)channel_port_get(pin));
    return nrf_gpiote_task_addr_get(task);
 }
 uint32_t nrfx_gpiote_clr_task_addr_get(nrfx_gpiote_pin_t pin)
 {
    nrf_gpiote_task_t task = nrfx_gpiote_clr_task_get(pin);
    return nrf_gpiote_task_address_get(NRF_GPIOTE, task);
 }
 #endif // defined(GPIOTE_FEATURE_CLR_PRESENT)
 void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state)
 {
    NRFX_ASSERT(pin < NUMBER_OF_PINS);
@ -463,7 +442,7 @@ void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state)
    nrf_gpiote_outinit_t init_val =
        state ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW;
-    nrf_gpiote_task_force((uint32_t)m_cb.pin_assignments[pin], init_val);
+    nrf_gpiote_task_force(NRF_GPIOTE, (uint32_t)m_cb.pin_assignments[pin], init_val);
 }
@ -473,8 +452,8 @@ void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin)
    NRFX_ASSERT(pin_in_use(pin));
    NRFX_ASSERT(pin_in_use_by_te(pin));
-    nrf_gpiote_tasks_t task = TE_OUT_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin));
+    nrf_gpiote_task_t task = nrf_gpiote_out_task_get((uint8_t)channel_port_get(pin));
-    nrf_gpiote_task_set(task);
+    nrf_gpiote_task_trigger(NRF_GPIOTE, task);
 }
@ -485,8 +464,8 @@ void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin)
    NRFX_ASSERT(pin_in_use(pin));
    NRFX_ASSERT(pin_in_use_by_te(pin));
-    nrf_gpiote_tasks_t task = TE_SET_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin));
+    nrf_gpiote_task_t task = nrf_gpiote_set_task_get((uint8_t)channel_port_get(pin));
-    nrf_gpiote_task_set(task);
+    nrf_gpiote_task_trigger(NRF_GPIOTE, task);
 }
@ -499,8 +478,8 @@ void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin)
    NRFX_ASSERT(pin_in_use(pin));
    NRFX_ASSERT(pin_in_use_by_te(pin));
-    nrf_gpiote_tasks_t task = TE_CLR_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin));
+    nrf_gpiote_task_t task = nrf_gpiote_clr_task_get((uint8_t)channel_port_get(pin));
-    nrf_gpiote_task_set(task);
+    nrf_gpiote_task_trigger(NRF_GPIOTE, task);
 }
@ -511,12 +490,15 @@ nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t               pin,
                               nrfx_gpiote_evt_handler_t       evt_handler)
 {
    NRFX_ASSERT(pin < NUMBER_OF_PINS);
    NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED);
    NRFX_ASSERT(p_config);
    nrfx_err_t err_code = NRFX_SUCCESS;
    /* Only one GPIOTE channel can be assigned to one physical pin. */
    if (pin_in_use_by_gpiote(pin))
    {
-        err_code = NRFX_ERROR_INVALID_STATE;
+        err_code = NRFX_ERROR_BUSY;
    }
    else
    {
@ -538,12 +520,12 @@ nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t               pin,
            if (p_config->hi_accuracy)
            {
-                nrf_gpiote_event_configure((uint32_t)channel, pin, p_config->sense);
+                nrf_gpiote_event_configure(NRF_GPIOTE, (uint32_t)channel, pin, p_config->sense);
            }
            else
            {
-                m_cb.port_handlers_pins[channel -
+                m_cb.port_handlers_pins[channel - GPIOTE_CH_NUM] |= (p_config->sense) <<
-                                        GPIOTE_CH_NUM] |= (p_config->sense) << SENSE_FIELD_POS;
+                                                                    SENSE_FIELD_POS;
            }
        }
        else
@ -583,18 +565,18 @@ void nrfx_gpiote_in_event_enable(nrfx_gpiote_pin_t pin, bool int_enable)
    else if (pin_in_use_by_te(pin))
    {
        int32_t            channel = (int32_t)channel_port_get(pin);
-        nrf_gpiote_events_t event   = TE_IDX_TO_EVENT_ADDR((uint32_t)channel);
+        nrf_gpiote_event_t event   = nrf_gpiote_in_event_get((uint8_t)channel);
-        nrf_gpiote_event_enable((uint32_t)channel);
+        nrf_gpiote_event_enable(NRF_GPIOTE, (uint32_t)channel);
-        nrf_gpiote_event_clear(event);
+        nrf_gpiote_event_clear(NRF_GPIOTE, event);
        if (int_enable)
        {
            nrfx_gpiote_evt_handler_t handler = channel_handler_get((uint32_t)channel_port_get(pin));
            // Enable the interrupt only if event handler was provided.
            if (handler)
            {
-                nrf_gpiote_int_enable(1 << channel);
+                nrf_gpiote_int_enable(NRF_GPIOTE, 1 << channel);
            }
        }
    }
@ -612,8 +594,8 @@ void nrfx_gpiote_in_event_disable(nrfx_gpiote_pin_t pin)
    else if (pin_in_use_by_te(pin))
    {
        int32_t channel = (int32_t)channel_port_get(pin);
-        nrf_gpiote_event_disable((uint32_t)channel);
+        nrf_gpiote_event_disable(NRF_GPIOTE, (uint32_t)channel);
-        nrf_gpiote_int_disable(1 << channel);
+        nrf_gpiote_int_disable(NRF_GPIOTE, 1 << channel);
    }
 }
@ -625,7 +607,7 @@ void nrfx_gpiote_in_uninit(nrfx_gpiote_pin_t pin)
    nrfx_gpiote_in_event_disable(pin);
    if (pin_in_use_by_te(pin))
    {
-        nrf_gpiote_te_default((uint32_t)channel_port_get(pin));
+        nrf_gpiote_te_default(NRF_GPIOTE, (uint32_t)channel_port_get(pin));
    }
    if (pin_configured_check(pin))
    {
@ -644,18 +626,24 @@ bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin)
 }
-uint32_t nrfx_gpiote_in_event_addr_get(nrfx_gpiote_pin_t pin)
+nrf_gpiote_event_t nrfx_gpiote_in_event_get(nrfx_gpiote_pin_t pin)
 {
    NRFX_ASSERT(pin < NUMBER_OF_PINS);
    NRFX_ASSERT(pin_in_use_by_port(pin) || pin_in_use_by_te(pin));
    nrf_gpiote_events_t event = NRF_GPIOTE_EVENTS_PORT;
    if (pin_in_use_by_te(pin))
    {
-        event = TE_IDX_TO_EVENT_ADDR((uint32_t)channel_port_get(pin));
+        return nrf_gpiote_in_event_get((uint8_t)channel_port_get(pin));
    }
-    return nrf_gpiote_event_addr_get(event);
+
    return NRF_GPIOTE_EVENT_PORT;
 }
 uint32_t nrfx_gpiote_in_event_addr_get(nrfx_gpiote_pin_t pin)
 {
    nrf_gpiote_event_t event = nrfx_gpiote_in_event_get(pin);
    return nrf_gpiote_event_address_get(NRF_GPIOTE, event);
 }
@ -666,27 +654,28 @@ void nrfx_gpiote_irq_handler(void)
    /* collect status of all GPIOTE pin events. Processing is done once all are collected and cleared.*/
    uint32_t            i;
-    nrf_gpiote_events_t event = NRF_GPIOTE_EVENTS_IN_0;
+    nrf_gpiote_event_t event = NRF_GPIOTE_EVENT_IN_0;
    uint32_t            mask  = (uint32_t)NRF_GPIOTE_INT_IN0_MASK;
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    {
-        if (nrf_gpiote_event_is_set(event) && nrf_gpiote_int_is_enabled(mask))
+        if (nrf_gpiote_event_check(NRF_GPIOTE, event) &&
            nrf_gpiote_int_enable_check(NRF_GPIOTE, mask))
        {
-            nrf_gpiote_event_clear(event);
+            nrf_gpiote_event_clear(NRF_GPIOTE, event);
            status |= mask;
        }
        mask <<= 1;
        /* Incrementing to next event, utilizing the fact that events are grouped together
         * in ascending order. */
-        event = (nrf_gpiote_events_t)((uint32_t)event + sizeof(uint32_t));
+        event = (nrf_gpiote_event_t)((uint32_t)event + sizeof(uint32_t));
    }
    /* collect PORT status event, if event is set read pins state. Processing is postponed to the
     * end of interrupt. */
-    if (nrf_gpiote_event_is_set(NRF_GPIOTE_EVENTS_PORT))
+    if (nrf_gpiote_event_check(NRF_GPIOTE, NRF_GPIOTE_EVENT_PORT))
    {
-        nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT);
+        nrf_gpiote_event_clear(NRF_GPIOTE, NRF_GPIOTE_EVENT_PORT);
        status |= (uint32_t)NRF_GPIOTE_INT_PORT_MASK;
        nrf_gpio_ports_read(0, GPIO_COUNT, input);
    }
@ -700,9 +689,9 @@ void nrfx_gpiote_irq_handler(void)
        {
            if (mask & status)
            {
-                nrfx_gpiote_pin_t pin = nrf_gpiote_event_pin_get(i);
+                nrfx_gpiote_pin_t pin = nrf_gpiote_event_pin_get(NRF_GPIOTE, i);
                NRFX_LOG_DEBUG("Event in number: %d.", i);
-                nrf_gpiote_polarity_t        polarity = nrf_gpiote_event_polarity_get(i);
+                nrf_gpiote_polarity_t polarity = nrf_gpiote_event_polarity_get(NRF_GPIOTE, i);
                nrfx_gpiote_evt_handler_t handler  = channel_handler_get(i);
                NRFX_LOG_DEBUG("Pin: %d, polarity: %d.", pin, polarity);
                if (handler)
--- a/drivers/src/nrfx_i2s.c
+++ b/drivers/src/nrfx_i2s.c
@ -171,8 +171,8 @@ nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config,
    m_cb.handler = handler;
-    NRFX_IRQ_PRIORITY_SET(I2S_IRQn, p_config->irq_priority);
+    NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_I2S), p_config->irq_priority);
-    NRFX_IRQ_ENABLE(I2S_IRQn);
+    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_I2S));
    m_cb.state = NRFX_DRV_STATE_INITIALIZED;
@ -190,7 +190,7 @@ void nrfx_i2s_uninit(void)
    nrfx_i2s_stop();
-    NRFX_IRQ_DISABLE(I2S_IRQn);
+    NRFX_IRQ_DISABLE(nrfx_get_irq_number(NRF_I2S));
    nrf_i2s_pins_set(NRF_I2S,
                     NRF_I2S_PIN_NOT_CONNECTED,
--- a/drivers/src/nrfx_ipc.c
+++ b/drivers/src/nrfx_ipc.c
@ -0,0 +1,162 @@
 /*
 * Copyright (c) 2019, Nordic Semiconductor ASA
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 #include <nrfx.h>
 #if NRFX_CHECK(NRFX_IPC_ENABLED)
 #include <nrfx_ipc.h>
 // Control block - driver instance local data.
 typedef struct
 {
    nrfx_ipc_handler_t handler;
    nrfx_drv_state_t   state;
    void *             p_context;
 } ipc_control_block_t;
 static ipc_control_block_t m_ipc_cb;
 nrfx_err_t nrfx_ipc_init(uint8_t irq_priority, nrfx_ipc_handler_t handler, void * p_context)
 {
    NRFX_ASSERT(handler);
    if (m_ipc_cb.state != NRFX_DRV_STATE_UNINITIALIZED)
    {
        return NRFX_ERROR_ALREADY_INITIALIZED;
    }
    NRFX_IRQ_PRIORITY_SET(IPC_IRQn, irq_priority);
    NRFX_IRQ_ENABLE(IPC_IRQn);
    m_ipc_cb.state = NRFX_DRV_STATE_INITIALIZED;
    m_ipc_cb.handler = handler;
    m_ipc_cb.p_context = p_context;
    return NRFX_SUCCESS;
 }
 void nrfx_ipc_config_load(const nrfx_ipc_config_t * p_config)
 {
    NRFX_ASSERT(p_config);
    NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED);
    uint32_t i;
    for (i = 0; i < IPC_CONF_NUM; ++i)
    {
        nrf_ipc_send_config_set(NRF_IPC, i, p_config->send_task_config[i]);
    }
    for (i = 0; i < IPC_CONF_NUM; ++i)
    {
        nrf_ipc_receive_config_set(NRF_IPC, i, p_config->receive_event_config[i]);
    }
    nrf_ipc_int_enable(NRF_IPC, p_config->receive_events_enabled);
 }
 void nrfx_ipc_uninit(void)
 {
    NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED);
    uint32_t i;
    for (i = 0; i < IPC_CONF_NUM; ++i)
    {
        nrf_ipc_send_config_set(NRF_IPC, i, 0);
    }
    for (i = 0; i < IPC_CONF_NUM; ++i)
    {
        nrf_ipc_receive_config_set(NRF_IPC, i, 0);
    }
    nrf_ipc_int_disable(NRF_IPC, 0xFFFFFFFF);
    m_ipc_cb.state = NRFX_DRV_STATE_UNINITIALIZED;
 }
 void nrfx_ipc_receive_event_enable(uint8_t event_index)
 {
    NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED);
    nrf_ipc_int_enable(NRF_IPC, (1UL << event_index));
 }
 void nrfx_ipc_receive_event_disable(uint8_t event_index)
 {
    NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED);
    nrf_ipc_int_disable(NRF_IPC, (1UL << event_index));
 }
 void nrfx_ipc_receive_event_group_enable(uint32_t event_bitmask)
 {
    NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED);
    nrf_ipc_int_enable(NRF_IPC, event_bitmask);
 }
 void nrfx_ipc_receive_event_group_disable(uint32_t event_bitmask)
 {
    NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED);
    nrf_ipc_int_disable(NRF_IPC, event_bitmask);
 }
 void nrfx_ipc_receive_event_channel_assign(uint8_t event_index, uint8_t channel_index)
 {
    NRFX_ASSERT(channel_index < IPC_CH_NUM);
    uint32_t channel_bitmask = (1UL << channel_index);
    channel_bitmask |= nrf_ipc_receive_config_get(NRF_IPC, event_index);
    nrf_ipc_receive_config_set(NRF_IPC, event_index, channel_bitmask);
 }
 void nrfx_ipc_send_task_channel_assign(uint8_t send_index, uint8_t channel_index)
 {
    NRFX_ASSERT(channel_index < IPC_CH_NUM);
    uint32_t channel_bitmask = (1UL << channel_index);
    channel_bitmask |= nrf_ipc_send_config_get(NRF_IPC, send_index);
    nrf_ipc_send_config_set(NRF_IPC, send_index, channel_bitmask);
 }
 void nrfx_ipc_irq_handler(void)
 {
    // Get the information about events that fire this interrupt
    uint32_t events_map = nrf_ipc_int_pending_get(NRF_IPC);
    // Clear these events
    uint32_t bitmask = events_map;
    while (bitmask)
    {
        uint8_t event_idx = __CLZ(__RBIT(bitmask));
        bitmask &= ~(1UL << event_idx);
        nrf_ipc_event_clear(NRF_IPC, nrf_ipc_receive_event_get(event_idx));
    }
    // Execute interrupt handler to provide information about events to app
    m_ipc_cb.handler(events_map, m_ipc_cb.p_context);
 }
 #endif // NRFX_CHECK(NRFX_IPC_ENABLED)
--- a/drivers/src/nrfx_lpcomp.c
+++ b/drivers/src/nrfx_lpcomp.c
@ -52,9 +52,10 @@ static nrfx_drv_state_t             m_state = NRFX_DRV_STATE_UNINITIALIZED;
 static void lpcomp_execute_handler(nrf_lpcomp_event_t event, uint32_t event_mask)
 {
-    if (nrf_lpcomp_event_check(event) && nrf_lpcomp_int_enable_check(event_mask))
+    if (nrf_lpcomp_event_check(NRF_LPCOMP, event) &&
        nrf_lpcomp_int_enable_check(NRF_LPCOMP, event_mask))
    {
-        nrf_lpcomp_event_clear(event);
+        nrf_lpcomp_event_clear(NRF_LPCOMP, event);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(event));
        m_lpcomp_event_handler(event);
@ -98,31 +99,31 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config,
    }
 #endif
-    nrf_lpcomp_configure(&(p_config->hal));
+    nrf_lpcomp_configure(NRF_LPCOMP, &(p_config->hal));
-    nrf_lpcomp_input_select(p_config->input);
+    nrf_lpcomp_input_select(NRF_LPCOMP, p_config->input);
    switch (p_config->hal.detection)
    {
        case NRF_LPCOMP_DETECT_UP:
-            nrf_lpcomp_int_enable(LPCOMP_INTENSET_UP_Msk);
+            nrf_lpcomp_int_enable(NRF_LPCOMP, LPCOMP_INTENSET_UP_Msk);
            break;
        case NRF_LPCOMP_DETECT_DOWN:
-            nrf_lpcomp_int_enable(LPCOMP_INTENSET_DOWN_Msk);
+            nrf_lpcomp_int_enable(NRF_LPCOMP, LPCOMP_INTENSET_DOWN_Msk);
            break;
        case NRF_LPCOMP_DETECT_CROSS:
-            nrf_lpcomp_int_enable(LPCOMP_INTENSET_CROSS_Msk);
+            nrf_lpcomp_int_enable(NRF_LPCOMP, LPCOMP_INTENSET_CROSS_Msk);
            break;
        default:
            break;
    }
-    nrf_lpcomp_shorts_enable(NRF_LPCOMP_SHORT_READY_SAMPLE_MASK);
+    nrf_lpcomp_shorts_enable(NRF_LPCOMP, NRF_LPCOMP_SHORT_READY_SAMPLE_MASK);
-    NRFX_IRQ_PRIORITY_SET(LPCOMP_IRQn, p_config->interrupt_priority);
+    NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_LPCOMP), p_config->interrupt_priority);
-    NRFX_IRQ_ENABLE(LPCOMP_IRQn);
+    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_LPCOMP));
    m_state = NRFX_DRV_STATE_INITIALIZED;
@ -137,7 +138,7 @@ void nrfx_lpcomp_uninit(void)
    {
        return;
    }
-    NRFX_IRQ_DISABLE(LPCOMP_IRQn);
+    NRFX_IRQ_DISABLE(nrfx_get_irq_number(NRF_LPCOMP));
    nrfx_lpcomp_disable();
 #if NRFX_CHECK(NRFX_PRS_ENABLED)
    nrfx_prs_release(NRF_LPCOMP);
@ -150,8 +151,8 @@ void nrfx_lpcomp_uninit(void)
 void nrfx_lpcomp_enable(void)
 {
    NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED);
-    nrf_lpcomp_enable();
+    nrf_lpcomp_enable(NRF_LPCOMP);
-    nrf_lpcomp_task_trigger(NRF_LPCOMP_TASK_START);
+    nrf_lpcomp_task_trigger(NRF_LPCOMP, NRF_LPCOMP_TASK_START);
    m_state = NRFX_DRV_STATE_POWERED_ON;
    NRFX_LOG_INFO("Enabled.");
 }
@ -159,8 +160,8 @@ void nrfx_lpcomp_enable(void)
 void nrfx_lpcomp_disable(void)
 {
    NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON);
-    nrf_lpcomp_disable();
+    nrf_lpcomp_disable(NRF_LPCOMP);
-    nrf_lpcomp_task_trigger(NRF_LPCOMP_TASK_STOP);
+    nrf_lpcomp_task_trigger(NRF_LPCOMP, NRF_LPCOMP_TASK_STOP);
    m_state = NRFX_DRV_STATE_INITIALIZED;
    NRFX_LOG_INFO("Disabled.");
 }
--- a/drivers/src/nrfx_nfct.c
+++ b/drivers/src/nrfx_nfct.c
@ -38,43 +38,53 @@
 #define NRFX_LOG_MODULE NFCT
 #include <nrfx_log.h>
-#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || defined(NRF52840_XXAA)
+#if !defined(USE_WORKAROUND_FOR_ANOMALY_79) &&          \
-#define USE_TIMER_WORKAROUND
+    (defined(NRF52832_XXAA) || defined(NRF52832_XXAB))
 #define USE_WORKAROUND_FOR_ANOMALY_79 1
 #endif
-#ifdef USE_TIMER_WORKAROUND
+#if !defined(USE_WORKAROUND_FOR_ANOMALY_190) &&          \
    (defined(NRF52833_XXAA) || defined(NRF52840_XXAA) || \
     defined(NRF5340_XXAA_APPLICATION))
 #define USE_WORKAROUND_FOR_ANOMALY_190 1
 #endif
 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79) || NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
 #define NFCT_WORKAROUND_USES_TIMER 1
 #endif
 #if NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER)
 #include <nrfx_timer.h>
 typedef struct
 {
    const nrfx_timer_t timer;                     /**< Timer instance that supports the correct NFC field detection. */
-#ifdef NRF52840_XXAA
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
    bool               fieldevents_filter_active; /**< Flag that indicates that the field events are ignored. */
    bool               is_hfclk_on;               /**< HFCLK has started - one of the NFC activation conditions. */
    bool               is_delayed;                /**< Required time delay has passed - one of the NFC activation conditions. */
 #else
    uint32_t           field_state_cnt;           /**< Counter of the FIELDLOST events. */
-#endif // NRF52840_XXAA
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
 } nrfx_nfct_timer_workaround_t;
-#ifdef NRF52840_XXAA
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
    #define NRFX_NFCT_ACTIVATE_DELAY     1000 /**< Minimal delay in us between NFC field detection and activation of NFCT. */
    #define NRFX_NFCT_TIMER_PERIOD       NRFX_NFCT_ACTIVATE_DELAY
 #else
    #define NRFX_NFCT_FIELDLOST_THR      7
    #define NRFX_NFCT_FIELD_TIMER_PERIOD 100  /**< Field polling period in us. */
    #define NRFX_NFCT_TIMER_PERIOD       NRFX_NFCT_FIELD_TIMER_PERIOD
-#endif // NRF52840_XXAA
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
 #define NRFX_NFCT_TIMER_INSTANCE         4    /**< Timer instance used for various workarounds for the NFCT HW issues.*/
 static nrfx_nfct_timer_workaround_t m_timer_workaround =
 {
-    .timer = NRFX_TIMER_INSTANCE(NRFX_NFCT_TIMER_INSTANCE),
+    .timer = NRFX_TIMER_INSTANCE(NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID),
 };
-#endif // USE_TIMER_WORKAROUND
+#endif // NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER)
 #define NRFX_NFCT_FRAMEDELAYMAX_52840S (0xFFFFUL) /**< Bit mask of the FRAMEDELAYMAX field for the first sample of 52840.*/
 #define NRFX_NFCT_FWT_MAX_DIFF         1u             /**< The maximal difference between the requested FWT and HW-limited FWT settings.*/
 #define NFCT_FRAMEDELAYMAX_DEFAULT     (0x00001000UL) /**< Default value of the FRAMEDELAYMAX. */
 /* Mask of all possible interrupts that are relevant for data reception. */
 #define NRFX_NFCT_RX_INT_MASK (NRF_NFCT_INT_RXFRAMESTART_MASK | \
@ -105,8 +115,9 @@ static nrfx_nfct_timer_workaround_t m_timer_workaround =
 #define NRFX_NFCT_BITS_TO_BYTES(_bits)  ((_bits)  >> 3)
 /* Macro for checking whether the NFCT interrupt is active. */
-#define NRFX_NFCT_EVT_ACTIVE(_name) (nrf_nfct_event_check(NRFX_CONCAT_2(NRF_NFCT_EVENT_, _name)) &&        \
+#define NRFX_NFCT_EVT_ACTIVE(_name) \
-                                     nrf_nfct_int_enable_check(NRFX_CONCAT_3(NRF_NFCT_INT_, _name, _MASK)))
+    (nrf_nfct_event_check(NRF_NFCT, NRFX_CONCAT_2(NRF_NFCT_EVENT_, _name)) && \
     nrf_nfct_int_enable_check(NRF_NFCT, NRFX_CONCAT_3(NRF_NFCT_INT_, _name, _MASK)))
 /* Macro for callback execution. */
 #define NRFX_NFCT_CB_HANDLE(_cb, _evt) \
@ -123,62 +134,13 @@ typedef enum
    NRFX_NFC_FIELD_STATE_UNKNOWN /**< Both NFCT field events have been set - ambiguous state. */
 } nrfx_nfct_field_state_t;
 #ifdef NRF52840_XXAA
 /**
 * @brief Internal auxiliary function for checking whether the program is running on the NRF52840 chip.
 *
 * @retval true  It is NRF52480 chip.
 * @retval false It is an other chip.
 */
 static inline bool nrfx_nfct_type_52840_check(void)
 {
    return ((((*(uint32_t *)0xF0000FE0) & 0xFF) == 0x08) &&
        (((*(uint32_t *)0xF0000FE4) & 0x0F) == 0x0));
 }
 /**
 * @brief Internal auxiliary function for checking whether the program is running on the first sample of
 *        the nRF52840 chip.
 *
 * @retval true  It is the nRF52480 chip and it is the first sample version.
 * @retval false It is an other chip.
 */
 static inline bool nrfx_nfct_type_52840_sample_check(void)
 {
    return ( nrfx_nfct_type_52840_check() &&
               ( ((*(uint32_t *)0xF0000FE8) & 0xF0) == 0x00 ) &&
               ( ((*(uint32_t *)0xF0000FEC) & 0xF0) == 0x00 ) );
 }
 /**
 * @brief Internal auxiliary function for checking whether the program is running on the final version of
 *        the nRF52840 chip.
 *
 * @retval true  It is the nRF52480 chip and it is the final version.
 * @retval false It is an other chip.
 */
 static inline bool nrfx_nfct_type_52840_final_check(void)
 {
    return ( nrfx_nfct_type_52840_check() &&
              ( ( ((*(uint32_t *)0xF0000FE8) & 0xF0) != 0x00 ) ||
                ( ((*(uint32_t *)0xF0000FEC) & 0xF0) != 0x00 ) ));
 }
 typedef struct
 {
    bool eng_a;  /**< Engineering sample A of the NRF52840 chip. */
    bool eng_bc; /**< Engineering sample B, C of the NRF52840 chip, or its final version. */
 } nrfx_nfct_nrf52840_ver_t;
 static nrfx_nfct_nrf52840_ver_t m_nrf52840;
 #endif // NRF52840_XXAA
 /**@brief NFCT control block. */
 typedef struct
 {
    nrfx_nfct_config_t config;
    nrfx_drv_state_t   state;
    volatile bool      field_on;
    uint32_t           frame_delay_max;
 } nrfx_nfct_control_block_t;
 static nrfx_nfct_control_block_t m_nfct_cb;
@ -188,30 +150,28 @@ static nrfx_nfct_control_block_t m_nfct_cb;
 */
 static void nrfx_nfct_hw_init_setup(void)
 {
 #ifdef NRF52840_XXAA
    if (m_nrf52840.eng_a)
    {
        /* Begin: Bugfix for FTPAN-98 */
        *(volatile uint32_t *) 0x4000568C = 0x00038148;
        /* End: Bugfix for FTPAN-98 */
        /* Begin: Bugfix for FTPAN-144 */
        *(volatile uint32_t *) 0x4000561c = 0x01;
        *(volatile uint32_t *) 0x4000562c = 0x3F;
        *(volatile uint32_t *) 0x4000563c = 0x0;
        /* End: Bugfix for FTPAN-144 */
    }
 #endif // NRF52840_XXAA
    // Use Window Grid frame delay mode.
-    nrf_nfct_frame_delay_mode_set(NRF_NFCT_FRAME_DELAY_MODE_WINDOWGRID);
+    nrf_nfct_frame_delay_mode_set(NRF_NFCT, NRF_NFCT_FRAME_DELAY_MODE_WINDOWGRID);
    /* Begin: Bugfix for FTPAN-25 (IC-9929) */
    /* Workaround for wrong SENSRES values require using SDD00001, but here SDD00100 is used
       because it is required to operate with Windows Phone */
-    nrf_nfct_sensres_bit_frame_sdd_set(NRF_NFCT_SENSRES_BIT_FRAME_SDD_00100);
+    nrf_nfct_sensres_bit_frame_sdd_set(NRF_NFCT, NRF_NFCT_SENSRES_BIT_FRAME_SDD_00100);
    /* End: Bugfix for FTPAN-25 (IC-9929) */
 }
 static void nrfx_nfct_frame_delay_max_set(bool default_delay)
 {
    if (default_delay)
    {
        nrf_nfct_frame_delay_max_set(NRF_NFCT, NFCT_FRAMEDELAYMAX_DEFAULT);
    }
    else
    {
        nrf_nfct_frame_delay_max_set(NRF_NFCT, m_nfct_cb.frame_delay_max);
    }
 }
 /**@brief Function for evaluating and handling the NFC field events.
 *
 * @param[in]  field_state  Current field state.
@ -220,17 +180,18 @@ static void nrfx_nfct_field_event_handler(volatile nrfx_nfct_field_state_t field
 {
    nrfx_nfct_evt_t nfct_evt;
-#ifdef NRF52840_XXAA
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
-    if((!m_nrf52840.eng_a) && (m_timer_workaround.fieldevents_filter_active))
+    if(m_timer_workaround.fieldevents_filter_active)
    {
        return;
    }
-#endif // NRF52840_XXAA
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
    if (field_state == NRFX_NFC_FIELD_STATE_UNKNOWN)
    {
        /* Probe NFC field */
-        field_state = (nrfx_nfct_field_check()) ? NRFX_NFC_FIELD_STATE_ON : NRFX_NFC_FIELD_STATE_OFF;
+        field_state = (nrfx_nfct_field_check()) ? NRFX_NFC_FIELD_STATE_ON :
                                                  NRFX_NFC_FIELD_STATE_OFF;
    }
    /* Field event service */
@ -239,23 +200,22 @@ static void nrfx_nfct_field_event_handler(volatile nrfx_nfct_field_state_t field
        case NRFX_NFC_FIELD_STATE_ON:
            if (!m_nfct_cb.field_on)
            {
-#ifdef NRF52840_XXAA
+#if NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER)
 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
                /* Begin: Bugfix for FTPAN-190 */
                if (!m_nrf52840.eng_a)
                {
                m_timer_workaround.is_hfclk_on               = false;
                m_timer_workaround.is_delayed                = false;
                m_timer_workaround.fieldevents_filter_active = true;
                nrfx_timer_clear(&m_timer_workaround.timer);
                nrfx_timer_enable(&m_timer_workaround.timer);
                }
                /* END: Bugfix for FTPAN-190 */
-#elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
+#elif NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79)
                nrfx_timer_clear(&m_timer_workaround.timer);
                nrfx_timer_enable(&m_timer_workaround.timer);
                m_timer_workaround.field_state_cnt = 0;
-#endif // NRF52840_XXAA
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
 #endif // NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER)
                m_nfct_cb.field_on = true;
                nfct_evt.evt_id    = NRFX_NFCT_EVT_FIELD_DETECTED;
@ -265,18 +225,12 @@ static void nrfx_nfct_field_event_handler(volatile nrfx_nfct_field_state_t field
        case NRFX_NFC_FIELD_STATE_OFF:
            nrfx_nfct_state_force(NRFX_NFCT_STATE_SENSING);
-#ifdef NRF52840_XXAA
+            nrf_nfct_int_disable(NRF_NFCT, NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
            /* Begin: Bugfix for FTPAN-116 (IC-12886) */
            if (m_nrf52840.eng_a)
            {
                *(volatile uint32_t *)0x40005010 = 1;
            }
            /* END: Bugfix for FTPAN-116 (IC-12886) */
 #endif // NRF52840_XXAA
            nrf_nfct_int_disable(NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
            m_nfct_cb.field_on = false;
            nfct_evt.evt_id    = NRFX_NFCT_EVT_FIELD_LOST;
            nrfx_nfct_frame_delay_max_set(true);
            NRFX_NFCT_CB_HANDLE(m_nfct_cb.config.cb, nfct_evt);
            break;
@ -286,9 +240,9 @@ static void nrfx_nfct_field_event_handler(volatile nrfx_nfct_field_state_t field
    }
 }
-#ifdef USE_TIMER_WORKAROUND
+#if NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER)
-#ifdef NRF52840_XXAA
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
 static void nrfx_nfct_activate_check(void)
 {
    static bool is_field_validation_pending = false;
@ -305,7 +259,7 @@ static void nrfx_nfct_activate_check(void)
    if ((m_timer_workaround.is_hfclk_on) && (m_timer_workaround.is_delayed))
    {
-        nrf_nfct_task_trigger(NRF_NFCT_TASK_ACTIVATE);
+        nrf_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_ACTIVATE);
        is_field_validation_pending = true;
        // Start the timer second time to validate whether the tag has locked to the field.
@ -313,9 +267,9 @@ static void nrfx_nfct_activate_check(void)
        nrfx_timer_enable(&m_timer_workaround.timer);
    }
 }
-#endif // NRF52840_XXAA
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
-#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79)
 static inline void nrfx_nfct_reset(void)
 {
    uint32_t                       fdm;
@ -325,10 +279,10 @@ static inline void nrfx_nfct_reset(void)
    nrf_nfct_selres_protocol_t     protocol;
    // Save parameter settings before the reset of the NFCT peripheral.
-    fdm         = nrf_nfct_frame_delay_max_get();
+    fdm         = nrf_nfct_frame_delay_max_get(NRF_NFCT);
-    nfcid1_size = nrf_nfct_nfcid1_get(nfcid1);
+    nfcid1_size = nrf_nfct_nfcid1_get(NRF_NFCT, nfcid1);
-    protocol    = nrf_nfct_selsres_protocol_get();
+    protocol    = nrf_nfct_selres_protocol_get(NRF_NFCT);
-    int_enabled = nrf_nfct_int_enable_get();
+    int_enabled = nrf_nfct_int_enable_get(NRF_NFCT);
    // Reset the NFCT peripheral.
    *(volatile uint32_t *)0x40005FFC = 0;
@ -336,18 +290,18 @@ static inline void nrfx_nfct_reset(void)
    *(volatile uint32_t *)0x40005FFC = 1;
    // Restore parameter settings after the reset of the NFCT peripheral.
-    nrf_nfct_frame_delay_max_set(fdm);
+    nrf_nfct_frame_delay_max_set(NRF_NFCT, fdm);
-    nrf_nfct_nfcid1_set(nfcid1, nfcid1_size);
+    nrf_nfct_nfcid1_set(NRF_NFCT, nfcid1, nfcid1_size);
-    nrf_nfct_selres_protocol_set(protocol);
+    nrf_nfct_selres_protocol_set(NRF_NFCT, protocol);
    // Restore general HW configuration.
    nrfx_nfct_hw_init_setup();
    // Restore interrupts.
-    nrf_nfct_int_enable(int_enabled);
+    nrf_nfct_int_enable(NRF_NFCT, int_enabled);
    // Disable interrupts associated with data exchange.
-    nrf_nfct_int_disable(NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
+    nrf_nfct_int_disable(NRF_NFCT, NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
    NRFX_LOG_INFO("Reinitialize");
 }
@ -366,6 +320,8 @@ static void nrfx_nfct_field_poll(void)
            nrfx_timer_disable(&m_timer_workaround.timer);
            m_nfct_cb.field_on = false;
            nrfx_nfct_frame_delay_max_set(true);
            /* Begin: Bugfix for FTPAN-116 */
            // resume the NFCT to initialized state
            nrfx_nfct_reset();
@ -378,7 +334,7 @@ static void nrfx_nfct_field_poll(void)
    m_timer_workaround.field_state_cnt = 0;
 }
-#endif // defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79)
 static void nrfx_nfct_field_timer_handler(nrf_timer_event_t event_type, void * p_context)
 {
@ -389,14 +345,14 @@ static void nrfx_nfct_field_timer_handler(nrf_timer_event_t event_type, void * p
        return;
    }
-#ifdef NRF52840_XXAA
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
    m_timer_workaround.is_delayed = true;
    nrfx_timer_disable(&m_timer_workaround.timer);
    nrfx_nfct_activate_check();
 #else
    nrfx_nfct_field_poll();
-#endif //NRF52840_XXAA
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
 }
 static inline nrfx_err_t nrfx_nfct_field_timer_config(void)
@ -407,10 +363,12 @@ static inline nrfx_err_t nrfx_nfct_field_timer_config(void)
        .frequency          = NRF_TIMER_FREQ_1MHz,
        .mode               = NRF_TIMER_MODE_TIMER,
        .bit_width          = NRF_TIMER_BIT_WIDTH_16,
-        .interrupt_priority = NRFX_NFCT_CONFIG_IRQ_PRIORITY
+        .interrupt_priority = NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY
    };
-    err_code = nrfx_timer_init(&m_timer_workaround.timer, &timer_cfg, nrfx_nfct_field_timer_handler);
+    err_code = nrfx_timer_init(&m_timer_workaround.timer,
                               &timer_cfg,
                               nrfx_nfct_field_timer_handler);
    if (err_code != NRFX_SUCCESS)
    {
        return err_code;
@ -418,15 +376,17 @@ static inline nrfx_err_t nrfx_nfct_field_timer_config(void)
    nrfx_timer_extended_compare(&m_timer_workaround.timer,
                                NRF_TIMER_CC_CHANNEL0,
-                                nrfx_timer_us_to_ticks(&m_timer_workaround.timer, NRFX_NFCT_TIMER_PERIOD),
+                                nrfx_timer_us_to_ticks(&m_timer_workaround.timer,
                                                       NRFX_NFCT_TIMER_PERIOD),
                                NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK,
                                true);
    return err_code;
 }
-#endif // USE_TIMER_WORKAROUND
+#endif // NFCT_WORKAROUND_USES_TIMER
-static inline nrf_nfct_sensres_nfcid1_size_t nrf_nfct_nfcid1_size_to_sensres_size(uint8_t nfcid1_size)
+static inline
 nrf_nfct_sensres_nfcid1_size_t nrf_nfct_nfcid1_size_to_sensres_size(uint8_t nfcid1_size)
 {
    switch (nfcid1_size)
    {
@ -446,7 +406,7 @@ static inline nrf_nfct_sensres_nfcid1_size_t nrf_nfct_nfcid1_size_to_sensres_siz
 static inline void nrfx_nfct_rxtx_int_enable(uint32_t rxtx_int_mask)
 {
-    nrf_nfct_int_enable(rxtx_int_mask & m_nfct_cb.config.rxtx_int_mask);
+    nrf_nfct_int_enable(NRF_NFCT, rxtx_int_mask & m_nfct_cb.config.rxtx_int_mask);
 }
 nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config)
@ -460,34 +420,24 @@ nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config)
        return NRFX_ERROR_INVALID_STATE;
    }
 #ifdef NRF52840_XXAA
    m_nrf52840.eng_a  = nrfx_nfct_type_52840_sample_check();
    m_nrf52840.eng_bc = nrfx_nfct_type_52840_final_check();
 #endif // NRF52840_XXAA
    m_nfct_cb.config = *p_config;
    nrfx_nfct_hw_init_setup();
    NRFX_IRQ_PENDING_CLEAR(NFCT_IRQn);
-    NRFX_IRQ_PRIORITY_SET(NFCT_IRQn, NRFX_NFCT_CONFIG_IRQ_PRIORITY);
+    NRFX_IRQ_PRIORITY_SET(NFCT_IRQn, NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY);
    NRFX_IRQ_ENABLE(NFCT_IRQn);
-#ifdef USE_TIMER_WORKAROUND
+#if NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER)
    /* Initialize Timer module as the workaround for NFCT HW issues. */
    #ifdef NRF52840_XXAA
    if (!m_nrf52840.eng_a)
    #endif // NRF52840_XXAA
    {
    err_code = nrfx_nfct_field_timer_config();
-    }
+#endif // NFCT_WORKAROUND_USES_TIMER
 #endif // USE_TIMER_WORKAROUND
    if (err_code == NRFX_SUCCESS)
    {
        uint8_t default_nfcid1[NRFX_NFCT_NFCID1_DEFAULT_LEN];
        err_code = nrfx_nfct_nfcid1_default_bytes_get(default_nfcid1, sizeof(default_nfcid1));
        NRFX_ASSERT(err_code == NRFX_SUCCESS);
-        nrf_nfct_nfcid1_set(default_nfcid1, NRF_NFCT_SENSRES_NFCID1_SIZE_DEFAULT);
+        nrf_nfct_nfcid1_set(NRF_NFCT, default_nfcid1, NRF_NFCT_SENSRES_NFCID1_SIZE_DEFAULT);
    }
    else
    {
@ -495,6 +445,7 @@ nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config)
    }
    m_nfct_cb.state           = NRFX_DRV_STATE_INITIALIZED;
    m_nfct_cb.frame_delay_max = NFCT_FRAMEDELAYMAX_DEFAULT;
    NRFX_LOG_INFO("Initialized");
    return err_code;
@ -511,28 +462,24 @@ void nrfx_nfct_uninit(void)
    NRFX_IRQ_DISABLE(NFCT_IRQn);
    NRFX_IRQ_PENDING_CLEAR(NFCT_IRQn);
-#ifdef USE_TIMER_WORKAROUND
+#if NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER)
-    /* Initialize Timer module as the workaround for NFCT HW issues. */
+    /* De-initialize Timer module as the workaround for NFCT HW issues. */
    #ifdef NRF52840_XXAA
    if (!m_nrf52840.eng_a)
    #endif // NRF52840_XXAA
    {
    nrfx_timer_uninit(&m_timer_workaround.timer);
-    }
+#endif // NFCT_WORKAROUND_USES_TIMER
 #endif // USE_TIMER_WORKAROUND
    m_nfct_cb.state = NRFX_DRV_STATE_UNINITIALIZED;
 }
 void nrfx_nfct_enable(void)
 {
-    nrf_nfct_error_status_clear(NRFX_NFCT_ERROR_STATUS_ALL_MASK);
+    nrf_nfct_error_status_clear(NRF_NFCT, NRFX_NFCT_ERROR_STATUS_ALL_MASK);
-    nrf_nfct_task_trigger(NRF_NFCT_TASK_SENSE);
+    nrf_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_SENSE);
-    nrf_nfct_int_enable(NRF_NFCT_INT_FIELDDETECTED_MASK | NRF_NFCT_INT_ERROR_MASK |
+    nrf_nfct_int_enable(NRF_NFCT, NRF_NFCT_INT_FIELDDETECTED_MASK |
                                  NRF_NFCT_INT_ERROR_MASK         |
                                  NRF_NFCT_INT_SELECTED_MASK);
 #if !defined(NRF52832_XXAA) && !defined(NRF52832_XXAB)
-    nrf_nfct_int_enable(NRF_NFCT_INT_FIELDLOST_MASK);
+    nrf_nfct_int_enable(NRF_NFCT, NRF_NFCT_INT_FIELDLOST_MASK);
 #endif //!defined(NRF52832_XXAA) && !defined(NRF52832_XXAB)
    NRFX_LOG_INFO("Start");
@ -540,15 +487,15 @@ void nrfx_nfct_enable(void)
 void nrfx_nfct_disable(void)
 {
-    nrf_nfct_int_disable(NRF_NFCT_DISABLE_ALL_INT);
+    nrf_nfct_int_disable(NRF_NFCT, NRF_NFCT_DISABLE_ALL_INT);
-    nrf_nfct_task_trigger(NRF_NFCT_TASK_DISABLE);
+    nrf_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_DISABLE);
    NRFX_LOG_INFO("Stop");
 }
 bool nrfx_nfct_field_check(void)
 {
-    uint32_t const field_state = nrf_nfct_field_status_get();
+    uint32_t const field_state = nrf_nfct_field_status_get(NRF_NFCT);
    if (((field_state & NRF_NFCT_FIELD_STATE_PRESENT_MASK) == 0) &&
        ((field_state & NRF_NFCT_FIELD_STATE_LOCK_MASK) == 0))
@ -564,10 +511,10 @@ void nrfx_nfct_rx(nrfx_nfct_data_desc_t const * p_tx_data)
 {
    NRFX_ASSERT(p_tx_data);
-    nrf_nfct_rxtx_buffer_set((uint8_t *) p_tx_data->p_data, p_tx_data->data_size);
+    nrf_nfct_rxtx_buffer_set(NRF_NFCT, (uint8_t *) p_tx_data->p_data, p_tx_data->data_size);
    nrfx_nfct_rxtx_int_enable(NRFX_NFCT_RX_INT_MASK);
-    nrf_nfct_task_trigger(NRF_NFCT_TASK_ENABLERXDATA);
+    nrf_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_ENABLERXDATA);
 }
 nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data,
@ -581,12 +528,12 @@ nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data,
        return NRFX_ERROR_INVALID_LENGTH;
    }
-    nrf_nfct_rxtx_buffer_set((uint8_t *) p_tx_data->p_data, p_tx_data->data_size);
+    nrf_nfct_rxtx_buffer_set(NRF_NFCT, (uint8_t *) p_tx_data->p_data, p_tx_data->data_size);
-    nrf_nfct_tx_bits_set(NRFX_NFCT_BYTES_TO_BITS(p_tx_data->data_size));
+    nrf_nfct_tx_bits_set(NRF_NFCT, NRFX_NFCT_BYTES_TO_BITS(p_tx_data->data_size));
-    nrf_nfct_frame_delay_mode_set((nrf_nfct_frame_delay_mode_t) delay_mode);
+    nrf_nfct_frame_delay_mode_set(NRF_NFCT, (nrf_nfct_frame_delay_mode_t) delay_mode);
    nrfx_nfct_rxtx_int_enable(NRFX_NFCT_TX_INT_MASK);
-    nrf_nfct_task_trigger(NRF_NFCT_TASK_STARTTX);
+    nrf_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_STARTTX);
    NRFX_LOG_INFO("Tx start");
    return NRFX_SUCCESS;
@ -594,16 +541,14 @@ nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data,
 void nrfx_nfct_state_force(nrfx_nfct_state_t state)
 {
-#ifdef NRF52840_XXAA
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
-    if ((m_nrf52840.eng_bc) && (state == NRFX_NFCT_STATE_ACTIVATED))
+    if (state == NRFX_NFCT_STATE_ACTIVATED)
    {
        m_timer_workaround.is_hfclk_on = true;
        nrfx_nfct_activate_check();
    }
-#endif
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
-    {
+    nrf_nfct_task_trigger(NRF_NFCT, (nrf_nfct_task_t) state);
        nrf_nfct_task_trigger((nrf_nfct_task_t) state);
    }
 }
 void nrfx_nfct_init_substate_force(nrfx_nfct_active_state_t sub_state)
@ -613,25 +558,27 @@ void nrfx_nfct_init_substate_force(nrfx_nfct_active_state_t sub_state)
 #if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
        if (((*(uint32_t volatile *)(0x40005420)) & 0x1UL) == (1UL))
 #else
-        if (nrf_nfct_sleep_state_get() == NRF_NFCT_SLEEP_STATE_SLEEP_A)
+        if (nrf_nfct_sleep_state_get(NRF_NFCT) == NRF_NFCT_SLEEP_STATE_SLEEP_A)
 #endif //defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
        {
            // Default state is SLEEP_A
-            nrf_nfct_task_trigger(NRF_NFCT_TASK_GOSLEEP);
+            nrf_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_GOSLEEP);
        }
        else
        {
            // Default state is IDLE
-            nrf_nfct_task_trigger(NRF_NFCT_TASK_GOIDLE);
+            nrf_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_GOIDLE);
        }
    }
    else
    {
-        nrf_nfct_task_trigger((nrf_nfct_task_t) sub_state);
+        nrf_nfct_task_trigger(NRF_NFCT, (nrf_nfct_task_t) sub_state);
    }
    nrfx_nfct_frame_delay_max_set(true);
    /* Disable TX/RX here (will be enabled at SELECTED) */
-    nrf_nfct_int_disable(NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
+    nrf_nfct_int_disable(NRF_NFCT, NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
 }
 nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param)
@ -645,10 +592,6 @@ nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param)
            uint32_t delay     = p_param->data.fdt;
            uint32_t delay_thr = NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk;
 #ifdef NRF52840_XXAA
            delay_thr = (m_nrf52840.eng_a) ? NRFX_NFCT_FRAMEDELAYMAX_52840S : delay_thr;
 #endif // NRF52840_XXAA
            // Delay validation.
            if (delay > (delay_thr + NRFX_NFCT_FWT_MAX_DIFF))
            {
@ -656,7 +599,7 @@ nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param)
            }
            delay = (delay > delay_thr) ? delay_thr : delay;
-            nrf_nfct_frame_delay_max_set(delay);
+            m_nfct_cb.frame_delay_max = delay;
            break;
        }
@ -666,7 +609,8 @@ nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param)
                return NRFX_ERROR_INVALID_PARAM;
            }
-            nrf_nfct_selres_protocol_set((nrf_nfct_selres_protocol_t) p_param->data.sel_res_protocol);
+            nrf_nfct_selres_protocol_set(NRF_NFCT,
                    (nrf_nfct_selres_protocol_t) p_param->data.sel_res_protocol);
            break;
        case NRFX_NFCT_PARAM_ID_NFCID1:
@ -674,7 +618,7 @@ nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param)
            nrf_nfct_sensres_nfcid1_size_t id_size_mask;
            id_size_mask = nrf_nfct_nfcid1_size_to_sensres_size(p_param->data.nfcid1.id_size);
-            nrf_nfct_nfcid1_set(p_param->data.nfcid1.p_id, id_size_mask);
+            nrf_nfct_nfcid1_set(NRF_NFCT, p_param->data.nfcid1.p_id, id_size_mask);
            break;
        }
@ -695,10 +639,16 @@ nrfx_err_t nrfx_nfct_nfcid1_default_bytes_get(uint8_t * const p_nfcid1_buff,
        return NRFX_ERROR_INVALID_LENGTH;
    }
 #if defined(FICR_NFC_TAGHEADER0_MFGID_Msk)
    uint32_t nfc_tag_header0 = NRF_FICR->NFC.TAGHEADER0;
    uint32_t nfc_tag_header1 = NRF_FICR->NFC.TAGHEADER1;
    uint32_t nfc_tag_header2 = NRF_FICR->NFC.TAGHEADER2;
 #else
    uint32_t nfc_tag_header0 = 0x5F;
    uint32_t nfc_tag_header1 = 0;
    uint32_t nfc_tag_header2 = 0;
 #endif
    p_nfcid1_buff[0] = (uint8_t) (nfc_tag_header0 >> 0);
    p_nfcid1_buff[1] = (uint8_t) (nfc_tag_header0 >> 8);
    p_nfcid1_buff[2] = (uint8_t) (nfc_tag_header0 >> 16);
@ -734,7 +684,7 @@ void nrfx_nfct_autocolres_enable(void)
 #if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
    (*(uint32_t *)(0x4000559C)) &= (~(0x1UL));
 #else
-    nrf_nfct_autocolres_enable();
+    nrf_nfct_autocolres_enable(NRF_NFCT);
 #endif //defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
 }
@ -743,7 +693,7 @@ void nrfx_nfct_autocolres_disable(void)
 #if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
    (*(uint32_t *)(0x4000559C)) |= (0x1UL);
 #else
-    nrf_nfct_autocolres_disable();
+    nrf_nfct_autocolres_disable(NRF_NFCT);
 #endif //defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
 }
@ -753,22 +703,22 @@ void nrfx_nfct_irq_handler(void)
    if (NRFX_NFCT_EVT_ACTIVE(FIELDDETECTED))
    {
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_FIELDDETECTED);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_FIELDDETECTED);
        current_field = NRFX_NFC_FIELD_STATE_ON;
        NRFX_LOG_DEBUG("Field detected");
    }
-#if !defined(NRF52832_XXAA) && !defined(NRF52832_XXAB)
+#if !NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79)
    if (NRFX_NFCT_EVT_ACTIVE(FIELDLOST))
    {
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_FIELDLOST);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_FIELDLOST);
        current_field = (current_field == NRFX_NFC_FIELD_STATE_NONE) ?
                        NRFX_NFC_FIELD_STATE_OFF : NRFX_NFC_FIELD_STATE_UNKNOWN;
        NRFX_LOG_DEBUG("Field lost");
    }
-#endif //!defined(NRF52832_XXAA) && !defined(NRF52832_XXAB)
+#endif //!NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79)
    /* Perform actions if any FIELD event is active */
    if (current_field != NRFX_NFC_FIELD_STATE_NONE)
@ -778,7 +728,7 @@ void nrfx_nfct_irq_handler(void)
    if (NRFX_NFCT_EVT_ACTIVE(RXFRAMEEND))
    {
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_RXFRAMEEND);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_RXFRAMEEND);
        nrfx_nfct_evt_t nfct_evt =
        {
@ -787,32 +737,33 @@ void nrfx_nfct_irq_handler(void)
        /* Take into account only the number of whole bytes. */
        nfct_evt.params.rx_frameend.rx_status         = 0;
-        nfct_evt.params.rx_frameend.rx_data.p_data    = nrf_nfct_rxtx_buffer_get();
+        nfct_evt.params.rx_frameend.rx_data.p_data    = nrf_nfct_rxtx_buffer_get(NRF_NFCT);
-        nfct_evt.params.rx_frameend.rx_data.data_size = NRFX_NFCT_BITS_TO_BYTES(nrf_nfct_rx_bits_get(true));
+        nfct_evt.params.rx_frameend.rx_data.data_size =
            NRFX_NFCT_BITS_TO_BYTES(nrf_nfct_rx_bits_get(NRF_NFCT, true));
        if (NRFX_NFCT_EVT_ACTIVE(RXERROR))
        {
            nfct_evt.params.rx_frameend.rx_status =
-                (nrf_nfct_rx_frame_status_get() & NRFX_NFCT_FRAME_STATUS_RX_ALL_MASK);
+                (nrf_nfct_rx_frame_status_get(NRF_NFCT) & NRFX_NFCT_FRAME_STATUS_RX_ALL_MASK);
-            nrf_nfct_event_clear(NRF_NFCT_EVENT_RXERROR);
+            nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_RXERROR);
            NRFX_LOG_DEBUG("Rx error (0x%x)", (unsigned int) nfct_evt.params.rx_frameend.rx_status);
            /* Clear rx frame status */
-            nrf_nfct_rx_frame_status_clear(NRFX_NFCT_FRAME_STATUS_RX_ALL_MASK);
+            nrf_nfct_rx_frame_status_clear(NRF_NFCT, NRFX_NFCT_FRAME_STATUS_RX_ALL_MASK);
        }
        NRFX_NFCT_CB_HANDLE(m_nfct_cb.config.cb, nfct_evt);
        /* Clear TXFRAMESTART EVENT so it can be checked in hal_nfc_send */
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_TXFRAMESTART);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_TXFRAMESTART);
        NRFX_LOG_DEBUG("Rx fend");
    }
    if (NRFX_NFCT_EVT_ACTIVE(TXFRAMEEND))
    {
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_TXFRAMEEND);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_TXFRAMEEND);
        nrfx_nfct_evt_t nfct_evt =
        {
@ -820,7 +771,7 @@ void nrfx_nfct_irq_handler(void)
        };
        /* Disable TX END event to ignore frame transmission other than READ response */
-        nrf_nfct_int_disable(NRFX_NFCT_TX_INT_MASK);
+        nrf_nfct_int_disable(NRF_NFCT, NRFX_NFCT_TX_INT_MASK);
        NRFX_NFCT_CB_HANDLE(m_nfct_cb.config.cb, nfct_evt);
@ -829,17 +780,19 @@ void nrfx_nfct_irq_handler(void)
    if (NRFX_NFCT_EVT_ACTIVE(SELECTED))
    {
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_SELECTED);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_SELECTED);
        /* Clear also RX END and RXERROR events because SW does not take care of
           commands that were received before selecting the tag. */
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_RXFRAMEEND);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_RXFRAMEEND);
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_RXERROR);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_RXERROR);
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_TXFRAMESTART);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_TXFRAMESTART);
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_TXFRAMEEND);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_TXFRAMEEND);
        nrfx_nfct_frame_delay_max_set(false);
        /* At this point any previous error status can be ignored. */
-        nrf_nfct_rx_frame_status_clear(NRFX_NFCT_FRAME_STATUS_RX_ALL_MASK);
+        nrf_nfct_rx_frame_status_clear(NRF_NFCT, NRFX_NFCT_FRAME_STATUS_RX_ALL_MASK);
-        nrf_nfct_error_status_clear(NRFX_NFCT_ERROR_STATUS_ALL_MASK);
+        nrf_nfct_error_status_clear(NRF_NFCT, NRFX_NFCT_ERROR_STATUS_ALL_MASK);
        nrfx_nfct_evt_t nfct_evt =
        {
@ -852,8 +805,8 @@ void nrfx_nfct_irq_handler(void)
    if (NRFX_NFCT_EVT_ACTIVE(ERROR))
    {
-        uint32_t err_status = nrf_nfct_error_status_get();
+        uint32_t err_status = nrf_nfct_error_status_get(NRF_NFCT);
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_ERROR);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_ERROR);
        nrfx_nfct_evt_t nfct_evt =
        {
@ -863,7 +816,7 @@ void nrfx_nfct_irq_handler(void)
        /* Clear FRAMEDELAYTIMEOUT error (expected HW behaviour) when SLP_REQ command was received. */
        if (err_status & NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK)
        {
-            nrf_nfct_error_status_clear(NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK);
+            nrf_nfct_error_status_clear(NRF_NFCT, NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK);
            nfct_evt.params.error.reason = NRFX_NFCT_ERROR_FRAMEDELAYTIMEOUT;
            NRFX_NFCT_CB_HANDLE(m_nfct_cb.config.cb, nfct_evt);
@ -877,20 +830,21 @@ void nrfx_nfct_irq_handler(void)
        }
        /* Clear error status. */
-        nrf_nfct_error_status_clear(NRFX_NFCT_ERROR_STATUS_ALL_MASK);
+        nrf_nfct_error_status_clear(NRF_NFCT, NRFX_NFCT_ERROR_STATUS_ALL_MASK);
    }
    if (NRFX_NFCT_EVT_ACTIVE(TXFRAMESTART))
    {
-        nrf_nfct_event_clear(NRF_NFCT_EVENT_TXFRAMESTART);
+        nrf_nfct_event_clear(NRF_NFCT, NRF_NFCT_EVENT_TXFRAMESTART);
        if (m_nfct_cb.config.cb != NULL)
        {
            nrfx_nfct_evt_t nfct_evt;
            nfct_evt.evt_id                                 = NRFX_NFCT_EVT_TX_FRAMESTART;
-            nfct_evt.params.tx_framestart.tx_data.p_data    = nrf_nfct_rxtx_buffer_get();
+            nfct_evt.params.tx_framestart.tx_data.p_data    = nrf_nfct_rxtx_buffer_get(NRF_NFCT);
-            nfct_evt.params.tx_framestart.tx_data.data_size = NRFX_NFCT_BITS_TO_BYTES(nrf_nfct_tx_bits_get());
+            nfct_evt.params.tx_framestart.tx_data.data_size =
                NRFX_NFCT_BITS_TO_BYTES(nrf_nfct_tx_bits_get(NRF_NFCT));
            m_nfct_cb.config.cb(&nfct_evt);
        }
--- a/drivers/src/nrfx_nvmc.c
+++ b/drivers/src/nrfx_nvmc.c
@ -49,8 +49,10 @@
 * This symbol is needed to determine NVM page count for chips that cannot
 * always access FICR for this information.
 */
-#if defined(NRF9160_XXAA)
+#if defined(NRF9160_XXAA) || defined(NRF5340_XXAA_APPLICATION)
    #define NVMC_FLASH_PAGE_COUNT  256
 #elif defined(NRF5340_XXAA_NETWORK)
    #define NVMC_FLASH_PAGE_COUNT  128
 #endif
 /**
@ -59,8 +61,10 @@
 * This symbol is needed to determine NVM page size for chips that cannot
 * always access FICR for this information.
 */
-#if defined(NRF9160_XXAA)
+#if defined(NRF9160_XXAA) || defined(NRF5340_XXAA_APPLICATION)
    #define NVMC_FLASH_PAGE_SIZE  0x1000 ///< 4 kB
 #elif defined(NRF5340_XXAA_NETWORK)
    #define NVMC_FLASH_PAGE_SIZE  0x800  ///< 2 kB
 #endif
 #if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
@ -71,7 +75,8 @@
 */
 #if defined(NRF52810_XXAA) || defined(NRF52811_XXAA) || defined(NRF52840_XXAA)
    #define NVMC_PAGE_ERASE_DURATION_MS  85
-#elif defined(NRF9160_XXAA)
+#elif defined(NRF52833_XXAA) || defined(NRF9160_XXAA) || \
      defined(NRF5340_XXAA_APPLICATION) || defined(NRF5340_XXAA_NETWORK)
    #define NVMC_PAGE_ERASE_DURATION_MS  87
 #else
    #error "Page partial erase present but could not determine its total duration for given SoC"
--- a/drivers/src/nrfx_pdm.c
+++ b/drivers/src/nrfx_pdm.c
@ -73,9 +73,9 @@ static nrfx_pdm_cb_t m_cb;
 void nrfx_pdm_irq_handler(void)
 {
-    if (nrf_pdm_event_check(NRF_PDM_EVENT_STARTED))
+    if (nrf_pdm_event_check(NRF_PDM, NRF_PDM_EVENT_STARTED))
    {
-        nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED);
+        nrf_pdm_event_clear(NRF_PDM, NRF_PDM_EVENT_STARTED);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_PDM_EVENT_STARTED));
        uint8_t finished_buffer = m_cb.active_buffer;
@ -125,11 +125,11 @@ void nrfx_pdm_irq_handler(void)
            m_cb.op_state = NRFX_PDM_STATE_RUNNING;
        }
    }
-    else if (nrf_pdm_event_check(NRF_PDM_EVENT_STOPPED))
+    else if (nrf_pdm_event_check(NRF_PDM, NRF_PDM_EVENT_STOPPED))
    {
-        nrf_pdm_event_clear(NRF_PDM_EVENT_STOPPED);
+        nrf_pdm_event_clear(NRF_PDM, NRF_PDM_EVENT_STOPPED);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_PDM_EVENT_STOPPED));
-        nrf_pdm_disable();
+        nrf_pdm_disable(NRF_PDM);
        m_cb.op_state = NRFX_PDM_STATE_IDLE;
        // Release the buffers.
@ -200,21 +200,21 @@ nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config,
    m_cb.event_handler = event_handler;
    m_cb.op_state = NRFX_PDM_STATE_IDLE;
-    nrf_pdm_clock_set(p_config->clock_freq);
+    nrf_pdm_clock_set(NRF_PDM, p_config->clock_freq);
-    nrf_pdm_mode_set(p_config->mode, p_config->edge);
+    nrf_pdm_mode_set(NRF_PDM, p_config->mode, p_config->edge);
-    nrf_pdm_gain_set(p_config->gain_l, p_config->gain_r);
+    nrf_pdm_gain_set(NRF_PDM, p_config->gain_l, p_config->gain_r);
    nrf_gpio_cfg_output(p_config->pin_clk);
    nrf_gpio_pin_clear(p_config->pin_clk);
    nrf_gpio_cfg_input(p_config->pin_din, NRF_GPIO_PIN_NOPULL);
-    nrf_pdm_psel_connect(p_config->pin_clk, p_config->pin_din);
+    nrf_pdm_psel_connect(NRF_PDM, p_config->pin_clk, p_config->pin_din);
-    nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED);
+    nrf_pdm_event_clear(NRF_PDM, NRF_PDM_EVENT_STARTED);
-    nrf_pdm_event_clear(NRF_PDM_EVENT_END);
+    nrf_pdm_event_clear(NRF_PDM, NRF_PDM_EVENT_END);
-    nrf_pdm_event_clear(NRF_PDM_EVENT_STOPPED);
+    nrf_pdm_event_clear(NRF_PDM, NRF_PDM_EVENT_STOPPED);
-    nrf_pdm_int_enable(NRF_PDM_INT_STARTED | NRF_PDM_INT_STOPPED);
+    nrf_pdm_int_enable(NRF_PDM, NRF_PDM_INT_STARTED | NRF_PDM_INT_STOPPED);
-    NRFX_IRQ_PRIORITY_SET(PDM_IRQn, p_config->interrupt_priority);
+    NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_PDM), p_config->interrupt_priority);
-    NRFX_IRQ_ENABLE(PDM_IRQn);
+    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_PDM));
    m_cb.drv_state = NRFX_DRV_STATE_INITIALIZED;
    err_code = NRFX_SUCCESS;
@ -230,8 +230,8 @@ void nrfx_pdm_uninit(void)
    {
        return;
    }
-    nrf_pdm_disable();
+    nrf_pdm_disable(NRF_PDM);
-    nrf_pdm_psel_disconnect();
+    nrf_pdm_psel_disconnect(NRF_PDM);
    m_cb.drv_state = NRFX_DRV_STATE_UNINITIALIZED;
    NRFX_LOG_INFO("Uninitialized.");
 }
@ -239,15 +239,15 @@ void nrfx_pdm_uninit(void)
 static void pdm_start()
 {
    m_cb.drv_state = NRFX_DRV_STATE_POWERED_ON;
-    nrf_pdm_enable();
+    nrf_pdm_enable(NRF_PDM);
-    nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED);
+    nrf_pdm_event_clear(NRF_PDM, NRF_PDM_EVENT_STARTED);
-    nrf_pdm_task_trigger(NRF_PDM_TASK_START);
+    nrf_pdm_task_trigger(NRF_PDM, NRF_PDM_TASK_START);
 }
 static void pdm_buf_request()
 {
    m_cb.irq_buff_request = 1;
-    NRFX_IRQ_PENDING_SET(PDM_IRQn);
+    NRFX_IRQ_PENDING_SET(nrfx_get_irq_number(NRF_PDM));
 }
 nrfx_err_t nrfx_pdm_start(void)
@ -300,7 +300,7 @@ nrfx_err_t nrfx_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length)
    nrfx_err_t err_code = NRFX_SUCCESS;
    // Enter the PDM critical section.
-    NRFX_IRQ_DISABLE(PDM_IRQn);
+    NRFX_IRQ_DISABLE(nrfx_get_irq_number(NRF_PDM));
    uint8_t next_buffer = (~m_cb.active_buffer) & 0x01;
    if (m_cb.op_state == NRFX_PDM_STATE_STARTING)
@ -317,7 +317,7 @@ nrfx_err_t nrfx_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length)
    {
        m_cb.buff_address[next_buffer] = buffer;
        m_cb.buff_length[next_buffer] = buffer_length;
-        nrf_pdm_buffer_set((uint32_t *)buffer, buffer_length);
+        nrf_pdm_buffer_set(NRF_PDM, (uint32_t *)buffer, buffer_length);
        if (m_cb.drv_state != NRFX_DRV_STATE_POWERED_ON)
        {
@ -325,7 +325,7 @@ nrfx_err_t nrfx_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length)
        }
    }
-    NRFX_IRQ_ENABLE(PDM_IRQn);
+    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_PDM));
    return err_code;
 }
@ -339,7 +339,7 @@ nrfx_err_t nrfx_pdm_stop(void)
        if (m_cb.op_state == NRFX_PDM_STATE_IDLE ||
            m_cb.op_state == NRFX_PDM_STATE_STARTING)
        {
-            nrf_pdm_disable();
+            nrf_pdm_disable(NRF_PDM);
            m_cb.op_state = NRFX_PDM_STATE_IDLE;
            err_code = NRFX_SUCCESS;
            NRFX_LOG_INFO("Function: %s, error code: %s.",
@ -356,7 +356,7 @@ nrfx_err_t nrfx_pdm_stop(void)
    m_cb.drv_state = NRFX_DRV_STATE_INITIALIZED;
    m_cb.op_state = NRFX_PDM_STATE_STOPPING;
-    nrf_pdm_task_trigger(NRF_PDM_TASK_STOP);
+    nrf_pdm_task_trigger(NRF_PDM, NRF_PDM_TASK_STOP);
    err_code = NRFX_SUCCESS;
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
--- a/drivers/src/nrfx_power.c
+++ b/drivers/src/nrfx_power.c
@ -106,12 +106,12 @@ nrfx_err_t nrfx_power_init(nrfx_power_config_t const * p_config)
        return NRFX_ERROR_ALREADY_INITIALIZED;
    }
-#if NRF_POWER_HAS_VDDH
+#if NRF_POWER_HAS_DCDCEN_VDDH
-    nrf_power_dcdcen_vddh_set(p_config->dcdcenhv);
+    nrf_power_dcdcen_vddh_set(NRF_POWER, p_config->dcdcenhv);
 #endif
 #if NRF_POWER_HAS_DCDCEN
-    nrf_power_dcdcen_set(p_config->dcdcen);
+    nrf_power_dcdcen_set(NRF_POWER, p_config->dcdcen);
-#else
+#elif defined(REGULATORS_PRESENT)
    nrf_regulators_dcdcen_set(NRF_REGULATORS, p_config->dcdcen);
 #endif
@ -162,20 +162,20 @@ void nrfx_power_pof_init(nrfx_power_pofwarn_config_t const * p_config)
 void nrfx_power_pof_enable(nrfx_power_pofwarn_config_t const * p_config)
 {
-    nrf_power_pofcon_set(true, p_config->thr);
+    nrf_power_pofcon_set(NRF_POWER, true, p_config->thr);
 #if NRF_POWER_HAS_VDDH
-    nrf_power_pofcon_vddh_set(p_config->thrvddh);
+    nrf_power_pofcon_vddh_set(NRF_POWER, p_config->thrvddh);
 #endif
    if (m_pofwarn_handler != NULL)
    {
-        nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK);
+        nrf_power_int_enable(NRF_POWER, NRF_POWER_INT_POFWARN_MASK);
    }
 }
 void nrfx_power_pof_disable(void)
 {
-    nrf_power_pofcon_set(false, NRF_POWER_POFTHR_V27);
+    nrf_power_pofcon_set(NRF_POWER, false, NRF_POWER_POFTHR_V27);
-    nrf_power_int_disable(NRF_POWER_INT_POFWARN_MASK);
+    nrf_power_int_disable(NRF_POWER, NRF_POWER_INT_POFWARN_MASK);
 }
 void nrfx_power_pof_uninit(void)
@ -202,20 +202,19 @@ void nrfx_power_sleepevt_enable(nrfx_power_sleepevt_config_t const * p_config)
    if (p_config->en_enter)
    {
        enmask |= NRF_POWER_INT_SLEEPENTER_MASK;
-        nrf_power_event_clear(NRF_POWER_EVENT_SLEEPENTER);
+        nrf_power_event_clear(NRF_POWER, NRF_POWER_EVENT_SLEEPENTER);
    }
    if (p_config->en_exit)
    {
        enmask |= NRF_POWER_INT_SLEEPEXIT_MASK;
-        nrf_power_event_clear(NRF_POWER_EVENT_SLEEPEXIT);
+        nrf_power_event_clear(NRF_POWER, NRF_POWER_EVENT_SLEEPEXIT);
    }
-    nrf_power_int_enable(enmask);
+    nrf_power_int_enable(NRF_POWER, enmask);
 }
 void nrfx_power_sleepevt_disable(void)
 {
-    nrf_power_int_disable(
+    nrf_power_int_disable(NRF_POWER, NRF_POWER_INT_SLEEPENTER_MASK |
        NRF_POWER_INT_SLEEPENTER_MASK |
                                     NRF_POWER_INT_SLEEPEXIT_MASK);
 }
@ -239,16 +238,14 @@ void nrfx_power_usbevt_init(nrfx_power_usbevt_config_t const * p_config)
 void nrfx_power_usbevt_enable(void)
 {
-    nrf_power_int_enable(
+    nrf_power_int_enable(NRF_POWER, NRF_POWER_INT_USBDETECTED_MASK |
        NRF_POWER_INT_USBDETECTED_MASK |
                                    NRF_POWER_INT_USBREMOVED_MASK  |
                                    NRF_POWER_INT_USBPWRRDY_MASK);
 }
 void nrfx_power_usbevt_disable(void)
 {
-    nrf_power_int_disable(
+    nrf_power_int_disable(NRF_POWER, NRF_POWER_INT_USBDETECTED_MASK |
        NRF_POWER_INT_USBDETECTED_MASK |
                                     NRF_POWER_INT_USBREMOVED_MASK  |
                                     NRF_POWER_INT_USBPWRRDY_MASK);
 }
@ -262,11 +259,11 @@ void nrfx_power_usbevt_uninit(void)
 void nrfx_power_irq_handler(void)
 {
-    uint32_t enabled = nrf_power_int_enable_get();
+    uint32_t enabled = nrf_power_int_enable_get(NRF_POWER);
 #if NRF_POWER_HAS_POFCON
    if ((0 != (enabled & NRF_POWER_INT_POFWARN_MASK)) &&
-        nrf_power_event_get_and_clear(NRF_POWER_EVENT_POFWARN))
+        nrf_power_event_get_and_clear(NRF_POWER, NRF_POWER_EVENT_POFWARN))
    {
        /* Cannot be null if event is enabled */
        NRFX_ASSERT(m_pofwarn_handler != NULL);
@ -275,14 +272,14 @@ void nrfx_power_irq_handler(void)
 #endif
 #if NRF_POWER_HAS_SLEEPEVT
    if ((0 != (enabled & NRF_POWER_INT_SLEEPENTER_MASK)) &&
-        nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPENTER))
+        nrf_power_event_get_and_clear(NRF_POWER, NRF_POWER_EVENT_SLEEPENTER))
    {
        /* Cannot be null if event is enabled */
        NRFX_ASSERT(m_sleepevt_handler != NULL);
        m_sleepevt_handler(NRFX_POWER_SLEEP_EVT_ENTER);
    }
    if ((0 != (enabled & NRF_POWER_INT_SLEEPEXIT_MASK)) &&
-        nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPEXIT))
+        nrf_power_event_get_and_clear(NRF_POWER, NRF_POWER_EVENT_SLEEPEXIT))
    {
        /* Cannot be null if event is enabled */
        NRFX_ASSERT(m_sleepevt_handler != NULL);
@ -291,21 +288,21 @@ void nrfx_power_irq_handler(void)
 #endif
 #if NRF_POWER_HAS_USBREG
    if ((0 != (enabled & NRF_POWER_INT_USBDETECTED_MASK)) &&
-        nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBDETECTED))
+        nrf_power_event_get_and_clear(NRF_POWER, NRF_POWER_EVENT_USBDETECTED))
    {
        /* Cannot be null if event is enabled */
        NRFX_ASSERT(m_usbevt_handler != NULL);
        m_usbevt_handler(NRFX_POWER_USB_EVT_DETECTED);
    }
    if ((0 != (enabled & NRF_POWER_INT_USBREMOVED_MASK)) &&
-        nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBREMOVED))
+        nrf_power_event_get_and_clear(NRF_POWER, NRF_POWER_EVENT_USBREMOVED))
    {
        /* Cannot be null if event is enabled */
        NRFX_ASSERT(m_usbevt_handler != NULL);
        m_usbevt_handler(NRFX_POWER_USB_EVT_REMOVED);
    }
    if ((0 != (enabled & NRF_POWER_INT_USBPWRRDY_MASK)) &&
-        nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBPWRRDY))
+        nrf_power_event_get_and_clear(NRF_POWER, NRF_POWER_EVENT_USBPWRRDY))
    {
        /* Cannot be null if event is enabled */
        NRFX_ASSERT(m_usbevt_handler != NULL);
--- a/drivers/src/nrfx_ppi.c
+++ b/drivers/src/nrfx_ppi.c
@ -50,7 +50,7 @@ static uint8_t          m_groups_allocated;   /**< Bitmap representing groups av
 *
 * @retval Group mask.
 */
-__STATIC_INLINE uint32_t group_to_mask(nrf_ppi_channel_group_t group)
+static uint32_t group_to_mask(nrf_ppi_channel_group_t group)
 {
    return (1uL << (uint32_t) group);
 }
@ -64,7 +64,7 @@ __STATIC_INLINE uint32_t group_to_mask(nrf_ppi_channel_group_t group)
 * @retval true  The channel is a programmable application channel.
 * @retval false The channel is used by a stack (for example SoftDevice) or is preprogrammed.
 */
-__STATIC_INLINE bool is_programmable_app_channel(nrf_ppi_channel_t channel)
+static bool is_programmable_app_channel(nrf_ppi_channel_t channel)
 {
    return ((NRFX_PPI_PROG_APP_CHANNELS_MASK & nrfx_ppi_channel_to_mask(channel)) != 0);
 }
@ -78,7 +78,7 @@ __STATIC_INLINE bool is_programmable_app_channel(nrf_ppi_channel_t channel)
 * @retval true  All specified channels can be used by an application.
 * @retval false At least one specified channel is used by a stack (for example SoftDevice).
 */
-__STATIC_INLINE bool are_app_channels(uint32_t channel_mask)
+static bool are_app_channels(uint32_t channel_mask)
 {
    //lint -e(587)
    return ((~(NRFX_PPI_ALL_APP_CHANNELS_MASK) & channel_mask) == 0);
@ -93,7 +93,7 @@ __STATIC_INLINE bool are_app_channels(uint32_t channel_mask)
 * @retval true  The channel can be used by an application.
 * @retval false The channel is used by a stack (for example SoftDevice).
 */
-__STATIC_INLINE bool is_app_channel(nrf_ppi_channel_t channel)
+static bool is_app_channel(nrf_ppi_channel_t channel)
 {
    return are_app_channels(nrfx_ppi_channel_to_mask(channel));
 }
@ -108,7 +108,7 @@ __STATIC_INLINE bool is_app_channel(nrf_ppi_channel_t channel)
 * @retval false The group is not an application group (this group either does not exist or
 *               it is used by a stack (for example SoftDevice)).
 */
-__STATIC_INLINE bool is_app_group(nrf_ppi_channel_group_t group)
+static bool is_app_group(nrf_ppi_channel_group_t group)
 {
    return ((NRFX_PPI_ALL_APP_GROUPS_MASK & group_to_mask(group)) != 0);
 }
@ -122,7 +122,7 @@ __STATIC_INLINE bool is_app_group(nrf_ppi_channel_group_t group)
 * @retval true  The channel is allocated.
 * @retval false The channel is not allocated.
 */
-__STATIC_INLINE bool is_allocated_channel(nrf_ppi_channel_t channel)
+static bool is_allocated_channel(nrf_ppi_channel_t channel)
 {
    return ((m_channels_allocated & nrfx_ppi_channel_to_mask(channel)) != 0);
 }
@ -133,7 +133,7 @@ __STATIC_INLINE bool is_allocated_channel(nrf_ppi_channel_t channel)
 *
 * @param[in] channel_num Specifies the channel to set the "allocated" indication.
 */
-__STATIC_INLINE void channel_allocated_set(nrf_ppi_channel_t channel)
+static void channel_allocated_set(nrf_ppi_channel_t channel)
 {
    m_channels_allocated |= nrfx_ppi_channel_to_mask(channel);
 }
@ -144,7 +144,7 @@ __STATIC_INLINE void channel_allocated_set(nrf_ppi_channel_t channel)
 *
 * @param[in] channel_num Specifies the channel to clear the "allocated" indication.
 */
-__STATIC_INLINE void channel_allocated_clr(nrf_ppi_channel_t channel)
+static void channel_allocated_clr(nrf_ppi_channel_t channel)
 {
    m_channels_allocated &= ~nrfx_ppi_channel_to_mask(channel);
 }
@ -153,7 +153,7 @@ __STATIC_INLINE void channel_allocated_clr(nrf_ppi_channel_t channel)
 /**
 * @brief Clear all allocated channels.
 */
-__STATIC_INLINE void channel_allocated_clr_all(void)
+static void channel_allocated_clr_all(void)
 {
    m_channels_allocated &= ~NRFX_PPI_ALL_APP_CHANNELS_MASK;
 }
@ -167,7 +167,7 @@ __STATIC_INLINE void channel_allocated_clr_all(void)
 * @retval true  The group is allocated.
 *         false The group is not allocated.
 */
-__STATIC_INLINE bool is_allocated_group(nrf_ppi_channel_group_t group)
+static bool is_allocated_group(nrf_ppi_channel_group_t group)
 {
    return ((m_groups_allocated & group_to_mask(group)) != 0);
 }
@ -178,7 +178,7 @@ __STATIC_INLINE bool is_allocated_group(nrf_ppi_channel_group_t group)
 *
 * @param[in] group_num Specifies the group to set the "allocated" indication.
 */
-__STATIC_INLINE void group_allocated_set(nrf_ppi_channel_group_t group)
+static void group_allocated_set(nrf_ppi_channel_group_t group)
 {
    m_groups_allocated |= group_to_mask(group);
 }
@ -189,7 +189,7 @@ __STATIC_INLINE void group_allocated_set(nrf_ppi_channel_group_t group)
 *
 * @param[in] group_num Specifies the group to clear the "allocated" indication.
 */
-__STATIC_INLINE void group_allocated_clr(nrf_ppi_channel_group_t group)
+static void group_allocated_clr(nrf_ppi_channel_group_t group)
 {
    m_groups_allocated &= ~group_to_mask(group);
 }
@ -198,7 +198,7 @@ __STATIC_INLINE void group_allocated_clr(nrf_ppi_channel_group_t group)
 /**
 * @brief Clear all allocated groups.
 */
-__STATIC_INLINE void group_allocated_clr_all()
+static void group_allocated_clr_all()
 {
    m_groups_allocated &= ~NRFX_PPI_ALL_APP_GROUPS_MASK;
 }
@ -210,13 +210,13 @@ void nrfx_ppi_free_all(void)
    nrf_ppi_channel_group_t group;
    // Disable all channels and groups
-    nrf_ppi_channels_disable(NRFX_PPI_ALL_APP_CHANNELS_MASK);
+    nrf_ppi_channels_disable(NRF_PPI, NRFX_PPI_ALL_APP_CHANNELS_MASK);
    for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++)
    {
        if (mask & group_to_mask(group))
        {
-            nrf_ppi_channel_group_clear(group);
+            nrf_ppi_group_clear(NRF_PPI, group);
        }
    }
    channel_allocated_clr_all();
@ -267,7 +267,7 @@ nrfx_err_t nrfx_ppi_channel_free(nrf_ppi_channel_t channel)
    else
    {
        // First disable this channel
-        nrf_ppi_channel_disable(channel);
+        nrf_ppi_channel_disable(NRF_PPI, channel);
        NRFX_CRITICAL_SECTION_ENTER();
        channel_allocated_clr(channel);
        NRFX_CRITICAL_SECTION_EXIT();
@ -296,7 +296,7 @@ nrfx_err_t nrfx_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint
    }
    else
    {
-        nrf_ppi_channel_endpoint_setup(channel, eep, tep);
+        nrf_ppi_channel_endpoint_setup(NRF_PPI, channel, eep, tep);
        NRFX_LOG_INFO("Assigned channel: %d, event end point: %x, task end point: %x.",
                      channel,
                      eep,
@ -316,7 +316,7 @@ nrfx_err_t nrfx_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork
    }
    else
    {
-        nrf_ppi_fork_endpoint_setup(channel, fork_tep);
+        nrf_ppi_fork_endpoint_setup(NRF_PPI, channel, fork_tep);
        NRFX_LOG_INFO("Fork assigned channel: %d, task end point: %d.", channel, fork_tep);
    }
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
@ -344,7 +344,7 @@ nrfx_err_t nrfx_ppi_channel_enable(nrf_ppi_channel_t channel)
    }
    else
    {
-        nrf_ppi_channel_enable(channel);
+        nrf_ppi_channel_enable(NRF_PPI, channel);
    }
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
@ -365,7 +365,7 @@ nrfx_err_t nrfx_ppi_channel_disable(nrf_ppi_channel_t channel)
    }
    else
    {
-        nrf_ppi_channel_disable(channel);
+        nrf_ppi_channel_disable(NRF_PPI, channel);
        err_code = NRFX_SUCCESS;
    }
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
@ -418,7 +418,7 @@ nrfx_err_t nrfx_ppi_group_free(nrf_ppi_channel_group_t group)
    }
    else
    {
-        nrf_ppi_group_disable(group);
+        nrf_ppi_group_disable(NRF_PPI, group);
        NRFX_CRITICAL_SECTION_ENTER();
        group_allocated_clr(group);
        NRFX_CRITICAL_SECTION_EXIT();
@ -442,7 +442,7 @@ nrfx_err_t nrfx_ppi_group_enable(nrf_ppi_channel_group_t group)
    }
    else
    {
-        nrf_ppi_group_enable(group);
+        nrf_ppi_group_enable(NRF_PPI, group);
    }
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
@ -459,7 +459,7 @@ nrfx_err_t nrfx_ppi_group_disable(nrf_ppi_channel_group_t group)
    }
    else
    {
-        nrf_ppi_group_disable(group);
+        nrf_ppi_group_disable(NRF_PPI, group);
    }
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
@ -485,7 +485,7 @@ nrfx_err_t nrfx_ppi_channels_remove_from_group(uint32_t                channel_m
    else
    {
        NRFX_CRITICAL_SECTION_ENTER();
-        nrf_ppi_channels_remove_from_group(channel_mask, group);
+        nrf_ppi_channels_remove_from_group(NRF_PPI, channel_mask, group);
        NRFX_CRITICAL_SECTION_EXIT();
    }
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
@ -512,7 +512,7 @@ nrfx_err_t nrfx_ppi_channels_include_in_group(uint32_t                channel_ma
    else
    {
        NRFX_CRITICAL_SECTION_ENTER();
-        nrf_ppi_channels_include_in_group(channel_mask, group);
+        nrf_ppi_channels_include_in_group(NRF_PPI, channel_mask, group);
        NRFX_CRITICAL_SECTION_EXIT();
    }
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
--- a/drivers/src/nrfx_pwm.c
+++ b/drivers/src/nrfx_pwm.c
@ -58,7 +58,7 @@
 #define EGU_IRQn(i)         EGU_IRQn_(i)
 #define EGU_IRQn_(i)        SWI##i##_EGU##i##_IRQn
 #define EGU_IRQHandler(i)   EGU_IRQHandler_(i)
-#define EGU_IRQHandler_(i)  nrfx_swi_##i##_irq_handler
+#define EGU_IRQHandler_(i)  nrfx_egu_##i##_irq_handler
 #define DMA_ISSUE_EGU_IDX           NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE
 #define DMA_ISSUE_EGU               NRFX_CONCAT_2(NRF_EGU, DMA_ISSUE_EGU_IDX)
 #define DMA_ISSUE_EGU_IRQn          EGU_IRQn(DMA_ISSUE_EGU_IDX)
@ -72,12 +72,13 @@ typedef struct
    uint32_t                  starting_task_address;
 #endif
    nrfx_pwm_handler_t        handler;
    void *                    p_context;
    nrfx_drv_state_t volatile state;
    uint8_t                   flags;
 } pwm_control_block_t;
 static pwm_control_block_t m_cb[NRFX_PWM_ENABLED_COUNT];
-static void configure_pins(nrfx_pwm_t const * const p_instance,
+static void configure_pins(nrfx_pwm_t const *        p_instance,
                           nrfx_pwm_config_t const * p_config)
 {
    uint32_t out_pins[NRF_PWM_CHANNEL_COUNT];
@ -112,9 +113,10 @@ static void configure_pins(nrfx_pwm_t const * const p_instance,
 }
-nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const p_instance,
+nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const *        p_instance,
                         nrfx_pwm_config_t const * p_config,
-                         nrfx_pwm_handler_t        handler)
+                         nrfx_pwm_handler_t        handler,
                         void *                    p_context)
 {
    NRFX_ASSERT(p_config);
@ -132,6 +134,7 @@ nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const p_instance,
    }
    p_cb->handler = handler;
    p_cb->p_context = p_context;
    configure_pins(p_instance, p_config);
@ -173,7 +176,7 @@ nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const p_instance,
 }
-void nrfx_pwm_uninit(nrfx_pwm_t const * const p_instance)
+void nrfx_pwm_uninit(nrfx_pwm_t const * p_instance)
 {
    pwm_control_block_t * p_cb  = &m_cb[p_instance->drv_inst_idx];
    if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED)
@ -192,7 +195,7 @@ void nrfx_pwm_uninit(nrfx_pwm_t const * const p_instance)
 }
-static uint32_t start_playback(nrfx_pwm_t const * const p_instance,
+static uint32_t start_playback(nrfx_pwm_t const * p_instance,
                               pwm_control_block_t * p_cb,
                               uint8_t               flags,
                               nrf_pwm_task_t        starting_task)
@ -253,10 +256,9 @@ static uint32_t start_playback(nrfx_pwm_t const * const p_instance,
        // the PWM by triggering the proper task from EGU interrupt handler,
        // it is not safe to do it directly via PPI.
        p_cb->starting_task_address = starting_task_address;
-        nrf_egu_int_enable(DMA_ISSUE_EGU,
+        nrf_egu_int_enable(DMA_ISSUE_EGU, nrf_egu_channel_int_get(p_instance->drv_inst_idx));
-            nrf_egu_int_get(DMA_ISSUE_EGU, p_instance->drv_inst_idx));
+        return nrf_egu_task_address_get(DMA_ISSUE_EGU,
-        return (uint32_t)nrf_egu_task_trigger_address_get(DMA_ISSUE_EGU,
+                                        nrf_egu_trigger_task_get(p_instance->drv_inst_idx));
            p_instance->drv_inst_idx);
 #else
        return starting_task_address;
 #endif
@ -267,7 +269,7 @@ static uint32_t start_playback(nrfx_pwm_t const * const p_instance,
 }
-uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * const p_instance,
+uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const *         p_instance,
                                  nrf_pwm_sequence_t const * p_sequence,
                                  uint16_t                   playback_count,
                                  uint32_t                   flags)
@ -312,7 +314,7 @@ uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * const p_instance,
 }
-uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * const p_instance,
+uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const *         p_instance,
                                   nrf_pwm_sequence_t const * p_sequence_0,
                                   nrf_pwm_sequence_t const * p_sequence_1,
                                   uint16_t                   playback_count,
@ -359,7 +361,7 @@ uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * const p_instance,
 }
-bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance,
+bool nrfx_pwm_stop(nrfx_pwm_t const * p_instance,
                   bool               wait_until_stopped)
 {
    NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED);
@ -388,7 +390,7 @@ bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance,
 }
-bool nrfx_pwm_is_stopped(nrfx_pwm_t const * const p_instance)
+bool nrfx_pwm_is_stopped(nrfx_pwm_t const * p_instance)
 {
    pwm_control_block_t * p_cb  = &m_cb[p_instance->drv_inst_idx];
    NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED);
@ -423,7 +425,7 @@ static void irq_handler(NRF_PWM_Type * p_pwm, pwm_control_block_t * p_cb)
        nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_SEQEND0);
        if ((p_cb->flags & NRFX_PWM_FLAG_SIGNAL_END_SEQ0) && p_cb->handler)
        {
-            p_cb->handler(NRFX_PWM_EVT_END_SEQ0);
+            p_cb->handler(NRFX_PWM_EVT_END_SEQ0, p_cb->p_context);
        }
    }
    if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_SEQEND1))
@ -431,7 +433,7 @@ static void irq_handler(NRF_PWM_Type * p_pwm, pwm_control_block_t * p_cb)
        nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_SEQEND1);
        if ((p_cb->flags & NRFX_PWM_FLAG_SIGNAL_END_SEQ1) && p_cb->handler)
        {
-            p_cb->handler(NRFX_PWM_EVT_END_SEQ1);
+            p_cb->handler(NRFX_PWM_EVT_END_SEQ1, p_cb->p_context);
        }
    }
    // For LOOPSDONE the handler is called by default, but the user can disable
@ -441,7 +443,7 @@ static void irq_handler(NRF_PWM_Type * p_pwm, pwm_control_block_t * p_cb)
        nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_LOOPSDONE);
        if (!(p_cb->flags & NRFX_PWM_FLAG_NO_EVT_FINISHED) && p_cb->handler)
        {
-            p_cb->handler(NRFX_PWM_EVT_FINISHED);
+            p_cb->handler(NRFX_PWM_EVT_FINISHED, p_cb->p_context);
        }
    }
@ -453,7 +455,7 @@ static void irq_handler(NRF_PWM_Type * p_pwm, pwm_control_block_t * p_cb)
        p_cb->state = NRFX_DRV_STATE_INITIALIZED;
        if (p_cb->handler)
        {
-            p_cb->handler(NRFX_PWM_EVT_STOPPED);
+            p_cb->handler(NRFX_PWM_EVT_STOPPED, p_cb->p_context);
        }
    }
 }
@ -463,14 +465,12 @@ static void irq_handler(NRF_PWM_Type * p_pwm, pwm_control_block_t * p_cb)
 // See 'start_playback' why this is needed.
 void DMA_ISSUE_EGU_IRQHandler(void)
 {
-    int i;
+    for (uint8_t i = 0; i < NRFX_PWM_ENABLED_COUNT; i++)
    for (i = 0; i < NRFX_PWM_ENABLED_COUNT; ++i)
    {
-        volatile uint32_t * p_event_reg =
+        nrf_egu_event_t event = nrf_egu_triggered_event_get(i);
-            nrf_egu_event_triggered_address_get(DMA_ISSUE_EGU, i);
+        if (nrf_egu_event_check(DMA_ISSUE_EGU, event))
        if (*p_event_reg)
        {
-            *p_event_reg = 0;
+            nrf_egu_event_clear(DMA_ISSUE_EGU, event);
            *(volatile uint32_t *)(m_cb[i].starting_task_address) = 1;
        }
    }
--- a/drivers/src/nrfx_qdec.c
+++ b/drivers/src/nrfx_qdec.c
@ -52,34 +52,34 @@ static nrfx_drv_state_t m_state = NRFX_DRV_STATE_UNINITIALIZED;
 void nrfx_qdec_irq_handler(void)
 {
    nrfx_qdec_event_t event;
-    if ( nrf_qdec_event_check(NRF_QDEC_EVENT_SAMPLERDY) &&
+    if ( nrf_qdec_event_check(NRF_QDEC, NRF_QDEC_EVENT_SAMPLERDY) &&
-         nrf_qdec_int_enable_check(NRF_QDEC_INT_SAMPLERDY_MASK) )
+         nrf_qdec_int_enable_check(NRF_QDEC, NRF_QDEC_INT_SAMPLERDY_MASK) )
    {
-        nrf_qdec_event_clear(NRF_QDEC_EVENT_SAMPLERDY);
+        nrf_qdec_event_clear(NRF_QDEC, NRF_QDEC_EVENT_SAMPLERDY);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_QDEC_EVENT_SAMPLERDY));
        event.type = NRF_QDEC_EVENT_SAMPLERDY;
-        event.data.sample.value = (int8_t)nrf_qdec_sample_get();
+        event.data.sample.value = (int8_t)nrf_qdec_sample_get(NRF_QDEC);
        m_qdec_event_handler(event);
    }
-    if ( nrf_qdec_event_check(NRF_QDEC_EVENT_REPORTRDY) &&
+    if ( nrf_qdec_event_check(NRF_QDEC, NRF_QDEC_EVENT_REPORTRDY) &&
-         nrf_qdec_int_enable_check(NRF_QDEC_INT_REPORTRDY_MASK) )
+         nrf_qdec_int_enable_check(NRF_QDEC, NRF_QDEC_INT_REPORTRDY_MASK) )
    {
-        nrf_qdec_event_clear(NRF_QDEC_EVENT_REPORTRDY);
+        nrf_qdec_event_clear(NRF_QDEC, NRF_QDEC_EVENT_REPORTRDY);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_QDEC_EVENT_REPORTRDY));
        event.type = NRF_QDEC_EVENT_REPORTRDY;
-        event.data.report.acc    = (int16_t)nrf_qdec_accread_get();
+        event.data.report.acc    = (int16_t)nrf_qdec_accread_get(NRF_QDEC);
-        event.data.report.accdbl = (uint16_t)nrf_qdec_accdblread_get();
+        event.data.report.accdbl = (uint16_t)nrf_qdec_accdblread_get(NRF_QDEC);
        m_qdec_event_handler(event);
    }
-    if ( nrf_qdec_event_check(NRF_QDEC_EVENT_ACCOF) &&
+    if ( nrf_qdec_event_check(NRF_QDEC, NRF_QDEC_EVENT_ACCOF) &&
-         nrf_qdec_int_enable_check(NRF_QDEC_INT_ACCOF_MASK) )
+         nrf_qdec_int_enable_check(NRF_QDEC, NRF_QDEC_INT_ACCOF_MASK) )
    {
-        nrf_qdec_event_clear(NRF_QDEC_EVENT_ACCOF);
+        nrf_qdec_event_clear(NRF_QDEC, NRF_QDEC_EVENT_ACCOF);
        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_QDEC_EVENT_ACCOF));
        event.type = NRF_QDEC_EVENT_ACCOF;
@ -106,32 +106,32 @@ nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config,
    m_qdec_event_handler = event_handler;
-    nrf_qdec_sampleper_set(p_config->sampleper);
+    nrf_qdec_sampleper_set(NRF_QDEC, p_config->sampleper);
    nrf_gpio_cfg_input(p_config->psela, NRF_GPIO_PIN_NOPULL);
    nrf_gpio_cfg_input(p_config->pselb, NRF_GPIO_PIN_NOPULL);
    if (p_config->pselled != NRF_QDEC_LED_NOT_CONNECTED)
    {
        nrf_gpio_cfg_input(p_config->pselled, NRF_GPIO_PIN_NOPULL);
-        nrf_qdec_ledpre_set(p_config->ledpre);
+        nrf_qdec_ledpre_set(NRF_QDEC, p_config->ledpre);
-        nrf_qdec_ledpol_set(p_config->ledpol);
+        nrf_qdec_ledpol_set(NRF_QDEC, p_config->ledpol);
    }
-    nrf_qdec_pio_assign(p_config->psela, p_config->pselb, p_config->pselled);
+    nrf_qdec_pio_assign(NRF_QDEC, p_config->psela, p_config->pselb, p_config->pselled);
-    nrf_qdec_shorts_enable(NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK);
+    nrf_qdec_shorts_enable(NRF_QDEC, NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK);
    if (p_config->dbfen)
    {
-        nrf_qdec_dbfen_enable();
+        nrf_qdec_dbfen_enable(NRF_QDEC);
    }
    else
    {
-        nrf_qdec_dbfen_disable();
+        nrf_qdec_dbfen_disable(NRF_QDEC);
    }
    uint32_t int_mask = NRF_QDEC_INT_ACCOF_MASK;
    if (p_config->reportper != NRF_QDEC_REPORTPER_DISABLED)
    {
-        nrf_qdec_reportper_set(p_config->reportper);
+        nrf_qdec_reportper_set(NRF_QDEC, p_config->reportper);
        int_mask |= NRF_QDEC_INT_REPORTRDY_MASK;
    }
@ -140,7 +140,7 @@ nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config,
        int_mask |= NRF_QDEC_INT_SAMPLERDY_MASK;
    }
-    nrf_qdec_int_enable(int_mask);
+    nrf_qdec_int_enable(NRF_QDEC, int_mask);
    NRFX_IRQ_PRIORITY_SET(QDEC_IRQn, p_config->interrupt_priority);
    NRFX_IRQ_ENABLE(QDEC_IRQn);
@ -166,8 +166,8 @@ void nrfx_qdec_uninit(void)
 void nrfx_qdec_enable(void)
 {
    NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED);
-    nrf_qdec_enable();
+    nrf_qdec_enable(NRF_QDEC);
-    nrf_qdec_task_trigger(NRF_QDEC_TASK_START);
+    nrf_qdec_task_trigger(NRF_QDEC, NRF_QDEC_TASK_START);
    m_state = NRFX_DRV_STATE_POWERED_ON;
    NRFX_LOG_INFO("Enabled.");
 }
@ -175,8 +175,8 @@ void nrfx_qdec_enable(void)
 void nrfx_qdec_disable(void)
 {
    NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON);
-    nrf_qdec_task_trigger(NRF_QDEC_TASK_STOP);
+    nrf_qdec_task_trigger(NRF_QDEC, NRF_QDEC_TASK_STOP);
-    nrf_qdec_disable();
+    nrf_qdec_disable(NRF_QDEC);
    m_state = NRFX_DRV_STATE_INITIALIZED;
    NRFX_LOG_INFO("Disabled.");
 }
@ -184,10 +184,10 @@ void nrfx_qdec_disable(void)
 void nrfx_qdec_accumulators_read(int16_t * p_acc, int16_t * p_accdbl)
 {
    NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON);
-    nrf_qdec_task_trigger(NRF_QDEC_TASK_READCLRACC);
+    nrf_qdec_task_trigger(NRF_QDEC, NRF_QDEC_TASK_READCLRACC);
-    *p_acc    = (int16_t)nrf_qdec_accread_get();
+    *p_acc    = (int16_t)nrf_qdec_accread_get(NRF_QDEC);
-    *p_accdbl = (int16_t)nrf_qdec_accdblread_get();
+    *p_accdbl = (int16_t)nrf_qdec_accdblread_get(NRF_QDEC);
    NRFX_LOG_DEBUG("Accumulators data, ACC register:");
    NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)p_acc, sizeof(p_acc[0]));
--- a/drivers/src/nrfx_qspi.c
+++ b/drivers/src/nrfx_qspi.c
@ -179,6 +179,7 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
    {
        nrf_qspi_cinstrdata_set(NRF_QSPI, p_config->length, p_tx_buffer);
    }
    nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
    nrf_qspi_cinstr_transfer_start(NRF_QSPI, p_config);
@ -193,7 +194,6 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
        return NRFX_ERROR_TIMEOUT;
    }
    nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
    nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
    if (p_rx_buffer)
    {
@ -352,17 +352,14 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
 {
    NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
    NRFX_ASSERT(p_tx_buffer != NULL);
    NRFX_ASSERT(nrfx_is_in_ram(p_tx_buffer));
    NRFX_ASSERT(nrfx_is_word_aligned(p_tx_buffer));
-    if (!nrfx_is_in_ram(p_tx_buffer))
+    if (!nrfx_is_in_ram(p_tx_buffer) || !nrfx_is_word_aligned(p_tx_buffer))
    {
        return NRFX_ERROR_INVALID_ADDR;
    }
    nrf_qspi_write_buffer_set(NRF_QSPI, p_tx_buffer, tx_buffer_length, dst_address);
    return qspi_task_perform(NRF_QSPI_TASK_WRITESTART);
 }
 nrfx_err_t nrfx_qspi_read(void *   p_rx_buffer,
@ -371,10 +368,8 @@ nrfx_err_t nrfx_qspi_read(void *   p_rx_buffer,
 {
    NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
    NRFX_ASSERT(p_rx_buffer != NULL);
    NRFX_ASSERT(nrfx_is_in_ram(p_rx_buffer));
    NRFX_ASSERT(nrfx_is_word_aligned(p_rx_buffer));
-    if (!nrfx_is_in_ram(p_rx_buffer))
+    if (!nrfx_is_in_ram(p_rx_buffer) || !nrfx_is_word_aligned(p_rx_buffer))
    {
        return NRFX_ERROR_INVALID_ADDR;
    }
@ -387,6 +382,12 @@ nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
                           uint32_t             start_address)
 {
    NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
    if (!nrfx_is_word_aligned((void const *)start_address))
    {
        return NRFX_ERROR_INVALID_ADDR;
    }
    nrf_qspi_erase_ptr_set(NRF_QSPI, start_address, length);
    return qspi_task_perform(NRF_QSPI_TASK_ERASESTART);
 }
--- a/drivers/src/nrfx_rng.c
+++ b/drivers/src/nrfx_rng.c
@ -61,9 +61,9 @@ nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handle
    if (p_config->error_correction)
    {
-        nrf_rng_error_correction_enable();
+        nrf_rng_error_correction_enable(NRF_RNG);
    }
-    nrf_rng_shorts_disable(NRF_RNG_SHORT_VALRDY_STOP_MASK);
+    nrf_rng_shorts_disable(NRF_RNG, NRF_RNG_SHORT_VALRDY_STOP_MASK);
    NRFX_IRQ_PRIORITY_SET(RNG_IRQn, p_config->interrupt_priority);
    NRFX_IRQ_ENABLE(RNG_IRQn);
@ -75,16 +75,16 @@ nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handle
 void nrfx_rng_start(void)
 {
    NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED);
-    nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
+    nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY);
-    nrf_rng_int_enable(NRF_RNG_INT_VALRDY_MASK);
+    nrf_rng_int_enable(NRF_RNG, NRF_RNG_INT_VALRDY_MASK);
-    nrf_rng_task_trigger(NRF_RNG_TASK_START);
+    nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_START);
 }
 void nrfx_rng_stop(void)
 {
    NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED);
-    nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK);
+    nrf_rng_int_disable(NRF_RNG, NRF_RNG_INT_VALRDY_MASK);
-    nrf_rng_task_trigger(NRF_RNG_TASK_STOP);
+    nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_STOP);
 }
 void nrfx_rng_uninit(void)
@ -93,8 +93,8 @@ void nrfx_rng_uninit(void)
        return;
    }
-    nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK);
+    nrf_rng_int_disable(NRF_RNG, NRF_RNG_INT_VALRDY_MASK);
-    nrf_rng_task_trigger(NRF_RNG_TASK_STOP);
+    nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_STOP);
    NRFX_IRQ_DISABLE(RNG_IRQn);
    m_rng_state = NRFX_DRV_STATE_UNINITIALIZED;
@ -103,9 +103,9 @@ void nrfx_rng_uninit(void)
 void nrfx_rng_irq_handler(void)
 {
-    nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
+    nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY);
-    uint8_t rng_value = nrf_rng_random_value_get();
+    uint8_t rng_value = nrf_rng_random_value_get(NRF_RNG);
    m_rng_hndl(rng_value);
--- a/drivers/src/nrfx_rtc.c
+++ b/drivers/src/nrfx_rtc.c
@ -65,7 +65,7 @@ typedef struct
 static nrfx_rtc_handler_t m_handlers[NRFX_RTC_ENABLED_COUNT];
 static nrfx_rtc_cb_t      m_cb[NRFX_RTC_ENABLED_COUNT];
-nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const  p_instance,
+nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const *        p_instance,
                         nrfx_rtc_config_t const * p_config,
                         nrfx_rtc_handler_t        handler)
 {
@ -96,7 +96,7 @@ nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const  p_instance,
    return err_code;
 }
-void nrfx_rtc_uninit(nrfx_rtc_t const * const p_instance)
+void nrfx_rtc_uninit(nrfx_rtc_t const * p_instance)
 {
    if (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_UNINITIALIZED)
    {
@ -119,7 +119,7 @@ void nrfx_rtc_uninit(nrfx_rtc_t const * const p_instance)
    NRFX_LOG_INFO("Uninitialized.");
 }
-void nrfx_rtc_enable(nrfx_rtc_t const * const p_instance)
+void nrfx_rtc_enable(nrfx_rtc_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED);
@ -128,7 +128,7 @@ void nrfx_rtc_enable(nrfx_rtc_t const * const p_instance)
    NRFX_LOG_INFO("Enabled.");
 }
-void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance)
+void nrfx_rtc_disable(nrfx_rtc_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
@ -137,7 +137,7 @@ void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance)
    NRFX_LOG_INFO("Disabled.");
 }
-nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t channel)
+nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * p_instance, uint32_t channel)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
    NRFX_ASSERT(channel < p_instance->cc_channel_count);
@ -147,10 +147,10 @@ nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t cha
    nrf_rtc_event_t event = RTC_CHANNEL_EVENT_ADDR(channel);
    nrf_rtc_event_disable(p_instance->p_reg, int_mask);
-    if (nrf_rtc_int_is_enabled(p_instance->p_reg,int_mask))
+    if (nrf_rtc_int_enable_check(p_instance->p_reg, int_mask))
    {
        nrf_rtc_int_disable(p_instance->p_reg, int_mask);
-        if (nrf_rtc_event_pending(p_instance->p_reg,event))
+        if (nrf_rtc_event_check(p_instance->p_reg, event))
        {
            nrf_rtc_event_clear(p_instance->p_reg, event);
            err_code = NRFX_ERROR_TIMEOUT;
@ -166,7 +166,7 @@ nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t cha
    return err_code;
 }
-nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance,
+nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * p_instance,
                           uint32_t           channel,
                           uint32_t           val,
                           bool               enable_irq)
@ -221,7 +221,7 @@ nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance,
    return err_code;
 }
-void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq)
+void nrfx_rtc_tick_enable(nrfx_rtc_t const * p_instance, bool enable_irq)
 {
    nrf_rtc_event_t event = NRF_RTC_EVENT_TICK;
    uint32_t mask = NRF_RTC_INT_TICK_MASK;
@ -235,7 +235,7 @@ void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq)
    NRFX_LOG_INFO("Tick events enabled.");
 }
-void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance)
+void nrfx_rtc_tick_disable(nrfx_rtc_t const * p_instance)
 {
    uint32_t mask = NRF_RTC_INT_TICK_MASK;
@ -244,7 +244,7 @@ void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance)
    NRFX_LOG_INFO("Tick events disabled.");
 }
-void nrfx_rtc_overflow_enable(nrfx_rtc_t const * const p_instance, bool enable_irq)
+void nrfx_rtc_overflow_enable(nrfx_rtc_t const * p_instance, bool enable_irq)
 {
    nrf_rtc_event_t event = NRF_RTC_EVENT_OVERFLOW;
    uint32_t mask = NRF_RTC_INT_OVERFLOW_MASK;
@ -257,14 +257,14 @@ void nrfx_rtc_overflow_enable(nrfx_rtc_t const * const p_instance, bool enable_i
    }
 }
-void nrfx_rtc_overflow_disable(nrfx_rtc_t const * const p_instance)
+void nrfx_rtc_overflow_disable(nrfx_rtc_t const * p_instance)
 {
    uint32_t mask = NRF_RTC_INT_OVERFLOW_MASK;
    nrf_rtc_event_disable(p_instance->p_reg, mask);
    nrf_rtc_int_disable(p_instance->p_reg, mask);
 }
-uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * const p_instance)
+uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * p_instance)
 {
    uint32_t ticks;
    if (m_cb[p_instance->instance_id].reliable)
@ -288,7 +288,7 @@ static void irq_handler(NRF_RTC_Type * p_reg,
    for (i = 0; i < channel_count; i++)
    {
-        if (nrf_rtc_int_is_enabled(p_reg,int_mask) && nrf_rtc_event_pending(p_reg,event))
+        if (nrf_rtc_int_enable_check(p_reg, int_mask) && nrf_rtc_event_check(p_reg, event))
        {
            nrf_rtc_event_disable(p_reg, int_mask);
            nrf_rtc_int_disable(p_reg, int_mask);
@ -299,9 +299,9 @@ static void irq_handler(NRF_RTC_Type * p_reg,
        int_mask <<= 1;
        event = (nrf_rtc_event_t)((uint32_t)event + sizeof(uint32_t));
    }
    event = NRF_RTC_EVENT_TICK;
-    if (nrf_rtc_int_is_enabled(p_reg,NRF_RTC_INT_TICK_MASK) &&
+    if (nrf_rtc_int_enable_check(p_reg, NRF_RTC_INT_TICK_MASK) && nrf_rtc_event_check(p_reg, event))
        nrf_rtc_event_pending(p_reg, event))
    {
        nrf_rtc_event_clear(p_reg, event);
        NRFX_LOG_DEBUG("Event: %s, instance id: %lu.", EVT_TO_STR(event), instance_id);
@ -309,8 +309,8 @@ static void irq_handler(NRF_RTC_Type * p_reg,
    }
    event = NRF_RTC_EVENT_OVERFLOW;
-    if (nrf_rtc_int_is_enabled(p_reg,NRF_RTC_INT_OVERFLOW_MASK) &&
+    if (nrf_rtc_int_enable_check(p_reg, NRF_RTC_INT_OVERFLOW_MASK) &&
-        nrf_rtc_event_pending(p_reg, event))
+        nrf_rtc_event_check(p_reg, event))
    {
        nrf_rtc_event_clear(p_reg, event);
        NRFX_LOG_DEBUG("Event: %s, instance id: %lu.", EVT_TO_STR(event), instance_id);
--- a/drivers/src/nrfx_saadc.c
+++ b/drivers/src/nrfx_saadc.c
--- a/drivers/src/nrfx_spi.c
+++ b/drivers/src/nrfx_spi.c
@ -66,7 +66,7 @@ typedef struct
 static spi_control_block_t m_cb[NRFX_SPI_ENABLED_COUNT];
-nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const  p_instance,
+nrfx_err_t nrfx_spi_init(nrfx_spi_t const *        p_instance,
                         nrfx_spi_config_t const * p_config,
                         nrfx_spi_evt_handler_t    handler,
                         void *                    p_context)
@ -146,7 +146,7 @@ nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const  p_instance,
    if (p_config->miso_pin != NRFX_SPI_PIN_NOT_USED)
    {
        miso_pin = p_config->miso_pin;
-        nrf_gpio_cfg_input(miso_pin, (nrf_gpio_pin_pull_t)NRFX_SPI_MISO_PULL_CFG);
+        nrf_gpio_cfg_input(miso_pin, p_config->miso_pull);
    }
    else
    {
@ -190,7 +190,7 @@ nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const  p_instance,
    return err_code;
 }
-void nrfx_spi_uninit(nrfx_spi_t const * const p_instance)
+void nrfx_spi_uninit(nrfx_spi_t const * p_instance)
 {
    spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED)
@ -342,7 +342,7 @@ static void spi_xfer(NRF_SPI_Type               * p_spi,
    }
 }
-nrfx_err_t nrfx_spi_xfer(nrfx_spi_t     const * const p_instance,
+nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const *           p_instance,
                         nrfx_spi_xfer_desc_t const * p_xfer_desc,
                         uint32_t                     flags)
 {
--- a/drivers/src/nrfx_spim.c
+++ b/drivers/src/nrfx_spim.c
@ -38,9 +38,6 @@
 #error "No enabled SPIM instances. Check <nrfx_config.h>."
 #endif
 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) && !NRFX_CHECK(NRFX_SPIM3_ENABLED)
 #error "Extended options are available only in SPIM3 on the nRF52840 SoC."
 #endif
 #include <nrfx_spim.h>
 #include "prs/nrfx_prs.h"
@ -49,32 +46,79 @@
 #define NRFX_LOG_MODULE SPIM
 #include <nrfx_log.h>
 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) && \
    ((!NRF_SPIM_HW_CSN_PRESENT) || !(NRF_SPIM_DCX_PRESENT) || !(NRF_SPIM_RXDELAY_PRESENT))
 #error "Extended options are not available in the SoC currently in use."
 #endif
 #define SPIMX_LENGTH_VALIDATE(peripheral, drv_inst_idx, rx_len, tx_len) \
    (((drv_inst_idx) == NRFX_CONCAT_3(NRFX_, peripheral, _INST_IDX)) && \
     NRFX_EASYDMA_LENGTH_VALIDATE(peripheral, rx_len, tx_len))
 #define SPIMX_HW_CSN_PRESENT_VALIDATE(peripheral, drv_inst_idx)         \
    (((drv_inst_idx) == NRFX_CONCAT_3(NRFX_, peripheral, _INST_IDX)) && \
     NRFX_CONCAT_2(peripheral, _FEATURE_HARDWARE_CSN_PRESENT))
 #define SPIMX_DCX_PRESENT_VALIDATE(peripheral, drv_inst_idx)            \
    (((drv_inst_idx) == NRFX_CONCAT_3(NRFX_, peripheral, _INST_IDX)) && \
    NRFX_CONCAT_2(peripheral, _FEATURE_DCX_PRESENT))
 #define SPIMX_SUPPORTED_FREQ_VALIDATE(peripheral, drv_inst_idx, freq)                            \
    (                                                                                            \
    ((drv_inst_idx) == NRFX_CONCAT_3(NRFX_, peripheral, _INST_IDX)) &&                           \
    (                                                                                            \
        (((freq) != NRF_SPIM_FREQ_16M) && ((freq) != NRF_SPIM_FREQ_32M)) ||                      \
        (((freq) == NRF_SPIM_FREQ_16M) && ((NRFX_CONCAT_2(peripheral, _MAX_DATARATE) >= 16))) || \
        (((freq) == NRF_SPIM_FREQ_32M) && ((NRFX_CONCAT_2(peripheral, _MAX_DATARATE) >= 32)))    \
    )                                                                                            \
    )
 #if NRFX_CHECK(NRFX_SPIM0_ENABLED)
 #define SPIM0_LENGTH_VALIDATE(...)          SPIMX_LENGTH_VALIDATE(SPIM0, __VA_ARGS__)
 #define SPIM0_HW_CSN_PRESENT_VALIDATE(...)  SPIMX_HW_CSN_PRESENT_VALIDATE(SPIM0, __VA_ARGS__)
 #define SPIM0_DCX_PRESENT_VALIDATE(...)     SPIMX_DCX_PRESENT_VALIDATE(SPIM0, __VA_ARGS__)
 #define SPIM0_SUPPORTED_FREQ_VALIDATE(...)  SPIMX_SUPPORTED_FREQ_VALIDATE(SPIM0, __VA_ARGS__)
 #else
 #define SPIM0_LENGTH_VALIDATE(...)          0
 #define SPIM0_HW_CSN_PRESENT_VALIDATE(...)  0
 #define SPIM0_DCX_PRESENT_VALIDATE(...)     0
 #define SPIM0_SUPPORTED_FREQ_VALIDATE(...)  0
 #endif
 #if NRFX_CHECK(NRFX_SPIM1_ENABLED)
 #define SPIM1_LENGTH_VALIDATE(...)          SPIMX_LENGTH_VALIDATE(SPIM1, __VA_ARGS__)
 #define SPIM1_HW_CSN_PRESENT_VALIDATE(...)  SPIMX_HW_CSN_PRESENT_VALIDATE(SPIM1, __VA_ARGS__)
 #define SPIM1_DCX_PRESENT_VALIDATE(...)     SPIMX_DCX_PRESENT_VALIDATE(SPIM1, __VA_ARGS__)
 #define SPIM1_SUPPORTED_FREQ_VALIDATE(...)  SPIMX_SUPPORTED_FREQ_VALIDATE(SPIM1, __VA_ARGS__)
 #else
 #define SPIM1_LENGTH_VALIDATE(...)          0
 #define SPIM1_HW_CSN_PRESENT_VALIDATE(...)  0
 #define SPIM1_DCX_PRESENT_VALIDATE(...)     0
 #define SPIM1_SUPPORTED_FREQ_VALIDATE(...)  0
 #endif
 #if NRFX_CHECK(NRFX_SPIM2_ENABLED)
 #define SPIM2_LENGTH_VALIDATE(...)          SPIMX_LENGTH_VALIDATE(SPIM2, __VA_ARGS__)
 #define SPIM2_HW_CSN_PRESENT_VALIDATE(...)  SPIMX_HW_CSN_PRESENT_VALIDATE(SPIM2, __VA_ARGS__)
 #define SPIM2_DCX_PRESENT_VALIDATE(...)     SPIMX_DCX_PRESENT_VALIDATE(SPIM2, __VA_ARGS__)
 #define SPIM2_SUPPORTED_FREQ_VALIDATE(...)  SPIMX_SUPPORTED_FREQ_VALIDATE(SPIM2, __VA_ARGS__)
 #else
 #define SPIM2_LENGTH_VALIDATE(...)          0
 #define SPIM2_HW_CSN_PRESENT_VALIDATE(...)  0
 #define SPIM2_DCX_PRESENT_VALIDATE(...)     0
 #define SPIM2_SUPPORTED_FREQ_VALIDATE(...)  0
 #endif
 #if NRFX_CHECK(NRFX_SPIM3_ENABLED)
 #define SPIM3_LENGTH_VALIDATE(...)          SPIMX_LENGTH_VALIDATE(SPIM3, __VA_ARGS__)
 #define SPIM3_HW_CSN_PRESENT_VALIDATE(...)  SPIMX_HW_CSN_PRESENT_VALIDATE(SPIM3, __VA_ARGS__)
 #define SPIM3_DCX_PRESENT_VALIDATE(...)     SPIMX_DCX_PRESENT_VALIDATE(SPIM3, __VA_ARGS__)
 #define SPIM3_SUPPORTED_FREQ_VALIDATE(...)  SPIMX_SUPPORTED_FREQ_VALIDATE(SPIM3, __VA_ARGS__)
 #else
 #define SPIM3_LENGTH_VALIDATE(...)          0
 #define SPIM3_HW_CSN_PRESENT_VALIDATE(...)  0
 #define SPIM3_DCX_PRESENT_VALIDATE(...)     0
 #define SPIM3_SUPPORTED_FREQ_VALIDATE(...)  0
 #endif
 #define SPIM_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len)  \
@ -83,11 +127,30 @@
     SPIM2_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len) || \
     SPIM3_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len))
 #define SPIM_HW_CSN_PRESENT_VALIDATE(drv_inst_idx)  \
    (SPIM0_HW_CSN_PRESENT_VALIDATE(drv_inst_idx) || \
     SPIM1_HW_CSN_PRESENT_VALIDATE(drv_inst_idx) || \
     SPIM2_HW_CSN_PRESENT_VALIDATE(drv_inst_idx) || \
     SPIM3_HW_CSN_PRESENT_VALIDATE(drv_inst_idx))
 #define SPIM_DCX_PRESENT_VALIDATE(drv_inst_idx)  \
    (SPIM0_DCX_PRESENT_VALIDATE(drv_inst_idx) || \
     SPIM1_DCX_PRESENT_VALIDATE(drv_inst_idx) || \
     SPIM2_DCX_PRESENT_VALIDATE(drv_inst_idx) || \
     SPIM3_DCX_PRESENT_VALIDATE(drv_inst_idx))
 #define SPIM_SUPPORTED_FREQ_VALIDATE(drv_inst_idx, freq)  \
    (SPIM0_SUPPORTED_FREQ_VALIDATE(drv_inst_idx, freq) || \
     SPIM1_SUPPORTED_FREQ_VALIDATE(drv_inst_idx, freq) || \
     SPIM2_SUPPORTED_FREQ_VALIDATE(drv_inst_idx, freq) || \
     SPIM3_SUPPORTED_FREQ_VALIDATE(drv_inst_idx, freq))
 #if defined(NRF52840_XXAA) && (NRFX_CHECK(NRFX_SPIM3_ENABLED))
 // Enable workaround for nRF52840 anomaly 195 (SPIM3 continues to draw current after disable).
 #define USE_WORKAROUND_FOR_ANOMALY_195
 #endif
 // Control block - driver instance local data.
 typedef struct
 {
@ -156,7 +219,7 @@ static void anomaly_198_disable(void)
 }
 #endif // NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED)
-nrfx_err_t nrfx_spim_init(nrfx_spim_t  const * const p_instance,
+nrfx_err_t nrfx_spim_init(nrfx_spim_t const *        p_instance,
                          nrfx_spim_config_t const * p_config,
                          nrfx_spim_evt_handler_t    handler,
                          void *                     p_context)
@ -175,13 +238,14 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t  const * const p_instance,
    }
 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED)
-    // Currently, only SPIM3 in nRF52840 supports the extended features.
+    // Check if SPIM instance supports the extended features.
-    // Other instances must be checked.
+    if (
-    if ((p_instance->drv_inst_idx != NRFX_SPIM3_INST_IDX) &&
+        (!SPIM_SUPPORTED_FREQ_VALIDATE(p_instance->drv_inst_idx, p_config->frequency)) ||
-        ((p_config->dcx_pin   != NRFX_SPIM_PIN_NOT_USED) ||
+        ((p_config->use_hw_ss) &&
-         (p_config->frequency == NRF_SPIM_FREQ_16M)      ||
+         !SPIM_HW_CSN_PRESENT_VALIDATE(p_instance->drv_inst_idx)) ||
-         (p_config->frequency == NRF_SPIM_FREQ_32M)      ||
+        ((p_config->dcx_pin != NRFX_SPIM_PIN_NOT_USED) &&
-         (p_config->use_hw_ss)))
+         !SPIM_DCX_PRESENT_VALIDATE(p_instance->drv_inst_idx))
        )
    {
        err_code = NRFX_ERROR_NOT_SUPPORTED;
        NRFX_LOG_WARNING("Function: %s, error code: %s.",
@ -258,7 +322,7 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t  const * const p_instance,
    if (p_config->miso_pin != NRFX_SPIM_PIN_NOT_USED)
    {
        miso_pin = p_config->miso_pin;
-        nrf_gpio_cfg_input(miso_pin, (nrf_gpio_pin_pull_t)NRFX_SPIM_MISO_PULL_CFG);
+        nrf_gpio_cfg_input(miso_pin, p_config->miso_pull);
    }
    else
    {
@ -338,7 +402,7 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t  const * const p_instance,
    return err_code;
 }
-void nrfx_spim_uninit(nrfx_spim_t const * const p_instance)
+void nrfx_spim_uninit(nrfx_spim_t const * p_instance)
 {
    spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED)
@ -386,7 +450,7 @@ void nrfx_spim_uninit(nrfx_spim_t const * const p_instance)
 }
 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED)
-nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const     p_instance,
+nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const *           p_instance,
                              nrfx_spim_xfer_desc_t const * p_xfer_desc,
                              uint32_t                      flags,
                              uint8_t                       cmd_length)
@ -425,7 +489,7 @@ static void finish_transfer(spim_control_block_t * p_cb)
    p_cb->handler(&p_cb->evt, p_cb->p_context);
 }
-__STATIC_INLINE void spim_int_enable(NRF_SPIM_Type * p_spim, bool enable)
+static void spim_int_enable(NRF_SPIM_Type * p_spim, bool enable)
 {
    if (!enable)
    {
@ -437,7 +501,7 @@ __STATIC_INLINE void spim_int_enable(NRF_SPIM_Type * p_spim, bool enable)
    }
 }
-__STATIC_INLINE void spim_list_enable_handle(NRF_SPIM_Type * p_spim, uint32_t flags)
+static void spim_list_enable_handle(NRF_SPIM_Type * p_spim, uint32_t flags)
 {
    if (NRFX_SPIM_FLAG_TX_POSTINC & flags)
    {
@ -548,7 +612,7 @@ static nrfx_err_t spim_xfer(NRF_SPIM_Type               * p_spim,
    return err_code;
 }
-nrfx_err_t nrfx_spim_xfer(nrfx_spim_t     const * const p_instance,
+nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const *           p_instance,
                          nrfx_spim_xfer_desc_t const * p_xfer_desc,
                          uint32_t                      flags)
 {
--- a/drivers/src/nrfx_spis.c
+++ b/drivers/src/nrfx_spis.c
@ -123,7 +123,7 @@ typedef struct
 static spis_cb_t m_cb[NRFX_SPIS_ENABLED_COUNT];
-nrfx_err_t nrfx_spis_init(nrfx_spis_t  const * const p_instance,
+nrfx_err_t nrfx_spis_init(nrfx_spis_t const *        p_instance,
                          nrfx_spis_config_t const * p_config,
                          nrfx_spis_event_handler_t  event_handler,
                          void *                     p_context)
@ -257,7 +257,7 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t  const * const p_instance,
    // [the GPIOTE driver may be already initialized at this point (by this
    //  driver when another SPIS instance is used, or by an application code),
    //  so just ignore the returned value]
-    (void)nrfx_gpiote_init();
+    (void)nrfx_gpiote_init(NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY);
    static nrfx_gpiote_in_config_t const csn_gpiote_config =
        NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
    nrfx_err_t gpiote_err_code = nrfx_gpiote_in_init(p_config->csn_pin,
@ -290,7 +290,7 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t  const * const p_instance,
 }
-void nrfx_spis_uninit(nrfx_spis_t const * const p_instance)
+void nrfx_spis_uninit(nrfx_spis_t const * p_instance)
 {
    spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED);
@ -365,7 +365,7 @@ static void spis_state_change(NRF_SPIS_Type   * p_spis,
    spis_state_entry_action_execute(p_spis, p_cb);
 }
-nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance,
+nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * p_instance,
                                 uint8_t const *     p_tx_buffer,
                                 size_t              tx_buffer_length,
                                 uint8_t *           p_rx_buffer,
--- a/drivers/src/nrfx_swi.c
+++ b/drivers/src/nrfx_swi.c
@ -1,430 +0,0 @@
 /*
 * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 #include <nrfx.h>
 #if NRFX_CHECK(NRFX_SWI_ENABLED)
 #include <nrfx_swi.h>
 #define NRFX_LOG_MODULE SWI
 #include <nrfx_log.h>
 // NRFX_SWI_RESERVED_MASK - SWIs reserved for use by external modules.
 #if NRFX_CHECK(NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
 #define NRFX_SWI_RESERVED_MASK  ((NRFX_SWI_USED) | \
                                 (1u << NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE))
 #else
 #define NRFX_SWI_RESERVED_MASK  (NRFX_SWI_USED)
 #endif
 // NRFX_SWI_DISABLED_MASK - SWIs excluded from use in <nrfx_config.h>.
 #if NRFX_CHECK(NRFX_SWI0_DISABLED)
 #define NRFX_SWI0_DISABLED_MASK (1u << 0)
 #else
 #define NRFX_SWI0_DISABLED_MASK 0u
 #endif
 #if NRFX_CHECK(NRFX_SWI1_DISABLED)
 #define NRFX_SWI1_DISABLED_MASK (1u << 1)
 #else
 #define NRFX_SWI1_DISABLED_MASK 0u
 #endif
 #if NRFX_CHECK(NRFX_SWI2_DISABLED)
 #define NRFX_SWI2_DISABLED_MASK (1u << 2)
 #else
 #define NRFX_SWI2_DISABLED_MASK 0u
 #endif
 #if NRFX_CHECK(NRFX_SWI3_DISABLED)
 #define NRFX_SWI3_DISABLED_MASK (1u << 3)
 #else
 #define NRFX_SWI3_DISABLED_MASK 0u
 #endif
 #if NRFX_CHECK(NRFX_SWI4_DISABLED)
 #define NRFX_SWI4_DISABLED_MASK (1u << 4)
 #else
 #define NRFX_SWI4_DISABLED_MASK 0u
 #endif
 #if NRFX_CHECK(NRFX_SWI5_DISABLED)
 #define NRFX_SWI5_DISABLED_MASK (1u << 5)
 #else
 #define NRFX_SWI5_DISABLED_MASK 0u
 #endif
 #define NRFX_SWI_DISABLED_MASK  (NRFX_SWI0_DISABLED_MASK | \
                                 NRFX_SWI1_DISABLED_MASK | \
                                 NRFX_SWI2_DISABLED_MASK | \
                                 NRFX_SWI3_DISABLED_MASK | \
                                 NRFX_SWI4_DISABLED_MASK | \
                                 NRFX_SWI5_DISABLED_MASK)
 #if (NRFX_SWI_RESERVED_MASK & NRFX_SWI_DISABLED_MASK)
 #error "A reserved SWI configured to be disabled. Check <nrfx_config.h> and NRFX_SWI_USED."
 #endif
 // NRFX_SWI_AVAILABLE_MASK - SWIs available for this module, i.e. present
 // in the hardware and neither reserved by external modules nor disabled
 // in <nrfx_config.h>.
 #define NRFX_SWI_PRESENT_MASK   ((1u << (SWI_COUNT)) - 1u)
 #define NRFX_SWI_AVAILABLE_MASK (NRFX_SWI_PRESENT_MASK &    \
                                 ~(NRFX_SWI_RESERVED_MASK | \
                                   NRFX_SWI_DISABLED_MASK))
 #if (NRFX_SWI_AVAILABLE_MASK == 0)
 #error "No available SWI instances. Check <nrfx_config.h> and NRFX_SWI_USED."
 #endif
 #define NRFX_SWI_IS_AVAILABLE(idx)  ((NRFX_SWI_AVAILABLE_MASK >> (idx)) & 1u)
 #define NRFX_SWI_FIRST  (NRFX_SWI_IS_AVAILABLE(0) ? 0u : \
                        (NRFX_SWI_IS_AVAILABLE(1) ? 1u : \
                        (NRFX_SWI_IS_AVAILABLE(2) ? 2u : \
                        (NRFX_SWI_IS_AVAILABLE(3) ? 3u : \
                        (NRFX_SWI_IS_AVAILABLE(4) ? 4u : \
                                                    5u)))))
 #define NRFX_SWI_LAST   (NRFX_SWI_IS_AVAILABLE(5) ? 5u : \
                        (NRFX_SWI_IS_AVAILABLE(4) ? 4u : \
                        (NRFX_SWI_IS_AVAILABLE(3) ? 3u : \
                        (NRFX_SWI_IS_AVAILABLE(2) ? 2u : \
                        (NRFX_SWI_IS_AVAILABLE(1) ? 1u : \
                                                    0u)))))
 // NRFX_SWI_EGU_COUNT - number of EGU instances to be used by this module
 // (note - if EGU is not present, EGU_COUNT is not defined).
 #if NRFX_CHECK(NRFX_EGU_ENABLED)
 #define NRFX_SWI_EGU_COUNT  EGU_COUNT
 #else
 #define NRFX_SWI_EGU_COUNT  0
 #endif
 // These flags are needed only for SWIs that have no corresponding EGU unit
 // (in EGU such flags are available in hardware).
 #if (NRFX_SWI_EGU_COUNT < SWI_COUNT)
 static nrfx_swi_flags_t   m_swi_flags[SWI_COUNT - NRFX_SWI_EGU_COUNT];
 #endif
 static nrfx_swi_handler_t m_swi_handlers[SWI_COUNT];
 static uint8_t            m_swi_allocated_mask;
 static void swi_mark_allocated(nrfx_swi_t swi)
 {
    m_swi_allocated_mask |= (1u << swi);
 }
 static void swi_mark_unallocated(nrfx_swi_t swi)
 {
    m_swi_allocated_mask &= ~(1u << swi);
 }
 static bool swi_is_allocated(nrfx_swi_t swi)
 {
    return (m_swi_allocated_mask & (1u << swi));
 }
 static bool swi_is_available(nrfx_swi_t swi)
 {
    return NRFX_SWI_IS_AVAILABLE(swi);
 }
 static IRQn_Type swi_irq_number_get(nrfx_swi_t swi)
 {
 #if defined(NRF_SWI)
    return (IRQn_Type)(nrfx_get_irq_number(NRF_SWI) + swi);
 #elif defined(NRF_SWI0)
    return (IRQn_Type)(nrfx_get_irq_number(NRF_SWI0) + swi);
 #else
    return (IRQn_Type)(nrfx_get_irq_number(NRF_EGU0) + swi);
 #endif
 }
 static void swi_int_enable(nrfx_swi_t swi)
 {
 #if NRFX_SWI_EGU_COUNT
    if (swi < NRFX_SWI_EGU_COUNT)
    {
        NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi);
        NRFX_ASSERT(p_egu != NULL);
        nrf_egu_int_enable(p_egu, NRF_EGU_INT_ALL);
        if (m_swi_handlers[swi] == NULL)
        {
            return;
        }
    }
 #endif
    NRFX_IRQ_ENABLE(swi_irq_number_get(swi));
 }
 static void swi_int_disable(nrfx_swi_t swi)
 {
    NRFX_IRQ_DISABLE(swi_irq_number_get(swi));
 #if NRFX_SWI_EGU_COUNT
    if (swi < NRFX_SWI_EGU_COUNT)
    {
        nrf_egu_int_disable(nrfx_swi_egu_instance_get(swi), NRF_EGU_INT_ALL);
    }
 #endif
 }
 static void swi_handler_setup(nrfx_swi_t         swi,
                              nrfx_swi_handler_t event_handler,
                              uint32_t           irq_priority)
 {
    m_swi_handlers[swi] = event_handler;
    NRFX_IRQ_PRIORITY_SET(swi_irq_number_get(swi), irq_priority);
    swi_int_enable(swi);
 }
 static void swi_deallocate(nrfx_swi_t swi)
 {
    swi_int_disable(swi);
    m_swi_handlers[swi] = NULL;
    swi_mark_unallocated(swi);
 }
 nrfx_err_t nrfx_swi_alloc(nrfx_swi_t *       p_swi,
                          nrfx_swi_handler_t event_handler,
                          uint32_t           irq_priority)
 {
    NRFX_ASSERT(p_swi != NULL);
    nrfx_err_t err_code;
    for (nrfx_swi_t swi = NRFX_SWI_FIRST; swi <= NRFX_SWI_LAST; ++swi)
    {
        if (swi_is_available(swi))
        {
            bool allocated = false;
            NRFX_CRITICAL_SECTION_ENTER();
            if (!swi_is_allocated(swi))
            {
                swi_mark_allocated(swi);
                allocated = true;
            }
            NRFX_CRITICAL_SECTION_EXIT();
            if (allocated)
            {
                swi_handler_setup(swi, event_handler, irq_priority);
                *p_swi = swi;
                NRFX_LOG_INFO("SWI channel allocated: %d.", (*p_swi));
                return NRFX_SUCCESS;
            }
        }
    }
    err_code = NRFX_ERROR_NO_MEM;
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
 }
 bool nrfx_swi_is_allocated(nrfx_swi_t swi)
 {
    return swi_is_allocated(swi);
 }
 void nrfx_swi_int_disable(nrfx_swi_t swi)
 {
    NRFX_ASSERT(swi_is_allocated(swi));
    swi_int_disable(swi);
 }
 void nrfx_swi_int_enable(nrfx_swi_t swi)
 {
    NRFX_ASSERT(swi_is_allocated(swi));
    swi_int_enable(swi);
 }
 void nrfx_swi_free(nrfx_swi_t * p_swi)
 {
    NRFX_ASSERT(p_swi != NULL);
    nrfx_swi_t swi = *p_swi;
    NRFX_ASSERT(swi_is_allocated(swi));
    swi_deallocate(swi);
    *p_swi = NRFX_SWI_UNALLOCATED;
 }
 void nrfx_swi_all_free(void)
 {
    for (nrfx_swi_t swi = NRFX_SWI_FIRST; swi <= NRFX_SWI_LAST; ++swi)
    {
        if (swi_is_allocated(swi))
        {
            swi_deallocate(swi);
        }
    }
 }
 void nrfx_swi_trigger(nrfx_swi_t swi, uint8_t flag_number)
 {
    NRFX_ASSERT(swi_is_allocated(swi));
 #if NRFX_SWI_EGU_COUNT
    NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi);
 #if (NRFX_SWI_EGU_COUNT < SWI_COUNT)
    if (p_egu == NULL)
    {
        m_swi_flags[swi - NRFX_SWI_EGU_COUNT] |= (1 << flag_number);
        NRFX_IRQ_PENDING_SET(swi_irq_number_get(swi));
    }
    else
 #endif // (NRFX_SWI_EGU_COUNT < SWI_COUNT)
    {
        nrf_egu_task_trigger(p_egu,
            nrf_egu_task_trigger_get(p_egu, flag_number));
    }
 #else // -> #if !NRFX_SWI_EGU_COUNT
    m_swi_flags[swi - NRFX_SWI_EGU_COUNT] |= (1 << flag_number);
    NRFX_IRQ_PENDING_SET(swi_irq_number_get(swi));
 #endif
 }
 #if NRFX_SWI_EGU_COUNT
 static void egu_irq_handler(nrfx_swi_t swi, uint8_t egu_channel_count)
 {
 #if (NRFX_SWI_FIRST > 0)
    NRFX_ASSERT(swi >= NRFX_SWI_FIRST);
 #endif
    NRFX_ASSERT(swi <= NRFX_SWI_LAST);
    nrfx_swi_handler_t handler = m_swi_handlers[swi];
    NRFX_ASSERT(handler != NULL);
    NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi);
    NRFX_ASSERT(p_egu != NULL);
    nrfx_swi_flags_t flags = 0;
    for (uint8_t i = 0; i < egu_channel_count; ++i)
    {
        nrf_egu_event_t egu_event = nrf_egu_event_triggered_get(p_egu, i);
        if (nrf_egu_event_check(p_egu, egu_event))
        {
            flags |= (1u << i);
            nrf_egu_event_clear(p_egu, egu_event);
        }
    }
    handler(swi, flags);
 }
 #endif // NRFX_SWI_EGU_COUNT
 #if (NRFX_SWI_EGU_COUNT < SWI_COUNT)
 static void swi_irq_handler(nrfx_swi_t swi)
 {
 #if (NRFX_SWI_FIRST > 0)
    NRFX_ASSERT(swi >= NRFX_SWI_FIRST);
 #endif
    NRFX_ASSERT(swi <= NRFX_SWI_LAST);
    nrfx_swi_handler_t handler = m_swi_handlers[swi];
    NRFX_ASSERT(handler != NULL);
    nrfx_swi_flags_t flags = m_swi_flags[swi - NRFX_SWI_EGU_COUNT];
    m_swi_flags[swi - NRFX_SWI_EGU_COUNT] &= ~flags;
    handler(swi, flags);
 }
 #endif // (NRFX_SWI_EGU_COUNT < SWI_COUNT)
 #if NRFX_SWI_IS_AVAILABLE(0)
 void nrfx_swi_0_irq_handler(void)
 {
 #if (NRFX_SWI_EGU_COUNT > 0)
    egu_irq_handler(0, EGU0_CH_NUM);
 #else
    swi_irq_handler(0);
 #endif
 }
 #endif // NRFX_SWI_IS_AVAILABLE(0)
 #if NRFX_SWI_IS_AVAILABLE(1)
 void nrfx_swi_1_irq_handler(void)
 {
 #if (NRFX_SWI_EGU_COUNT > 1)
    egu_irq_handler(1, EGU1_CH_NUM);
 #else
    swi_irq_handler(1);
 #endif
 }
 #endif // NRFX_SWI_IS_AVAILABLE(1)
 #if  NRFX_SWI_IS_AVAILABLE(2)
 void nrfx_swi_2_irq_handler(void)
 {
 #if (NRFX_SWI_EGU_COUNT > 2)
    egu_irq_handler(2, EGU2_CH_NUM);
 #else
    swi_irq_handler(2);
 #endif
 }
 #endif // NRFX_SWI_IS_AVAILABLE(2)
 #if NRFX_SWI_IS_AVAILABLE(3)
 void nrfx_swi_3_irq_handler(void)
 {
 #if (NRFX_SWI_EGU_COUNT > 3)
    egu_irq_handler(3, EGU3_CH_NUM);
 #else
    swi_irq_handler(3);
 #endif
 }
 #endif // NRFX_SWI_IS_AVAILABLE(3)
 #if NRFX_SWI_IS_AVAILABLE(4)
 void nrfx_swi_4_irq_handler(void)
 {
 #if (NRFX_SWI_EGU_COUNT > 4)
    egu_irq_handler(4, EGU4_CH_NUM);
 #else
    swi_irq_handler(4);
 #endif
 }
 #endif // NRFX_SWI_IS_AVAILABLE(4)
 #if NRFX_SWI_IS_AVAILABLE(5)
 void nrfx_swi_5_irq_handler(void)
 {
 #if (NRFX_SWI_EGU_COUNT > 5)
    egu_irq_handler(5, EGU5_CH_NUM);
 #else
    swi_irq_handler(5);
 #endif
 }
 #endif // NRFX_SWI_IS_AVAILABLE(5)
 #endif // NRFX_CHECK(NRFX_SWI_ENABLED)
--- a/drivers/src/nrfx_timer.c
+++ b/drivers/src/nrfx_timer.c
@ -39,6 +39,22 @@
 #error "No enabled TIMER instances. Check <nrfx_config.h>."
 #endif
 #if NRFX_CHECK(NRFX_TIMER0_ENABLED) && ((1 << 0) & NRFX_TIMERS_USED)
    #error "TIMER instance 0 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_TIMER1_ENABLED) && ((1 << 1) & NRFX_TIMERS_USED)
    #error "TIMER instance 1 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_TIMER2_ENABLED) && ((1 << 2) & NRFX_TIMERS_USED)
    #error "TIMER instance 2 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_TIMER3_ENABLED) && ((1 << 3) & NRFX_TIMERS_USED)
    #error "TIMER instance 3 is reserved for use outside of nrfx."
 #endif
 #if NRFX_CHECK(NRFX_TIMER4_ENABLED) && ((1 << 4) & NRFX_TIMERS_USED)
    #error "TIMER instance 4 is reserved for use outside of nrfx."
 #endif
 #include <nrfx_timer.h>
 #define NRFX_LOG_MODULE TIMER
@ -54,7 +70,7 @@ typedef struct
 static timer_control_block_t m_cb[NRFX_TIMER_ENABLED_COUNT];
-nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const  p_instance,
+nrfx_err_t nrfx_timer_init(nrfx_timer_t const *        p_instance,
                           nrfx_timer_config_t const * p_config,
                           nrfx_timer_event_handler_t  timer_event_handler)
 {
@ -114,7 +130,7 @@ nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const  p_instance,
    return err_code;
 }
-void nrfx_timer_uninit(nrfx_timer_t const * const p_instance)
+void nrfx_timer_uninit(nrfx_timer_t const * p_instance)
 {
    if (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_UNINITIALIZED)
    {
@ -133,7 +149,7 @@ void nrfx_timer_uninit(nrfx_timer_t const * const p_instance)
    NRFX_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id);
 }
-void nrfx_timer_enable(nrfx_timer_t const * const p_instance)
+void nrfx_timer_enable(nrfx_timer_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED);
    nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
@ -141,7 +157,7 @@ void nrfx_timer_enable(nrfx_timer_t const * const p_instance)
    NRFX_LOG_INFO("Enabled instance: %d.", p_instance->instance_id);
 }
-void nrfx_timer_disable(nrfx_timer_t const * const p_instance)
+void nrfx_timer_disable(nrfx_timer_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
    nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN);
@ -149,33 +165,33 @@ void nrfx_timer_disable(nrfx_timer_t const * const p_instance)
    NRFX_LOG_INFO("Disabled instance: %d.", p_instance->instance_id);
 }
-bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance)
+bool nrfx_timer_is_enabled(nrfx_timer_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
    return (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
 }
-void nrfx_timer_resume(nrfx_timer_t const * const p_instance)
+void nrfx_timer_resume(nrfx_timer_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
    nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
    NRFX_LOG_INFO("Resumed instance: %d.", p_instance->instance_id);
 }
-void nrfx_timer_pause(nrfx_timer_t const * const p_instance)
+void nrfx_timer_pause(nrfx_timer_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
    nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP);
    NRFX_LOG_INFO("Paused instance: %d.", p_instance->instance_id);
 }
-void nrfx_timer_clear(nrfx_timer_t const * const p_instance)
+void nrfx_timer_clear(nrfx_timer_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
    nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_CLEAR);
 }
-void nrfx_timer_increment(nrfx_timer_t const * const p_instance)
+void nrfx_timer_increment(nrfx_timer_t const * p_instance)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
    NRFX_ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER);
@ -183,7 +199,7 @@ void nrfx_timer_increment(nrfx_timer_t const * const p_instance)
    nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT);
 }
-uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance,
+uint32_t nrfx_timer_capture(nrfx_timer_t const *   p_instance,
                            nrf_timer_cc_channel_t cc_channel)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
@ -191,10 +207,10 @@ uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance,
    nrf_timer_task_trigger(p_instance->p_reg,
        nrf_timer_capture_task_get(cc_channel));
-    return nrf_timer_cc_read(p_instance->p_reg, cc_channel);
+    return nrf_timer_cc_get(p_instance->p_reg, cc_channel);
 }
-void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
+void nrfx_timer_compare(nrfx_timer_t const *   p_instance,
                        nrf_timer_cc_channel_t cc_channel,
                        uint32_t               cc_value,
                        bool                   enable_int)
@ -211,14 +227,14 @@ void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
        nrf_timer_int_disable(p_instance->p_reg, timer_int);
    }
-    nrf_timer_cc_write(p_instance->p_reg, cc_channel, cc_value);
+    nrf_timer_cc_set(p_instance->p_reg, cc_channel, cc_value);
    NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
                  p_instance->instance_id,
                  cc_value,
                  cc_channel);
 }
-void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
+void nrfx_timer_extended_compare(nrfx_timer_t const *   p_instance,
                                 nrf_timer_cc_channel_t cc_channel,
                                 uint32_t               cc_value,
                                 nrf_timer_short_mask_t timer_short_mask,
@ -240,7 +256,7 @@ void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
                  cc_channel);
 }
-void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,
+void nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance,
                                   uint32_t             channel)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
@ -252,7 +268,7 @@ void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,
        nrf_timer_compare_int_get(channel));
 }
-void nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance,
+void nrfx_timer_compare_int_disable(nrfx_timer_t const * p_instance,
                                    uint32_t             channel)
 {
    NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
--- a/Show more
+++ b/Show more