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12 commits

Author SHA1 Message Date
Dan Halbert
6386b78024
Merge pull request #11 from flyerink/main
Add Microchip SST QSPI Flash
2022-11-27 15:00:40 -05:00
flyerink
06a40d6bae Add Microchip SST QSPI Flash 2022-11-26 11:58:27 +08:00
Scott Shawcroft
2d292ad4e6
Merge pull request #8 from xorbit/P25Q32H
Add Puya P25Q32H 4MiB SPI flash
2022-06-06 15:11:33 -07:00
Patrick Van Oosterwijck
c854086194 Add Puya P25Q32H 4MiB SPI flash
Needed for upcoming RP2040-Shim.  Configuration with datasheet
page references, tested to work on prototype.
2022-06-04 14:10:54 -06:00
Jeff Epler
266ea20ed8
Merge pull request #7 from jpconstantineau/main
Update P25Q16H.toml - Manufacturer ID cannot be in 2 files.
2021-11-04 09:25:07 -05:00
Pierre Constantineau
de01c42403
Update P25Q16H.toml - Manufacturer ID cannot be in 2 files. 2021-11-03 17:53:46 -06:00
Scott Shawcroft
73cedb3547
Merge pull request #6 from jpconstantineau/puya
Initial files for puya
2021-11-01 16:47:30 -07:00
Pierre Constantineau
8fc2ab5ded added notice that config is still untested 2021-11-01 15:52:44 -06:00
Pierre Constantineau
63ed461792 initial files for puya 2021-10-28 11:49:24 -06:00
Scott Shawcroft
38b659dc8e
Merge pull request #5 from EmergReanimator/main
ISSI IS25LP016D description
2021-10-05 13:34:37 -07:00
EmergReanimator
cb7b7f8556
Merge pull request #1 from EmergReanimator/EmergReanimator-ISSI
Added ISSI IS25LP016D description
2021-10-03 19:05:31 +02:00
EmergReanimator
d30761bbc4
Added ISSI IS25LP016D description 2021-09-28 13:54:51 +02:00
7 changed files with 57 additions and 0 deletions

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# Settings for the ISSI IS25LP016D 2MiB SPI flash.
# Datasheet: http://www.issi.com/WW/pdf/25LP-WP016D.pdf
total_size = 0x200000 # 2 MiB
capacity = 0x15

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# Settings for the Microchip SST26VF016B 16Mb (2MiB) QSPI flash.
# Datasheet: https://www.microchip.com/en-us/product/SST26VF016B
total_size = 0x200000 # 2 MiB
memory_type = 0x26
capacity = 0x41
start_up_time_us = 10000
max_clock_speed_mhz = 104
single_status_byte = true
write_status_register_split = false
quad_enable_bit_mask = 0x00
quad_enable_status_byte = 1
6b_quad_read = true
32_qspi_write = true

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# Settings for the Microchip SST26VF064B 64b (8MiB) QSPI flash.
# Datasheet: https://www.microchip.com/en-us/product/SST26VF064B
total_size = 0x800000 # 8 MiB
memory_type = 0x26
capacity = 0x43
start_up_time_us = 10000
max_clock_speed_mhz = 104
single_status_byte = true
write_status_register_split = false
quad_enable_bit_mask = 0x00
quad_enable_status_byte = 1
6b_quad_read = true
32_qspi_write = true

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manufacturer_id = 0xBF
has_sector_protection = true

8
flash/puya/P25Q16H.toml Normal file
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# Settings for the Puya P25Q16H 2MiB SPI flash.
# Datasheet: https://datasheet.lcsc.com/lcsc/2006121819_-PUYA--P25Q16H-UXH-IR_C559220.pdf
# This config is still untested.
total_size = 0x200000 # 2 MiB # Page 17
capacity = 0x15
write_status_register_split = false
01_continuous_status_write = true # page 21
e7_quad_word_read = false # couldn't find in page 21/22

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flash/puya/P25Q32H.toml Normal file
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# Settings for the Puya P25Q32H 4MiB SPI flash.
# Datasheet: https://datasheet.lcsc.com/lcsc/1912111437_-PUYA--P25Q32H-UXH-IR_C414068.pdf
total_size = 0x400000 # 4 MiB # Page 18
capacity = 0x16 # page 70
write_status_register_split = true # page 34
01_continuous_status_write = true # page 23
e7_quad_word_read = true # page 22

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flash/puya/puya.toml Normal file
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# This config is still untested.
start_up_time_us = 5000
manufacturer_id = 0x85 # Page 49 of https://datasheet.lcsc.com/lcsc/2006121819_-PUYA--P25Q16H-UXH-IR_C559220.pdf
memory_type = 0x60 # Page 49 of https://datasheet.lcsc.com/lcsc/2006121819_-PUYA--P25Q16H-UXH-IR_C559220.pdf
max_clock_speed_mhz = 104 # Page 10 of https://datasheet.lcsc.com/lcsc/2006121819_-PUYA--P25Q16H-UXH-IR_C559220.pdf
quad_enable_bit_mask = 0x02 # page 24
has_sector_protection = false
quad_enable_status_byte = 2 # page 24
6b_quad_read = true # Page 21 of https://datasheet.lcsc.com/lcsc/2006121819_-PUYA--P25Q16H-UXH-IR_C559220.pdf
32_qspi_write = true # Page 21 of https://datasheet.lcsc.com/lcsc/2006121819_-PUYA--P25Q16H-UXH-IR_C559220.pdf