WIP fix pixel ctrl value & how row start is calculated
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e60a4d174b
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a939ea65a1
1 changed files with 3 additions and 3 deletions
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@ -174,7 +174,7 @@ void video_init(uint32_t *framebuffer) {
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// Write ctrl and write_addr once when not pixel doubling because they don't
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// Write ctrl and write_addr once when not pixel doubling because they don't
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// change. (write_addr doesn't change when pixel doubling either but we need
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// change. (write_addr doesn't change when pixel doubling either but we need
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// to rewrite it because it is after the ctrl register.)
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// to rewrite it because it is after the ctrl register.)
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dma_channel_hw_addr(self->dma_pixel_channel)->al1_ctrl = dma_ctrl;
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dma_channel_hw_addr(self->dma_pixel_channel)->al1_ctrl = dma_pixel_ctrl;
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dma_channel_hw_addr(self->dma_pixel_channel)->al1_write_addr = dma_write_addr;
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dma_channel_hw_addr(self->dma_pixel_channel)->al1_write_addr = dma_write_addr;
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for (size_t v_scanline = 0; v_scanline < MODE_V_TOTAL_LINES; v_scanline++) {
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for (size_t v_scanline = 0; v_scanline < MODE_V_TOTAL_LINES; v_scanline++) {
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@ -193,8 +193,8 @@ void video_init(uint32_t *framebuffer) {
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size_t row = v_scanline - active_start;
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size_t row = v_scanline - active_start;
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size_t transfer_count = words_per_line;
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size_t transfer_count = words_per_line;
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self->dma_commands[command_word++] = transfer_count;
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self->dma_commands[command_word++] = transfer_count;
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uint32_t *row_start = &framebuffer[row * words_per_line];
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uintptr_t row_start = row * (DISP_WIDTH / 8) + (uintptr_t)framebuffer;
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self->dma_commands[command_word++] = (uintptr_t)row_start;
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self->dma_commands[command_word++] = row_start;
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}
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}
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}
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}
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// Last command is NULL which will trigger an IRQ.
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// Last command is NULL which will trigger an IRQ.
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