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Merge pull request #2 from adafruit/update-sound-build-etc

Browse source 
Add overclocking, update sound build etc
This commit is contained in:
Limor "Ladyada" Fried 2025-03-27 14:53:31 -04:00 committed by GitHub
commit e98a74b69c
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GPG key ID: B5690EEEBB952194
9 changed files with 271 additions and 123 deletions
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10
.github/workflows/build.yaml vendored
View file

@ -39,18 +39,24 @@ jobs:
./fruitjam-build.sh -m 4096 -v
./fruitjam-build.sh -m 400
./fruitjam-build.sh -m 400 -v
./fruitjam-build.sh -m 400 -o
./fruitjam-build.sh -m 400 -v -o
mkdir uf2s
cp build*/*.uf2 uf2s/
mkdir elfs
cp build*/*.elf elfs/
- name: Upload artifact
uses: actions/upload-artifact@v4
with:
name: uf2 files
path: build*/*.uf2
path: uf2s/*
- name: Upload artifact
uses: actions/upload-artifact@v4
with:
name: elf files
path: build*/*.elf
path: elfs/*
- name: Create release
if: startsWith(github.ref, 'refs/tags/')

37
CMakeLists.txt
View file

@ -55,6 +55,8 @@ set(HSTX_D0P 15 CACHE STRING "HSTX D0+ PIN")
set(HSTX_D1P 17 CACHE STRING "HSTX D1+ PIN")
set(HSTX_D2P 19 CACHE STRING "HSTX D2+ PIN")
option(OVERCLOCK "Overclock to 264MHz (known incompatible with psram)" OFF)
# Options for analog VGA output
option(USE_VGA_RES "Video uses VGA (640x480) resolution" OFF)
set(VIDEO_PIN 18 CACHE STRING "VGA Video GPIO base pin (followed by VS, CLK, HS)")
@ -73,6 +75,8 @@ set(PIN_AUDIO_PWM 41 CACHE STRING "Pin for PWM audio")
# overriding defaults.
set(MEMSIZE 128 CACHE STRING "Memory size, in KB")
set(DISC_IMAGE ${CMAKE_CURRENT_SOURCE_DIR}/umac0ro.img CACHE FILEPATH "Built-in disk image")
if (USE_HSTX)
add_compile_definitions(USE_VGA_RES=1)
add_compile_definitions(HSTX_CKP=${HSTX_CKP} HSTX_D0P=${HSTX_D0P} HSTX_D1P=${HSTX_D1P} HSTX_D2P=${HSTX_D2P})
@ -82,15 +86,24 @@ else()
set(VIDEO_SRC src/video_vga.c)
endif()
if (OVERCLOCK)
add_compile_definitions(OVERCLOCK=1)
set(OPT_OC "-oc")
else()
set(OPT_OC "")
endif()
if (USE_VGA_RES)
add_compile_definitions(USE_VGA_RES=1)
add_compile_definitions(DISP_WIDTH=640)
add_compile_definitions(DISP_HEIGHT=480)
set(RES "640x480")
set(RESFLAG "-v")
else()
add_compile_definitions(DISP_WIDTH=512)
add_compile_definitions(DISP_HEIGHT=342)
set(RES "512x342")
set(RESFLAG "")
endif()
if (USE_PSRAM)
@ -101,7 +114,7 @@ else()
set(OPT_PSRAM "")
endif()
set(FIRMWARE "pico-mac-${PICO_BOARD}-${MEMSIZE}k-${RES}${OPT_PSRAM}")
set(FIRMWARE "pico-mac-${PICO_BOARD}-${MEMSIZE}k-${RES}${OPT_PSRAM}${OPT_OC}")
# initialize the SDK based on PICO_SDK_PATH
@ -166,7 +179,7 @@ if (USE_AUDIO)
add_subdirectory(external/pico-extras/src/rp2_common/pico_audio_i2s)
add_subdirectory(external/pico-extras/src/common/pico_audio)
add_subdirectory(external/pico-extras/src/common/pico_util_buffer)
add_compile_definitions(ENABLE_AUDIO=1 PICO_AUDIO_I2S_PIO=1 PICO_AUDIO_I2S_DMA_IRQ=0 PICO_AUDIO_I2S_DATA_PIN=24 PICO_AUDIO_I2S_CLOCK_PIN_BASE=25 PICO_AUDIO_I2S_MONO_INPUT=1 PICO_AUDIO_I2S_SWAP_CLOCK=1)
add_compile_definitions(ENABLE_AUDIO=1 PICO_AUDIO_I2S_CLOCK_PINS_SWAPPED=1 PICO_AUDIO_I2S_PIO=1 PICO_AUDIO_I2S_DMA_IRQ=0 PICO_AUDIO_I2S_DATA_PIN=24 PICO_AUDIO_I2S_CLOCK_PIN_BASE=25 PICO_AUDIO_I2S_MONO_INPUT=1 PICO_AUDIO_I2S_SWAP_CLOCK=1)
set(EXTRA_AUDIO_LIB pico_util_buffer pico_audio pico_audio_i2s hardware_i2c)
endif()
@ -176,6 +189,7 @@ if (TARGET tinyusb_device)
${VIDEO_SRC}
src/kbd.c
src/hid.c
src/clocking.c
${EXTRA_SD_SRC}
${PICO_TINYUSB_PATH}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@ -187,6 +201,21 @@ if (TARGET tinyusb_device)
)
# The umac sources need to prepare Musashi (some sources are generated):
add_custom_command(OUTPUT incbin/umac-rom.h
COMMAND echo "*** Patching ROM ***"
COMMAND set -xe && mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/incbin && make -C ${UMAC_PATH} patcher && ${UMAC_PATH}/patcher ${RESFLAG} -m ${MEMSIZE} -r "${CMAKE_CURRENT_LIST_DIR}/rom.bin" -w ${CMAKE_CURRENT_BINARY_DIR}/incbin/umac-rom.h
)
add_custom_target(prepare_rom
DEPENDS incbin/umac-rom.h
)
add_custom_command(OUTPUT incbin/umac-disc.h
COMMAND echo "DISC_IMAGE is ${DISC_IMAGE}" && mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/incbin && xxd -i < "${DISC_IMAGE}" > ${CMAKE_CURRENT_BINARY_DIR}/incbin/umac-disc.h
)
add_custom_target(prepare_disc
DEPENDS incbin/umac-disc.h
)
add_custom_command(OUTPUT ${UMAC_MUSASHI_PATH}/m68kops.c
COMMAND echo "*** Preparing umac source ***"
COMMAND make -C ${UMAC_PATH} prepare
@ -194,7 +223,7 @@ if (TARGET tinyusb_device)
add_custom_target(prepare_umac
DEPENDS ${UMAC_MUSASHI_PATH}/m68kops.c
)
add_dependencies(${FIRMWARE} prepare_umac)
add_dependencies(${FIRMWARE} prepare_umac prepare_rom prepare_disc)
target_link_libraries(${FIRMWARE}
pico_stdlib
@ -214,7 +243,7 @@ if (TARGET tinyusb_device)
${PICO_TINYUSB_PATH}/src
${UMAC_INCLUDE_PATHS}
${PIOUSB_PATH}/src
incbin
${CMAKE_CURRENT_BINARY_DIR}/incbin
${CMAKE_CURRENT_LIST_DIR}
)

2
external/pico-extras vendored

@ -1 +1 @@
Subproject commit c73f2f3a2b1ef65dc50113a22aadc5a262a92e0f
Subproject commit 601b1bfdb1089068f8515a623622fcb38648417a

2
external/umac vendored

@ -1 +1 @@
Subproject commit ce55830a1babd681d0e9a639c9b23f10cd9e3c96
Subproject commit 431e905354e975cd942eb4c1c5ea5a39237691ab

20
fetch-rom-dsk.sh
View file

@ -1,21 +1,13 @@
#!/bin/sh
mkdir -p incbin
set -xe
if ! [ -f rom.bin ]; then
if ! [ -f '4D1F8172 - MacPlus v3.ROM' ]; then
curl -L 'https://ia902205.us.archive.org/view_archive.php?archive=/18/items/mac_rom_archive_-_as_of_8-19-2011/mac_rom_archive_-_as_of_8-19-2011.zip&file=4D1F8172%20-%20MacPlus%20v3.ROM' > '4D1F8172 - MacPlus v3.ROM'
fi
make -C external/umac clean
make -C external/umac DISP_WIDTH=512 DISP_HEIGHT=342
./external/umac/main -r '4D1F8172 - MacPlus v3.ROM' -W rom.bin
curl -L 'https://ia902205.us.archive.org/view_archive.php?archive=/18/items/mac_rom_archive_-_as_of_8-19-2011/mac_rom_archive_-_as_of_8-19-2011.zip&file=4D1F8172%20-%20MacPlus%20v3.ROM' > rom.bin
fi
xxd -i < rom.bin > incbin/umac-rom.h
if ! [ -f umac0ro.img ]; then
curl -L 'https://archive.org/download/apple-mac-os-system-3.2-finder-5.3-system-tools-1.0-512-ke-jun-1986-3.5-800k.-7z/Apple%20Mac%20OS%20%28System%203.2%20Finder%205.3%29%20%28System%20Tools%201.0%20Mac%20128%2C%20512K%29%20%28Jun%201986%29%20%283.5-400k%29.7z' > 'Apple Mac OS (System 3.2 Finder 5.3) (System Tools 1.1 Mac Plus) (Jun 1986) (3.5-800k).7z'
7z x -so 'Apple Mac OS (System 3.2 Finder 5.3) (System Tools 1.1 Mac Plus) (Jun 1986) (3.5-800k).7z' 'Apple Mac OS (System 3.2 Finder 5.3) (System Tools 1.0 Mac 128, 512K) (Jun 1986) (3.5-400k)/System Installation.img' > umac0ro.img
if ! [ -f os.7z ]; then
curl -L 'https://archive.org/download/apple-mac-os-system-3.2-finder-5.3-system-tools-1.0-512-ke-jun-1986-3.5-800k.-7z/Apple%20Mac%20OS%20%28System%203.2%20Finder%205.3%29%20%28System%20Tools%201.0%20Mac%20128%2C%20512K%29%20%28Jun%201986%29%20%283.5-400k%29.7z' > 'os.7z'
fi
7z x -so 'os.7z' 'Apple Mac OS (System 3.2 Finder 5.3) (System Tools 1.0 Mac 128, 512K) (Jun 1986) (3.5-400k)/System Installation.img' > umac0ro.img
fi
xxd -i < umac0ro.img > incbin/umac-disc.h

40
fruitjam-build.sh
View file

@ -10,11 +10,15 @@ set -e
DISP_WIDTH=512
DISP_HEIGHT=342
MEMSIZE=400
DISK_IMAGE=""
DISC_IMAGE=
CMAKE_ARGS=""
OVERCLOCK=0
while getopts "hvd:m:" o; do
while getopts "hovd:m:" o; do
case "$o" in
(o)
OVERCLOCK=1
;;
(v)
DISP_WIDTH=640
DISP_HEIGHT=480
@ -24,14 +28,15 @@ while getopts "hvd:m:" o; do
MEMSIZE=$OPTARG
;;
(d)
DISK_IMAGE=$OPTARG
DISC_IMAGE=$OPTARG
;;
(h|?)
echo "Usage: $0 [-v] [-m KiB] [-d diskimage]"
echo ""
echo " -v: Use framebuffer resolution 640x480 instead of 512x342"
echo " -m: Set memory size in KiB"
echo " -d: Specify disk image to include"
echo " -m: Set memory size in KiB (over 400kB requires psram)"
echo " -d: Specify disc image to include"
echo " -o: Overclock to 264MHz (known to be incompatible with psram)"
echo ""
echo "PSRAM is automatically set depending on memory & framebuffer details"
exit
@ -44,6 +49,9 @@ shift $((OPTIND-1))
TAG=fruitjam_${DISP_WIDTH}x${DISP_HEIGHT}_${MEMSIZE}k
PSRAM=$((MEMSIZE > 400))
if [ $PSRAM -ne 0 ] ; then
if [ $OVERCLOCK -ne 0 ]; then
echo "*** Overclock + PSRAM is known not to work. You have been warned."
fi
TAG=${TAG}_psram
CMAKE_ARGS="$CMAKE_ARGS -DUSE_PSRAM=1"
fi
@ -54,22 +62,18 @@ if [ "$MIRROR_FRAMEBUFFER" -eq 0 ]; then
fi
# Append disk name to build directory if disk image is specified
if [ -n "$DISK_IMAGE" ] && [ -f "$DISK_IMAGE" ]; then
if [ -n "$DISC_IMAGE" ] && [ -f "$DISC_IMAGE" ]; then
# Extract filename without extension
DISK_NAME=$(basename "$DISK_IMAGE" | sed 's/\.[^.]*$//')
TAG=${TAG}_${DISK_NAME}
DISC_IMAGE=$(basename "$DISC_IMAGE" | sed 's/\.[^.]*$//')
CMAKE_ARGS="$CMAKE_ARGS -DDISK_IMAGE=${DISC_IMAGE}"
TAG=${TAG}_${DISC_IMAGE}
fi
if [ $OVERCLOCK -ne 0 ]; then
TAG=${TAG}_overclock
fi
set -x
make -C external/umac clean
make -C external/umac DISP_WIDTH=${DISP_WIDTH} DISP_HEIGHT=${DISP_HEIGHT} MEMSIZE=${MEMSIZE}
rm -f rom.bin
./external/umac/main -r '4D1F8172 - MacPlus v3.ROM' -W rom.bin || true
[ -f rom.bin ]
xxd -i < rom.bin > incbin/umac-rom.h
if [ -n "$DISK_IMAGE" ] && [ -f "$DISK_IMAGE" ]; then
xxd -i < "$DISK_IMAGE" > incbin/umac-disc.h
fi
rm -rf build_${TAG}
cmake -S . -B build_${TAG} \
-DPICO_SDK_PATH=../pico-sdk \
@ -80,5 +84,7 @@ cmake -S . -B build_${TAG} \
-DSD_TX=35 -DSD_RX=36 -DSD_SCK=34 -DSD_CS=39 -DUSE_SD=1 \
-DUART_TX=44 -DUART_RX=45 -DUART=0 \
-DBOARD_FILE=boards/adafruit_fruit_jam.c \
-DSD_MHZ=16 \
-DOVERCLOCK=${OVERCLOCK} \
${CMAKE_ARGS} "$@"
make -C build_${TAG} -j$(nproc)

11
include/clocking.h Normal file
View file

@ -0,0 +1,11 @@
#pragma once
#include <stdint.h>
enum clk_sys_speed {
CLK_SYS_264MHZ = 2,
CLK_SYS_176MHZ = 3,
CLK_SYS_132MHZ = 4,
};
extern void overclock(enum clk_sys_speed clk_sys_div, uint32_t bit_clk_hz);

172
src/clocking.c Normal file
View file

@ -0,0 +1,172 @@
#include "clocking.h"
#include <stdio.h>
#include "pico.h"
#include "pico/stdio.h"
#include "hardware/clocks.h"
#include "hardware/pll.h"
#include "hardware/structs/ioqspi.h"
#include "hardware/structs/qmi.h"
#include "hardware/sync.h"
#include "hardware/vreg.h"
static void __no_inline_not_in_flash_func(set_qmi_timing)() {
// Make sure flash is deselected - QMI doesn't appear to have a busy flag(!)
while ((ioqspi_hw->io[1].status & IO_QSPI_GPIO_QSPI_SS_STATUS_OUTTOPAD_BITS) != IO_QSPI_GPIO_QSPI_SS_STATUS_OUTTOPAD_BITS)
;
qmi_hw->m[0].timing = 0x40000202;
//qmi_hw->m[0].timing = 0x40000101;
// Force a read through XIP to ensure the timing is applied
volatile uint32_t* ptr = (volatile uint32_t*)0x14000000;
(void) *ptr;
}
#ifndef RP2350_PSRAM_MAX_SELECT_FS64
#define RP2350_PSRAM_MAX_SELECT_FS64 (125000000)
#endif
#ifndef RP2350_PSRAM_MIN_DESELECT_FS
#define RP2350_PSRAM_MIN_DESELECT_FS (50000000)
#endif
#ifndef RP2350_PSRAM_MAX_SCK_HZ
#define RP2350_PSRAM_MAX_SCK_HZ (109000000)
#endif
#define SEC_TO_FS 1000000000000000ll
static void __no_inline_not_in_flash_func(set_psram_timing)(void) {
// Get secs / cycle for the system clock - get before disabling interrupts.
uint32_t sysHz = (uint32_t)clock_get_hz(clk_sys);
// Calculate the clock divider - goal to get clock used for PSRAM <= what
// the PSRAM IC can handle - which is defined in RP2350_PSRAM_MAX_SCK_HZ
volatile uint8_t clockDivider = (sysHz + RP2350_PSRAM_MAX_SCK_HZ - 1) / RP2350_PSRAM_MAX_SCK_HZ;
uint32_t intr_stash = save_and_disable_interrupts();
// Get the clock femto seconds per cycle.
uint32_t fsPerCycle = SEC_TO_FS / sysHz;
// the maxSelect value is defined in units of 64 clock cycles
// So maxFS / (64 * fsPerCycle) = maxSelect = RP2350_PSRAM_MAX_SELECT_FS64/fsPerCycle
volatile uint8_t maxSelect = RP2350_PSRAM_MAX_SELECT_FS64 / fsPerCycle;
// minDeselect time - in system clock cycle
// Must be higher than 50ns (min deselect time for PSRAM) so add a fsPerCycle - 1 to round up
// So minFS/fsPerCycle = minDeselect = RP2350_PSRAM_MIN_DESELECT_FS/fsPerCycle
volatile uint8_t minDeselect = (RP2350_PSRAM_MIN_DESELECT_FS + fsPerCycle - 1) / fsPerCycle;
printf("syshz=%u\n", sysHz);
printf("Max Select: %d, Min Deselect: %d, clock divider: %d\n", maxSelect, minDeselect, clockDivider);
qmi_hw->m[1].timing = QMI_M1_TIMING_PAGEBREAK_VALUE_1024 << QMI_M1_TIMING_PAGEBREAK_LSB | // Break between pages.
3 << QMI_M1_TIMING_SELECT_HOLD_LSB | // Delay releasing CS for 3 extra system cycles.
1 << QMI_M1_TIMING_COOLDOWN_LSB | 1 << QMI_M1_TIMING_RXDELAY_LSB |
maxSelect << QMI_M1_TIMING_MAX_SELECT_LSB | minDeselect << QMI_M1_TIMING_MIN_DESELECT_LSB |
clockDivider << QMI_M1_TIMING_CLKDIV_LSB;
restore_interrupts(intr_stash);
}
static void __no_inline_not_in_flash_func(clock_init)(int sys_clk_div) {
uint32_t intr_stash = save_and_disable_interrupts();
// Before messing with clock speeds ensure QSPI clock is nice and slow
hw_write_masked(&qmi_hw->m[0].timing, 6, QMI_M0_TIMING_CLKDIV_BITS);
// We're going to go fast, boost the voltage a little
vreg_set_voltage(VREG_VOLTAGE_1_15);
// Force a read through XIP to ensure the timing is applied before raising the clock rate
volatile uint32_t* ptr = (volatile uint32_t*)0x14000000;
(void) *ptr;
// Before we touch PLLs, switch sys and ref cleanly away from their aux sources.
hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
while (clocks_hw->clk[clk_sys].selected != 0x1)
tight_loop_contents();
hw_write_masked(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_VALUE_XOSC_CLKSRC, CLOCKS_CLK_REF_CTRL_SRC_BITS);
while (clocks_hw->clk[clk_ref].selected != 0x4)
tight_loop_contents();
// Stop the other clocks so we don't worry about overspeed
clock_stop(clk_usb);
clock_stop(clk_adc);
clock_stop(clk_peri);
clock_stop(clk_hstx);
// Set USB PLL to 528MHz
pll_init(pll_usb, PLL_COMMON_REFDIV, 1584 * MHZ, 3, 1);
const uint32_t usb_pll_freq = 528 * MHZ;
// CLK SYS = PLL USB 528MHz / sys_clk_div = 264MHz, 176MHz, or 132MHz
clock_configure(clk_sys,
CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
usb_pll_freq, usb_pll_freq / sys_clk_div);
// CLK PERI = PLL USB 528MHz / 4 = 132MHz
clock_configure(clk_peri,
0, // Only AUX mux on ADC
CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
usb_pll_freq, usb_pll_freq / 4);
// CLK USB = PLL USB 528MHz / 11 = 48MHz
clock_configure(clk_usb,
0, // No GLMUX
CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
usb_pll_freq,
USB_CLK_KHZ * KHZ);
// CLK ADC = PLL USB 528MHz / 11 = 48MHz
clock_configure(clk_adc,
0, // No GLMUX
CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
usb_pll_freq,
USB_CLK_KHZ * KHZ);
// Now we are running fast set fast QSPI clock and read delay
set_qmi_timing();
restore_interrupts(intr_stash);
}
void overclock(enum clk_sys_speed clk_sys_div, uint32_t bit_clk_khz) {
clock_init(clk_sys_div);
stdio_init_all();
set_psram_timing();
#define SHOW_CLK(i) printf("clk_get_hz(%s) -> %u\n", #i, clock_get_hz(i));
SHOW_CLK(clk_gpout0);
SHOW_CLK(clk_gpout1);
SHOW_CLK(clk_gpout2);
SHOW_CLK(clk_gpout3);
SHOW_CLK(clk_ref);
SHOW_CLK(clk_sys);
SHOW_CLK(clk_peri);
SHOW_CLK(clk_hstx);
SHOW_CLK(clk_usb);
SHOW_CLK(clk_adc);
const uint32_t dvi_clock_khz = bit_clk_khz >> 1;
printf("bit_clk_khz = %u dvi_clock_khz = %u\n", bit_clk_khz, dvi_clock_khz);
uint vco_freq, post_div1, post_div2;
if (!check_sys_clock_khz(dvi_clock_khz, &vco_freq, &post_div1, &post_div2))
panic("System clock of %u kHz cannot be exactly achieved", dvi_clock_khz);
const uint32_t freq = vco_freq / (post_div1 * post_div2);
// Set the sys PLL to the requested freq
pll_init(pll_sys, PLL_COMMON_REFDIV, vco_freq, post_div1, post_div2);
// CLK HSTX = Requested freq
clock_configure(clk_hstx,
0,
CLOCKS_CLK_HSTX_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
freq, freq);
}

100
src/main.c
View file

@ -45,6 +45,7 @@
#include "tusb.h"
#include "umac.h"
#include "clocking.h"
#if USE_SD
#include "f_util.h"
@ -471,6 +472,9 @@ static void __no_inline_not_in_flash_func(setup_psram)(void) {
int main()
{
#if defined(OVERCLOCK) && OVERCLOCK+0
overclock(CLK_SYS_264MHZ, 252000);
#endif
// set_sys_clock_khz(250*1000, true);
setup_psram();
@ -478,6 +482,18 @@ int main()
stdio_init_all();
io_init();
#define SHOW_CLK(i) printf("clk_get_hz(%s) -> %u\n", #i, clock_get_hz(i));
SHOW_CLK(clk_gpout0);
SHOW_CLK(clk_gpout1);
SHOW_CLK(clk_gpout2);
SHOW_CLK(clk_gpout3);
SHOW_CLK(clk_ref);
SHOW_CLK(clk_sys);
SHOW_CLK(clk_peri);
SHOW_CLK(clk_hstx);
SHOW_CLK(clk_usb);
SHOW_CLK(clk_adc);
#if ENABLE_AUDIO
audio_setup();
#endif
@ -525,7 +541,6 @@ void writeRegister(uint8_t reg, uint8_t value) {
printf("res=%d\n", res);
panic("i2c_write_timeout failed: res=%d\n", res);
}
printf("Write Reg: %d = 0x%x\n", reg, value);
}
uint8_t readRegister(uint8_t reg) {
@ -533,22 +548,18 @@ uint8_t readRegister(uint8_t reg) {
buf[0] = reg;
int res = i2c_write_timeout_us(i2c0, I2C_ADDR, buf, sizeof(buf), /* nostop */ true, 1000);
if (res != 1) {
printf("res=%d\n", res);
panic("i2c_write_timeout failed: res=%d\n", res);
}
res = i2c_read_timeout_us(i2c0, I2C_ADDR, buf, sizeof(buf), /* nostop */ false, 1000);
if (res != 1) {
printf("res=%d\n", res);
panic("i2c_read_timeout failed: res=%d\n", res);
}
uint8_t value = buf[0];
printf("Read Reg: %d = 0x%x\n", reg, value);
return value;
}
void modifyRegister(uint8_t reg, uint8_t mask, uint8_t value) {
uint8_t current = readRegister(reg);
printf("Modify Reg: %d = [Before: 0x%x] with mask 0x%x and value 0x%x\n", reg, current, mask, value);
uint8_t new_value = (current & ~mask) | (value & mask);
writeRegister(reg, new_value);
}
@ -660,84 +671,6 @@ setPage(0);
setPage(0);
printf("Initialization complete!\n");
// Read all registers for verification
printf("Reading all registers for verification:\n");
setPage(0);
readRegister(0x00); // AIC31XX_PAGECTL
readRegister(0x01); // AIC31XX_RESET
readRegister(0x03); // AIC31XX_OT_FLAG
readRegister(0x04); // AIC31XX_CLKMUX
readRegister(0x05); // AIC31XX_PLLPR
readRegister(0x06); // AIC31XX_PLLJ
readRegister(0x07); // AIC31XX_PLLDMSB
readRegister(0x08); // AIC31XX_PLLDLSB
readRegister(0x0B); // AIC31XX_NDAC
readRegister(0x0C); // AIC31XX_MDAC
readRegister(0x0D); // AIC31XX_DOSRMSB
readRegister(0x0E); // AIC31XX_DOSRLSB
readRegister(0x10); // AIC31XX_MINI_DSP_INPOL
readRegister(0x12); // AIC31XX_NADC
readRegister(0x13); // AIC31XX_MADC
readRegister(0x14); // AIC31XX_AOSR
readRegister(0x19); // AIC31XX_CLKOUTMUX
readRegister(0x1A); // AIC31XX_CLKOUTMVAL
readRegister(0x1B); // AIC31XX_IFACE1
readRegister(0x1C); // AIC31XX_DATA_OFFSET
readRegister(0x1D); // AIC31XX_IFACE2
readRegister(0x1E); // AIC31XX_BCLKN
readRegister(0x1F); // AIC31XX_IFACESEC1
readRegister(0x20); // AIC31XX_IFACESEC2
readRegister(0x21); // AIC31XX_IFACESEC3
readRegister(0x22); // AIC31XX_I2C
readRegister(0x24); // AIC31XX_ADCFLAG
readRegister(0x25); // AIC31XX_DACFLAG1
readRegister(0x26); // AIC31XX_DACFLAG2
readRegister(0x27); // AIC31XX_OFFLAG
readRegister(0x2C); // AIC31XX_INTRDACFLAG
readRegister(0x2D); // AIC31XX_INTRADCFLAG
readRegister(0x2E); // AIC31XX_INTRDACFLAG2
readRegister(0x2F); // AIC31XX_INTRADCFLAG2
readRegister(0x30); // AIC31XX_INT1CTRL
readRegister(0x31); // AIC31XX_INT2CTRL
readRegister(0x33); // AIC31XX_GPIO1
readRegister(0x3C); // AIC31XX_DACPRB
readRegister(0x3D); // AIC31XX_ADCPRB
readRegister(0x3F); // AIC31XX_DACSETUP
readRegister(0x40); // AIC31XX_DACMUTE
readRegister(0x41); // AIC31XX_LDACVOL
readRegister(0x42); // AIC31XX_RDACVOL
readRegister(0x43); // AIC31XX_HSDETECT
readRegister(0x51); // AIC31XX_ADCSETUP
readRegister(0x52); // AIC31XX_ADCFGA
readRegister(0x53); // AIC31XX_ADCVOL
setPage(1);
readRegister(0x1F); // AIC31XX_HPDRIVER
readRegister(0x20); // AIC31XX_SPKAMP
readRegister(0x21); // AIC31XX_HPPOP
readRegister(0x22); // AIC31XX_SPPGARAMP
readRegister(0x23); // AIC31XX_DACMIXERROUTE
readRegister(0x24); // AIC31XX_LANALOGHPL
readRegister(0x25); // AIC31XX_RANALOGHPR
readRegister(0x26); // AIC31XX_LANALOGSPL
readRegister(0x27); // AIC31XX_RANALOGSPR
readRegister(0x28); // AIC31XX_HPLGAIN
readRegister(0x29); // AIC31XX_HPRGAIN
readRegister(0x2A); // AIC31XX_SPLGAIN
readRegister(0x2B); // AIC31XX_SPRGAIN
readRegister(0x2C); // AIC31XX_HPCONTROL
readRegister(0x2E); // AIC31XX_MICBIAS
readRegister(0x2F); // AIC31XX_MICPGA
readRegister(0x30); // AIC31XX_MICPGAPI
readRegister(0x31); // AIC31XX_MICPGAMI
readRegister(0x32); // AIC31XX_MICPGACM
setPage(3);
readRegister(0x10); // AIC31XX_TIMERDIVIDER
}
static int volscale;
@ -776,7 +709,6 @@ const struct audio_i2s_config config =
{
.data_pin = PICO_AUDIO_I2S_DATA_PIN,
.clock_pin_base = PICO_AUDIO_I2S_CLOCK_PIN_BASE,
.clock_pin_swapped = true,
.pio_sm = 0,
.dma_channel = 3
};