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dts: riscv: nordic: nrf54h20: introduce cpuflpr

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Add a new base devicetree file for the FLPR core.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2024-06-27 16:46:52 +02:00 committed by Carles Cufí
parent c2ddba98a0
commit 009f3e3669
1 changed files with 48 additions and 0 deletions
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dts/riscv/nordic/nrf54h20_cpuflpr.dtsi Normal file
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <nordic/nrf54h20.dtsi>
cpu: &cpuflpr {};
clic: &cpuflpr_clic {};
cpuppr_vevif: &cpusys_vevif_tx {};
cpuflpr_vevif: &cpuflpr_vevif_rx {};
cpusys_vevif: &cpusys_vevif_tx {};
/delete-node/ &cpuapp;
/delete-node/ &cpuapp_peripherals;
/delete-node/ &cpuapp_ppb;
/delete-node/ &cpuapp_ram0;
/delete-node/ &cpurad;
/delete-node/ &cpurad_peripherals;
/delete-node/ &cpurad_ppb;
/delete-node/ &cpurad_ram0;
/delete-node/ &cpuppr;
/ {
soc {
compatible = "simple-bus";
interrupt-parent = <&cpuflpr_clic>;
ranges;
};
};
&cpuflpr_private {
compatible = "simple-bus";
ranges;
};
&cpuflpr_clic {
status = "okay";
};
&cpuapp_bellboard {
compatible = "nordic,nrf-bellboard-tx";
};
&grtc {
interrupts = <108 NRF_DEFAULT_IRQ_PRIORITY>;
};