boards: st: nucleo_h7s3l78 nucleo144 board
Add the nucleo_h7s3l8 board from STMicroelectronics This Nucleo 144 board has stm32h7s3L8 mcu. Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu
Benjamin Cabé
parent
72694a9d09
commit
00e9195f45
11 changed files with 619 additions and 0 deletions
16
boards/st/nucleo_h7s3l8/Kconfig.defconfig
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16
boards/st/nucleo_h7s3l8/Kconfig.defconfig
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# STM32H7S3L8 NUCLEO board configuration
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#
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# Copyright (c) 2024 STMicroelectronics
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#
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_NUCLEO_H7S3L8
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if NETWORKING
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config NET_L2_ETHERNET
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default y
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endif # NETWORKING
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endif # BOARD_NUCLEO_H7S3L8
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5
boards/st/nucleo_h7s3l8/Kconfig.nucleo_h7s3l8
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boards/st/nucleo_h7s3l8/Kconfig.nucleo_h7s3l8
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# Copyright (c) 2024 STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NUCLEO_H7S3L8
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select SOC_STM32H7S3XX
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39
boards/st/nucleo_h7s3l8/arduino_r3_connector.dtsi
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boards/st/nucleo_h7s3l8/arduino_r3_connector.dtsi
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/*
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* Copyright (c) 2024 STMicroelectronics
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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arduino_header: connector {
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compatible = "arduino-header-r3";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpioa 3 0>, /* A0 */
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<1 0 &gpioc 0 0>, /* A1 */
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<2 0 &gpioc 3 0>, /* A2 */
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<3 0 &gpioc 4 0>, /* A3 */
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<4 0 &gpioc 5 0>, /* A4 */
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<5 0 &gpiof 11 0>, /* A5 */
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<6 0 &gpioa 10 0>, /* D0 */
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<7 0 &gpiob 14 0>, /* D1 */
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<8 0 &gpiof 15 0>, /* D2 */
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<9 0 &gpioe 13 0>, /* D3 */
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<10 0 &gpiof 3 0>, /* D4 */
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<11 0 &gpioe 11 0>, /* D5 */
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<12 0 &gpioe 9 0>, /* D6 */
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<13 0 &gpiof 4 0>, /* D7 */
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<14 0 &gpiof 5 0>, /* D8 */
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<15 0 &gpiod 15 0>, /* D9 */
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<16 0 &gpiod 14 0>, /* D10 */
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<17 0 &gpiob 5 0>, /* D11 */
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<18 0 &gpioa 6 0>, /* D12 */
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<19 0 &gpioa 5 0>, /* D13 */
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<20 0 &gpiob 9 0>, /* D14 */
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<21 0 &gpiob 8 0>; /* D15 */
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};
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};
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arduino_i2c: &i2c1 {};
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arduino_spi: &spi1 {};
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arduino_serial: &usart1 {};
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10
boards/st/nucleo_h7s3l8/board.cmake
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boards/st/nucleo_h7s3l8/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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# keep first
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
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# keep first
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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6
boards/st/nucleo_h7s3l8/board.yml
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boards/st/nucleo_h7s3l8/board.yml
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board:
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name: nucleo_h7s3l8
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full_name: Nucleo H7S3L8
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vendor: st
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socs:
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- name: stm32h7s3xx
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BIN
boards/st/nucleo_h7s3l8/doc/img/nucleo_h7s3l8.webp
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BIN
boards/st/nucleo_h7s3l8/doc/img/nucleo_h7s3l8.webp
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Binary file not shown.
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After Width: | Height: | Size: 33 KiB |
324
boards/st/nucleo_h7s3l8/doc/index.rst
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boards/st/nucleo_h7s3l8/doc/index.rst
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.. _nucleo_h7s3l8_board:
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ST Nucleo H7S3L8
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################
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Overview
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********
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The STM32 Nucleo-144 board provides an affordable and flexible way for users
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to try out new concepts and build prototypes by choosing from the various combinations
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of performance and power consumption features, provided by the STM32 microcontroller.
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The ST Zio connector, which extends the ARDUINO® Uno V3 connectivity, and
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the ST morpho headers provide an easy means of expanding the functionality of the Nucleo
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open development platform with a wide choice of specialized shields.
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The STM32 Nucleo-144 board does not require any separate probe as it integrates
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the ST-LINK V3 debugger/programmer.
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The STM32 Nucleo-144 board comes with the STM32 comprehensive free software
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libraries and examples available with the STM32Cube MCU Package.
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Key Features
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- STM32 microcontroller with 64Kbytes of flash and 620Kbytes of RAM in TFBGA225 package
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- Ethernet compliant with IEEE-802.3-2002
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- USB USB Device only, USB OTG full speed, or SNK/UFP (full-speed or high-speed mode)
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- 3 user LEDs
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- 2 user and reset push-buttons
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- 32.768 kHz crystal oscillator
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- Board connectors:
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- USB with Micro-AB or USB Type-C®
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- Ethernet RJ45
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- MIPI20 compatible connector with trace signals
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- Flexible power-supply options: ST-LINK USB VBUS or external sources
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- External or internal SMPS to generate Vcore logic supply
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- On-board ST-LINK/V3 debugger/programmer with USB re-enumeration
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- capability: mass storage, virtual COM port and debug port
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.. image:: img/nucleo_h7s3l8.webp
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:align: center
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:alt: Nucleo H7S3L8
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More information about the board can be found at the `Nucleo H7S3L8 website`_.
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Hardware
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********
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Nucleo H7S3L8 provides the following hardware components:
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The STM32H7S7xx devices are a high-performance microcontrollers family (STM32H7
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Series) based on the high-performance Arm |reg| Cortex |reg|-M7 32-bit RISC core.
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They operate at a frequency of up to 500 MHz.
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- Core: ARM |reg| 32-bit Cortex |reg| -M7 CPU with TrustZone |reg| and FPU.
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- Performance benchmark:
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- 1284 DMPIS/MHz (Dhrystone 2.1)
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- Security
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- Arm |reg| TrustZone |reg| with ARMv8-M mainline security extension
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- Up to 8 configurable SAU regions
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- TrustZone |reg| aware and securable peripherals
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- Flexible lifecycle scheme with secure debug authentication
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- Preconfigured immutable root of trust (ST-iROT)
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- SFI (secure firmware installation)
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- Secure data storage with hardware unique key (HUK)
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- Secure firmware upgrade support with TF-M
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- 2x AES coprocessors including one with DPA resistance
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- Public key accelerator, DPA resistant
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- On-the-fly decryption of Octo-SPI external memories
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- HASH hardware accelerator
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- True random number generator, NIST SP800-90B compliant
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- 96-bit unique ID
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- Active tampers
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- True Random Number Generator (RNG) NIST SP800-90B compliant
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- Clock management:
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- 24 MHz crystal oscillator (HSE)
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- 32768 Hz crystal oscillator for RTC (LSE)
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- Internal 64 MHz (HSI) trimmable by software
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- Internal low-power 32 kHz RC (LSI)( |plusminus| 5%)
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- Internal 4 MHz oscillator (CSI), trimmable by software
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- Internal 48 MHz (HSI48) with recovery system
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- 3 PLLs for system clock, USB, audio, ADC
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- Power management
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- Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
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- RTC with HW calendar, alarms and calibration
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- Up to 152 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V
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- Up to 16 timers and 2 watchdogs
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- 16x 16-bit
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- 4x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
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- 5x 16-bit low-power 16-bit timers (available in Stop mode)
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- 2x watchdogs
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- 1x SysTick timer
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- Memories
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- Up to 64KB Flash, 2 banks read-while-write
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- 1 Kbyte OTP (one-time programmable)
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- 640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC
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- 4 Kbytes of backup SRAM available in the lowest power modes
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- Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
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- 2x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats
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- 1x HEXASPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats
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- 2x SD/SDIO/MMC interfaces
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- Rich analog peripherals (independent supply)
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- 2x 12-bit ADC with up to 5 MSPS in 12-bit
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- 1x Digital temperature sensor
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- 35x communication interfaces
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- 1x USB Type-C / USB power-delivery controller
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- 1x USB OTG full-speed with PHY
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- 1x USB OTG high-speed with PHY
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- 3x I2C FM+ interfaces (SMBus/PMBus)
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- 1x I3C interface
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- 7x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control)
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- 2x LP UART
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- 6x SPIs including 3 muxed with full-duplex I2S
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- 2x SAI
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- 2x FDCAN
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- 2x SD/SDIO/MMC interface
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- 2x 16 channel DMA controllers
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- 1x 8- to 16- bit camera interface
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- 1x HDMI-CEC
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- 1x Ethernel MAC interface with DMA controller
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- 1x 16-bit parallel slave synchronous-interface
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- 1x SPDIF-IN interface
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- 1x MDIO slave interface
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- CORDIC for trigonometric functions acceleration
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- FMAC (filter mathematical accelerator)
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- CRC calculation unit
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
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More information about STM32H7S3 can be found here:
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- `STM32H7S3L8 on www.st.com`_
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- `STM32H7Sx reference manual`_
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Supported Features
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==================
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The Zephyr ``nucleo_h7s3l8`` board target supports the following hardware
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features:
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+-------------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+=============+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-------------+------------+-------------------------------------+
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| UART | on-chip | serial port |
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+-------------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-------------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-------------+------------+-------------------------------------+
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| RTC | on-chip | counter |
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+-------------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-------------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-------------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-------------+------------+-------------------------------------+
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| RNG | on-chip | True Random number generator |
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+-------------+------------+-------------------------------------+
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| Backup SRAM | on-chip | Backup SRAM |
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+-------------+------------+-------------------------------------+
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| RTC | on-chip | rtc |
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+-------------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig files:
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:zephyr_file:`boards/st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig`
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For more details please refer to `STM32H7R/S Nucleo-144 board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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The Nucleo H7S3L8 board features a ST Zio connector (extended Arduino Uno V3)
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and a ST morpho connector. Board is configured as follows:
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- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
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- USER_PB : PC13
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- LD1 : PD10
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- LD2 : PD13
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- LD3 : PB7
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- I2C : PB8, PB9
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- SPI1 NSS/SCK/MISO/MOSI : PD14PA5/PA6/PB5 (Arduino SPI)
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System Clock
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------------
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Nucleo H7S3L8 System Clock could be driven by an internal or external
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oscillator, as well as the main PLL clock. By default, the System clock is
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driven by the PLL clock at 600MHz, driven by an 24MHz high-speed external clock.
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Serial Port
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-----------
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Nucleo H7S3L8 board has 4 UARTs and 3 USARTs plus one LowPower UART. The Zephyr console
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output is assigned to UART3. Default settings are 115200 8N1.
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Backup SRAM
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-----------
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In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
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do it by removing ``SB13`` jumper on the back side of the board.
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Programming and Debugging
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*************************
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Nucleo H7S3L8 board includes an ST-LINK/V3 embedded debug tool interface.
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.. note::
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Check if your ST-LINK V3 has newest FW version. It can be done with `STM32CubeProgrammer`_
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Flashing
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========
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The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
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so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
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Alternatively, OpenOCD or JLink can also be used to flash the board using
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the ``--runner`` (or ``-r``) option:
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.. code-block:: console
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$ west flash --runner openocd
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Flashing an application to Nucleo H7S3L8
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----------------------------------------
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First, connect the NUCLEO-H7S3L8 to your host computer using
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the USB port to prepare it for flashing. Then build and flash your application.
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Here is an example for the :zephyr:code-sample:`hello_world` application.
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Run a serial host program to connect with your NUCLEO-H7S3L8 board.
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.. code-block:: console
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$ minicom -b 115200 -D /dev/ttyACM0
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or use screen:
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.. code-block:: console
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$ screen /dev/ttyACM0 115200
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Build and flash the application:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: nucleo_h7s3l8
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:goals: build flash
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You should see the following message on the console:
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.. code-block:: console
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$ Hello World! nucleo_h7s3l8
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Blinky example can also be used:
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: nucleo_h7s3l8
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:goals: build flash
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: nucleo_h7s3l8
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:maybe-skip-config:
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:goals: debug
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.. _Nucleo H7S3L8 website:
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https://www.st.com/en/evaluation-tools/nucleo-h7s3l8.html
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.. _STM32H7R/S Nucleo-144 board User Manual:
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https://www.st.com/resource/en/user_manual/um3276-stm32h7rx7sx-nucleo144-board-mb1737-stmicroelectronics.pdf
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.. _STM32H7S3L8 on www.st.com:
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https://www.st.com/en/microcontrollers-microprocessors/stm32h7s3l8.html
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.. _STM32H7Sx reference manual:
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https://www.st.com/resource/en/reference_manual/rm0477-stm32h7rx7sx-armbased-32bit-mcus-stmicroelectronics.pdf
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.. _OpenOCD installing Debug Version:
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https://github.com/zephyrproject-rtos/openocd
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.. _OpenOCD installing with ST-LINK V3 support:
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https://mbd.kleier.net/integrating-st-link-v3.html
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.. _STM32CubeIDE:
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https://www.st.com/en/development-tools/stm32cubeide.html
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.. _STM32CubeProgrammer:
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https://www.st.com/en/development-tools/stm32cubeprog.html
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141
boards/st/nucleo_h7s3l8/nucleo_h7s3l8.dts
Normal file
141
boards/st/nucleo_h7s3l8/nucleo_h7s3l8.dts
Normal file
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@ -0,0 +1,141 @@
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/*
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* Copyright (c) 2024 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/h7rs/stm32h7s3X8.dtsi>
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#include <st/h7/stm32h7s3l8hx-pinctrl.dtsi>
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#include "arduino_r3_connector.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "STMicroelectronics STM32H7S3L8-NUCLEO board";
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compatible = "st,stm32h7s3l8-nucleo";
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chosen {
|
||||
zephyr,console = &usart3;
|
||||
zephyr,shell-uart = &usart3;
|
||||
zephyr,dtcm = &dtcm;
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,flash = &flash0;
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
green_led: led_1 {
|
||||
gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
|
||||
label = "User LD1";
|
||||
};
|
||||
yellow_led: led_2 {
|
||||
gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
|
||||
label = "User LD2";
|
||||
};
|
||||
red_led: led_3 {
|
||||
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
|
||||
label = "User LD3";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
user_button: button_0 {
|
||||
label = "User";
|
||||
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
|
||||
zephyr,code = <INPUT_KEY_0>;
|
||||
};
|
||||
};
|
||||
|
||||
aliases {
|
||||
led0 = &green_led;
|
||||
led1 = &yellow_led;
|
||||
led2 = &red_led;
|
||||
sw0 = &user_button;
|
||||
watchdog0 = &iwdg;
|
||||
};
|
||||
};
|
||||
|
||||
&clk_lsi {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&clk_hsi48 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&clk_hse {
|
||||
clock-frequency = <DT_FREQ_M(24)>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clk_lse {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pll {
|
||||
div-m = <12>;
|
||||
mul-n = <200>;
|
||||
div-p = <2>;
|
||||
div-q = <2>;
|
||||
div-r = <2>;
|
||||
div-s = <2>;
|
||||
div-t = <2>;
|
||||
clocks = <&clk_hse>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rcc {
|
||||
clocks = <&pll>;
|
||||
clock-frequency = <DT_FREQ_M(200)>;
|
||||
dcpre = <1>;
|
||||
hpre = <1>;
|
||||
ppre1 = <2>;
|
||||
ppre2 = <2>;
|
||||
ppre4 = <2>;
|
||||
ppre5 = <2>;
|
||||
};
|
||||
|
||||
&usart1 {
|
||||
pinctrl-0 = <&usart1_tx_pb14 &usart1_rx_pa10>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usart3 {
|
||||
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iwdg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wwdg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&adc1 {
|
||||
pinctrl-0 = <&adc1_inp15_pa3>; /* Arduino A0 */
|
||||
pinctrl-names = "default";
|
||||
st,adc-clock-source = "SYNC";
|
||||
st,adc-prescaler = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>;
|
||||
pinctrl-names = "default";
|
||||
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
clock-frequency = <I2C_BITRATE_FAST>;
|
||||
};
|
||||
15
boards/st/nucleo_h7s3l8/nucleo_h7s3l8.yaml
Normal file
15
boards/st/nucleo_h7s3l8/nucleo_h7s3l8.yaml
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
identifier: nucleo_h7s3l8
|
||||
name: ST Nucleo H7S3L8 nucleo
|
||||
type: mcu
|
||||
arch: arm
|
||||
toolchain:
|
||||
- zephyr
|
||||
ram: 640
|
||||
flash: 64
|
||||
supported:
|
||||
- gpio
|
||||
- uart
|
||||
- watchdog
|
||||
- entropy
|
||||
- adc
|
||||
vendor: st
|
||||
21
boards/st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig
Normal file
21
boards/st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig
Normal file
|
|
@ -0,0 +1,21 @@
|
|||
# Copyright (c) 2024 STMicroelectronics
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
# Disable SMPS
|
||||
CONFIG_POWER_SUPPLY_DIRECT_SMPS=n
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
||||
|
||||
# Enable HW stack protection
|
||||
CONFIG_HW_STACK_PROTECTION=y
|
||||
|
||||
# Enable UART driver
|
||||
CONFIG_SERIAL=y
|
||||
|
||||
# Enable console
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
|
||||
# Enable GPIO
|
||||
CONFIG_GPIO=y
|
||||
42
boards/st/nucleo_h7s3l8/support/openocd.cfg
Normal file
42
boards/st/nucleo_h7s3l8/support/openocd.cfg
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
|
||||
source [find interface/stlink-dap.cfg]
|
||||
transport select "dapdirect_swd"
|
||||
|
||||
set WORKAREASIZE 0x8000
|
||||
set CHIPNAME STM32H7S3XX
|
||||
set BOARDNAME NUCLEO-H7S3L8
|
||||
|
||||
# Enable debug when in low power modes
|
||||
set ENABLE_LOW_POWER 1
|
||||
|
||||
# Stop Watchdog counters when halt
|
||||
set STOP_WATCHDOG 1
|
||||
|
||||
# Reset configuration
|
||||
# use hardware reset, connect under reset
|
||||
# connect_assert_srst needed if low power mode application running (WFI...)
|
||||
# reset_config srst_only srst_nogate connect_assert_srst
|
||||
|
||||
#set CONNECT_UNDER_RESET 1
|
||||
#set CORE_RESET 0
|
||||
|
||||
source [find target/stm32h7rx.cfg]
|
||||
|
||||
|
||||
$_CHIPNAME.cpu0 configure -event gdb-attach {
|
||||
echo "Debugger attaching: halting execution"
|
||||
gdb_breakpoint_override hard
|
||||
}
|
||||
|
||||
$_CHIPNAME.cpu0 configure -event gdb-detach {
|
||||
echo "Debugger detaching: resuming execution"
|
||||
resume
|
||||
}
|
||||
|
||||
# Due to the use of connect_assert_srst, running gdb requires
|
||||
# to reset halt just after openocd init.
|
||||
rename init old_init
|
||||
proc init {} {
|
||||
old_init
|
||||
reset halt
|
||||
}
|
||||
Loading…
Reference in a new issue