samples: drivers: adc: example to use AD4114 on stm32f3_disco

This examples shows how to use the AD4114 ADC on a
stm32f3_disco board.
As the AD4114 is a 24bits ADC resolution we need to be able
to pass 32bits buffer to get the samples.
CONFIG_SEQUENCE_RESOLUTION is set to 12 instead of 24, and the
gain zephyr,vref-mv is adapted to avoid overflows using the
exisiting adc_raw_to_millivolts function.

Signed-off-by: Pierrick Curt <pierrickcurt@gmail.com>
This commit is contained in:
Pierrick Curt 2024-12-10 18:24:36 +01:00 committed by Benjamin Cabé
parent 8250cc68b7
commit 051a2b6cd0
5 changed files with 159 additions and 0 deletions

View file

@ -9,4 +9,8 @@ config SEQUENCE_RESOLUTION
int "Set the resolution of the sequence readings." int "Set the resolution of the sequence readings."
default 12 default 12
config SEQUENCE_32BITS_REGISTERS
bool "ADC data sequences are on 32bits"
default n
source "Kconfig.zephyr" source "Kconfig.zephyr"

View file

@ -0,0 +1,4 @@
# A4114 driver can only acquire one sequence sample
CONFIG_SEQUENCE_SAMPLES=1
CONFIG_SEQUENCE_RESOLUTION=12
CONFIG_SEQUENCE_32BITS_REGISTERS=y

View file

@ -0,0 +1,146 @@
/*
* Copyright (c) 2024 Pierrick Curt
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
adc0 = &adc_ad4114;
};
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
adc_ad4114: adc_ad4114@0 {
compatible = "adi,ad4114-adc";
spi-max-frequency = <DT_FREQ_M(1)>;
status = "okay";
reg = <0>;
#io-channel-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
/* INPUTx mapping bits [9:0] for CH0 to CH15 */
map-inputs = <0x10 0x30 0x50 0x70 0x90 0xB0 0xD0 0xF0 0x110 \
0x130 0x150 0x170 0x190 0x1B0 0x1D0 0x1F0>;
channel@0 {
reg = <0x0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@1 {
reg = <1>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@2 {
reg = <2>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@3 {
reg = <3>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@4 {
reg = <4>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@5 {
reg = <5>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@6 {
reg = <6>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@7 {
reg = <7>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@8 {
reg = <8>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@9 {
reg = <9>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@a {
reg = <0xa>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@b {
reg = <0xb>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@c {
reg = <0xc>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@d {
reg = <0xd>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@e {
reg = <0xe>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
channel@f {
reg = <0xf>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,vref-mv = <8>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
};
};

View file

@ -13,6 +13,7 @@ tests:
- nrf54h20dk/nrf54h20/cpuapp - nrf54h20dk/nrf54h20/cpuapp
- ucans32k1sic - ucans32k1sic
- frdm_mcxc242 - frdm_mcxc242
- stm32f3_disco
integration_platforms: integration_platforms:
- nrf52840dk/nrf52840 - nrf52840dk/nrf52840
harness: console harness: console

View file

@ -30,7 +30,11 @@ int main(void)
{ {
int err; int err;
uint32_t count = 0; uint32_t count = 0;
#ifdef CONFIG_SEQUENCE_32BITS_REGISTERS
uint32_t channel_reading[CONFIG_SEQUENCE_SAMPLES][CHANNEL_COUNT];
#else
uint16_t channel_reading[CONFIG_SEQUENCE_SAMPLES][CHANNEL_COUNT]; uint16_t channel_reading[CONFIG_SEQUENCE_SAMPLES][CHANNEL_COUNT];
#endif
/* Options for the sequence sampling. */ /* Options for the sequence sampling. */
const struct adc_sequence_options options = { const struct adc_sequence_options options = {