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dts: riscv32-fe310: add missing clint properties

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RISC-V clint is an interrupt controller but it has no required
properties (#interrupt-cells and interrupt-controller).
This patch just adds missing properties.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This commit is contained in:
Katsuhiro Suzuki 2020-10-22 10:49:12 +09:00 committed by Anas Nashif
parent a43db40da3
commit 0a6918d064
1 changed files with 2 additions and 0 deletions
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2
dts/riscv/riscv32-fe310.dtsi
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@ -45,7 +45,9 @@
reg-names = "control";
};
clint: clint@2000000 {
#interrupt-cells = <1>;
compatible = "riscv,clint0";
interrupt-controller;
interrupts-extended = <&hlic 3 &hlic 7>;
reg = <0x2000000 0x10000>;
reg-names = "control";