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dts/x86: use proper unit-address values

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This commit changes the way some x86 devicetree set the unit-address values
of memory nodes. Before the change, they were always set to `0`. After the
change, they are derived from the `DT_DRAM_BASE` macro to match the first
address specified by the reg property.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit is contained in:
Filip Kokosinski 2024-09-26 10:36:00 +02:00 committed by Anas Nashif
parent d37ae60751
commit 0edc89c63b
3 changed files with 6 additions and 5 deletions
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4
boards/qemu/x86/qemu_x86_lakemont.dts
View file

@ -31,9 +31,9 @@
zephyr,shell-uart = &uart0;
};
dram0: memory@0 {
dram0: memory@DT_DRAM_BASE {
device_type = "memory";
reg = <DT_DRAM_BASE DT_DRAM_SIZE>;
reg = <DT_ADDR(DT_DRAM_BASE) DT_DRAM_SIZE>;
};
soc {

3
boards/qemu/x86/qemu_x86_tiny.dts
View file

@ -4,6 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRAM_BASE 0x100000
/* Note: this is the unit-address (in hex) of the node */
#define DT_DRAM_BASE 100000
#define DT_DRAM_SIZE DT_SIZE_K(256)
#include "qemu_x86.dts"

4
dts/x86/intel/atom.dtsi
View file

@ -36,9 +36,9 @@
#address-cells = <1>;
};
dram0: memory@0 {
dram0: memory@DT_DRAM_BASE {
device_type = "memory";
reg = <DT_DRAM_BASE DT_DRAM_SIZE>;
reg = <DT_ADDR(DT_DRAM_BASE) DT_DRAM_SIZE>;
};
soc {