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dts: arm: st: add stm32c071 dtsi files

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- provide support for the STM32C071 serie
- add stm32g0-flash-controller compatible on flash node
to fix CI issue on undefined reference to
`flash_stm32_page_layout'

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
This commit is contained in:
Fabrice DJIATSA 2024-12-06 11:11:26 +01:00 committed by Benjamin Cabé
parent 12703bf633
commit 0ef33f3e77
4 changed files with 112 additions and 1 deletions
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2
dts/arm/st/c0/stm32c0.dtsi
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@ -82,7 +82,7 @@
soc {
flash: flash-controller@40022000 {
compatible = "st,stm32-flash-controller";
compatible = "st,stm32-flash-controller" , "st,stm32g0-flash-controller";
reg = <0x40022000 0x400>;
interrupts = <3 0>;
clocks = <&rcc STM32_CLOCK(AHB1, 8U)>;

67
dts/arm/st/c0/stm32c071.dtsi Normal file
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@ -0,0 +1,67 @@
/*
* Copyright (c) 2024 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/c0/stm32c031.dtsi>
/ {
soc {
compatible = "st,stm32c071", "st,stm32c0", "simple-bus";
timers2: timers@40000000 {
compatible = "st,stm32-timers";
reg = <0x40000000 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 0U)>;
resets = <&rctl STM32_RESET(APB1L, 0U)>;
interrupts = <15 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
#pwm-cells = <3>;
};
counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};
i2c2: i2c@40005800 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 22U)>;
interrupts = <24 0>;
interrupt-names = "global";
status = "disabled";
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 14U)>;
interrupts = <26 0>;
interrupt-names = "global";
status = "disabled";
};
dma1: dma@40020000 {
interrupts = <9 0 10 0 10 0 11 0 11 0>;
dma-requests = <5>;
};
dmamux1: dmamux@40020800 {
dma-channels = <5>;
};
};
};

22
dts/arm/st/c0/stm32c071X8.dtsi Normal file
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@ -0,0 +1,22 @@
/*
* Copyright (c) 2024 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <st/c0/stm32c071.dtsi>
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(24)>;
};
soc {
flash-controller@40022000 {
flash0: flash@8000000 {
reg = <0x08000000 DT_SIZE_K(64)>;
};
};
};
};

22
dts/arm/st/c0/stm32c071Xb.dtsi Normal file
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@ -0,0 +1,22 @@
/*
* Copyright (c) 2024 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <st/c0/stm32c071.dtsi>
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(24)>;
};
soc {
flash-controller@40022000 {
flash0: flash@8000000 {
reg = <0x08000000 DT_SIZE_K(128)>;
};
};
};
};