boards: nxp/frdm_mcxn236: Support lpadc for NXP frdm_mcxn236

Support lpadc for NXP frdm_mcxn236

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>

boards/nxp/frdm_mcxn236/board.c

@@ -175,6 +175,11 @@ static int frdm_mcxn236_init(void)
 	SPC_EnableActiveModeAnalogModules(SPC0, kSPC_controlVref);
 #endif
 
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc0))
+	CLOCK_SetClkDiv(kCLOCK_DivAdc0Clk, 1U);
+	CLOCK_AttachClk(kFRO_HF_to_ADC0);
+#endif
+
 	/* Set SystemCoreClock variable. */
 	SystemCoreClock = CLOCK_INIT_CORE_CLOCK;
 

boards/nxp/frdm_mcxn236/doc/index.rst

@@ -70,6 +70,8 @@ The FRDM-MCXN236 board configuration supports the following hardware features:
 +-----------+------------+-------------------------------------+
 | VREF      | on-chip    | regulator                           |
 +-----------+------------+-------------------------------------+
+| ADC       | on-chip    | adc                                 |
++-----------+------------+-------------------------------------+
 
 Targets available
 ==================

boards/nxp/frdm_mcxn236/frdm_mcxn236-pinctrl.dtsi

@@ -90,4 +90,14 @@
 		};
 	};
 
+
+	pinmux_lpadc0: pinmux_lpadc0 {
+		group0 {
+			pinmux = <ADC0_A2_PIO4_23>,
+				<ADC0_A1_PIO4_15>,
+				<ADC0_B1_PIO4_19>;
+			slew-rate = "fast";
+			drive-strength = "low";
+		};
+	};
 };

boards/nxp/frdm_mcxn236/frdm_mcxn236.dts

@@ -117,3 +117,7 @@
 &vref {
 	status = "okay";
 };
+
+&lpadc0 {
+	status = "okay";
+};

boards/nxp/frdm_mcxn236/frdm_mcxn236.dtsi

@@ -118,3 +118,8 @@
 	pinctrl-0 = <&pinmux_flexpwm1_pwm0>;
 	pinctrl-names = "default";
 };
+
+&lpadc0 {
+	pinctrl-0 = <&pinmux_lpadc0>;
+	pinctrl-names = "default";
+};

boards/nxp/frdm_mcxn236/frdm_mcxn236.yaml

@@ -23,4 +23,5 @@ supported:
   - pwm
   - counter
   - regulator
+  - adc
 vendor: nxp