dts: arm: adi: Add Timer instance to MAX32655

Add timer instance in device tree
Add timer yaml file

Timer0/1/2/3 are common for MAX32xxx MCUs
MAX32655 has additional Timer4/5 which are low power timers

Co-authored-by: Mert Vatansever <mert.vatansever@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>

dts/arm/adi/max32/max32655.dtsi

@@ -95,5 +95,25 @@
 			interrupts = <16 0>;
 			status = "disabled";
 		};
+
+		lptimer0: timer@40080c00 {
+			compatible = "adi,max32-timer";
+			reg = <0x40080c00 0x400>;
+			interrupts = <9 0>;
+			status = "disabled";
+			clocks = <&gcr ADI_MAX32_CLOCK_BUS2 2>;
+			clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
+			prescaler = <1>;
+		};
+
+		lptimer1: timer@40081000 {
+			compatible = "adi,max32-timer";
+			reg = <0x40081000 0x400>;
+			interrupts = <10 0>;
+			status = "disabled";
+			clocks = <&gcr ADI_MAX32_CLOCK_BUS2 3>;
+			clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
+			prescaler = <1>;
+		};
 	};
 };

dts/arm/adi/max32/max32xxx.dtsi

@@ -218,6 +218,46 @@
 			vref-mv = <1220>;
 			status = "disabled";
 		};
+
+		timer0: timer@40010000 {
+			compatible = "adi,max32-timer";
+			reg = <0x40010000 0x1000>;
+			interrupts = <5 0>;
+			status = "disabled";
+			clocks = <&gcr ADI_MAX32_CLOCK_BUS0 15>;
+			clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
+			prescaler = <1>;
+		};
+
+		timer1: timer@40011000 {
+			compatible = "adi,max32-timer";
+			reg = <0x40011000 0x1000>;
+			interrupts = <6 0>;
+			status = "disabled";
+			clocks = <&gcr ADI_MAX32_CLOCK_BUS0 16>;
+			clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
+			prescaler = <1>;
+		};
+
+		timer2: timer@40012000 {
+			compatible = "adi,max32-timer";
+			reg = <0x40012000 0x1000>;
+			interrupts = <7 0>;
+			status = "disabled";
+			clocks = <&gcr ADI_MAX32_CLOCK_BUS0 17>;
+			clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
+			prescaler = <1>;
+		};
+
+		timer3: timer@40013000 {
+			compatible = "adi,max32-timer";
+			reg = <0x40013000 0x1000>;
+			interrupts = <8 0>;
+			status = "disabled";
+			clocks = <&gcr ADI_MAX32_CLOCK_BUS0 18>;
+			clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
+			prescaler = <1>;
+		};
 	};
 };
 

dts/bindings/timer/adi,max32-timer.yaml

@@ -0,0 +1,53 @@
+# Copyright (c) 2023-2024 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+description: ADI MAX32 timer
+
+compatible: "adi,max32-timer"
+
+include: [base.yaml, reset-device.yaml]
+
+properties:
+  reg:
+    required: true
+
+  clocks:
+    required: true
+
+  clock-source:
+    type: int
+    enum: [0, 1, 2, 3, 4, 5, 6, 7]
+    description: |
+      Clock source to be used by the WDT peripheral. The following options
+      are available:
+      - 0: "ADI_MAX32_PRPH_CLK_SRC_PCLK" Peripheral clock
+      - 1: "ADI_MAX32_PRPH_CLK_SRC_EXTCLK" External Clock
+      - 2: "ADI_MAX32_PRPH_CLK_SRC_IBRO" Internal Baud Rate Oscillator
+      - 3: "ADI_MAX32_PRPH_CLK_SRC_ERFO" External Radio Frequency Oscillator
+      - 4: "ADI_MAX32_PRPH_CLK_SRC_ERTCO" External Real-Time Clock Oscillator
+      - 5: "ADI_MAX32_PRPH_CLK_SRC_INRO" Internal Ring Oscillator
+      - 6: "ADI_MAX32_PRPH_CLK_SRC_ISO" Internal Secondary Oscillator
+      - 7: "ADI_MAX32_PRPH_CLK_SRC_IBRO_DIV8" IBRO/8
+      The target device might not support every option please take a look on
+      target device user guide
+
+  prescaler:
+    type: int
+    required: true
+    enum:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 1024
+      - 2048
+      - 4096
+    description: |
+      The prescaler that divides the timers source clock to set the timers count clock as follows:
+      F_cnt_clk = F_clock_source / prescaler