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tests: devicetree: api: test DT_IRQ_LEVEL and DT_INST_IRQ_LEVEL

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Added new test for `DT_IRQ_LEVEL` and `DT_INST_IRQ_LEVEL`.

Introduced a new `vnd.cpu-intc` compatible so that we have a
root level interrupt controller that acts as level 1
aggregator, and modified `test_intc` to be level 2 aggregator,
updated test of `DT_IRQN(TEST_I2C_BUS)` accordingly.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
This commit is contained in:
Yong Cong Sin 2023-12-22 16:27:09 +08:00 committed by Chris Friedt
parent 0b43699366
commit 170c659292
3 changed files with 48 additions and 1 deletions
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15
dts/bindings/test/vnd,cpu-intc.yaml Normal file
View file

@ -0,0 +1,15 @@
# Copyright (c) 2023 Meta
# SPDX-License-Identifier: Apache-2.0
description: Test CPU Interrupt Controller
compatible: "vnd,cpu-intc"
include: [interrupt-controller.yaml, base.yaml]
properties:
"#interrupt-cells":
const: 1
interrupt-cells:
- irq

8
tests/lib/devicetree/api/app.overlay
View file

@ -29,6 +29,13 @@
#size-cells = < 0x1 >;
interrupt-parent = <&test_intc>;
test_cpu_intc: interrupt-controller {
compatible = "vnd,cpu-intc";
#address-cells = <0>;
#interrupt-cells = < 0x01 >;
interrupt-controller;
};
test_pinctrl: pin-controller {
compatible = "vnd,pinctrl";
test_pincfg_a: pincfg-a {};
@ -430,6 +437,7 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <11 0>;
interrupt-parent = <&test_cpu_intc>;
};
/* there should only be one of these */

26
tests/lib/devicetree/api/src/main.c
View file

@ -20,6 +20,7 @@
#define TEST_INST DT_INST(0, vnd_gpio_device)
#define TEST_ARRAYS DT_NODELABEL(test_arrays)
#define TEST_PH DT_NODELABEL(test_phandles)
#define TEST_INTC DT_NODELABEL(test_intc)
#define TEST_IRQ DT_NODELABEL(test_irq)
#define TEST_IRQ_EXT DT_NODELABEL(test_irq_extended)
#define TEST_TEMP DT_NODELABEL(test_temp_sensor)
@ -657,10 +658,12 @@ ZTEST(devicetree_api, test_irq)
zassert_equal(DT_IRQ(TEST_I2C_BUS, priority), 2, "");
/* DT_IRQN */
zassert_equal(DT_IRQN(TEST_I2C_BUS), 6, "");
#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
zassert_equal(DT_IRQN(TEST_I2C_BUS), 6, "");
zassert_equal(DT_IRQN(DT_INST(0, DT_DRV_COMPAT)), 30, "");
#else
zassert_equal(DT_IRQN(TEST_I2C_BUS),
((6 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
zassert_equal(DT_IRQN(DT_INST(0, DT_DRV_COMPAT)),
((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
#endif
@ -749,6 +752,27 @@ ZTEST(devicetree_api, test_irq)
zassert_false(DT_INST_IRQ_HAS_NAME(0, alpha), "");
}
ZTEST(devicetree_api, test_irq_level)
{
/* DT_IRQ_LEVEL */
zassert_equal(DT_IRQ_LEVEL(TEST_TEMP), 0, "");
zassert_equal(DT_IRQ_LEVEL(TEST_INTC), 1, "");
zassert_equal(DT_IRQ_LEVEL(TEST_SPI), 2, "");
/* DT_IRQ_LEVEL */
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT vnd_adc_temp_sensor
zassert_equal(DT_INST_IRQ_LEVEL(0), 0, "");
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT vnd_intc
zassert_equal(DT_INST_IRQ_LEVEL(1), 1, "");
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT vnd_spi
zassert_equal(DT_INST_IRQ_LEVEL(0), 2, "");
}
struct gpios_struct {
gpio_pin_t pin;
gpio_flags_t flags;