arch: arm: cortex_m: pm_s2ram: wrap context save/restore in macros
Wrap the CPU register save/restore operations (GPR and special registers) in macros to make core logic simpler to follow. This is also a preparatory step to introduce ARMv6-M and ARMv7-M support. Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
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1 changed files with 62 additions and 34 deletions
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@ -38,6 +38,63 @@
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ldr tmp_reg, [cpu_ctx_reg, # CPU_CTX_SR_OFFSET(sr_name)]; \
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msr sr_name, tmp_reg;
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/*
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* The following macros could be written as assembler macros, but C is used
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* for portability (assembler macro syntax may differ between toolchains).
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*/
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/*
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* Pushes registers r4~r12 and lr on the stack.
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* r0 is unmodified but other GPRs may be overwritten.
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*/
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#define PUSH_GPRS \
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push {r4-r12, lr}
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/*
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* Pops registers r4~r12 and lr from the stack
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* r0 is unmodified but other GPRs may be overwritten.
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*/
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#define POP_GPRS \
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pop {r4-r12, lr}
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/*
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* Saves the CPU's special registers in the `struct __cpu_context`
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* pointed to by the `cpu_ctx` register.
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* The `tmp_reg` register is overwritten as part of this process.
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*/
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#define SAVE_SPECIAL_REGISTERS(cpu_ctx, tmp_reg) \
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SAVE_SPECIAL_REG(msp, cpu_ctx, tmp_reg) \
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SAVE_SPECIAL_REG(msplim, cpu_ctx, tmp_reg) \
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SAVE_SPECIAL_REG(psp, cpu_ctx, tmp_reg) \
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SAVE_SPECIAL_REG(psplim, cpu_ctx, tmp_reg) \
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SAVE_SPECIAL_REG(primask, cpu_ctx, tmp_reg) \
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SAVE_SPECIAL_REG(faultmask, cpu_ctx, tmp_reg) \
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SAVE_SPECIAL_REG(basepri, cpu_ctx, tmp_reg) \
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SAVE_SPECIAL_REG(control, cpu_ctx, tmp_reg)
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/*
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* Restores the CPU's special registers from the `struct __cpu_context`
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* pointed to by the `cpu_ctx` register.
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* The `tmp_reg` register is overwritten as part of this process.
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*
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* N.B.: ISB at the end is required because "Software must use an ISB
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* barrier instruction to ensure a write to the CONTROL register takes
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* effect before the next instruction is executed."
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*
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* If this macro is modified, make sure CONTROL is always the last
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* restored register, and that an ISB follows the MSR instruction.
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*/
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#define RESTORE_SPECIAL_REGISTERS(cpu_ctx, tmp_reg) \
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RESTORE_SPECIAL_REG(msp, cpu_ctx, tmp_reg) \
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RESTORE_SPECIAL_REG(msplim, cpu_ctx, tmp_reg) \
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RESTORE_SPECIAL_REG(psp, cpu_ctx, tmp_reg) \
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RESTORE_SPECIAL_REG(psplim, cpu_ctx, tmp_reg) \
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RESTORE_SPECIAL_REG(primask, cpu_ctx, tmp_reg) \
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RESTORE_SPECIAL_REG(faultmask, cpu_ctx, tmp_reg) \
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RESTORE_SPECIAL_REG(basepri, cpu_ctx, tmp_reg) \
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RESTORE_SPECIAL_REG(control, cpu_ctx, tmp_reg) \
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isb
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_ASM_FILE_PROLOGUE
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GTEXT(pm_s2ram_mark_set)
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@ -50,7 +107,7 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
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*
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* r0: address of the system_off function
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*/
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push {r4-r12, lr}
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PUSH_GPRS
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/* Move system_off to protected register. */
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mov r4, r0
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@ -58,21 +115,7 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
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/* Store CPU context */
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ldr r1, =_cpu_context
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SAVE_SPECIAL_REG(msp, r1, r2)
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SAVE_SPECIAL_REG(msplim, r1, r2)
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SAVE_SPECIAL_REG(psp, r1, r2)
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SAVE_SPECIAL_REG(psplim, r1, r2)
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SAVE_SPECIAL_REG(primask, r1, r2)
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SAVE_SPECIAL_REG(faultmask, r1, r2)
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SAVE_SPECIAL_REG(basepri, r1, r2)
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SAVE_SPECIAL_REG(control, r1, r2)
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SAVE_SPECIAL_REGISTERS(/* ctx: */ r1, /* tmp: */ r2)
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/*
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* Mark entering suspend to RAM.
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@ -102,7 +145,7 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
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/* Move system_off back to r0 as return value */
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mov r0, r4
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pop {r4-r12, lr}
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POP_GPRS
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bx lr
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@ -124,24 +167,9 @@ resume:
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*/
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ldr r0, =_cpu_context
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RESTORE_SPECIAL_REG(msp, r0, r1)
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RESTORE_SPECIAL_REGISTERS(/* ctx: */ r0, /* tmp: */ r1)
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RESTORE_SPECIAL_REG(msplim, r0, r1)
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RESTORE_SPECIAL_REG(psp, r0, r1)
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RESTORE_SPECIAL_REG(psplim, r0, r1)
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RESTORE_SPECIAL_REG(primask, r0, r1)
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RESTORE_SPECIAL_REG(faultmask, r0, r1)
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RESTORE_SPECIAL_REG(basepri, r0, r1)
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RESTORE_SPECIAL_REG(control, r0, r1)
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isb
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pop {r4-r12, lr}
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POP_GPRS
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/*
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* Set the return value and return
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