drivers: mipi_dsi: dsi_mcux_2l: enable DCS_LONG_WRITE using interrupts
Fixup support for DCS_LONG_WRITE command in DSI MCUX 2L driver. Since long DCS commands may benefit from nonblocking I/O, add support for non blocking transfers to the DSI driver. This commit also corrects the interrupt number for the RT595, which uses the DSI_MCUX_2L IP block. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse
Carles Cufí
parent
867acef070
commit
21469a30d2
2 changed files with 68 additions and 5 deletions
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@ -8,6 +8,7 @@
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#define DT_DRV_COMPAT nxp_mipi_dsi_2l
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/mipi_dsi.h>
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#include <fsl_mipi_dsi.h>
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@ -29,14 +30,31 @@ struct mcux_mipi_dsi_config {
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const struct device *pixel_clk_dev;
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clock_control_subsys_t pixel_clk_subsys;
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uint32_t dphy_ref_freq;
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void (*irq_config_func)(const struct device *dev);
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};
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struct mcux_mipi_dsi_data {
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dsi_handle_t mipi_handle;
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struct k_sem transfer_sem;
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};
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/* Callback for DSI transfer completion, called in ISR context */
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static void dsi_transfer_complete(MIPI_DSI_HOST_Type *base,
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dsi_handle_t *handle, status_t status, void *userData)
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{
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struct mcux_mipi_dsi_data *data = userData;
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k_sem_give(&data->transfer_sem);
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}
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static int dsi_mcux_attach(const struct device *dev,
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uint8_t channel,
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const struct mipi_dsi_device *mdev)
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{
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const struct mcux_mipi_dsi_config *config = dev->config;
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struct mcux_mipi_dsi_data *data = dev->data;
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dsi_dphy_config_t dphy_config;
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status_t status;
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dsi_config_t dsi_config;
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uint32_t dphy_bit_clk_freq;
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uint32_t dphy_esc_clk_freq;
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@ -50,6 +68,14 @@ static int dsi_mcux_attach(const struct device *dev,
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/* Init the DSI module. */
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DSI_Init(config->base, &dsi_config);
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/* Create transfer handle */
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status = DSI_TransferCreateHandle(config->base, &data->mipi_handle,
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dsi_transfer_complete, data);
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if (status != kStatus_Success) {
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return -ENODEV;
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}
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/* Get the DPHY bit clock frequency */
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if (clock_control_get_rate(config->bit_clk_dev,
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config->bit_clk_subsys,
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@ -126,6 +152,7 @@ static ssize_t dsi_mcux_transfer(const struct device *dev, uint8_t channel,
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struct mipi_dsi_msg *msg)
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{
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const struct mcux_mipi_dsi_config *config = dev->config;
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struct mcux_mipi_dsi_data *data = dev->data;
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dsi_transfer_t dsi_xfer = {0};
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status_t status;
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@ -145,12 +172,16 @@ static ssize_t dsi_mcux_transfer(const struct device *dev, uint8_t channel,
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dsi_xfer.txDataType = kDSI_TxDataDcsShortWrNoParam;
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break;
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case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
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__fallthrough;
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case MIPI_DSI_DCS_LONG_WRITE:
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dsi_xfer.sendDscCmd = true;
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dsi_xfer.dscCmd = msg->cmd;
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dsi_xfer.txDataType = kDSI_TxDataDcsShortWrOneParam;
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break;
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case MIPI_DSI_DCS_LONG_WRITE:
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dsi_xfer.sendDscCmd = true;
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dsi_xfer.dscCmd = msg->cmd;
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dsi_xfer.flags = kDSI_TransferUseHighSpeed;
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dsi_xfer.txDataType = kDSI_TxDataDcsLongWr;
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break;
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case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
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dsi_xfer.txDataType = kDSI_TxDataGenShortWrNoParam;
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break;
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@ -172,7 +203,15 @@ static ssize_t dsi_mcux_transfer(const struct device *dev, uint8_t channel,
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return -ENOTSUP;
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}
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status = DSI_TransferBlocking(config->base, &dsi_xfer);
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if (msg->type == MIPI_DSI_DCS_LONG_WRITE) {
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/* Use a non-blocking transfer */
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status = DSI_TransferNonBlocking(config->base,
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&data->mipi_handle, &dsi_xfer);
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/* Wait for transfer completion */
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k_sem_take(&data->transfer_sem, K_FOREVER);
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} else {
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status = DSI_TransferBlocking(config->base, &dsi_xfer);
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}
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if (status != kStatus_Success) {
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LOG_ERR("Transmission failed");
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@ -194,9 +233,24 @@ static struct mipi_dsi_driver_api dsi_mcux_api = {
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.transfer = dsi_mcux_transfer,
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};
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static int mipi_dsi_isr(const struct device *dev)
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{
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const struct mcux_mipi_dsi_config *config = dev->config;
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struct mcux_mipi_dsi_data *data = dev->data;
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DSI_TransferHandleIRQ(config->base, &data->mipi_handle);
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return 0;
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}
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static int mcux_mipi_dsi_init(const struct device *dev)
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{
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const struct mcux_mipi_dsi_config *config = dev->config;
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struct mcux_mipi_dsi_data *data = dev->data;
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/* Enable IRQ */
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config->irq_config_func(dev);
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k_sem_init(&data->transfer_sem, 0, 1);
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imxrt_pre_init_display_interface();
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@ -238,9 +292,16 @@ static int mcux_mipi_dsi_init(const struct device *dev)
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},))
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#define MCUX_MIPI_DSI_DEVICE(id) \
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static void mipi_dsi_##n##_irq_config_func(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(id), DT_INST_IRQ(id, priority), \
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mipi_dsi_isr, DEVICE_DT_INST_GET(id), 0); \
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irq_enable(DT_INST_IRQN(id)); \
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} \
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static const struct mcux_mipi_dsi_config mipi_dsi_config_##id = { \
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MCUX_DSI_DPI_CONFIG(id) \
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.base = (MIPI_DSI_HOST_Type *)DT_INST_REG_ADDR(id), \
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.irq_config_func = mipi_dsi_##n##_irq_config_func, \
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.auto_insert_eotp = DT_INST_PROP(id, autoinsert_eotp), \
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.dphy_ref_freq = DT_INST_PROP_OR(id, dphy_ref_frequency, 0), \
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.bit_clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR_BY_NAME(id, dphy)), \
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@ -253,10 +314,12 @@ static int mcux_mipi_dsi_init(const struct device *dev)
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.pixel_clk_subsys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL_BY_NAME(id, pixel, name), \
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}; \
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\
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static struct mcux_mipi_dsi_data mipi_dsi_data_##id; \
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DEVICE_DT_INST_DEFINE(id, \
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&mcux_mipi_dsi_init, \
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NULL, \
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NULL, \
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&mipi_dsi_data_##id, \
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&mipi_dsi_config_##id, \
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POST_KERNEL, \
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CONFIG_MIPI_DSI_INIT_PRIORITY, \
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@ -497,7 +497,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x31000 0x1000>;
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interrupts = <87 0>;
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interrupts = <71 0>;
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clocks = <&clkctl1 MCUX_MIPI_DSI_DPHY_CLK>,
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<&clkctl1 MCUX_MIPI_DSI_ESC_CLK>,
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<&clkctl1 MCUX_LCDIF_PIXEL_CLK>;
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