arch: arm: cortex_m: pm_s2ram: save system_off before s2ram marking
The r0 register holds the system_off function pointer. As r0 is a scratch register, the pointer needs to moved to a preserved register before branching to a (custom) marker function. Furthermore, in accordance to rule 6.2.1.2 of aapcs32, the stack pointer needs to align on 8 bytes. Hence r0 is pushed to the stack in addition to the lr register, before calling the public interface of checking the s2ram marker. Signed-off-by: Hessel van der Molen <hvandermolen@dexels.com>
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1 changed files with 14 additions and 5 deletions
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@ -27,6 +27,11 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
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* r0: address of the system_off function
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*/
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push {r4-r12, lr}
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/* Move system_off to protected register. */
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mov r4, r0
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/* Store CPU context */
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ldr r1, =_cpu_context
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mrs r2, msp
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@ -71,7 +76,7 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
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* Call the system_off function passed as parameter. This should never
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* return.
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*/
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blx r0
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blx r4
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/*
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* The system_off function returns here only when the powering off was
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@ -81,9 +86,10 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
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/*
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* Reset the marking of suspend to RAM, return is ignored.
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*/
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push {r0}
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bl pm_s2ram_mark_check_and_clear
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pop {r0}
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/* Move system_off back to r0 as return value */
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mov r0, r4
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pop {r4-r12, lr}
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bx lr
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@ -93,11 +99,14 @@ GTEXT(arch_pm_s2ram_resume)
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SECTION_FUNC(TEXT, arch_pm_s2ram_resume)
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/*
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* Check if reset occurred after suspending to RAM.
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* Store LR to ensure we can continue boot when we are not suspended
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* to RAM. In addition to LR, R0 is pushed too, to ensure "SP mod 8 = 0",
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* as stated by ARM rule 6.2.1.2 for AAPCS32.
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*/
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push {lr}
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push {r0, lr}
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bl pm_s2ram_mark_check_and_clear
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cmp r0, #0x1
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pop {lr}
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pop {r0, lr}
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beq resume
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bx lr
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