boards: nxp: frdm_rw612: restructure dts
Restructure board dts file to prepare for NS targets using common dts. Signed-off-by: David Leach <david.leach@nxp.com>
This commit is contained in:
parent
9cdb07cb52
commit
259302a201
2 changed files with 223 additions and 216 deletions
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@ -7,219 +7,4 @@
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/dts-v1/;
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#include <nxp/nxp_rw6xx.dtsi>
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#include "frdm_rw612-pinctrl.dtsi"
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/ {
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model = "nxp,frdm_rw612";
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aliases {
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led0 = &green_led;
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watchdog0 = &wwdt;
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usart-0 = &flexcomm3;
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i2c-0 = &flexcomm2;
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pwm-0 = &sctimer;
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};
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chosen {
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zephyr,sram = &sram_data;
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zephyr,flash = &w25q512jvfiq;
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zephyr,console = &flexcomm3;
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zephyr,shell-uart = &flexcomm3;
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};
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leds {
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compatible = "gpio-leds";
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green_led: led_1 {
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gpios = <&hsgpio0 12 0>;
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};
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};
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};
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&flexcomm3 {
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compatible = "nxp,lpc-usart";
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&pinmux_flexcomm3_usart>;
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pinctrl-names = "default";
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};
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&flexcomm0 {
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compatible = "nxp,lpc-usart";
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status = "disabled";
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current-speed = <115200>;
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pinctrl-0 = <&pinmux_flexcomm0_usart>;
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pinctrl-names = "default";
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};
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&hsgpio0 {
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status = "okay";
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};
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&flexspi {
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status = "okay";
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ahb-bufferable;
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ahb-prefetch;
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ahb-cacheable;
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ahb-read-addr-opt;
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ahb-boundary = "1024";
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rx-clock-source = <1>;
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rx-clock-source-b = <1>;
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/* Winbond external flash */
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w25q512jvfiq: w25q512jvfiq@0 {
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compatible = "nxp,imx-flexspi-nor";
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reg = <0>;
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size = <DT_SIZE_M(64 * 8)>;
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status = "okay";
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erase-block-size = <4096>;
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write-block-size = <1>;
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spi-max-frequency = <104000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 DT_SIZE_K(128)>;
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};
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/* The MCUBoot swap-move algorithm uses the last 2 sectors
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* of the primary slot0 for swap status and move.
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*/
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slot0_partition: partition@20000 {
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label = "image-0";
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reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(2 * 4))>;
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};
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slot1_partition: partition@323000 {
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label = "image-1";
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reg = <0x00323000 DT_SIZE_M(3)>;
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};
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storage_partition: partition@623000 {
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label = "storage";
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reg = <0x00623000 (DT_SIZE_M(58) - DT_SIZE_K(136))>;
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};
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};
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};
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aps6404l: aps6404l@2 {
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compatible = "nxp,imx-flexspi-aps6404l";
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/* APS6404L is 8MB, 64MBit pSRAM */
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size = <DT_SIZE_M(8 * 8)>;
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reg = <2>;
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spi-max-frequency = <109000000>;
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/* PSRAM cannot be enabled while board is in default XIP
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* configuration, as it will conflict with flash chip.
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*/
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status = "disabled";
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cs-interval-unit = <1>;
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cs-interval = <2>;
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cs-hold-time = <3>;
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cs-setup-time = <3>;
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data-valid-time = <6>;
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column-space = <0>;
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ahb-write-wait-unit = <2>;
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ahb-write-wait-interval = <0>;
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};
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};
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&hci {
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status = "okay";
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wakeup-source;
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};
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&enet_mac {
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status = "okay";
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pinctrl-0 = <&pinmux_enet>;
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pinctrl-names = "default";
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phy-handle = <&phy>;
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zephyr,random-mac-address;
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phy-connection-type = "rmii";
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};
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&enet_mdio {
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status = "okay";
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pinctrl-0 = <&pinmux_mdio>;
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pinctrl-names = "default";
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phy: phy@2 {
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compatible = "microchip,ksz8081";
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reg = <2>;
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status = "okay";
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reset-gpios = <&hsgpio1 23 GPIO_ACTIVE_HIGH>;
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int-gpios = <&hsgpio0 21 GPIO_ACTIVE_HIGH>;
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microchip,interface-type = "rmii";
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};
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};
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&wwdt {
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status = "okay";
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};
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&dma0 {
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status = "okay";
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};
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&mrt0_channel0 {
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status = "okay";
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};
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&ctimer0 {
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status = "okay";
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};
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&pmu {
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reset-causes-en = <PMU_RESET_CM33_LOCKUP>,
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<PMU_RESET_ITRC>,
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<PMU_RESET_AP_RESET>;
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};
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/* OS Timer is the wakeup source for PM mode 2 */
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&os_timer {
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status = "okay";
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wakeup-source;
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};
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&systick {
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status = "disabled";
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};
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&adc0 {
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status = "okay";
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};
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&dac0 {
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status = "okay";
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};
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&sctimer {
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status = "okay";
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pinctrl-0 = <&pinmux_pwm0>;
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pinctrl-names = "default";
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};
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zephyr_udc0: &usb_otg {
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status = "okay";
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};
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/*
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* the default resistors on the board breaks out the MOSI/MISO
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* pins to the nets labelled "UART" which go to J1 2 and 4,
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* but we are using it for spi mosi and miso here.
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* SCK is on J2 6 as labelled.
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*/
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&flexcomm1 {
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compatible = "nxp,lpc-spi";
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pinctrl-0 = <&pinmux_flexcomm1_spi>;
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pinctrl-names = "default";
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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arduino_i2c: &flexcomm2 {
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compatible = "nxp,lpc-i2c";
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pinmux_flexcomm2_i2c>;
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pinctrl-names = "default";
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};
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#include "frdm_rw612_common.dtsi"
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222
boards/nxp/frdm_rw612/frdm_rw612_common.dtsi
Normal file
222
boards/nxp/frdm_rw612/frdm_rw612_common.dtsi
Normal file
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@ -0,0 +1,222 @@
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "frdm_rw612-pinctrl.dtsi"
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/ {
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model = "nxp,frdm_rw612";
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aliases {
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led0 = &green_led;
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watchdog0 = &wwdt;
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usart-0 = &flexcomm3;
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i2c-0 = &flexcomm2;
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pwm-0 = &sctimer;
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};
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chosen {
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zephyr,sram = &sram_data;
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zephyr,flash = &w25q512jvfiq;
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zephyr,console = &flexcomm3;
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zephyr,shell-uart = &flexcomm3;
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};
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leds {
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compatible = "gpio-leds";
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green_led: led_1 {
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gpios = <&hsgpio0 12 0>;
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};
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};
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};
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&flexcomm3 {
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compatible = "nxp,lpc-usart";
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&pinmux_flexcomm3_usart>;
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pinctrl-names = "default";
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};
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&flexcomm0 {
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compatible = "nxp,lpc-usart";
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status = "disabled";
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current-speed = <115200>;
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pinctrl-0 = <&pinmux_flexcomm0_usart>;
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pinctrl-names = "default";
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};
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&hsgpio0 {
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status = "okay";
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};
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&flexspi {
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status = "okay";
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ahb-bufferable;
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ahb-prefetch;
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ahb-cacheable;
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ahb-read-addr-opt;
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ahb-boundary = "1024";
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rx-clock-source = <1>;
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rx-clock-source-b = <1>;
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/* Winbond external flash */
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w25q512jvfiq: w25q512jvfiq@0 {
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compatible = "nxp,imx-flexspi-nor";
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reg = <0>;
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size = <DT_SIZE_M(64 * 8)>;
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status = "okay";
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erase-block-size = <4096>;
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write-block-size = <1>;
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spi-max-frequency = <104000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 DT_SIZE_K(128)>;
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};
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/* The MCUBoot swap-move algorithm uses the last 2 sectors
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* of the primary slot0 for swap status and move.
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*/
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slot0_partition: partition@20000 {
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label = "image-0";
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reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(2 * 4))>;
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};
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slot1_partition: partition@323000 {
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label = "image-1";
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reg = <0x00323000 DT_SIZE_M(3)>;
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};
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storage_partition: partition@623000 {
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label = "storage";
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reg = <0x00623000 (DT_SIZE_M(58) - DT_SIZE_K(136))>;
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};
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};
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};
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aps6404l: aps6404l@2 {
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compatible = "nxp,imx-flexspi-aps6404l";
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/* APS6404L is 8MB, 64MBit pSRAM */
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size = <DT_SIZE_M(8 * 8)>;
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reg = <2>;
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spi-max-frequency = <109000000>;
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/* PSRAM cannot be enabled while board is in default XIP
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* configuration, as it will conflict with flash chip.
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*/
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status = "disabled";
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cs-interval-unit = <1>;
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cs-interval = <2>;
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cs-hold-time = <3>;
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cs-setup-time = <3>;
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data-valid-time = <6>;
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column-space = <0>;
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ahb-write-wait-unit = <2>;
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ahb-write-wait-interval = <0>;
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};
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};
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&hci {
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status = "okay";
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wakeup-source;
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};
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&enet_mac {
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status = "okay";
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pinctrl-0 = <&pinmux_enet>;
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pinctrl-names = "default";
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phy-handle = <&phy>;
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zephyr,random-mac-address;
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phy-connection-type = "rmii";
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};
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&enet_mdio {
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status = "okay";
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pinctrl-0 = <&pinmux_mdio>;
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pinctrl-names = "default";
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phy: phy@2 {
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compatible = "microchip,ksz8081";
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reg = <2>;
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status = "okay";
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reset-gpios = <&hsgpio1 23 GPIO_ACTIVE_HIGH>;
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int-gpios = <&hsgpio0 21 GPIO_ACTIVE_HIGH>;
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microchip,interface-type = "rmii";
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};
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};
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&wwdt {
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status = "okay";
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};
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&dma0 {
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status = "okay";
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};
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&mrt0_channel0 {
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status = "okay";
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};
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&ctimer0 {
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status = "okay";
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};
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&pmu {
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reset-causes-en = <PMU_RESET_CM33_LOCKUP>,
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<PMU_RESET_ITRC>,
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<PMU_RESET_AP_RESET>;
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};
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/* OS Timer is the wakeup source for PM mode 2 */
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&os_timer {
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status = "okay";
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wakeup-source;
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};
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&systick {
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status = "disabled";
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};
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&adc0 {
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status = "okay";
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};
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&dac0 {
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status = "okay";
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};
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&sctimer {
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status = "okay";
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pinctrl-0 = <&pinmux_pwm0>;
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pinctrl-names = "default";
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};
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zephyr_udc0: &usb_otg {
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status = "okay";
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};
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/*
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* the default resistors on the board breaks out the MOSI/MISO
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* pins to the nets labelled "UART" which go to J1 2 and 4,
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* but we are using it for spi mosi and miso here.
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* SCK is on J2 6 as labelled.
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*/
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&flexcomm1 {
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compatible = "nxp,lpc-spi";
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pinctrl-0 = <&pinmux_flexcomm1_spi>;
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pinctrl-names = "default";
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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arduino_i2c: &flexcomm2 {
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compatible = "nxp,lpc-i2c";
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pinmux_flexcomm2_i2c>;
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pinctrl-names = "default";
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};
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