drivers: clock_control: add ccm driver for rt117x

- add ccm driver for rt117x

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>

drivers/clock_control/CMakeLists.txt

@@ -3,6 +3,7 @@
 zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_BEETLE              beetle_clock_control.c)
 zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_LPC11U6X            clock_control_lpc11u6x.c)
 zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_CCM            clock_control_mcux_ccm.c)
+zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_CCM_REV2       clock_control_mcux_ccm_rev2.c)
 zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_MCG            clock_control_mcux_mcg.c)
 zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_PCC            clock_control_mcux_pcc.c)
 zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SCG            clock_control_mcux_scg.c)

drivers/clock_control/Kconfig

@@ -30,6 +30,8 @@ source "drivers/clock_control/Kconfig.lpc11u6x"
 
 source "drivers/clock_control/Kconfig.mcux_ccm"
 
+source "drivers/clock_control/Kconfig.mcux_ccm_rev2"
+
 source "drivers/clock_control/Kconfig.mcux_mcg"
 
 source "drivers/clock_control/Kconfig.mcux_pcc"

drivers/clock_control/Kconfig.mcux_ccm_rev2

@@ -0,0 +1,10 @@
+# MCUXpresso SDK CCM
+
+# Copyright (c) 2021, NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config CLOCK_CONTROL_MCUX_CCM_REV2
+	bool "MCUX CCM Rev 2 driver"
+	depends on HAS_MCUX_CCM_REV2
+	help
+	  Enable support for mcux ccm rev 2 driver.

drivers/clock_control/clock_control_mcux_ccm_rev2.c

@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2021, NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DT_DRV_COMPAT nxp_imx_ccm_rev2
+#include <errno.h>
+#include <soc.h>
+#include <drivers/clock_control.h>
+#include <dt-bindings/clock/imx_ccm_rev2.h>
+#include <fsl_clock.h>
+
+#define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL
+#include <logging/log.h>
+LOG_MODULE_REGISTER(clock_control);
+
+static int mcux_ccm_on(const struct device *dev,
+				  clock_control_subsys_t sub_system)
+{
+	return 0;
+}
+
+static int mcux_ccm_off(const struct device *dev,
+				   clock_control_subsys_t sub_system)
+{
+	return 0;
+}
+
+static int mcux_ccm_get_subsys_rate(const struct device *dev,
+					clock_control_subsys_t sub_system,
+					uint32_t *rate)
+{
+	uint32_t clock_name = (uint32_t) sub_system;
+	uint32_t clock_root, peripheral, instance;
+
+	peripheral = (clock_name & IMX_CCM_PERIPHERAL_MASK);
+	instance = (clock_name & IMX_CCM_INSTANCE_MASK);
+	switch (peripheral) {
+#ifdef CONFIG_I2C_MCUX_LPI2C
+	case IMX_CCM_LPI2C1_CLK:
+		clock_root = kCLOCK_Root_Lpi2c1 + instance;
+		break;
+#endif
+
+#ifdef CONFIG_SPI_MCUX_LPSPI
+	case IMX_CCM_LPSPI1_CLK:
+		clock_root = kCLOCK_Root_Lpspi1 + instance;
+		break;
+#endif
+
+#ifdef CONFIG_UART_MCUX_LPUART
+	case IMX_CCM_LPUART1_CLK:
+		clock_root = kCLOCK_Root_Lpuart1 + instance;
+		break;
+#endif
+
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
+	case IMX_CCM_USDHC1_CLK:
+		clock_root = kCLOCK_Root_Usdhc1 + instance;
+		break;
+#endif
+
+#ifdef CONFIG_DMA_MCUX_EDMA
+	case IMX_CCM_EDMA_CLK:
+		clock_root = kCLOCK_Root_Edma + instance;
+		break;
+#endif
+
+#ifdef CONFIG_CAN_MCUX_FLEXCAN
+	case IMX_CCM_CAN1_CLK:
+		clock_root = kCLOCK_Root_Can1 + instance;
+		break;
+#endif
+	default:
+		return -EINVAL;
+	}
+
+	*rate = CLOCK_GetRootClockFreq(clock_root);
+	return 0;
+}
+
+static int mcux_ccm_init(const struct device *dev)
+{
+	return 0;
+}
+
+static const struct clock_control_driver_api mcux_ccm_driver_api = {
+	.on = mcux_ccm_on,
+	.off = mcux_ccm_off,
+	.get_rate = mcux_ccm_get_subsys_rate,
+};
+
+DEVICE_DT_INST_DEFINE(0,
+		    &mcux_ccm_init,
+		    NULL,
+		    NULL, NULL,
+		    PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
+		    &mcux_ccm_driver_api);

modules/Kconfig.mcux

@@ -35,6 +35,12 @@ config HAS_MCUX_CCM
 	help
 	  Set if the clock control module (CCM) module is present in the SoC.
 
+config HAS_MCUX_CCM_REV2
+	bool
+	help
+	  Set if the revison 2 of clock control module (CCM) module is present in the SoC.
+	  This is present in SoC's such as RT1170
+
 config HAS_MCUX_SYSCON
 	bool
 	help