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drivers: pwm: gd32: use reset API

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Use the reset API to reset the peripheral state before initialization.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2022-08-23 00:00:27 +02:00 committed by Carles Cufí
parent 7002351b58
commit 2c740b4392
8 changed files with 70 additions and 74 deletions
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12
drivers/pwm/pwm_gd32.c
View file

@ -10,6 +10,7 @@
#include <zephyr/drivers/pwm.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/reset.h>
#include <zephyr/sys/util_macro.h>
#include <gd32_rcu.h>
@ -39,8 +40,8 @@ struct pwm_gd32_config {
uint16_t prescaler;
/** RCU peripheral clock. */
uint32_t rcu_periph_clock;
/** RCU peripheral reset. */
uint32_t rcu_periph_reset;
/** Reset. */
struct reset_dt_spec reset;
/** pinctrl configurations. */
const struct pinctrl_dev_config *pcfg;
};
@ -234,9 +235,7 @@ static int pwm_gd32_init(const struct device *dev)
rcu_periph_clock_enable(config->rcu_periph_clock);
/* reset timer to its default state */
rcu_periph_reset_enable(config->rcu_periph_reset);
rcu_periph_reset_disable(config->rcu_periph_reset);
(void)reset_line_toggle_dt(&config->reset);
/* apply pin configuration */
ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
@ -272,8 +271,7 @@ static int pwm_gd32_init(const struct device *dev)
.reg = DT_REG_ADDR(DT_INST_PARENT(i)), \
.rcu_periph_clock = DT_PROP(DT_INST_PARENT(i), \
rcu_periph_clock), \
.rcu_periph_reset = DT_PROP(DT_INST_PARENT(i), \
rcu_periph_reset), \
.reset = RESET_DT_SPEC_GET(DT_INST_PARENT(i)), \
.prescaler = DT_PROP(DT_INST_PARENT(i), prescaler), \
.channels = DT_PROP(DT_INST_PARENT(i), channels), \
.is_32bit = DT_PROP(DT_INST_PARENT(i), is_32bit), \

28
dts/arm/gigadevice/gd32e10x/gd32e10x.dtsi
View file

@ -213,7 +213,7 @@
interrupts = <24 0>, <25 0>, <26 0>, <27 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x60b>;
rcu-periph-reset = <0x30b>;
resets = <&rctl GD32_RESET_TIMER0>;
is-advanced;
channels = <4>;
status = "disabled";
@ -231,7 +231,7 @@
interrupts = <28 0>;
interrupt-names = "global";
rcu-periph-clock = <0x700>;
rcu-periph-reset = <0x400>;
resets = <&rctl GD32_RESET_TIMER1>;
channels = <4>;
status = "disabled";
@ -248,7 +248,7 @@
interrupts = <29 0>;
interrupt-names = "global";
rcu-periph-clock = <0x701>;
rcu-periph-reset = <0x401>;
resets = <&rctl GD32_RESET_TIMER2>;
channels = <4>;
status = "disabled";
@ -265,7 +265,7 @@
interrupts = <30 0>;
interrupt-names = "global";
rcu-periph-clock = <0x702>;
rcu-periph-reset = <0x402>;
resets = <&rctl GD32_RESET_TIMER3>;
channels = <4>;
status = "disabled";
@ -282,7 +282,7 @@
interrupts = <50 0>;
interrupt-names = "global";
rcu-periph-clock = <0x703>;
rcu-periph-reset = <0x403>;
resets = <&rctl GD32_RESET_TIMER4>;
channels = <4>;
status = "disabled";
@ -299,7 +299,7 @@
interrupts = <54 0>;
interrupt-names = "global";
rcu-periph-clock = <0x704>;
rcu-periph-reset = <0x404>;
resets = <&rctl GD32_RESET_TIMER5>;
channels = <0>;
status = "disabled";
};
@ -310,7 +310,7 @@
interrupts = <55 0>;
interrupt-names = "global";
rcu-periph-clock = <0x705>;
rcu-periph-reset = <0x405>;
resets = <&rctl GD32_RESET_TIMER6>;
channels = <0>;
status = "disabled";
};
@ -321,7 +321,7 @@
interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x60d>;
rcu-periph-reset = <0x30d>;
resets = <&rctl GD32_RESET_TIMER7>;
is-advanced;
channels = <4>;
status = "disabled";
@ -339,7 +339,7 @@
interrupts = <24 0>;
interrupt-names = "global";
rcu-periph-clock = <0x613>;
rcu-periph-reset = <0x313>;
resets = <&rctl GD32_RESET_TIMER8>;
channels = <2>;
status = "disabled";
@ -356,7 +356,7 @@
interrupts = <25 0>;
interrupt-names = "global";
rcu-periph-clock = <0x614>;
rcu-periph-reset = <0x314>;
resets = <&rctl GD32_RESET_TIMER9>;
channels = <1>;
status = "disabled";
@ -373,7 +373,7 @@
interrupts = <26 0>;
interrupt-names = "global";
rcu-periph-clock = <0x615>;
rcu-periph-reset = <0x315>;
resets = <&rctl GD32_RESET_TIMER10>;
channels = <1>;
status = "disabled";
@ -390,7 +390,7 @@
interrupts = <43 0>;
interrupt-names = "global";
rcu-periph-clock = <0x706>;
rcu-periph-reset = <0x406>;
resets = <&rctl GD32_RESET_TIMER11>;
channels = <2>;
status = "disabled";
@ -407,7 +407,7 @@
interrupts = <44 0>;
interrupt-names = "global";
rcu-periph-clock = <0x707>;
rcu-periph-reset = <0x402>;
resets = <&rctl GD32_RESET_TIMER12>;
channels = <1>;
status = "disabled";
@ -424,7 +424,7 @@
interrupts = <45 0>;
interrupt-names = "global";
rcu-periph-clock = <0x708>;
rcu-periph-reset = <0x408>;
resets = <&rctl GD32_RESET_TIMER13>;
channels = <1>;
status = "disabled";

14
dts/arm/gigadevice/gd32e50x/gd32e507xe.dtsi
View file

@ -15,7 +15,7 @@
interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x60d>;
rcu-periph-reset = <0x30d>;
resets = <&rctl GD32_RESET_TIMER7>;
is-advanced;
channels = <4>;
status = "disabled";
@ -33,7 +33,7 @@
interrupts = <24 0>;
interrupt-names = "global";
rcu-periph-clock = <0x613>;
rcu-periph-reset = <0x313>;
resets = <&rctl GD32_RESET_TIMER8>;
channels = <2>;
status = "disabled";
@ -50,7 +50,7 @@
interrupts = <25 0>;
interrupt-names = "global";
rcu-periph-clock = <0x614>;
rcu-periph-reset = <0x314>;
resets = <&rctl GD32_RESET_TIMER9>;
channels = <1>;
status = "disabled";
@ -67,7 +67,7 @@
interrupts = <26 0>;
interrupt-names = "global";
rcu-periph-clock = <0x615>;
rcu-periph-reset = <0x315>;
resets = <&rctl GD32_RESET_TIMER10>;
channels = <1>;
status = "disabled";
@ -84,7 +84,7 @@
interrupts = <43 0>;
interrupt-names = "global";
rcu-periph-clock = <0x706>;
rcu-periph-reset = <0x406>;
resets = <&rctl GD32_RESET_TIMER11>;
channels = <2>;
status = "disabled";
@ -101,7 +101,7 @@
interrupts = <44 0>;
interrupt-names = "global";
rcu-periph-clock = <0x707>;
rcu-periph-reset = <0x407>;
resets = <&rctl GD32_RESET_TIMER12>;
channels = <1>;
status = "disabled";
@ -118,7 +118,7 @@
interrupts = <45 0>;
interrupt-names = "global";
rcu-periph-clock = <0x708>;
rcu-periph-reset = <0x408>;
resets = <&rctl GD32_RESET_TIMER13>;
channels = <1>;
status = "disabled";

14
dts/arm/gigadevice/gd32e50x/gd32e50x.dtsi
View file

@ -262,7 +262,7 @@
interrupts = <24 0>, <25 0>, <26 0>, <27 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x60b>;
rcu-periph-reset = <0x30b>;
resets = <&rctl GD32_RESET_TIMER0>;
is-advanced;
channels = <4>;
status = "disabled";
@ -280,7 +280,7 @@
interrupts = <28 0>;
interrupt-names = "global";
rcu-periph-clock = <0x700>;
rcu-periph-reset = <0x400>;
resets = <&rctl GD32_RESET_TIMER1>;
is-32bit;
channels = <4>;
status = "disabled";
@ -298,7 +298,7 @@
interrupts = <29 0>;
interrupt-names = "global";
rcu-periph-clock = <0x701>;
rcu-periph-reset = <0x401>;
resets = <&rctl GD32_RESET_TIMER2>;
channels = <4>;
status = "disabled";
@ -315,7 +315,7 @@
interrupts = <30 0>;
interrupt-names = "global";
rcu-periph-clock = <0x702>;
rcu-periph-reset = <0x402>;
resets = <&rctl GD32_RESET_TIMER3>;
channels = <4>;
status = "disabled";
@ -332,7 +332,7 @@
interrupts = <50 0>;
interrupt-names = "global";
rcu-periph-clock = <0x703>;
rcu-periph-reset = <0x403>;
resets = <&rctl GD32_RESET_TIMER4>;
is-32bit;
channels = <4>;
status = "disabled";
@ -350,7 +350,7 @@
interrupts = <54 0>;
interrupt-names = "global";
rcu-periph-clock = <0x704>;
rcu-periph-reset = <0x404>;
resets = <&rctl GD32_RESET_TIMER5>;
channels = <0>;
status = "disabled";
};
@ -361,7 +361,7 @@
interrupts = <55 0>;
interrupt-names = "global";
rcu-periph-clock = <0x705>;
rcu-periph-reset = <0x405>;
resets = <&rctl GD32_RESET_TIMER6>;
channels = <0>;
status = "disabled";
};

24
dts/arm/gigadevice/gd32f403/gd32f403.dtsi
View file

@ -267,7 +267,7 @@
interrupts = <24 0>, <25 0>, <26 0>, <27 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x60b>;
rcu-periph-reset = <0x30b>;
resets = <&rctl GD32_RESET_TIMER0>;
is-advanced;
channels = <4>;
status = "disabled";
@ -285,7 +285,7 @@
interrupts = <29 0>;
interrupt-names = "global";
rcu-periph-clock = <0x701>;
rcu-periph-reset = <0x401>;
resets = <&rctl GD32_RESET_TIMER2>;
channels = <4>;
status = "disabled";
@ -302,7 +302,7 @@
interrupts = <30 0>;
interrupt-names = "global";
rcu-periph-clock = <0x702>;
rcu-periph-reset = <0x402>;
resets = <&rctl GD32_RESET_TIMER3>;
channels = <4>;
status = "disabled";
@ -319,7 +319,7 @@
interrupts = <54 0>;
interrupt-names = "global";
rcu-periph-clock = <0x704>;
rcu-periph-reset = <0x404>;
resets = <&rctl GD32_RESET_TIMER5>;
channels = <0>;
status = "disabled";
};
@ -330,7 +330,7 @@
interrupts = <55 0>;
interrupt-names = "global";
rcu-periph-clock = <0x705>;
rcu-periph-reset = <0x405>;
resets = <&rctl GD32_RESET_TIMER6>;
channels = <0>;
status = "disabled";
};
@ -341,7 +341,7 @@
interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x60d>;
rcu-periph-reset = <0x30d>;
resets = <&rctl GD32_RESET_TIMER7>;
is-advanced;
channels = <4>;
status = "disabled";
@ -359,7 +359,7 @@
interrupts = <24 0>;
interrupt-names = "global";
rcu-periph-clock = <0x613>;
rcu-periph-reset = <0x313>;
resets = <&rctl GD32_RESET_TIMER8>;
channels = <2>;
status = "disabled";
@ -376,7 +376,7 @@
interrupts = <25 0>;
interrupt-names = "global";
rcu-periph-clock = <0x614>;
rcu-periph-reset = <0x314>;
resets = <&rctl GD32_RESET_TIMER9>;
channels = <1>;
status = "disabled";
@ -393,7 +393,7 @@
interrupts = <26 0>;
interrupt-names = "global";
rcu-periph-clock = <0x615>;
rcu-periph-reset = <0x315>;
resets = <&rctl GD32_RESET_TIMER10>;
channels = <1>;
status = "disabled";
@ -410,7 +410,7 @@
interrupts = <43 0>;
interrupt-names = "global";
rcu-periph-clock = <0x706>;
rcu-periph-reset = <0x406>;
resets = <&rctl GD32_RESET_TIMER11>;
channels = <2>;
status = "disabled";
@ -427,7 +427,7 @@
interrupts = <44 0>;
interrupt-names = "global";
rcu-periph-clock = <0x707>;
rcu-periph-reset = <0x402>;
resets = <&rctl GD32_RESET_TIMER12>;
channels = <1>;
status = "disabled";
@ -444,7 +444,7 @@
interrupts = <45 0>;
interrupt-names = "global";
rcu-periph-clock = <0x708>;
rcu-periph-reset = <0x408>;
resets = <&rctl GD32_RESET_TIMER13>;
channels = <1>;
status = "disabled";

28
dts/arm/gigadevice/gd32f4xx/gd32f4xx.dtsi
View file

@ -358,7 +358,7 @@
interrupts = <24 0>, <25 0>, <26 0>, <27 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x1100>;
rcu-periph-reset = <0x900>;
resets = <&rctl GD32_RESET_TIMER0>;
is-advanced;
channels = <4>;
status = "disabled";
@ -376,7 +376,7 @@
interrupts = <28 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1000>;
rcu-periph-reset = <0x800>;
resets = <&rctl GD32_RESET_TIMER1>;
is-32bit;
channels = <4>;
status = "disabled";
@ -394,7 +394,7 @@
interrupts = <29 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1001>;
rcu-periph-reset = <0x801>;
resets = <&rctl GD32_RESET_TIMER2>;
channels = <4>;
status = "disabled";
@ -411,7 +411,7 @@
interrupts = <30 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1002>;
rcu-periph-reset = <0x802>;
resets = <&rctl GD32_RESET_TIMER3>;
channels = <4>;
status = "disabled";
@ -428,7 +428,7 @@
interrupts = <50 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1003>;
rcu-periph-reset = <0x803>;
resets = <&rctl GD32_RESET_TIMER4>;
is-32bit;
channels = <4>;
status = "disabled";
@ -446,7 +446,7 @@
interrupts = <54 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1004>;
rcu-periph-reset = <0x804>;
resets = <&rctl GD32_RESET_TIMER5>;
channels = <0>;
status = "disabled";
};
@ -457,7 +457,7 @@
interrupts = <55 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1005>;
rcu-periph-reset = <0x805>;
resets = <&rctl GD32_RESET_TIMER6>;
channels = <0>;
status = "disabled";
};
@ -468,7 +468,7 @@
interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x1101>;
rcu-periph-reset = <0x901>;
resets = <&rctl GD32_RESET_TIMER7>;
is-advanced;
channels = <4>;
status = "disabled";
@ -486,7 +486,7 @@
interrupts = <24 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1110>;
rcu-periph-reset = <0x910>;
resets = <&rctl GD32_RESET_TIMER8>;
channels = <2>;
status = "disabled";
@ -503,7 +503,7 @@
interrupts = <25 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1111>;
rcu-periph-reset = <0x911>;
resets = <&rctl GD32_RESET_TIMER9>;
channels = <1>;
status = "disabled";
@ -520,7 +520,7 @@
interrupts = <26 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1112>;
rcu-periph-reset = <0x912>;
resets = <&rctl GD32_RESET_TIMER10>;
channels = <1>;
status = "disabled";
@ -537,7 +537,7 @@
interrupts = <43 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1006>;
rcu-periph-reset = <0x806>;
resets = <&rctl GD32_RESET_TIMER11>;
channels = <2>;
status = "disabled";
@ -554,7 +554,7 @@
interrupts = <44 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1007>;
rcu-periph-reset = <0x802>;
resets = <&rctl GD32_RESET_TIMER12>;
channels = <1>;
status = "disabled";
@ -571,7 +571,7 @@
interrupts = <45 0>;
interrupt-names = "global";
rcu-periph-clock = <0x1008>;
rcu-periph-reset = <0x808>;
resets = <&rctl GD32_RESET_TIMER13>;
channels = <1>;
status = "disabled";

10
dts/bindings/timer/gd,gd32-timer.yaml
View file

@ -5,12 +5,15 @@ description: GigaDevice GD32 timer
compatible: "gd,gd32-timer"
include: base.yaml
include: [reset-device.yaml, base.yaml]
properties:
reg:
required: true
resets:
required: true
channels:
type: int
required: true
@ -35,8 +38,3 @@ properties:
type: int
description: Reset Control Unit Peripheral Clock ID
required: true
rcu-periph-reset:
type: int
description: Reset Control Unit Peripheral Reset ID
required: true

14
dts/riscv/gigadevice/gd32vf103.dtsi
View file

@ -253,7 +253,7 @@
interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
rcu-periph-clock = <0x60b>;
rcu-periph-reset = <0x30b>;
resets = <&rctl GD32_RESET_TIMER0>;
is-advanced;
channels = <4>;
status = "disabled";
@ -271,7 +271,7 @@
interrupts = <47 0>;
interrupt-names = "global";
rcu-periph-clock = <0x700>;
rcu-periph-reset = <0x400>;
resets = <&rctl GD32_RESET_TIMER1>;
channels = <4>;
status = "disabled";
@ -288,7 +288,7 @@
interrupts = <48 0>;
interrupt-names = "global";
rcu-periph-clock = <0x701>;
rcu-periph-reset = <0x401>;
resets = <&rctl GD32_RESET_TIMER2>;
channels = <4>;
status = "disabled";
@ -305,7 +305,7 @@
interrupts = <49 0>;
interrupt-names = "global";
rcu-periph-clock = <0x702>;
rcu-periph-reset = <0x402>;
resets = <&rctl GD32_RESET_TIMER3>;
channels = <4>;
status = "disabled";
@ -322,7 +322,7 @@
interrupts = <69 0>;
interrupt-names = "global";
rcu-periph-clock = <0x703>;
rcu-periph-reset = <0x403>;
resets = <&rctl GD32_RESET_TIMER4>;
channels = <4>;
status = "disabled";
@ -339,7 +339,7 @@
interrupts = <73 0>;
interrupt-names = "global";
rcu-periph-clock = <0x704>;
rcu-periph-reset = <0x404>;
resets = <&rctl GD32_RESET_TIMER5>;
channels = <0>;
status = "disabled";
};
@ -350,7 +350,7 @@
interrupts = <74 0>;
interrupt-names = "global";
rcu-periph-clock = <0x705>;
rcu-periph-reset = <0x405>;
resets = <&rctl GD32_RESET_TIMER6>;
channels = <0>;
status = "disabled";
};