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twister: drop riscv32/64 support

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riscv32/64 are no longer supported, as both are the same arch: riscv.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2024-02-07 11:24:51 +01:00 committed by Alberto Escolar
parent 6810a53297
commit 2dbb4a013b
3 changed files with 5 additions and 14 deletions
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7
scripts/ci/test_plan.py
View file

@ -182,8 +182,6 @@ class Filters:
def find_archs(self): def find_archs(self):
# we match both arch/<arch>/* and include/zephyr/arch/<arch> and skip common. # we match both arch/<arch>/* and include/zephyr/arch/<arch> and skip common.
# Some architectures like riscv require special handling, i.e. riscv
# directory covers 2 architectures known to twister: riscv32 and riscv64.
archs = set() archs = set()
for f in self.modified_files: for f in self.modified_files:
@ -192,11 +190,6 @@ class Filters:
p = re.match(r"^include\/zephyr\/arch\/([^/]+)\/", f) p = re.match(r"^include\/zephyr\/arch\/([^/]+)\/", f)
if p: if p:
if p.group(1) != 'common': if p.group(1) != 'common':
if p.group(1) == 'riscv':
archs.add('riscv')
archs.add('riscv32')
archs.add('riscv64')
else:
archs.add(p.group(1)) archs.add(p.group(1))
# Modified file is treated as resolved, since a matching scope was found # Modified file is treated as resolved, since a matching scope was found
self.resolved_files.append(f) self.resolved_files.append(f)

2
scripts/pylib/twister/twisterlib/platform.py
View file

@ -88,8 +88,6 @@ class Platform:
"arm64": ["zephyr", "cross-compile"], "arm64": ["zephyr", "cross-compile"],
"mips": ["zephyr", "xtools"], "mips": ["zephyr", "xtools"],
"nios2": ["zephyr", "xtools"], "nios2": ["zephyr", "xtools"],
"riscv32": ["zephyr", "cross-compile", "xtools"],
"riscv64": ["zephyr"],
"riscv": ["zephyr", "cross-compile"], "riscv": ["zephyr", "cross-compile"],
"posix": ["host", "llvm"], "posix": ["host", "llvm"],
"sparc": ["zephyr", "xtools"], "sparc": ["zephyr", "xtools"],

8
scripts/tests/twister/test_platform.py
View file

@ -49,7 +49,7 @@ arch: arch0
( (
"""\ """\
identifier: dummy full identifier: dummy full
arch: riscv32 arch: riscv
twister: true twister: true
ram: 1024 ram: 1024
testing: testing:
@ -81,7 +81,7 @@ env:
""", """,
{ {
'name': 'dummy full', 'name': 'dummy full',
'arch': 'riscv32', 'arch': 'riscv',
'twister': True, 'twister': True,
'ram': 1024, 'ram': 1024,
'timeout_multiplier': 2.0, 'timeout_multiplier': 2.0,
@ -96,11 +96,11 @@ env:
'type': 'unit', 'type': 'unit',
'simulation': 'nsim', 'simulation': 'nsim',
'simulation_exec': 'nsimdrv', 'simulation_exec': 'nsimdrv',
'supported_toolchains': ['zephyr', 'llvm', 'cross-compile', 'xtools'], 'supported_toolchains': ['zephyr', 'llvm', 'cross-compile'],
'env': ['dummynonexistentvar'], 'env': ['dummynonexistentvar'],
'env_satisfied': False 'env_satisfied': False
}, },
'<dummy full on riscv32>' '<dummy full on riscv>'
), ),
] ]