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dts: arm: st: Fix memory mapping and size for STM32L47x/8x/9x/ax

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Split and fix the total SRAM size for STM32L47x/L48x/L49x/L4Ax
device. Those MCUs with up to 320 Kbytes SRAM:
• 96 Kbytes SRAM1 and 32 Kbyte SRAM2 on STM32L47x/L48x.
• 256 Kbyte SRAM1 and 64 Kbyte SRAM2 on STM32L49x/L4Ax
The sram0 node at address 0x20000000 and sram1 at address 0x10000000

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu 2024-11-12 16:42:09 +01:00 committed by Benjamin Cabé
parent 5531692bcc
commit 2eb875618b
7 changed files with 22 additions and 3 deletions
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1
dts/arm/st/l4/stm32l471Xg.dtsi
View file

@ -14,6 +14,7 @@
sram1: memory@10000000 {
reg = <0x10000000 DT_SIZE_K(32)>;
};
soc {
flash-controller@40022000 {
flash0: flash@8000000 {

3
dts/arm/st/l4/stm32l475Xg.dtsi
View file

@ -10,6 +10,9 @@
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(96)>;
};
sram1: memory@10000000 {
reg = <0x10000000 DT_SIZE_K(32)>;
};
soc {
flash-controller@40022000 {

3
dts/arm/st/l4/stm32l476Xg.dtsi
View file

@ -10,6 +10,9 @@
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(96)>;
};
sram1: memory@10000000 {
reg = <0x10000000 DT_SIZE_K(32)>;
};
soc {
flash-controller@40022000 {

5
dts/arm/st/l4/stm32l486Xg.dtsi
View file

@ -9,7 +9,10 @@
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(128)>;
reg = <0x20000000 DT_SIZE_K(96)>;
};
sram1: memory@10000000 {
reg = <0x10000000 DT_SIZE_K(32)>;
};
soc {

3
dts/arm/st/l4/stm32l496Xe.dtsi
View file

@ -10,6 +10,9 @@
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(256)>;
};
sram1: memory@10000000 {
reg = <0x10000000 DT_SIZE_K(64)>;
};
soc {
flash-controller@40022000 {

5
dts/arm/st/l4/stm32l496Xg.dtsi
View file

@ -8,7 +8,10 @@
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(320)>;
reg = <0x20000000 DT_SIZE_K(256)>;
};
sram1: memory@10000000 {
reg = <0x10000000 DT_SIZE_K(64)>;
};
soc {

5
dts/arm/st/l4/stm32l4a6Xg.dtsi
View file

@ -9,7 +9,10 @@
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(320)>;
reg = <0x20000000 DT_SIZE_K(256)>;
};
sram1: memory@10000000 {
reg = <0x10000000 DT_SIZE_K(64)>;
};
soc {