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dts: arm: rp2040: Improve naming of included files

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Rename rpi_pico_common.dtsi to rp2040_reset.h . This is more consistent
with the wider Zephyr source tree, and is foundation work ahead of
introducing the RP2350 SoC.

Add missing include guard. This shouldn't be required, but it is
consistent with other header files in the same directory.

Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
This commit is contained in:
Andrew Featherstone 2024-08-27 10:22:11 +01:00 committed by Benjamin Cabé
parent d257460e9d
commit 36613aa359
3 changed files with 38 additions and 32 deletions
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3
dts/arm/raspberrypi/rpi_pico/rp2040.dtsi
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@ -10,7 +10,7 @@
#include <zephyr/dt-bindings/clock/rpi_pico_clock.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/regulator/rpi_pico.h>
#include <zephyr/dt-bindings/reset/rpi_pico_reset.h>
#include <zephyr/dt-bindings/reset/rp2040_reset.h>
#include <mem.h>
#include <arm/raspberrypi/rpi_pico/override.dtsi>
@ -18,6 +18,7 @@
* This value can be overridden at the board level or in an application specific
* override.dtsi file.
*/
#ifndef RPI_PICO_DEFAULT_IRQ_PRIORITY
#define RPI_PICO_DEFAULT_IRQ_PRIORITY 3
#endif

36
include/zephyr/dt-bindings/reset/rp2040_reset.h Normal file
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@ -0,0 +1,36 @@
/*
* Copyright (c) 2021 Yonatan Schachter
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_RP2040_RESET_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_RP2040_RESET_H_
#define RPI_PICO_RESETS_RESET_ADC 0
#define RPI_PICO_RESETS_RESET_BUSCTRL 1
#define RPI_PICO_RESETS_RESET_DMA 2
#define RPI_PICO_RESETS_RESET_I2C0 3
#define RPI_PICO_RESETS_RESET_I2C1 4
#define RPI_PICO_RESETS_RESET_IO_BANK0 5
#define RPI_PICO_RESETS_RESET_IO_QSPI 6
#define RPI_PICO_RESETS_RESET_JTAG 7
#define RPI_PICO_RESETS_RESET_PADS_BANK0 8
#define RPI_PICO_RESETS_RESET_PADS_QSPI 9
#define RPI_PICO_RESETS_RESET_PIO0 10
#define RPI_PICO_RESETS_RESET_PIO1 11
#define RPI_PICO_RESETS_RESET_PLL_SYS 12
#define RPI_PICO_RESETS_RESET_PLL_USB 13
#define RPI_PICO_RESETS_RESET_PWM 14
#define RPI_PICO_RESETS_RESET_RTC 15
#define RPI_PICO_RESETS_RESET_SPI0 16
#define RPI_PICO_RESETS_RESET_SPI1 17
#define RPI_PICO_RESETS_RESET_SYSCFG 18
#define RPI_PICO_RESETS_RESET_SYSINFO 19
#define RPI_PICO_RESETS_RESET_TBMAN 20
#define RPI_PICO_RESETS_RESET_TIMER 21
#define RPI_PICO_RESETS_RESET_UART0 22
#define RPI_PICO_RESETS_RESET_UART1 23
#define RPI_PICO_RESETS_RESET_USBCTRL 24
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_RESET_RP2040_RESET_H_ */

31
include/zephyr/dt-bindings/reset/rpi_pico_reset.h
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@ -1,31 +0,0 @@
/*
* Copyright (c) 2021 Yonatan Schachter
*
* SPDX-License-Identifier: Apache-2.0
*/
#define RPI_PICO_RESETS_RESET_ADC 0
#define RPI_PICO_RESETS_RESET_BUSCTRL 1
#define RPI_PICO_RESETS_RESET_DMA 2
#define RPI_PICO_RESETS_RESET_I2C0 3
#define RPI_PICO_RESETS_RESET_I2C1 4
#define RPI_PICO_RESETS_RESET_IO_BANK0 5
#define RPI_PICO_RESETS_RESET_IO_QSPI 6
#define RPI_PICO_RESETS_RESET_JTAG 7
#define RPI_PICO_RESETS_RESET_PADS_BANK0 8
#define RPI_PICO_RESETS_RESET_PADS_QSPI 9
#define RPI_PICO_RESETS_RESET_PIO0 10
#define RPI_PICO_RESETS_RESET_PIO1 11
#define RPI_PICO_RESETS_RESET_PLL_SYS 12
#define RPI_PICO_RESETS_RESET_PLL_USB 13
#define RPI_PICO_RESETS_RESET_PWM 14
#define RPI_PICO_RESETS_RESET_RTC 15
#define RPI_PICO_RESETS_RESET_SPI0 16
#define RPI_PICO_RESETS_RESET_SPI1 17
#define RPI_PICO_RESETS_RESET_SYSCFG 18
#define RPI_PICO_RESETS_RESET_SYSINFO 19
#define RPI_PICO_RESETS_RESET_TBMAN 20
#define RPI_PICO_RESETS_RESET_TIMER 21
#define RPI_PICO_RESETS_RESET_UART0 22
#define RPI_PICO_RESETS_RESET_UART1 23
#define RPI_PICO_RESETS_RESET_USBCTRL 24