From 3bb3a9626ff387eda1e3cb4bf30f78e844ff8824 Mon Sep 17 00:00:00 2001 From: The Nguyen Date: Tue, 19 Nov 2024 16:29:22 +0700 Subject: [PATCH] boards: shields: add support for rtkmipilcdb00000be shield First commit to support rtkmipilcdb00000be display shield Signed-off-by: The Nguyen --- boards/renesas/ek_ra8d1/Kconfig.defconfig | 14 ++++ boards/renesas/ek_ra8d1/doc/index.rst | 69 ++++++++++--------- boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi | 65 +++++++++++++++++ boards/renesas/ek_ra8d1/ek_ra8d1.dts | 36 ++++++++++ boards/renesas/ek_ra8d1/sdram.ld | 3 + .../rtkmipilcdb00000be/Kconfig.defconfig | 57 +++++++++++++++ .../shields/rtkmipilcdb00000be/Kconfig.shield | 5 ++ .../boards/ek_ra8d1.overlay | 25 +++++++ .../shields/rtkmipilcdb00000be/doc/index.rst | 61 ++++++++++++++++ .../rtkmipilcdb00000be.overlay | 63 +++++++++++++++++ 10 files changed, 365 insertions(+), 33 deletions(-) create mode 100644 boards/shields/rtkmipilcdb00000be/Kconfig.defconfig create mode 100644 boards/shields/rtkmipilcdb00000be/Kconfig.shield create mode 100644 boards/shields/rtkmipilcdb00000be/boards/ek_ra8d1.overlay create mode 100644 boards/shields/rtkmipilcdb00000be/doc/index.rst create mode 100644 boards/shields/rtkmipilcdb00000be/rtkmipilcdb00000be.overlay diff --git a/boards/renesas/ek_ra8d1/Kconfig.defconfig b/boards/renesas/ek_ra8d1/Kconfig.defconfig index d99c0d945ba..1aa568670af 100644 --- a/boards/renesas/ek_ra8d1/Kconfig.defconfig +++ b/boards/renesas/ek_ra8d1/Kconfig.defconfig @@ -10,4 +10,18 @@ config NET_L2_ETHERNET endif # NETWORKING +if SHIELD_RTKMIPILCDB00000BE + +config MEMC + default y + +if LVGL + +config LV_Z_VBD_CUSTOM_SECTION + default y + +endif # LVGL + +endif # SHIELD_RTKMIPILCDB00000BE + endif # BOARD_EK_RA8D1 diff --git a/boards/renesas/ek_ra8d1/doc/index.rst b/boards/renesas/ek_ra8d1/doc/index.rst index 6d5775fef49..34797638263 100644 --- a/boards/renesas/ek_ra8d1/doc/index.rst +++ b/boards/renesas/ek_ra8d1/doc/index.rst @@ -85,39 +85,42 @@ Supported Features The below features are currently supported on Zephyr OS for EK-RA8D1 board: -+--------------+------------+------------------+ -| Interface | Controller | Driver/Component | -+==============+============+==================+ -| GPIO | on-chip | gpio | -+--------------+------------+------------------+ -| MPU | on-chip | arch/arm | -+--------------+------------+------------------+ -| NVIC | on-chip | arch/arm | -+--------------+------------+------------------+ -| UART | on-chip | serial | -+--------------+------------+------------------+ -| CLOCK | on-chip | clock control | -+--------------+------------+------------------+ -| ENTROPY | on-chip | entropy | -+--------------+------------+------------------+ -| SPI | on-chip | spi | -+--------------+------------+------------------+ -| FLASH | on-chip | flash | -+--------------+------------+------------------+ -| PWM | on-chip | pwm | -+--------------+------------+------------------+ -| COUNTER | on-chip | counter | -+--------------+------------+------------------+ -| CAN | on-chip | canfd | -+--------------+------------+------------------+ -| I2C | on-chip | i2c | -+--------------+------------+------------------+ -| USBHS | on-chip | udc | -+--------------+------------+------------------+ -| ETHERNET | on-chip | ethernet | -+--------------+------------+------------------+ -| ADC | on-chip | adc | -+--------------+------------+------------------+ ++--------------+------------+-----------------------------------+ +| Interface | Controller | Driver/Component | ++==============+============+===================================+ +| GPIO | on-chip | gpio | ++--------------+------------+-----------------------------------+ +| MPU | on-chip | arch/arm | ++--------------+------------+-----------------------------------+ +| NVIC | on-chip | arch/arm | ++--------------+------------+-----------------------------------+ +| UART | on-chip | serial | ++--------------+------------+-----------------------------------+ +| CLOCK | on-chip | clock control | ++--------------+------------+-----------------------------------+ +| ENTROPY | on-chip | entropy | ++--------------+------------+-----------------------------------+ +| SPI | on-chip | spi | ++--------------+------------+-----------------------------------+ +| FLASH | on-chip | flash | ++--------------+------------+-----------------------------------+ +| PWM | on-chip | pwm | ++--------------+------------+-----------------------------------+ +| COUNTER | on-chip | counter | ++--------------+------------+-----------------------------------+ +| CAN | on-chip | canfd | ++--------------+------------+-----------------------------------+ +| I2C | on-chip | i2c | ++--------------+------------+-----------------------------------+ +| USBHS | on-chip | udc | ++--------------+------------+-----------------------------------+ +| DISPLAY | on-chip | LCDIF; MIPI-DSI. Tested with | +| | | :ref:`rtkmipilcdb00000be` shields | ++--------------+------------+-----------------------------------+ +| ETHERNET | on-chip | ethernet | ++--------------+------------+-----------------------------------+ +| ADC | on-chip | adc | ++--------------+------------+-----------------------------------+ **Note:** for using Ethernet on RA8D1 board please set switch SW1 as following configuration: diff --git a/boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi b/boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi index b7bf3720c7f..3fd8b3028da 100644 --- a/boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi +++ b/boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi @@ -178,4 +178,69 @@ ; }; }; + + glcdc_default: glcdc_default { + group1 { + /* LCDC_TCON0 */ + psels = , + /* LCDC_TCON1 */ + , + /* LCDC_TCON2 */ + , + /* LCDC_TCON3 */ + , + /* LCDC_DATA00 */ + , + /* LCDC_DATA01 */ + , + /* LCDC_DATA02 */ + , + /* LCDC_DATA03 */ + , + /* LCDC_DATA04 */ + , + /* LCDC_DATA05 */ + , + /* LCDC_DATA06 */ + , + /* LCDC_DATA07 */ + , + /* LCDC_DATA08 */ + , + /* LCDC_DATA09 */ + , + /* LCDC_DATA10 */ + , + /* LCDC_DATA11 */ + , + /* LCDC_DATA12 */ + , + /* LCDC_DATA13 */ + , + /* LCDC_DATA14 */ + , + /* LCDC_DATA15 */ + , + /* LCDC_DATA16 */ + , + /* LCDC_DATA17 */ + , + /* LCDC_DATA18 */ + , + /* LCDC_DATA19 */ + , + /* LCDC_DATA20 */ + , + /* LCDC_DATA21 */ + , + /* LCDC_DATA22 */ + , + /* LCDC_DATA23 */ + , + /* LCDC_CLK */ + , + /* LCDC_EXTCLK */ + ; + }; + }; }; diff --git a/boards/renesas/ek_ra8d1/ek_ra8d1.dts b/boards/renesas/ek_ra8d1/ek_ra8d1.dts index 83307de3ab0..b285a6a0afc 100644 --- a/boards/renesas/ek_ra8d1/ek_ra8d1.dts +++ b/boards/renesas/ek_ra8d1/ek_ra8d1.dts @@ -65,10 +65,23 @@ status = "okay"; }; + renesas_mipi_connector: mipi-connector { + compatible = "renesas,ra-gpio-mipi-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <14 0 &ioport5 11 0>, /* IIC_SDA */ + <15 0 &ioport4 4 0>, /* DISP_BLEN */ + <16 0 &ioport5 12 0>, /* IIC_SCL */ + <17 0 &ioport5 10 0>, /* DISP_INT */ + <18 0 &ioporta 1 0>; /* DISP_RST */ + }; + aliases { led0 = &led1; sw0 = &button0; sw1 = &button1; + mipi-dsi = &mipi_dsi; }; }; @@ -111,6 +124,12 @@ status = "okay"; }; +&lcdclk { + clocks = <&pll>; + div = <2>; + status = "okay"; +}; + &ioport0 { status = "okay"; }; @@ -123,10 +142,18 @@ status = "okay"; }; +&ioport5 { + status = "okay"; +}; + &ioport6 { status = "okay"; }; +&ioporta { + status = "okay"; +}; + &sci0 { /* sci0 and spi0 cannot be enabled together */ pinctrl-0 = <&sci9_default>; @@ -262,3 +289,12 @@ SDRAM_TREFW_8CYCLES>; }; }; + +zephyr_lcdif: &lcdif { + pinctrl-0 = <&glcdc_default>; + pinctrl-names = "default"; +}; + +zephyr_mipi_dsi: &mipi_dsi {}; + +renesas_mipi_i2c: &iic1{}; diff --git a/boards/renesas/ek_ra8d1/sdram.ld b/boards/renesas/ek_ra8d1/sdram.ld index 441f9fa2ebd..5855e663d09 100644 --- a/boards/renesas/ek_ra8d1/sdram.ld +++ b/boards/renesas/ek_ra8d1/sdram.ld @@ -10,6 +10,9 @@ SECTION_DATA_PROLOGUE(.sdram,(NOLOAD),) { __SDRAM_Start = .; KEEP(*(.sdram*)) +#ifdef CONFIG_LVGL + KEEP(*(.lvgl_buf*)) +#endif __SDRAM_End = .; } GROUP_LINK_IN(SDRAM) diff --git a/boards/shields/rtkmipilcdb00000be/Kconfig.defconfig b/boards/shields/rtkmipilcdb00000be/Kconfig.defconfig new file mode 100644 index 00000000000..749284f97fb --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/Kconfig.defconfig @@ -0,0 +1,57 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if SHIELD_RTKMIPILCDB00000BE +if DISPLAY + +# Enable MIPI DSI, as this display controller requires it. + +config MIPI_DSI + default y + +endif # DISPLAY + +if LVGL + +# Configure LVGL to use touchscreen with input API + +config INPUT + default y + +if INPUT + +# GT911 driver drives reset pin low, GT911 and ILI9806E_DSI driver share a reset line, +# so it needs to initialize before the display_ili9806e_dsi driver but after the MIPI DSI driver + +config INPUT_INIT_PRIORITY + default 89 + +endif # INPUT + +# LVGL should allocate buffers equal to size of display +config LV_Z_VDB_SIZE + default 100 + +# Enable double buffering +config LV_Z_DOUBLE_VDB + default y + +# Force full refresh. This prevents memory copy associated with partial +# display refreshes, which is not necessary for the GLCDC driver +config LV_Z_FULL_REFRESH + default y + +config LV_Z_BITS_PER_PIXEL + default 32 + +# Use offloaded render thread +config LV_Z_FLUSH_THREAD + default y + +choice LV_COLOR_DEPTH + default LV_COLOR_DEPTH_32 +endchoice + +endif # LVGL + +endif # SHIELD_RTKMIPILCDB00000BE diff --git a/boards/shields/rtkmipilcdb00000be/Kconfig.shield b/boards/shields/rtkmipilcdb00000be/Kconfig.shield new file mode 100644 index 00000000000..0081d3f9819 --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_RTKMIPILCDB00000BE + def_bool $(shields_list_contains,rtkmipilcdb00000be) diff --git a/boards/shields/rtkmipilcdb00000be/boards/ek_ra8d1.overlay b/boards/shields/rtkmipilcdb00000be/boards/ek_ra8d1.overlay new file mode 100644 index 00000000000..30399bc741f --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/boards/ek_ra8d1.overlay @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + iic1_default: iic1_default { + group1 { + /* SCL1 SDA1 */ + psels = , + ; + drive-strength = "medium"; + }; + }; +}; + +&iic1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = ; + pinctrl-0 = <&iic1_default>; + pinctrl-names = "default"; +}; diff --git a/boards/shields/rtkmipilcdb00000be/doc/index.rst b/boards/shields/rtkmipilcdb00000be/doc/index.rst new file mode 100644 index 00000000000..4e77512e6d5 --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/doc/index.rst @@ -0,0 +1,61 @@ +.. _rtkmipilcdb00000be: + +RTKMIPILCDB00000BE MIPI Display +############################### + +Overview +******** + +The Focus LCDs RTKMIPILCDB00000BE MIPI Display is a 4.5 inch TFT 480x854 pixels +capacitive touch panel, and a backlight unit. + +This display uses a 26 pin connector header. + +Pins Assignment of the Renesas RTKMIPILCDB00000BE MIPI Display +============================================================== + ++-----------------------+------------------------+ +| Connector Pin | Function | ++=======================+========================+ +| 14 | Touch ctrl I2C SDA | ++-----------------------+------------------------+ +| 15 | Display backlight enable| ++-----------------------+------------------------+ +| 16 | Touch ctrl I2C SCL | ++-----------------------+------------------------+ +| 17 | External interrupt | ++-----------------------+------------------------+ +| 18 | Display reset | ++-----------------------+------------------------+ + +Hardware Requirements: +********************** + +Supported Renesas RA boards: EK-RA8D1 +- 1 x RA Board +- 1 x Micro USB cable + +Hardware Configuration: +*********************** + +The MIPI Graphics Expansion Port (J58) connects the EK-RA8D1 board to the MIPI Graphics Expansion Board +supplied as part of the kit. + +Set the configuration switches (SW1) as below to avoid potential failures. + +-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ + | SW1-1 PMOD1 | SW1-2 TRACE | SW1-3 CAMERA | SW1-4 ETHA | SW1-5 ETHB | SW1-6 GLCD | SW1-7 SDRAM | SW1-8 I3C | + +-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ + | OFF | OFF | OFF | OFF | OFF | ON | ON | OFF | + +-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ + +Programming +*********** + +Set ``--shield=rtkmipilcdb00000be`` when you invoke ``west build``. For +example: + +.. zephyr-app-commands:: + :zephyr-app: tests/drivers/display/display_read_write + :board: ek_ra8d1 + :shield: rtkmipilcdb00000be + :goals: build diff --git a/boards/shields/rtkmipilcdb00000be/rtkmipilcdb00000be.overlay b/boards/shields/rtkmipilcdb00000be/rtkmipilcdb00000be.overlay new file mode 100644 index 00000000000..1902a9cb55b --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/rtkmipilcdb00000be.overlay @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/{ + chosen { + zephyr,display = &zephyr_lcdif; + }; + + lvgl_pointer { + compatible = "zephyr,lvgl-pointer-input"; + input = <>911_rtkmipilcdb00000be>; + }; +}; + +&renesas_mipi_i2c { + status = "okay"; + gt911_rtkmipilcdb00000be: gt911-rtkmipilcdb00000be@5d { + compatible = "goodix,gt911"; + reg = <0x5d>; + irq-gpios = <&renesas_mipi_connector 17 GPIO_ACTIVE_HIGH>; + reset-gpios = <&renesas_mipi_connector 18 GPIO_ACTIVE_LOW>; + }; +}; + +&zephyr_mipi_dsi { + status = "okay"; + ili9806e: ili9806e@0 { + status = "okay"; + compatible = "ilitek,ili9806e-dsi"; + reg = <0x0>; + height = <854>; + width = <480>; + data-lanes = <2>; + pixel-format = ; + }; +}; + +&zephyr_lcdif { + status = "okay"; + width = <480>; + height = <854>; + input-pixel-format = ; + output-pixel-format = ; + display-timings { + compatible = "zephyr,panel-timing"; + hsync-len = <2>; + hback-porch = <5>; + vsync-len = <3>; + vback-porch = <20>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + hfront-porch = <72>; + vfront-porch = <17>; + }; + backlight-gpios = <&renesas_mipi_connector 15 GPIO_ACTIVE_HIGH>; +};