boards: silabs: Drop clock configurations for Series-2

Since commit bda8ae8c3f ("drivers: clock_control: silabs: Add clock
control driver"), clock configuration is defined in Device Tree.

We can drop now unused configurations existing in board definitions.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
This commit is contained in:
Jérôme Pouiller 2024-12-17 11:39:34 +01:00 committed by Benjamin Cabé
parent 05578ab51f
commit 3bf8bcee45
6 changed files with 0 additions and 36 deletions

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@ -1,12 +1,6 @@
# Copyright (c) 2023 Antmicro <www.antmicro.com>
# SPDX-License-Identifier: Apache-2.0
config CMU_HFXO_FREQ
default 38400000
config CMU_LFXO_FREQ
default 32768
if SOC_GECKO_USE_RAIL
config FPU

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@ -3,12 +3,6 @@
if BOARD_XG24_DK2601B
config CMU_HFXO_FREQ
default 40000000
config CMU_LFXO_FREQ
default 32768
if SOC_GECKO_USE_RAIL
config FPU

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@ -1,12 +1,6 @@
# Copyright (c) 2023 Antmicro <www.antmicro.com>
# SPDX-License-Identifier: Apache-2.0
config CMU_HFXO_FREQ
default 38400000
config CMU_LFXO_FREQ
default 32768
if SOC_GECKO_USE_RAIL
config FPU

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@ -4,12 +4,6 @@
if BOARD_SLWRB4180A
config CMU_HFXO_FREQ
default 38400000
config CMU_LFXO_FREQ
default 32768
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO

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@ -3,12 +3,6 @@
if BOARD_XG23_RB4210A
config CMU_HFXO_FREQ
default 39000000
config CMU_LFXO_FREQ
default 32768
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO

View file

@ -4,12 +4,6 @@
if BOARD_XG24_RB4187C
config CMU_HFXO_FREQ
default 39000000
config CMU_LFXO_FREQ
default 32768
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO