diff --git a/boards/infineon/cy8ckit_062s4/cy8ckit_062s4.dts b/boards/infineon/cy8ckit_062s4/cy8ckit_062s4.dts
index 457878a62b7..9328a0cf60d 100644
--- a/boards/infineon/cy8ckit_062s4/cy8ckit_062s4.dts
+++ b/boards/infineon/cy8ckit_062s4/cy8ckit_062s4.dts
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2023 David Ullmann
+ * Copyright (c) 2024 David Ullmann
  * SPDX-License-Identifier: Apache-2.0
  */
 
@@ -29,6 +29,32 @@
 
 	};
 
+	arduino_header: connector {
+		compatible = "arduino-header-r3";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;		/* shared */
+		gpio-map = <0  0 &gpio_prt10   0 0>,	/* A0 */
+			   <1  0 &gpio_prt10   1 0>,	/* A1 */
+			   <2  0 &gpio_prt10   2 0>,	/* A2 */
+			   <3  0 &gpio_prt10   3 0>,	/* A3 */
+			   <4  0 &gpio_prt10   4 0>,	/* A4 */
+			   <5  0 &gpio_prt10   5 0>,	/* A5 */
+			   <6  0 &gpio_prt0   2 0>,	/* D0-RX-5 */
+			   <7  0 &gpio_prt0   3 0>,	/* D1-TX-5 */
+			   <8  0 &gpio_prt5   0 0>,	/* D2-RTS-5 */
+			   <9  0 &gpio_prt5   1 0>,	/* D3-CTS-5 */
+			   <10 0 &gpio_prt5   6 0>,	/* D4 */
+			   <11 0 &gpio_prt5   7 0>,	/* D5 */
+			   <12 0 &gpio_prt6   2 0>,	/* D6 */
+			   <13 0 &gpio_prt6   3 0>,	/* D7 */
+			   <14 0 &gpio_prt2   4 0>,	/* D8-RX-6 */
+			   <15 0 &gpio_prt2   6 0>,	/* D9-TX-6 */
+			   <16 0 &gpio_prt2   3 0>,	/* D10 */
+			   <17 0 &gpio_prt2   0 0>,	/* D11 */
+			   <18 0 &gpio_prt2   1 0>,	/* D12 */
+			   <19 0 &gpio_prt2   2 0>;	/* D13 */
+	};
 };
 
 &p3_1_scb2_uart_tx {
@@ -55,3 +81,9 @@ uart2: &scb2 {
 &gpio_prt2 {
 	status = "okay";
 };
+
+uart0: &scb0 {
+	compatible = "infineon,cat1-uart";
+};
+
+arduino_serial: &uart0 {};
diff --git a/boards/shields/reyax_lora/Kconfig.shield b/boards/shields/reyax_lora/Kconfig.shield
new file mode 100644
index 00000000000..c82a3eacc27
--- /dev/null
+++ b/boards/shields/reyax_lora/Kconfig.shield
@@ -0,0 +1,5 @@
+# Copyright (c) 2024 David Ullmann
+# SPDX-License-Identifier: Apache-2.0
+
+config SHIELD_REYAX_LORA
+	def_bool $(shields_list_contains,reyax_lora)
diff --git a/boards/shields/reyax_lora/boards/cy8ckit_062s4.conf b/boards/shields/reyax_lora/boards/cy8ckit_062s4.conf
new file mode 100644
index 00000000000..30752249749
--- /dev/null
+++ b/boards/shields/reyax_lora/boards/cy8ckit_062s4.conf
@@ -0,0 +1,6 @@
+# Copyright (c) 2024 David Ullmann
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_LORA=y
+CONFIG_LORA_RYLRXXX=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
diff --git a/boards/shields/reyax_lora/boards/cy8ckit_062s4.overlay b/boards/shields/reyax_lora/boards/cy8ckit_062s4.overlay
new file mode 100644
index 00000000000..d45be1daa41
--- /dev/null
+++ b/boards/shields/reyax_lora/boards/cy8ckit_062s4.overlay
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2024 David Ullmann
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+&p0_2_scb0_uart_rx {
+	input-enable;
+};
+
+&p0_3_scb0_uart_tx {
+	drive-push-pull;
+};
+
+&arduino_serial {
+	pinctrl-0 = <&p0_2_scb0_uart_rx &p0_3_scb0_uart_tx>;
+	pinctrl-names = "default";
+};
+
+&gpio_prt0 {
+	status = "okay";
+};
+
+&gpio_prt2 {
+	status = "okay";
+};
diff --git a/boards/shields/reyax_lora/doc/index.rst b/boards/shields/reyax_lora/doc/index.rst
new file mode 100644
index 00000000000..aa5cc1a781d
--- /dev/null
+++ b/boards/shields/reyax_lora/doc/index.rst
@@ -0,0 +1,29 @@
+.. lora_reyax:
+
+Reyax LoRa RYLR896 and RYLR915 Modules
+######################################
+
+Overview
+********
+
+These modules expose a simple uart interface for the Semtech SX1276 chip,which implements the LoRa PHY.
+
+More information about the board can be found at the
+`Reyax RYLR page`_.
+
+Hardware Description
+********************
+The Module contains 4 pins
+
+- VDD: Power Supply
+- NRST: Active low reset
+- RXD: Serial data input
+- TXD: Serial data output
+- GND: Ground
+
+References
+**********
+
+.. target-notes::
+.. _Reyax RYLR page:
+    https://reyax.com/products/RYLR896
diff --git a/boards/shields/reyax_lora/reyax_lora.overlay b/boards/shields/reyax_lora/reyax_lora.overlay
new file mode 100644
index 00000000000..080d78d92d0
--- /dev/null
+++ b/boards/shields/reyax_lora/reyax_lora.overlay
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2024 David Ullmann
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+
+/{
+	aliases {
+		lora0 = &rylr_lora_modem;
+	};
+};
+
+
+&arduino_serial {
+	current-speed = <115200>;
+	status = "okay";
+	rylr_lora_modem: rylr_lora_modem {
+			compatible = "reyax,rylrxxx";
+			status = "okay";
+			reset-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>;
+	};
+};
diff --git a/dts/bindings/lora/reyax,rylrxxx.yaml b/dts/bindings/lora/reyax,rylrxxx.yaml
new file mode 100644
index 00000000000..e04a78f7ac4
--- /dev/null
+++ b/dts/bindings/lora/reyax,rylrxxx.yaml
@@ -0,0 +1,13 @@
+# Copyright (c) 2024 David Ullmann
+# SPDX-License-Identifier: Apache-2.0
+
+description: Reyax lora module with AT-command serial interface
+
+compatible: "reyax,rylrxxx"
+
+include: uart-device.yaml
+
+properties:
+  reset-gpios:
+    type: phandle-array
+    required: true